diff options
author | Sergey Ryazanov <ryazanov.s.a@gmail.com> | 2014-10-28 19:18:44 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 01:45:27 -0500 |
commit | a7473717483ef3bb78563611bf1b3b82c5515b2e (patch) | |
tree | d5e3431409c4aee784c7c8401cf19614aed91d7c /arch/mips/ath25/ar5312.c | |
parent | 1ac91b1f686e9d819b16525baf2e8db3c282edba (diff) |
MIPS: ath25: add board configuration detection
All boards based on AR5312/AR2315 SoC have a special structure located
at the end of flash. This structure contains board-specific data such as
Ethernet and Wireless MAC addresses. The flash is mapped to the memmory
at predefined location.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8243/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath25/ar5312.c')
-rw-r--r-- | arch/mips/ath25/ar5312.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c index 398d4fd4dd2d..41bd56d6ab23 100644 --- a/arch/mips/ath25/ar5312.c +++ b/arch/mips/ath25/ar5312.c | |||
@@ -158,6 +158,45 @@ void __init ar5312_arch_init_irq(void) | |||
158 | ar5312_misc_irq_domain = domain; | 158 | ar5312_misc_irq_domain = domain; |
159 | } | 159 | } |
160 | 160 | ||
161 | static void __init ar5312_flash_init(void) | ||
162 | { | ||
163 | void __iomem *flashctl_base; | ||
164 | u32 ctl; | ||
165 | |||
166 | flashctl_base = ioremap_nocache(AR5312_FLASHCTL_BASE, | ||
167 | AR5312_FLASHCTL_SIZE); | ||
168 | |||
169 | /* | ||
170 | * Configure flash bank 0. | ||
171 | * Assume 8M window size. Flash will be aliased if it's smaller | ||
172 | */ | ||
173 | ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0); | ||
174 | ctl &= AR5312_FLASHCTL_MW; | ||
175 | ctl |= AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC_8M | AR5312_FLASHCTL_RBLE; | ||
176 | ctl |= 0x01 << AR5312_FLASHCTL_IDCY_S; | ||
177 | ctl |= 0x07 << AR5312_FLASHCTL_WST1_S; | ||
178 | ctl |= 0x07 << AR5312_FLASHCTL_WST2_S; | ||
179 | __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL0); | ||
180 | |||
181 | /* Disable other flash banks */ | ||
182 | ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL1); | ||
183 | ctl &= ~(AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC); | ||
184 | __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL1); | ||
185 | ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL2); | ||
186 | ctl &= ~(AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC); | ||
187 | __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL2); | ||
188 | |||
189 | iounmap(flashctl_base); | ||
190 | } | ||
191 | |||
192 | void __init ar5312_init_devices(void) | ||
193 | { | ||
194 | ar5312_flash_init(); | ||
195 | |||
196 | /* Locate board/radio config data */ | ||
197 | ath25_find_config(AR5312_FLASH_BASE, AR5312_FLASH_SIZE); | ||
198 | } | ||
199 | |||
161 | static void ar5312_restart(char *command) | 200 | static void ar5312_restart(char *command) |
162 | { | 201 | { |
163 | /* reset the system */ | 202 | /* reset the system */ |