diff options
author | Sergey Ryazanov <ryazanov.s.a@gmail.com> | 2014-10-28 19:18:41 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 01:45:27 -0500 |
commit | 1753e74ed8fa3235174d5baa3421cbf8d693a42d (patch) | |
tree | bb6b196bb76d05dfb2be056218643ed2c0513baa /arch/mips/ath25/ar2315.c | |
parent | ba910345034aea52d292bdc26b9c6831ab7b54e8 (diff) |
MIPS: ath25: add interrupts handling routines
Add interrupts initialization and handling routines, also add AHB bus
error interrupt handlers for both SoCs families.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8240/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath25/ar2315.c')
-rw-r--r-- | arch/mips/ath25/ar2315.c | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c index 828943212f03..d92aa91ae75d 100644 --- a/arch/mips/ath25/ar2315.c +++ b/arch/mips/ath25/ar2315.c | |||
@@ -16,6 +16,9 @@ | |||
16 | 16 | ||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/bitops.h> | ||
20 | #include <linux/irqdomain.h> | ||
21 | #include <linux/interrupt.h> | ||
19 | #include <linux/reboot.h> | 22 | #include <linux/reboot.h> |
20 | #include <asm/bootinfo.h> | 23 | #include <asm/bootinfo.h> |
21 | #include <asm/reboot.h> | 24 | #include <asm/reboot.h> |
@@ -26,6 +29,7 @@ | |||
26 | #include "ar2315_regs.h" | 29 | #include "ar2315_regs.h" |
27 | 30 | ||
28 | static void __iomem *ar2315_rst_base; | 31 | static void __iomem *ar2315_rst_base; |
32 | static struct irq_domain *ar2315_misc_irq_domain; | ||
29 | 33 | ||
30 | static inline u32 ar2315_rst_reg_read(u32 reg) | 34 | static inline u32 ar2315_rst_reg_read(u32 reg) |
31 | { | 35 | { |
@@ -46,6 +50,116 @@ static inline void ar2315_rst_reg_mask(u32 reg, u32 mask, u32 val) | |||
46 | ar2315_rst_reg_write(reg, ret); | 50 | ar2315_rst_reg_write(reg, ret); |
47 | } | 51 | } |
48 | 52 | ||
53 | static irqreturn_t ar2315_ahb_err_handler(int cpl, void *dev_id) | ||
54 | { | ||
55 | ar2315_rst_reg_write(AR2315_AHB_ERR0, AR2315_AHB_ERROR_DET); | ||
56 | ar2315_rst_reg_read(AR2315_AHB_ERR1); | ||
57 | |||
58 | pr_emerg("AHB fatal error\n"); | ||
59 | machine_restart("AHB error"); /* Catastrophic failure */ | ||
60 | |||
61 | return IRQ_HANDLED; | ||
62 | } | ||
63 | |||
64 | static struct irqaction ar2315_ahb_err_interrupt = { | ||
65 | .handler = ar2315_ahb_err_handler, | ||
66 | .name = "ar2315-ahb-error", | ||
67 | }; | ||
68 | |||
69 | static void ar2315_misc_irq_handler(unsigned irq, struct irq_desc *desc) | ||
70 | { | ||
71 | u32 pending = ar2315_rst_reg_read(AR2315_ISR) & | ||
72 | ar2315_rst_reg_read(AR2315_IMR); | ||
73 | unsigned nr, misc_irq = 0; | ||
74 | |||
75 | if (pending) { | ||
76 | struct irq_domain *domain = irq_get_handler_data(irq); | ||
77 | |||
78 | nr = __ffs(pending); | ||
79 | misc_irq = irq_find_mapping(domain, nr); | ||
80 | } | ||
81 | |||
82 | if (misc_irq) { | ||
83 | if (nr == AR2315_MISC_IRQ_GPIO) | ||
84 | ar2315_rst_reg_write(AR2315_ISR, AR2315_ISR_GPIO); | ||
85 | else if (nr == AR2315_MISC_IRQ_WATCHDOG) | ||
86 | ar2315_rst_reg_write(AR2315_ISR, AR2315_ISR_WD); | ||
87 | generic_handle_irq(misc_irq); | ||
88 | } else { | ||
89 | spurious_interrupt(); | ||
90 | } | ||
91 | } | ||
92 | |||
93 | static void ar2315_misc_irq_unmask(struct irq_data *d) | ||
94 | { | ||
95 | ar2315_rst_reg_mask(AR2315_IMR, 0, BIT(d->hwirq)); | ||
96 | } | ||
97 | |||
98 | static void ar2315_misc_irq_mask(struct irq_data *d) | ||
99 | { | ||
100 | ar2315_rst_reg_mask(AR2315_IMR, BIT(d->hwirq), 0); | ||
101 | } | ||
102 | |||
103 | static struct irq_chip ar2315_misc_irq_chip = { | ||
104 | .name = "ar2315-misc", | ||
105 | .irq_unmask = ar2315_misc_irq_unmask, | ||
106 | .irq_mask = ar2315_misc_irq_mask, | ||
107 | }; | ||
108 | |||
109 | static int ar2315_misc_irq_map(struct irq_domain *d, unsigned irq, | ||
110 | irq_hw_number_t hw) | ||
111 | { | ||
112 | irq_set_chip_and_handler(irq, &ar2315_misc_irq_chip, handle_level_irq); | ||
113 | return 0; | ||
114 | } | ||
115 | |||
116 | static struct irq_domain_ops ar2315_misc_irq_domain_ops = { | ||
117 | .map = ar2315_misc_irq_map, | ||
118 | }; | ||
119 | |||
120 | /* | ||
121 | * Called when an interrupt is received, this function | ||
122 | * determines exactly which interrupt it was, and it | ||
123 | * invokes the appropriate handler. | ||
124 | * | ||
125 | * Implicitly, we also define interrupt priority by | ||
126 | * choosing which to dispatch first. | ||
127 | */ | ||
128 | static void ar2315_irq_dispatch(void) | ||
129 | { | ||
130 | u32 pending = read_c0_status() & read_c0_cause(); | ||
131 | |||
132 | if (pending & CAUSEF_IP3) | ||
133 | do_IRQ(AR2315_IRQ_WLAN0); | ||
134 | else if (pending & CAUSEF_IP2) | ||
135 | do_IRQ(AR2315_IRQ_MISC); | ||
136 | else if (pending & CAUSEF_IP7) | ||
137 | do_IRQ(ATH25_IRQ_CPU_CLOCK); | ||
138 | else | ||
139 | spurious_interrupt(); | ||
140 | } | ||
141 | |||
142 | void __init ar2315_arch_init_irq(void) | ||
143 | { | ||
144 | struct irq_domain *domain; | ||
145 | unsigned irq; | ||
146 | |||
147 | ath25_irq_dispatch = ar2315_irq_dispatch; | ||
148 | |||
149 | domain = irq_domain_add_linear(NULL, AR2315_MISC_IRQ_COUNT, | ||
150 | &ar2315_misc_irq_domain_ops, NULL); | ||
151 | if (!domain) | ||
152 | panic("Failed to add IRQ domain"); | ||
153 | |||
154 | irq = irq_create_mapping(domain, AR2315_MISC_IRQ_AHB); | ||
155 | setup_irq(irq, &ar2315_ahb_err_interrupt); | ||
156 | |||
157 | irq_set_chained_handler(AR2315_IRQ_MISC, ar2315_misc_irq_handler); | ||
158 | irq_set_handler_data(AR2315_IRQ_MISC, domain); | ||
159 | |||
160 | ar2315_misc_irq_domain = domain; | ||
161 | } | ||
162 | |||
49 | static void ar2315_restart(char *command) | 163 | static void ar2315_restart(char *command) |
50 | { | 164 | { |
51 | void (*mips_reset_vec)(void) = (void *)0xbfc00000; | 165 | void (*mips_reset_vec)(void) = (void *)0xbfc00000; |