arm64: Add support for hooks to handle undefined instructions

Add support to register hooks for undefined instructions. The handlers
will be called when the undefined instruction and the processor state
(as contained in pstate) match criteria used at registration.

Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

1 files changed, 66 insertions, 0 deletions

diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index de1b085e7963..0a801e3743d5 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -259,6 +259,69 @@ void arm64_notify_die(const char *str, struct pt_regs *regs,
         }
 }
 
+static LIST_HEAD(undef_hook);
+static DEFINE_RAW_SPINLOCK(undef_lock);
+
+void register_undef_hook(struct undef_hook *hook)
+{
+        unsigned long flags;
+
+        raw_spin_lock_irqsave(&undef_lock, flags);
+        list_add(&hook->node, &undef_hook);
+        raw_spin_unlock_irqrestore(&undef_lock, flags);
+}
+
+void unregister_undef_hook(struct undef_hook *hook)
+{
+        unsigned long flags;
+
+        raw_spin_lock_irqsave(&undef_lock, flags);
+        list_del(&hook->node);
+        raw_spin_unlock_irqrestore(&undef_lock, flags);
+}
+
+static int call_undef_hook(struct pt_regs *regs)
+{
+        struct undef_hook *hook;
+        unsigned long flags;
+        u32 instr;
+        int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
+        void __user *pc = (void __user *)instruction_pointer(regs);
+
+        if (!user_mode(regs))
+                return 1;
+
+        if (compat_thumb_mode(regs)) {
+                /* 16-bit Thumb instruction */
+                if (get_user(instr, (u16 __user *)pc))
+                        goto exit;
+                instr = le16_to_cpu(instr);
+                if (aarch32_insn_is_wide(instr)) {
+                        u32 instr2;
+
+                        if (get_user(instr2, (u16 __user *)(pc + 2)))
+                                goto exit;
+                        instr2 = le16_to_cpu(instr2);
+                        instr = (instr << 16) | instr2;
+                }
+        } else {
+                /* 32-bit ARM instruction */
+                if (get_user(instr, (u32 __user *)pc))
+                        goto exit;
+                instr = le32_to_cpu(instr);
+        }
+
+        raw_spin_lock_irqsave(&undef_lock, flags);
+        list_for_each_entry(hook, &undef_hook, node)
+                if ((instr & hook->instr_mask) == hook->instr_val &&
+                        (regs->pstate & hook->pstate_mask) == hook->pstate_val)
+                        fn = hook->fn;
+
+        raw_spin_unlock_irqrestore(&undef_lock, flags);
+exit:
+        return fn ? fn(regs, instr) : 1;
+}
+
 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 {
         siginfo_t info;
@@ -268,6 +331,9 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
         if (!aarch32_break_handler(regs))
                 return;
 
+        if (call_undef_hook(regs) == 0)
+                return;
+
         if (show_unhandled_signals && unhandled_signal(current, SIGILL) &&
             printk_ratelimit()) {
                 pr_info("%s[%d]: undefined instruction: pc=%p\n",