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authorSuzuki K. Poulose <suzuki.poulose@arm.com>2015-10-19 09:24:41 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2015-10-21 10:33:46 -0400
commit9cdf8ec4a86b9310111f741bbaf11df9120e0482 (patch)
treefc4ff7a1995cc8fa01eea76db09da62889d4e677 /arch/arm64/kernel/setup.c
parent4b998ff1885eecd3dc330bf057e24667c1db84a4 (diff)
arm64: Move cpu feature detection code
This patch moves the CPU feature detection code from arch/arm64/kernel/{setup.c to cpufeature.c} The plan is to consolidate all the CPU feature handling in cpufeature.c. Apart from changing pr_fmt from "alternatives" to "cpu features", there are no functional changes. Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Tested-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/setup.c')
-rw-r--r--arch/arm64/kernel/setup.c107
1 files changed, 0 insertions, 107 deletions
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 47e005141598..baf0da8c7d8a 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -65,23 +65,6 @@
65#include <asm/efi.h> 65#include <asm/efi.h>
66#include <asm/xen/hypervisor.h> 66#include <asm/xen/hypervisor.h>
67 67
68unsigned long elf_hwcap __read_mostly;
69EXPORT_SYMBOL_GPL(elf_hwcap);
70
71#ifdef CONFIG_COMPAT
72#define COMPAT_ELF_HWCAP_DEFAULT \
73 (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
74 COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
75 COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
76 COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
77 COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV|\
78 COMPAT_HWCAP_LPAE)
79unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
80unsigned int compat_elf_hwcap2 __read_mostly;
81#endif
82
83DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
84
85phys_addr_t __fdt_pointer __initdata; 68phys_addr_t __fdt_pointer __initdata;
86 69
87/* 70/*
@@ -196,96 +179,6 @@ static void __init smp_build_mpidr_hash(void)
196 __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash)); 179 __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
197} 180}
198 181
199void __init setup_cpu_features(void)
200{
201 u64 features;
202 s64 block;
203 u32 cwg;
204 int cls;
205
206 /*
207 * Check for sane CTR_EL0.CWG value.
208 */
209 cwg = cache_type_cwg();
210 cls = cache_line_size();
211 if (!cwg)
212 pr_warn("No Cache Writeback Granule information, assuming cache line size %d\n",
213 cls);
214 if (L1_CACHE_BYTES < cls)
215 pr_warn("L1_CACHE_BYTES smaller than the Cache Writeback Granule (%d < %d)\n",
216 L1_CACHE_BYTES, cls);
217
218 /*
219 * ID_AA64ISAR0_EL1 contains 4-bit wide signed feature blocks.
220 * The blocks we test below represent incremental functionality
221 * for non-negative values. Negative values are reserved.
222 */
223 features = read_cpuid(ID_AA64ISAR0_EL1);
224 block = cpuid_feature_extract_field(features, 4);
225 if (block > 0) {
226 switch (block) {
227 default:
228 case 2:
229 elf_hwcap |= HWCAP_PMULL;
230 case 1:
231 elf_hwcap |= HWCAP_AES;
232 case 0:
233 break;
234 }
235 }
236
237 if (cpuid_feature_extract_field(features, 8) > 0)
238 elf_hwcap |= HWCAP_SHA1;
239
240 if (cpuid_feature_extract_field(features, 12) > 0)
241 elf_hwcap |= HWCAP_SHA2;
242
243 if (cpuid_feature_extract_field(features, 16) > 0)
244 elf_hwcap |= HWCAP_CRC32;
245
246 block = cpuid_feature_extract_field(features, 20);
247 if (block > 0) {
248 switch (block) {
249 default:
250 case 2:
251 elf_hwcap |= HWCAP_ATOMICS;
252 case 1:
253 /* RESERVED */
254 case 0:
255 break;
256 }
257 }
258
259#ifdef CONFIG_COMPAT
260 /*
261 * ID_ISAR5_EL1 carries similar information as above, but pertaining to
262 * the AArch32 32-bit execution state.
263 */
264 features = read_cpuid(ID_ISAR5_EL1);
265 block = cpuid_feature_extract_field(features, 4);
266 if (block > 0) {
267 switch (block) {
268 default:
269 case 2:
270 compat_elf_hwcap2 |= COMPAT_HWCAP2_PMULL;
271 case 1:
272 compat_elf_hwcap2 |= COMPAT_HWCAP2_AES;
273 case 0:
274 break;
275 }
276 }
277
278 if (cpuid_feature_extract_field(features, 8) > 0)
279 compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
280
281 if (cpuid_feature_extract_field(features, 12) > 0)
282 compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
283
284 if (cpuid_feature_extract_field(features, 16) > 0)
285 compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
286#endif
287}
288
289static void __init setup_machine_fdt(phys_addr_t dt_phys) 182static void __init setup_machine_fdt(phys_addr_t dt_phys)
290{ 183{
291 void *dt_virt = fixmap_remap_fdt(dt_phys); 184 void *dt_virt = fixmap_remap_fdt(dt_phys);