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authorWill Deacon <will.deacon@arm.com>2015-01-26 13:46:19 -0500
committerWill Deacon <will.deacon@arm.com>2015-07-27 09:34:39 -0400
commit40a1db2434a1b62332b1af25cfa14d7b8c0301fe (patch)
treeb98eadfd8f2e2e98b162a7b0a52635ed9c6d7ee4 /arch/arm64/kernel/setup.c
parentc275f76bb4ce16fd0205da1e15f31b875013678e (diff)
arm64: elf: advertise 8.1 atomic instructions as new hwcap
The ARM v8.1 architecture introduces new atomic instructions to the A64 instruction set for things like cmpxchg, so advertise their availability to userspace using a hwcap. Reviewed-by: Steve Capper <steve.capper@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/setup.c')
-rw-r--r--arch/arm64/kernel/setup.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index e7a1e719f127..b2f9895ecf7b 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -278,6 +278,19 @@ static void __init setup_processor(void)
278 if (block && !(block & 0x8)) 278 if (block && !(block & 0x8))
279 elf_hwcap |= HWCAP_CRC32; 279 elf_hwcap |= HWCAP_CRC32;
280 280
281 block = (features >> 20) & 0xf;
282 if (!(block & 0x8)) {
283 switch (block) {
284 default:
285 case 2:
286 elf_hwcap |= HWCAP_ATOMICS;
287 case 1:
288 /* RESERVED */
289 case 0:
290 break;
291 }
292 }
293
281#ifdef CONFIG_COMPAT 294#ifdef CONFIG_COMPAT
282 /* 295 /*
283 * ID_ISAR5_EL1 carries similar information as above, but pertaining to 296 * ID_ISAR5_EL1 carries similar information as above, but pertaining to
@@ -457,6 +470,7 @@ static const char *hwcap_str[] = {
457 "sha1", 470 "sha1",
458 "sha2", 471 "sha2",
459 "crc32", 472 "crc32",
473 "atomics",
460 NULL 474 NULL
461}; 475};
462 476