diff options
author | Tony Lindgren <tony@atomide.com> | 2012-10-08 12:11:22 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-10-17 14:36:50 -0400 |
commit | 3a8761c0272c961c707e5af2eb0179adf3ef7e14 (patch) | |
tree | 101b61bd1bc57de37c52587ecaff1da4e84d7742 /arch/arm/plat-omap/i2c.c | |
parent | 8599e7c58786e3aef0bdb0fa093fd5150ae8a9bc (diff) |
ARM: OMAP: Split plat-omap/i2c.c into mach-omap1 and mach-omap2
There's no need to keep the device related things in the
common i2c.c as omap2+ is using hwmod. Split the code to
mach-omap1 and mach-omap2 parts and only leave common
code to plat-omap/i2c.c.
Note that as omap1 only has one i2c controller, we can
now remove the old device related macros.
Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/i2c.c')
-rw-r--r-- | arch/arm/plat-omap/i2c.c | 133 |
1 files changed, 5 insertions, 128 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index a5683a84c6ee..37597a6bbed2 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c | |||
@@ -26,52 +26,18 @@ | |||
26 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/i2c.h> | 28 | #include <linux/i2c.h> |
29 | #include <linux/i2c-omap.h> | ||
29 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
30 | #include <linux/err.h> | 31 | #include <linux/err.h> |
31 | #include <linux/clk.h> | 32 | #include <linux/clk.h> |
32 | 33 | ||
33 | #include <mach/irqs.h> | 34 | #include <mach/irqs.h> |
34 | #include <plat/i2c.h> | 35 | #include <plat/cpu.h> |
35 | #include <plat/omap_device.h> | ||
36 | 36 | ||
37 | #define OMAP_I2C_SIZE 0x3f | 37 | #include "i2c.h" |
38 | #define OMAP1_I2C_BASE 0xfffb3800 | ||
39 | #define OMAP1_INT_I2C (32 + 4) | ||
40 | 38 | ||
41 | static const char name[] = "omap_i2c"; | ||
42 | |||
43 | #define I2C_RESOURCE_BUILDER(base, irq) \ | ||
44 | { \ | ||
45 | .start = (base), \ | ||
46 | .end = (base) + OMAP_I2C_SIZE, \ | ||
47 | .flags = IORESOURCE_MEM, \ | ||
48 | }, \ | ||
49 | { \ | ||
50 | .start = (irq), \ | ||
51 | .flags = IORESOURCE_IRQ, \ | ||
52 | }, | ||
53 | |||
54 | static struct resource i2c_resources[][2] = { | ||
55 | { I2C_RESOURCE_BUILDER(0, 0) }, | ||
56 | }; | ||
57 | |||
58 | #define I2C_DEV_BUILDER(bus_id, res, data) \ | ||
59 | { \ | ||
60 | .id = (bus_id), \ | ||
61 | .name = name, \ | ||
62 | .num_resources = ARRAY_SIZE(res), \ | ||
63 | .resource = (res), \ | ||
64 | .dev = { \ | ||
65 | .platform_data = (data), \ | ||
66 | }, \ | ||
67 | } | ||
68 | |||
69 | #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 | ||
70 | #define OMAP_I2C_MAX_CONTROLLERS 4 | 39 | #define OMAP_I2C_MAX_CONTROLLERS 4 |
71 | static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS]; | 40 | static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS]; |
72 | static struct platform_device omap_i2c_devices[] = { | ||
73 | I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]), | ||
74 | }; | ||
75 | 41 | ||
76 | #define OMAP_I2C_CMDLINE_SETUP (BIT(31)) | 42 | #define OMAP_I2C_CMDLINE_SETUP (BIT(31)) |
77 | 43 | ||
@@ -91,95 +57,6 @@ static int __init omap_i2c_nr_ports(void) | |||
91 | return ports; | 57 | return ports; |
92 | } | 58 | } |
93 | 59 | ||
94 | static inline int omap1_i2c_add_bus(int bus_id) | ||
95 | { | ||
96 | struct platform_device *pdev; | ||
97 | struct omap_i2c_bus_platform_data *pdata; | ||
98 | struct resource *res; | ||
99 | |||
100 | omap1_i2c_mux_pins(bus_id); | ||
101 | |||
102 | pdev = &omap_i2c_devices[bus_id - 1]; | ||
103 | res = pdev->resource; | ||
104 | res[0].start = OMAP1_I2C_BASE; | ||
105 | res[0].end = res[0].start + OMAP_I2C_SIZE; | ||
106 | res[1].start = OMAP1_INT_I2C; | ||
107 | pdata = &i2c_pdata[bus_id - 1]; | ||
108 | |||
109 | /* all OMAP1 have IP version 1 register set */ | ||
110 | pdata->rev = OMAP_I2C_IP_VERSION_1; | ||
111 | |||
112 | /* all OMAP1 I2C are implemented like this */ | ||
113 | pdata->flags = OMAP_I2C_FLAG_NO_FIFO | | ||
114 | OMAP_I2C_FLAG_SIMPLE_CLOCK | | ||
115 | OMAP_I2C_FLAG_16BIT_DATA_REG | | ||
116 | OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK; | ||
117 | |||
118 | /* how the cpu bus is wired up differs for 7xx only */ | ||
119 | |||
120 | if (cpu_is_omap7xx()) | ||
121 | pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1; | ||
122 | else | ||
123 | pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2; | ||
124 | |||
125 | return platform_device_register(pdev); | ||
126 | } | ||
127 | |||
128 | |||
129 | #ifdef CONFIG_ARCH_OMAP2PLUS | ||
130 | static inline int omap2_i2c_add_bus(int bus_id) | ||
131 | { | ||
132 | int l; | ||
133 | struct omap_hwmod *oh; | ||
134 | struct platform_device *pdev; | ||
135 | char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; | ||
136 | struct omap_i2c_bus_platform_data *pdata; | ||
137 | struct omap_i2c_dev_attr *dev_attr; | ||
138 | |||
139 | omap2_i2c_mux_pins(bus_id); | ||
140 | |||
141 | l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id); | ||
142 | WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN, | ||
143 | "String buffer overflow in I2C%d device setup\n", bus_id); | ||
144 | oh = omap_hwmod_lookup(oh_name); | ||
145 | if (!oh) { | ||
146 | pr_err("Could not look up %s\n", oh_name); | ||
147 | return -EEXIST; | ||
148 | } | ||
149 | |||
150 | pdata = &i2c_pdata[bus_id - 1]; | ||
151 | /* | ||
152 | * pass the hwmod class's CPU-specific knowledge of I2C IP revision in | ||
153 | * use, and functionality implementation flags, up to the OMAP I2C | ||
154 | * driver via platform data | ||
155 | */ | ||
156 | pdata->rev = oh->class->rev; | ||
157 | |||
158 | dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; | ||
159 | pdata->flags = dev_attr->flags; | ||
160 | |||
161 | pdev = omap_device_build(name, bus_id, oh, pdata, | ||
162 | sizeof(struct omap_i2c_bus_platform_data), | ||
163 | NULL, 0, 0); | ||
164 | WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); | ||
165 | |||
166 | return PTR_RET(pdev); | ||
167 | } | ||
168 | #else | ||
169 | static inline int omap2_i2c_add_bus(int bus_id) | ||
170 | { | ||
171 | return 0; | ||
172 | } | ||
173 | #endif | ||
174 | |||
175 | static int __init omap_i2c_add_bus(int bus_id) | ||
176 | { | ||
177 | if (cpu_class_is_omap1()) | ||
178 | return omap1_i2c_add_bus(bus_id); | ||
179 | else | ||
180 | return omap2_i2c_add_bus(bus_id); | ||
181 | } | ||
182 | |||
183 | /** | 60 | /** |
184 | * omap_i2c_bus_setup - Process command line options for the I2C bus speed | 61 | * omap_i2c_bus_setup - Process command line options for the I2C bus speed |
185 | * @str: String of options | 62 | * @str: String of options |
@@ -218,7 +95,7 @@ static int __init omap_register_i2c_bus_cmdline(void) | |||
218 | for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) | 95 | for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) |
219 | if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { | 96 | if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { |
220 | i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; | 97 | i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; |
221 | err = omap_i2c_add_bus(i + 1); | 98 | err = omap_i2c_add_bus(&i2c_pdata[i], i + 1); |
222 | if (err) | 99 | if (err) |
223 | goto out; | 100 | goto out; |
224 | } | 101 | } |
@@ -256,5 +133,5 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate, | |||
256 | 133 | ||
257 | i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; | 134 | i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; |
258 | 135 | ||
259 | return omap_i2c_add_bus(bus_id); | 136 | return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id); |
260 | } | 137 | } |