ARM: OMAP1: Update dpll1 default rate reprogramming method

According to comments in omap1_select_table_rate(), reprogramming dpll1
is tricky, and should always be done from SRAM.

While being at it, move OMAP730 special case handling inside
omap_sram_reprogram_clock().

Created on top of version 2 of the series "ARM: OMAP1: Fix dpll1
reprogramming related issues", which it depends on.
Tested on Amstrad Delta.

Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 1 insertions, 5 deletions

diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index ff27dbdba3d6..6d8f7c640237 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -218,12 +218,8 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)
         /*
          * In most cases we should not need to reprogram DPLL.
          * Reprogramming the DPLL is tricky, it must be done from SRAM.
-         * (on 730, bit 13 must always be 1)
          */
-        if (cpu_is_omap7xx())
-                omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000);
-        else
-                omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
+        omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
 
         /* XXX Do we need to recalculate the tree below DPLL1 at this point? */
         ck_dpll1_p->rate = ptr->pll_rate;