ARM: imx: enable WAIT mode hardware workaround for imx6sx

Need to enable INT_MEM_CLK_LPM bit in CCM_CGPR for WAIT mode,
without this bit set, if there is pending interrupt during
ARM platform entering WAIT mode without power gating, cache
data will be corrupted, this is a hardware workaround for WAIT
mode and must be enabled.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c
index 3c6672b3796b..261aaa45ff33 100644
--- a/arch/arm/mach-imx/cpuidle-imx6sx.c
+++ b/arch/arm/mach-imx/cpuidle-imx6sx.c
@@ -90,6 +90,7 @@ static struct cpuidle_driver imx6sx_cpuidle_driver = {
 
 int __init imx6sx_cpuidle_init(void)
 {
+        imx6_set_int_mem_clk_lpm(true);
         imx6_enable_rbc(false);
         /*
          * set ARM power up/down timing to the fastest,