Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "Improved and new platform support for various SoCs:

  New SoC support:
   - Broadcom BCM23550
   - Freescale i.MX7Solo
   - Qualcomm MDM9615
   - Renesas r8a7792

  Improvements:
   - convert clps711x to multiplatform
   - debug uart improvements for Atmel platforms
   - Tango platform improvements: HOTPLUG_CPU, Suspend-to-ram
   - OMAP tweaks and improvements to hwmod
   - OMAP support for kexec on SMP"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits)
  ARM: davinci: fix build break because of undeclared dm365_evm_snd_data
  ARM: s3c64xx: smartq: Avoid sparse warnings
  ARM: sti: Implement dummy L2 cache's write_sec
  ARM: STi: Update machine _namestr to be more generic.
  arm: meson: explicitly select clk drivers
  ARM: tango: add Suspend-to-RAM support
  ARM: hisi: consolidate the hisilicon machine entries
  ARM: tango: fix CONFIG_HOTPLUG_CPU=n build
  MAINTAINERS: Update BCM281XX/BCM11XXX/BCM216XX entry
  MAINTAINERS: Update BCM63XX entry
  MAINTAINERS: Add NS2 entry
  MAINTAINERS: Fix nsp false-positives
  MAINTAINERS: Change L to M for Broadcom ARM/ARM64 SoC entries
  ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCs
  ARM: clps711x: Switch to MULTIPLATFORM
  ARM: clps711x: Remove boards support
  ARM: clps711x: Add basic DT support
  ARM: clps711x: Reduce static map size
  ARM: SAMSUNG: Constify iomem address passed to s5p_init_cpu
  ARM: oxnas: Change OX810SE default driver config
  ...

6 files changed, 98 insertions, 46 deletions

diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 5f63f513d9c9..34f0fca0b847 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -112,9 +112,17 @@ config ARCH_BCM_21664
           Enable support for the BCM21664 family, which includes
           BCM21663 and BCM21664 variants.
 
+config ARCH_BCM_23550
+        bool "Broadcom BCM23550 SoC"
+        depends on ARCH_MULTI_V7
+        select ARCH_BCM_MOBILE
+        select HAVE_SMP
+        help
+          Enable support for the BCM23550.
+
 config ARCH_BCM_MOBILE_L2_CACHE
         bool "Broadcom mobile SoC level 2 cache support"
-        depends on ARCH_BCM_MOBILE
+        depends on ARCH_BCM_281XX || ARCH_BCM_21664
         default y
         select CACHE_L2X0
         select ARCH_BCM_MOBILE_SMC
@@ -129,7 +137,7 @@ config ARCH_BCM_MOBILE_SMP
         select HAVE_ARM_SCU
         select ARM_ERRATA_764369
         help
-          SMP support for the BCM281XX and BCM21664 SoC families.
+          SMP support for the BCM281XX, BCM21664 and BCM23550 SoC families.
           Provided as an option so SMP support for SoCs of this type
           can be disabled for an SMP-enabled kernel.
 
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index 7d665151c772..980f5850097c 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -26,7 +26,10 @@ obj-$(CONFIG_ARCH_BCM_281XX)	+= board_bcm281xx.o
 # BCM21664
 obj-$(CONFIG_ARCH_BCM_21664)    += board_bcm21664.o
 
-# BCM281XX and BCM21664 SMP support
+# BCM23550
+obj-$(CONFIG_ARCH_BCM_23550)    += board_bcm23550.o
+
+# BCM281XX, BCM21664 and BCM23550 SMP support
 obj-$(CONFIG_ARCH_BCM_MOBILE_SMP) += platsmp.o
 
 # BCM281XX and BCM21664 L2 cache control
diff --git a/arch/arm/mach-bcm/board_bcm21664.c b/arch/arm/mach-bcm/board_bcm21664.c
index 0d7034c57334..c5bf01641172 100644
--- a/arch/arm/mach-bcm/board_bcm21664.c
+++ b/arch/arm/mach-bcm/board_bcm21664.c
@@ -11,52 +11,10 @@
  * GNU General Public License for more details.
  */
 
-#include <linux/of_address.h>
-#include <linux/io.h>
-
 #include <asm/mach/arch.h>
 
 #include "kona_l2_cache.h"
 
-#define RSTMGR_DT_STRING                "brcm,bcm21664-resetmgr"
-
-#define RSTMGR_REG_WR_ACCESS_OFFSET     0
-#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4
-
-#define RSTMGR_WR_PASSWORD              0xa5a5
-#define RSTMGR_WR_PASSWORD_SHIFT        8
-#define RSTMGR_WR_ACCESS_ENABLE         1
-
-static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
-{
-        void __iomem *base;
-        struct device_node *resetmgr;
-
-        resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
-        if (!resetmgr) {
-                pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
-                return;
-        }
-        base = of_iomap(resetmgr, 0);
-        if (!base) {
-                pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
-                return;
-        }
-
-        /*
-         * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
-         * register. To write to that register we must first write the password
-         * and the enable bit in the write access enable register.
-         */
-        writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
-                RSTMGR_WR_ACCESS_ENABLE,
-                base + RSTMGR_REG_WR_ACCESS_OFFSET);
-        writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
-
-        /* Wait for reset */
-        while (1);
-}
-
 static void __init bcm21664_init(void)
 {
         kona_l2_cache_init();
@@ -69,6 +27,5 @@ static const char * const bcm21664_dt_compat[] = {
 
 DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor")
         .init_machine = bcm21664_init,
-        .restart = bcm21664_restart,
         .dt_compat = bcm21664_dt_compat,
 MACHINE_END
diff --git a/arch/arm/mach-bcm/board_bcm23550.c b/arch/arm/mach-bcm/board_bcm23550.c
new file mode 100644
index 000000000000..0ac01debd077
--- /dev/null
+++ b/arch/arm/mach-bcm/board_bcm23550.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+
+static const char * const bcm23550_dt_compat[] = {
+        "brcm,bcm23550",
+        NULL,
+};
+
+DT_MACHINE_START(BCM23550_DT, "BCM23550 Broadcom Application Processor")
+        .dt_compat = bcm23550_dt_compat,
+MACHINE_END
diff --git a/arch/arm/mach-bcm/kona_l2_cache.c b/arch/arm/mach-bcm/kona_l2_cache.c
index b31970377c20..59ad86304092 100644
--- a/arch/arm/mach-bcm/kona_l2_cache.c
+++ b/arch/arm/mach-bcm/kona_l2_cache.c
@@ -17,6 +17,7 @@
 #include <asm/hardware/cache-l2x0.h>
 
 #include "bcm_kona_smc.h"
+#include "kona_l2_cache.h"
 
 void __init kona_l2_cache_init(void)
 {
diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c
index cfae9c71fb74..33c4d8349f95 100644
--- a/arch/arm/mach-bcm/platsmp.c
+++ b/arch/arm/mach-bcm/platsmp.c
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <linux/jiffies.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
 
@@ -255,6 +256,57 @@ static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle)
         return -ENXIO;
 }
 
+/* Cluster Dormant Control command to bring CPU into a running state */
+#define CDC_CMD                 6
+#define CDC_CMD_OFFSET          0
+#define CDC_CMD_REG(cpu)        (CDC_CMD_OFFSET + 4*(cpu))
+
+/*
+ * BCM23550 has a Cluster Dormant Control block that keeps the core in
+ * idle state. A command needs to be sent to the block to bring the CPU
+ * into running state.
+ */
+static int bcm23550_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+        void __iomem *cdc_base;
+        struct device_node *dn;
+        char *name;
+        int ret;
+
+        /* Make sure a CDC node exists before booting the
+         * secondary core.
+         */
+        name = "brcm,bcm23550-cdc";
+        dn = of_find_compatible_node(NULL, NULL, name);
+        if (!dn) {
+                pr_err("unable to find cdc node\n");
+                return -ENODEV;
+        }
+
+        cdc_base = of_iomap(dn, 0);
+        of_node_put(dn);
+
+        if (!cdc_base) {
+                pr_err("unable to remap cdc base register\n");
+                return -ENOMEM;
+        }
+
+        /* Boot the secondary core */
+        ret = kona_boot_secondary(cpu, idle);
+        if (ret)
+                goto out;
+
+        /* Bring this CPU to RUN state so that nIRQ nFIQ
+         * signals are unblocked.
+         */
+        writel_relaxed(CDC_CMD, cdc_base + CDC_CMD_REG(cpu));
+
+out:
+        iounmap(cdc_base);
+
+        return ret;
+}
+
 static int nsp_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         int ret;
@@ -283,6 +335,12 @@ static const struct smp_operations bcm_smp_ops __initconst = {
 CPU_METHOD_OF_DECLARE(bcm_smp_bcm281xx, "brcm,bcm11351-cpu-method",
                         &bcm_smp_ops);
 
+static const struct smp_operations bcm23550_smp_ops __initconst = {
+        .smp_boot_secondary     = bcm23550_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(bcm_smp_bcm23550, "brcm,bcm23550",
+                        &bcm23550_smp_ops);
+
 static const struct smp_operations nsp_smp_ops __initconst = {
         .smp_prepare_cpus       = bcm_smp_prepare_cpus,
         .smp_boot_secondary     = nsp_boot_secondary,