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authorChris Brand <chris.brand@broadcom.com>2016-05-11 17:36:18 -0400
committerFlorian Fainelli <f.fainelli@gmail.com>2016-06-06 14:47:22 -0400
commit406c8f6c9954da1a521f2cb7efbee730e40b95b9 (patch)
tree4a3b285cd7fb08b63e468137d41abbbe8cfd0bb5 /arch/arm/mach-bcm
parent1a695a905c18548062509178b98bc91e67510864 (diff)
ARM: bcm21664: Remove reset code
The kona reset driver now provides this functionality. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/mach-bcm')
-rw-r--r--arch/arm/mach-bcm/board_bcm21664.c42
1 files changed, 0 insertions, 42 deletions
diff --git a/arch/arm/mach-bcm/board_bcm21664.c b/arch/arm/mach-bcm/board_bcm21664.c
index 82ad5687771f..65b3db06e57a 100644
--- a/arch/arm/mach-bcm/board_bcm21664.c
+++ b/arch/arm/mach-bcm/board_bcm21664.c
@@ -11,53 +11,12 @@
11 * GNU General Public License for more details. 11 * GNU General Public License for more details.
12 */ 12 */
13 13
14#include <linux/of_address.h>
15#include <linux/of_platform.h> 14#include <linux/of_platform.h>
16#include <linux/io.h>
17 15
18#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
19 17
20#include "kona_l2_cache.h" 18#include "kona_l2_cache.h"
21 19
22#define RSTMGR_DT_STRING "brcm,bcm21664-resetmgr"
23
24#define RSTMGR_REG_WR_ACCESS_OFFSET 0
25#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4
26
27#define RSTMGR_WR_PASSWORD 0xa5a5
28#define RSTMGR_WR_PASSWORD_SHIFT 8
29#define RSTMGR_WR_ACCESS_ENABLE 1
30
31static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
32{
33 void __iomem *base;
34 struct device_node *resetmgr;
35
36 resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
37 if (!resetmgr) {
38 pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
39 return;
40 }
41 base = of_iomap(resetmgr, 0);
42 if (!base) {
43 pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
44 return;
45 }
46
47 /*
48 * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
49 * register. To write to that register we must first write the password
50 * and the enable bit in the write access enable register.
51 */
52 writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
53 RSTMGR_WR_ACCESS_ENABLE,
54 base + RSTMGR_REG_WR_ACCESS_OFFSET);
55 writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
56
57 /* Wait for reset */
58 while (1);
59}
60
61static void __init bcm21664_init(void) 20static void __init bcm21664_init(void)
62{ 21{
63 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 22 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -71,6 +30,5 @@ static const char * const bcm21664_dt_compat[] = {
71 30
72DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor") 31DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor")
73 .init_machine = bcm21664_init, 32 .init_machine = bcm21664_init,
74 .restart = bcm21664_restart,
75 .dt_compat = bcm21664_dt_compat, 33 .dt_compat = bcm21664_dt_compat,
76MACHINE_END 34MACHINE_END