diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-08-08 14:14:29 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-08-08 14:14:29 -0400 |
commit | b3345d7c57d70e6cb6749af25cdbe80515582e99 (patch) | |
tree | 04cce706bc7e944ad1fb257108a8ae735948f97f /arch/arm/lib | |
parent | 44c916d58b9ef1f2c4aec2def57fa8289c716a60 (diff) | |
parent | c2fff85e21818952aa0ee5778926beee6c03e579 (diff) |
Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson:
"This is the bulk of new SoC enablement and other platform changes for
3.17:
- Samsung S5PV210 has been converted to DT and multiplatform
- Clock drivers and bindings for some of the lower-end i.MX 1/2
platforms
- Kirkwood, one of the popular Marvell platforms, is folded into the
mvebu platform code, removing mach-kirkwood
- Hwmod data for TI AM43xx and DRA7 platforms
- More additions of Renesas shmobile platform support
- Removal of plat-samsung contents that can be removed with S5PV210
being multiplatform/DT-enabled and the other two old platforms
being removed
New platforms (most with only basic support right now):
- Hisilicon X5HD2 settop box chipset is introduced
- Mediatek MT6589 (mobile chipset) is introduced
- Broadcom BCM7xxx settop box chipset is introduced
+ as usual a lot other pieces all over the platform code"
* tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits)
ARM: hisi: remove smp from machine descriptor
power: reset: move hisilicon reboot code
ARM: dts: Add hix5hd2-dkb dts file.
ARM: debug: Rename Hi3716 to HIX5HD2
ARM: hisi: enable hix5hd2 SoC
ARM: hisi: add ARCH_HISI
MAINTAINERS: add entry for Broadcom ARM STB architecture
ARM: brcmstb: select GISB arbiter and interrupt drivers
ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
ARM: configs: enable SMP in bcm_defconfig
ARM: add SMP support for Broadcom mobile SoCs
Documentation: arm: misc updates to Marvell EBU SoC status
Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
ARM: mvebu: fix build without platforms selected
ARM: mvebu: add cpuidle support for Armada 38x
ARM: mvebu: add cpuidle support for Armada 370
cpuidle: mvebu: add Armada 38x support
cpuidle: mvebu: add Armada 370 support
cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
ARM: mvebu: export the SCU address
...
Diffstat (limited to 'arch/arm/lib')
-rw-r--r-- | arch/arm/lib/delay.c | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c index 5306de350133..312d43eb686a 100644 --- a/arch/arm/lib/delay.c +++ b/arch/arm/lib/delay.c | |||
@@ -19,6 +19,7 @@ | |||
19 | * Author: Will Deacon <will.deacon@arm.com> | 19 | * Author: Will Deacon <will.deacon@arm.com> |
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include <linux/clocksource.h> | ||
22 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
23 | #include <linux/init.h> | 24 | #include <linux/init.h> |
24 | #include <linux/kernel.h> | 25 | #include <linux/kernel.h> |
@@ -36,6 +37,7 @@ struct arm_delay_ops arm_delay_ops = { | |||
36 | 37 | ||
37 | static const struct delay_timer *delay_timer; | 38 | static const struct delay_timer *delay_timer; |
38 | static bool delay_calibrated; | 39 | static bool delay_calibrated; |
40 | static u64 delay_res; | ||
39 | 41 | ||
40 | int read_current_timer(unsigned long *timer_val) | 42 | int read_current_timer(unsigned long *timer_val) |
41 | { | 43 | { |
@@ -47,6 +49,11 @@ int read_current_timer(unsigned long *timer_val) | |||
47 | } | 49 | } |
48 | EXPORT_SYMBOL_GPL(read_current_timer); | 50 | EXPORT_SYMBOL_GPL(read_current_timer); |
49 | 51 | ||
52 | static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) | ||
53 | { | ||
54 | return (cyc * mult) >> shift; | ||
55 | } | ||
56 | |||
50 | static void __timer_delay(unsigned long cycles) | 57 | static void __timer_delay(unsigned long cycles) |
51 | { | 58 | { |
52 | cycles_t start = get_cycles(); | 59 | cycles_t start = get_cycles(); |
@@ -69,18 +76,24 @@ static void __timer_udelay(unsigned long usecs) | |||
69 | 76 | ||
70 | void __init register_current_timer_delay(const struct delay_timer *timer) | 77 | void __init register_current_timer_delay(const struct delay_timer *timer) |
71 | { | 78 | { |
72 | if (!delay_calibrated) { | 79 | u32 new_mult, new_shift; |
73 | pr_info("Switching to timer-based delay loop\n"); | 80 | u64 res; |
81 | |||
82 | clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq, | ||
83 | NSEC_PER_SEC, 3600); | ||
84 | res = cyc_to_ns(1ULL, new_mult, new_shift); | ||
85 | |||
86 | if (!delay_calibrated && (!delay_res || (res < delay_res))) { | ||
87 | pr_info("Switching to timer-based delay loop, resolution %lluns\n", res); | ||
74 | delay_timer = timer; | 88 | delay_timer = timer; |
75 | lpj_fine = timer->freq / HZ; | 89 | lpj_fine = timer->freq / HZ; |
90 | delay_res = res; | ||
76 | 91 | ||
77 | /* cpufreq may scale loops_per_jiffy, so keep a private copy */ | 92 | /* cpufreq may scale loops_per_jiffy, so keep a private copy */ |
78 | arm_delay_ops.ticks_per_jiffy = lpj_fine; | 93 | arm_delay_ops.ticks_per_jiffy = lpj_fine; |
79 | arm_delay_ops.delay = __timer_delay; | 94 | arm_delay_ops.delay = __timer_delay; |
80 | arm_delay_ops.const_udelay = __timer_const_udelay; | 95 | arm_delay_ops.const_udelay = __timer_const_udelay; |
81 | arm_delay_ops.udelay = __timer_udelay; | 96 | arm_delay_ops.udelay = __timer_udelay; |
82 | |||
83 | delay_calibrated = true; | ||
84 | } else { | 97 | } else { |
85 | pr_info("Ignoring duplicate/late registration of read_current_timer delay\n"); | 98 | pr_info("Ignoring duplicate/late registration of read_current_timer delay\n"); |
86 | } | 99 | } |
@@ -91,3 +104,8 @@ unsigned long calibrate_delay_is_known(void) | |||
91 | delay_calibrated = true; | 104 | delay_calibrated = true; |
92 | return lpj_fine; | 105 | return lpj_fine; |
93 | } | 106 | } |
107 | |||
108 | void calibration_delay_done(void) | ||
109 | { | ||
110 | delay_calibrated = true; | ||
111 | } | ||