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path: root/arch/x86/kernel/setup.c
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/*
 *  Copyright (C) 1995  Linus Torvalds
 *
 *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
 *
 *  Memory region support
 *	David Parsons <orc@pell.chi.il.us>, July-August 1999
 *
 *  Added E820 sanitization routine (removes overlapping memory regions);
 *  Brian Moyle <bmoyle@mvista.com>, February 2001
 *
 * Moved CPU detection code to cpu/${cpu}.c
 *    Patrick Mochel <mochel@osdl.org>, March 2002
 *
 *  Provisions for empty E820 memory regions (reported by certain BIOSes).
 *  Alex Achenbach <xela@slit.de>, December 2002.
 *
 */

/*
 * This file handles the architecture-dependent parts of initialization
 */

#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/mmzone.h>
#include <linux/screen_info.h>
#include <linux/ioport.h>
#include <linux/acpi.h>
#include <linux/apm_bios.h>
#include <linux/initrd.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/console.h>
#include <linux/mca.h>
#include <linux/root_dev.h>
#include <linux/highmem.h>
#include <linux/module.h>
#include <linux/efi.h>
#include <linux/init.h>
#include <linux/edd.h>
#include <linux/iscsi_ibft.h>
#include <linux/nodemask.h>
#include <linux/kexec.h>
#include <linux/dmi.h>
#include <linux/pfn.h>
#include <linux/pci.h>
#include <asm/pci-direct.h>
#include <linux/init_ohci1394_dma.h>
#include <linux/kvm_para.h>

#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/delay.h>

#include <linux/kallsyms.h>
#include <linux/cpufreq.h>
#include <linux/dma-mapping.h>
#include <linux/ctype.h>
#include <linux/uaccess.h>

#include <linux/percpu.h>
#include <linux/crash_dump.h>

#include <video/edid.h>

#include <asm/mtrr.h>
#include <asm/apic.h>
#include <asm/e820.h>
#include <asm/mpspec.h>
#include <asm/setup.h>
#include <asm/arch_hooks.h>
#include <asm/efi.h>
#include <asm/sections.h>
#include <asm/dmi.h>
#include <asm/io_apic.h>
#include <asm/ist.h>
#include <asm/vmi.h>
#include <setup_arch.h>
#include <asm/bios_ebda.h>
#include <asm/cacheflush.h>
#include <asm/processor.h>
#include <asm/bugs.h>

#include <asm/system.h>
#include <asm/vsyscall.h>
#include <asm/smp.h>
#include <asm/desc.h>
#include <asm/dma.h>
#include <asm/iommu.h>
#include <asm/mmu_context.h>
#include <asm/proto.h>

#include <mach_apic.h>
#include <asm/paravirt.h>

#include <asm/percpu.h>
#include <asm/topology.h>
#include <asm/apicdef.h>
#ifdef CONFIG_X86_64
#include <asm/numa_64.h>
#endif

#ifndef ARCH_SETUP
#define ARCH_SETUP
#endif

#ifndef CONFIG_DEBUG_BOOT_PARAMS
struct boot_params __initdata boot_params;
#else
struct boot_params boot_params;
#endif

/*
 * Machine setup..
 */
static struct resource data_resource = {
	.name	= "Kernel data",
	.start	= 0,
	.end	= 0,
	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
};

static struct resource code_resource = {
	.name	= "Kernel code",
	.start	= 0,
	.end	= 0,
	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
};

static struct resource bss_resource = {
	.name	= "Kernel bss",
	.start	= 0,
	.end	= 0,
	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
};


#ifdef CONFIG_X86_32
/* This value is set up by the early boot code to point to the value
   immediately after the boot time page tables.  It contains a *physical*
   address, and must not be in the .bss segment! */
unsigned long init_pg_tables_start __initdata = ~0UL;
unsigned long init_pg_tables_end __initdata = ~0UL;

static struct resource video_ram_resource = {
	.name	= "Video RAM area",
	.start	= 0xa0000,
	.end	= 0xbffff,
	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
};

/* cpu data as detected by the assembly code in head.S */
struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1};
/* common cpu data for all cpus */
struct cpuinfo_x86 boot_cpu_data __read_mostly = {0, 0, 0, 0, -1, 1, 0, 0, -1};
EXPORT_SYMBOL(boot_cpu_data);
static void set_mca_bus(int x)
{
#ifdef CONFIG_MCA
	MCA_bus = x;
#endif
}

unsigned int def_to_bigsmp;

/* for MCA, but anyone else can use it if they want */
unsigned int machine_id;
unsigned int machine_submodel_id;
unsigned int BIOS_revision;

struct apm_info apm_info;
EXPORT_SYMBOL(apm_info);

#if defined(CONFIG_X86_SPEEDSTEP_SMI) || \
	defined(CONFIG_X86_SPEEDSTEP_SMI_MODULE)
struct ist_info ist_info;
EXPORT_SYMBOL(ist_info);
#else
struct ist_info ist_info;
#endif

#else
struct cpuinfo_x86 boot_cpu_data __read_mostly;
EXPORT_SYMBOL(boot_cpu_data);
#endif


#if !defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
unsigned long mmu_cr4_features;
#else
unsigned long mmu_cr4_features = X86_CR4_PAE;
#endif

/* Boot loader ID as an integer, for the benefit of proc_dointvec */
int bootloader_type;

/*
 * Early DMI memory
 */
int dmi_alloc_index;
char dmi_alloc_data[DMI_MAX_DATA];

/*
 * Setup options
 */
struct screen_info screen_info;
EXPORT_SYMBOL(screen_info);
struct edid_info edid_info;
EXPORT_SYMBOL_GPL(edid_info);

extern int root_mountflags;

unsigned long saved_video_mode;

#define RAMDISK_IMAGE_START_MASK	0x07FF
#define RAMDISK_PROMPT_FLAG		0x8000
#define RAMDISK_LOAD_FLAG		0x4000

static char __initdata command_line[COMMAND_LINE_SIZE];
#ifdef CONFIG_CMDLINE_BOOL
static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
#endif

#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
struct edd edd;
#ifdef CONFIG_EDD_MODULE
EXPORT_SYMBOL(edd);
#endif
/**
 * copy_edd() - Copy the BIOS EDD information
 *              from boot_params into a safe place.
 *
 */
static inline void copy_edd(void)
{
     memcpy(edd.mbr_signature, boot_params.edd_mbr_sig_buffer,
	    sizeof(edd.mbr_signature));
     memcpy(edd.edd_info, boot_params.eddbuf, sizeof(edd.edd_info));
     edd.mbr_signature_nr = boot_params.edd_mbr_sig_buf_entries;
     edd.edd_info_nr = boot_params.eddbuf_entries;
}
#else
static inline void copy_edd(void)
{
}
#endif

#ifdef CONFIG_BLK_DEV_INITRD

#ifdef CONFIG_X86_32

#define MAX_MAP_CHUNK	(NR_FIX_BTMAPS << PAGE_SHIFT)
static void __init relocate_initrd(void)
{

	u64 ramdisk_image = boot_params.hdr.ramdisk_image;
	u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
	u64 end_of_lowmem = max_low_pfn << PAGE_SHIFT;
	u64 ramdisk_here;
	unsigned long slop, clen, mapaddr;
	char *p, *q;

	/* We need to move the initrd down into lowmem */
	ramdisk_here = find_e820_area(0, end_of_lowmem, ramdisk_size,
					 PAGE_SIZE);

	if (ramdisk_here == -1ULL)
		panic("Cannot find place for new RAMDISK of size %lld\n",
			 ramdisk_size);

	/* Note: this includes all the lowmem currently occupied by
	   the initrd, we rely on that fact to keep the data intact. */
	reserve_early(ramdisk_here, ramdisk_here + ramdisk_size,
			 "NEW RAMDISK");
	initrd_start = ramdisk_here + PAGE_OFFSET;
	initrd_end   = initrd_start + ramdisk_size;
	printk(KERN_INFO "Allocated new RAMDISK: %08llx - %08llx\n",
			 ramdisk_here, ramdisk_here + ramdisk_size);

	q = (char *)initrd_start;

	/* Copy any lowmem portion of the initrd */
	if (ramdisk_image < end_of_lowmem) {
		clen = end_of_lowmem - ramdisk_image;
		p = (char *)__va(ramdisk_image);
		memcpy(q, p, clen);
		q += clen;
		ramdisk_image += clen;
		ramdisk_size  -= clen;
	}

	/* Copy the highmem portion of the initrd */
	while (ramdisk_size) {
		slop = ramdisk_image & ~PAGE_MASK;
		clen = ramdisk_size;
		if (clen > MAX_MAP_CHUNK-slop)
			clen = MAX_MAP_CHUNK-slop;
		mapaddr = ramdisk_image & PAGE_MASK;
		p = early_memremap(mapaddr, clen+slop);
		memcpy(q, p+slop, clen);
		early_iounmap(p, clen+slop);
		q += clen;
		ramdisk_image += clen;
		ramdisk_size  -= clen;
	}
	/* high pages is not converted by early_res_to_bootmem */
	ramdisk_image = boot_params.hdr.ramdisk_image;
	ramdisk_size  = boot_params.hdr.ramdisk_size;
	printk(KERN_INFO "Move RAMDISK from %016llx - %016llx to"
		" %08llx - %08llx\n",
		ramdisk_image, ramdisk_image + ramdisk_size - 1,
		ramdisk_here, ramdisk_here + ramdisk_size - 1);
}
#endif

static void __init reserve_initrd(void)
{
	u64 ramdisk_image = boot_params.hdr.ramdisk_image;
	u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
	u64 ramdisk_end   = ramdisk_image + ramdisk_size;
	u64 end_of_lowmem = max_low_pfn << PAGE_SHIFT;

	if (!boot_params.hdr.type_of_loader ||
	    !ramdisk_image || !ramdisk_size)
		return;		/* No initrd provided by bootloader */

	initrd_start = 0;

	if (ramdisk_size >= (end_of_lowmem>>1)) {
		free_early(ramdisk_image, ramdisk_end);
		printk(KERN_ERR "initrd too large to handle, "
		       "disabling initrd\n");
		return;
	}

	printk(KERN_INFO "RAMDISK: %08llx - %08llx\n", ramdisk_image,
			ramdisk_end);


	if (ramdisk_end <= end_of_lowmem) {
		/* All in lowmem, easy case */
		/*
		 * don't need to reserve again, already reserved early
		 * in i386_start_kernel
		 */
		initrd_start = ramdisk_image + PAGE_OFFSET;
		initrd_end = initrd_start + ramdisk_size;
		return;
	}

#ifdef CONFIG_X86_32
	relocate_initrd();
#else
	printk(KERN_ERR "initrd extends beyond end of memory "
	       "(0x%08llx > 0x%08llx)\ndisabling initrd\n",
	       ramdisk_end, end_of_lowmem);
	initrd_start = 0;
#endif
	free_early(ramdisk_image, ramdisk_end);
}
#else
static void __init reserve_initrd(void)
{
}
#endif /* CONFIG_BLK_DEV_INITRD */

static void __init parse_setup_data(void)
{
	struct setup_data *data;
	u64 pa_data;

	if (boot_params.hdr.version < 0x0209)
		return;
	pa_data = boot_params.hdr.setup_data;
	while (pa_data) {
		data = early_memremap(pa_data, PAGE_SIZE);
		switch (data->type) {
		case SETUP_E820_EXT:
			parse_e820_ext(data, pa_data);
			break;
		default:
			break;
		}
		pa_data = data->next;
		early_iounmap(data, PAGE_SIZE);
	}
}

static void __init e820_reserve_setup_data(void)
{
	struct setup_data *data;
	u64 pa_data;
	int found = 0;

	if (boot_params.hdr.version < 0x0209)
		return;
	pa_data = boot_params.hdr.setup_data;
	while (pa_data) {
		data = early_memremap(pa_data, sizeof(*data));
		e820_update_range(pa_data, sizeof(*data)+data->len,
			 E820_RAM, E820_RESERVED_KERN);
		found = 1;
		pa_data = data->next;
		early_iounmap(data, sizeof(*data));
	}
	if (!found)
		return;

	sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
	memcpy(&e820_saved, &e820, sizeof(struct e820map));
	printk(KERN_INFO "extended physical RAM map:\n");
	e820_print_map("reserve setup_data");
}

static void __init reserve_early_setup_data(void)
{
	struct setup_data *data;
	u64 pa_data;
	char buf[32];

	if (boot_params.hdr.version < 0x0209)
		return;
	pa_data = boot_params.hdr.setup_data;
	while (pa_data) {
		data = early_memremap(pa_data, sizeof(*data));
		sprintf(buf, "setup data %x", data->type);
		reserve_early(pa_data, pa_data+sizeof(*data)+data->len, buf);
		pa_data = data->next;
		early_iounmap(data, sizeof(*data));
	}
}

/*
 * --------- Crashkernel reservation ------------------------------
 */

#ifdef CONFIG_KEXEC

/**
 * Reserve @size bytes of crashkernel memory at any suitable offset.
 *
 * @size: Size of the crashkernel memory to reserve.
 * Returns the base address on success, and -1ULL on failure.
 */
unsigned long long __init find_and_reserve_crashkernel(unsigned long long size)
{
	const unsigned long long alignment = 16<<20; 	/* 16M */
	unsigned long long start = 0LL;

	while (1) {
		int ret;

		start = find_e820_area(start, ULONG_MAX, size, alignment);
		if (start == -1ULL)
			return start;

		/* try to reserve it */
		ret = reserve_bootmem_generic(start, size, BOOTMEM_EXCLUSIVE);
		if (ret >= 0)
			return start;

		start += alignment;
	}
}

static inline unsigned long long get_total_mem(void)
{
	unsigned long long total;

	total = max_low_pfn - min_low_pfn;
#ifdef CONFIG_HIGHMEM
	total += highend_pfn - highstart_pfn;
#endif

	return total << PAGE_SHIFT;
}

static void __init reserve_crashkernel(void)
{
	unsigned long long total_mem;
	unsigned long long crash_size, crash_base;
	int ret;

	total_mem = get_total_mem();

	ret = parse_crashkernel(boot_command_line, total_mem,
			&crash_size, &crash_base);
	if (ret != 0 || crash_size <= 0)
		return;

	/* 0 means: find the address automatically */
	if (crash_base <= 0) {
		crash_base = find_and_reserve_crashkernel(crash_size);
		if (crash_base == -1ULL) {
			pr_info("crashkernel reservation failed. "
				"No suitable area found.\n");
			return;
		}
	} else {
		ret = reserve_bootmem_generic(crash_base, crash_size,
					BOOTMEM_EXCLUSIVE);
		if (ret < 0) {
			pr_info("crashkernel reservation failed - "
				"memory is in use\n");
			return;
		}
	}

	printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
			"for crashkernel (System RAM: %ldMB)\n",
			(unsigned long)(crash_size >> 20),
			(unsigned long)(crash_base >> 20),
			(unsigned long)(total_mem >> 20));

	crashk_res.start = crash_base;
	crashk_res.end   = crash_base + crash_size - 1;
	insert_resource(&iomem_resource, &crashk_res);
}
#else
static void __init reserve_crashkernel(void)
{
}
#endif

static struct resource standard_io_resources[] = {
	{ .name = "dma1", .start = 0x00, .end = 0x1f,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "pic1", .start = 0x20, .end = 0x21,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "timer0", .start = 0x40, .end = 0x43,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "timer1", .start = 0x50, .end = 0x53,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "keyboard", .start = 0x60, .end = 0x60,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "keyboard", .start = 0x64, .end = 0x64,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "dma page reg", .start = 0x80, .end = 0x8f,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "pic2", .start = 0xa0, .end = 0xa1,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "dma2", .start = 0xc0, .end = 0xdf,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO },
	{ .name = "fpu", .start = 0xf0, .end = 0xff,
		.flags = IORESOURCE_BUSY | IORESOURCE_IO }
};

static void __init reserve_standard_io_resources(void)
{
	int i;

	/* request I/O space for devices used on all i[345]86 PCs */
	for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
		request_resource(&ioport_resource, &standard_io_resources[i]);

}

/*
 * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
 * is_kdump_kernel() to determine if we are booting after a panic. Hence
 * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
 */

#ifdef CONFIG_CRASH_DUMP
/* elfcorehdr= specifies the location of elf core header
 * stored by the crashed kernel. This option will be passed
 * by kexec loader to the capture kernel.
 */
static int __init setup_elfcorehdr(char *arg)
{
	char *end;
	if (!arg)
		return -EINVAL;
	elfcorehdr_addr = memparse(arg, &end);
	return end > arg ? 0 : -EINVAL;
}
early_param("elfcorehdr", setup_elfcorehdr);
#endif

static struct x86_quirks default_x86_quirks __initdata;

struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;

/*
 * Some BIOSes seem to corrupt the low 64k of memory during events
 * like suspend/resume and unplugging an HDMI cable.  Reserve all
 * remaining free memory in that area and fill it with a distinct
 * pattern.
 */
#ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
#define MAX_SCAN_AREAS	8

static int __read_mostly memory_corruption_check = -1;

static unsigned __read_mostly corruption_check_size = 64*1024;
static unsigned __read_mostly corruption_check_period = 60; /* seconds */

static struct e820entry scan_areas[MAX_SCAN_AREAS];
static int num_scan_areas;


static int set_corruption_check(char *arg)
{
	char *end;

	memory_corruption_check = simple_strtol(arg, &end, 10);

	return (*end == 0) ? 0 : -EINVAL;
}
early_param("memory_corruption_check", set_corruption_check);

static int set_corruption_check_period(char *arg)
{
	char *end;

	corruption_check_period = simple_strtoul(arg, &end, 10);

	return (*end == 0) ? 0 : -EINVAL;
}
early_param("memory_corruption_check_period", set_corruption_check_period);

static int set_corruption_check_size(char *arg)
{
	char *end;
	unsigned size;

	size = memparse(arg, &end);

	if (*end == '\0')
		corruption_check_size = size;

	return (size == corruption_check_size) ? 0 : -EINVAL;
}
early_param("memory_corruption_check_size", set_corruption_check_size);


static void __init setup_bios_corruption_check(void)
{
	u64 addr = PAGE_SIZE;	/* assume first page is reserved anyway */

	if (memory_corruption_check == -1) {
		memory_corruption_check =
#ifdef CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
			1
#else
			0
#endif
			;
	}

	if (corruption_check_size == 0)
		memory_corruption_check = 0;

	if (!memory_corruption_check)
		return;

	corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);

	while(addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
		u64 size;
		addr = find_e820_area_size(addr, &size, PAGE_SIZE);

		if (addr == 0)
			break;

		if ((addr + size) > corruption_check_size)
			size = corruption_check_size - addr;

		if (size == 0)
			break;

		e820_update_range(addr, size, E820_RAM, E820_RESERVED);
		scan_areas[num_scan_areas].addr = addr;
		scan_areas[num_scan_areas].size = size;
		num_scan_areas++;

		/* Assume we've already mapped this early memory */
		memset(__va(addr), 0, size);

		addr += size;
	}

	printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
	       num_scan_areas);
	update_e820();
}

static struct timer_list periodic_check_timer;

void check_for_bios_corruption(void)
{
	int i;
	int corruption = 0;

	if (!memory_corruption_check)
		return;

	for(i = 0; i < num_scan_areas; i++) {
		unsigned long *addr = __va(scan_areas[i].addr);
		unsigned long size = scan_areas[i].size;

		for(; size; addr++, size -= sizeof(unsigned long)) {
			if (!*addr)
				continue;
			printk(KERN_ERR "Corrupted low memory at %p (%lx phys) = %08lx\n",
			       addr, __pa(addr), *addr);
			corruption = 1;
			*addr = 0;
		}
	}

	WARN(corruption, KERN_ERR "Memory corruption detected in low memory\n");
}

static void periodic_check_for_corruption(unsigned long data)
{
	check_for_bios_corruption();
	mod_timer(&periodic_check_timer, round_jiffies(jiffies + corruption_check_period*HZ));
}

void start_periodic_check_for_corruption(void)
{
	if (!memory_corruption_check || corruption_check_period == 0)
		return;

	printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
	       corruption_check_period);

	init_timer(&periodic_check_timer);
	periodic_check_timer.function = &periodic_check_for_corruption;
	periodic_check_for_corruption(0);
}
#endif

static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
{
	printk(KERN_NOTICE
		"%s detected: BIOS may corrupt low RAM, working it around.\n",
		d->ident);

	e820_update_range(0, 0x10000, E820_RAM, E820_RESERVED);
	sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);

	return 0;
}

/* List of systems that have known low memory corruption BIOS problems */
static struct dmi_system_id __initdata bad_bios_dmi_table[] = {
#ifdef CONFIG_X86_RESERVE_LOW_64K
	{
		.callback = dmi_low_memory_corruption,
		.ident = "AMI BIOS",
		.matches = {
			DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
		},
	},
	{
		.callback = dmi_low_memory_corruption,
		.ident = "Phoenix BIOS",
		.matches = {
			DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies"),
		},
	},
#endif
	{}
};

/*
 * Determine if we were loaded by an EFI loader.  If so, then we have also been
 * passed the efi memmap, systab, etc., so we should use these data structures
 * for initialization.  Note, the efi init code path is determined by the
 * global efi_enabled. This allows the same kernel image to be used on existing
 * systems (with a traditional BIOS) as well as on EFI systems.
 */
/*
 * setup_arch - architecture-specific boot-time initializations
 *
 * Note: On x86_64, fixmaps are ready for use even before this is called.
 */

void __init setup_arch(char **cmdline_p)
{
#ifdef CONFIG_X86_32
	memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
	visws_early_detect();
	pre_setup_arch_hook();
#else
	printk(KERN_INFO "Command line: %s\n", boot_command_line);
#endif

	early_cpu_init();
	early_ioremap_init();

	ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev);
	screen_info = boot_params.screen_info;
	edid_info = boot_params.edid_info;
#ifdef CONFIG_X86_32
	apm_info.bios = boot_params.apm_bios_info;
	ist_info = boot_params.ist_info;
	if (boot_params.sys_desc_table.length != 0) {
		set_mca_bus(boot_params.sys_desc_table.table[3] & 0x2);
		machine_id = boot_params.sys_desc_table.table[0];
		machine_submodel_id = boot_params.sys_desc_table.table[1];
		BIOS_revision = boot_params.sys_desc_table.table[2];
	}
#endif
	saved_video_mode = boot_params.hdr.vid_mode;
	bootloader_type = boot_params.hdr.type_of_loader;

#ifdef CONFIG_BLK_DEV_RAM
	rd_image_start = boot_params.hdr.ram_size & RAMDISK_IMAGE_START_MASK;
	rd_prompt = ((boot_params.hdr.ram_size & RAMDISK_PROMPT_FLAG) != 0);
	rd_doload = ((boot_params.hdr.ram_size & RAMDISK_LOAD_FLAG) != 0);
#endif
#ifdef CONFIG_EFI
	if (!strncmp((char *)&boot_params.efi_info.efi_loader_signature,
#ifdef CONFIG_X86_32
		     "EL32",
#else
		     "EL64",
#endif
	 4)) {
		efi_enabled = 1;
		efi_reserve_early();
	}
#endif

	ARCH_SETUP

	setup_memory_map();
	parse_setup_data();
	/* update the e820_saved too */
	e820_reserve_setup_data();

	copy_edd();

	if (!boot_params.hdr.root_flags)
		root_mountflags &= ~MS_RDONLY;
	init_mm.start_code = (unsigned long) _text;
	init_mm.end_code = (unsigned long) _etext;
	init_mm.end_data = (unsigned long) _edata;
#ifdef CONFIG_X86_32
	init_mm.brk = init_pg_tables_end + PAGE_OFFSET;
#else
	init_mm.brk = (unsigned long) &_end;
#endif

	code_resource.start = virt_to_phys(_text);
	code_resource.end = virt_to_phys(_etext)-1;
	data_resource.start = virt_to_phys(_etext);
	data_resource.end = virt_to_phys(_edata)-1;
	bss_resource.start = virt_to_phys(&__bss_start);
	bss_resource.end = virt_to_phys(&__bss_stop)-1;

#ifdef CONFIG_CMDLINE_BOOL
#ifdef CONFIG_CMDLINE_OVERRIDE
	strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
#else
	if (builtin_cmdline[0]) {
		/* append boot loader cmdline to builtin */
		strlcat(builtin_cmdline, " ", COMMAND_LINE_SIZE);
		strlcat(builtin_cmdline, boot_command_line, COMMAND_LINE_SIZE);
		strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
	}
#endif
#endif

	strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
	*cmdline_p = command_line;

	parse_early_param();

#ifdef CONFIG_X86_64
	check_efer();
#endif

#if defined(CONFIG_VMI) && defined(CONFIG_X86_32)
	/*
	 * Must be before kernel pagetables are setup
	 * or fixmap area is touched.
	 */
	vmi_init();
#endif

	/* after early param, so could get panic from serial */
	reserve_early_setup_data();

	if (acpi_mps_check()) {
#ifdef CONFIG_X86_LOCAL_APIC
		disable_apic = 1;
#endif
		setup_clear_cpu_cap(X86_FEATURE_APIC);
	}

#ifdef CONFIG_PCI
	if (pci_early_dump_regs)
		early_dump_pci_devices();
#endif

	finish_e820_parsing();

	dmi_scan_machine();

	dmi_check_system(bad_bios_dmi_table);

#ifdef CONFIG_X86_32
	probe_roms();
#endif

	/* after parse_early_param, so could debug it */
	insert_resource(&iomem_resource, &code_resource);
	insert_resource(&iomem_resource, &data_resource);
	insert_resource(&iomem_resource, &bss_resource);

	if (efi_enabled)
		efi_init();

#ifdef CONFIG_X86_32
	if (ppro_with_ram_bug()) {
		e820_update_range(0x70000000ULL, 0x40000ULL, E820_RAM,
				  E820_RESERVED);
		sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
		printk(KERN_INFO "fixed physical RAM map:\n");
		e820_print_map("bad_ppro");
	}
#else
	early_gart_iommu_check();
#endif

	/*
	 * partially used pages are not usable - thus
	 * we are rounding upwards:
	 */
	max_pfn = e820_end_of_ram_pfn();

	/* preallocate 4k for mptable mpc */
	early_reserve_e820_mpc_new();
	/* update e820 for memory not covered by WB MTRRs */
	mtrr_bp_init();
	if (mtrr_trim_uncached_memory(max_pfn))
		max_pfn = e820_end_of_ram_pfn();

#ifdef CONFIG_X86_32
	/* max_low_pfn get updated here */
	find_low_pfn_range();
#else
	num_physpages = max_pfn;

 	if (cpu_has_x2apic)
 		check_x2apic();

	/* How many end-of-memory variables you have, grandma! */
	/* need this before calling reserve_initrd */
	if (max_pfn > (1UL<<(32 - PAGE_SHIFT)))
		max_low_pfn = e820_end_of_low_ram_pfn();
	else
		max_low_pfn = max_pfn;

	high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
#endif

#ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
	setup_bios_corruption_check();
#endif

	/* max_pfn_mapped is updated here */
	max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
	max_pfn_mapped = max_low_pfn_mapped;

#ifdef CONFIG_X86_64
	if (max_pfn > max_low_pfn) {
		max_pfn_mapped = init_memory_mapping(1UL<<32,
						     max_pfn<<PAGE_SHIFT);
		/* can we preseve max_low_pfn ?*/
		max_low_pfn = max_pfn;
	}
#endif

	/*
	 * NOTE: On x86-32, only from this point on, fixmaps are ready for use.
	 */

#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
	if (init_ohci1394_dma_early)
		init_ohci1394_dma_on_all_controllers();
#endif

	reserve_initrd();

#ifdef CONFIG_X86_64
	vsmp_init();
#endif

	io_delay_init();

	/*
	 * Parse the ACPI tables for possible boot-time SMP configuration.
	 */
	acpi_boot_table_init();

	early_acpi_boot_init();

#ifdef CONFIG_ACPI_NUMA
	/*
	 * Parse SRAT to discover nodes.
	 */
	acpi_numa_init();
#endif

	initmem_init(0, max_pfn);

#ifdef CONFIG_ACPI_SLEEP
	/*
	 * Reserve low memory region for sleep support.
	 */
	acpi_reserve_bootmem();
#endif
#ifdef CONFIG_X86_FIND_SMP_CONFIG
	/*
	 * Find and reserve possible boot-time SMP configuration:
	 */
	find_smp_config();
#endif
	reserve_crashkernel();

#ifdef CONFIG_X86_64
	/*
	 * dma32_reserve_bootmem() allocates bootmem which may conflict
	 * with the crashkernel command line, so do that after
	 * reserve_crashkernel()
	 */
	dma32_reserve_bootmem();
#endif

	reserve_ibft_region();

#ifdef CONFIG_KVM_CLOCK
	kvmclock_init();
#endif

	paravirt_pagetable_setup_start(swapper_pg_dir);
	paging_init();
	paravirt_pagetable_setup_done(swapper_pg_dir);
	paravirt_post_allocator_init();

#ifdef CONFIG_X86_64
	map_vsyscall();
#endif

#ifdef CONFIG_X86_GENERICARCH
	generic_apic_probe();
#endif

	early_quirks();

	/*
	 * Read APIC and some other early information from ACPI tables.
	 */
	acpi_boot_init();

#if defined(CONFIG_X86_MPPARSE) || defined(CONFIG_X86_VISWS)
	/*
	 * get boot-time SMP configuration:
	 */
	if (smp_found_config)
		get_smp_config();
#endif

	prefill_possible_map();

#ifdef CONFIG_X86_64
	init_cpu_to_node();
#endif

	init_apic_mappings();
	ioapic_init_mappings();

	/* need to wait for io_apic is mapped */
	nr_irqs = probe_nr_irqs();

	kvm_guest_init();

	e820_reserve_resources();
	e820_mark_nosave_regions(max_low_pfn);

#ifdef CONFIG_X86_32
	request_resource(&iomem_resource, &video_ram_resource);
#endif
	reserve_standard_io_resources();

	e820_setup_gap();

#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
	if (!efi_enabled || (efi_mem_type(0xa0000) != EFI_CONVENTIONAL_MEMORY))
		conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif
#endif
}


class="hl opt">)); if (op == BPF_MOD) { if (dstk) EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst)); else EMIT2(0x89, add_2reg(0xC0, dst, IA32_EDX)); } else { if (dstk) EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); else EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX)); } *pprog = prog; } /* * ALU operation (32 bit) * dst = dst (shift) src */ static inline void emit_ia32_shift_r(const u8 op, const u8 dst, const u8 src, bool dstk, bool sstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u8 dreg = dstk ? IA32_EAX : dst; u8 b2; if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); if (sstk) /* mov ecx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src)); else if (src != IA32_ECX) /* mov ecx,src */ EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX)); switch (op) { case BPF_LSH: b2 = 0xE0; break; case BPF_RSH: b2 = 0xE8; break; case BPF_ARSH: b2 = 0xF8; break; default: return; } EMIT2(0xD3, add_1reg(b2, dreg)); if (dstk) /* mov dword ptr [ebp+off],dreg */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst)); *pprog = prog; } /* * ALU operation (32 bit) * dst = dst (op) src */ static inline void emit_ia32_alu_r(const bool is64, const bool hi, const u8 op, const u8 dst, const u8 src, bool dstk, bool sstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u8 sreg = sstk ? IA32_EAX : src; u8 dreg = dstk ? IA32_EDX : dst; if (sstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src)); if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst)); switch (BPF_OP(op)) { /* dst = dst + src */ case BPF_ADD: if (hi && is64) EMIT2(0x11, add_2reg(0xC0, dreg, sreg)); else EMIT2(0x01, add_2reg(0xC0, dreg, sreg)); break; /* dst = dst - src */ case BPF_SUB: if (hi && is64) EMIT2(0x19, add_2reg(0xC0, dreg, sreg)); else EMIT2(0x29, add_2reg(0xC0, dreg, sreg)); break; /* dst = dst | src */ case BPF_OR: EMIT2(0x09, add_2reg(0xC0, dreg, sreg)); break; /* dst = dst & src */ case BPF_AND: EMIT2(0x21, add_2reg(0xC0, dreg, sreg)); break; /* dst = dst ^ src */ case BPF_XOR: EMIT2(0x31, add_2reg(0xC0, dreg, sreg)); break; } if (dstk) /* mov dword ptr [ebp+off],dreg */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst)); *pprog = prog; } /* ALU operation (64 bit) */ static inline void emit_ia32_alu_r64(const bool is64, const u8 op, const u8 dst[], const u8 src[], bool dstk, bool sstk, u8 **pprog) { u8 *prog = *pprog; emit_ia32_alu_r(is64, false, op, dst_lo, src_lo, dstk, sstk, &prog); if (is64) emit_ia32_alu_r(is64, true, op, dst_hi, src_hi, dstk, sstk, &prog); else emit_ia32_mov_i(dst_hi, 0, dstk, &prog); *pprog = prog; } /* * ALU operation (32 bit) * dst = dst (op) val */ static inline void emit_ia32_alu_i(const bool is64, const bool hi, const u8 op, const u8 dst, const s32 val, bool dstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u8 dreg = dstk ? IA32_EAX : dst; u8 sreg = IA32_EDX; if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); if (!is_imm8(val)) /* mov edx,imm32*/ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EDX), val); switch (op) { /* dst = dst + val */ case BPF_ADD: if (hi && is64) { if (is_imm8(val)) EMIT3(0x83, add_1reg(0xD0, dreg), val); else EMIT2(0x11, add_2reg(0xC0, dreg, sreg)); } else { if (is_imm8(val)) EMIT3(0x83, add_1reg(0xC0, dreg), val); else EMIT2(0x01, add_2reg(0xC0, dreg, sreg)); } break; /* dst = dst - val */ case BPF_SUB: if (hi && is64) { if (is_imm8(val)) EMIT3(0x83, add_1reg(0xD8, dreg), val); else EMIT2(0x19, add_2reg(0xC0, dreg, sreg)); } else { if (is_imm8(val)) EMIT3(0x83, add_1reg(0xE8, dreg), val); else EMIT2(0x29, add_2reg(0xC0, dreg, sreg)); } break; /* dst = dst | val */ case BPF_OR: if (is_imm8(val)) EMIT3(0x83, add_1reg(0xC8, dreg), val); else EMIT2(0x09, add_2reg(0xC0, dreg, sreg)); break; /* dst = dst & val */ case BPF_AND: if (is_imm8(val)) EMIT3(0x83, add_1reg(0xE0, dreg), val); else EMIT2(0x21, add_2reg(0xC0, dreg, sreg)); break; /* dst = dst ^ val */ case BPF_XOR: if (is_imm8(val)) EMIT3(0x83, add_1reg(0xF0, dreg), val); else EMIT2(0x31, add_2reg(0xC0, dreg, sreg)); break; case BPF_NEG: EMIT2(0xF7, add_1reg(0xD8, dreg)); break; } if (dstk) /* mov dword ptr [ebp+off],dreg */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst)); *pprog = prog; } /* ALU operation (64 bit) */ static inline void emit_ia32_alu_i64(const bool is64, const u8 op, const u8 dst[], const u32 val, bool dstk, u8 **pprog) { u8 *prog = *pprog; u32 hi = 0; if (is64 && (val & (1<<31))) hi = (u32)~0; emit_ia32_alu_i(is64, false, op, dst_lo, val, dstk, &prog); if (is64) emit_ia32_alu_i(is64, true, op, dst_hi, hi, dstk, &prog); else emit_ia32_mov_i(dst_hi, 0, dstk, &prog); *pprog = prog; } /* dst = ~dst (64 bit) */ static inline void emit_ia32_neg64(const u8 dst[], bool dstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } /* xor ecx,ecx */ EMIT2(0x31, add_2reg(0xC0, IA32_ECX, IA32_ECX)); /* sub dreg_lo,ecx */ EMIT2(0x2B, add_2reg(0xC0, dreg_lo, IA32_ECX)); /* mov dreg_lo,ecx */ EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX)); /* xor ecx,ecx */ EMIT2(0x31, add_2reg(0xC0, IA32_ECX, IA32_ECX)); /* sbb dreg_hi,ecx */ EMIT2(0x19, add_2reg(0xC0, dreg_hi, IA32_ECX)); /* mov dreg_hi,ecx */ EMIT2(0x89, add_2reg(0xC0, dreg_hi, IA32_ECX)); if (dstk) { /* mov dword ptr [ebp+off],dreg_lo */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],dreg_hi */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), STACK_VAR(dst_hi)); } *pprog = prog; } /* dst = dst << src */ static inline void emit_ia32_lsh_r64(const u8 dst[], const u8 src[], bool dstk, bool sstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; static int jmp_label1 = -1; static int jmp_label2 = -1; static int jmp_label3 = -1; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } if (sstk) /* mov ecx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); else /* mov ecx,src_lo */ EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX)); /* cmp ecx,32 */ EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32); /* Jumps when >= 32 */ if (is_imm8(jmp_label(jmp_label1, 2))) EMIT2(IA32_JAE, jmp_label(jmp_label1, 2)); else EMIT2_off32(0x0F, IA32_JAE + 0x10, jmp_label(jmp_label1, 6)); /* < 32 */ /* shl dreg_hi,cl */ EMIT2(0xD3, add_1reg(0xE0, dreg_hi)); /* mov ebx,dreg_lo */ EMIT2(0x8B, add_2reg(0xC0, dreg_lo, IA32_EBX)); /* shl dreg_lo,cl */ EMIT2(0xD3, add_1reg(0xE0, dreg_lo)); /* IA32_ECX = -IA32_ECX + 32 */ /* neg ecx */ EMIT2(0xF7, add_1reg(0xD8, IA32_ECX)); /* add ecx,32 */ EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 32); /* shr ebx,cl */ EMIT2(0xD3, add_1reg(0xE8, IA32_EBX)); /* or dreg_hi,ebx */ EMIT2(0x09, add_2reg(0xC0, dreg_hi, IA32_EBX)); /* goto out; */ if (is_imm8(jmp_label(jmp_label3, 2))) EMIT2(0xEB, jmp_label(jmp_label3, 2)); else EMIT1_off32(0xE9, jmp_label(jmp_label3, 5)); /* >= 32 */ if (jmp_label1 == -1) jmp_label1 = cnt; /* cmp ecx,64 */ EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 64); /* Jumps when >= 64 */ if (is_imm8(jmp_label(jmp_label2, 2))) EMIT2(IA32_JAE, jmp_label(jmp_label2, 2)); else EMIT2_off32(0x0F, IA32_JAE + 0x10, jmp_label(jmp_label2, 6)); /* >= 32 && < 64 */ /* sub ecx,32 */ EMIT3(0x83, add_1reg(0xE8, IA32_ECX), 32); /* shl dreg_lo,cl */ EMIT2(0xD3, add_1reg(0xE0, dreg_lo)); /* mov dreg_hi,dreg_lo */ EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo)); /* xor dreg_lo,dreg_lo */ EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); /* goto out; */ if (is_imm8(jmp_label(jmp_label3, 2))) EMIT2(0xEB, jmp_label(jmp_label3, 2)); else EMIT1_off32(0xE9, jmp_label(jmp_label3, 5)); /* >= 64 */ if (jmp_label2 == -1) jmp_label2 = cnt; /* xor dreg_lo,dreg_lo */ EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); /* xor dreg_hi,dreg_hi */ EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); if (jmp_label3 == -1) jmp_label3 = cnt; if (dstk) { /* mov dword ptr [ebp+off],dreg_lo */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],dreg_hi */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), STACK_VAR(dst_hi)); } /* out: */ *pprog = prog; } /* dst = dst >> src (signed)*/ static inline void emit_ia32_arsh_r64(const u8 dst[], const u8 src[], bool dstk, bool sstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; static int jmp_label1 = -1; static int jmp_label2 = -1; static int jmp_label3 = -1; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } if (sstk) /* mov ecx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); else /* mov ecx,src_lo */ EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX)); /* cmp ecx,32 */ EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32); /* Jumps when >= 32 */ if (is_imm8(jmp_label(jmp_label1, 2))) EMIT2(IA32_JAE, jmp_label(jmp_label1, 2)); else EMIT2_off32(0x0F, IA32_JAE + 0x10, jmp_label(jmp_label1, 6)); /* < 32 */ /* lshr dreg_lo,cl */ EMIT2(0xD3, add_1reg(0xE8, dreg_lo)); /* mov ebx,dreg_hi */ EMIT2(0x8B, add_2reg(0xC0, dreg_hi, IA32_EBX)); /* ashr dreg_hi,cl */ EMIT2(0xD3, add_1reg(0xF8, dreg_hi)); /* IA32_ECX = -IA32_ECX + 32 */ /* neg ecx */ EMIT2(0xF7, add_1reg(0xD8, IA32_ECX)); /* add ecx,32 */ EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 32); /* shl ebx,cl */ EMIT2(0xD3, add_1reg(0xE0, IA32_EBX)); /* or dreg_lo,ebx */ EMIT2(0x09, add_2reg(0xC0, dreg_lo, IA32_EBX)); /* goto out; */ if (is_imm8(jmp_label(jmp_label3, 2))) EMIT2(0xEB, jmp_label(jmp_label3, 2)); else EMIT1_off32(0xE9, jmp_label(jmp_label3, 5)); /* >= 32 */ if (jmp_label1 == -1) jmp_label1 = cnt; /* cmp ecx,64 */ EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 64); /* Jumps when >= 64 */ if (is_imm8(jmp_label(jmp_label2, 2))) EMIT2(IA32_JAE, jmp_label(jmp_label2, 2)); else EMIT2_off32(0x0F, IA32_JAE + 0x10, jmp_label(jmp_label2, 6)); /* >= 32 && < 64 */ /* sub ecx,32 */ EMIT3(0x83, add_1reg(0xE8, IA32_ECX), 32); /* ashr dreg_hi,cl */ EMIT2(0xD3, add_1reg(0xF8, dreg_hi)); /* mov dreg_lo,dreg_hi */ EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); /* ashr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31); /* goto out; */ if (is_imm8(jmp_label(jmp_label3, 2))) EMIT2(0xEB, jmp_label(jmp_label3, 2)); else EMIT1_off32(0xE9, jmp_label(jmp_label3, 5)); /* >= 64 */ if (jmp_label2 == -1) jmp_label2 = cnt; /* ashr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31); /* mov dreg_lo,dreg_hi */ EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); if (jmp_label3 == -1) jmp_label3 = cnt; if (dstk) { /* mov dword ptr [ebp+off],dreg_lo */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],dreg_hi */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), STACK_VAR(dst_hi)); } /* out: */ *pprog = prog; } /* dst = dst >> src */ static inline void emit_ia32_rsh_r64(const u8 dst[], const u8 src[], bool dstk, bool sstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; static int jmp_label1 = -1; static int jmp_label2 = -1; static int jmp_label3 = -1; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } if (sstk) /* mov ecx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); else /* mov ecx,src_lo */ EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX)); /* cmp ecx,32 */ EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32); /* Jumps when >= 32 */ if (is_imm8(jmp_label(jmp_label1, 2))) EMIT2(IA32_JAE, jmp_label(jmp_label1, 2)); else EMIT2_off32(0x0F, IA32_JAE + 0x10, jmp_label(jmp_label1, 6)); /* < 32 */ /* lshr dreg_lo,cl */ EMIT2(0xD3, add_1reg(0xE8, dreg_lo)); /* mov ebx,dreg_hi */ EMIT2(0x8B, add_2reg(0xC0, dreg_hi, IA32_EBX)); /* shr dreg_hi,cl */ EMIT2(0xD3, add_1reg(0xE8, dreg_hi)); /* IA32_ECX = -IA32_ECX + 32 */ /* neg ecx */ EMIT2(0xF7, add_1reg(0xD8, IA32_ECX)); /* add ecx,32 */ EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 32); /* shl ebx,cl */ EMIT2(0xD3, add_1reg(0xE0, IA32_EBX)); /* or dreg_lo,ebx */ EMIT2(0x09, add_2reg(0xC0, dreg_lo, IA32_EBX)); /* goto out; */ if (is_imm8(jmp_label(jmp_label3, 2))) EMIT2(0xEB, jmp_label(jmp_label3, 2)); else EMIT1_off32(0xE9, jmp_label(jmp_label3, 5)); /* >= 32 */ if (jmp_label1 == -1) jmp_label1 = cnt; /* cmp ecx,64 */ EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 64); /* Jumps when >= 64 */ if (is_imm8(jmp_label(jmp_label2, 2))) EMIT2(IA32_JAE, jmp_label(jmp_label2, 2)); else EMIT2_off32(0x0F, IA32_JAE + 0x10, jmp_label(jmp_label2, 6)); /* >= 32 && < 64 */ /* sub ecx,32 */ EMIT3(0x83, add_1reg(0xE8, IA32_ECX), 32); /* shr dreg_hi,cl */ EMIT2(0xD3, add_1reg(0xE8, dreg_hi)); /* mov dreg_lo,dreg_hi */ EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); /* xor dreg_hi,dreg_hi */ EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); /* goto out; */ if (is_imm8(jmp_label(jmp_label3, 2))) EMIT2(0xEB, jmp_label(jmp_label3, 2)); else EMIT1_off32(0xE9, jmp_label(jmp_label3, 5)); /* >= 64 */ if (jmp_label2 == -1) jmp_label2 = cnt; /* xor dreg_lo,dreg_lo */ EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); /* xor dreg_hi,dreg_hi */ EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); if (jmp_label3 == -1) jmp_label3 = cnt; if (dstk) { /* mov dword ptr [ebp+off],dreg_lo */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],dreg_hi */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), STACK_VAR(dst_hi)); } /* out: */ *pprog = prog; } /* dst = dst << val */ static inline void emit_ia32_lsh_i64(const u8 dst[], const u32 val, bool dstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } /* Do LSH operation */ if (val < 32) { /* shl dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xE0, dreg_hi), val); /* mov ebx,dreg_lo */ EMIT2(0x8B, add_2reg(0xC0, dreg_lo, IA32_EBX)); /* shl dreg_lo,imm8 */ EMIT3(0xC1, add_1reg(0xE0, dreg_lo), val); /* IA32_ECX = 32 - val */ /* mov ecx,val */ EMIT2(0xB1, val); /* movzx ecx,ecx */ EMIT3(0x0F, 0xB6, add_2reg(0xC0, IA32_ECX, IA32_ECX)); /* neg ecx */ EMIT2(0xF7, add_1reg(0xD8, IA32_ECX)); /* add ecx,32 */ EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 32); /* shr ebx,cl */ EMIT2(0xD3, add_1reg(0xE8, IA32_EBX)); /* or dreg_hi,ebx */ EMIT2(0x09, add_2reg(0xC0, dreg_hi, IA32_EBX)); } else if (val >= 32 && val < 64) { u32 value = val - 32; /* shl dreg_lo,imm8 */ EMIT3(0xC1, add_1reg(0xE0, dreg_lo), value); /* mov dreg_hi,dreg_lo */ EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo)); /* xor dreg_lo,dreg_lo */ EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); } else { /* xor dreg_lo,dreg_lo */ EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); /* xor dreg_hi,dreg_hi */ EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); } if (dstk) { /* mov dword ptr [ebp+off],dreg_lo */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],dreg_hi */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), STACK_VAR(dst_hi)); } *pprog = prog; } /* dst = dst >> val */ static inline void emit_ia32_rsh_i64(const u8 dst[], const u32 val, bool dstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } /* Do RSH operation */ if (val < 32) { /* shr dreg_lo,imm8 */ EMIT3(0xC1, add_1reg(0xE8, dreg_lo), val); /* mov ebx,dreg_hi */ EMIT2(0x8B, add_2reg(0xC0, dreg_hi, IA32_EBX)); /* shr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xE8, dreg_hi), val); /* IA32_ECX = 32 - val */ /* mov ecx,val */ EMIT2(0xB1, val); /* movzx ecx,ecx */ EMIT3(0x0F, 0xB6, add_2reg(0xC0, IA32_ECX, IA32_ECX)); /* neg ecx */ EMIT2(0xF7, add_1reg(0xD8, IA32_ECX)); /* add ecx,32 */ EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 32); /* shl ebx,cl */ EMIT2(0xD3, add_1reg(0xE0, IA32_EBX)); /* or dreg_lo,ebx */ EMIT2(0x09, add_2reg(0xC0, dreg_lo, IA32_EBX)); } else if (val >= 32 && val < 64) { u32 value = val - 32; /* shr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xE8, dreg_hi), value); /* mov dreg_lo,dreg_hi */ EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); /* xor dreg_hi,dreg_hi */ EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); } else { /* xor dreg_lo,dreg_lo */ EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); /* xor dreg_hi,dreg_hi */ EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); } if (dstk) { /* mov dword ptr [ebp+off],dreg_lo */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],dreg_hi */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), STACK_VAR(dst_hi)); } *pprog = prog; } /* dst = dst >> val (signed) */ static inline void emit_ia32_arsh_i64(const u8 dst[], const u32 val, bool dstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } /* Do RSH operation */ if (val < 32) { /* shr dreg_lo,imm8 */ EMIT3(0xC1, add_1reg(0xE8, dreg_lo), val); /* mov ebx,dreg_hi */ EMIT2(0x8B, add_2reg(0xC0, dreg_hi, IA32_EBX)); /* ashr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xF8, dreg_hi), val); /* IA32_ECX = 32 - val */ /* mov ecx,val */ EMIT2(0xB1, val); /* movzx ecx,ecx */ EMIT3(0x0F, 0xB6, add_2reg(0xC0, IA32_ECX, IA32_ECX)); /* neg ecx */ EMIT2(0xF7, add_1reg(0xD8, IA32_ECX)); /* add ecx,32 */ EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 32); /* shl ebx,cl */ EMIT2(0xD3, add_1reg(0xE0, IA32_EBX)); /* or dreg_lo,ebx */ EMIT2(0x09, add_2reg(0xC0, dreg_lo, IA32_EBX)); } else if (val >= 32 && val < 64) { u32 value = val - 32; /* ashr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xF8, dreg_hi), value); /* mov dreg_lo,dreg_hi */ EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); /* ashr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31); } else { /* ashr dreg_hi,imm8 */ EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31); /* mov dreg_lo,dreg_hi */ EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); } if (dstk) { /* mov dword ptr [ebp+off],dreg_lo */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],dreg_hi */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), STACK_VAR(dst_hi)); } *pprog = prog; } static inline void emit_ia32_mul_r64(const u8 dst[], const u8 src[], bool dstk, bool sstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_hi)); else /* mov eax,dst_hi */ EMIT2(0x8B, add_2reg(0xC0, dst_hi, IA32_EAX)); if (sstk) /* mul dword ptr [ebp+off] */ EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo)); else /* mul src_lo */ EMIT2(0xF7, add_1reg(0xE0, src_lo)); /* mov ecx,eax */ EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX)); if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); else /* mov eax,dst_lo */ EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); if (sstk) /* mul dword ptr [ebp+off] */ EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_hi)); else /* mul src_hi */ EMIT2(0xF7, add_1reg(0xE0, src_hi)); /* add eax,eax */ EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX)); if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); else /* mov eax,dst_lo */ EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); if (sstk) /* mul dword ptr [ebp+off] */ EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo)); else /* mul src_lo */ EMIT2(0xF7, add_1reg(0xE0, src_lo)); /* add ecx,edx */ EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX)); if (dstk) { /* mov dword ptr [ebp+off],eax */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],ecx */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(dst_hi)); } else { /* mov dst_lo,eax */ EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX)); /* mov dst_hi,ecx */ EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX)); } *pprog = prog; } static inline void emit_ia32_mul_i64(const u8 dst[], const u32 val, bool dstk, u8 **pprog) { u8 *prog = *pprog; int cnt = 0; u32 hi; hi = val & (1<<31) ? (u32)~0 : 0; /* movl eax,imm32 */ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val); if (dstk) /* mul dword ptr [ebp+off] */ EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_hi)); else /* mul dst_hi */ EMIT2(0xF7, add_1reg(0xE0, dst_hi)); /* mov ecx,eax */ EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX)); /* movl eax,imm32 */ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), hi); if (dstk) /* mul dword ptr [ebp+off] */ EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo)); else /* mul dst_lo */ EMIT2(0xF7, add_1reg(0xE0, dst_lo)); /* add ecx,eax */ EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX)); /* movl eax,imm32 */ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val); if (dstk) /* mul dword ptr [ebp+off] */ EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo)); else /* mul dst_lo */ EMIT2(0xF7, add_1reg(0xE0, dst_lo)); /* add ecx,edx */ EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX)); if (dstk) { /* mov dword ptr [ebp+off],eax */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); /* mov dword ptr [ebp+off],ecx */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(dst_hi)); } else { /* mov dword ptr [ebp+off],eax */ EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX)); /* mov dword ptr [ebp+off],ecx */ EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX)); } *pprog = prog; } static int bpf_size_to_x86_bytes(int bpf_size) { if (bpf_size == BPF_W) return 4; else if (bpf_size == BPF_H) return 2; else if (bpf_size == BPF_B) return 1; else if (bpf_size == BPF_DW) return 4; /* imm32 */ else return 0; } struct jit_context { int cleanup_addr; /* Epilogue code offset */ }; /* Maximum number of bytes emitted while JITing one eBPF insn */ #define BPF_MAX_INSN_SIZE 128 #define BPF_INSN_SAFETY 64 #define PROLOGUE_SIZE 35 /* * Emit prologue code for BPF program and check it's size. * bpf_tail_call helper will skip it while jumping into another program. */ static void emit_prologue(u8 **pprog, u32 stack_depth) { u8 *prog = *pprog; int cnt = 0; const u8 *r1 = bpf2ia32[BPF_REG_1]; const u8 fplo = bpf2ia32[BPF_REG_FP][0]; const u8 fphi = bpf2ia32[BPF_REG_FP][1]; const u8 *tcc = bpf2ia32[TCALL_CNT]; /* push ebp */ EMIT1(0x55); /* mov ebp,esp */ EMIT2(0x89, 0xE5); /* push edi */ EMIT1(0x57); /* push esi */ EMIT1(0x56); /* push ebx */ EMIT1(0x53); /* sub esp,STACK_SIZE */ EMIT2_off32(0x81, 0xEC, STACK_SIZE); /* sub ebp,SCRATCH_SIZE+4+12*/ EMIT3(0x83, add_1reg(0xE8, IA32_EBP), SCRATCH_SIZE + 16); /* xor ebx,ebx */ EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX)); /* Set up BPF prog stack base register */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBP), STACK_VAR(fplo)); EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi)); /* Move BPF_CTX (EAX) to BPF_REG_R1 */ /* mov dword ptr [ebp+off],eax */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1])); /* Initialize Tail Count */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0])); EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); BUILD_BUG_ON(cnt != PROLOGUE_SIZE); *pprog = prog; } /* Emit epilogue code for BPF program */ static void emit_epilogue(u8 **pprog, u32 stack_depth) { u8 *prog = *pprog; const u8 *r0 = bpf2ia32[BPF_REG_0]; int cnt = 0; /* mov eax,dword ptr [ebp+off]*/ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r0[0])); /* mov edx,dword ptr [ebp+off]*/ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r0[1])); /* add ebp,SCRATCH_SIZE+4+12*/ EMIT3(0x83, add_1reg(0xC0, IA32_EBP), SCRATCH_SIZE + 16); /* mov ebx,dword ptr [ebp-12]*/ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12); /* mov esi,dword ptr [ebp-8]*/ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ESI), -8); /* mov edi,dword ptr [ebp-4]*/ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDI), -4); EMIT1(0xC9); /* leave */ EMIT1(0xC3); /* ret */ *pprog = prog; } /* * Generate the following code: * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ... * if (index >= array->map.max_entries) * goto out; * if (++tail_call_cnt > MAX_TAIL_CALL_CNT) * goto out; * prog = array->ptrs[index]; * if (prog == NULL) * goto out; * goto *(prog->bpf_func + prologue_size); * out: */ static void emit_bpf_tail_call(u8 **pprog) { u8 *prog = *pprog; int cnt = 0; const u8 *r1 = bpf2ia32[BPF_REG_1]; const u8 *r2 = bpf2ia32[BPF_REG_2]; const u8 *r3 = bpf2ia32[BPF_REG_3]; const u8 *tcc = bpf2ia32[TCALL_CNT]; u32 lo, hi; static int jmp_label1 = -1; /* * if (index >= array->map.max_entries) * goto out; */ /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r2[0])); /* mov edx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r3[0])); /* cmp dword ptr [eax+off],edx */ EMIT3(0x39, add_2reg(0x40, IA32_EAX, IA32_EDX), offsetof(struct bpf_array, map.max_entries)); /* jbe out */ EMIT2(IA32_JBE, jmp_label(jmp_label1, 2)); /* * if (tail_call_cnt > MAX_TAIL_CALL_CNT) * goto out; */ lo = (u32)MAX_TAIL_CALL_CNT; hi = (u32)((u64)MAX_TAIL_CALL_CNT >> 32); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0])); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); /* cmp edx,hi */ EMIT3(0x83, add_1reg(0xF8, IA32_EBX), hi); EMIT2(IA32_JNE, 3); /* cmp ecx,lo */ EMIT3(0x83, add_1reg(0xF8, IA32_ECX), lo); /* ja out */ EMIT2(IA32_JAE, jmp_label(jmp_label1, 2)); /* add eax,0x1 */ EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 0x01); /* adc ebx,0x0 */ EMIT3(0x83, add_1reg(0xD0, IA32_EBX), 0x00); /* mov dword ptr [ebp+off],eax */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0])); /* mov dword ptr [ebp+off],edx */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); /* prog = array->ptrs[index]; */ /* mov edx, [eax + edx * 4 + offsetof(...)] */ EMIT3_off32(0x8B, 0x94, 0x90, offsetof(struct bpf_array, ptrs)); /* * if (prog == NULL) * goto out; */ /* test edx,edx */ EMIT2(0x85, add_2reg(0xC0, IA32_EDX, IA32_EDX)); /* je out */ EMIT2(IA32_JE, jmp_label(jmp_label1, 2)); /* goto *(prog->bpf_func + prologue_size); */ /* mov edx, dword ptr [edx + 32] */ EMIT3(0x8B, add_2reg(0x40, IA32_EDX, IA32_EDX), offsetof(struct bpf_prog, bpf_func)); /* add edx,prologue_size */ EMIT3(0x83, add_1reg(0xC0, IA32_EDX), PROLOGUE_SIZE); /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); /* * Now we're ready to jump into next BPF program: * eax == ctx (1st arg) * edx == prog->bpf_func + prologue_size */ RETPOLINE_EDX_BPF_JIT(); if (jmp_label1 == -1) jmp_label1 = cnt; /* out: */ *pprog = prog; } /* Push the scratch stack register on top of the stack. */ static inline void emit_push_r64(const u8 src[], u8 **pprog) { u8 *prog = *pprog; int cnt = 0; /* mov ecx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_hi)); /* push ecx */ EMIT1(0x51); /* mov ecx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); /* push ecx */ EMIT1(0x51); *pprog = prog; } static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, int oldproglen, struct jit_context *ctx) { struct bpf_insn *insn = bpf_prog->insnsi; int insn_cnt = bpf_prog->len; bool seen_exit = false; u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY]; int i, cnt = 0; int proglen = 0; u8 *prog = temp; emit_prologue(&prog, bpf_prog->aux->stack_depth); for (i = 0; i < insn_cnt; i++, insn++) { const s32 imm32 = insn->imm; const bool is64 = BPF_CLASS(insn->code) == BPF_ALU64; const bool dstk = insn->dst_reg == BPF_REG_AX ? false : true; const bool sstk = insn->src_reg == BPF_REG_AX ? false : true; const u8 code = insn->code; const u8 *dst = bpf2ia32[insn->dst_reg]; const u8 *src = bpf2ia32[insn->src_reg]; const u8 *r0 = bpf2ia32[BPF_REG_0]; s64 jmp_offset; u8 jmp_cond; int ilen; u8 *func; switch (code) { /* ALU operations */ /* dst = src */ case BPF_ALU | BPF_MOV | BPF_K: case BPF_ALU | BPF_MOV | BPF_X: case BPF_ALU64 | BPF_MOV | BPF_K: case BPF_ALU64 | BPF_MOV | BPF_X: switch (BPF_SRC(code)) { case BPF_X: emit_ia32_mov_r64(is64, dst, src, dstk, sstk, &prog); break; case BPF_K: /* Sign-extend immediate value to dst reg */ emit_ia32_mov_i64(is64, dst, imm32, dstk, &prog); break; } break; /* dst = dst + src/imm */ /* dst = dst - src/imm */ /* dst = dst | src/imm */ /* dst = dst & src/imm */ /* dst = dst ^ src/imm */ /* dst = dst * src/imm */ /* dst = dst << src */ /* dst = dst >> src */ case BPF_ALU | BPF_ADD | BPF_K: case BPF_ALU | BPF_ADD | BPF_X: case BPF_ALU | BPF_SUB | BPF_K: case BPF_ALU | BPF_SUB | BPF_X: case BPF_ALU | BPF_OR | BPF_K: case BPF_ALU | BPF_OR | BPF_X: case BPF_ALU | BPF_AND | BPF_K: case BPF_ALU | BPF_AND | BPF_X: case BPF_ALU | BPF_XOR | BPF_K: case BPF_ALU | BPF_XOR | BPF_X: case BPF_ALU64 | BPF_ADD | BPF_K: case BPF_ALU64 | BPF_ADD | BPF_X: case BPF_ALU64 | BPF_SUB | BPF_K: case BPF_ALU64 | BPF_SUB | BPF_X: case BPF_ALU64 | BPF_OR | BPF_K: case BPF_ALU64 | BPF_OR | BPF_X: case BPF_ALU64 | BPF_AND | BPF_K: case BPF_ALU64 | BPF_AND | BPF_X: case BPF_ALU64 | BPF_XOR | BPF_K: case BPF_ALU64 | BPF_XOR | BPF_X: switch (BPF_SRC(code)) { case BPF_X: emit_ia32_alu_r64(is64, BPF_OP(code), dst, src, dstk, sstk, &prog); break; case BPF_K: emit_ia32_alu_i64(is64, BPF_OP(code), dst, imm32, dstk, &prog); break; } break; case BPF_ALU | BPF_MUL | BPF_K: case BPF_ALU | BPF_MUL | BPF_X: switch (BPF_SRC(code)) { case BPF_X: emit_ia32_mul_r(dst_lo, src_lo, dstk, sstk, &prog); break; case BPF_K: /* mov ecx,imm32*/ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32); emit_ia32_mul_r(dst_lo, IA32_ECX, dstk, false, &prog); break; } emit_ia32_mov_i(dst_hi, 0, dstk, &prog); break; case BPF_ALU | BPF_LSH | BPF_X: case BPF_ALU | BPF_RSH | BPF_X: case BPF_ALU | BPF_ARSH | BPF_K: case BPF_ALU | BPF_ARSH | BPF_X: switch (BPF_SRC(code)) { case BPF_X: emit_ia32_shift_r(BPF_OP(code), dst_lo, src_lo, dstk, sstk, &prog); break; case BPF_K: /* mov ecx,imm32*/ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32); emit_ia32_shift_r(BPF_OP(code), dst_lo, IA32_ECX, dstk, false, &prog); break; } emit_ia32_mov_i(dst_hi, 0, dstk, &prog); break; /* dst = dst / src(imm) */ /* dst = dst % src(imm) */ case BPF_ALU | BPF_DIV | BPF_K: case BPF_ALU | BPF_DIV | BPF_X: case BPF_ALU | BPF_MOD | BPF_K: case BPF_ALU | BPF_MOD | BPF_X: switch (BPF_SRC(code)) { case BPF_X: emit_ia32_div_mod_r(BPF_OP(code), dst_lo, src_lo, dstk, sstk, &prog); break; case BPF_K: /* mov ecx,imm32*/ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32); emit_ia32_div_mod_r(BPF_OP(code), dst_lo, IA32_ECX, dstk, false, &prog); break; } emit_ia32_mov_i(dst_hi, 0, dstk, &prog); break; case BPF_ALU64 | BPF_DIV | BPF_K: case BPF_ALU64 | BPF_DIV | BPF_X: case BPF_ALU64 | BPF_MOD | BPF_K: case BPF_ALU64 | BPF_MOD | BPF_X: goto notyet; /* dst = dst >> imm */ /* dst = dst << imm */ case BPF_ALU | BPF_RSH | BPF_K: case BPF_ALU | BPF_LSH | BPF_K: if (unlikely(imm32 > 31)) return -EINVAL; /* mov ecx,imm32*/ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32); emit_ia32_shift_r(BPF_OP(code), dst_lo, IA32_ECX, dstk, false, &prog); emit_ia32_mov_i(dst_hi, 0, dstk, &prog); break; /* dst = dst << imm */ case BPF_ALU64 | BPF_LSH | BPF_K: if (unlikely(imm32 > 63)) return -EINVAL; emit_ia32_lsh_i64(dst, imm32, dstk, &prog); break; /* dst = dst >> imm */ case BPF_ALU64 | BPF_RSH | BPF_K: if (unlikely(imm32 > 63)) return -EINVAL; emit_ia32_rsh_i64(dst, imm32, dstk, &prog); break; /* dst = dst << src */ case BPF_ALU64 | BPF_LSH | BPF_X: emit_ia32_lsh_r64(dst, src, dstk, sstk, &prog); break; /* dst = dst >> src */ case BPF_ALU64 | BPF_RSH | BPF_X: emit_ia32_rsh_r64(dst, src, dstk, sstk, &prog); break; /* dst = dst >> src (signed) */ case BPF_ALU64 | BPF_ARSH | BPF_X: emit_ia32_arsh_r64(dst, src, dstk, sstk, &prog); break; /* dst = dst >> imm (signed) */ case BPF_ALU64 | BPF_ARSH | BPF_K: if (unlikely(imm32 > 63)) return -EINVAL; emit_ia32_arsh_i64(dst, imm32, dstk, &prog); break; /* dst = ~dst */ case BPF_ALU | BPF_NEG: emit_ia32_alu_i(is64, false, BPF_OP(code), dst_lo, 0, dstk, &prog); emit_ia32_mov_i(dst_hi, 0, dstk, &prog); break; /* dst = ~dst (64 bit) */ case BPF_ALU64 | BPF_NEG: emit_ia32_neg64(dst, dstk, &prog); break; /* dst = dst * src/imm */ case BPF_ALU64 | BPF_MUL | BPF_X: case BPF_ALU64 | BPF_MUL | BPF_K: switch (BPF_SRC(code)) { case BPF_X: emit_ia32_mul_r64(dst, src, dstk, sstk, &prog); break; case BPF_K: emit_ia32_mul_i64(dst, imm32, dstk, &prog); break; } break; /* dst = htole(dst) */ case BPF_ALU | BPF_END | BPF_FROM_LE: emit_ia32_to_le_r64(dst, imm32, dstk, &prog); break; /* dst = htobe(dst) */ case BPF_ALU | BPF_END | BPF_FROM_BE: emit_ia32_to_be_r64(dst, imm32, dstk, &prog); break; /* dst = imm64 */ case BPF_LD | BPF_IMM | BPF_DW: { s32 hi, lo = imm32; hi = insn[1].imm; emit_ia32_mov_i(dst_lo, lo, dstk, &prog); emit_ia32_mov_i(dst_hi, hi, dstk, &prog); insn++; i++; break; } /* ST: *(u8*)(dst_reg + off) = imm */ case BPF_ST | BPF_MEM | BPF_H: case BPF_ST | BPF_MEM | BPF_B: case BPF_ST | BPF_MEM | BPF_W: case BPF_ST | BPF_MEM | BPF_DW: if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); else /* mov eax,dst_lo */ EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); switch (BPF_SIZE(code)) { case BPF_B: EMIT(0xC6, 1); break; case BPF_H: EMIT2(0x66, 0xC7); break; case BPF_W: case BPF_DW: EMIT(0xC7, 1); break; } if (is_imm8(insn->off)) EMIT2(add_1reg(0x40, IA32_EAX), insn->off); else EMIT1_off32(add_1reg(0x80, IA32_EAX), insn->off); EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(code))); if (BPF_SIZE(code) == BPF_DW) { u32 hi; hi = imm32 & (1<<31) ? (u32)~0 : 0; EMIT2_off32(0xC7, add_1reg(0x80, IA32_EAX), insn->off + 4); EMIT(hi, 4); } break; /* STX: *(u8*)(dst_reg + off) = src_reg */ case BPF_STX | BPF_MEM | BPF_B: case BPF_STX | BPF_MEM | BPF_H: case BPF_STX | BPF_MEM | BPF_W: case BPF_STX | BPF_MEM | BPF_DW: if (dstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); else /* mov eax,dst_lo */ EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); if (sstk) /* mov edx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(src_lo)); else /* mov edx,src_lo */ EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EDX)); switch (BPF_SIZE(code)) { case BPF_B: EMIT(0x88, 1); break; case BPF_H: EMIT2(0x66, 0x89); break; case BPF_W: case BPF_DW: EMIT(0x89, 1); break; } if (is_imm8(insn->off)) EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX), insn->off); else EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX), insn->off); if (BPF_SIZE(code) == BPF_DW) { if (sstk) /* mov edi,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(src_hi)); else /* mov edi,src_hi */ EMIT2(0x8B, add_2reg(0xC0, src_hi, IA32_EDX)); EMIT1(0x89); if (is_imm8(insn->off + 4)) { EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX), insn->off + 4); } else { EMIT1(add_2reg(0x80, IA32_EAX, IA32_EDX)); EMIT(insn->off + 4, 4); } } break; /* LDX: dst_reg = *(u8*)(src_reg + off) */ case BPF_LDX | BPF_MEM | BPF_B: case BPF_LDX | BPF_MEM | BPF_H: case BPF_LDX | BPF_MEM | BPF_W: case BPF_LDX | BPF_MEM | BPF_DW: if (sstk) /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src_lo)); else /* mov eax,dword ptr [ebp+off] */ EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EAX)); switch (BPF_SIZE(code)) { case BPF_B: EMIT2(0x0F, 0xB6); break; case BPF_H: EMIT2(0x0F, 0xB7); break; case BPF_W: case BPF_DW: EMIT(0x8B, 1); break; } if (is_imm8(insn->off)) EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX), insn->off); else EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX), insn->off); if (dstk) /* mov dword ptr [ebp+off],edx */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_lo)); else /* mov dst_lo,edx */ EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EDX)); switch (BPF_SIZE(code)) { case BPF_B: case BPF_H: case BPF_W: if (dstk) { EMIT3(0xC7, add_1reg(0x40, IA32_EBP), STACK_VAR(dst_hi)); EMIT(0x0, 4); } else { EMIT3(0xC7, add_1reg(0xC0, dst_hi), 0); } break; case BPF_DW: EMIT2_off32(0x8B, add_2reg(0x80, IA32_EAX, IA32_EDX), insn->off + 4); if (dstk) EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); else EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_EDX)); break; default: break; } break; /* call */ case BPF_JMP | BPF_CALL: { const u8 *r1 = bpf2ia32[BPF_REG_1]; const u8 *r2 = bpf2ia32[BPF_REG_2]; const u8 *r3 = bpf2ia32[BPF_REG_3]; const u8 *r4 = bpf2ia32[BPF_REG_4]; const u8 *r5 = bpf2ia32[BPF_REG_5]; if (insn->src_reg == BPF_PSEUDO_CALL) goto notyet; func = (u8 *) __bpf_call_base + imm32; jmp_offset = func - (image + addrs[i]); if (!imm32 || !is_simm32(jmp_offset)) { pr_err("unsupported BPF func %d addr %p image %p\n", imm32, func, image); return -EINVAL; } /* mov eax,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); /* mov edx,dword ptr [ebp+off] */ EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r1[1])); emit_push_r64(r5, &prog); emit_push_r64(r4, &prog); emit_push_r64(r3, &prog); emit_push_r64(r2, &prog); EMIT1_off32(0xE8, jmp_offset + 9); /* mov dword ptr [ebp+off],eax */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r0[0])); /* mov dword ptr [ebp+off],edx */ EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r0[1])); /* add esp,32 */ EMIT3(0x83, add_1reg(0xC0, IA32_ESP), 32); break; } case BPF_JMP | BPF_TAIL_CALL: emit_bpf_tail_call(&prog); break; /* cond jump */ case BPF_JMP | BPF_JEQ | BPF_X: case BPF_JMP | BPF_JNE | BPF_X: case BPF_JMP | BPF_JGT | BPF_X: case BPF_JMP | BPF_JLT | BPF_X: case BPF_JMP | BPF_JGE | BPF_X: case BPF_JMP | BPF_JLE | BPF_X: case BPF_JMP | BPF_JSGT | BPF_X: case BPF_JMP | BPF_JSLE | BPF_X: case BPF_JMP | BPF_JSLT | BPF_X: case BPF_JMP | BPF_JSGE | BPF_X: { u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; u8 sreg_lo = sstk ? IA32_ECX : src_lo; u8 sreg_hi = sstk ? IA32_EBX : src_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } if (sstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(src_hi)); } /* cmp dreg_hi,sreg_hi */ EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi)); EMIT2(IA32_JNE, 2); /* cmp dreg_lo,sreg_lo */ EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo)); goto emit_cond_jmp; } case BPF_JMP | BPF_JSET | BPF_X: { u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; u8 sreg_lo = sstk ? IA32_ECX : src_lo; u8 sreg_hi = sstk ? IA32_EBX : src_hi; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } if (sstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(src_hi)); } /* and dreg_lo,sreg_lo */ EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo)); /* and dreg_hi,sreg_hi */ EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi)); /* or dreg_lo,dreg_hi */ EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi)); goto emit_cond_jmp; } case BPF_JMP | BPF_JSET | BPF_K: { u32 hi; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; u8 sreg_lo = IA32_ECX; u8 sreg_hi = IA32_EBX; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } hi = imm32 & (1<<31) ? (u32)~0 : 0; /* mov ecx,imm32 */ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32); /* mov ebx,imm32 */ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi); /* and dreg_lo,sreg_lo */ EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo)); /* and dreg_hi,sreg_hi */ EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi)); /* or dreg_lo,dreg_hi */ EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi)); goto emit_cond_jmp; } case BPF_JMP | BPF_JEQ | BPF_K: case BPF_JMP | BPF_JNE | BPF_K: case BPF_JMP | BPF_JGT | BPF_K: case BPF_JMP | BPF_JLT | BPF_K: case BPF_JMP | BPF_JGE | BPF_K: case BPF_JMP | BPF_JLE | BPF_K: case BPF_JMP | BPF_JSGT | BPF_K: case BPF_JMP | BPF_JSLE | BPF_K: case BPF_JMP | BPF_JSLT | BPF_K: case BPF_JMP | BPF_JSGE | BPF_K: { u32 hi; u8 dreg_lo = dstk ? IA32_EAX : dst_lo; u8 dreg_hi = dstk ? IA32_EDX : dst_hi; u8 sreg_lo = IA32_ECX; u8 sreg_hi = IA32_EBX; if (dstk) { EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst_lo)); EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst_hi)); } hi = imm32 & (1<<31) ? (u32)~0 : 0; /* mov ecx,imm32 */ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32); /* mov ebx,imm32 */ EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi); /* cmp dreg_hi,sreg_hi */ EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi)); EMIT2(IA32_JNE, 2); /* cmp dreg_lo,sreg_lo */ EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo)); emit_cond_jmp: /* Convert BPF opcode to x86 */ switch (BPF_OP(code)) { case BPF_JEQ: jmp_cond = IA32_JE; break; case BPF_JSET: case BPF_JNE: jmp_cond = IA32_JNE; break; case BPF_JGT: /* GT is unsigned '>', JA in x86 */ jmp_cond = IA32_JA; break; case BPF_JLT: /* LT is unsigned '<', JB in x86 */ jmp_cond = IA32_JB; break; case BPF_JGE: /* GE is unsigned '>=', JAE in x86 */ jmp_cond = IA32_JAE; break; case BPF_JLE: /* LE is unsigned '<=', JBE in x86 */ jmp_cond = IA32_JBE; break; case BPF_JSGT: /* Signed '>', GT in x86 */ jmp_cond = IA32_JG; break; case BPF_JSLT: /* Signed '<', LT in x86 */ jmp_cond = IA32_JL; break; case BPF_JSGE: /* Signed '>=', GE in x86 */ jmp_cond = IA32_JGE; break; case BPF_JSLE: /* Signed '<=', LE in x86 */ jmp_cond = IA32_JLE; break; default: /* to silence GCC warning */ return -EFAULT; } jmp_offset = addrs[i + insn->off] - addrs[i]; if (is_imm8(jmp_offset)) { EMIT2(jmp_cond, jmp_offset); } else if (is_simm32(jmp_offset)) { EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset); } else { pr_err("cond_jmp gen bug %llx\n", jmp_offset); return -EFAULT; } break; } case BPF_JMP | BPF_JA: if (insn->off == -1) /* -1 jmp instructions will always jump * backwards two bytes. Explicitly handling * this case avoids wasting too many passes * when there are long sequences of replaced * dead code. */ jmp_offset = -2; else jmp_offset = addrs[i + insn->off] - addrs[i]; if (!jmp_offset) /* Optimize out nop jumps */ break; emit_jmp: if (is_imm8(jmp_offset)) { EMIT2(0xEB, jmp_offset); } else if (is_simm32(jmp_offset)) { EMIT1_off32(0xE9, jmp_offset); } else { pr_err("jmp gen bug %llx\n", jmp_offset); return -EFAULT; } break; /* STX XADD: lock *(u32 *)(dst + off) += src */ case BPF_STX | BPF_XADD | BPF_W: /* STX XADD: lock *(u64 *)(dst + off) += src */ case BPF_STX | BPF_XADD | BPF_DW: goto notyet; case BPF_JMP | BPF_EXIT: if (seen_exit) { jmp_offset = ctx->cleanup_addr - addrs[i]; goto emit_jmp; } seen_exit = true; /* Update cleanup_addr */ ctx->cleanup_addr = proglen; emit_epilogue(&prog, bpf_prog->aux->stack_depth); break; notyet: pr_info_once("*** NOT YET: opcode %02x ***\n", code); return -EFAULT; default: /* * This error will be seen if new instruction was added * to interpreter, but not to JIT or if there is junk in * bpf_prog */ pr_err("bpf_jit: unknown opcode %02x\n", code); return -EINVAL; } ilen = prog - temp; if (ilen > BPF_MAX_INSN_SIZE) { pr_err("bpf_jit: fatal insn size error\n"); return -EFAULT; } if (image) { if (unlikely(proglen + ilen > oldproglen)) { pr_err("bpf_jit: fatal error\n"); return -EFAULT; } memcpy(image + proglen, temp, ilen); } proglen += ilen; addrs[i] = proglen; prog = temp; } return proglen; } struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) { struct bpf_binary_header *header = NULL; struct bpf_prog *tmp, *orig_prog = prog; int proglen, oldproglen = 0; struct jit_context ctx = {}; bool tmp_blinded = false; u8 *image = NULL; int *addrs; int pass; int i; if (!prog->jit_requested) return orig_prog; tmp = bpf_jit_blind_constants(prog); /* * If blinding was requested and we failed during blinding, * we must fall back to the interpreter. */ if (IS_ERR(tmp)) return orig_prog; if (tmp != prog) { tmp_blinded = true; prog = tmp; } addrs = kmalloc_array(prog->len, sizeof(*addrs), GFP_KERNEL); if (!addrs) { prog = orig_prog; goto out; } /* * Before first pass, make a rough estimation of addrs[] * each BPF instruction is translated to less than 64 bytes */ for (proglen = 0, i = 0; i < prog->len; i++) { proglen += 64; addrs[i] = proglen; } ctx.cleanup_addr = proglen; /* * JITed image shrinks with every pass and the loop iterates * until the image stops shrinking. Very large BPF programs * may converge on the last pass. In such case do one more * pass to emit the final image. */ for (pass = 0; pass < 20 || image; pass++) { proglen = do_jit(prog, addrs, image, oldproglen, &ctx); if (proglen <= 0) { out_image: image = NULL; if (header) bpf_jit_binary_free(header); prog = orig_prog; goto out_addrs; } if (image) { if (proglen != oldproglen) { pr_err("bpf_jit: proglen=%d != oldproglen=%d\n", proglen, oldproglen); goto out_image; } break; } if (proglen == oldproglen) { header = bpf_jit_binary_alloc(proglen, &image, 1, jit_fill_hole); if (!header) { prog = orig_prog; goto out_addrs; } } oldproglen = proglen; cond_resched(); } if (bpf_jit_enable > 1) bpf_jit_dump(prog->len, proglen, pass + 1, image); if (image) { bpf_jit_binary_lock_ro(header); prog->bpf_func = (void *)image; prog->jited = 1; prog->jited_len = proglen; } else { prog = orig_prog; } out_addrs: kfree(addrs); out: if (tmp_blinded) bpf_jit_prog_release_other(prog, prog == orig_prog ? tmp : orig_prog); return prog; }