From 002905eca5bedab08bafd9e325bbbb41670c7712 Mon Sep 17 00:00:00 2001 From: Peng Ma Date: Thu, 13 Jun 2019 10:27:08 +0000 Subject: dmaengine: fsl-edma: support little endian for edma driver Our platforms with below registers(CHCFG0 - CHCFG15) of eDMA *-----------------------------------------------------------* | Offset | Big endian Register| Little endian Register| |--------------|--------------------|-----------------------| | 0x0 | CHCFG0 | CHCFG3 | |--------------|--------------------|-----------------------| | 0x1 | CHCFG1 | CHCFG2 | |--------------|--------------------|-----------------------| | 0x2 | CHCFG2 | CHCFG1 | |--------------|--------------------|-----------------------| | 0x3 | CHCFG3 | CHCFG0 | |--------------|--------------------|-----------------------| | ... | ...... | ...... | |--------------|--------------------|-----------------------| | 0xC | CHCFG12 | CHCFG15 | |--------------|--------------------|-----------------------| | 0xD | CHCFG13 | CHCFG14 | |--------------|--------------------|-----------------------| | 0xE | CHCFG14 | CHCFG13 | |--------------|--------------------|-----------------------| | 0xF | CHCFG15 | CHCFG12 | *-----------------------------------------------------------* Current eDMA driver does not support Little endian, so this patch is to improve edma driver to support little endian. Signed-off-by: Peng Ma Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 680b2a00a953..6bf238e19d91 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -83,9 +83,14 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, u32 ch = fsl_chan->vchan.chan.chan_id; void __iomem *muxaddr; unsigned int chans_per_mux, ch_off; + int endian_diff[4] = {3, 1, -1, -3}; chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR; ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux; + + if (!fsl_chan->edma->big_endian) + ch_off += endian_diff[ch_off % 4]; + muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; slot = EDMAMUX_CHCFG_SOURCE(slot); -- cgit v1.2.2 From fc4a9030788548414ccdd9d04aa457d4e027ecaa Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 2 Jul 2019 13:48:52 -0300 Subject: dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver" This reverts commit 002905eca5bedab08bafd9e325bbbb41670c7712. Commit 002905eca5be ("dmaengine: fsl-edma: support little endian for edma driver") incorrectly assumed that there was not little endian support in the driver. This causes hangs on Vybrid, so revert it so that Vybrid systems could boot again. Reported-by: Krzysztof Kozlowski Signed-off-by: Fabio Estevam Tested-by: Krzysztof Kozlowski Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 6bf238e19d91..680b2a00a953 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -83,14 +83,9 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, u32 ch = fsl_chan->vchan.chan.chan_id; void __iomem *muxaddr; unsigned int chans_per_mux, ch_off; - int endian_diff[4] = {3, 1, -1, -3}; chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR; ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux; - - if (!fsl_chan->edma->big_endian) - ch_off += endian_diff[ch_off % 4]; - muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; slot = EDMAMUX_CHCFG_SOURCE(slot); -- cgit v1.2.2 From af802728e4ab0764b2a26960a30f4cbe358a3b95 Mon Sep 17 00:00:00 2001 From: Robin Gong Date: Tue, 25 Jun 2019 17:43:19 +0800 Subject: dmaengine: fsl-edma: add drvdata for fsl-edma There are some differences between vf610 and next i.mx7ulp. Put such differences into static driver data for distinguishing easily at driver level. Change mcf-edma accordingly. Signed-off-by: Robin Gong Tested-by: Angelo Dureghello Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 680b2a00a953..07d96894c7c4 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -47,7 +47,7 @@ static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan) struct edma_regs *regs = &fsl_chan->edma->regs; u32 ch = fsl_chan->vchan.chan.chan_id; - if (fsl_chan->edma->version == v1) { + if (fsl_chan->edma->drvdata->version == v1) { edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); edma_writeb(fsl_chan->edma, ch, regs->serq); } else { @@ -64,7 +64,7 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) struct edma_regs *regs = &fsl_chan->edma->regs; u32 ch = fsl_chan->vchan.chan.chan_id; - if (fsl_chan->edma->version == v1) { + if (fsl_chan->edma->drvdata->version == v1) { edma_writeb(fsl_chan->edma, ch, regs->cerq); edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), regs->ceei); } else { @@ -83,8 +83,9 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, u32 ch = fsl_chan->vchan.chan.chan_id; void __iomem *muxaddr; unsigned int chans_per_mux, ch_off; + u32 dmamux_nr = fsl_chan->edma->drvdata->dmamuxs; - chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR; + chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr; ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux; muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; slot = EDMAMUX_CHCFG_SOURCE(slot); @@ -647,28 +648,28 @@ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) edma->regs.erql = edma->membase + EDMA_ERQ; edma->regs.eeil = edma->membase + EDMA_EEI; - edma->regs.serq = edma->membase + ((edma->version == v1) ? + edma->regs.serq = edma->membase + ((edma->drvdata->version == v1) ? EDMA_SERQ : EDMA64_SERQ); - edma->regs.cerq = edma->membase + ((edma->version == v1) ? + edma->regs.cerq = edma->membase + ((edma->drvdata->version == v1) ? EDMA_CERQ : EDMA64_CERQ); - edma->regs.seei = edma->membase + ((edma->version == v1) ? + edma->regs.seei = edma->membase + ((edma->drvdata->version == v1) ? EDMA_SEEI : EDMA64_SEEI); - edma->regs.ceei = edma->membase + ((edma->version == v1) ? + edma->regs.ceei = edma->membase + ((edma->drvdata->version == v1) ? EDMA_CEEI : EDMA64_CEEI); - edma->regs.cint = edma->membase + ((edma->version == v1) ? + edma->regs.cint = edma->membase + ((edma->drvdata->version == v1) ? EDMA_CINT : EDMA64_CINT); - edma->regs.cerr = edma->membase + ((edma->version == v1) ? + edma->regs.cerr = edma->membase + ((edma->drvdata->version == v1) ? EDMA_CERR : EDMA64_CERR); - edma->regs.ssrt = edma->membase + ((edma->version == v1) ? + edma->regs.ssrt = edma->membase + ((edma->drvdata->version == v1) ? EDMA_SSRT : EDMA64_SSRT); - edma->regs.cdne = edma->membase + ((edma->version == v1) ? + edma->regs.cdne = edma->membase + ((edma->drvdata->version == v1) ? EDMA_CDNE : EDMA64_CDNE); - edma->regs.intl = edma->membase + ((edma->version == v1) ? + edma->regs.intl = edma->membase + ((edma->drvdata->version == v1) ? EDMA_INTR : EDMA64_INTL); - edma->regs.errl = edma->membase + ((edma->version == v1) ? + edma->regs.errl = edma->membase + ((edma->drvdata->version == v1) ? EDMA_ERR : EDMA64_ERRL); - if (edma->version == v2) { + if (edma->drvdata->version == v2) { edma->regs.erqh = edma->membase + EDMA64_ERQH; edma->regs.eeih = edma->membase + EDMA64_EEIH; edma->regs.errh = edma->membase + EDMA64_ERRH; -- cgit v1.2.2 From 78690bf3c4a4dea4c17f86c7ad385b5e9f5cf58b Mon Sep 17 00:00:00 2001 From: Robin Gong Date: Tue, 25 Jun 2019 17:43:20 +0800 Subject: dmaengine: fsl-edma-common: move dmamux register to another single function Prepare for edmav2 on i.mx7ulp whose dmamux register is 32bit. No function impacted. Signed-off-by: Robin Gong Tested-by: Angelo Dureghello Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 07d96894c7c4..ba74e10aa0c2 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -77,6 +77,19 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) } EXPORT_SYMBOL_GPL(fsl_edma_disable_request); +static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr, + u32 off, u32 slot, bool enable) +{ + u8 val8; + + if (enable) + val8 = EDMAMUX_CHCFG_ENBL | slot; + else + val8 = EDMAMUX_CHCFG_DIS; + + iowrite8(val8, addr + off); +} + void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, unsigned int slot, bool enable) { @@ -90,10 +103,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; slot = EDMAMUX_CHCFG_SOURCE(slot); - if (enable) - iowrite8(EDMAMUX_CHCFG_ENBL | slot, muxaddr + ch_off); - else - iowrite8(EDMAMUX_CHCFG_DIS, muxaddr + ch_off); + mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); } EXPORT_SYMBOL_GPL(fsl_edma_chan_mux); -- cgit v1.2.2 From b12650cc5145fa9ccb44a0baea58aa848be92c61 Mon Sep 17 00:00:00 2001 From: Robin Gong Date: Tue, 25 Jun 2019 17:43:21 +0800 Subject: dmaengine: fsl-edma-common: version check for v2 instead The next v3 i.mx7ulp edma is based on v1, so change version check logic for v2 instead. Signed-off-by: Robin Gong Tested-by: Angelo Dureghello Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index ba74e10aa0c2..44d92c34dec3 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -658,26 +658,26 @@ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) edma->regs.erql = edma->membase + EDMA_ERQ; edma->regs.eeil = edma->membase + EDMA_EEI; - edma->regs.serq = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_SERQ : EDMA64_SERQ); - edma->regs.cerq = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_CERQ : EDMA64_CERQ); - edma->regs.seei = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_SEEI : EDMA64_SEEI); - edma->regs.ceei = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_CEEI : EDMA64_CEEI); - edma->regs.cint = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_CINT : EDMA64_CINT); - edma->regs.cerr = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_CERR : EDMA64_CERR); - edma->regs.ssrt = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_SSRT : EDMA64_SSRT); - edma->regs.cdne = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_CDNE : EDMA64_CDNE); - edma->regs.intl = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_INTR : EDMA64_INTL); - edma->regs.errl = edma->membase + ((edma->drvdata->version == v1) ? - EDMA_ERR : EDMA64_ERRL); + edma->regs.serq = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_SERQ : EDMA_SERQ); + edma->regs.cerq = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_CERQ : EDMA_CERQ); + edma->regs.seei = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_SEEI : EDMA_SEEI); + edma->regs.ceei = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_CEEI : EDMA_CEEI); + edma->regs.cint = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_CINT : EDMA_CINT); + edma->regs.cerr = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_CERR : EDMA_CERR); + edma->regs.ssrt = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_SSRT : EDMA_SSRT); + edma->regs.cdne = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_CDNE : EDMA_CDNE); + edma->regs.intl = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_INTL : EDMA_INTR); + edma->regs.errl = edma->membase + ((edma->drvdata->version == v2) ? + EDMA64_ERRL : EDMA_ERR); if (edma->drvdata->version == v2) { edma->regs.erqh = edma->membase + EDMA64_ERQH; -- cgit v1.2.2 From 7144afd025b23b042c158582160d7d2b10a754b7 Mon Sep 17 00:00:00 2001 From: Robin Gong Date: Tue, 25 Jun 2019 17:43:23 +0800 Subject: dmaengine: fsl-edma: add i.mx7ulp edma2 version support Add edma2 for i.mx7ulp by version v3, since v2 has already been used by mcf-edma. The big changes based on v1 are belows: 1. only one dmamux. 2. another clock dma_clk except dmamux clk. 3. 16 independent interrupts instead of only one interrupt for all channels. Signed-off-by: Robin Gong Tested-by: Angelo Dureghello Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 44d92c34dec3..6d6d8a4e8e38 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -90,6 +90,19 @@ static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr, iowrite8(val8, addr + off); } +void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr, + u32 off, u32 slot, bool enable) +{ + u32 val; + + if (enable) + val = EDMAMUX_CHCFG_ENBL << 24 | slot; + else + val = EDMAMUX_CHCFG_DIS; + + iowrite32(val, addr + off * 4); +} + void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, unsigned int slot, bool enable) { @@ -103,7 +116,10 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; slot = EDMAMUX_CHCFG_SOURCE(slot); - mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); + if (fsl_chan->edma->drvdata->version == v3) + mux_configure32(fsl_chan, muxaddr, ch_off, slot, enable); + else + mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); } EXPORT_SYMBOL_GPL(fsl_edma_chan_mux); -- cgit v1.2.2 From 5c274ca4cfb22a455e880f61536b1894fa29fd17 Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Mon, 8 Jul 2019 09:42:55 +0530 Subject: dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support" This reverts commit 7144afd025b2 ("dmaengine: fsl-edma: add i.mx7ulp edma2 version support") as this fails to build with module option due to usage of of_irq_count() which is not an exported symbol as kernel drivers are *not* expected to use it (rightly so). Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 6d6d8a4e8e38..44d92c34dec3 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -90,19 +90,6 @@ static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr, iowrite8(val8, addr + off); } -void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr, - u32 off, u32 slot, bool enable) -{ - u32 val; - - if (enable) - val = EDMAMUX_CHCFG_ENBL << 24 | slot; - else - val = EDMAMUX_CHCFG_DIS; - - iowrite32(val, addr + off * 4); -} - void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, unsigned int slot, bool enable) { @@ -116,10 +103,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; slot = EDMAMUX_CHCFG_SOURCE(slot); - if (fsl_chan->edma->drvdata->version == v3) - mux_configure32(fsl_chan, muxaddr, ch_off, slot, enable); - else - mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); + mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); } EXPORT_SYMBOL_GPL(fsl_edma_chan_mux); -- cgit v1.2.2