summaryrefslogtreecommitdiffstats
path: root/drivers/fpga/zynq-fpga.c
Commit message (Expand)AuthorAge
* fpga zynq: Use the scatterlist interfaceJason Gunthorpe2017-02-10
* fpga zynq: Check the bitstream for validityJason Gunthorpe2017-02-10
* fpga zynq: Check for errors after completing DMAJason Gunthorpe2017-02-10
* fpga zynq: Fix incorrect ISR state on bootupJason Gunthorpe2016-11-29
* fpga zynq: Remove priv->devJason Gunthorpe2016-11-29
* fpga zynq: Add missing \n to messagesJason Gunthorpe2016-11-29
* fpga-mgr: add fpga image information structAlan Tull2016-11-10
* fpga: zynq-fpga: Fix issue with drvdata being overwritten.Moritz Fischer2015-10-23
* fpga: zynq-fpga: Change fw format to handle bin instead of bit.Moritz Fischer2015-10-23
* fpga: zynq-fpga: Fix unbalanced clock handlingMoritz Fischer2015-10-23
* fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000Moritz Fischer2015-10-18
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-09 11:37:46 -0500