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-rw-r--r--include/linux/clk-private.h99
-rw-r--r--include/linux/clk-provider.h120
-rw-r--r--include/linux/clk.h6
-rw-r--r--include/linux/mv643xx_eth.h1
-rw-r--r--include/linux/spi/orion_spi.h17
5 files changed, 130 insertions, 113 deletions
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
index 5e4312b6f5cc..eb3f84bc5325 100644
--- a/include/linux/clk-private.h
+++ b/include/linux/clk-private.h
@@ -30,7 +30,7 @@ struct clk {
30 const struct clk_ops *ops; 30 const struct clk_ops *ops;
31 struct clk_hw *hw; 31 struct clk_hw *hw;
32 struct clk *parent; 32 struct clk *parent;
33 char **parent_names; 33 const char **parent_names;
34 struct clk **parents; 34 struct clk **parents;
35 u8 num_parents; 35 u8 num_parents;
36 unsigned long rate; 36 unsigned long rate;
@@ -55,12 +55,22 @@ struct clk {
55 * alternative macro for static initialization 55 * alternative macro for static initialization
56 */ 56 */
57 57
58extern struct clk_ops clk_fixed_rate_ops; 58#define DEFINE_CLK(_name, _ops, _flags, _parent_names, \
59 _parents) \
60 static struct clk _name = { \
61 .name = #_name, \
62 .ops = &_ops, \
63 .hw = &_name##_hw.hw, \
64 .parent_names = _parent_names, \
65 .num_parents = ARRAY_SIZE(_parent_names), \
66 .parents = _parents, \
67 .flags = _flags, \
68 }
59 69
60#define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \ 70#define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \
61 _fixed_rate_flags) \ 71 _fixed_rate_flags) \
62 static struct clk _name; \ 72 static struct clk _name; \
63 static char *_name##_parent_names[] = {}; \ 73 static const char *_name##_parent_names[] = {}; \
64 static struct clk_fixed_rate _name##_hw = { \ 74 static struct clk_fixed_rate _name##_hw = { \
65 .hw = { \ 75 .hw = { \
66 .clk = &_name, \ 76 .clk = &_name, \
@@ -68,23 +78,14 @@ extern struct clk_ops clk_fixed_rate_ops;
68 .fixed_rate = _rate, \ 78 .fixed_rate = _rate, \
69 .flags = _fixed_rate_flags, \ 79 .flags = _fixed_rate_flags, \
70 }; \ 80 }; \
71 static struct clk _name = { \ 81 DEFINE_CLK(_name, clk_fixed_rate_ops, _flags, \
72 .name = #_name, \ 82 _name##_parent_names, NULL);
73 .ops = &clk_fixed_rate_ops, \
74 .hw = &_name##_hw.hw, \
75 .parent_names = _name##_parent_names, \
76 .num_parents = \
77 ARRAY_SIZE(_name##_parent_names), \
78 .flags = _flags, \
79 };
80
81extern struct clk_ops clk_gate_ops;
82 83
83#define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \ 84#define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \
84 _flags, _reg, _bit_idx, \ 85 _flags, _reg, _bit_idx, \
85 _gate_flags, _lock) \ 86 _gate_flags, _lock) \
86 static struct clk _name; \ 87 static struct clk _name; \
87 static char *_name##_parent_names[] = { \ 88 static const char *_name##_parent_names[] = { \
88 _parent_name, \ 89 _parent_name, \
89 }; \ 90 }; \
90 static struct clk *_name##_parents[] = { \ 91 static struct clk *_name##_parents[] = { \
@@ -99,24 +100,14 @@ extern struct clk_ops clk_gate_ops;
99 .flags = _gate_flags, \ 100 .flags = _gate_flags, \
100 .lock = _lock, \ 101 .lock = _lock, \
101 }; \ 102 }; \
102 static struct clk _name = { \ 103 DEFINE_CLK(_name, clk_gate_ops, _flags, \
103 .name = #_name, \ 104 _name##_parent_names, _name##_parents);
104 .ops = &clk_gate_ops, \
105 .hw = &_name##_hw.hw, \
106 .parent_names = _name##_parent_names, \
107 .num_parents = \
108 ARRAY_SIZE(_name##_parent_names), \
109 .parents = _name##_parents, \
110 .flags = _flags, \
111 };
112
113extern struct clk_ops clk_divider_ops;
114 105
115#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \ 106#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
116 _flags, _reg, _shift, _width, \ 107 _flags, _reg, _shift, _width, \
117 _divider_flags, _lock) \ 108 _divider_flags, _lock) \
118 static struct clk _name; \ 109 static struct clk _name; \
119 static char *_name##_parent_names[] = { \ 110 static const char *_name##_parent_names[] = { \
120 _parent_name, \ 111 _parent_name, \
121 }; \ 112 }; \
122 static struct clk *_name##_parents[] = { \ 113 static struct clk *_name##_parents[] = { \
@@ -132,18 +123,8 @@ extern struct clk_ops clk_divider_ops;
132 .flags = _divider_flags, \ 123 .flags = _divider_flags, \
133 .lock = _lock, \ 124 .lock = _lock, \
134 }; \ 125 }; \
135 static struct clk _name = { \ 126 DEFINE_CLK(_name, clk_divider_ops, _flags, \
136 .name = #_name, \ 127 _name##_parent_names, _name##_parents);
137 .ops = &clk_divider_ops, \
138 .hw = &_name##_hw.hw, \
139 .parent_names = _name##_parent_names, \
140 .num_parents = \
141 ARRAY_SIZE(_name##_parent_names), \
142 .parents = _name##_parents, \
143 .flags = _flags, \
144 };
145
146extern struct clk_ops clk_mux_ops;
147 128
148#define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \ 129#define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \
149 _reg, _shift, _width, \ 130 _reg, _shift, _width, \
@@ -159,16 +140,28 @@ extern struct clk_ops clk_mux_ops;
159 .flags = _mux_flags, \ 140 .flags = _mux_flags, \
160 .lock = _lock, \ 141 .lock = _lock, \
161 }; \ 142 }; \
162 static struct clk _name = { \ 143 DEFINE_CLK(_name, clk_mux_ops, _flags, _parent_names, \
163 .name = #_name, \ 144 _parents);
164 .ops = &clk_mux_ops, \ 145
165 .hw = &_name##_hw.hw, \ 146#define DEFINE_CLK_FIXED_FACTOR(_name, _parent_name, \
166 .parent_names = _parent_names, \ 147 _parent_ptr, _flags, \
167 .num_parents = \ 148 _mult, _div) \
168 ARRAY_SIZE(_parent_names), \ 149 static struct clk _name; \
169 .parents = _parents, \ 150 static const char *_name##_parent_names[] = { \
170 .flags = _flags, \ 151 _parent_name, \
171 }; 152 }; \
153 static struct clk *_name##_parents[] = { \
154 _parent_ptr, \
155 }; \
156 static struct clk_fixed_factor _name##_hw = { \
157 .hw = { \
158 .clk = &_name, \
159 }, \
160 .mult = _mult, \
161 .div = _div, \
162 }; \
163 DEFINE_CLK(_name, clk_fixed_factor_ops, _flags, \
164 _name##_parent_names, _name##_parents);
172 165
173/** 166/**
174 * __clk_init - initialize the data structures in a struct clk 167 * __clk_init - initialize the data structures in a struct clk
@@ -189,8 +182,12 @@ extern struct clk_ops clk_mux_ops;
189 * 182 *
190 * It is not necessary to call clk_register if __clk_init is used directly with 183 * It is not necessary to call clk_register if __clk_init is used directly with
191 * statically initialized clock data. 184 * statically initialized clock data.
185 *
186 * Returns 0 on success, otherwise an error code.
192 */ 187 */
193void __clk_init(struct device *dev, struct clk *clk); 188int __clk_init(struct device *dev, struct clk *clk);
189
190struct clk *__clk_register(struct device *dev, struct clk_hw *hw);
194 191
195#endif /* CONFIG_COMMON_CLK */ 192#endif /* CONFIG_COMMON_CLK */
196#endif /* CLK_PRIVATE_H */ 193#endif /* CLK_PRIVATE_H */
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 5508897ad376..4a0b483986c3 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -15,19 +15,6 @@
15 15
16#ifdef CONFIG_COMMON_CLK 16#ifdef CONFIG_COMMON_CLK
17 17
18/**
19 * struct clk_hw - handle for traversing from a struct clk to its corresponding
20 * hardware-specific structure. struct clk_hw should be declared within struct
21 * clk_foo and then referenced by the struct clk instance that uses struct
22 * clk_foo's clk_ops
23 *
24 * clk: pointer to the struct clk instance that points back to this struct
25 * clk_hw instance
26 */
27struct clk_hw {
28 struct clk *clk;
29};
30
31/* 18/*
32 * flags used across common struct clk. these flags should only affect the 19 * flags used across common struct clk. these flags should only affect the
33 * top-level framework. custom flags for dealing with hardware specifics 20 * top-level framework. custom flags for dealing with hardware specifics
@@ -39,6 +26,8 @@ struct clk_hw {
39#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */ 26#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */
40#define CLK_IS_ROOT BIT(4) /* root clk, has no parent */ 27#define CLK_IS_ROOT BIT(4) /* root clk, has no parent */
41 28
29struct clk_hw;
30
42/** 31/**
43 * struct clk_ops - Callback operations for hardware clocks; these are to 32 * struct clk_ops - Callback operations for hardware clocks; these are to
44 * be provided by the clock implementation, and will be called by drivers 33 * be provided by the clock implementation, and will be called by drivers
@@ -88,19 +77,11 @@ struct clk_hw {
88 * array index into the value programmed into the hardware. 77 * array index into the value programmed into the hardware.
89 * Returns 0 on success, -EERROR otherwise. 78 * Returns 0 on success, -EERROR otherwise.
90 * 79 *
91 * @set_rate: Change the rate of this clock. If this callback returns 80 * @set_rate: Change the rate of this clock. The requested rate is specified
92 * CLK_SET_RATE_PARENT, the rate change will be propagated to the 81 * by the second argument, which should typically be the return
93 * parent clock (which may propagate again if the parent clock 82 * of .round_rate call. The third argument gives the parent rate
94 * also sets this flag). The requested rate of the parent is 83 * which is likely helpful for most .set_rate implementation.
95 * passed back from the callback in the second 'unsigned long *' 84 * Returns 0 on success, -EERROR otherwise.
96 * argument. Note that it is up to the hardware clock's set_rate
97 * implementation to insure that clocks do not run out of spec
98 * when propgating the call to set_rate up to the parent. One way
99 * to do this is to gate the clock (via clk_disable and/or
100 * clk_unprepare) before calling clk_set_rate, then ungating it
101 * afterward. If your clock also has the CLK_GATE_SET_RATE flag
102 * set then this will insure safety. Returns 0 on success,
103 * -EERROR otherwise.
104 * 85 *
105 * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow 86 * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
106 * implementations to split any work between atomic (enable) and sleepable 87 * implementations to split any work between atomic (enable) and sleepable
@@ -125,10 +106,46 @@ struct clk_ops {
125 unsigned long *); 106 unsigned long *);
126 int (*set_parent)(struct clk_hw *hw, u8 index); 107 int (*set_parent)(struct clk_hw *hw, u8 index);
127 u8 (*get_parent)(struct clk_hw *hw); 108 u8 (*get_parent)(struct clk_hw *hw);
128 int (*set_rate)(struct clk_hw *hw, unsigned long); 109 int (*set_rate)(struct clk_hw *hw, unsigned long,
110 unsigned long);
129 void (*init)(struct clk_hw *hw); 111 void (*init)(struct clk_hw *hw);
130}; 112};
131 113
114/**
115 * struct clk_init_data - holds init data that's common to all clocks and is
116 * shared between the clock provider and the common clock framework.
117 *
118 * @name: clock name
119 * @ops: operations this clock supports
120 * @parent_names: array of string names for all possible parents
121 * @num_parents: number of possible parents
122 * @flags: framework-level hints and quirks
123 */
124struct clk_init_data {
125 const char *name;
126 const struct clk_ops *ops;
127 const char **parent_names;
128 u8 num_parents;
129 unsigned long flags;
130};
131
132/**
133 * struct clk_hw - handle for traversing from a struct clk to its corresponding
134 * hardware-specific structure. struct clk_hw should be declared within struct
135 * clk_foo and then referenced by the struct clk instance that uses struct
136 * clk_foo's clk_ops
137 *
138 * @clk: pointer to the struct clk instance that points back to this struct
139 * clk_hw instance
140 *
141 * @init: pointer to struct clk_init_data that contains the init data shared
142 * with the common clock framework.
143 */
144struct clk_hw {
145 struct clk *clk;
146 struct clk_init_data *init;
147};
148
132/* 149/*
133 * DOC: Basic clock implementations common to many platforms 150 * DOC: Basic clock implementations common to many platforms
134 * 151 *
@@ -149,6 +166,7 @@ struct clk_fixed_rate {
149 u8 flags; 166 u8 flags;
150}; 167};
151 168
169extern const struct clk_ops clk_fixed_rate_ops;
152struct clk *clk_register_fixed_rate(struct device *dev, const char *name, 170struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
153 const char *parent_name, unsigned long flags, 171 const char *parent_name, unsigned long flags,
154 unsigned long fixed_rate); 172 unsigned long fixed_rate);
@@ -165,7 +183,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
165 * Clock which can gate its output. Implements .enable & .disable 183 * Clock which can gate its output. Implements .enable & .disable
166 * 184 *
167 * Flags: 185 * Flags:
168 * CLK_GATE_SET_DISABLE - by default this clock sets the bit at bit_idx to 186 * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
169 * enable the clock. Setting this flag does the opposite: setting the bit 187 * enable the clock. Setting this flag does the opposite: setting the bit
170 * disable the clock and clearing it enables the clock 188 * disable the clock and clearing it enables the clock
171 */ 189 */
@@ -175,11 +193,11 @@ struct clk_gate {
175 u8 bit_idx; 193 u8 bit_idx;
176 u8 flags; 194 u8 flags;
177 spinlock_t *lock; 195 spinlock_t *lock;
178 char *parent[1];
179}; 196};
180 197
181#define CLK_GATE_SET_TO_DISABLE BIT(0) 198#define CLK_GATE_SET_TO_DISABLE BIT(0)
182 199
200extern const struct clk_ops clk_gate_ops;
183struct clk *clk_register_gate(struct device *dev, const char *name, 201struct clk *clk_register_gate(struct device *dev, const char *name,
184 const char *parent_name, unsigned long flags, 202 const char *parent_name, unsigned long flags,
185 void __iomem *reg, u8 bit_idx, 203 void __iomem *reg, u8 bit_idx,
@@ -212,12 +230,12 @@ struct clk_divider {
212 u8 width; 230 u8 width;
213 u8 flags; 231 u8 flags;
214 spinlock_t *lock; 232 spinlock_t *lock;
215 char *parent[1];
216}; 233};
217 234
218#define CLK_DIVIDER_ONE_BASED BIT(0) 235#define CLK_DIVIDER_ONE_BASED BIT(0)
219#define CLK_DIVIDER_POWER_OF_TWO BIT(1) 236#define CLK_DIVIDER_POWER_OF_TWO BIT(1)
220 237
238extern const struct clk_ops clk_divider_ops;
221struct clk *clk_register_divider(struct device *dev, const char *name, 239struct clk *clk_register_divider(struct device *dev, const char *name,
222 const char *parent_name, unsigned long flags, 240 const char *parent_name, unsigned long flags,
223 void __iomem *reg, u8 shift, u8 width, 241 void __iomem *reg, u8 shift, u8 width,
@@ -238,7 +256,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
238 * 256 *
239 * Flags: 257 * Flags:
240 * CLK_MUX_INDEX_ONE - register index starts at 1, not 0 258 * CLK_MUX_INDEX_ONE - register index starts at 1, not 0
241 * CLK_MUX_INDEX_BITWISE - register index is a single bit (power of two) 259 * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
242 */ 260 */
243struct clk_mux { 261struct clk_mux {
244 struct clk_hw hw; 262 struct clk_hw hw;
@@ -252,29 +270,49 @@ struct clk_mux {
252#define CLK_MUX_INDEX_ONE BIT(0) 270#define CLK_MUX_INDEX_ONE BIT(0)
253#define CLK_MUX_INDEX_BIT BIT(1) 271#define CLK_MUX_INDEX_BIT BIT(1)
254 272
273extern const struct clk_ops clk_mux_ops;
255struct clk *clk_register_mux(struct device *dev, const char *name, 274struct clk *clk_register_mux(struct device *dev, const char *name,
256 char **parent_names, u8 num_parents, unsigned long flags, 275 const char **parent_names, u8 num_parents, unsigned long flags,
257 void __iomem *reg, u8 shift, u8 width, 276 void __iomem *reg, u8 shift, u8 width,
258 u8 clk_mux_flags, spinlock_t *lock); 277 u8 clk_mux_flags, spinlock_t *lock);
259 278
260/** 279/**
280 * struct clk_fixed_factor - fixed multiplier and divider clock
281 *
282 * @hw: handle between common and hardware-specific interfaces
283 * @mult: multiplier
284 * @div: divider
285 *
286 * Clock with a fixed multiplier and divider. The output frequency is the
287 * parent clock rate divided by div and multiplied by mult.
288 * Implements .recalc_rate, .set_rate and .round_rate
289 */
290
291struct clk_fixed_factor {
292 struct clk_hw hw;
293 unsigned int mult;
294 unsigned int div;
295};
296
297extern struct clk_ops clk_fixed_factor_ops;
298struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
299 const char *parent_name, unsigned long flags,
300 unsigned int mult, unsigned int div);
301
302/**
261 * clk_register - allocate a new clock, register it and return an opaque cookie 303 * clk_register - allocate a new clock, register it and return an opaque cookie
262 * @dev: device that is registering this clock 304 * @dev: device that is registering this clock
263 * @name: clock name
264 * @ops: operations this clock supports
265 * @hw: link to hardware-specific clock data 305 * @hw: link to hardware-specific clock data
266 * @parent_names: array of string names for all possible parents
267 * @num_parents: number of possible parents
268 * @flags: framework-level hints and quirks
269 * 306 *
270 * clk_register is the primary interface for populating the clock tree with new 307 * clk_register is the primary interface for populating the clock tree with new
271 * clock nodes. It returns a pointer to the newly allocated struct clk which 308 * clock nodes. It returns a pointer to the newly allocated struct clk which
272 * cannot be dereferenced by driver code but may be used in conjuction with the 309 * cannot be dereferenced by driver code but may be used in conjuction with the
273 * rest of the clock API. 310 * rest of the clock API. In the event of an error clk_register will return an
311 * error code; drivers must test for an error code after calling clk_register.
274 */ 312 */
275struct clk *clk_register(struct device *dev, const char *name, 313struct clk *clk_register(struct device *dev, struct clk_hw *hw);
276 const struct clk_ops *ops, struct clk_hw *hw, 314
277 char **parent_names, u8 num_parents, unsigned long flags); 315void clk_unregister(struct clk *clk);
278 316
279/* helper functions */ 317/* helper functions */
280const char *__clk_get_name(struct clk *clk); 318const char *__clk_get_name(struct clk *clk);
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 70cf722ac3af..ad5c43e8ae8a 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -81,7 +81,7 @@ int clk_notifier_register(struct clk *clk, struct notifier_block *nb);
81 81
82int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb); 82int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb);
83 83
84#endif /* !CONFIG_COMMON_CLK */ 84#endif
85 85
86/** 86/**
87 * clk_get - lookup and obtain a reference to a clock producer. 87 * clk_get - lookup and obtain a reference to a clock producer.
@@ -252,7 +252,7 @@ void devm_clk_put(struct device *dev, struct clk *clk);
252 * Returns rounded clock rate in Hz, or negative errno. 252 * Returns rounded clock rate in Hz, or negative errno.
253 */ 253 */
254long clk_round_rate(struct clk *clk, unsigned long rate); 254long clk_round_rate(struct clk *clk, unsigned long rate);
255 255
256/** 256/**
257 * clk_set_rate - set the clock rate for a clock source 257 * clk_set_rate - set the clock rate for a clock source
258 * @clk: clock source 258 * @clk: clock source
@@ -261,7 +261,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate);
261 * Returns success (0) or negative errno. 261 * Returns success (0) or negative errno.
262 */ 262 */
263int clk_set_rate(struct clk *clk, unsigned long rate); 263int clk_set_rate(struct clk *clk, unsigned long rate);
264 264
265/** 265/**
266 * clk_set_parent - set the parent clock source for this clock 266 * clk_set_parent - set the parent clock source for this clock
267 * @clk: clock source 267 * @clk: clock source
diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h
index 30b0c4e78f91..51bf8ada6dc0 100644
--- a/include/linux/mv643xx_eth.h
+++ b/include/linux/mv643xx_eth.h
@@ -18,7 +18,6 @@
18struct mv643xx_eth_shared_platform_data { 18struct mv643xx_eth_shared_platform_data {
19 struct mbus_dram_target_info *dram; 19 struct mbus_dram_target_info *dram;
20 struct platform_device *shared_smi; 20 struct platform_device *shared_smi;
21 unsigned int t_clk;
22 /* 21 /*
23 * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default 22 * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default
24 * limit of 9KiB will be used. 23 * limit of 9KiB will be used.
diff --git a/include/linux/spi/orion_spi.h b/include/linux/spi/orion_spi.h
deleted file mode 100644
index b4d9fa6f797c..000000000000
--- a/include/linux/spi/orion_spi.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * orion_spi.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __LINUX_SPI_ORION_SPI_H
10#define __LINUX_SPI_ORION_SPI_H
11
12struct orion_spi_info {
13 u32 tclk; /* no <linux/clk.h> support yet */
14};
15
16
17#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-15 02:27:42 -0500