diff options
Diffstat (limited to 'drivers/spi/spi-pxa2xx.c')
-rw-r--r-- | drivers/spi/spi-pxa2xx.c | 156 |
1 files changed, 78 insertions, 78 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index d84b893a64d7..69e874a2ad1e 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c | |||
@@ -328,7 +328,7 @@ static void lpss_ssp_setup(struct driver_data *drv_data) | |||
328 | __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); | 328 | __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); |
329 | 329 | ||
330 | /* Enable multiblock DMA transfers */ | 330 | /* Enable multiblock DMA transfers */ |
331 | if (drv_data->master_info->enable_dma) { | 331 | if (drv_data->controller_info->enable_dma) { |
332 | __lpss_ssp_write_priv(drv_data, config->reg_ssp, 1); | 332 | __lpss_ssp_write_priv(drv_data, config->reg_ssp, 1); |
333 | 333 | ||
334 | if (config->reg_general >= 0) { | 334 | if (config->reg_general >= 0) { |
@@ -368,7 +368,7 @@ static void lpss_ssp_select_cs(struct spi_device *spi, | |||
368 | __lpss_ssp_write_priv(drv_data, | 368 | __lpss_ssp_write_priv(drv_data, |
369 | config->reg_cs_ctrl, value); | 369 | config->reg_cs_ctrl, value); |
370 | ndelay(1000000000 / | 370 | ndelay(1000000000 / |
371 | (drv_data->master->max_speed_hz / 2)); | 371 | (drv_data->controller->max_speed_hz / 2)); |
372 | } | 372 | } |
373 | } | 373 | } |
374 | 374 | ||
@@ -567,7 +567,7 @@ static int u32_reader(struct driver_data *drv_data) | |||
567 | static void reset_sccr1(struct driver_data *drv_data) | 567 | static void reset_sccr1(struct driver_data *drv_data) |
568 | { | 568 | { |
569 | struct chip_data *chip = | 569 | struct chip_data *chip = |
570 | spi_get_ctldata(drv_data->master->cur_msg->spi); | 570 | spi_get_ctldata(drv_data->controller->cur_msg->spi); |
571 | u32 sccr1_reg; | 571 | u32 sccr1_reg; |
572 | 572 | ||
573 | sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1; | 573 | sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1; |
@@ -599,8 +599,8 @@ static void int_error_stop(struct driver_data *drv_data, const char* msg) | |||
599 | 599 | ||
600 | dev_err(&drv_data->pdev->dev, "%s\n", msg); | 600 | dev_err(&drv_data->pdev->dev, "%s\n", msg); |
601 | 601 | ||
602 | drv_data->master->cur_msg->status = -EIO; | 602 | drv_data->controller->cur_msg->status = -EIO; |
603 | spi_finalize_current_transfer(drv_data->master); | 603 | spi_finalize_current_transfer(drv_data->controller); |
604 | } | 604 | } |
605 | 605 | ||
606 | static void int_transfer_complete(struct driver_data *drv_data) | 606 | static void int_transfer_complete(struct driver_data *drv_data) |
@@ -611,7 +611,7 @@ static void int_transfer_complete(struct driver_data *drv_data) | |||
611 | if (!pxa25x_ssp_comp(drv_data)) | 611 | if (!pxa25x_ssp_comp(drv_data)) |
612 | pxa2xx_spi_write(drv_data, SSTO, 0); | 612 | pxa2xx_spi_write(drv_data, SSTO, 0); |
613 | 613 | ||
614 | spi_finalize_current_transfer(drv_data->master); | 614 | spi_finalize_current_transfer(drv_data->controller); |
615 | } | 615 | } |
616 | 616 | ||
617 | static irqreturn_t interrupt_transfer(struct driver_data *drv_data) | 617 | static irqreturn_t interrupt_transfer(struct driver_data *drv_data) |
@@ -747,7 +747,7 @@ static irqreturn_t ssp_int(int irq, void *dev_id) | |||
747 | pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg & ~drv_data->int_cr1); | 747 | pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg & ~drv_data->int_cr1); |
748 | pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); | 748 | pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); |
749 | 749 | ||
750 | if (!drv_data->master->cur_msg) { | 750 | if (!drv_data->controller->cur_msg) { |
751 | handle_bad_msg(drv_data); | 751 | handle_bad_msg(drv_data); |
752 | /* Never fail */ | 752 | /* Never fail */ |
753 | return IRQ_HANDLED; | 753 | return IRQ_HANDLED; |
@@ -879,7 +879,7 @@ static unsigned int quark_x1000_get_clk_div(int rate, u32 *dds) | |||
879 | 879 | ||
880 | static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate) | 880 | static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate) |
881 | { | 881 | { |
882 | unsigned long ssp_clk = drv_data->master->max_speed_hz; | 882 | unsigned long ssp_clk = drv_data->controller->max_speed_hz; |
883 | const struct ssp_device *ssp = drv_data->ssp; | 883 | const struct ssp_device *ssp = drv_data->ssp; |
884 | 884 | ||
885 | rate = min_t(int, ssp_clk, rate); | 885 | rate = min_t(int, ssp_clk, rate); |
@@ -894,7 +894,7 @@ static unsigned int pxa2xx_ssp_get_clk_div(struct driver_data *drv_data, | |||
894 | int rate) | 894 | int rate) |
895 | { | 895 | { |
896 | struct chip_data *chip = | 896 | struct chip_data *chip = |
897 | spi_get_ctldata(drv_data->master->cur_msg->spi); | 897 | spi_get_ctldata(drv_data->controller->cur_msg->spi); |
898 | unsigned int clk_div; | 898 | unsigned int clk_div; |
899 | 899 | ||
900 | switch (drv_data->ssp_type) { | 900 | switch (drv_data->ssp_type) { |
@@ -908,7 +908,7 @@ static unsigned int pxa2xx_ssp_get_clk_div(struct driver_data *drv_data, | |||
908 | return clk_div << 8; | 908 | return clk_div << 8; |
909 | } | 909 | } |
910 | 910 | ||
911 | static bool pxa2xx_spi_can_dma(struct spi_controller *master, | 911 | static bool pxa2xx_spi_can_dma(struct spi_controller *controller, |
912 | struct spi_device *spi, | 912 | struct spi_device *spi, |
913 | struct spi_transfer *xfer) | 913 | struct spi_transfer *xfer) |
914 | { | 914 | { |
@@ -919,12 +919,12 @@ static bool pxa2xx_spi_can_dma(struct spi_controller *master, | |||
919 | xfer->len >= chip->dma_burst_size; | 919 | xfer->len >= chip->dma_burst_size; |
920 | } | 920 | } |
921 | 921 | ||
922 | static int pxa2xx_spi_transfer_one(struct spi_controller *master, | 922 | static int pxa2xx_spi_transfer_one(struct spi_controller *controller, |
923 | struct spi_device *spi, | 923 | struct spi_device *spi, |
924 | struct spi_transfer *transfer) | 924 | struct spi_transfer *transfer) |
925 | { | 925 | { |
926 | struct driver_data *drv_data = spi_controller_get_devdata(master); | 926 | struct driver_data *drv_data = spi_controller_get_devdata(controller); |
927 | struct spi_message *message = master->cur_msg; | 927 | struct spi_message *message = controller->cur_msg; |
928 | struct chip_data *chip = spi_get_ctldata(message->spi); | 928 | struct chip_data *chip = spi_get_ctldata(message->spi); |
929 | u32 dma_thresh = chip->dma_threshold; | 929 | u32 dma_thresh = chip->dma_threshold; |
930 | u32 dma_burst = chip->dma_burst_size; | 930 | u32 dma_burst = chip->dma_burst_size; |
@@ -1006,9 +1006,9 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, | |||
1006 | "DMA burst size reduced to match bits_per_word\n"); | 1006 | "DMA burst size reduced to match bits_per_word\n"); |
1007 | } | 1007 | } |
1008 | 1008 | ||
1009 | dma_mapped = master->can_dma && | 1009 | dma_mapped = controller->can_dma && |
1010 | master->can_dma(master, message->spi, transfer) && | 1010 | controller->can_dma(controller, message->spi, transfer) && |
1011 | master->cur_msg_mapped; | 1011 | controller->cur_msg_mapped; |
1012 | if (dma_mapped) { | 1012 | if (dma_mapped) { |
1013 | 1013 | ||
1014 | /* Ensure we have the correct interrupt handler */ | 1014 | /* Ensure we have the correct interrupt handler */ |
@@ -1036,12 +1036,12 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, | |||
1036 | cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits); | 1036 | cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits); |
1037 | if (!pxa25x_ssp_comp(drv_data)) | 1037 | if (!pxa25x_ssp_comp(drv_data)) |
1038 | dev_dbg(&message->spi->dev, "%u Hz actual, %s\n", | 1038 | dev_dbg(&message->spi->dev, "%u Hz actual, %s\n", |
1039 | master->max_speed_hz | 1039 | controller->max_speed_hz |
1040 | / (1 + ((cr0 & SSCR0_SCR(0xfff)) >> 8)), | 1040 | / (1 + ((cr0 & SSCR0_SCR(0xfff)) >> 8)), |
1041 | dma_mapped ? "DMA" : "PIO"); | 1041 | dma_mapped ? "DMA" : "PIO"); |
1042 | else | 1042 | else |
1043 | dev_dbg(&message->spi->dev, "%u Hz actual, %s\n", | 1043 | dev_dbg(&message->spi->dev, "%u Hz actual, %s\n", |
1044 | master->max_speed_hz / 2 | 1044 | controller->max_speed_hz / 2 |
1045 | / (1 + ((cr0 & SSCR0_SCR(0x0ff)) >> 8)), | 1045 | / (1 + ((cr0 & SSCR0_SCR(0x0ff)) >> 8)), |
1046 | dma_mapped ? "DMA" : "PIO"); | 1046 | dma_mapped ? "DMA" : "PIO"); |
1047 | 1047 | ||
@@ -1092,7 +1092,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, | |||
1092 | } | 1092 | } |
1093 | } | 1093 | } |
1094 | 1094 | ||
1095 | if (spi_controller_is_slave(master)) { | 1095 | if (spi_controller_is_slave(controller)) { |
1096 | while (drv_data->write(drv_data)) | 1096 | while (drv_data->write(drv_data)) |
1097 | ; | 1097 | ; |
1098 | if (drv_data->gpiod_ready) { | 1098 | if (drv_data->gpiod_ready) { |
@@ -1111,9 +1111,9 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, | |||
1111 | return 1; | 1111 | return 1; |
1112 | } | 1112 | } |
1113 | 1113 | ||
1114 | static int pxa2xx_spi_slave_abort(struct spi_master *master) | 1114 | static int pxa2xx_spi_slave_abort(struct spi_controller *controller) |
1115 | { | 1115 | { |
1116 | struct driver_data *drv_data = spi_controller_get_devdata(master); | 1116 | struct driver_data *drv_data = spi_controller_get_devdata(controller); |
1117 | 1117 | ||
1118 | /* Stop and reset SSP */ | 1118 | /* Stop and reset SSP */ |
1119 | write_SSSR_CS(drv_data, drv_data->clear_sr); | 1119 | write_SSSR_CS(drv_data, drv_data->clear_sr); |
@@ -1126,16 +1126,16 @@ static int pxa2xx_spi_slave_abort(struct spi_master *master) | |||
1126 | 1126 | ||
1127 | dev_dbg(&drv_data->pdev->dev, "transfer aborted\n"); | 1127 | dev_dbg(&drv_data->pdev->dev, "transfer aborted\n"); |
1128 | 1128 | ||
1129 | drv_data->master->cur_msg->status = -EINTR; | 1129 | drv_data->controller->cur_msg->status = -EINTR; |
1130 | spi_finalize_current_transfer(drv_data->master); | 1130 | spi_finalize_current_transfer(drv_data->controller); |
1131 | 1131 | ||
1132 | return 0; | 1132 | return 0; |
1133 | } | 1133 | } |
1134 | 1134 | ||
1135 | static void pxa2xx_spi_handle_err(struct spi_controller *master, | 1135 | static void pxa2xx_spi_handle_err(struct spi_controller *controller, |
1136 | struct spi_message *msg) | 1136 | struct spi_message *msg) |
1137 | { | 1137 | { |
1138 | struct driver_data *drv_data = spi_controller_get_devdata(master); | 1138 | struct driver_data *drv_data = spi_controller_get_devdata(controller); |
1139 | 1139 | ||
1140 | /* Disable the SSP */ | 1140 | /* Disable the SSP */ |
1141 | pxa2xx_spi_write(drv_data, SSCR0, | 1141 | pxa2xx_spi_write(drv_data, SSCR0, |
@@ -1159,9 +1159,9 @@ static void pxa2xx_spi_handle_err(struct spi_controller *master, | |||
1159 | pxa2xx_spi_dma_stop(drv_data); | 1159 | pxa2xx_spi_dma_stop(drv_data); |
1160 | } | 1160 | } |
1161 | 1161 | ||
1162 | static int pxa2xx_spi_unprepare_transfer(struct spi_controller *master) | 1162 | static int pxa2xx_spi_unprepare_transfer(struct spi_controller *controller) |
1163 | { | 1163 | { |
1164 | struct driver_data *drv_data = spi_controller_get_devdata(master); | 1164 | struct driver_data *drv_data = spi_controller_get_devdata(controller); |
1165 | 1165 | ||
1166 | /* Disable the SSP now */ | 1166 | /* Disable the SSP now */ |
1167 | pxa2xx_spi_write(drv_data, SSCR0, | 1167 | pxa2xx_spi_write(drv_data, SSCR0, |
@@ -1260,7 +1260,7 @@ static int setup(struct spi_device *spi) | |||
1260 | break; | 1260 | break; |
1261 | default: | 1261 | default: |
1262 | tx_hi_thres = 0; | 1262 | tx_hi_thres = 0; |
1263 | if (spi_controller_is_slave(drv_data->master)) { | 1263 | if (spi_controller_is_slave(drv_data->controller)) { |
1264 | tx_thres = 1; | 1264 | tx_thres = 1; |
1265 | rx_thres = 2; | 1265 | rx_thres = 2; |
1266 | } else { | 1266 | } else { |
@@ -1287,7 +1287,7 @@ static int setup(struct spi_device *spi) | |||
1287 | 1287 | ||
1288 | chip->frm = spi->chip_select; | 1288 | chip->frm = spi->chip_select; |
1289 | } | 1289 | } |
1290 | chip->enable_dma = drv_data->master_info->enable_dma; | 1290 | chip->enable_dma = drv_data->controller_info->enable_dma; |
1291 | chip->timeout = TIMOUT_DFLT; | 1291 | chip->timeout = TIMOUT_DFLT; |
1292 | } | 1292 | } |
1293 | 1293 | ||
@@ -1310,7 +1310,7 @@ static int setup(struct spi_device *spi) | |||
1310 | if (chip_info->enable_loopback) | 1310 | if (chip_info->enable_loopback) |
1311 | chip->cr1 = SSCR1_LBM; | 1311 | chip->cr1 = SSCR1_LBM; |
1312 | } | 1312 | } |
1313 | if (spi_controller_is_slave(drv_data->master)) { | 1313 | if (spi_controller_is_slave(drv_data->controller)) { |
1314 | chip->cr1 |= SSCR1_SCFR; | 1314 | chip->cr1 |= SSCR1_SCFR; |
1315 | chip->cr1 |= SSCR1_SCLKDIR; | 1315 | chip->cr1 |= SSCR1_SCLKDIR; |
1316 | chip->cr1 |= SSCR1_SFRMDIR; | 1316 | chip->cr1 |= SSCR1_SFRMDIR; |
@@ -1497,10 +1497,10 @@ static bool pxa2xx_spi_idma_filter(struct dma_chan *chan, void *param) | |||
1497 | 1497 | ||
1498 | #endif /* CONFIG_PCI */ | 1498 | #endif /* CONFIG_PCI */ |
1499 | 1499 | ||
1500 | static struct pxa2xx_spi_master * | 1500 | static struct pxa2xx_spi_controller * |
1501 | pxa2xx_spi_init_pdata(struct platform_device *pdev) | 1501 | pxa2xx_spi_init_pdata(struct platform_device *pdev) |
1502 | { | 1502 | { |
1503 | struct pxa2xx_spi_master *pdata; | 1503 | struct pxa2xx_spi_controller *pdata; |
1504 | struct acpi_device *adev; | 1504 | struct acpi_device *adev; |
1505 | struct ssp_device *ssp; | 1505 | struct ssp_device *ssp; |
1506 | struct resource *res; | 1506 | struct resource *res; |
@@ -1568,10 +1568,10 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) | |||
1568 | return pdata; | 1568 | return pdata; |
1569 | } | 1569 | } |
1570 | 1570 | ||
1571 | static int pxa2xx_spi_fw_translate_cs(struct spi_controller *master, | 1571 | static int pxa2xx_spi_fw_translate_cs(struct spi_controller *controller, |
1572 | unsigned int cs) | 1572 | unsigned int cs) |
1573 | { | 1573 | { |
1574 | struct driver_data *drv_data = spi_controller_get_devdata(master); | 1574 | struct driver_data *drv_data = spi_controller_get_devdata(controller); |
1575 | 1575 | ||
1576 | if (has_acpi_companion(&drv_data->pdev->dev)) { | 1576 | if (has_acpi_companion(&drv_data->pdev->dev)) { |
1577 | switch (drv_data->ssp_type) { | 1577 | switch (drv_data->ssp_type) { |
@@ -1595,8 +1595,8 @@ static int pxa2xx_spi_fw_translate_cs(struct spi_controller *master, | |||
1595 | static int pxa2xx_spi_probe(struct platform_device *pdev) | 1595 | static int pxa2xx_spi_probe(struct platform_device *pdev) |
1596 | { | 1596 | { |
1597 | struct device *dev = &pdev->dev; | 1597 | struct device *dev = &pdev->dev; |
1598 | struct pxa2xx_spi_master *platform_info; | 1598 | struct pxa2xx_spi_controller *platform_info; |
1599 | struct spi_controller *master; | 1599 | struct spi_controller *controller; |
1600 | struct driver_data *drv_data; | 1600 | struct driver_data *drv_data; |
1601 | struct ssp_device *ssp; | 1601 | struct ssp_device *ssp; |
1602 | const struct lpss_config *config; | 1602 | const struct lpss_config *config; |
@@ -1622,37 +1622,37 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1622 | } | 1622 | } |
1623 | 1623 | ||
1624 | if (platform_info->is_slave) | 1624 | if (platform_info->is_slave) |
1625 | master = spi_alloc_slave(dev, sizeof(struct driver_data)); | 1625 | controller = spi_alloc_slave(dev, sizeof(struct driver_data)); |
1626 | else | 1626 | else |
1627 | master = spi_alloc_master(dev, sizeof(struct driver_data)); | 1627 | controller = spi_alloc_master(dev, sizeof(struct driver_data)); |
1628 | 1628 | ||
1629 | if (!master) { | 1629 | if (!controller) { |
1630 | dev_err(&pdev->dev, "cannot alloc spi_master\n"); | 1630 | dev_err(&pdev->dev, "cannot alloc spi_controller\n"); |
1631 | pxa_ssp_free(ssp); | 1631 | pxa_ssp_free(ssp); |
1632 | return -ENOMEM; | 1632 | return -ENOMEM; |
1633 | } | 1633 | } |
1634 | drv_data = spi_controller_get_devdata(master); | 1634 | drv_data = spi_controller_get_devdata(controller); |
1635 | drv_data->master = master; | 1635 | drv_data->controller = controller; |
1636 | drv_data->master_info = platform_info; | 1636 | drv_data->controller_info = platform_info; |
1637 | drv_data->pdev = pdev; | 1637 | drv_data->pdev = pdev; |
1638 | drv_data->ssp = ssp; | 1638 | drv_data->ssp = ssp; |
1639 | 1639 | ||
1640 | master->dev.of_node = pdev->dev.of_node; | 1640 | controller->dev.of_node = pdev->dev.of_node; |
1641 | /* the spi->mode bits understood by this driver: */ | 1641 | /* the spi->mode bits understood by this driver: */ |
1642 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; | 1642 | controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; |
1643 | 1643 | ||
1644 | master->bus_num = ssp->port_id; | 1644 | controller->bus_num = ssp->port_id; |
1645 | master->dma_alignment = DMA_ALIGNMENT; | 1645 | controller->dma_alignment = DMA_ALIGNMENT; |
1646 | master->cleanup = cleanup; | 1646 | controller->cleanup = cleanup; |
1647 | master->setup = setup; | 1647 | controller->setup = setup; |
1648 | master->set_cs = pxa2xx_spi_set_cs; | 1648 | controller->set_cs = pxa2xx_spi_set_cs; |
1649 | master->transfer_one = pxa2xx_spi_transfer_one; | 1649 | controller->transfer_one = pxa2xx_spi_transfer_one; |
1650 | master->slave_abort = pxa2xx_spi_slave_abort; | 1650 | controller->slave_abort = pxa2xx_spi_slave_abort; |
1651 | master->handle_err = pxa2xx_spi_handle_err; | 1651 | controller->handle_err = pxa2xx_spi_handle_err; |
1652 | master->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer; | 1652 | controller->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer; |
1653 | master->fw_translate_cs = pxa2xx_spi_fw_translate_cs; | 1653 | controller->fw_translate_cs = pxa2xx_spi_fw_translate_cs; |
1654 | master->auto_runtime_pm = true; | 1654 | controller->auto_runtime_pm = true; |
1655 | master->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX; | 1655 | controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX; |
1656 | 1656 | ||
1657 | drv_data->ssp_type = ssp->type; | 1657 | drv_data->ssp_type = ssp->type; |
1658 | 1658 | ||
@@ -1661,10 +1661,10 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1661 | if (pxa25x_ssp_comp(drv_data)) { | 1661 | if (pxa25x_ssp_comp(drv_data)) { |
1662 | switch (drv_data->ssp_type) { | 1662 | switch (drv_data->ssp_type) { |
1663 | case QUARK_X1000_SSP: | 1663 | case QUARK_X1000_SSP: |
1664 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); | 1664 | controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); |
1665 | break; | 1665 | break; |
1666 | default: | 1666 | default: |
1667 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); | 1667 | controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); |
1668 | break; | 1668 | break; |
1669 | } | 1669 | } |
1670 | 1670 | ||
@@ -1673,7 +1673,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1673 | drv_data->clear_sr = SSSR_ROR; | 1673 | drv_data->clear_sr = SSSR_ROR; |
1674 | drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR; | 1674 | drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR; |
1675 | } else { | 1675 | } else { |
1676 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); | 1676 | controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); |
1677 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE; | 1677 | drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE; |
1678 | drv_data->dma_cr1 = DEFAULT_DMA_CR1; | 1678 | drv_data->dma_cr1 = DEFAULT_DMA_CR1; |
1679 | drv_data->clear_sr = SSSR_ROR | SSSR_TINT; | 1679 | drv_data->clear_sr = SSSR_ROR | SSSR_TINT; |
@@ -1685,7 +1685,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1685 | drv_data); | 1685 | drv_data); |
1686 | if (status < 0) { | 1686 | if (status < 0) { |
1687 | dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq); | 1687 | dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq); |
1688 | goto out_error_master_alloc; | 1688 | goto out_error_controller_alloc; |
1689 | } | 1689 | } |
1690 | 1690 | ||
1691 | /* Setup DMA if requested */ | 1691 | /* Setup DMA if requested */ |
@@ -1695,7 +1695,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1695 | dev_dbg(dev, "no DMA channels available, using PIO\n"); | 1695 | dev_dbg(dev, "no DMA channels available, using PIO\n"); |
1696 | platform_info->enable_dma = false; | 1696 | platform_info->enable_dma = false; |
1697 | } else { | 1697 | } else { |
1698 | master->can_dma = pxa2xx_spi_can_dma; | 1698 | controller->can_dma = pxa2xx_spi_can_dma; |
1699 | } | 1699 | } |
1700 | } | 1700 | } |
1701 | 1701 | ||
@@ -1704,7 +1704,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1704 | if (status) | 1704 | if (status) |
1705 | goto out_error_dma_irq_alloc; | 1705 | goto out_error_dma_irq_alloc; |
1706 | 1706 | ||
1707 | master->max_speed_hz = clk_get_rate(ssp->clk); | 1707 | controller->max_speed_hz = clk_get_rate(ssp->clk); |
1708 | 1708 | ||
1709 | /* Load default SSP configuration */ | 1709 | /* Load default SSP configuration */ |
1710 | pxa2xx_spi_write(drv_data, SSCR0, 0); | 1710 | pxa2xx_spi_write(drv_data, SSCR0, 0); |
@@ -1727,7 +1727,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1727 | break; | 1727 | break; |
1728 | default: | 1728 | default: |
1729 | 1729 | ||
1730 | if (spi_controller_is_slave(master)) { | 1730 | if (spi_controller_is_slave(controller)) { |
1731 | tmp = SSCR1_SCFR | | 1731 | tmp = SSCR1_SCFR | |
1732 | SSCR1_SCLKDIR | | 1732 | SSCR1_SCLKDIR | |
1733 | SSCR1_SFRMDIR | | 1733 | SSCR1_SFRMDIR | |
@@ -1740,7 +1740,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1740 | } | 1740 | } |
1741 | pxa2xx_spi_write(drv_data, SSCR1, tmp); | 1741 | pxa2xx_spi_write(drv_data, SSCR1, tmp); |
1742 | tmp = SSCR0_Motorola | SSCR0_DataSize(8); | 1742 | tmp = SSCR0_Motorola | SSCR0_DataSize(8); |
1743 | if (!spi_controller_is_slave(master)) | 1743 | if (!spi_controller_is_slave(controller)) |
1744 | tmp |= SSCR0_SCR(2); | 1744 | tmp |= SSCR0_SCR(2); |
1745 | pxa2xx_spi_write(drv_data, SSCR0, tmp); | 1745 | pxa2xx_spi_write(drv_data, SSCR0, tmp); |
1746 | break; | 1746 | break; |
@@ -1765,24 +1765,24 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1765 | platform_info->num_chipselect = config->cs_num; | 1765 | platform_info->num_chipselect = config->cs_num; |
1766 | } | 1766 | } |
1767 | } | 1767 | } |
1768 | master->num_chipselect = platform_info->num_chipselect; | 1768 | controller->num_chipselect = platform_info->num_chipselect; |
1769 | 1769 | ||
1770 | count = gpiod_count(&pdev->dev, "cs"); | 1770 | count = gpiod_count(&pdev->dev, "cs"); |
1771 | if (count > 0) { | 1771 | if (count > 0) { |
1772 | int i; | 1772 | int i; |
1773 | 1773 | ||
1774 | master->num_chipselect = max_t(int, count, | 1774 | controller->num_chipselect = max_t(int, count, |
1775 | master->num_chipselect); | 1775 | controller->num_chipselect); |
1776 | 1776 | ||
1777 | drv_data->cs_gpiods = devm_kcalloc(&pdev->dev, | 1777 | drv_data->cs_gpiods = devm_kcalloc(&pdev->dev, |
1778 | master->num_chipselect, sizeof(struct gpio_desc *), | 1778 | controller->num_chipselect, sizeof(struct gpio_desc *), |
1779 | GFP_KERNEL); | 1779 | GFP_KERNEL); |
1780 | if (!drv_data->cs_gpiods) { | 1780 | if (!drv_data->cs_gpiods) { |
1781 | status = -ENOMEM; | 1781 | status = -ENOMEM; |
1782 | goto out_error_clock_enabled; | 1782 | goto out_error_clock_enabled; |
1783 | } | 1783 | } |
1784 | 1784 | ||
1785 | for (i = 0; i < master->num_chipselect; i++) { | 1785 | for (i = 0; i < controller->num_chipselect; i++) { |
1786 | struct gpio_desc *gpiod; | 1786 | struct gpio_desc *gpiod; |
1787 | 1787 | ||
1788 | gpiod = devm_gpiod_get_index(dev, "cs", i, GPIOD_ASIS); | 1788 | gpiod = devm_gpiod_get_index(dev, "cs", i, GPIOD_ASIS); |
@@ -1815,9 +1815,9 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) | |||
1815 | 1815 | ||
1816 | /* Register with the SPI framework */ | 1816 | /* Register with the SPI framework */ |
1817 | platform_set_drvdata(pdev, drv_data); | 1817 | platform_set_drvdata(pdev, drv_data); |
1818 | status = devm_spi_register_controller(&pdev->dev, master); | 1818 | status = devm_spi_register_controller(&pdev->dev, controller); |
1819 | if (status != 0) { | 1819 | if (status != 0) { |
1820 | dev_err(&pdev->dev, "problem registering spi master\n"); | 1820 | dev_err(&pdev->dev, "problem registering spi controller\n"); |
1821 | goto out_error_clock_enabled; | 1821 | goto out_error_clock_enabled; |
1822 | } | 1822 | } |
1823 | 1823 | ||
@@ -1832,8 +1832,8 @@ out_error_dma_irq_alloc: | |||
1832 | pxa2xx_spi_dma_release(drv_data); | 1832 | pxa2xx_spi_dma_release(drv_data); |
1833 | free_irq(ssp->irq, drv_data); | 1833 | free_irq(ssp->irq, drv_data); |
1834 | 1834 | ||
1835 | out_error_master_alloc: | 1835 | out_error_controller_alloc: |
1836 | spi_controller_put(master); | 1836 | spi_controller_put(controller); |
1837 | pxa_ssp_free(ssp); | 1837 | pxa_ssp_free(ssp); |
1838 | return status; | 1838 | return status; |
1839 | } | 1839 | } |
@@ -1854,7 +1854,7 @@ static int pxa2xx_spi_remove(struct platform_device *pdev) | |||
1854 | clk_disable_unprepare(ssp->clk); | 1854 | clk_disable_unprepare(ssp->clk); |
1855 | 1855 | ||
1856 | /* Release DMA */ | 1856 | /* Release DMA */ |
1857 | if (drv_data->master_info->enable_dma) | 1857 | if (drv_data->controller_info->enable_dma) |
1858 | pxa2xx_spi_dma_release(drv_data); | 1858 | pxa2xx_spi_dma_release(drv_data); |
1859 | 1859 | ||
1860 | pm_runtime_put_noidle(&pdev->dev); | 1860 | pm_runtime_put_noidle(&pdev->dev); |
@@ -1876,7 +1876,7 @@ static int pxa2xx_spi_suspend(struct device *dev) | |||
1876 | struct ssp_device *ssp = drv_data->ssp; | 1876 | struct ssp_device *ssp = drv_data->ssp; |
1877 | int status; | 1877 | int status; |
1878 | 1878 | ||
1879 | status = spi_controller_suspend(drv_data->master); | 1879 | status = spi_controller_suspend(drv_data->controller); |
1880 | if (status != 0) | 1880 | if (status != 0) |
1881 | return status; | 1881 | return status; |
1882 | pxa2xx_spi_write(drv_data, SSCR0, 0); | 1882 | pxa2xx_spi_write(drv_data, SSCR0, 0); |
@@ -1901,7 +1901,7 @@ static int pxa2xx_spi_resume(struct device *dev) | |||
1901 | } | 1901 | } |
1902 | 1902 | ||
1903 | /* Start the queue running */ | 1903 | /* Start the queue running */ |
1904 | return spi_controller_resume(drv_data->master); | 1904 | return spi_controller_resume(drv_data->controller); |
1905 | } | 1905 | } |
1906 | #endif | 1906 | #endif |
1907 | 1907 | ||