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-rw-r--r--drivers/spi/spi-atmel.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 9af7841f2e8c..06de34001c66 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -764,17 +764,17 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master,
764 (unsigned long long)xfer->rx_dma); 764 (unsigned long long)xfer->rx_dma);
765 } 765 }
766 766
767 /* REVISIT: We're waiting for ENDRX before we start the next 767 /* REVISIT: We're waiting for RXBUFF before we start the next
768 * transfer because we need to handle some difficult timing 768 * transfer because we need to handle some difficult timing
769 * issues otherwise. If we wait for ENDTX in one transfer and 769 * issues otherwise. If we wait for TXBUFE in one transfer and
770 * then starts waiting for ENDRX in the next, it's difficult 770 * then starts waiting for RXBUFF in the next, it's difficult
771 * to tell the difference between the ENDRX interrupt we're 771 * to tell the difference between the RXBUFF interrupt we're
772 * actually waiting for and the ENDRX interrupt of the 772 * actually waiting for and the RXBUFF interrupt of the
773 * previous transfer. 773 * previous transfer.
774 * 774 *
775 * It should be doable, though. Just not now... 775 * It should be doable, though. Just not now...
776 */ 776 */
777 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); 777 spi_writel(as, IER, SPI_BIT(RXBUFF) | SPI_BIT(OVRES));
778 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); 778 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
779} 779}
780 780