summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/pinctrl-coh901.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pinctrl/pinctrl-coh901.c')
-rw-r--r--drivers/pinctrl/pinctrl-coh901.c175
1 files changed, 111 insertions, 64 deletions
diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c
index b446c9641212..fbb37154471c 100644
--- a/drivers/pinctrl/pinctrl-coh901.c
+++ b/drivers/pinctrl/pinctrl-coh901.c
@@ -13,6 +13,7 @@
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/irqdomain.h>
16#include <linux/clk.h> 17#include <linux/clk.h>
17#include <linux/err.h> 18#include <linux/err.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
@@ -64,10 +65,8 @@ struct u300_gpio {
64 struct gpio_chip chip; 65 struct gpio_chip chip;
65 struct list_head port_list; 66 struct list_head port_list;
66 struct clk *clk; 67 struct clk *clk;
67 struct resource *memres;
68 void __iomem *base; 68 void __iomem *base;
69 struct device *dev; 69 struct device *dev;
70 int irq_base;
71 u32 stride; 70 u32 stride;
72 /* Register offsets */ 71 /* Register offsets */
73 u32 pcr; 72 u32 pcr;
@@ -83,6 +82,7 @@ struct u300_gpio_port {
83 struct list_head node; 82 struct list_head node;
84 struct u300_gpio *gpio; 83 struct u300_gpio *gpio;
85 char name[8]; 84 char name[8];
85 struct irq_domain *domain;
86 int irq; 86 int irq;
87 int number; 87 int number;
88 u8 toggle_edge_mode; 88 u8 toggle_edge_mode;
@@ -314,10 +314,30 @@ static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
314static int u300_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 314static int u300_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
315{ 315{
316 struct u300_gpio *gpio = to_u300_gpio(chip); 316 struct u300_gpio *gpio = to_u300_gpio(chip);
317 int retirq = gpio->irq_base + offset; 317 int portno = offset >> 3;
318 struct u300_gpio_port *port = NULL;
319 struct list_head *p;
320 int retirq;
318 321
319 dev_dbg(gpio->dev, "request IRQ for GPIO %d, return %d\n", offset, 322 list_for_each(p, &gpio->port_list) {
320 retirq); 323 port = list_entry(p, struct u300_gpio_port, node);
324 if (port->number == portno)
325 break;
326 }
327 if (port == NULL) {
328 dev_err(gpio->dev, "could not locate port for GPIO %d IRQ\n",
329 offset);
330 return -EINVAL;
331 }
332
333 /*
334 * The local hwirqs on the port are the lower three bits, there
335 * are exactly 8 IRQs per port since they are 8-bit
336 */
337 retirq = irq_find_mapping(port->domain, (offset & 0x7));
338
339 dev_dbg(gpio->dev, "request IRQ for GPIO %d, return %d from port %d\n",
340 offset, retirq, port->number);
321 return retirq; 341 return retirq;
322} 342}
323 343
@@ -467,7 +487,7 @@ static int u300_gpio_irq_type(struct irq_data *d, unsigned trigger)
467{ 487{
468 struct u300_gpio_port *port = irq_data_get_irq_chip_data(d); 488 struct u300_gpio_port *port = irq_data_get_irq_chip_data(d);
469 struct u300_gpio *gpio = port->gpio; 489 struct u300_gpio *gpio = port->gpio;
470 int offset = d->irq - gpio->irq_base; 490 int offset = (port->number << 3) + d->hwirq;
471 u32 val; 491 u32 val;
472 492
473 if ((trigger & IRQF_TRIGGER_RISING) && 493 if ((trigger & IRQF_TRIGGER_RISING) &&
@@ -503,10 +523,12 @@ static void u300_gpio_irq_enable(struct irq_data *d)
503{ 523{
504 struct u300_gpio_port *port = irq_data_get_irq_chip_data(d); 524 struct u300_gpio_port *port = irq_data_get_irq_chip_data(d);
505 struct u300_gpio *gpio = port->gpio; 525 struct u300_gpio *gpio = port->gpio;
506 int offset = d->irq - gpio->irq_base; 526 int offset = (port->number << 3) + d->hwirq;
507 u32 val; 527 u32 val;
508 unsigned long flags; 528 unsigned long flags;
509 529
530 dev_dbg(gpio->dev, "enable IRQ for hwirq %lu on port %s, offset %d\n",
531 d->hwirq, port->name, offset);
510 local_irq_save(flags); 532 local_irq_save(flags);
511 val = readl(U300_PIN_REG(offset, ien)); 533 val = readl(U300_PIN_REG(offset, ien));
512 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); 534 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
@@ -517,7 +539,7 @@ static void u300_gpio_irq_disable(struct irq_data *d)
517{ 539{
518 struct u300_gpio_port *port = irq_data_get_irq_chip_data(d); 540 struct u300_gpio_port *port = irq_data_get_irq_chip_data(d);
519 struct u300_gpio *gpio = port->gpio; 541 struct u300_gpio *gpio = port->gpio;
520 int offset = d->irq - gpio->irq_base; 542 int offset = (port->number << 3) + d->hwirq;
521 u32 val; 543 u32 val;
522 unsigned long flags; 544 unsigned long flags;
523 545
@@ -555,8 +577,7 @@ static void u300_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
555 int irqoffset; 577 int irqoffset;
556 578
557 for_each_set_bit(irqoffset, &val, U300_GPIO_PINS_PER_PORT) { 579 for_each_set_bit(irqoffset, &val, U300_GPIO_PINS_PER_PORT) {
558 int pin_irq = gpio->irq_base + (port->number << 3) 580 int pin_irq = irq_find_mapping(port->domain, irqoffset);
559 + irqoffset;
560 int offset = pinoffset + irqoffset; 581 int offset = pinoffset + irqoffset;
561 582
562 dev_dbg(gpio->dev, "GPIO IRQ %d on pin %d\n", 583 dev_dbg(gpio->dev, "GPIO IRQ %d on pin %d\n",
@@ -631,64 +652,86 @@ static inline void u300_gpio_free_ports(struct u300_gpio *gpio)
631 list_for_each_safe(p, n, &gpio->port_list) { 652 list_for_each_safe(p, n, &gpio->port_list) {
632 port = list_entry(p, struct u300_gpio_port, node); 653 port = list_entry(p, struct u300_gpio_port, node);
633 list_del(&port->node); 654 list_del(&port->node);
655 if (port->domain)
656 irq_domain_remove(port->domain);
634 kfree(port); 657 kfree(port);
635 } 658 }
636} 659}
637 660
661/*
662 * Here we map a GPIO in the local gpio_chip pin space to a pin in
663 * the local pinctrl pin space. The pin controller used is
664 * pinctrl-u300.
665 */
666struct coh901_pinpair {
667 unsigned int offset;
668 unsigned int pin_base;
669};
670
671#define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b }
672
673static struct coh901_pinpair coh901_pintable[] = {
674 COH901_PINRANGE(10, 426),
675 COH901_PINRANGE(11, 180),
676 COH901_PINRANGE(12, 165), /* MS/MMC card insertion */
677 COH901_PINRANGE(13, 179),
678 COH901_PINRANGE(14, 178),
679 COH901_PINRANGE(16, 194),
680 COH901_PINRANGE(17, 193),
681 COH901_PINRANGE(18, 192),
682 COH901_PINRANGE(19, 191),
683 COH901_PINRANGE(20, 186),
684 COH901_PINRANGE(21, 185),
685 COH901_PINRANGE(22, 184),
686 COH901_PINRANGE(23, 183),
687 COH901_PINRANGE(24, 182),
688 COH901_PINRANGE(25, 181),
689};
690
638static int __init u300_gpio_probe(struct platform_device *pdev) 691static int __init u300_gpio_probe(struct platform_device *pdev)
639{ 692{
640 struct u300_gpio_platform *plat = dev_get_platdata(&pdev->dev); 693 struct u300_gpio_platform *plat = dev_get_platdata(&pdev->dev);
641 struct u300_gpio *gpio; 694 struct u300_gpio *gpio;
695 struct resource *memres;
642 int err = 0; 696 int err = 0;
643 int portno; 697 int portno;
644 u32 val; 698 u32 val;
645 u32 ifr; 699 u32 ifr;
646 int i; 700 int i;
647 701
648 gpio = kzalloc(sizeof(struct u300_gpio), GFP_KERNEL); 702 gpio = devm_kzalloc(&pdev->dev, sizeof(struct u300_gpio), GFP_KERNEL);
649 if (gpio == NULL) { 703 if (gpio == NULL)
650 dev_err(&pdev->dev, "failed to allocate memory\n");
651 return -ENOMEM; 704 return -ENOMEM;
652 }
653 705
654 gpio->chip = u300_gpio_chip; 706 gpio->chip = u300_gpio_chip;
655 gpio->chip.ngpio = plat->ports * U300_GPIO_PINS_PER_PORT; 707 gpio->chip.ngpio = plat->ports * U300_GPIO_PINS_PER_PORT;
656 gpio->irq_base = plat->gpio_irq_base;
657 gpio->chip.dev = &pdev->dev; 708 gpio->chip.dev = &pdev->dev;
658 gpio->chip.base = plat->gpio_base; 709 gpio->chip.base = plat->gpio_base;
659 gpio->dev = &pdev->dev; 710 gpio->dev = &pdev->dev;
660 711
661 /* Get GPIO clock */ 712 memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
662 gpio->clk = clk_get(gpio->dev, NULL); 713 if (!memres) {
714 dev_err(gpio->dev, "could not get GPIO memory resource\n");
715 return -ENODEV;
716 }
717
718 gpio->base = devm_request_and_ioremap(&pdev->dev, memres);
719 if (!gpio->base) {
720 dev_err(gpio->dev, "could not get remap memory\n");
721 return -ENOMEM;
722 }
723
724 gpio->clk = devm_clk_get(gpio->dev, NULL);
663 if (IS_ERR(gpio->clk)) { 725 if (IS_ERR(gpio->clk)) {
664 err = PTR_ERR(gpio->clk); 726 err = PTR_ERR(gpio->clk);
665 dev_err(gpio->dev, "could not get GPIO clock\n"); 727 dev_err(gpio->dev, "could not get GPIO clock\n");
666 goto err_no_clk; 728 return err;
667 } 729 }
730
668 err = clk_prepare_enable(gpio->clk); 731 err = clk_prepare_enable(gpio->clk);
669 if (err) { 732 if (err) {
670 dev_err(gpio->dev, "could not enable GPIO clock\n"); 733 dev_err(gpio->dev, "could not enable GPIO clock\n");
671 goto err_no_clk_enable; 734 return err;
672 }
673
674 gpio->memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
675 if (!gpio->memres) {
676 dev_err(gpio->dev, "could not get GPIO memory resource\n");
677 err = -ENODEV;
678 goto err_no_resource;
679 }
680
681 if (!request_mem_region(gpio->memres->start,
682 resource_size(gpio->memres),
683 "GPIO Controller")) {
684 err = -ENODEV;
685 goto err_no_ioregion;
686 }
687
688 gpio->base = ioremap(gpio->memres->start, resource_size(gpio->memres));
689 if (!gpio->base) {
690 err = -ENOMEM;
691 goto err_no_ioremap;
692 } 735 }
693 736
694 dev_info(gpio->dev, 737 dev_info(gpio->dev,
@@ -732,18 +775,28 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
732 port->irq = platform_get_irq_byname(pdev, 775 port->irq = platform_get_irq_byname(pdev,
733 port->name); 776 port->name);
734 777
735 dev_dbg(gpio->dev, "register IRQ %d for %s\n", port->irq, 778 dev_dbg(gpio->dev, "register IRQ %d for port %s\n", port->irq,
736 port->name); 779 port->name);
737 780
781 port->domain = irq_domain_add_linear(pdev->dev.of_node,
782 U300_GPIO_PINS_PER_PORT,
783 &irq_domain_simple_ops,
784 port);
785 if (!port->domain) {
786 err = -ENOMEM;
787 goto err_no_domain;
788 }
789
738 irq_set_chained_handler(port->irq, u300_gpio_irq_handler); 790 irq_set_chained_handler(port->irq, u300_gpio_irq_handler);
739 irq_set_handler_data(port->irq, port); 791 irq_set_handler_data(port->irq, port);
740 792
741 /* For each GPIO pin set the unique IRQ handler */ 793 /* For each GPIO pin set the unique IRQ handler */
742 for (i = 0; i < U300_GPIO_PINS_PER_PORT; i++) { 794 for (i = 0; i < U300_GPIO_PINS_PER_PORT; i++) {
743 int irqno = gpio->irq_base + (portno << 3) + i; 795 int irqno = irq_create_mapping(port->domain, i);
744 796
745 dev_dbg(gpio->dev, "handler for IRQ %d on %s\n", 797 dev_dbg(gpio->dev, "GPIO%d on port %s gets IRQ %d\n",
746 irqno, port->name); 798 gpio->chip.base + (port->number << 3) + i,
799 port->name, irqno);
747 irq_set_chip_and_handler(irqno, &u300_gpio_irqchip, 800 irq_set_chip_and_handler(irqno, &u300_gpio_irqchip,
748 handle_simple_irq); 801 handle_simple_irq);
749 set_irq_flags(irqno, IRQF_VALID); 802 set_irq_flags(irqno, IRQF_VALID);
@@ -763,32 +816,31 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
763 goto err_no_chip; 816 goto err_no_chip;
764 } 817 }
765 818
766 /* Spawn pin controller device as child of the GPIO, pass gpio chip */ 819 /*
767 plat->pinctrl_device->dev.platform_data = &gpio->chip; 820 * Add pinctrl pin ranges, the pin controller must be registered
768 err = platform_device_register(plat->pinctrl_device); 821 * at this point
769 if (err) 822 */
770 goto err_no_pinctrl; 823 for (i = 0; i < ARRAY_SIZE(coh901_pintable); i++) {
824 struct coh901_pinpair *p = &coh901_pintable[i];
825
826 err = gpiochip_add_pin_range(&gpio->chip, "pinctrl-u300",
827 p->offset, p->pin_base, 1);
828 if (err)
829 goto err_no_range;
830 }
771 831
772 platform_set_drvdata(pdev, gpio); 832 platform_set_drvdata(pdev, gpio);
773 833
774 return 0; 834 return 0;
775 835
776err_no_pinctrl: 836err_no_range:
777 err = gpiochip_remove(&gpio->chip); 837 err = gpiochip_remove(&gpio->chip);
778err_no_chip: 838err_no_chip:
839err_no_domain:
779err_no_port: 840err_no_port:
780 u300_gpio_free_ports(gpio); 841 u300_gpio_free_ports(gpio);
781 iounmap(gpio->base);
782err_no_ioremap:
783 release_mem_region(gpio->memres->start, resource_size(gpio->memres));
784err_no_ioregion:
785err_no_resource:
786 clk_disable_unprepare(gpio->clk); 842 clk_disable_unprepare(gpio->clk);
787err_no_clk_enable: 843 dev_err(&pdev->dev, "module ERROR:%d\n", err);
788 clk_put(gpio->clk);
789err_no_clk:
790 kfree(gpio);
791 dev_info(&pdev->dev, "module ERROR:%d\n", err);
792 return err; 844 return err;
793} 845}
794 846
@@ -806,13 +858,8 @@ static int __exit u300_gpio_remove(struct platform_device *pdev)
806 return err; 858 return err;
807 } 859 }
808 u300_gpio_free_ports(gpio); 860 u300_gpio_free_ports(gpio);
809 iounmap(gpio->base);
810 release_mem_region(gpio->memres->start,
811 resource_size(gpio->memres));
812 clk_disable_unprepare(gpio->clk); 861 clk_disable_unprepare(gpio->clk);
813 clk_put(gpio->clk);
814 platform_set_drvdata(pdev, NULL); 862 platform_set_drvdata(pdev, NULL);
815 kfree(gpio);
816 return 0; 863 return 0;
817} 864}
818 865