diff options
Diffstat (limited to 'drivers/gpio/gpio-grgpio.c')
-rw-r--r-- | drivers/gpio/gpio-grgpio.c | 73 |
1 files changed, 32 insertions, 41 deletions
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c index 801423fe8143..7847dd34f86f 100644 --- a/drivers/gpio/gpio-grgpio.c +++ b/drivers/gpio/gpio-grgpio.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
32 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
33 | #include <linux/err.h> | 33 | #include <linux/err.h> |
34 | #include <linux/basic_mmio_gpio.h> | 34 | #include <linux/gpio/driver.h> |
35 | #include <linux/interrupt.h> | 35 | #include <linux/interrupt.h> |
36 | #include <linux/irq.h> | 36 | #include <linux/irq.h> |
37 | #include <linux/irqdomain.h> | 37 | #include <linux/irqdomain.h> |
@@ -63,7 +63,7 @@ struct grgpio_lirq { | |||
63 | }; | 63 | }; |
64 | 64 | ||
65 | struct grgpio_priv { | 65 | struct grgpio_priv { |
66 | struct bgpio_chip bgc; | 66 | struct gpio_chip gc; |
67 | void __iomem *regs; | 67 | void __iomem *regs; |
68 | struct device *dev; | 68 | struct device *dev; |
69 | 69 | ||
@@ -92,29 +92,22 @@ struct grgpio_priv { | |||
92 | struct grgpio_lirq lirqs[GRGPIO_MAX_NGPIO]; | 92 | struct grgpio_lirq lirqs[GRGPIO_MAX_NGPIO]; |
93 | }; | 93 | }; |
94 | 94 | ||
95 | static inline struct grgpio_priv *grgpio_gc_to_priv(struct gpio_chip *gc) | ||
96 | { | ||
97 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
98 | |||
99 | return container_of(bgc, struct grgpio_priv, bgc); | ||
100 | } | ||
101 | |||
102 | static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset, | 95 | static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset, |
103 | int val) | 96 | int val) |
104 | { | 97 | { |
105 | struct bgpio_chip *bgc = &priv->bgc; | 98 | struct gpio_chip *gc = &priv->gc; |
106 | unsigned long mask = bgc->pin2mask(bgc, offset); | 99 | unsigned long mask = gc->pin2mask(gc, offset); |
107 | 100 | ||
108 | if (val) | 101 | if (val) |
109 | priv->imask |= mask; | 102 | priv->imask |= mask; |
110 | else | 103 | else |
111 | priv->imask &= ~mask; | 104 | priv->imask &= ~mask; |
112 | bgc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask); | 105 | gc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask); |
113 | } | 106 | } |
114 | 107 | ||
115 | static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset) | 108 | static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset) |
116 | { | 109 | { |
117 | struct grgpio_priv *priv = grgpio_gc_to_priv(gc); | 110 | struct grgpio_priv *priv = gpiochip_get_data(gc); |
118 | 111 | ||
119 | if (offset >= gc->ngpio) | 112 | if (offset >= gc->ngpio) |
120 | return -ENXIO; | 113 | return -ENXIO; |
@@ -158,15 +151,15 @@ static int grgpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
158 | return -EINVAL; | 151 | return -EINVAL; |
159 | } | 152 | } |
160 | 153 | ||
161 | spin_lock_irqsave(&priv->bgc.lock, flags); | 154 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
162 | 155 | ||
163 | ipol = priv->bgc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask; | 156 | ipol = priv->gc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask; |
164 | iedge = priv->bgc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask; | 157 | iedge = priv->gc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask; |
165 | 158 | ||
166 | priv->bgc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol); | 159 | priv->gc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol); |
167 | priv->bgc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge); | 160 | priv->gc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge); |
168 | 161 | ||
169 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 162 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
170 | 163 | ||
171 | return 0; | 164 | return 0; |
172 | } | 165 | } |
@@ -177,11 +170,11 @@ static void grgpio_irq_mask(struct irq_data *d) | |||
177 | int offset = d->hwirq; | 170 | int offset = d->hwirq; |
178 | unsigned long flags; | 171 | unsigned long flags; |
179 | 172 | ||
180 | spin_lock_irqsave(&priv->bgc.lock, flags); | 173 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
181 | 174 | ||
182 | grgpio_set_imask(priv, offset, 0); | 175 | grgpio_set_imask(priv, offset, 0); |
183 | 176 | ||
184 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 177 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
185 | } | 178 | } |
186 | 179 | ||
187 | static void grgpio_irq_unmask(struct irq_data *d) | 180 | static void grgpio_irq_unmask(struct irq_data *d) |
@@ -190,11 +183,11 @@ static void grgpio_irq_unmask(struct irq_data *d) | |||
190 | int offset = d->hwirq; | 183 | int offset = d->hwirq; |
191 | unsigned long flags; | 184 | unsigned long flags; |
192 | 185 | ||
193 | spin_lock_irqsave(&priv->bgc.lock, flags); | 186 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
194 | 187 | ||
195 | grgpio_set_imask(priv, offset, 1); | 188 | grgpio_set_imask(priv, offset, 1); |
196 | 189 | ||
197 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 190 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
198 | } | 191 | } |
199 | 192 | ||
200 | static struct irq_chip grgpio_irq_chip = { | 193 | static struct irq_chip grgpio_irq_chip = { |
@@ -207,12 +200,12 @@ static struct irq_chip grgpio_irq_chip = { | |||
207 | static irqreturn_t grgpio_irq_handler(int irq, void *dev) | 200 | static irqreturn_t grgpio_irq_handler(int irq, void *dev) |
208 | { | 201 | { |
209 | struct grgpio_priv *priv = dev; | 202 | struct grgpio_priv *priv = dev; |
210 | int ngpio = priv->bgc.gc.ngpio; | 203 | int ngpio = priv->gc.ngpio; |
211 | unsigned long flags; | 204 | unsigned long flags; |
212 | int i; | 205 | int i; |
213 | int match = 0; | 206 | int match = 0; |
214 | 207 | ||
215 | spin_lock_irqsave(&priv->bgc.lock, flags); | 208 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
216 | 209 | ||
217 | /* | 210 | /* |
218 | * For each gpio line, call its interrupt handler if it its underlying | 211 | * For each gpio line, call its interrupt handler if it its underlying |
@@ -228,7 +221,7 @@ static irqreturn_t grgpio_irq_handler(int irq, void *dev) | |||
228 | } | 221 | } |
229 | } | 222 | } |
230 | 223 | ||
231 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 224 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
232 | 225 | ||
233 | if (!match) | 226 | if (!match) |
234 | dev_warn(priv->dev, "No gpio line matched irq %d\n", irq); | 227 | dev_warn(priv->dev, "No gpio line matched irq %d\n", irq); |
@@ -260,7 +253,7 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq, | |||
260 | dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n", | 253 | dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n", |
261 | irq, offset); | 254 | irq, offset); |
262 | 255 | ||
263 | spin_lock_irqsave(&priv->bgc.lock, flags); | 256 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
264 | 257 | ||
265 | /* Request underlying irq if not already requested */ | 258 | /* Request underlying irq if not already requested */ |
266 | lirq->irq = irq; | 259 | lirq->irq = irq; |
@@ -273,14 +266,14 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq, | |||
273 | "Could not request underlying irq %d\n", | 266 | "Could not request underlying irq %d\n", |
274 | uirq->uirq); | 267 | uirq->uirq); |
275 | 268 | ||
276 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 269 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
277 | 270 | ||
278 | return ret; | 271 | return ret; |
279 | } | 272 | } |
280 | } | 273 | } |
281 | uirq->refcnt++; | 274 | uirq->refcnt++; |
282 | 275 | ||
283 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 276 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
284 | 277 | ||
285 | /* Setup irq */ | 278 | /* Setup irq */ |
286 | irq_set_chip_data(irq, priv); | 279 | irq_set_chip_data(irq, priv); |
@@ -298,13 +291,13 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq) | |||
298 | struct grgpio_lirq *lirq; | 291 | struct grgpio_lirq *lirq; |
299 | struct grgpio_uirq *uirq; | 292 | struct grgpio_uirq *uirq; |
300 | unsigned long flags; | 293 | unsigned long flags; |
301 | int ngpio = priv->bgc.gc.ngpio; | 294 | int ngpio = priv->gc.ngpio; |
302 | int i; | 295 | int i; |
303 | 296 | ||
304 | irq_set_chip_and_handler(irq, NULL, NULL); | 297 | irq_set_chip_and_handler(irq, NULL, NULL); |
305 | irq_set_chip_data(irq, NULL); | 298 | irq_set_chip_data(irq, NULL); |
306 | 299 | ||
307 | spin_lock_irqsave(&priv->bgc.lock, flags); | 300 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
308 | 301 | ||
309 | /* Free underlying irq if last user unmapped */ | 302 | /* Free underlying irq if last user unmapped */ |
310 | index = -1; | 303 | index = -1; |
@@ -326,7 +319,7 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq) | |||
326 | free_irq(uirq->uirq, priv); | 319 | free_irq(uirq->uirq, priv); |
327 | } | 320 | } |
328 | 321 | ||
329 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 322 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
330 | } | 323 | } |
331 | 324 | ||
332 | static const struct irq_domain_ops grgpio_irq_domain_ops = { | 325 | static const struct irq_domain_ops grgpio_irq_domain_ops = { |
@@ -341,7 +334,6 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
341 | struct device_node *np = ofdev->dev.of_node; | 334 | struct device_node *np = ofdev->dev.of_node; |
342 | void __iomem *regs; | 335 | void __iomem *regs; |
343 | struct gpio_chip *gc; | 336 | struct gpio_chip *gc; |
344 | struct bgpio_chip *bgc; | ||
345 | struct grgpio_priv *priv; | 337 | struct grgpio_priv *priv; |
346 | struct resource *res; | 338 | struct resource *res; |
347 | int err; | 339 | int err; |
@@ -359,8 +351,8 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
359 | if (IS_ERR(regs)) | 351 | if (IS_ERR(regs)) |
360 | return PTR_ERR(regs); | 352 | return PTR_ERR(regs); |
361 | 353 | ||
362 | bgc = &priv->bgc; | 354 | gc = &priv->gc; |
363 | err = bgpio_init(bgc, &ofdev->dev, 4, regs + GRGPIO_DATA, | 355 | err = bgpio_init(gc, &ofdev->dev, 4, regs + GRGPIO_DATA, |
364 | regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL, | 356 | regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL, |
365 | BGPIOF_BIG_ENDIAN_BYTE_ORDER); | 357 | BGPIOF_BIG_ENDIAN_BYTE_ORDER); |
366 | if (err) { | 358 | if (err) { |
@@ -369,10 +361,9 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
369 | } | 361 | } |
370 | 362 | ||
371 | priv->regs = regs; | 363 | priv->regs = regs; |
372 | priv->imask = bgc->read_reg(regs + GRGPIO_IMASK); | 364 | priv->imask = gc->read_reg(regs + GRGPIO_IMASK); |
373 | priv->dev = &ofdev->dev; | 365 | priv->dev = &ofdev->dev; |
374 | 366 | ||
375 | gc = &bgc->gc; | ||
376 | gc->of_node = np; | 367 | gc->of_node = np; |
377 | gc->owner = THIS_MODULE; | 368 | gc->owner = THIS_MODULE; |
378 | gc->to_irq = grgpio_to_irq; | 369 | gc->to_irq = grgpio_to_irq; |
@@ -435,7 +426,7 @@ static int grgpio_probe(struct platform_device *ofdev) | |||
435 | 426 | ||
436 | platform_set_drvdata(ofdev, priv); | 427 | platform_set_drvdata(ofdev, priv); |
437 | 428 | ||
438 | err = gpiochip_add(gc); | 429 | err = gpiochip_add_data(gc, priv); |
439 | if (err) { | 430 | if (err) { |
440 | dev_err(&ofdev->dev, "Could not add gpiochip\n"); | 431 | dev_err(&ofdev->dev, "Could not add gpiochip\n"); |
441 | if (priv->domain) | 432 | if (priv->domain) |
@@ -456,7 +447,7 @@ static int grgpio_remove(struct platform_device *ofdev) | |||
456 | int i; | 447 | int i; |
457 | int ret = 0; | 448 | int ret = 0; |
458 | 449 | ||
459 | spin_lock_irqsave(&priv->bgc.lock, flags); | 450 | spin_lock_irqsave(&priv->gc.bgpio_lock, flags); |
460 | 451 | ||
461 | if (priv->domain) { | 452 | if (priv->domain) { |
462 | for (i = 0; i < GRGPIO_MAX_NGPIO; i++) { | 453 | for (i = 0; i < GRGPIO_MAX_NGPIO; i++) { |
@@ -467,13 +458,13 @@ static int grgpio_remove(struct platform_device *ofdev) | |||
467 | } | 458 | } |
468 | } | 459 | } |
469 | 460 | ||
470 | gpiochip_remove(&priv->bgc.gc); | 461 | gpiochip_remove(&priv->gc); |
471 | 462 | ||
472 | if (priv->domain) | 463 | if (priv->domain) |
473 | irq_domain_remove(priv->domain); | 464 | irq_domain_remove(priv->domain); |
474 | 465 | ||
475 | out: | 466 | out: |
476 | spin_unlock_irqrestore(&priv->bgc.lock, flags); | 467 | spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags); |
477 | 468 | ||
478 | return ret; | 469 | return ret; |
479 | } | 470 | } |