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path: root/drivers/dma/stm32-dma.c
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Diffstat (limited to 'drivers/dma/stm32-dma.c')
-rw-r--r--drivers/dma/stm32-dma.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/drivers/dma/stm32-dma.c b/drivers/dma/stm32-dma.c
index 786fc8fcc38e..4099948b6914 100644
--- a/drivers/dma/stm32-dma.c
+++ b/drivers/dma/stm32-dma.c
@@ -116,6 +116,10 @@
116#define STM32_DMA_MAX_DATA_PARAM 0x03 116#define STM32_DMA_MAX_DATA_PARAM 0x03
117#define STM32_DMA_MAX_BURST 16 117#define STM32_DMA_MAX_BURST 16
118 118
119/* DMA Features */
120#define STM32_DMA_THRESHOLD_FTR_MASK GENMASK(1, 0)
121#define STM32_DMA_THRESHOLD_FTR_GET(n) ((n) & STM32_DMA_THRESHOLD_FTR_MASK)
122
119enum stm32_dma_width { 123enum stm32_dma_width {
120 STM32_DMA_BYTE, 124 STM32_DMA_BYTE,
121 STM32_DMA_HALF_WORD, 125 STM32_DMA_HALF_WORD,
@@ -129,11 +133,18 @@ enum stm32_dma_burst_size {
129 STM32_DMA_BURST_INCR16, 133 STM32_DMA_BURST_INCR16,
130}; 134};
131 135
136/**
137 * struct stm32_dma_cfg - STM32 DMA custom configuration
138 * @channel_id: channel ID
139 * @request_line: DMA request
140 * @stream_config: 32bit mask specifying the DMA channel configuration
141 * @features: 32bit mask specifying the DMA Feature list
142 */
132struct stm32_dma_cfg { 143struct stm32_dma_cfg {
133 u32 channel_id; 144 u32 channel_id;
134 u32 request_line; 145 u32 request_line;
135 u32 stream_config; 146 u32 stream_config;
136 u32 threshold; 147 u32 features;
137}; 148};
138 149
139struct stm32_dma_chan_reg { 150struct stm32_dma_chan_reg {
@@ -171,6 +182,7 @@ struct stm32_dma_chan {
171 u32 next_sg; 182 u32 next_sg;
172 struct dma_slave_config dma_sconfig; 183 struct dma_slave_config dma_sconfig;
173 struct stm32_dma_chan_reg chan_reg; 184 struct stm32_dma_chan_reg chan_reg;
185 u32 threshold;
174}; 186};
175 187
176struct stm32_dma_device { 188struct stm32_dma_device {
@@ -976,7 +988,8 @@ static void stm32_dma_set_config(struct stm32_dma_chan *chan,
976 /* Enable Interrupts */ 988 /* Enable Interrupts */
977 chan->chan_reg.dma_scr |= STM32_DMA_SCR_TEIE | STM32_DMA_SCR_TCIE; 989 chan->chan_reg.dma_scr |= STM32_DMA_SCR_TEIE | STM32_DMA_SCR_TCIE;
978 990
979 chan->chan_reg.dma_sfcr = cfg->threshold & STM32_DMA_SFCR_FTH_MASK; 991 chan->threshold = STM32_DMA_THRESHOLD_FTR_GET(cfg->features);
992 chan->chan_reg.dma_sfcr = STM32_DMA_SFCR_FTH(chan->threshold);
980} 993}
981 994
982static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec, 995static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
@@ -996,7 +1009,7 @@ static struct dma_chan *stm32_dma_of_xlate(struct of_phandle_args *dma_spec,
996 cfg.channel_id = dma_spec->args[0]; 1009 cfg.channel_id = dma_spec->args[0];
997 cfg.request_line = dma_spec->args[1]; 1010 cfg.request_line = dma_spec->args[1];
998 cfg.stream_config = dma_spec->args[2]; 1011 cfg.stream_config = dma_spec->args[2];
999 cfg.threshold = dma_spec->args[3]; 1012 cfg.features = dma_spec->args[3];
1000 1013
1001 if ((cfg.channel_id >= STM32_DMA_MAX_CHANNELS) || 1014 if ((cfg.channel_id >= STM32_DMA_MAX_CHANNELS) ||
1002 (cfg.request_line >= STM32_DMA_MAX_REQUEST_ID)) { 1015 (cfg.request_line >= STM32_DMA_MAX_REQUEST_ID)) {