diff options
Diffstat (limited to 'drivers/dma/fsl-edma-common.c')
-rw-r--r-- | drivers/dma/fsl-edma-common.c | 69 |
1 files changed, 40 insertions, 29 deletions
diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 680b2a00a953..44d92c34dec3 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c | |||
@@ -47,7 +47,7 @@ static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan) | |||
47 | struct edma_regs *regs = &fsl_chan->edma->regs; | 47 | struct edma_regs *regs = &fsl_chan->edma->regs; |
48 | u32 ch = fsl_chan->vchan.chan.chan_id; | 48 | u32 ch = fsl_chan->vchan.chan.chan_id; |
49 | 49 | ||
50 | if (fsl_chan->edma->version == v1) { | 50 | if (fsl_chan->edma->drvdata->version == v1) { |
51 | edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); | 51 | edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); |
52 | edma_writeb(fsl_chan->edma, ch, regs->serq); | 52 | edma_writeb(fsl_chan->edma, ch, regs->serq); |
53 | } else { | 53 | } else { |
@@ -64,7 +64,7 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) | |||
64 | struct edma_regs *regs = &fsl_chan->edma->regs; | 64 | struct edma_regs *regs = &fsl_chan->edma->regs; |
65 | u32 ch = fsl_chan->vchan.chan.chan_id; | 65 | u32 ch = fsl_chan->vchan.chan.chan_id; |
66 | 66 | ||
67 | if (fsl_chan->edma->version == v1) { | 67 | if (fsl_chan->edma->drvdata->version == v1) { |
68 | edma_writeb(fsl_chan->edma, ch, regs->cerq); | 68 | edma_writeb(fsl_chan->edma, ch, regs->cerq); |
69 | edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), regs->ceei); | 69 | edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), regs->ceei); |
70 | } else { | 70 | } else { |
@@ -77,22 +77,33 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) | |||
77 | } | 77 | } |
78 | EXPORT_SYMBOL_GPL(fsl_edma_disable_request); | 78 | EXPORT_SYMBOL_GPL(fsl_edma_disable_request); |
79 | 79 | ||
80 | static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr, | ||
81 | u32 off, u32 slot, bool enable) | ||
82 | { | ||
83 | u8 val8; | ||
84 | |||
85 | if (enable) | ||
86 | val8 = EDMAMUX_CHCFG_ENBL | slot; | ||
87 | else | ||
88 | val8 = EDMAMUX_CHCFG_DIS; | ||
89 | |||
90 | iowrite8(val8, addr + off); | ||
91 | } | ||
92 | |||
80 | void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, | 93 | void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, |
81 | unsigned int slot, bool enable) | 94 | unsigned int slot, bool enable) |
82 | { | 95 | { |
83 | u32 ch = fsl_chan->vchan.chan.chan_id; | 96 | u32 ch = fsl_chan->vchan.chan.chan_id; |
84 | void __iomem *muxaddr; | 97 | void __iomem *muxaddr; |
85 | unsigned int chans_per_mux, ch_off; | 98 | unsigned int chans_per_mux, ch_off; |
99 | u32 dmamux_nr = fsl_chan->edma->drvdata->dmamuxs; | ||
86 | 100 | ||
87 | chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR; | 101 | chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr; |
88 | ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux; | 102 | ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux; |
89 | muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; | 103 | muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; |
90 | slot = EDMAMUX_CHCFG_SOURCE(slot); | 104 | slot = EDMAMUX_CHCFG_SOURCE(slot); |
91 | 105 | ||
92 | if (enable) | 106 | mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); |
93 | iowrite8(EDMAMUX_CHCFG_ENBL | slot, muxaddr + ch_off); | ||
94 | else | ||
95 | iowrite8(EDMAMUX_CHCFG_DIS, muxaddr + ch_off); | ||
96 | } | 107 | } |
97 | EXPORT_SYMBOL_GPL(fsl_edma_chan_mux); | 108 | EXPORT_SYMBOL_GPL(fsl_edma_chan_mux); |
98 | 109 | ||
@@ -647,28 +658,28 @@ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) | |||
647 | edma->regs.erql = edma->membase + EDMA_ERQ; | 658 | edma->regs.erql = edma->membase + EDMA_ERQ; |
648 | edma->regs.eeil = edma->membase + EDMA_EEI; | 659 | edma->regs.eeil = edma->membase + EDMA_EEI; |
649 | 660 | ||
650 | edma->regs.serq = edma->membase + ((edma->version == v1) ? | 661 | edma->regs.serq = edma->membase + ((edma->drvdata->version == v2) ? |
651 | EDMA_SERQ : EDMA64_SERQ); | 662 | EDMA64_SERQ : EDMA_SERQ); |
652 | edma->regs.cerq = edma->membase + ((edma->version == v1) ? | 663 | edma->regs.cerq = edma->membase + ((edma->drvdata->version == v2) ? |
653 | EDMA_CERQ : EDMA64_CERQ); | 664 | EDMA64_CERQ : EDMA_CERQ); |
654 | edma->regs.seei = edma->membase + ((edma->version == v1) ? | 665 | edma->regs.seei = edma->membase + ((edma->drvdata->version == v2) ? |
655 | EDMA_SEEI : EDMA64_SEEI); | 666 | EDMA64_SEEI : EDMA_SEEI); |
656 | edma->regs.ceei = edma->membase + ((edma->version == v1) ? | 667 | edma->regs.ceei = edma->membase + ((edma->drvdata->version == v2) ? |
657 | EDMA_CEEI : EDMA64_CEEI); | 668 | EDMA64_CEEI : EDMA_CEEI); |
658 | edma->regs.cint = edma->membase + ((edma->version == v1) ? | 669 | edma->regs.cint = edma->membase + ((edma->drvdata->version == v2) ? |
659 | EDMA_CINT : EDMA64_CINT); | 670 | EDMA64_CINT : EDMA_CINT); |
660 | edma->regs.cerr = edma->membase + ((edma->version == v1) ? | 671 | edma->regs.cerr = edma->membase + ((edma->drvdata->version == v2) ? |
661 | EDMA_CERR : EDMA64_CERR); | 672 | EDMA64_CERR : EDMA_CERR); |
662 | edma->regs.ssrt = edma->membase + ((edma->version == v1) ? | 673 | edma->regs.ssrt = edma->membase + ((edma->drvdata->version == v2) ? |
663 | EDMA_SSRT : EDMA64_SSRT); | 674 | EDMA64_SSRT : EDMA_SSRT); |
664 | edma->regs.cdne = edma->membase + ((edma->version == v1) ? | 675 | edma->regs.cdne = edma->membase + ((edma->drvdata->version == v2) ? |
665 | EDMA_CDNE : EDMA64_CDNE); | 676 | EDMA64_CDNE : EDMA_CDNE); |
666 | edma->regs.intl = edma->membase + ((edma->version == v1) ? | 677 | edma->regs.intl = edma->membase + ((edma->drvdata->version == v2) ? |
667 | EDMA_INTR : EDMA64_INTL); | 678 | EDMA64_INTL : EDMA_INTR); |
668 | edma->regs.errl = edma->membase + ((edma->version == v1) ? | 679 | edma->regs.errl = edma->membase + ((edma->drvdata->version == v2) ? |
669 | EDMA_ERR : EDMA64_ERRL); | 680 | EDMA64_ERRL : EDMA_ERR); |
670 | 681 | ||
671 | if (edma->version == v2) { | 682 | if (edma->drvdata->version == v2) { |
672 | edma->regs.erqh = edma->membase + EDMA64_ERQH; | 683 | edma->regs.erqh = edma->membase + EDMA64_ERQH; |
673 | edma->regs.eeih = edma->membase + EDMA64_EEIH; | 684 | edma->regs.eeih = edma->membase + EDMA64_EEIH; |
674 | edma->regs.errh = edma->membase + EDMA64_ERRH; | 685 | edma->regs.errh = edma->membase + EDMA64_ERRH; |