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-rw-r--r--arch/arm/kvm/arm.c3
-rw-r--r--arch/arm/kvm/interrupts.S11
-rw-r--r--arch/arm64/include/asm/percpu.h8
-rw-r--r--arch/arm64/include/asm/pgtable.h10
-rw-r--r--arch/arm64/kernel/stacktrace.c6
-rw-r--r--arch/arm64/kvm/hyp.S27
-rw-r--r--arch/m68k/include/asm/Kbuild6
-rw-r--r--arch/m68k/include/asm/barrier.h8
-rw-r--r--arch/m68k/include/asm/unistd.h2
-rw-r--r--arch/m68k/include/uapi/asm/unistd.h2
-rw-r--r--arch/m68k/kernel/syscalltable.S2
-rw-r--r--arch/powerpc/include/asm/compat.h5
-rw-r--r--arch/powerpc/include/asm/opal.h4
-rw-r--r--arch/powerpc/include/asm/ptrace.h16
-rw-r--r--arch/powerpc/kernel/crash_dump.c8
-rw-r--r--arch/powerpc/kernel/ftrace.c1
-rw-r--r--arch/powerpc/kernel/signal_64.c4
-rw-r--r--arch/powerpc/platforms/powernv/eeh-ioda.c96
-rw-r--r--arch/powerpc/platforms/powernv/opal-xscom.c21
-rw-r--r--arch/powerpc/platforms/powernv/pci.c220
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c22
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/s390/pci/pci_dma.c8
-rw-r--r--arch/x86/boot/compressed/aslr.c9
-rw-r--r--arch/x86/kernel/cpu/perf_event.c3
-rw-r--r--arch/x86/kernel/machine_kexec_64.c2
-rw-r--r--arch/x86/kvm/mmu.c1
-rw-r--r--arch/x86/kvm/vmx.c2
-rw-r--r--arch/x86/kvm/x86.c2
-rw-r--r--arch/xtensa/Kconfig3
-rw-r--r--arch/xtensa/boot/dts/xtfpga.dtsi12
-rw-r--r--arch/xtensa/include/asm/io.h2
-rw-r--r--arch/xtensa/include/asm/traps.h44
-rw-r--r--arch/xtensa/include/asm/vectors.h2
-rw-r--r--arch/xtensa/include/uapi/asm/unistd.h7
-rw-r--r--arch/xtensa/kernel/entry.S449
-rw-r--r--arch/xtensa/kernel/setup.c2
-rw-r--r--arch/xtensa/kernel/time.c1
-rw-r--r--arch/xtensa/kernel/vectors.S2
-rw-r--r--arch/xtensa/kernel/xtensa_ksyms.c2
-rw-r--r--arch/xtensa/mm/init.c13
-rw-r--r--arch/xtensa/mm/mmu.c2
-rw-r--r--arch/xtensa/platforms/xtfpga/setup.c7
-rw-r--r--arch/xtensa/variants/fsf/include/variant/tie.h9
44 files changed, 598 insertions, 470 deletions
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 1d8248ea5669..bd18bb8b2770 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -878,7 +878,8 @@ static int hyp_init_cpu_pm_notifier(struct notifier_block *self,
878 unsigned long cmd, 878 unsigned long cmd,
879 void *v) 879 void *v)
880{ 880{
881 if (cmd == CPU_PM_EXIT) { 881 if (cmd == CPU_PM_EXIT &&
882 __hyp_get_vectors() == hyp_default_vectors) {
882 cpu_init_hyp_mode(NULL); 883 cpu_init_hyp_mode(NULL);
883 return NOTIFY_OK; 884 return NOTIFY_OK;
884 } 885 }
diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S
index ddc15539bad2..0d68d4073068 100644
--- a/arch/arm/kvm/interrupts.S
+++ b/arch/arm/kvm/interrupts.S
@@ -220,6 +220,10 @@ after_vfp_restore:
220 * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are 220 * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are
221 * passed in r0 and r1. 221 * passed in r0 and r1.
222 * 222 *
223 * A function pointer with a value of 0xffffffff has a special meaning,
224 * and is used to implement __hyp_get_vectors in the same way as in
225 * arch/arm/kernel/hyp_stub.S.
226 *
223 * The calling convention follows the standard AAPCS: 227 * The calling convention follows the standard AAPCS:
224 * r0 - r3: caller save 228 * r0 - r3: caller save
225 * r12: caller save 229 * r12: caller save
@@ -363,6 +367,11 @@ hyp_hvc:
363host_switch_to_hyp: 367host_switch_to_hyp:
364 pop {r0, r1, r2} 368 pop {r0, r1, r2}
365 369
370 /* Check for __hyp_get_vectors */
371 cmp r0, #-1
372 mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR
373 beq 1f
374
366 push {lr} 375 push {lr}
367 mrs lr, SPSR 376 mrs lr, SPSR
368 push {lr} 377 push {lr}
@@ -378,7 +387,7 @@ THUMB( orr lr, #1)
378 pop {lr} 387 pop {lr}
379 msr SPSR_csxf, lr 388 msr SPSR_csxf, lr
380 pop {lr} 389 pop {lr}
381 eret 3901: eret
382 391
383guest_trap: 392guest_trap:
384 load_vcpu @ Load VCPU pointer to r0 393 load_vcpu @ Load VCPU pointer to r0
diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h
index 13fb0b3efc5f..453a179469a3 100644
--- a/arch/arm64/include/asm/percpu.h
+++ b/arch/arm64/include/asm/percpu.h
@@ -16,6 +16,8 @@
16#ifndef __ASM_PERCPU_H 16#ifndef __ASM_PERCPU_H
17#define __ASM_PERCPU_H 17#define __ASM_PERCPU_H
18 18
19#ifdef CONFIG_SMP
20
19static inline void set_my_cpu_offset(unsigned long off) 21static inline void set_my_cpu_offset(unsigned long off)
20{ 22{
21 asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory"); 23 asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory");
@@ -36,6 +38,12 @@ static inline unsigned long __my_cpu_offset(void)
36} 38}
37#define __my_cpu_offset __my_cpu_offset() 39#define __my_cpu_offset __my_cpu_offset()
38 40
41#else /* !CONFIG_SMP */
42
43#define set_my_cpu_offset(x) do { } while (0)
44
45#endif /* CONFIG_SMP */
46
39#include <asm-generic/percpu.h> 47#include <asm-generic/percpu.h>
40 48
41#endif /* __ASM_PERCPU_H */ 49#endif /* __ASM_PERCPU_H */
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index b524dcd17243..aa3917c8b623 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -136,11 +136,11 @@ extern struct page *empty_zero_page;
136/* 136/*
137 * The following only work if pte_present(). Undefined behaviour otherwise. 137 * The following only work if pte_present(). Undefined behaviour otherwise.
138 */ 138 */
139#define pte_present(pte) (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)) 139#define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
140#define pte_dirty(pte) (pte_val(pte) & PTE_DIRTY) 140#define pte_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
141#define pte_young(pte) (pte_val(pte) & PTE_AF) 141#define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
142#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL) 142#define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
143#define pte_write(pte) (pte_val(pte) & PTE_WRITE) 143#define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
144#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN)) 144#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
145 145
146#define pte_valid_user(pte) \ 146#define pte_valid_user(pte) \
diff --git a/arch/arm64/kernel/stacktrace.c b/arch/arm64/kernel/stacktrace.c
index c3b6c63ea5fb..38f0558f0c0a 100644
--- a/arch/arm64/kernel/stacktrace.c
+++ b/arch/arm64/kernel/stacktrace.c
@@ -48,7 +48,11 @@ int unwind_frame(struct stackframe *frame)
48 48
49 frame->sp = fp + 0x10; 49 frame->sp = fp + 0x10;
50 frame->fp = *(unsigned long *)(fp); 50 frame->fp = *(unsigned long *)(fp);
51 frame->pc = *(unsigned long *)(fp + 8); 51 /*
52 * -4 here because we care about the PC at time of bl,
53 * not where the return will go.
54 */
55 frame->pc = *(unsigned long *)(fp + 8) - 4;
52 56
53 return 0; 57 return 0;
54} 58}
diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index 3b47c36e10ff..2c56012cb2d2 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -694,6 +694,24 @@ __hyp_panic_str:
694 694
695 .align 2 695 .align 2
696 696
697/*
698 * u64 kvm_call_hyp(void *hypfn, ...);
699 *
700 * This is not really a variadic function in the classic C-way and care must
701 * be taken when calling this to ensure parameters are passed in registers
702 * only, since the stack will change between the caller and the callee.
703 *
704 * Call the function with the first argument containing a pointer to the
705 * function you wish to call in Hyp mode, and subsequent arguments will be
706 * passed as x0, x1, and x2 (a maximum of 3 arguments in addition to the
707 * function pointer can be passed). The function being called must be mapped
708 * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are
709 * passed in r0 and r1.
710 *
711 * A function pointer with a value of 0 has a special meaning, and is
712 * used to implement __hyp_get_vectors in the same way as in
713 * arch/arm64/kernel/hyp_stub.S.
714 */
697ENTRY(kvm_call_hyp) 715ENTRY(kvm_call_hyp)
698 hvc #0 716 hvc #0
699 ret 717 ret
@@ -737,7 +755,12 @@ el1_sync: // Guest trapped into EL2
737 pop x2, x3 755 pop x2, x3
738 pop x0, x1 756 pop x0, x1
739 757
740 push lr, xzr 758 /* Check for __hyp_get_vectors */
759 cbnz x0, 1f
760 mrs x0, vbar_el2
761 b 2f
762
7631: push lr, xzr
741 764
742 /* 765 /*
743 * Compute the function address in EL2, and shuffle the parameters. 766 * Compute the function address in EL2, and shuffle the parameters.
@@ -750,7 +773,7 @@ el1_sync: // Guest trapped into EL2
750 blr lr 773 blr lr
751 774
752 pop lr, xzr 775 pop lr, xzr
753 eret 7762: eret
754 777
755el1_trap: 778el1_trap:
756 /* 779 /*
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index 7cc8c364924d..6fb9e813a910 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -1,4 +1,4 @@
1 1generic-y += barrier.h
2generic-y += bitsperlong.h 2generic-y += bitsperlong.h
3generic-y += clkdev.h 3generic-y += clkdev.h
4generic-y += cputime.h 4generic-y += cputime.h
@@ -6,6 +6,7 @@ generic-y += device.h
6generic-y += emergency-restart.h 6generic-y += emergency-restart.h
7generic-y += errno.h 7generic-y += errno.h
8generic-y += exec.h 8generic-y += exec.h
9generic-y += hash.h
9generic-y += hw_irq.h 10generic-y += hw_irq.h
10generic-y += ioctl.h 11generic-y += ioctl.h
11generic-y += ipcbuf.h 12generic-y += ipcbuf.h
@@ -18,6 +19,7 @@ generic-y += local.h
18generic-y += mman.h 19generic-y += mman.h
19generic-y += mutex.h 20generic-y += mutex.h
20generic-y += percpu.h 21generic-y += percpu.h
22generic-y += preempt.h
21generic-y += resource.h 23generic-y += resource.h
22generic-y += scatterlist.h 24generic-y += scatterlist.h
23generic-y += sections.h 25generic-y += sections.h
@@ -31,5 +33,3 @@ generic-y += trace_clock.h
31generic-y += types.h 33generic-y += types.h
32generic-y += word-at-a-time.h 34generic-y += word-at-a-time.h
33generic-y += xor.h 35generic-y += xor.h
34generic-y += preempt.h
35generic-y += hash.h
diff --git a/arch/m68k/include/asm/barrier.h b/arch/m68k/include/asm/barrier.h
deleted file mode 100644
index 15c5f77c1614..000000000000
--- a/arch/m68k/include/asm/barrier.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _M68K_BARRIER_H
2#define _M68K_BARRIER_H
3
4#define nop() do { asm volatile ("nop"); barrier(); } while (0)
5
6#include <asm-generic/barrier.h>
7
8#endif /* _M68K_BARRIER_H */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 014f288fc813..9d38b73989eb 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6 6
7#define NR_syscalls 349 7#define NR_syscalls 351
8 8
9#define __ARCH_WANT_OLD_READDIR 9#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_OLD_STAT 10#define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index 625f321001dc..b932dd470041 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -354,5 +354,7 @@
354#define __NR_process_vm_writev 346 354#define __NR_process_vm_writev 346
355#define __NR_kcmp 347 355#define __NR_kcmp 347
356#define __NR_finit_module 348 356#define __NR_finit_module 348
357#define __NR_sched_setattr 349
358#define __NR_sched_getattr 350
357 359
358#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ 360#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 3f04ea0ab802..b6223dc41d82 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -369,4 +369,6 @@ ENTRY(sys_call_table)
369 .long sys_process_vm_writev 369 .long sys_process_vm_writev
370 .long sys_kcmp 370 .long sys_kcmp
371 .long sys_finit_module 371 .long sys_finit_module
372 .long sys_sched_setattr
373 .long sys_sched_getattr /* 350 */
372 374
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 84fdf6857c31..a613d2c82fd9 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -200,10 +200,11 @@ static inline void __user *arch_compat_alloc_user_space(long len)
200 200
201 /* 201 /*
202 * We can't access below the stack pointer in the 32bit ABI and 202 * We can't access below the stack pointer in the 32bit ABI and
203 * can access 288 bytes in the 64bit ABI 203 * can access 288 bytes in the 64bit big-endian ABI,
204 * or 512 bytes with the new ELFv2 little-endian ABI.
204 */ 205 */
205 if (!is_32bit_task()) 206 if (!is_32bit_task())
206 usp -= 288; 207 usp -= USER_REDZONE_SIZE;
207 208
208 return (void __user *) (usp - len); 209 return (void __user *) (usp - len);
209} 210}
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 40157e2ca691..ed82142a3251 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -816,8 +816,8 @@ int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
816int64_t opal_pci_poll(uint64_t phb_id); 816int64_t opal_pci_poll(uint64_t phb_id);
817int64_t opal_return_cpu(void); 817int64_t opal_return_cpu(void);
818 818
819int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, __be64 *val); 819int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
820int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val); 820int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
821 821
822int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type, 822int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
823 uint32_t addr, uint32_t data, uint32_t sz); 823 uint32_t addr, uint32_t data, uint32_t sz);
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index becc08e6a65c..279b80f3bb29 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -28,11 +28,23 @@
28 28
29#ifdef __powerpc64__ 29#ifdef __powerpc64__
30 30
31/*
32 * Size of redzone that userspace is allowed to use below the stack
33 * pointer. This is 288 in the 64-bit big-endian ELF ABI, and 512 in
34 * the new ELFv2 little-endian ABI, so we allow the larger amount.
35 *
36 * For kernel code we allow a 288-byte redzone, in order to conserve
37 * kernel stack space; gcc currently only uses 288 bytes, and will
38 * hopefully allow explicit control of the redzone size in future.
39 */
40#define USER_REDZONE_SIZE 512
41#define KERNEL_REDZONE_SIZE 288
42
31#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ 43#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
32#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */ 44#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
33#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265) 45#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
34#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \ 46#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
35 STACK_FRAME_OVERHEAD + 288) 47 STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
36#define STACK_FRAME_MARKER 12 48#define STACK_FRAME_MARKER 12
37 49
38/* Size of dummy stack frame allocated when calling signal handler. */ 50/* Size of dummy stack frame allocated when calling signal handler. */
@@ -41,6 +53,8 @@
41 53
42#else /* __powerpc64__ */ 54#else /* __powerpc64__ */
43 55
56#define USER_REDZONE_SIZE 0
57#define KERNEL_REDZONE_SIZE 0
44#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ 58#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
45#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */ 59#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
46#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773) 60#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 11c1d069d920..7a13f378ca2c 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -98,17 +98,19 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
98 size_t csize, unsigned long offset, int userbuf) 98 size_t csize, unsigned long offset, int userbuf)
99{ 99{
100 void *vaddr; 100 void *vaddr;
101 phys_addr_t paddr;
101 102
102 if (!csize) 103 if (!csize)
103 return 0; 104 return 0;
104 105
105 csize = min_t(size_t, csize, PAGE_SIZE); 106 csize = min_t(size_t, csize, PAGE_SIZE);
107 paddr = pfn << PAGE_SHIFT;
106 108
107 if ((min_low_pfn < pfn) && (pfn < max_pfn)) { 109 if (memblock_is_region_memory(paddr, csize)) {
108 vaddr = __va(pfn << PAGE_SHIFT); 110 vaddr = __va(paddr);
109 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf); 111 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
110 } else { 112 } else {
111 vaddr = __ioremap(pfn << PAGE_SHIFT, PAGE_SIZE, 0); 113 vaddr = __ioremap(paddr, PAGE_SIZE, 0);
112 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf); 114 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
113 iounmap(vaddr); 115 iounmap(vaddr);
114 } 116 }
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 9b27b293a922..b0ded97ee4e1 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -74,6 +74,7 @@ ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
74 */ 74 */
75static int test_24bit_addr(unsigned long ip, unsigned long addr) 75static int test_24bit_addr(unsigned long ip, unsigned long addr)
76{ 76{
77 addr = ppc_function_entry((void *)addr);
77 78
78 /* use the create_branch to verify that this offset can be branched */ 79 /* use the create_branch to verify that this offset can be branched */
79 return create_branch((unsigned int *)ip, addr, 0); 80 return create_branch((unsigned int *)ip, addr, 0);
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index e35bf773df7a..8d253c29649b 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -65,8 +65,8 @@ struct rt_sigframe {
65 struct siginfo __user *pinfo; 65 struct siginfo __user *pinfo;
66 void __user *puc; 66 void __user *puc;
67 struct siginfo info; 67 struct siginfo info;
68 /* 64 bit ABI allows for 288 bytes below sp before decrementing it. */ 68 /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */
69 char abigap[288]; 69 char abigap[USER_REDZONE_SIZE];
70} __attribute__ ((aligned (16))); 70} __attribute__ ((aligned (16)));
71 71
72static const char fmt32[] = KERN_INFO \ 72static const char fmt32[] = KERN_INFO \
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index f51474336460..253fefe3d1a0 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -114,6 +114,7 @@ DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_inbB_dbgfs_ops, ioda_eeh_inbB_dbgfs_get,
114 ioda_eeh_inbB_dbgfs_set, "0x%llx\n"); 114 ioda_eeh_inbB_dbgfs_set, "0x%llx\n");
115#endif /* CONFIG_DEBUG_FS */ 115#endif /* CONFIG_DEBUG_FS */
116 116
117
117/** 118/**
118 * ioda_eeh_post_init - Chip dependent post initialization 119 * ioda_eeh_post_init - Chip dependent post initialization
119 * @hose: PCI controller 120 * @hose: PCI controller
@@ -221,6 +222,22 @@ static int ioda_eeh_set_option(struct eeh_pe *pe, int option)
221 return ret; 222 return ret;
222} 223}
223 224
225static void ioda_eeh_phb_diag(struct pci_controller *hose)
226{
227 struct pnv_phb *phb = hose->private_data;
228 long rc;
229
230 rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
231 PNV_PCI_DIAG_BUF_SIZE);
232 if (rc != OPAL_SUCCESS) {
233 pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
234 __func__, hose->global_number, rc);
235 return;
236 }
237
238 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
239}
240
224/** 241/**
225 * ioda_eeh_get_state - Retrieve the state of PE 242 * ioda_eeh_get_state - Retrieve the state of PE
226 * @pe: EEH PE 243 * @pe: EEH PE
@@ -272,6 +289,9 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
272 result |= EEH_STATE_DMA_ACTIVE; 289 result |= EEH_STATE_DMA_ACTIVE;
273 result |= EEH_STATE_MMIO_ENABLED; 290 result |= EEH_STATE_MMIO_ENABLED;
274 result |= EEH_STATE_DMA_ENABLED; 291 result |= EEH_STATE_DMA_ENABLED;
292 } else if (!(pe->state & EEH_PE_ISOLATED)) {
293 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
294 ioda_eeh_phb_diag(hose);
275 } 295 }
276 296
277 return result; 297 return result;
@@ -315,6 +335,15 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
315 __func__, fstate, hose->global_number, pe_no); 335 __func__, fstate, hose->global_number, pe_no);
316 } 336 }
317 337
338 /* Dump PHB diag-data for frozen PE */
339 if (result != EEH_STATE_NOT_SUPPORT &&
340 (result & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) !=
341 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE) &&
342 !(pe->state & EEH_PE_ISOLATED)) {
343 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
344 ioda_eeh_phb_diag(hose);
345 }
346
318 return result; 347 return result;
319} 348}
320 349
@@ -530,42 +559,6 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
530} 559}
531 560
532/** 561/**
533 * ioda_eeh_get_log - Retrieve error log
534 * @pe: EEH PE
535 * @severity: Severity level of the log
536 * @drv_log: buffer to store the log
537 * @len: space of the log buffer
538 *
539 * The function is used to retrieve error log from P7IOC.
540 */
541static int ioda_eeh_get_log(struct eeh_pe *pe, int severity,
542 char *drv_log, unsigned long len)
543{
544 s64 ret;
545 unsigned long flags;
546 struct pci_controller *hose = pe->phb;
547 struct pnv_phb *phb = hose->private_data;
548
549 spin_lock_irqsave(&phb->lock, flags);
550
551 ret = opal_pci_get_phb_diag_data2(phb->opal_id,
552 phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
553 if (ret) {
554 spin_unlock_irqrestore(&phb->lock, flags);
555 pr_warning("%s: Can't get log for PHB#%x-PE#%x (%lld)\n",
556 __func__, hose->global_number, pe->addr, ret);
557 return -EIO;
558 }
559
560 /* The PHB diag-data is always indicative */
561 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
562
563 spin_unlock_irqrestore(&phb->lock, flags);
564
565 return 0;
566}
567
568/**
569 * ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE 562 * ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE
570 * @pe: EEH PE 563 * @pe: EEH PE
571 * 564 *
@@ -646,22 +639,6 @@ static void ioda_eeh_hub_diag(struct pci_controller *hose)
646 } 639 }
647} 640}
648 641
649static void ioda_eeh_phb_diag(struct pci_controller *hose)
650{
651 struct pnv_phb *phb = hose->private_data;
652 long rc;
653
654 rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
655 PNV_PCI_DIAG_BUF_SIZE);
656 if (rc != OPAL_SUCCESS) {
657 pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
658 __func__, hose->global_number, rc);
659 return;
660 }
661
662 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
663}
664
665static int ioda_eeh_get_phb_pe(struct pci_controller *hose, 642static int ioda_eeh_get_phb_pe(struct pci_controller *hose,
666 struct eeh_pe **pe) 643 struct eeh_pe **pe)
667{ 644{
@@ -835,6 +812,20 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
835 } 812 }
836 813
837 /* 814 /*
815 * EEH core will try recover from fenced PHB or
816 * frozen PE. In the time for frozen PE, EEH core
817 * enable IO path for that before collecting logs,
818 * but it ruins the site. So we have to dump the
819 * log in advance here.
820 */
821 if ((ret == EEH_NEXT_ERR_FROZEN_PE ||
822 ret == EEH_NEXT_ERR_FENCED_PHB) &&
823 !((*pe)->state & EEH_PE_ISOLATED)) {
824 eeh_pe_state_mark(*pe, EEH_PE_ISOLATED);
825 ioda_eeh_phb_diag(hose);
826 }
827
828 /*
838 * If we have no errors on the specific PHB or only 829 * If we have no errors on the specific PHB or only
839 * informative error there, we continue poking it. 830 * informative error there, we continue poking it.
840 * Otherwise, we need actions to be taken by upper 831 * Otherwise, we need actions to be taken by upper
@@ -852,7 +843,6 @@ struct pnv_eeh_ops ioda_eeh_ops = {
852 .set_option = ioda_eeh_set_option, 843 .set_option = ioda_eeh_set_option,
853 .get_state = ioda_eeh_get_state, 844 .get_state = ioda_eeh_get_state,
854 .reset = ioda_eeh_reset, 845 .reset = ioda_eeh_reset,
855 .get_log = ioda_eeh_get_log,
856 .configure_bridge = ioda_eeh_configure_bridge, 846 .configure_bridge = ioda_eeh_configure_bridge,
857 .next_error = ioda_eeh_next_error 847 .next_error = ioda_eeh_next_error
858}; 848};
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
index 4fbf276ac99e..4cd2ea6c0dbe 100644
--- a/arch/powerpc/platforms/powernv/opal-xscom.c
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -71,11 +71,11 @@ static int opal_xscom_err_xlate(int64_t rc)
71 } 71 }
72} 72}
73 73
74static u64 opal_scom_unmangle(u64 reg) 74static u64 opal_scom_unmangle(u64 addr)
75{ 75{
76 /* 76 /*
77 * XSCOM indirect addresses have the top bit set. Additionally 77 * XSCOM indirect addresses have the top bit set. Additionally
78 * the reset of the top 3 nibbles is always 0. 78 * the rest of the top 3 nibbles is always 0.
79 * 79 *
80 * Because the debugfs interface uses signed offsets and shifts 80 * Because the debugfs interface uses signed offsets and shifts
81 * the address left by 3, we basically cannot use the top 4 bits 81 * the address left by 3, we basically cannot use the top 4 bits
@@ -86,10 +86,13 @@ static u64 opal_scom_unmangle(u64 reg)
86 * conversion here. To leave room for further xscom address 86 * conversion here. To leave room for further xscom address
87 * expansion, we only clear out the top byte 87 * expansion, we only clear out the top byte
88 * 88 *
89 * For in-kernel use, we also support the real indirect bit, so
90 * we test for any of the top 5 bits
91 *
89 */ 92 */
90 if (reg & (1ull << 59)) 93 if (addr & (0x1full << 59))
91 reg = (reg & ~(0xffull << 56)) | (1ull << 63); 94 addr = (addr & ~(0xffull << 56)) | (1ull << 63);
92 return reg; 95 return addr;
93} 96}
94 97
95static int opal_scom_read(scom_map_t map, u64 reg, u64 *value) 98static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
@@ -98,8 +101,8 @@ static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
98 int64_t rc; 101 int64_t rc;
99 __be64 v; 102 __be64 v;
100 103
101 reg = opal_scom_unmangle(reg); 104 reg = opal_scom_unmangle(m->addr + reg);
102 rc = opal_xscom_read(m->chip, m->addr + reg, (__be64 *)__pa(&v)); 105 rc = opal_xscom_read(m->chip, reg, (__be64 *)__pa(&v));
103 *value = be64_to_cpu(v); 106 *value = be64_to_cpu(v);
104 return opal_xscom_err_xlate(rc); 107 return opal_xscom_err_xlate(rc);
105} 108}
@@ -109,8 +112,8 @@ static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
109 struct opal_scom_map *m = map; 112 struct opal_scom_map *m = map;
110 int64_t rc; 113 int64_t rc;
111 114
112 reg = opal_scom_unmangle(reg); 115 reg = opal_scom_unmangle(m->addr + reg);
113 rc = opal_xscom_write(m->chip, m->addr + reg, value); 116 rc = opal_xscom_write(m->chip, reg, value);
114 return opal_xscom_err_xlate(rc); 117 return opal_xscom_err_xlate(rc);
115} 118}
116 119
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 95633d79ef5d..8518817dcdfd 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -134,57 +134,72 @@ static void pnv_pci_dump_p7ioc_diag_data(struct pci_controller *hose,
134 pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n", 134 pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n",
135 hose->global_number, common->version); 135 hose->global_number, common->version);
136 136
137 pr_info(" brdgCtl: %08x\n", data->brdgCtl); 137 if (data->brdgCtl)
138 138 pr_info(" brdgCtl: %08x\n",
139 pr_info(" portStatusReg: %08x\n", data->portStatusReg); 139 data->brdgCtl);
140 pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus); 140 if (data->portStatusReg || data->rootCmplxStatus ||
141 pr_info(" busAgentStatus: %08x\n", data->busAgentStatus); 141 data->busAgentStatus)
142 142 pr_info(" UtlSts: %08x %08x %08x\n",
143 pr_info(" deviceStatus: %08x\n", data->deviceStatus); 143 data->portStatusReg, data->rootCmplxStatus,
144 pr_info(" slotStatus: %08x\n", data->slotStatus); 144 data->busAgentStatus);
145 pr_info(" linkStatus: %08x\n", data->linkStatus); 145 if (data->deviceStatus || data->slotStatus ||
146 pr_info(" devCmdStatus: %08x\n", data->devCmdStatus); 146 data->linkStatus || data->devCmdStatus ||
147 pr_info(" devSecStatus: %08x\n", data->devSecStatus); 147 data->devSecStatus)
148 148 pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
149 pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus); 149 data->deviceStatus, data->slotStatus,
150 pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus); 150 data->linkStatus, data->devCmdStatus,
151 pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus); 151 data->devSecStatus);
152 pr_info(" tlpHdr1: %08x\n", data->tlpHdr1); 152 if (data->rootErrorStatus || data->uncorrErrorStatus ||
153 pr_info(" tlpHdr2: %08x\n", data->tlpHdr2); 153 data->corrErrorStatus)
154 pr_info(" tlpHdr3: %08x\n", data->tlpHdr3); 154 pr_info(" RootErrSts: %08x %08x %08x\n",
155 pr_info(" tlpHdr4: %08x\n", data->tlpHdr4); 155 data->rootErrorStatus, data->uncorrErrorStatus,
156 pr_info(" sourceId: %08x\n", data->sourceId); 156 data->corrErrorStatus);
157 pr_info(" errorClass: %016llx\n", data->errorClass); 157 if (data->tlpHdr1 || data->tlpHdr2 ||
158 pr_info(" correlator: %016llx\n", data->correlator); 158 data->tlpHdr3 || data->tlpHdr4)
159 pr_info(" p7iocPlssr: %016llx\n", data->p7iocPlssr); 159 pr_info(" RootErrLog: %08x %08x %08x %08x\n",
160 pr_info(" p7iocCsr: %016llx\n", data->p7iocCsr); 160 data->tlpHdr1, data->tlpHdr2,
161 pr_info(" lemFir: %016llx\n", data->lemFir); 161 data->tlpHdr3, data->tlpHdr4);
162 pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask); 162 if (data->sourceId || data->errorClass ||
163 pr_info(" lemWOF: %016llx\n", data->lemWOF); 163 data->correlator)
164 pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus); 164 pr_info(" RootErrLog1: %08x %016llx %016llx\n",
165 pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus); 165 data->sourceId, data->errorClass,
166 pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0); 166 data->correlator);
167 pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1); 167 if (data->p7iocPlssr || data->p7iocCsr)
168 pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus); 168 pr_info(" PhbSts: %016llx %016llx\n",
169 pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus); 169 data->p7iocPlssr, data->p7iocCsr);
170 pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0); 170 if (data->lemFir || data->lemErrorMask ||
171 pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1); 171 data->lemWOF)
172 pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus); 172 pr_info(" Lem: %016llx %016llx %016llx\n",
173 pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus); 173 data->lemFir, data->lemErrorMask,
174 pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0); 174 data->lemWOF);
175 pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1); 175 if (data->phbErrorStatus || data->phbFirstErrorStatus ||
176 pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus); 176 data->phbErrorLog0 || data->phbErrorLog1)
177 pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus); 177 pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
178 pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0); 178 data->phbErrorStatus, data->phbFirstErrorStatus,
179 pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1); 179 data->phbErrorLog0, data->phbErrorLog1);
180 if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
181 data->mmioErrorLog0 || data->mmioErrorLog1)
182 pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
183 data->mmioErrorStatus, data->mmioFirstErrorStatus,
184 data->mmioErrorLog0, data->mmioErrorLog1);
185 if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
186 data->dma0ErrorLog0 || data->dma0ErrorLog1)
187 pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
188 data->dma0ErrorStatus, data->dma0FirstErrorStatus,
189 data->dma0ErrorLog0, data->dma0ErrorLog1);
190 if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
191 data->dma1ErrorLog0 || data->dma1ErrorLog1)
192 pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
193 data->dma1ErrorStatus, data->dma1FirstErrorStatus,
194 data->dma1ErrorLog0, data->dma1ErrorLog1);
180 195
181 for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) { 196 for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) {
182 if ((data->pestA[i] >> 63) == 0 && 197 if ((data->pestA[i] >> 63) == 0 &&
183 (data->pestB[i] >> 63) == 0) 198 (data->pestB[i] >> 63) == 0)
184 continue; 199 continue;
185 200
186 pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]); 201 pr_info(" PE[%3d] A/B: %016llx %016llx\n",
187 pr_info(" PESTB: %016llx\n", data->pestB[i]); 202 i, data->pestA[i], data->pestB[i]);
188 } 203 }
189} 204}
190 205
@@ -197,62 +212,77 @@ static void pnv_pci_dump_phb3_diag_data(struct pci_controller *hose,
197 data = (struct OpalIoPhb3ErrorData*)common; 212 data = (struct OpalIoPhb3ErrorData*)common;
198 pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n", 213 pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n",
199 hose->global_number, common->version); 214 hose->global_number, common->version);
200 215 if (data->brdgCtl)
201 pr_info(" brdgCtl: %08x\n", data->brdgCtl); 216 pr_info(" brdgCtl: %08x\n",
202 217 data->brdgCtl);
203 pr_info(" portStatusReg: %08x\n", data->portStatusReg); 218 if (data->portStatusReg || data->rootCmplxStatus ||
204 pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus); 219 data->busAgentStatus)
205 pr_info(" busAgentStatus: %08x\n", data->busAgentStatus); 220 pr_info(" UtlSts: %08x %08x %08x\n",
206 221 data->portStatusReg, data->rootCmplxStatus,
207 pr_info(" deviceStatus: %08x\n", data->deviceStatus); 222 data->busAgentStatus);
208 pr_info(" slotStatus: %08x\n", data->slotStatus); 223 if (data->deviceStatus || data->slotStatus ||
209 pr_info(" linkStatus: %08x\n", data->linkStatus); 224 data->linkStatus || data->devCmdStatus ||
210 pr_info(" devCmdStatus: %08x\n", data->devCmdStatus); 225 data->devSecStatus)
211 pr_info(" devSecStatus: %08x\n", data->devSecStatus); 226 pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
212 227 data->deviceStatus, data->slotStatus,
213 pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus); 228 data->linkStatus, data->devCmdStatus,
214 pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus); 229 data->devSecStatus);
215 pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus); 230 if (data->rootErrorStatus || data->uncorrErrorStatus ||
216 pr_info(" tlpHdr1: %08x\n", data->tlpHdr1); 231 data->corrErrorStatus)
217 pr_info(" tlpHdr2: %08x\n", data->tlpHdr2); 232 pr_info(" RootErrSts: %08x %08x %08x\n",
218 pr_info(" tlpHdr3: %08x\n", data->tlpHdr3); 233 data->rootErrorStatus, data->uncorrErrorStatus,
219 pr_info(" tlpHdr4: %08x\n", data->tlpHdr4); 234 data->corrErrorStatus);
220 pr_info(" sourceId: %08x\n", data->sourceId); 235 if (data->tlpHdr1 || data->tlpHdr2 ||
221 pr_info(" errorClass: %016llx\n", data->errorClass); 236 data->tlpHdr3 || data->tlpHdr4)
222 pr_info(" correlator: %016llx\n", data->correlator); 237 pr_info(" RootErrLog: %08x %08x %08x %08x\n",
223 238 data->tlpHdr1, data->tlpHdr2,
224 pr_info(" nFir: %016llx\n", data->nFir); 239 data->tlpHdr3, data->tlpHdr4);
225 pr_info(" nFirMask: %016llx\n", data->nFirMask); 240 if (data->sourceId || data->errorClass ||
226 pr_info(" nFirWOF: %016llx\n", data->nFirWOF); 241 data->correlator)
227 pr_info(" PhbPlssr: %016llx\n", data->phbPlssr); 242 pr_info(" RootErrLog1: %08x %016llx %016llx\n",
228 pr_info(" PhbCsr: %016llx\n", data->phbCsr); 243 data->sourceId, data->errorClass,
229 pr_info(" lemFir: %016llx\n", data->lemFir); 244 data->correlator);
230 pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask); 245 if (data->nFir || data->nFirMask ||
231 pr_info(" lemWOF: %016llx\n", data->lemWOF); 246 data->nFirWOF)
232 pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus); 247 pr_info(" nFir: %016llx %016llx %016llx\n",
233 pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus); 248 data->nFir, data->nFirMask,
234 pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0); 249 data->nFirWOF);
235 pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1); 250 if (data->phbPlssr || data->phbCsr)
236 pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus); 251 pr_info(" PhbSts: %016llx %016llx\n",
237 pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus); 252 data->phbPlssr, data->phbCsr);
238 pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0); 253 if (data->lemFir || data->lemErrorMask ||
239 pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1); 254 data->lemWOF)
240 pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus); 255 pr_info(" Lem: %016llx %016llx %016llx\n",
241 pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus); 256 data->lemFir, data->lemErrorMask,
242 pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0); 257 data->lemWOF);
243 pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1); 258 if (data->phbErrorStatus || data->phbFirstErrorStatus ||
244 pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus); 259 data->phbErrorLog0 || data->phbErrorLog1)
245 pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus); 260 pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
246 pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0); 261 data->phbErrorStatus, data->phbFirstErrorStatus,
247 pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1); 262 data->phbErrorLog0, data->phbErrorLog1);
263 if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
264 data->mmioErrorLog0 || data->mmioErrorLog1)
265 pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
266 data->mmioErrorStatus, data->mmioFirstErrorStatus,
267 data->mmioErrorLog0, data->mmioErrorLog1);
268 if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
269 data->dma0ErrorLog0 || data->dma0ErrorLog1)
270 pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
271 data->dma0ErrorStatus, data->dma0FirstErrorStatus,
272 data->dma0ErrorLog0, data->dma0ErrorLog1);
273 if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
274 data->dma1ErrorLog0 || data->dma1ErrorLog1)
275 pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
276 data->dma1ErrorStatus, data->dma1FirstErrorStatus,
277 data->dma1ErrorLog0, data->dma1ErrorLog1);
248 278
249 for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) { 279 for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
250 if ((data->pestA[i] >> 63) == 0 && 280 if ((data->pestA[i] >> 63) == 0 &&
251 (data->pestB[i] >> 63) == 0) 281 (data->pestB[i] >> 63) == 0)
252 continue; 282 continue;
253 283
254 pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]); 284 pr_info(" PE[%3d] A/B: %016llx %016llx\n",
255 pr_info(" PESTB: %016llx\n", data->pestB[i]); 285 i, data->pestA[i], data->pestB[i]);
256 } 286 }
257} 287}
258 288
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 82789e79e539..0ea99e3d4815 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -35,12 +35,7 @@
35#include "offline_states.h" 35#include "offline_states.h"
36 36
37/* This version can't take the spinlock, because it never returns */ 37/* This version can't take the spinlock, because it never returns */
38static struct rtas_args rtas_stop_self_args = { 38static int rtas_stop_self_token = RTAS_UNKNOWN_SERVICE;
39 .token = RTAS_UNKNOWN_SERVICE,
40 .nargs = 0,
41 .nret = 1,
42 .rets = &rtas_stop_self_args.args[0],
43};
44 39
45static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) = 40static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) =
46 CPU_STATE_OFFLINE; 41 CPU_STATE_OFFLINE;
@@ -93,15 +88,20 @@ void set_default_offline_state(int cpu)
93 88
94static void rtas_stop_self(void) 89static void rtas_stop_self(void)
95{ 90{
96 struct rtas_args *args = &rtas_stop_self_args; 91 struct rtas_args args = {
92 .token = cpu_to_be32(rtas_stop_self_token),
93 .nargs = 0,
94 .nret = 1,
95 .rets = &args.args[0],
96 };
97 97
98 local_irq_disable(); 98 local_irq_disable();
99 99
100 BUG_ON(args->token == RTAS_UNKNOWN_SERVICE); 100 BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE);
101 101
102 printk("cpu %u (hwid %u) Ready to die...\n", 102 printk("cpu %u (hwid %u) Ready to die...\n",
103 smp_processor_id(), hard_smp_processor_id()); 103 smp_processor_id(), hard_smp_processor_id());
104 enter_rtas(__pa(args)); 104 enter_rtas(__pa(&args));
105 105
106 panic("Alas, I survived.\n"); 106 panic("Alas, I survived.\n");
107} 107}
@@ -392,10 +392,10 @@ static int __init pseries_cpu_hotplug_init(void)
392 } 392 }
393 } 393 }
394 394
395 rtas_stop_self_args.token = rtas_token("stop-self"); 395 rtas_stop_self_token = rtas_token("stop-self");
396 qcss_tok = rtas_token("query-cpu-stopped-state"); 396 qcss_tok = rtas_token("query-cpu-stopped-state");
397 397
398 if (rtas_stop_self_args.token == RTAS_UNKNOWN_SERVICE || 398 if (rtas_stop_self_token == RTAS_UNKNOWN_SERVICE ||
399 qcss_tok == RTAS_UNKNOWN_SERVICE) { 399 qcss_tok == RTAS_UNKNOWN_SERVICE) {
400 printk(KERN_INFO "CPU Hotplug not supported by firmware " 400 printk(KERN_INFO "CPU Hotplug not supported by firmware "
401 "- disabling.\n"); 401 "- disabling.\n");
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 59c8efce1b99..0248949a756d 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1421,5 +1421,5 @@ ENTRY(sys_sched_setattr_wrapper)
1421ENTRY(sys_sched_getattr_wrapper) 1421ENTRY(sys_sched_getattr_wrapper)
1422 lgfr %r2,%r2 # pid_t 1422 lgfr %r2,%r2 # pid_t
1423 llgtr %r3,%r3 # const char __user * 1423 llgtr %r3,%r3 # const char __user *
1424 llgfr %r3,%r3 # unsigned int 1424 llgfr %r4,%r4 # unsigned int
1425 jg sys_sched_getattr 1425 jg sys_sched_getattr
diff --git a/arch/s390/pci/pci_dma.c b/arch/s390/pci/pci_dma.c
index 60c11a629d96..f91c03119804 100644
--- a/arch/s390/pci/pci_dma.c
+++ b/arch/s390/pci/pci_dma.c
@@ -206,11 +206,13 @@ static void dma_cleanup_tables(struct zpci_dev *zdev)
206 zdev->dma_table = NULL; 206 zdev->dma_table = NULL;
207} 207}
208 208
209static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev, unsigned long start, 209static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev,
210 int size) 210 unsigned long start, int size)
211{ 211{
212 unsigned long boundary_size = 0x1000000; 212 unsigned long boundary_size;
213 213
214 boundary_size = ALIGN(dma_get_seg_boundary(&zdev->pdev->dev) + 1,
215 PAGE_SIZE) >> PAGE_SHIFT;
214 return iommu_area_alloc(zdev->iommu_bitmap, zdev->iommu_pages, 216 return iommu_area_alloc(zdev->iommu_bitmap, zdev->iommu_pages,
215 start, size, 0, boundary_size, 0); 217 start, size, 0, boundary_size, 0);
216} 218}
diff --git a/arch/x86/boot/compressed/aslr.c b/arch/x86/boot/compressed/aslr.c
index 90a21f430117..4dbf967da50d 100644
--- a/arch/x86/boot/compressed/aslr.c
+++ b/arch/x86/boot/compressed/aslr.c
@@ -111,7 +111,7 @@ struct mem_vector {
111}; 111};
112 112
113#define MEM_AVOID_MAX 5 113#define MEM_AVOID_MAX 5
114struct mem_vector mem_avoid[MEM_AVOID_MAX]; 114static struct mem_vector mem_avoid[MEM_AVOID_MAX];
115 115
116static bool mem_contains(struct mem_vector *region, struct mem_vector *item) 116static bool mem_contains(struct mem_vector *region, struct mem_vector *item)
117{ 117{
@@ -180,7 +180,7 @@ static void mem_avoid_init(unsigned long input, unsigned long input_size,
180} 180}
181 181
182/* Does this memory vector overlap a known avoided area? */ 182/* Does this memory vector overlap a known avoided area? */
183bool mem_avoid_overlap(struct mem_vector *img) 183static bool mem_avoid_overlap(struct mem_vector *img)
184{ 184{
185 int i; 185 int i;
186 186
@@ -192,8 +192,9 @@ bool mem_avoid_overlap(struct mem_vector *img)
192 return false; 192 return false;
193} 193}
194 194
195unsigned long slots[CONFIG_RANDOMIZE_BASE_MAX_OFFSET / CONFIG_PHYSICAL_ALIGN]; 195static unsigned long slots[CONFIG_RANDOMIZE_BASE_MAX_OFFSET /
196unsigned long slot_max = 0; 196 CONFIG_PHYSICAL_ALIGN];
197static unsigned long slot_max;
197 198
198static void slots_append(unsigned long addr) 199static void slots_append(unsigned long addr)
199{ 200{
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 895604f2e916..79f9f848bee4 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1192,6 +1192,9 @@ static void x86_pmu_del(struct perf_event *event, int flags)
1192 for (i = 0; i < cpuc->n_events; i++) { 1192 for (i = 0; i < cpuc->n_events; i++) {
1193 if (event == cpuc->event_list[i]) { 1193 if (event == cpuc->event_list[i]) {
1194 1194
1195 if (i >= cpuc->n_events - cpuc->n_added)
1196 --cpuc->n_added;
1197
1195 if (x86_pmu.put_event_constraints) 1198 if (x86_pmu.put_event_constraints)
1196 x86_pmu.put_event_constraints(cpuc, event); 1199 x86_pmu.put_event_constraints(cpuc, event);
1197 1200
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 4eabc160696f..679cef0791cd 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -279,5 +279,7 @@ void arch_crash_save_vmcoreinfo(void)
279 VMCOREINFO_SYMBOL(node_data); 279 VMCOREINFO_SYMBOL(node_data);
280 VMCOREINFO_LENGTH(node_data, MAX_NUMNODES); 280 VMCOREINFO_LENGTH(node_data, MAX_NUMNODES);
281#endif 281#endif
282 vmcoreinfo_append_str("KERNELOFFSET=%lx\n",
283 (unsigned long)&_text - __START_KERNEL);
282} 284}
283 285
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index e50425d0f5f7..9b531351a587 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -2672,6 +2672,7 @@ static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2672 break; 2672 break;
2673 } 2673 }
2674 2674
2675 drop_large_spte(vcpu, iterator.sptep);
2675 if (!is_shadow_present_pte(*iterator.sptep)) { 2676 if (!is_shadow_present_pte(*iterator.sptep)) {
2676 u64 base_addr = iterator.addr; 2677 u64 base_addr = iterator.addr;
2677 2678
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a06f101ef64b..392752834751 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6688,7 +6688,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
6688 else if (is_page_fault(intr_info)) 6688 else if (is_page_fault(intr_info))
6689 return enable_ept; 6689 return enable_ept;
6690 else if (is_no_device(intr_info) && 6690 else if (is_no_device(intr_info) &&
6691 !(nested_read_cr0(vmcs12) & X86_CR0_TS)) 6691 !(vmcs12->guest_cr0 & X86_CR0_TS))
6692 return 0; 6692 return 0;
6693 return vmcs12->exception_bitmap & 6693 return vmcs12->exception_bitmap &
6694 (1u << (intr_info & INTR_INFO_VECTOR_MASK)); 6694 (1u << (intr_info & INTR_INFO_VECTOR_MASK));
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 39c28f09dfd5..2b8578432d5b 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -6186,7 +6186,7 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6186 frag->len -= len; 6186 frag->len -= len;
6187 } 6187 }
6188 6188
6189 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) { 6189 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6190 vcpu->mmio_needed = 0; 6190 vcpu->mmio_needed = 0;
6191 6191
6192 /* FIXME: return into emulator if single-stepping. */ 6192 /* FIXME: return into emulator if single-stepping. */
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index ba56e11cbf77..c87ae7c6e5f9 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -20,6 +20,7 @@ config XTENSA
20 select HAVE_FUNCTION_TRACER 20 select HAVE_FUNCTION_TRACER
21 select HAVE_IRQ_TIME_ACCOUNTING 21 select HAVE_IRQ_TIME_ACCOUNTING
22 select HAVE_PERF_EVENTS 22 select HAVE_PERF_EVENTS
23 select COMMON_CLK
23 help 24 help
24 Xtensa processors are 32-bit RISC machines designed by Tensilica 25 Xtensa processors are 32-bit RISC machines designed by Tensilica
25 primarily for embedded systems. These processors are both 26 primarily for embedded systems. These processors are both
@@ -80,7 +81,6 @@ choice
80config XTENSA_VARIANT_FSF 81config XTENSA_VARIANT_FSF
81 bool "fsf - default (not generic) configuration" 82 bool "fsf - default (not generic) configuration"
82 select MMU 83 select MMU
83 select HAVE_XTENSA_GPIO32
84 84
85config XTENSA_VARIANT_DC232B 85config XTENSA_VARIANT_DC232B
86 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" 86 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
@@ -135,7 +135,6 @@ config HAVE_SMP
135config SMP 135config SMP
136 bool "Enable Symmetric multi-processing support" 136 bool "Enable Symmetric multi-processing support"
137 depends on HAVE_SMP 137 depends on HAVE_SMP
138 select USE_GENERIC_SMP_HELPERS
139 select GENERIC_SMP_IDLE_THREAD 138 select GENERIC_SMP_IDLE_THREAD
140 help 139 help
141 Enabled SMP Software; allows more than one CPU/CORE 140 Enabled SMP Software; allows more than one CPU/CORE
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index 46b4f5eab421..e7370b11348e 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -35,6 +35,13 @@
35 interrupt-controller; 35 interrupt-controller;
36 }; 36 };
37 37
38 clocks {
39 osc: main-oscillator {
40 #clock-cells = <0>;
41 compatible = "fixed-clock";
42 };
43 };
44
38 serial0: serial@fd050020 { 45 serial0: serial@fd050020 {
39 device_type = "serial"; 46 device_type = "serial";
40 compatible = "ns16550a"; 47 compatible = "ns16550a";
@@ -42,9 +49,7 @@
42 reg = <0xfd050020 0x20>; 49 reg = <0xfd050020 0x20>;
43 reg-shift = <2>; 50 reg-shift = <2>;
44 interrupts = <0 1>; /* external irq 0 */ 51 interrupts = <0 1>; /* external irq 0 */
45 /* Filled in by platform_setup from FPGA register 52 clocks = <&osc>;
46 * clock-frequency = <100000000>;
47 */
48 }; 53 };
49 54
50 enet0: ethoc@fd030000 { 55 enet0: ethoc@fd030000 {
@@ -52,5 +57,6 @@
52 reg = <0xfd030000 0x4000 0xfd800000 0x4000>; 57 reg = <0xfd030000 0x4000 0xfd800000 0x4000>;
53 interrupts = <1 1>; /* external irq 1 */ 58 interrupts = <1 1>; /* external irq 1 */
54 local-mac-address = [00 50 c2 13 6f 00]; 59 local-mac-address = [00 50 c2 13 6f 00];
60 clocks = <&osc>;
55 }; 61 };
56}; 62};
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 2a042d430c25..74944207167e 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -25,7 +25,7 @@
25 25
26#ifdef CONFIG_MMU 26#ifdef CONFIG_MMU
27 27
28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF 28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
29extern unsigned long xtensa_kio_paddr; 29extern unsigned long xtensa_kio_paddr;
30 30
31static inline unsigned long xtensa_get_kio_paddr(void) 31static inline unsigned long xtensa_get_kio_paddr(void)
diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h
index 8c194f6af45e..677bfcf4ee5d 100644
--- a/arch/xtensa/include/asm/traps.h
+++ b/arch/xtensa/include/asm/traps.h
@@ -23,25 +23,37 @@ void secondary_trap_init(void);
23 23
24static inline void spill_registers(void) 24static inline void spill_registers(void)
25{ 25{
26 26#if XCHAL_NUM_AREGS > 16
27 __asm__ __volatile__ ( 27 __asm__ __volatile__ (
28 "movi a14, "__stringify((1 << PS_EXCM_BIT) | LOCKLEVEL)"\n\t" 28 " call12 1f\n"
29 "mov a12, a0\n\t" 29 " _j 2f\n"
30 "rsr a13, sar\n\t" 30 " retw\n"
31 "xsr a14, ps\n\t" 31 " .align 4\n"
32 "movi a0, _spill_registers\n\t" 32 "1:\n"
33 "rsync\n\t" 33 " _entry a1, 48\n"
34 "callx0 a0\n\t" 34 " addi a12, a0, 3\n"
35 "mov a0, a12\n\t" 35#if XCHAL_NUM_AREGS > 32
36 "wsr a13, sar\n\t" 36 " .rept (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n"
37 "wsr a14, ps\n\t" 37 " _entry a1, 48\n"
38 : : 38 " mov a12, a0\n"
39#if defined(CONFIG_FRAME_POINTER) 39 " .endr\n"
40 : "a2", "a3", "a4", "a11", "a12", "a13", "a14", "a15", 40#endif
41 " _entry a1, 48\n"
42#if XCHAL_NUM_AREGS % 12 == 0
43 " mov a8, a8\n"
44#elif XCHAL_NUM_AREGS % 12 == 4
45 " mov a12, a12\n"
46#elif XCHAL_NUM_AREGS % 12 == 8
47 " mov a4, a4\n"
48#endif
49 " retw\n"
50 "2:\n"
51 : : : "a12", "a13", "memory");
41#else 52#else
42 : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", 53 __asm__ __volatile__ (
54 " mov a12, a12\n"
55 : : : "memory");
43#endif 56#endif
44 "memory");
45} 57}
46 58
47#endif /* _XTENSA_TRAPS_H */ 59#endif /* _XTENSA_TRAPS_H */
diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h
index 5791b45d5a5d..f74ddfbb92ef 100644
--- a/arch/xtensa/include/asm/vectors.h
+++ b/arch/xtensa/include/asm/vectors.h
@@ -25,7 +25,7 @@
25#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000 25#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000
26#define XCHAL_KIO_SIZE 0x10000000 26#define XCHAL_KIO_SIZE 0x10000000
27 27
28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF 28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
29#define XCHAL_KIO_PADDR xtensa_get_kio_paddr() 29#define XCHAL_KIO_PADDR xtensa_get_kio_paddr()
30#else 30#else
31#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR 31#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index 51940fec6990..b9395529f02d 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -734,7 +734,12 @@ __SYSCALL(332, sys_finit_module, 3)
734#define __NR_accept4 333 734#define __NR_accept4 333
735__SYSCALL(333, sys_accept4, 4) 735__SYSCALL(333, sys_accept4, 4)
736 736
737#define __NR_syscall_count 334 737#define __NR_sched_setattr 334
738__SYSCALL(334, sys_sched_setattr, 2)
739#define __NR_sched_getattr 335
740__SYSCALL(335, sys_sched_getattr, 3)
741
742#define __NR_syscall_count 336
738 743
739/* 744/*
740 * sysxtensa syscall handler 745 * sysxtensa syscall handler
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 21dbe6bdb8ed..ef7f4990722b 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -1081,196 +1081,53 @@ ENTRY(fast_syscall_spill_registers)
1081 1081
1082 rsr a0, sar 1082 rsr a0, sar
1083 s32i a3, a2, PT_AREG3 1083 s32i a3, a2, PT_AREG3
1084 s32i a4, a2, PT_AREG4 1084 s32i a0, a2, PT_SAR
1085 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1086 1085
1087 /* The spill routine might clobber a7, a11, and a15. */ 1086 /* The spill routine might clobber a4, a7, a8, a11, a12, and a15. */
1088 1087
1088 s32i a4, a2, PT_AREG4
1089 s32i a7, a2, PT_AREG7 1089 s32i a7, a2, PT_AREG7
1090 s32i a8, a2, PT_AREG8
1090 s32i a11, a2, PT_AREG11 1091 s32i a11, a2, PT_AREG11
1092 s32i a12, a2, PT_AREG12
1091 s32i a15, a2, PT_AREG15 1093 s32i a15, a2, PT_AREG15
1092 1094
1093 call0 _spill_registers # destroys a3, a4, and SAR
1094
1095 /* Advance PC, restore registers and SAR, and return from exception. */
1096
1097 l32i a3, a2, PT_AREG5
1098 l32i a4, a2, PT_AREG4
1099 l32i a0, a2, PT_AREG0
1100 wsr a3, sar
1101 l32i a3, a2, PT_AREG3
1102
1103 /* Restore clobbered registers. */
1104
1105 l32i a7, a2, PT_AREG7
1106 l32i a11, a2, PT_AREG11
1107 l32i a15, a2, PT_AREG15
1108
1109 movi a2, 0
1110 rfe
1111
1112ENDPROC(fast_syscall_spill_registers)
1113
1114/* Fixup handler.
1115 *
1116 * We get here if the spill routine causes an exception, e.g. tlb miss.
1117 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1118 * we entered the spill routine and jump to the user exception handler.
1119 *
1120 * a0: value of depc, original value in depc
1121 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1122 * a3: exctable, original value in excsave1
1123 */
1124
1125ENTRY(fast_syscall_spill_registers_fixup)
1126
1127 rsr a2, windowbase # get current windowbase (a2 is saved)
1128 xsr a0, depc # restore depc and a0
1129 ssl a2 # set shift (32 - WB)
1130
1131 /* We need to make sure the current registers (a0-a3) are preserved.
1132 * To do this, we simply set the bit for the current window frame
1133 * in WS, so that the exception handlers save them to the task stack.
1134 */
1135
1136 xsr a3, excsave1 # get spill-mask
1137 slli a3, a3, 1 # shift left by one
1138
1139 slli a2, a3, 32-WSBITS
1140 src a2, a3, a2 # a2 = xxwww1yyxxxwww1yy......
1141 wsr a2, windowstart # set corrected windowstart
1142
1143 srli a3, a3, 1
1144 rsr a2, excsave1
1145 l32i a2, a2, EXC_TABLE_DOUBLE_SAVE # restore a2
1146 xsr a2, excsave1
1147 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE # save a3
1148 l32i a3, a2, EXC_TABLE_PARAM # original WB (in user task)
1149 xsr a2, excsave1
1150
1151 /* Return to the original (user task) WINDOWBASE.
1152 * We leave the following frame behind:
1153 * a0, a1, a2 same
1154 * a3: trashed (saved in EXC_TABLE_DOUBLE_SAVE)
1155 * depc: depc (we have to return to that address)
1156 * excsave_1: exctable
1157 */
1158
1159 wsr a3, windowbase
1160 rsync
1161
1162 /* We are now in the original frame when we entered _spill_registers:
1163 * a0: return address
1164 * a1: used, stack pointer
1165 * a2: kernel stack pointer
1166 * a3: available
1167 * depc: exception address
1168 * excsave: exctable
1169 * Note: This frame might be the same as above.
1170 */
1171
1172 /* Setup stack pointer. */
1173
1174 addi a2, a2, -PT_USER_SIZE
1175 s32i a0, a2, PT_AREG0
1176
1177 /* Make sure we return to this fixup handler. */
1178
1179 movi a3, fast_syscall_spill_registers_fixup_return
1180 s32i a3, a2, PT_DEPC # setup depc
1181
1182 /* Jump to the exception handler. */
1183
1184 rsr a3, excsave1
1185 rsr a0, exccause
1186 addx4 a0, a0, a3 # find entry in table
1187 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1188 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1189 jx a0
1190
1191ENDPROC(fast_syscall_spill_registers_fixup)
1192
1193ENTRY(fast_syscall_spill_registers_fixup_return)
1194
1195 /* When we return here, all registers have been restored (a2: DEPC) */
1196
1197 wsr a2, depc # exception address
1198
1199 /* Restore fixup handler. */
1200
1201 rsr a2, excsave1
1202 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE
1203 movi a3, fast_syscall_spill_registers_fixup
1204 s32i a3, a2, EXC_TABLE_FIXUP
1205 rsr a3, windowbase
1206 s32i a3, a2, EXC_TABLE_PARAM
1207 l32i a2, a2, EXC_TABLE_KSTK
1208
1209 /* Load WB at the time the exception occurred. */
1210
1211 rsr a3, sar # WB is still in SAR
1212 neg a3, a3
1213 wsr a3, windowbase
1214 rsync
1215
1216 rsr a3, excsave1
1217 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1218
1219 rfde
1220
1221ENDPROC(fast_syscall_spill_registers_fixup_return)
1222
1223/*
1224 * spill all registers.
1225 *
1226 * This is not a real function. The following conditions must be met:
1227 *
1228 * - must be called with call0.
1229 * - uses a3, a4 and SAR.
1230 * - the last 'valid' register of each frame are clobbered.
1231 * - the caller must have registered a fixup handler
1232 * (or be inside a critical section)
1233 * - PS_EXCM must be set (PS_WOE cleared?)
1234 */
1235
1236ENTRY(_spill_registers)
1237
1238 /* 1095 /*
1239 * Rotate ws so that the current windowbase is at bit 0. 1096 * Rotate ws so that the current windowbase is at bit 0.
1240 * Assume ws = xxxwww1yy (www1 current window frame). 1097 * Assume ws = xxxwww1yy (www1 current window frame).
1241 * Rotate ws right so that a4 = yyxxxwww1. 1098 * Rotate ws right so that a4 = yyxxxwww1.
1242 */ 1099 */
1243 1100
1244 rsr a4, windowbase 1101 rsr a0, windowbase
1245 rsr a3, windowstart # a3 = xxxwww1yy 1102 rsr a3, windowstart # a3 = xxxwww1yy
1246 ssr a4 # holds WB 1103 ssr a0 # holds WB
1247 slli a4, a3, WSBITS 1104 slli a0, a3, WSBITS
1248 or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy 1105 or a3, a3, a0 # a3 = xxxwww1yyxxxwww1yy
1249 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1 1106 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1250 1107
1251 /* We are done if there are no more than the current register frame. */ 1108 /* We are done if there are no more than the current register frame. */
1252 1109
1253 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww 1110 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1254 movi a4, (1 << (WSBITS-1)) 1111 movi a0, (1 << (WSBITS-1))
1255 _beqz a3, .Lnospill # only one active frame? jump 1112 _beqz a3, .Lnospill # only one active frame? jump
1256 1113
1257 /* We want 1 at the top, so that we return to the current windowbase */ 1114 /* We want 1 at the top, so that we return to the current windowbase */
1258 1115
1259 or a3, a3, a4 # 1yyxxxwww 1116 or a3, a3, a0 # 1yyxxxwww
1260 1117
1261 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */ 1118 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1262 1119
1263 wsr a3, windowstart # save shifted windowstart 1120 wsr a3, windowstart # save shifted windowstart
1264 neg a4, a3 1121 neg a0, a3
1265 and a3, a4, a3 # first bit set from right: 000010000 1122 and a3, a0, a3 # first bit set from right: 000010000
1266 1123
1267 ffs_ws a4, a3 # a4: shifts to skip empty frames 1124 ffs_ws a0, a3 # a0: shifts to skip empty frames
1268 movi a3, WSBITS 1125 movi a3, WSBITS
1269 sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right 1126 sub a0, a3, a0 # WSBITS-a0:number of 0-bits from right
1270 ssr a4 # save in SAR for later. 1127 ssr a0 # save in SAR for later.
1271 1128
1272 rsr a3, windowbase 1129 rsr a3, windowbase
1273 add a3, a3, a4 1130 add a3, a3, a0
1274 wsr a3, windowbase 1131 wsr a3, windowbase
1275 rsync 1132 rsync
1276 1133
@@ -1285,22 +1142,6 @@ ENTRY(_spill_registers)
1285 * we have to save 4,8. or 12 registers. 1142 * we have to save 4,8. or 12 registers.
1286 */ 1143 */
1287 1144
1288 _bbsi.l a3, 1, .Lc4
1289 _bbsi.l a3, 2, .Lc8
1290
1291 /* Special case: we have a call12-frame starting at a4. */
1292
1293 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1294
1295 s32e a4, a1, -16 # a1 is valid with an empty spill area
1296 l32e a4, a5, -12
1297 s32e a8, a4, -48
1298 mov a8, a4
1299 l32e a4, a1, -16
1300 j .Lc12c
1301
1302.Lnospill:
1303 ret
1304 1145
1305.Lloop: _bbsi.l a3, 1, .Lc4 1146.Lloop: _bbsi.l a3, 1, .Lc4
1306 _bbci.l a3, 2, .Lc12 1147 _bbci.l a3, 2, .Lc12
@@ -1314,20 +1155,10 @@ ENTRY(_spill_registers)
1314 s32e a9, a4, -28 1155 s32e a9, a4, -28
1315 s32e a10, a4, -24 1156 s32e a10, a4, -24
1316 s32e a11, a4, -20 1157 s32e a11, a4, -20
1317
1318 srli a11, a3, 2 # shift windowbase by 2 1158 srli a11, a3, 2 # shift windowbase by 2
1319 rotw 2 1159 rotw 2
1320 _bnei a3, 1, .Lloop 1160 _bnei a3, 1, .Lloop
1321 1161 j .Lexit
1322.Lexit: /* Done. Do the final rotation, set WS, and return. */
1323
1324 rotw 1
1325 rsr a3, windowbase
1326 ssl a3
1327 movi a3, 1
1328 sll a3, a3
1329 wsr a3, windowstart
1330 ret
1331 1162
1332.Lc4: s32e a4, a9, -16 1163.Lc4: s32e a4, a9, -16
1333 s32e a5, a9, -12 1164 s32e a5, a9, -12
@@ -1343,11 +1174,11 @@ ENTRY(_spill_registers)
1343 1174
1344 /* 12-register frame (call12) */ 1175 /* 12-register frame (call12) */
1345 1176
1346 l32e a2, a5, -12 1177 l32e a0, a5, -12
1347 s32e a8, a2, -48 1178 s32e a8, a0, -48
1348 mov a8, a2 1179 mov a8, a0
1349 1180
1350.Lc12c: s32e a9, a8, -44 1181 s32e a9, a8, -44
1351 s32e a10, a8, -40 1182 s32e a10, a8, -40
1352 s32e a11, a8, -36 1183 s32e a11, a8, -36
1353 s32e a12, a8, -32 1184 s32e a12, a8, -32
@@ -1367,30 +1198,54 @@ ENTRY(_spill_registers)
1367 */ 1198 */
1368 1199
1369 rotw 1 1200 rotw 1
1370 mov a5, a13 1201 mov a4, a13
1371 rotw -1 1202 rotw -1
1372 1203
1373 s32e a4, a9, -16 1204 s32e a4, a8, -16
1374 s32e a5, a9, -12 1205 s32e a5, a8, -12
1375 s32e a6, a9, -8 1206 s32e a6, a8, -8
1376 s32e a7, a9, -4 1207 s32e a7, a8, -4
1377 1208
1378 rotw 3 1209 rotw 3
1379 1210
1380 _beqi a3, 1, .Lexit 1211 _beqi a3, 1, .Lexit
1381 j .Lloop 1212 j .Lloop
1382 1213
1383.Linvalid_mask: 1214.Lexit:
1384 1215
1385 /* We get here because of an unrecoverable error in the window 1216 /* Done. Do the final rotation and set WS */
1386 * registers. If we are in user space, we kill the application, 1217
1387 * however, this condition is unrecoverable in kernel space. 1218 rotw 1
1388 */ 1219 rsr a3, windowbase
1220 ssl a3
1221 movi a3, 1
1222 sll a3, a3
1223 wsr a3, windowstart
1224.Lnospill:
1225
1226 /* Advance PC, restore registers and SAR, and return from exception. */
1227
1228 l32i a3, a2, PT_SAR
1229 l32i a0, a2, PT_AREG0
1230 wsr a3, sar
1231 l32i a3, a2, PT_AREG3
1389 1232
1390 rsr a0, ps 1233 /* Restore clobbered registers. */
1391 _bbci.l a0, PS_UM_BIT, 1f
1392 1234
1393 /* User space: Setup a dummy frame and kill application. 1235 l32i a4, a2, PT_AREG4
1236 l32i a7, a2, PT_AREG7
1237 l32i a8, a2, PT_AREG8
1238 l32i a11, a2, PT_AREG11
1239 l32i a12, a2, PT_AREG12
1240 l32i a15, a2, PT_AREG15
1241
1242 movi a2, 0
1243 rfe
1244
1245.Linvalid_mask:
1246
1247 /* We get here because of an unrecoverable error in the window
1248 * registers, so set up a dummy frame and kill the user application.
1394 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer. 1249 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1395 */ 1250 */
1396 1251
@@ -1414,14 +1269,136 @@ ENTRY(_spill_registers)
1414 movi a4, do_exit 1269 movi a4, do_exit
1415 callx4 a4 1270 callx4 a4
1416 1271
14171: /* Kernel space: PANIC! */ 1272 /* shouldn't return, so panic */
1418 1273
1419 wsr a0, excsave1 1274 wsr a0, excsave1
1420 movi a0, unrecoverable_exception 1275 movi a0, unrecoverable_exception
1421 callx0 a0 # should not return 1276 callx0 a0 # should not return
14221: j 1b 12771: j 1b
1423 1278
1424ENDPROC(_spill_registers) 1279
1280ENDPROC(fast_syscall_spill_registers)
1281
1282/* Fixup handler.
1283 *
1284 * We get here if the spill routine causes an exception, e.g. tlb miss.
1285 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1286 * we entered the spill routine and jump to the user exception handler.
1287 *
1288 * Note that we only need to restore the bits in windowstart that have not
1289 * been spilled yet by the _spill_register routine. Luckily, a3 contains a
1290 * rotated windowstart with only those bits set for frames that haven't been
1291 * spilled yet. Because a3 is rotated such that bit 0 represents the register
1292 * frame for the current windowbase - 1, we need to rotate a3 left by the
1293 * value of the current windowbase + 1 and move it to windowstart.
1294 *
1295 * a0: value of depc, original value in depc
1296 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1297 * a3: exctable, original value in excsave1
1298 */
1299
1300ENTRY(fast_syscall_spill_registers_fixup)
1301
1302 rsr a2, windowbase # get current windowbase (a2 is saved)
1303 xsr a0, depc # restore depc and a0
1304 ssl a2 # set shift (32 - WB)
1305
1306 /* We need to make sure the current registers (a0-a3) are preserved.
1307 * To do this, we simply set the bit for the current window frame
1308 * in WS, so that the exception handlers save them to the task stack.
1309 *
1310 * Note: we use a3 to set the windowbase, so we take a special care
1311 * of it, saving it in the original _spill_registers frame across
1312 * the exception handler call.
1313 */
1314
1315 xsr a3, excsave1 # get spill-mask
1316 slli a3, a3, 1 # shift left by one
1317 addi a3, a3, 1 # set the bit for the current window frame
1318
1319 slli a2, a3, 32-WSBITS
1320 src a2, a3, a2 # a2 = xxwww1yyxxxwww1yy......
1321 wsr a2, windowstart # set corrected windowstart
1322
1323 srli a3, a3, 1
1324 rsr a2, excsave1
1325 l32i a2, a2, EXC_TABLE_DOUBLE_SAVE # restore a2
1326 xsr a2, excsave1
1327 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE # save a3
1328 l32i a3, a2, EXC_TABLE_PARAM # original WB (in user task)
1329 xsr a2, excsave1
1330
1331 /* Return to the original (user task) WINDOWBASE.
1332 * We leave the following frame behind:
1333 * a0, a1, a2 same
1334 * a3: trashed (saved in EXC_TABLE_DOUBLE_SAVE)
1335 * depc: depc (we have to return to that address)
1336 * excsave_1: exctable
1337 */
1338
1339 wsr a3, windowbase
1340 rsync
1341
1342 /* We are now in the original frame when we entered _spill_registers:
1343 * a0: return address
1344 * a1: used, stack pointer
1345 * a2: kernel stack pointer
1346 * a3: available
1347 * depc: exception address
1348 * excsave: exctable
1349 * Note: This frame might be the same as above.
1350 */
1351
1352 /* Setup stack pointer. */
1353
1354 addi a2, a2, -PT_USER_SIZE
1355 s32i a0, a2, PT_AREG0
1356
1357 /* Make sure we return to this fixup handler. */
1358
1359 movi a3, fast_syscall_spill_registers_fixup_return
1360 s32i a3, a2, PT_DEPC # setup depc
1361
1362 /* Jump to the exception handler. */
1363
1364 rsr a3, excsave1
1365 rsr a0, exccause
1366 addx4 a0, a0, a3 # find entry in table
1367 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1368 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1369 jx a0
1370
1371ENDPROC(fast_syscall_spill_registers_fixup)
1372
1373ENTRY(fast_syscall_spill_registers_fixup_return)
1374
1375 /* When we return here, all registers have been restored (a2: DEPC) */
1376
1377 wsr a2, depc # exception address
1378
1379 /* Restore fixup handler. */
1380
1381 rsr a2, excsave1
1382 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE
1383 movi a3, fast_syscall_spill_registers_fixup
1384 s32i a3, a2, EXC_TABLE_FIXUP
1385 rsr a3, windowbase
1386 s32i a3, a2, EXC_TABLE_PARAM
1387 l32i a2, a2, EXC_TABLE_KSTK
1388
1389 /* Load WB at the time the exception occurred. */
1390
1391 rsr a3, sar # WB is still in SAR
1392 neg a3, a3
1393 wsr a3, windowbase
1394 rsync
1395
1396 rsr a3, excsave1
1397 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1398
1399 rfde
1400
1401ENDPROC(fast_syscall_spill_registers_fixup_return)
1425 1402
1426#ifdef CONFIG_MMU 1403#ifdef CONFIG_MMU
1427/* 1404/*
@@ -1794,6 +1771,43 @@ ENTRY(system_call)
1794 1771
1795ENDPROC(system_call) 1772ENDPROC(system_call)
1796 1773
1774/*
1775 * Spill live registers on the kernel stack macro.
1776 *
1777 * Entry condition: ps.woe is set, ps.excm is cleared
1778 * Exit condition: windowstart has single bit set
1779 * May clobber: a12, a13
1780 */
1781 .macro spill_registers_kernel
1782
1783#if XCHAL_NUM_AREGS > 16
1784 call12 1f
1785 _j 2f
1786 retw
1787 .align 4
17881:
1789 _entry a1, 48
1790 addi a12, a0, 3
1791#if XCHAL_NUM_AREGS > 32
1792 .rept (XCHAL_NUM_AREGS - 32) / 12
1793 _entry a1, 48
1794 mov a12, a0
1795 .endr
1796#endif
1797 _entry a1, 48
1798#if XCHAL_NUM_AREGS % 12 == 0
1799 mov a8, a8
1800#elif XCHAL_NUM_AREGS % 12 == 4
1801 mov a12, a12
1802#elif XCHAL_NUM_AREGS % 12 == 8
1803 mov a4, a4
1804#endif
1805 retw
18062:
1807#else
1808 mov a12, a12
1809#endif
1810 .endm
1797 1811
1798/* 1812/*
1799 * Task switch. 1813 * Task switch.
@@ -1806,21 +1820,20 @@ ENTRY(_switch_to)
1806 1820
1807 entry a1, 16 1821 entry a1, 16
1808 1822
1809 mov a12, a2 # preserve 'prev' (a2) 1823 mov a10, a2 # preserve 'prev' (a2)
1810 mov a13, a3 # and 'next' (a3) 1824 mov a11, a3 # and 'next' (a3)
1811 1825
1812 l32i a4, a2, TASK_THREAD_INFO 1826 l32i a4, a2, TASK_THREAD_INFO
1813 l32i a5, a3, TASK_THREAD_INFO 1827 l32i a5, a3, TASK_THREAD_INFO
1814 1828
1815 save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER 1829 save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1816 1830
1817 s32i a0, a12, THREAD_RA # save return address 1831 s32i a0, a10, THREAD_RA # save return address
1818 s32i a1, a12, THREAD_SP # save stack pointer 1832 s32i a1, a10, THREAD_SP # save stack pointer
1819 1833
1820 /* Disable ints while we manipulate the stack pointer. */ 1834 /* Disable ints while we manipulate the stack pointer. */
1821 1835
1822 movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL 1836 rsil a14, LOCKLEVEL
1823 xsr a14, ps
1824 rsr a3, excsave1 1837 rsr a3, excsave1
1825 rsync 1838 rsync
1826 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */ 1839 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
@@ -1835,7 +1848,7 @@ ENTRY(_switch_to)
1835 1848
1836 /* Flush register file. */ 1849 /* Flush register file. */
1837 1850
1838 call0 _spill_registers # destroys a3, a4, and SAR 1851 spill_registers_kernel
1839 1852
1840 /* Set kernel stack (and leave critical section) 1853 /* Set kernel stack (and leave critical section)
1841 * Note: It's save to set it here. The stack will not be overwritten 1854 * Note: It's save to set it here. The stack will not be overwritten
@@ -1851,13 +1864,13 @@ ENTRY(_switch_to)
1851 1864
1852 /* restore context of the task 'next' */ 1865 /* restore context of the task 'next' */
1853 1866
1854 l32i a0, a13, THREAD_RA # restore return address 1867 l32i a0, a11, THREAD_RA # restore return address
1855 l32i a1, a13, THREAD_SP # restore stack pointer 1868 l32i a1, a11, THREAD_SP # restore stack pointer
1856 1869
1857 load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER 1870 load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1858 1871
1859 wsr a14, ps 1872 wsr a14, ps
1860 mov a2, a12 # return 'prev' 1873 mov a2, a10 # return 'prev'
1861 rsync 1874 rsync
1862 1875
1863 retw 1876 retw
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 7d12af1317f1..84fe931bb60e 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -22,6 +22,7 @@
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/percpu.h> 24#include <linux/percpu.h>
25#include <linux/clk-provider.h>
25#include <linux/cpu.h> 26#include <linux/cpu.h>
26#include <linux/of_fdt.h> 27#include <linux/of_fdt.h>
27#include <linux/of_platform.h> 28#include <linux/of_platform.h>
@@ -276,6 +277,7 @@ void __init early_init_devtree(void *params)
276 277
277static int __init xtensa_device_probe(void) 278static int __init xtensa_device_probe(void)
278{ 279{
280 of_clk_init(NULL);
279 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 281 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
280 return 0; 282 return 0;
281} 283}
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 08b769d3b3a1..2a1823de69cc 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -30,6 +30,7 @@
30#include <asm/platform.h> 30#include <asm/platform.h>
31 31
32unsigned long ccount_freq; /* ccount Hz */ 32unsigned long ccount_freq; /* ccount Hz */
33EXPORT_SYMBOL(ccount_freq);
33 34
34static cycle_t ccount_read(struct clocksource *cs) 35static cycle_t ccount_read(struct clocksource *cs)
35{ 36{
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S
index cb8fd44caabc..f9e1ec346e35 100644
--- a/arch/xtensa/kernel/vectors.S
+++ b/arch/xtensa/kernel/vectors.S
@@ -235,7 +235,7 @@ ENTRY(_DoubleExceptionVector)
235 235
236 /* Check for overflow/underflow exception, jump if overflow. */ 236 /* Check for overflow/underflow exception, jump if overflow. */
237 237
238 _bbci.l a0, 6, _DoubleExceptionVector_WindowOverflow 238 bbci.l a0, 6, _DoubleExceptionVector_WindowOverflow
239 239
240 /* 240 /*
241 * Restart window underflow exception. 241 * Restart window underflow exception.
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index 74a60c7e085e..80b33ed51f31 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -122,9 +122,7 @@ EXPORT_SYMBOL(insw);
122EXPORT_SYMBOL(insl); 122EXPORT_SYMBOL(insl);
123 123
124extern long common_exception_return; 124extern long common_exception_return;
125extern long _spill_registers;
126EXPORT_SYMBOL(common_exception_return); 125EXPORT_SYMBOL(common_exception_return);
127EXPORT_SYMBOL(_spill_registers);
128 126
129#ifdef CONFIG_FUNCTION_TRACER 127#ifdef CONFIG_FUNCTION_TRACER
130EXPORT_SYMBOL(_mcount); 128EXPORT_SYMBOL(_mcount);
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index 479d7537a32a..aff108df92d3 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -90,7 +90,7 @@ int __init mem_reserve(unsigned long start, unsigned long end, int must_exist)
90 90
91 91
92/* 92/*
93 * Initialize the bootmem system and give it all the memory we have available. 93 * Initialize the bootmem system and give it all low memory we have available.
94 */ 94 */
95 95
96void __init bootmem_init(void) 96void __init bootmem_init(void)
@@ -142,9 +142,14 @@ void __init bootmem_init(void)
142 142
143 /* Add all remaining memory pieces into the bootmem map */ 143 /* Add all remaining memory pieces into the bootmem map */
144 144
145 for (i=0; i<sysmem.nr_banks; i++) 145 for (i = 0; i < sysmem.nr_banks; i++) {
146 free_bootmem(sysmem.bank[i].start, 146 if (sysmem.bank[i].start >> PAGE_SHIFT < max_low_pfn) {
147 sysmem.bank[i].end - sysmem.bank[i].start); 147 unsigned long end = min(max_low_pfn << PAGE_SHIFT,
148 sysmem.bank[i].end);
149 free_bootmem(sysmem.bank[i].start,
150 end - sysmem.bank[i].start);
151 }
152 }
148 153
149} 154}
150 155
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c
index 36ec171698b8..861203e958da 100644
--- a/arch/xtensa/mm/mmu.c
+++ b/arch/xtensa/mm/mmu.c
@@ -39,7 +39,7 @@ void init_mmu(void)
39 set_itlbcfg_register(0); 39 set_itlbcfg_register(0);
40 set_dtlbcfg_register(0); 40 set_dtlbcfg_register(0);
41#endif 41#endif
42#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF 42#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
43 /* 43 /*
44 * Update the IO area mapping in case xtensa_kio_paddr has changed 44 * Update the IO area mapping in case xtensa_kio_paddr has changed
45 */ 45 */
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
index 800227862fe8..57fd08b36f51 100644
--- a/arch/xtensa/platforms/xtfpga/setup.c
+++ b/arch/xtensa/platforms/xtfpga/setup.c
@@ -135,11 +135,11 @@ static void __init update_local_mac(struct device_node *node)
135 135
136static int __init machine_setup(void) 136static int __init machine_setup(void)
137{ 137{
138 struct device_node *serial; 138 struct device_node *clock;
139 struct device_node *eth = NULL; 139 struct device_node *eth = NULL;
140 140
141 for_each_compatible_node(serial, NULL, "ns16550a") 141 for_each_node_by_name(clock, "main-oscillator")
142 update_clock_frequency(serial); 142 update_clock_frequency(clock);
143 143
144 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc"))) 144 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
145 update_local_mac(eth); 145 update_local_mac(eth);
@@ -290,6 +290,7 @@ static int __init xtavnet_init(void)
290 * knows whether they set it correctly on the DIP switches. 290 * knows whether they set it correctly on the DIP switches.
291 */ 291 */
292 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr); 292 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
293 ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
293 294
294 return 0; 295 return 0;
295} 296}
diff --git a/arch/xtensa/variants/fsf/include/variant/tie.h b/arch/xtensa/variants/fsf/include/variant/tie.h
index bf4020116df5..244cdea4dee5 100644
--- a/arch/xtensa/variants/fsf/include/variant/tie.h
+++ b/arch/xtensa/variants/fsf/include/variant/tie.h
@@ -18,13 +18,6 @@
18#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */ 18#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
19#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ 19#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
20 20
21/* Basic parameters of each coprocessor: */
22#define XCHAL_CP7_NAME "XTIOP"
23#define XCHAL_CP7_IDENT XTIOP
24#define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
25#define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */
26#define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
27
28/* Filler info for unassigned coprocessors, to simplify arrays etc: */ 21/* Filler info for unassigned coprocessors, to simplify arrays etc: */
29#define XCHAL_NCP_SA_SIZE 0 22#define XCHAL_NCP_SA_SIZE 0
30#define XCHAL_NCP_SA_ALIGN 1 23#define XCHAL_NCP_SA_ALIGN 1
@@ -42,6 +35,8 @@
42#define XCHAL_CP5_SA_ALIGN 1 35#define XCHAL_CP5_SA_ALIGN 1
43#define XCHAL_CP6_SA_SIZE 0 36#define XCHAL_CP6_SA_SIZE 0
44#define XCHAL_CP6_SA_ALIGN 1 37#define XCHAL_CP6_SA_ALIGN 1
38#define XCHAL_CP7_SA_SIZE 0
39#define XCHAL_CP7_SA_ALIGN 1
45 40
46/* Save area for non-coprocessor optional and custom (TIE) state: */ 41/* Save area for non-coprocessor optional and custom (TIE) state: */
47#define XCHAL_NCP_SA_SIZE 0 42#define XCHAL_NCP_SA_SIZE 0
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 21:56:43 -0500