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-rw-r--r--arch/powerpc/include/asm/compat.h5
-rw-r--r--arch/powerpc/include/asm/opal.h4
-rw-r--r--arch/powerpc/include/asm/ptrace.h16
-rw-r--r--arch/powerpc/kernel/crash_dump.c8
-rw-r--r--arch/powerpc/kernel/ftrace.c1
-rw-r--r--arch/powerpc/kernel/signal_64.c4
-rw-r--r--arch/powerpc/platforms/powernv/eeh-ioda.c96
-rw-r--r--arch/powerpc/platforms/powernv/opal-xscom.c21
-rw-r--r--arch/powerpc/platforms/powernv/pci.c220
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c22
10 files changed, 219 insertions, 178 deletions
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 84fdf6857c31..a613d2c82fd9 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -200,10 +200,11 @@ static inline void __user *arch_compat_alloc_user_space(long len)
200 200
201 /* 201 /*
202 * We can't access below the stack pointer in the 32bit ABI and 202 * We can't access below the stack pointer in the 32bit ABI and
203 * can access 288 bytes in the 64bit ABI 203 * can access 288 bytes in the 64bit big-endian ABI,
204 * or 512 bytes with the new ELFv2 little-endian ABI.
204 */ 205 */
205 if (!is_32bit_task()) 206 if (!is_32bit_task())
206 usp -= 288; 207 usp -= USER_REDZONE_SIZE;
207 208
208 return (void __user *) (usp - len); 209 return (void __user *) (usp - len);
209} 210}
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 40157e2ca691..ed82142a3251 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -816,8 +816,8 @@ int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
816int64_t opal_pci_poll(uint64_t phb_id); 816int64_t opal_pci_poll(uint64_t phb_id);
817int64_t opal_return_cpu(void); 817int64_t opal_return_cpu(void);
818 818
819int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, __be64 *val); 819int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
820int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val); 820int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
821 821
822int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type, 822int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
823 uint32_t addr, uint32_t data, uint32_t sz); 823 uint32_t addr, uint32_t data, uint32_t sz);
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index becc08e6a65c..279b80f3bb29 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -28,11 +28,23 @@
28 28
29#ifdef __powerpc64__ 29#ifdef __powerpc64__
30 30
31/*
32 * Size of redzone that userspace is allowed to use below the stack
33 * pointer. This is 288 in the 64-bit big-endian ELF ABI, and 512 in
34 * the new ELFv2 little-endian ABI, so we allow the larger amount.
35 *
36 * For kernel code we allow a 288-byte redzone, in order to conserve
37 * kernel stack space; gcc currently only uses 288 bytes, and will
38 * hopefully allow explicit control of the redzone size in future.
39 */
40#define USER_REDZONE_SIZE 512
41#define KERNEL_REDZONE_SIZE 288
42
31#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ 43#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
32#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */ 44#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
33#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265) 45#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
34#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \ 46#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
35 STACK_FRAME_OVERHEAD + 288) 47 STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
36#define STACK_FRAME_MARKER 12 48#define STACK_FRAME_MARKER 12
37 49
38/* Size of dummy stack frame allocated when calling signal handler. */ 50/* Size of dummy stack frame allocated when calling signal handler. */
@@ -41,6 +53,8 @@
41 53
42#else /* __powerpc64__ */ 54#else /* __powerpc64__ */
43 55
56#define USER_REDZONE_SIZE 0
57#define KERNEL_REDZONE_SIZE 0
44#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ 58#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
45#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */ 59#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
46#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773) 60#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 11c1d069d920..7a13f378ca2c 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -98,17 +98,19 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
98 size_t csize, unsigned long offset, int userbuf) 98 size_t csize, unsigned long offset, int userbuf)
99{ 99{
100 void *vaddr; 100 void *vaddr;
101 phys_addr_t paddr;
101 102
102 if (!csize) 103 if (!csize)
103 return 0; 104 return 0;
104 105
105 csize = min_t(size_t, csize, PAGE_SIZE); 106 csize = min_t(size_t, csize, PAGE_SIZE);
107 paddr = pfn << PAGE_SHIFT;
106 108
107 if ((min_low_pfn < pfn) && (pfn < max_pfn)) { 109 if (memblock_is_region_memory(paddr, csize)) {
108 vaddr = __va(pfn << PAGE_SHIFT); 110 vaddr = __va(paddr);
109 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf); 111 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
110 } else { 112 } else {
111 vaddr = __ioremap(pfn << PAGE_SHIFT, PAGE_SIZE, 0); 113 vaddr = __ioremap(paddr, PAGE_SIZE, 0);
112 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf); 114 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
113 iounmap(vaddr); 115 iounmap(vaddr);
114 } 116 }
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 9b27b293a922..b0ded97ee4e1 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -74,6 +74,7 @@ ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
74 */ 74 */
75static int test_24bit_addr(unsigned long ip, unsigned long addr) 75static int test_24bit_addr(unsigned long ip, unsigned long addr)
76{ 76{
77 addr = ppc_function_entry((void *)addr);
77 78
78 /* use the create_branch to verify that this offset can be branched */ 79 /* use the create_branch to verify that this offset can be branched */
79 return create_branch((unsigned int *)ip, addr, 0); 80 return create_branch((unsigned int *)ip, addr, 0);
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index e35bf773df7a..8d253c29649b 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -65,8 +65,8 @@ struct rt_sigframe {
65 struct siginfo __user *pinfo; 65 struct siginfo __user *pinfo;
66 void __user *puc; 66 void __user *puc;
67 struct siginfo info; 67 struct siginfo info;
68 /* 64 bit ABI allows for 288 bytes below sp before decrementing it. */ 68 /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */
69 char abigap[288]; 69 char abigap[USER_REDZONE_SIZE];
70} __attribute__ ((aligned (16))); 70} __attribute__ ((aligned (16)));
71 71
72static const char fmt32[] = KERN_INFO \ 72static const char fmt32[] = KERN_INFO \
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index f51474336460..253fefe3d1a0 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -114,6 +114,7 @@ DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_inbB_dbgfs_ops, ioda_eeh_inbB_dbgfs_get,
114 ioda_eeh_inbB_dbgfs_set, "0x%llx\n"); 114 ioda_eeh_inbB_dbgfs_set, "0x%llx\n");
115#endif /* CONFIG_DEBUG_FS */ 115#endif /* CONFIG_DEBUG_FS */
116 116
117
117/** 118/**
118 * ioda_eeh_post_init - Chip dependent post initialization 119 * ioda_eeh_post_init - Chip dependent post initialization
119 * @hose: PCI controller 120 * @hose: PCI controller
@@ -221,6 +222,22 @@ static int ioda_eeh_set_option(struct eeh_pe *pe, int option)
221 return ret; 222 return ret;
222} 223}
223 224
225static void ioda_eeh_phb_diag(struct pci_controller *hose)
226{
227 struct pnv_phb *phb = hose->private_data;
228 long rc;
229
230 rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
231 PNV_PCI_DIAG_BUF_SIZE);
232 if (rc != OPAL_SUCCESS) {
233 pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
234 __func__, hose->global_number, rc);
235 return;
236 }
237
238 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
239}
240
224/** 241/**
225 * ioda_eeh_get_state - Retrieve the state of PE 242 * ioda_eeh_get_state - Retrieve the state of PE
226 * @pe: EEH PE 243 * @pe: EEH PE
@@ -272,6 +289,9 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
272 result |= EEH_STATE_DMA_ACTIVE; 289 result |= EEH_STATE_DMA_ACTIVE;
273 result |= EEH_STATE_MMIO_ENABLED; 290 result |= EEH_STATE_MMIO_ENABLED;
274 result |= EEH_STATE_DMA_ENABLED; 291 result |= EEH_STATE_DMA_ENABLED;
292 } else if (!(pe->state & EEH_PE_ISOLATED)) {
293 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
294 ioda_eeh_phb_diag(hose);
275 } 295 }
276 296
277 return result; 297 return result;
@@ -315,6 +335,15 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
315 __func__, fstate, hose->global_number, pe_no); 335 __func__, fstate, hose->global_number, pe_no);
316 } 336 }
317 337
338 /* Dump PHB diag-data for frozen PE */
339 if (result != EEH_STATE_NOT_SUPPORT &&
340 (result & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) !=
341 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE) &&
342 !(pe->state & EEH_PE_ISOLATED)) {
343 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
344 ioda_eeh_phb_diag(hose);
345 }
346
318 return result; 347 return result;
319} 348}
320 349
@@ -530,42 +559,6 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
530} 559}
531 560
532/** 561/**
533 * ioda_eeh_get_log - Retrieve error log
534 * @pe: EEH PE
535 * @severity: Severity level of the log
536 * @drv_log: buffer to store the log
537 * @len: space of the log buffer
538 *
539 * The function is used to retrieve error log from P7IOC.
540 */
541static int ioda_eeh_get_log(struct eeh_pe *pe, int severity,
542 char *drv_log, unsigned long len)
543{
544 s64 ret;
545 unsigned long flags;
546 struct pci_controller *hose = pe->phb;
547 struct pnv_phb *phb = hose->private_data;
548
549 spin_lock_irqsave(&phb->lock, flags);
550
551 ret = opal_pci_get_phb_diag_data2(phb->opal_id,
552 phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
553 if (ret) {
554 spin_unlock_irqrestore(&phb->lock, flags);
555 pr_warning("%s: Can't get log for PHB#%x-PE#%x (%lld)\n",
556 __func__, hose->global_number, pe->addr, ret);
557 return -EIO;
558 }
559
560 /* The PHB diag-data is always indicative */
561 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
562
563 spin_unlock_irqrestore(&phb->lock, flags);
564
565 return 0;
566}
567
568/**
569 * ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE 562 * ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE
570 * @pe: EEH PE 563 * @pe: EEH PE
571 * 564 *
@@ -646,22 +639,6 @@ static void ioda_eeh_hub_diag(struct pci_controller *hose)
646 } 639 }
647} 640}
648 641
649static void ioda_eeh_phb_diag(struct pci_controller *hose)
650{
651 struct pnv_phb *phb = hose->private_data;
652 long rc;
653
654 rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
655 PNV_PCI_DIAG_BUF_SIZE);
656 if (rc != OPAL_SUCCESS) {
657 pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
658 __func__, hose->global_number, rc);
659 return;
660 }
661
662 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
663}
664
665static int ioda_eeh_get_phb_pe(struct pci_controller *hose, 642static int ioda_eeh_get_phb_pe(struct pci_controller *hose,
666 struct eeh_pe **pe) 643 struct eeh_pe **pe)
667{ 644{
@@ -835,6 +812,20 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
835 } 812 }
836 813
837 /* 814 /*
815 * EEH core will try recover from fenced PHB or
816 * frozen PE. In the time for frozen PE, EEH core
817 * enable IO path for that before collecting logs,
818 * but it ruins the site. So we have to dump the
819 * log in advance here.
820 */
821 if ((ret == EEH_NEXT_ERR_FROZEN_PE ||
822 ret == EEH_NEXT_ERR_FENCED_PHB) &&
823 !((*pe)->state & EEH_PE_ISOLATED)) {
824 eeh_pe_state_mark(*pe, EEH_PE_ISOLATED);
825 ioda_eeh_phb_diag(hose);
826 }
827
828 /*
838 * If we have no errors on the specific PHB or only 829 * If we have no errors on the specific PHB or only
839 * informative error there, we continue poking it. 830 * informative error there, we continue poking it.
840 * Otherwise, we need actions to be taken by upper 831 * Otherwise, we need actions to be taken by upper
@@ -852,7 +843,6 @@ struct pnv_eeh_ops ioda_eeh_ops = {
852 .set_option = ioda_eeh_set_option, 843 .set_option = ioda_eeh_set_option,
853 .get_state = ioda_eeh_get_state, 844 .get_state = ioda_eeh_get_state,
854 .reset = ioda_eeh_reset, 845 .reset = ioda_eeh_reset,
855 .get_log = ioda_eeh_get_log,
856 .configure_bridge = ioda_eeh_configure_bridge, 846 .configure_bridge = ioda_eeh_configure_bridge,
857 .next_error = ioda_eeh_next_error 847 .next_error = ioda_eeh_next_error
858}; 848};
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
index 4fbf276ac99e..4cd2ea6c0dbe 100644
--- a/arch/powerpc/platforms/powernv/opal-xscom.c
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -71,11 +71,11 @@ static int opal_xscom_err_xlate(int64_t rc)
71 } 71 }
72} 72}
73 73
74static u64 opal_scom_unmangle(u64 reg) 74static u64 opal_scom_unmangle(u64 addr)
75{ 75{
76 /* 76 /*
77 * XSCOM indirect addresses have the top bit set. Additionally 77 * XSCOM indirect addresses have the top bit set. Additionally
78 * the reset of the top 3 nibbles is always 0. 78 * the rest of the top 3 nibbles is always 0.
79 * 79 *
80 * Because the debugfs interface uses signed offsets and shifts 80 * Because the debugfs interface uses signed offsets and shifts
81 * the address left by 3, we basically cannot use the top 4 bits 81 * the address left by 3, we basically cannot use the top 4 bits
@@ -86,10 +86,13 @@ static u64 opal_scom_unmangle(u64 reg)
86 * conversion here. To leave room for further xscom address 86 * conversion here. To leave room for further xscom address
87 * expansion, we only clear out the top byte 87 * expansion, we only clear out the top byte
88 * 88 *
89 * For in-kernel use, we also support the real indirect bit, so
90 * we test for any of the top 5 bits
91 *
89 */ 92 */
90 if (reg & (1ull << 59)) 93 if (addr & (0x1full << 59))
91 reg = (reg & ~(0xffull << 56)) | (1ull << 63); 94 addr = (addr & ~(0xffull << 56)) | (1ull << 63);
92 return reg; 95 return addr;
93} 96}
94 97
95static int opal_scom_read(scom_map_t map, u64 reg, u64 *value) 98static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
@@ -98,8 +101,8 @@ static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
98 int64_t rc; 101 int64_t rc;
99 __be64 v; 102 __be64 v;
100 103
101 reg = opal_scom_unmangle(reg); 104 reg = opal_scom_unmangle(m->addr + reg);
102 rc = opal_xscom_read(m->chip, m->addr + reg, (__be64 *)__pa(&v)); 105 rc = opal_xscom_read(m->chip, reg, (__be64 *)__pa(&v));
103 *value = be64_to_cpu(v); 106 *value = be64_to_cpu(v);
104 return opal_xscom_err_xlate(rc); 107 return opal_xscom_err_xlate(rc);
105} 108}
@@ -109,8 +112,8 @@ static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
109 struct opal_scom_map *m = map; 112 struct opal_scom_map *m = map;
110 int64_t rc; 113 int64_t rc;
111 114
112 reg = opal_scom_unmangle(reg); 115 reg = opal_scom_unmangle(m->addr + reg);
113 rc = opal_xscom_write(m->chip, m->addr + reg, value); 116 rc = opal_xscom_write(m->chip, reg, value);
114 return opal_xscom_err_xlate(rc); 117 return opal_xscom_err_xlate(rc);
115} 118}
116 119
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 95633d79ef5d..8518817dcdfd 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -134,57 +134,72 @@ static void pnv_pci_dump_p7ioc_diag_data(struct pci_controller *hose,
134 pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n", 134 pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n",
135 hose->global_number, common->version); 135 hose->global_number, common->version);
136 136
137 pr_info(" brdgCtl: %08x\n", data->brdgCtl); 137 if (data->brdgCtl)
138 138 pr_info(" brdgCtl: %08x\n",
139 pr_info(" portStatusReg: %08x\n", data->portStatusReg); 139 data->brdgCtl);
140 pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus); 140 if (data->portStatusReg || data->rootCmplxStatus ||
141 pr_info(" busAgentStatus: %08x\n", data->busAgentStatus); 141 data->busAgentStatus)
142 142 pr_info(" UtlSts: %08x %08x %08x\n",
143 pr_info(" deviceStatus: %08x\n", data->deviceStatus); 143 data->portStatusReg, data->rootCmplxStatus,
144 pr_info(" slotStatus: %08x\n", data->slotStatus); 144 data->busAgentStatus);
145 pr_info(" linkStatus: %08x\n", data->linkStatus); 145 if (data->deviceStatus || data->slotStatus ||
146 pr_info(" devCmdStatus: %08x\n", data->devCmdStatus); 146 data->linkStatus || data->devCmdStatus ||
147 pr_info(" devSecStatus: %08x\n", data->devSecStatus); 147 data->devSecStatus)
148 148 pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
149 pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus); 149 data->deviceStatus, data->slotStatus,
150 pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus); 150 data->linkStatus, data->devCmdStatus,
151 pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus); 151 data->devSecStatus);
152 pr_info(" tlpHdr1: %08x\n", data->tlpHdr1); 152 if (data->rootErrorStatus || data->uncorrErrorStatus ||
153 pr_info(" tlpHdr2: %08x\n", data->tlpHdr2); 153 data->corrErrorStatus)
154 pr_info(" tlpHdr3: %08x\n", data->tlpHdr3); 154 pr_info(" RootErrSts: %08x %08x %08x\n",
155 pr_info(" tlpHdr4: %08x\n", data->tlpHdr4); 155 data->rootErrorStatus, data->uncorrErrorStatus,
156 pr_info(" sourceId: %08x\n", data->sourceId); 156 data->corrErrorStatus);
157 pr_info(" errorClass: %016llx\n", data->errorClass); 157 if (data->tlpHdr1 || data->tlpHdr2 ||
158 pr_info(" correlator: %016llx\n", data->correlator); 158 data->tlpHdr3 || data->tlpHdr4)
159 pr_info(" p7iocPlssr: %016llx\n", data->p7iocPlssr); 159 pr_info(" RootErrLog: %08x %08x %08x %08x\n",
160 pr_info(" p7iocCsr: %016llx\n", data->p7iocCsr); 160 data->tlpHdr1, data->tlpHdr2,
161 pr_info(" lemFir: %016llx\n", data->lemFir); 161 data->tlpHdr3, data->tlpHdr4);
162 pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask); 162 if (data->sourceId || data->errorClass ||
163 pr_info(" lemWOF: %016llx\n", data->lemWOF); 163 data->correlator)
164 pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus); 164 pr_info(" RootErrLog1: %08x %016llx %016llx\n",
165 pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus); 165 data->sourceId, data->errorClass,
166 pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0); 166 data->correlator);
167 pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1); 167 if (data->p7iocPlssr || data->p7iocCsr)
168 pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus); 168 pr_info(" PhbSts: %016llx %016llx\n",
169 pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus); 169 data->p7iocPlssr, data->p7iocCsr);
170 pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0); 170 if (data->lemFir || data->lemErrorMask ||
171 pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1); 171 data->lemWOF)
172 pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus); 172 pr_info(" Lem: %016llx %016llx %016llx\n",
173 pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus); 173 data->lemFir, data->lemErrorMask,
174 pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0); 174 data->lemWOF);
175 pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1); 175 if (data->phbErrorStatus || data->phbFirstErrorStatus ||
176 pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus); 176 data->phbErrorLog0 || data->phbErrorLog1)
177 pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus); 177 pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
178 pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0); 178 data->phbErrorStatus, data->phbFirstErrorStatus,
179 pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1); 179 data->phbErrorLog0, data->phbErrorLog1);
180 if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
181 data->mmioErrorLog0 || data->mmioErrorLog1)
182 pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
183 data->mmioErrorStatus, data->mmioFirstErrorStatus,
184 data->mmioErrorLog0, data->mmioErrorLog1);
185 if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
186 data->dma0ErrorLog0 || data->dma0ErrorLog1)
187 pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
188 data->dma0ErrorStatus, data->dma0FirstErrorStatus,
189 data->dma0ErrorLog0, data->dma0ErrorLog1);
190 if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
191 data->dma1ErrorLog0 || data->dma1ErrorLog1)
192 pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
193 data->dma1ErrorStatus, data->dma1FirstErrorStatus,
194 data->dma1ErrorLog0, data->dma1ErrorLog1);
180 195
181 for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) { 196 for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) {
182 if ((data->pestA[i] >> 63) == 0 && 197 if ((data->pestA[i] >> 63) == 0 &&
183 (data->pestB[i] >> 63) == 0) 198 (data->pestB[i] >> 63) == 0)
184 continue; 199 continue;
185 200
186 pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]); 201 pr_info(" PE[%3d] A/B: %016llx %016llx\n",
187 pr_info(" PESTB: %016llx\n", data->pestB[i]); 202 i, data->pestA[i], data->pestB[i]);
188 } 203 }
189} 204}
190 205
@@ -197,62 +212,77 @@ static void pnv_pci_dump_phb3_diag_data(struct pci_controller *hose,
197 data = (struct OpalIoPhb3ErrorData*)common; 212 data = (struct OpalIoPhb3ErrorData*)common;
198 pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n", 213 pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n",
199 hose->global_number, common->version); 214 hose->global_number, common->version);
200 215 if (data->brdgCtl)
201 pr_info(" brdgCtl: %08x\n", data->brdgCtl); 216 pr_info(" brdgCtl: %08x\n",
202 217 data->brdgCtl);
203 pr_info(" portStatusReg: %08x\n", data->portStatusReg); 218 if (data->portStatusReg || data->rootCmplxStatus ||
204 pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus); 219 data->busAgentStatus)
205 pr_info(" busAgentStatus: %08x\n", data->busAgentStatus); 220 pr_info(" UtlSts: %08x %08x %08x\n",
206 221 data->portStatusReg, data->rootCmplxStatus,
207 pr_info(" deviceStatus: %08x\n", data->deviceStatus); 222 data->busAgentStatus);
208 pr_info(" slotStatus: %08x\n", data->slotStatus); 223 if (data->deviceStatus || data->slotStatus ||
209 pr_info(" linkStatus: %08x\n", data->linkStatus); 224 data->linkStatus || data->devCmdStatus ||
210 pr_info(" devCmdStatus: %08x\n", data->devCmdStatus); 225 data->devSecStatus)
211 pr_info(" devSecStatus: %08x\n", data->devSecStatus); 226 pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
212 227 data->deviceStatus, data->slotStatus,
213 pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus); 228 data->linkStatus, data->devCmdStatus,
214 pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus); 229 data->devSecStatus);
215 pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus); 230 if (data->rootErrorStatus || data->uncorrErrorStatus ||
216 pr_info(" tlpHdr1: %08x\n", data->tlpHdr1); 231 data->corrErrorStatus)
217 pr_info(" tlpHdr2: %08x\n", data->tlpHdr2); 232 pr_info(" RootErrSts: %08x %08x %08x\n",
218 pr_info(" tlpHdr3: %08x\n", data->tlpHdr3); 233 data->rootErrorStatus, data->uncorrErrorStatus,
219 pr_info(" tlpHdr4: %08x\n", data->tlpHdr4); 234 data->corrErrorStatus);
220 pr_info(" sourceId: %08x\n", data->sourceId); 235 if (data->tlpHdr1 || data->tlpHdr2 ||
221 pr_info(" errorClass: %016llx\n", data->errorClass); 236 data->tlpHdr3 || data->tlpHdr4)
222 pr_info(" correlator: %016llx\n", data->correlator); 237 pr_info(" RootErrLog: %08x %08x %08x %08x\n",
223 238 data->tlpHdr1, data->tlpHdr2,
224 pr_info(" nFir: %016llx\n", data->nFir); 239 data->tlpHdr3, data->tlpHdr4);
225 pr_info(" nFirMask: %016llx\n", data->nFirMask); 240 if (data->sourceId || data->errorClass ||
226 pr_info(" nFirWOF: %016llx\n", data->nFirWOF); 241 data->correlator)
227 pr_info(" PhbPlssr: %016llx\n", data->phbPlssr); 242 pr_info(" RootErrLog1: %08x %016llx %016llx\n",
228 pr_info(" PhbCsr: %016llx\n", data->phbCsr); 243 data->sourceId, data->errorClass,
229 pr_info(" lemFir: %016llx\n", data->lemFir); 244 data->correlator);
230 pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask); 245 if (data->nFir || data->nFirMask ||
231 pr_info(" lemWOF: %016llx\n", data->lemWOF); 246 data->nFirWOF)
232 pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus); 247 pr_info(" nFir: %016llx %016llx %016llx\n",
233 pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus); 248 data->nFir, data->nFirMask,
234 pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0); 249 data->nFirWOF);
235 pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1); 250 if (data->phbPlssr || data->phbCsr)
236 pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus); 251 pr_info(" PhbSts: %016llx %016llx\n",
237 pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus); 252 data->phbPlssr, data->phbCsr);
238 pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0); 253 if (data->lemFir || data->lemErrorMask ||
239 pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1); 254 data->lemWOF)
240 pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus); 255 pr_info(" Lem: %016llx %016llx %016llx\n",
241 pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus); 256 data->lemFir, data->lemErrorMask,
242 pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0); 257 data->lemWOF);
243 pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1); 258 if (data->phbErrorStatus || data->phbFirstErrorStatus ||
244 pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus); 259 data->phbErrorLog0 || data->phbErrorLog1)
245 pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus); 260 pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
246 pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0); 261 data->phbErrorStatus, data->phbFirstErrorStatus,
247 pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1); 262 data->phbErrorLog0, data->phbErrorLog1);
263 if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
264 data->mmioErrorLog0 || data->mmioErrorLog1)
265 pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
266 data->mmioErrorStatus, data->mmioFirstErrorStatus,
267 data->mmioErrorLog0, data->mmioErrorLog1);
268 if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
269 data->dma0ErrorLog0 || data->dma0ErrorLog1)
270 pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
271 data->dma0ErrorStatus, data->dma0FirstErrorStatus,
272 data->dma0ErrorLog0, data->dma0ErrorLog1);
273 if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
274 data->dma1ErrorLog0 || data->dma1ErrorLog1)
275 pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
276 data->dma1ErrorStatus, data->dma1FirstErrorStatus,
277 data->dma1ErrorLog0, data->dma1ErrorLog1);
248 278
249 for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) { 279 for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
250 if ((data->pestA[i] >> 63) == 0 && 280 if ((data->pestA[i] >> 63) == 0 &&
251 (data->pestB[i] >> 63) == 0) 281 (data->pestB[i] >> 63) == 0)
252 continue; 282 continue;
253 283
254 pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]); 284 pr_info(" PE[%3d] A/B: %016llx %016llx\n",
255 pr_info(" PESTB: %016llx\n", data->pestB[i]); 285 i, data->pestA[i], data->pestB[i]);
256 } 286 }
257} 287}
258 288
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 82789e79e539..0ea99e3d4815 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -35,12 +35,7 @@
35#include "offline_states.h" 35#include "offline_states.h"
36 36
37/* This version can't take the spinlock, because it never returns */ 37/* This version can't take the spinlock, because it never returns */
38static struct rtas_args rtas_stop_self_args = { 38static int rtas_stop_self_token = RTAS_UNKNOWN_SERVICE;
39 .token = RTAS_UNKNOWN_SERVICE,
40 .nargs = 0,
41 .nret = 1,
42 .rets = &rtas_stop_self_args.args[0],
43};
44 39
45static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) = 40static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) =
46 CPU_STATE_OFFLINE; 41 CPU_STATE_OFFLINE;
@@ -93,15 +88,20 @@ void set_default_offline_state(int cpu)
93 88
94static void rtas_stop_self(void) 89static void rtas_stop_self(void)
95{ 90{
96 struct rtas_args *args = &rtas_stop_self_args; 91 struct rtas_args args = {
92 .token = cpu_to_be32(rtas_stop_self_token),
93 .nargs = 0,
94 .nret = 1,
95 .rets = &args.args[0],
96 };
97 97
98 local_irq_disable(); 98 local_irq_disable();
99 99
100 BUG_ON(args->token == RTAS_UNKNOWN_SERVICE); 100 BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE);
101 101
102 printk("cpu %u (hwid %u) Ready to die...\n", 102 printk("cpu %u (hwid %u) Ready to die...\n",
103 smp_processor_id(), hard_smp_processor_id()); 103 smp_processor_id(), hard_smp_processor_id());
104 enter_rtas(__pa(args)); 104 enter_rtas(__pa(&args));
105 105
106 panic("Alas, I survived.\n"); 106 panic("Alas, I survived.\n");
107} 107}
@@ -392,10 +392,10 @@ static int __init pseries_cpu_hotplug_init(void)
392 } 392 }
393 } 393 }
394 394
395 rtas_stop_self_args.token = rtas_token("stop-self"); 395 rtas_stop_self_token = rtas_token("stop-self");
396 qcss_tok = rtas_token("query-cpu-stopped-state"); 396 qcss_tok = rtas_token("query-cpu-stopped-state");
397 397
398 if (rtas_stop_self_args.token == RTAS_UNKNOWN_SERVICE || 398 if (rtas_stop_self_token == RTAS_UNKNOWN_SERVICE ||
399 qcss_tok == RTAS_UNKNOWN_SERVICE) { 399 qcss_tok == RTAS_UNKNOWN_SERVICE) {
400 printk(KERN_INFO "CPU Hotplug not supported by firmware " 400 printk(KERN_INFO "CPU Hotplug not supported by firmware "
401 "- disabling.\n"); 401 "- disabling.\n");
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 18:13:08 -0500