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-rw-r--r--arch/nios2/Kconfig1
-rw-r--r--arch/nios2/include/asm/dma-mapping.h123
-rw-r--r--arch/nios2/mm/dma-mapping.c149
3 files changed, 87 insertions, 186 deletions
diff --git a/arch/nios2/Kconfig b/arch/nios2/Kconfig
index 437555424bda..4b2504d28178 100644
--- a/arch/nios2/Kconfig
+++ b/arch/nios2/Kconfig
@@ -16,6 +16,7 @@ config NIOS2
16 select SOC_BUS 16 select SOC_BUS
17 select SPARSE_IRQ 17 select SPARSE_IRQ
18 select USB_ARCH_HAS_HCD if USB_SUPPORT 18 select USB_ARCH_HAS_HCD if USB_SUPPORT
19 select HAVE_DMA_ATTRS
19 20
20config GENERIC_CSUM 21config GENERIC_CSUM
21 def_bool y 22 def_bool y
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
index b5567233f7f1..bec8ac8e6ad2 100644
--- a/arch/nios2/include/asm/dma-mapping.h
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -10,131 +10,20 @@
10#ifndef _ASM_NIOS2_DMA_MAPPING_H 10#ifndef _ASM_NIOS2_DMA_MAPPING_H
11#define _ASM_NIOS2_DMA_MAPPING_H 11#define _ASM_NIOS2_DMA_MAPPING_H
12 12
13#include <linux/scatterlist.h> 13extern struct dma_map_ops nios2_dma_ops;
14#include <linux/cache.h>
15#include <asm/cacheflush.h>
16 14
17static inline void __dma_sync_for_device(void *vaddr, size_t size, 15static inline struct dma_map_ops *get_dma_ops(struct device *dev)
18 enum dma_data_direction direction)
19{ 16{
20 switch (direction) { 17 return &nios2_dma_ops;
21 case DMA_FROM_DEVICE:
22 invalidate_dcache_range((unsigned long)vaddr,
23 (unsigned long)(vaddr + size));
24 break;
25 case DMA_TO_DEVICE:
26 /*
27 * We just need to flush the caches here , but Nios2 flush
28 * instruction will do both writeback and invalidate.
29 */
30 case DMA_BIDIRECTIONAL: /* flush and invalidate */
31 flush_dcache_range((unsigned long)vaddr,
32 (unsigned long)(vaddr + size));
33 break;
34 default:
35 BUG();
36 }
37}
38
39static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
40 enum dma_data_direction direction)
41{
42 switch (direction) {
43 case DMA_BIDIRECTIONAL:
44 case DMA_FROM_DEVICE:
45 invalidate_dcache_range((unsigned long)vaddr,
46 (unsigned long)(vaddr + size));
47 break;
48 case DMA_TO_DEVICE:
49 break;
50 default:
51 BUG();
52 }
53}
54
55#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
56#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
57
58void *dma_alloc_coherent(struct device *dev, size_t size,
59 dma_addr_t *dma_handle, gfp_t flag);
60
61void dma_free_coherent(struct device *dev, size_t size,
62 void *vaddr, dma_addr_t dma_handle);
63
64static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,
65 size_t size,
66 enum dma_data_direction direction)
67{
68 BUG_ON(!valid_dma_direction(direction));
69 __dma_sync_for_device(ptr, size, direction);
70 return virt_to_phys(ptr);
71}
72
73static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
74 size_t size, enum dma_data_direction direction)
75{
76}
77
78extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
79 enum dma_data_direction direction);
80extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
81 unsigned long offset, size_t size, enum dma_data_direction direction);
82extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
83 size_t size, enum dma_data_direction direction);
84extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
85 int nhwentries, enum dma_data_direction direction);
86extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
87 size_t size, enum dma_data_direction direction);
88extern void dma_sync_single_for_device(struct device *dev,
89 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction);
90extern void dma_sync_single_range_for_cpu(struct device *dev,
91 dma_addr_t dma_handle, unsigned long offset, size_t size,
92 enum dma_data_direction direction);
93extern void dma_sync_single_range_for_device(struct device *dev,
94 dma_addr_t dma_handle, unsigned long offset, size_t size,
95 enum dma_data_direction direction);
96extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
97 int nelems, enum dma_data_direction direction);
98extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
99 int nelems, enum dma_data_direction direction);
100
101static inline int dma_supported(struct device *dev, u64 mask)
102{
103 return 1;
104}
105
106static inline int dma_set_mask(struct device *dev, u64 mask)
107{
108 if (!dev->dma_mask || !dma_supported(dev, mask))
109 return -EIO;
110
111 *dev->dma_mask = mask;
112
113 return 0;
114}
115
116static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
117{
118 return 0;
119} 18}
120 19
121/* 20/*
122* dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to 21 * dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to
123* do any flushing here. 22 * do any flushing here.
124*/ 23 */
125static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 24static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
126 enum dma_data_direction direction) 25 enum dma_data_direction direction)
127{ 26{
128} 27}
129 28
130/* drivers/base/dma-mapping.c */
131extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
132 void *cpu_addr, dma_addr_t dma_addr, size_t size);
133extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
134 void *cpu_addr, dma_addr_t dma_addr,
135 size_t size);
136
137#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
138#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
139
140#endif /* _ASM_NIOS2_DMA_MAPPING_H */ 29#endif /* _ASM_NIOS2_DMA_MAPPING_H */
diff --git a/arch/nios2/mm/dma-mapping.c b/arch/nios2/mm/dma-mapping.c
index ac5da7594f0b..90422c367ed3 100644
--- a/arch/nios2/mm/dma-mapping.c
+++ b/arch/nios2/mm/dma-mapping.c
@@ -20,9 +20,46 @@
20#include <linux/cache.h> 20#include <linux/cache.h>
21#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22 22
23static inline void __dma_sync_for_device(void *vaddr, size_t size,
24 enum dma_data_direction direction)
25{
26 switch (direction) {
27 case DMA_FROM_DEVICE:
28 invalidate_dcache_range((unsigned long)vaddr,
29 (unsigned long)(vaddr + size));
30 break;
31 case DMA_TO_DEVICE:
32 /*
33 * We just need to flush the caches here , but Nios2 flush
34 * instruction will do both writeback and invalidate.
35 */
36 case DMA_BIDIRECTIONAL: /* flush and invalidate */
37 flush_dcache_range((unsigned long)vaddr,
38 (unsigned long)(vaddr + size));
39 break;
40 default:
41 BUG();
42 }
43}
23 44
24void *dma_alloc_coherent(struct device *dev, size_t size, 45static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
25 dma_addr_t *dma_handle, gfp_t gfp) 46 enum dma_data_direction direction)
47{
48 switch (direction) {
49 case DMA_BIDIRECTIONAL:
50 case DMA_FROM_DEVICE:
51 invalidate_dcache_range((unsigned long)vaddr,
52 (unsigned long)(vaddr + size));
53 break;
54 case DMA_TO_DEVICE:
55 break;
56 default:
57 BUG();
58 }
59}
60
61static void *nios2_dma_alloc(struct device *dev, size_t size,
62 dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)
26{ 63{
27 void *ret; 64 void *ret;
28 65
@@ -45,24 +82,21 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
45 82
46 return ret; 83 return ret;
47} 84}
48EXPORT_SYMBOL(dma_alloc_coherent);
49 85
50void dma_free_coherent(struct device *dev, size_t size, void *vaddr, 86static void nios2_dma_free(struct device *dev, size_t size, void *vaddr,
51 dma_addr_t dma_handle) 87 dma_addr_t dma_handle, struct dma_attrs *attrs)
52{ 88{
53 unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr); 89 unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);
54 90
55 free_pages(addr, get_order(size)); 91 free_pages(addr, get_order(size));
56} 92}
57EXPORT_SYMBOL(dma_free_coherent);
58 93
59int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 94static int nios2_dma_map_sg(struct device *dev, struct scatterlist *sg,
60 enum dma_data_direction direction) 95 int nents, enum dma_data_direction direction,
96 struct dma_attrs *attrs)
61{ 97{
62 int i; 98 int i;
63 99
64 BUG_ON(!valid_dma_direction(direction));
65
66 for_each_sg(sg, sg, nents, i) { 100 for_each_sg(sg, sg, nents, i) {
67 void *addr; 101 void *addr;
68 102
@@ -75,40 +109,32 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
75 109
76 return nents; 110 return nents;
77} 111}
78EXPORT_SYMBOL(dma_map_sg);
79 112
80dma_addr_t dma_map_page(struct device *dev, struct page *page, 113static dma_addr_t nios2_dma_map_page(struct device *dev, struct page *page,
81 unsigned long offset, size_t size, 114 unsigned long offset, size_t size,
82 enum dma_data_direction direction) 115 enum dma_data_direction direction,
116 struct dma_attrs *attrs)
83{ 117{
84 void *addr; 118 void *addr = page_address(page) + offset;
85
86 BUG_ON(!valid_dma_direction(direction));
87 119
88 addr = page_address(page) + offset;
89 __dma_sync_for_device(addr, size, direction); 120 __dma_sync_for_device(addr, size, direction);
90
91 return page_to_phys(page) + offset; 121 return page_to_phys(page) + offset;
92} 122}
93EXPORT_SYMBOL(dma_map_page);
94 123
95void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, 124static void nios2_dma_unmap_page(struct device *dev, dma_addr_t dma_address,
96 enum dma_data_direction direction) 125 size_t size, enum dma_data_direction direction,
126 struct dma_attrs *attrs)
97{ 127{
98 BUG_ON(!valid_dma_direction(direction));
99
100 __dma_sync_for_cpu(phys_to_virt(dma_address), size, direction); 128 __dma_sync_for_cpu(phys_to_virt(dma_address), size, direction);
101} 129}
102EXPORT_SYMBOL(dma_unmap_page);
103 130
104void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, 131static void nios2_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
105 enum dma_data_direction direction) 132 int nhwentries, enum dma_data_direction direction,
133 struct dma_attrs *attrs)
106{ 134{
107 void *addr; 135 void *addr;
108 int i; 136 int i;
109 137
110 BUG_ON(!valid_dma_direction(direction));
111
112 if (direction == DMA_TO_DEVICE) 138 if (direction == DMA_TO_DEVICE)
113 return; 139 return;
114 140
@@ -118,69 +144,54 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
118 __dma_sync_for_cpu(addr, sg->length, direction); 144 __dma_sync_for_cpu(addr, sg->length, direction);
119 } 145 }
120} 146}
121EXPORT_SYMBOL(dma_unmap_sg);
122
123void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
124 size_t size, enum dma_data_direction direction)
125{
126 BUG_ON(!valid_dma_direction(direction));
127 147
128 __dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction); 148static void nios2_dma_sync_single_for_cpu(struct device *dev,
129} 149 dma_addr_t dma_handle, size_t size,
130EXPORT_SYMBOL(dma_sync_single_for_cpu); 150 enum dma_data_direction direction)
131
132void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
133 size_t size, enum dma_data_direction direction)
134{
135 BUG_ON(!valid_dma_direction(direction));
136
137 __dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
138}
139EXPORT_SYMBOL(dma_sync_single_for_device);
140
141void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
142 unsigned long offset, size_t size,
143 enum dma_data_direction direction)
144{ 151{
145 BUG_ON(!valid_dma_direction(direction));
146
147 __dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction); 152 __dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction);
148} 153}
149EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
150 154
151void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, 155static void nios2_dma_sync_single_for_device(struct device *dev,
152 unsigned long offset, size_t size, 156 dma_addr_t dma_handle, size_t size,
153 enum dma_data_direction direction) 157 enum dma_data_direction direction)
154{ 158{
155 BUG_ON(!valid_dma_direction(direction));
156
157 __dma_sync_for_device(phys_to_virt(dma_handle), size, direction); 159 __dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
158} 160}
159EXPORT_SYMBOL(dma_sync_single_range_for_device);
160 161
161void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, 162static void nios2_dma_sync_sg_for_cpu(struct device *dev,
162 enum dma_data_direction direction) 163 struct scatterlist *sg, int nelems,
164 enum dma_data_direction direction)
163{ 165{
164 int i; 166 int i;
165 167
166 BUG_ON(!valid_dma_direction(direction));
167
168 /* Make sure that gcc doesn't leave the empty loop body. */ 168 /* Make sure that gcc doesn't leave the empty loop body. */
169 for_each_sg(sg, sg, nelems, i) 169 for_each_sg(sg, sg, nelems, i)
170 __dma_sync_for_cpu(sg_virt(sg), sg->length, direction); 170 __dma_sync_for_cpu(sg_virt(sg), sg->length, direction);
171} 171}
172EXPORT_SYMBOL(dma_sync_sg_for_cpu);
173 172
174void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 173static void nios2_dma_sync_sg_for_device(struct device *dev,
175 int nelems, enum dma_data_direction direction) 174 struct scatterlist *sg, int nelems,
175 enum dma_data_direction direction)
176{ 176{
177 int i; 177 int i;
178 178
179 BUG_ON(!valid_dma_direction(direction));
180
181 /* Make sure that gcc doesn't leave the empty loop body. */ 179 /* Make sure that gcc doesn't leave the empty loop body. */
182 for_each_sg(sg, sg, nelems, i) 180 for_each_sg(sg, sg, nelems, i)
183 __dma_sync_for_device(sg_virt(sg), sg->length, direction); 181 __dma_sync_for_device(sg_virt(sg), sg->length, direction);
184 182
185} 183}
186EXPORT_SYMBOL(dma_sync_sg_for_device); 184
185struct dma_map_ops nios2_dma_ops = {
186 .alloc = nios2_dma_alloc,
187 .free = nios2_dma_free,
188 .map_page = nios2_dma_map_page,
189 .unmap_page = nios2_dma_unmap_page,
190 .map_sg = nios2_dma_map_sg,
191 .unmap_sg = nios2_dma_unmap_sg,
192 .sync_single_for_device = nios2_dma_sync_single_for_device,
193 .sync_single_for_cpu = nios2_dma_sync_single_for_cpu,
194 .sync_sg_for_cpu = nios2_dma_sync_sg_for_cpu,
195 .sync_sg_for_device = nios2_dma_sync_sg_for_device,
196};
197EXPORT_SYMBOL(nios2_dma_ops);