diff options
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r-- | arch/arm/Kconfig | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 49d993cee512..136f263ed47b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1087,6 +1087,20 @@ if !MMU | |||
1087 | source "arch/arm/Kconfig-nommu" | 1087 | source "arch/arm/Kconfig-nommu" |
1088 | endif | 1088 | endif |
1089 | 1089 | ||
1090 | config PJ4B_ERRATA_4742 | ||
1091 | bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation" | ||
1092 | depends on CPU_PJ4B && MACH_ARMADA_370 | ||
1093 | default y | ||
1094 | help | ||
1095 | When coming out of either a Wait for Interrupt (WFI) or a Wait for | ||
1096 | Event (WFE) IDLE states, a specific timing sensitivity exists between | ||
1097 | the retiring WFI/WFE instructions and the newly issued subsequent | ||
1098 | instructions. This sensitivity can result in a CPU hang scenario. | ||
1099 | Workaround: | ||
1100 | The software must insert either a Data Synchronization Barrier (DSB) | ||
1101 | or Data Memory Barrier (DMB) command immediately after the WFI/WFE | ||
1102 | instruction | ||
1103 | |||
1090 | config ARM_ERRATA_326103 | 1104 | config ARM_ERRATA_326103 |
1091 | bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory" | 1105 | bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory" |
1092 | depends on CPU_V6 | 1106 | depends on CPU_V6 |
@@ -1189,6 +1203,16 @@ config PL310_ERRATA_588369 | |||
1189 | is not correctly implemented in PL310 as clean lines are not | 1203 | is not correctly implemented in PL310 as clean lines are not |
1190 | invalidated as a result of these operations. | 1204 | invalidated as a result of these operations. |
1191 | 1205 | ||
1206 | config ARM_ERRATA_643719 | ||
1207 | bool "ARM errata: LoUIS bit field in CLIDR register is incorrect" | ||
1208 | depends on CPU_V7 && SMP | ||
1209 | help | ||
1210 | This option enables the workaround for the 643719 Cortex-A9 (prior to | ||
1211 | r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR | ||
1212 | register returns zero when it should return one. The workaround | ||
1213 | corrects this value, ensuring cache maintenance operations which use | ||
1214 | it behave as intended and avoiding data corruption. | ||
1215 | |||
1192 | config ARM_ERRATA_720789 | 1216 | config ARM_ERRATA_720789 |
1193 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | 1217 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" |
1194 | depends on CPU_V7 | 1218 | depends on CPU_V7 |
@@ -2006,7 +2030,7 @@ config XIP_PHYS_ADDR | |||
2006 | 2030 | ||
2007 | config KEXEC | 2031 | config KEXEC |
2008 | bool "Kexec system call (EXPERIMENTAL)" | 2032 | bool "Kexec system call (EXPERIMENTAL)" |
2009 | depends on (!SMP || HOTPLUG_CPU) | 2033 | depends on (!SMP || PM_SLEEP_SMP) |
2010 | help | 2034 | help |
2011 | kexec is a system call that implements the ability to shutdown your | 2035 | kexec is a system call that implements the ability to shutdown your |
2012 | current kernel, and to start another kernel. It is like a reboot | 2036 | current kernel, and to start another kernel. It is like a reboot |