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-rw-r--r--Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt38
1 files changed, 7 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
index 3f6a524cc5ff..32f4a2d6d0b3 100644
--- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
@@ -1,13 +1,16 @@
1== Amlogic Meson pinmux controller == 1== Amlogic Meson pinmux controller ==
2 2
3Required properties for the root node: 3Required properties for the root node:
4 - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl" 4 - compatible: one of "amlogic,meson8-cbus-pinctrl"
5 "amlogic,meson8b-cbus-pinctrl"
6 "amlogic,meson8-aobus-pinctrl"
7 "amlogic,meson8b-aobus-pinctrl"
5 - reg: address and size of registers controlling irq functionality 8 - reg: address and size of registers controlling irq functionality
6 9
7=== GPIO sub-nodes === 10=== GPIO sub-nodes ===
8 11
9The 2 power domains of the controller (regular and always-on) are 12The GPIO bank for the controller is represented as a sub-node and it acts as a
10represented as sub-nodes and each of them acts as a GPIO controller. 13GPIO controller.
11 14
12Required properties for sub-nodes are: 15Required properties for sub-nodes are:
13 - reg: should contain address and size for mux, pull-enable, pull and 16 - reg: should contain address and size for mux, pull-enable, pull and
@@ -18,10 +21,6 @@ Required properties for sub-nodes are:
18 - gpio-controller: identifies the node as a gpio controller 21 - gpio-controller: identifies the node as a gpio controller
19 - #gpio-cells: must be 2 22 - #gpio-cells: must be 2
20 23
21Valid sub-node names are:
22 - "banks" for the regular domain
23 - "ao-bank" for the always-on domain
24
25=== Other sub-nodes === 24=== Other sub-nodes ===
26 25
27Child nodes without the "gpio-controller" represent some desired 26Child nodes without the "gpio-controller" represent some desired
@@ -45,7 +44,7 @@ pinctrl-bindings.txt
45=== Example === 44=== Example ===
46 45
47 pinctrl: pinctrl@c1109880 { 46 pinctrl: pinctrl@c1109880 {
48 compatible = "amlogic,meson8-pinctrl"; 47 compatible = "amlogic,meson8-cbus-pinctrl";
49 reg = <0xc1109880 0x10>; 48 reg = <0xc1109880 0x10>;
50 #address-cells = <1>; 49 #address-cells = <1>;
51 #size-cells = <1>; 50 #size-cells = <1>;
@@ -61,15 +60,6 @@ pinctrl-bindings.txt
61 #gpio-cells = <2>; 60 #gpio-cells = <2>;
62 }; 61 };
63 62
64 gpio_ao: ao-bank@c1108030 {
65 reg = <0xc8100014 0x4>,
66 <0xc810002c 0x4>,
67 <0xc8100024 0x8>;
68 reg-names = "mux", "pull", "gpio";
69 gpio-controller;
70 #gpio-cells = <2>;
71 };
72
73 nand { 63 nand {
74 mux { 64 mux {
75 groups = "nand_io", "nand_io_ce0", "nand_io_ce1", 65 groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
@@ -79,18 +69,4 @@ pinctrl-bindings.txt
79 function = "nand"; 69 function = "nand";
80 }; 70 };
81 }; 71 };
82
83 uart_ao_a {
84 mux {
85 groups = "uart_tx_ao_a", "uart_rx_ao_a",
86 "uart_cts_ao_a", "uart_rts_ao_a";
87 function = "uart_ao";
88 };
89
90 conf {
91 pins = "GPIOAO_0", "GPIOAO_1",
92 "GPIOAO_2", "GPIOAO_3";
93 bias-disable;
94 };
95 };
96 }; 72 };