diff options
| -rw-r--r-- | arch/powerpc/include/asm/perf_counter.h | 10 | ||||
| -rw-r--r-- | arch/powerpc/kernel/perf_counter.c | 26 | ||||
| -rw-r--r-- | arch/powerpc/kernel/power4-pmu.c | 9 | ||||
| -rw-r--r-- | arch/powerpc/kernel/power5+-pmu.c | 14 | ||||
| -rw-r--r-- | arch/powerpc/kernel/power5-pmu.c | 16 | ||||
| -rw-r--r-- | arch/powerpc/kernel/power6-pmu.c | 16 | ||||
| -rw-r--r-- | arch/powerpc/kernel/ppc970-pmu.c | 9 |
7 files changed, 48 insertions, 52 deletions
diff --git a/arch/powerpc/include/asm/perf_counter.h b/arch/powerpc/include/asm/perf_counter.h index 56d66c38143b..ceea76a48e3d 100644 --- a/arch/powerpc/include/asm/perf_counter.h +++ b/arch/powerpc/include/asm/perf_counter.h | |||
| @@ -23,13 +23,13 @@ struct power_pmu { | |||
| 23 | int max_alternatives; | 23 | int max_alternatives; |
| 24 | u64 add_fields; | 24 | u64 add_fields; |
| 25 | u64 test_adder; | 25 | u64 test_adder; |
| 26 | int (*compute_mmcr)(unsigned int events[], int n_ev, | 26 | int (*compute_mmcr)(u64 events[], int n_ev, |
| 27 | unsigned int hwc[], u64 mmcr[]); | 27 | unsigned int hwc[], u64 mmcr[]); |
| 28 | int (*get_constraint)(unsigned int event, u64 *mskp, u64 *valp); | 28 | int (*get_constraint)(u64 event, u64 *mskp, u64 *valp); |
| 29 | int (*get_alternatives)(unsigned int event, unsigned int flags, | 29 | int (*get_alternatives)(u64 event, unsigned int flags, |
| 30 | unsigned int alt[]); | 30 | u64 alt[]); |
| 31 | void (*disable_pmc)(unsigned int pmc, u64 mmcr[]); | 31 | void (*disable_pmc)(unsigned int pmc, u64 mmcr[]); |
| 32 | int (*limited_pmc_event)(unsigned int event); | 32 | int (*limited_pmc_event)(u64 event); |
| 33 | int limited_pmc5_6; /* PMC5 and PMC6 have limited function */ | 33 | int limited_pmc5_6; /* PMC5 and PMC6 have limited function */ |
| 34 | int n_generic; | 34 | int n_generic; |
| 35 | int *generic_events; | 35 | int *generic_events; |
diff --git a/arch/powerpc/kernel/perf_counter.c b/arch/powerpc/kernel/perf_counter.c index db8d5cafc159..8d4cafc84b82 100644 --- a/arch/powerpc/kernel/perf_counter.c +++ b/arch/powerpc/kernel/perf_counter.c | |||
| @@ -26,7 +26,7 @@ struct cpu_hw_counters { | |||
| 26 | int n_limited; | 26 | int n_limited; |
| 27 | u8 pmcs_enabled; | 27 | u8 pmcs_enabled; |
| 28 | struct perf_counter *counter[MAX_HWCOUNTERS]; | 28 | struct perf_counter *counter[MAX_HWCOUNTERS]; |
| 29 | unsigned int events[MAX_HWCOUNTERS]; | 29 | u64 events[MAX_HWCOUNTERS]; |
| 30 | unsigned int flags[MAX_HWCOUNTERS]; | 30 | unsigned int flags[MAX_HWCOUNTERS]; |
| 31 | u64 mmcr[3]; | 31 | u64 mmcr[3]; |
| 32 | struct perf_counter *limited_counter[MAX_LIMITED_HWCOUNTERS]; | 32 | struct perf_counter *limited_counter[MAX_LIMITED_HWCOUNTERS]; |
| @@ -131,11 +131,11 @@ static void write_pmc(int idx, unsigned long val) | |||
| 131 | * and see if any combination of alternative codes is feasible. | 131 | * and see if any combination of alternative codes is feasible. |
| 132 | * The feasible set is returned in event[]. | 132 | * The feasible set is returned in event[]. |
| 133 | */ | 133 | */ |
| 134 | static int power_check_constraints(unsigned int event[], unsigned int cflags[], | 134 | static int power_check_constraints(u64 event[], unsigned int cflags[], |
| 135 | int n_ev) | 135 | int n_ev) |
| 136 | { | 136 | { |
| 137 | u64 mask, value, nv; | 137 | u64 mask, value, nv; |
| 138 | unsigned int alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; | 138 | u64 alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; |
| 139 | u64 amasks[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; | 139 | u64 amasks[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; |
| 140 | u64 avalues[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; | 140 | u64 avalues[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES]; |
| 141 | u64 smasks[MAX_HWCOUNTERS], svalues[MAX_HWCOUNTERS]; | 141 | u64 smasks[MAX_HWCOUNTERS], svalues[MAX_HWCOUNTERS]; |
| @@ -564,7 +564,7 @@ void hw_perf_enable(void) | |||
| 564 | } | 564 | } |
| 565 | 565 | ||
| 566 | static int collect_events(struct perf_counter *group, int max_count, | 566 | static int collect_events(struct perf_counter *group, int max_count, |
| 567 | struct perf_counter *ctrs[], unsigned int *events, | 567 | struct perf_counter *ctrs[], u64 *events, |
| 568 | unsigned int *flags) | 568 | unsigned int *flags) |
| 569 | { | 569 | { |
| 570 | int n = 0; | 570 | int n = 0; |
| @@ -752,11 +752,11 @@ struct pmu power_pmu = { | |||
| 752 | * that a limited PMC can count, doesn't require interrupts, and | 752 | * that a limited PMC can count, doesn't require interrupts, and |
| 753 | * doesn't exclude any processor mode. | 753 | * doesn't exclude any processor mode. |
| 754 | */ | 754 | */ |
| 755 | static int can_go_on_limited_pmc(struct perf_counter *counter, unsigned int ev, | 755 | static int can_go_on_limited_pmc(struct perf_counter *counter, u64 ev, |
| 756 | unsigned int flags) | 756 | unsigned int flags) |
| 757 | { | 757 | { |
| 758 | int n; | 758 | int n; |
| 759 | unsigned int alt[MAX_EVENT_ALTERNATIVES]; | 759 | u64 alt[MAX_EVENT_ALTERNATIVES]; |
| 760 | 760 | ||
| 761 | if (counter->hw_event.exclude_user | 761 | if (counter->hw_event.exclude_user |
| 762 | || counter->hw_event.exclude_kernel | 762 | || counter->hw_event.exclude_kernel |
| @@ -776,10 +776,8 @@ static int can_go_on_limited_pmc(struct perf_counter *counter, unsigned int ev, | |||
| 776 | 776 | ||
| 777 | flags |= PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD; | 777 | flags |= PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD; |
| 778 | n = ppmu->get_alternatives(ev, flags, alt); | 778 | n = ppmu->get_alternatives(ev, flags, alt); |
| 779 | if (n) | ||
| 780 | return alt[0]; | ||
| 781 | 779 | ||
| 782 | return 0; | 780 | return n > 0; |
| 783 | } | 781 | } |
| 784 | 782 | ||
| 785 | /* | 783 | /* |
| @@ -787,10 +785,9 @@ static int can_go_on_limited_pmc(struct perf_counter *counter, unsigned int ev, | |||
| 787 | * and return the event code, or 0 if there is no such alternative. | 785 | * and return the event code, or 0 if there is no such alternative. |
| 788 | * (Note: event code 0 is "don't count" on all machines.) | 786 | * (Note: event code 0 is "don't count" on all machines.) |
| 789 | */ | 787 | */ |
| 790 | static unsigned long normal_pmc_alternative(unsigned long ev, | 788 | static u64 normal_pmc_alternative(u64 ev, unsigned long flags) |
| 791 | unsigned long flags) | ||
| 792 | { | 789 | { |
| 793 | unsigned int alt[MAX_EVENT_ALTERNATIVES]; | 790 | u64 alt[MAX_EVENT_ALTERNATIVES]; |
| 794 | int n; | 791 | int n; |
| 795 | 792 | ||
| 796 | flags &= ~(PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD); | 793 | flags &= ~(PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD); |
| @@ -820,9 +817,10 @@ static void hw_perf_counter_destroy(struct perf_counter *counter) | |||
| 820 | 817 | ||
| 821 | const struct pmu *hw_perf_counter_init(struct perf_counter *counter) | 818 | const struct pmu *hw_perf_counter_init(struct perf_counter *counter) |
| 822 | { | 819 | { |
| 823 | unsigned long ev, flags; | 820 | u64 ev; |
| 821 | unsigned long flags; | ||
| 824 | struct perf_counter *ctrs[MAX_HWCOUNTERS]; | 822 | struct perf_counter *ctrs[MAX_HWCOUNTERS]; |
| 825 | unsigned int events[MAX_HWCOUNTERS]; | 823 | u64 events[MAX_HWCOUNTERS]; |
| 826 | unsigned int cflags[MAX_HWCOUNTERS]; | 824 | unsigned int cflags[MAX_HWCOUNTERS]; |
| 827 | int n; | 825 | int n; |
| 828 | int err; | 826 | int err; |
diff --git a/arch/powerpc/kernel/power4-pmu.c b/arch/powerpc/kernel/power4-pmu.c index 744a2756958e..836fa118eb1e 100644 --- a/arch/powerpc/kernel/power4-pmu.c +++ b/arch/powerpc/kernel/power4-pmu.c | |||
| @@ -213,7 +213,7 @@ static unsigned char direct_marked_event[8] = { | |||
| 213 | * Returns 1 if event counts things relating to marked instructions | 213 | * Returns 1 if event counts things relating to marked instructions |
| 214 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. | 214 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. |
| 215 | */ | 215 | */ |
| 216 | static int p4_marked_instr_event(unsigned int event) | 216 | static int p4_marked_instr_event(u64 event) |
| 217 | { | 217 | { |
| 218 | int pmc, psel, unit, byte, bit; | 218 | int pmc, psel, unit, byte, bit; |
| 219 | unsigned int mask; | 219 | unsigned int mask; |
| @@ -249,7 +249,7 @@ static int p4_marked_instr_event(unsigned int event) | |||
| 249 | return (mask >> (byte * 8 + bit)) & 1; | 249 | return (mask >> (byte * 8 + bit)) & 1; |
| 250 | } | 250 | } |
| 251 | 251 | ||
| 252 | static int p4_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | 252 | static int p4_get_constraint(u64 event, u64 *maskp, u64 *valp) |
| 253 | { | 253 | { |
| 254 | int pmc, byte, unit, lower, sh; | 254 | int pmc, byte, unit, lower, sh; |
| 255 | u64 mask = 0, value = 0; | 255 | u64 mask = 0, value = 0; |
| @@ -320,8 +320,7 @@ static unsigned int ppc_inst_cmpl[] = { | |||
| 320 | 0x1001, 0x4001, 0x6001, 0x7001, 0x8001 | 320 | 0x1001, 0x4001, 0x6001, 0x7001, 0x8001 |
| 321 | }; | 321 | }; |
| 322 | 322 | ||
| 323 | static int p4_get_alternatives(unsigned int event, unsigned int flags, | 323 | static int p4_get_alternatives(u64 event, unsigned int flags, u64 alt[]) |
| 324 | unsigned int alt[]) | ||
| 325 | { | 324 | { |
| 326 | int i, j, na; | 325 | int i, j, na; |
| 327 | 326 | ||
| @@ -353,7 +352,7 @@ static int p4_get_alternatives(unsigned int event, unsigned int flags, | |||
| 353 | return na; | 352 | return na; |
| 354 | } | 353 | } |
| 355 | 354 | ||
| 356 | static int p4_compute_mmcr(unsigned int event[], int n_ev, | 355 | static int p4_compute_mmcr(u64 event[], int n_ev, |
| 357 | unsigned int hwc[], u64 mmcr[]) | 356 | unsigned int hwc[], u64 mmcr[]) |
| 358 | { | 357 | { |
| 359 | u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0; | 358 | u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0; |
diff --git a/arch/powerpc/kernel/power5+-pmu.c b/arch/powerpc/kernel/power5+-pmu.c index 8154eaa2404f..3ac0654372ab 100644 --- a/arch/powerpc/kernel/power5+-pmu.c +++ b/arch/powerpc/kernel/power5+-pmu.c | |||
| @@ -135,7 +135,7 @@ static u64 unit_cons[PM_LASTUNIT+1][2] = { | |||
| 135 | [PM_GRS] = { 0x0e00000000ull, 0x0c40000000ull }, | 135 | [PM_GRS] = { 0x0e00000000ull, 0x0c40000000ull }, |
| 136 | }; | 136 | }; |
| 137 | 137 | ||
| 138 | static int power5p_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | 138 | static int power5p_get_constraint(u64 event, u64 *maskp, u64 *valp) |
| 139 | { | 139 | { |
| 140 | int pmc, byte, unit, sh; | 140 | int pmc, byte, unit, sh; |
| 141 | int bit, fmask; | 141 | int bit, fmask; |
| @@ -188,7 +188,7 @@ static int power5p_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | |||
| 188 | return 0; | 188 | return 0; |
| 189 | } | 189 | } |
| 190 | 190 | ||
| 191 | static int power5p_limited_pmc_event(unsigned int event) | 191 | static int power5p_limited_pmc_event(u64 event) |
| 192 | { | 192 | { |
| 193 | int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; | 193 | int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; |
| 194 | 194 | ||
| @@ -273,11 +273,11 @@ static int find_alternative_bdecode(unsigned int event) | |||
| 273 | return -1; | 273 | return -1; |
| 274 | } | 274 | } |
| 275 | 275 | ||
| 276 | static int power5p_get_alternatives(unsigned int event, unsigned int flags, | 276 | static int power5p_get_alternatives(u64 event, unsigned int flags, u64 alt[]) |
| 277 | unsigned int alt[]) | ||
| 278 | { | 277 | { |
| 279 | int i, j, ae, nalt = 1; | 278 | int i, j, nalt = 1; |
| 280 | int nlim; | 279 | int nlim; |
| 280 | u64 ae; | ||
| 281 | 281 | ||
| 282 | alt[0] = event; | 282 | alt[0] = event; |
| 283 | nalt = 1; | 283 | nalt = 1; |
| @@ -402,7 +402,7 @@ static unsigned char direct_event_is_marked[0x28] = { | |||
| 402 | * Returns 1 if event counts things relating to marked instructions | 402 | * Returns 1 if event counts things relating to marked instructions |
| 403 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. | 403 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. |
| 404 | */ | 404 | */ |
| 405 | static int power5p_marked_instr_event(unsigned int event) | 405 | static int power5p_marked_instr_event(u64 event) |
| 406 | { | 406 | { |
| 407 | int pmc, psel; | 407 | int pmc, psel; |
| 408 | int bit, byte, unit; | 408 | int bit, byte, unit; |
| @@ -451,7 +451,7 @@ static int power5p_marked_instr_event(unsigned int event) | |||
| 451 | return (mask >> (byte * 8 + bit)) & 1; | 451 | return (mask >> (byte * 8 + bit)) & 1; |
| 452 | } | 452 | } |
| 453 | 453 | ||
| 454 | static int power5p_compute_mmcr(unsigned int event[], int n_ev, | 454 | static int power5p_compute_mmcr(u64 event[], int n_ev, |
| 455 | unsigned int hwc[], u64 mmcr[]) | 455 | unsigned int hwc[], u64 mmcr[]) |
| 456 | { | 456 | { |
| 457 | u64 mmcr1 = 0; | 457 | u64 mmcr1 = 0; |
diff --git a/arch/powerpc/kernel/power5-pmu.c b/arch/powerpc/kernel/power5-pmu.c index 6e667dc86470..d5344968ee9c 100644 --- a/arch/powerpc/kernel/power5-pmu.c +++ b/arch/powerpc/kernel/power5-pmu.c | |||
| @@ -139,7 +139,7 @@ static u64 unit_cons[PM_LASTUNIT+1][2] = { | |||
| 139 | [PM_GRS] = { 0x30002000000000ull, 0x30000400000000ull }, | 139 | [PM_GRS] = { 0x30002000000000ull, 0x30000400000000ull }, |
| 140 | }; | 140 | }; |
| 141 | 141 | ||
| 142 | static int power5_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | 142 | static int power5_get_constraint(u64 event, u64 *maskp, u64 *valp) |
| 143 | { | 143 | { |
| 144 | int pmc, byte, unit, sh; | 144 | int pmc, byte, unit, sh; |
| 145 | int bit, fmask; | 145 | int bit, fmask; |
| @@ -224,7 +224,7 @@ static const unsigned int event_alternatives[][MAX_ALT] = { | |||
| 224 | * Scan the alternatives table for a match and return the | 224 | * Scan the alternatives table for a match and return the |
| 225 | * index into the alternatives table if found, else -1. | 225 | * index into the alternatives table if found, else -1. |
| 226 | */ | 226 | */ |
| 227 | static int find_alternative(unsigned int event) | 227 | static int find_alternative(u64 event) |
| 228 | { | 228 | { |
| 229 | int i, j; | 229 | int i, j; |
| 230 | 230 | ||
| @@ -250,7 +250,7 @@ static const unsigned char bytedecode_alternatives[4][4] = { | |||
| 250 | * PMCSEL values on other counters. This returns the alternative | 250 | * PMCSEL values on other counters. This returns the alternative |
| 251 | * event code for those that do, or -1 otherwise. | 251 | * event code for those that do, or -1 otherwise. |
| 252 | */ | 252 | */ |
| 253 | static int find_alternative_bdecode(unsigned int event) | 253 | static u64 find_alternative_bdecode(u64 event) |
| 254 | { | 254 | { |
| 255 | int pmc, altpmc, pp, j; | 255 | int pmc, altpmc, pp, j; |
| 256 | 256 | ||
| @@ -269,10 +269,10 @@ static int find_alternative_bdecode(unsigned int event) | |||
| 269 | return -1; | 269 | return -1; |
| 270 | } | 270 | } |
| 271 | 271 | ||
| 272 | static int power5_get_alternatives(unsigned int event, unsigned int flags, | 272 | static int power5_get_alternatives(u64 event, unsigned int flags, u64 alt[]) |
| 273 | unsigned int alt[]) | ||
| 274 | { | 273 | { |
| 275 | int i, j, ae, nalt = 1; | 274 | int i, j, nalt = 1; |
| 275 | u64 ae; | ||
| 276 | 276 | ||
| 277 | alt[0] = event; | 277 | alt[0] = event; |
| 278 | nalt = 1; | 278 | nalt = 1; |
| @@ -338,7 +338,7 @@ static unsigned char direct_event_is_marked[0x28] = { | |||
| 338 | * Returns 1 if event counts things relating to marked instructions | 338 | * Returns 1 if event counts things relating to marked instructions |
| 339 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. | 339 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. |
| 340 | */ | 340 | */ |
| 341 | static int power5_marked_instr_event(unsigned int event) | 341 | static int power5_marked_instr_event(u64 event) |
| 342 | { | 342 | { |
| 343 | int pmc, psel; | 343 | int pmc, psel; |
| 344 | int bit, byte, unit; | 344 | int bit, byte, unit; |
| @@ -382,7 +382,7 @@ static int power5_marked_instr_event(unsigned int event) | |||
| 382 | return (mask >> (byte * 8 + bit)) & 1; | 382 | return (mask >> (byte * 8 + bit)) & 1; |
| 383 | } | 383 | } |
| 384 | 384 | ||
| 385 | static int power5_compute_mmcr(unsigned int event[], int n_ev, | 385 | static int power5_compute_mmcr(u64 event[], int n_ev, |
| 386 | unsigned int hwc[], u64 mmcr[]) | 386 | unsigned int hwc[], u64 mmcr[]) |
| 387 | { | 387 | { |
| 388 | u64 mmcr1 = 0; | 388 | u64 mmcr1 = 0; |
diff --git a/arch/powerpc/kernel/power6-pmu.c b/arch/powerpc/kernel/power6-pmu.c index d44049f0ae27..ab7c615c458d 100644 --- a/arch/powerpc/kernel/power6-pmu.c +++ b/arch/powerpc/kernel/power6-pmu.c | |||
| @@ -134,7 +134,7 @@ static u32 marked_bus_events[16] = { | |||
| 134 | * Returns 1 if event counts things relating to marked instructions | 134 | * Returns 1 if event counts things relating to marked instructions |
| 135 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. | 135 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. |
| 136 | */ | 136 | */ |
| 137 | static int power6_marked_instr_event(unsigned int event) | 137 | static int power6_marked_instr_event(u64 event) |
| 138 | { | 138 | { |
| 139 | int pmc, psel, ptype; | 139 | int pmc, psel, ptype; |
| 140 | int bit, byte, unit; | 140 | int bit, byte, unit; |
| @@ -172,7 +172,7 @@ static int power6_marked_instr_event(unsigned int event) | |||
| 172 | /* | 172 | /* |
| 173 | * Assign PMC numbers and compute MMCR1 value for a set of events | 173 | * Assign PMC numbers and compute MMCR1 value for a set of events |
| 174 | */ | 174 | */ |
| 175 | static int p6_compute_mmcr(unsigned int event[], int n_ev, | 175 | static int p6_compute_mmcr(u64 event[], int n_ev, |
| 176 | unsigned int hwc[], u64 mmcr[]) | 176 | unsigned int hwc[], u64 mmcr[]) |
| 177 | { | 177 | { |
| 178 | u64 mmcr1 = 0; | 178 | u64 mmcr1 = 0; |
| @@ -265,7 +265,7 @@ static int p6_compute_mmcr(unsigned int event[], int n_ev, | |||
| 265 | * 20-23, 24-27, 28-31 ditto for bytes 1, 2, 3 | 265 | * 20-23, 24-27, 28-31 ditto for bytes 1, 2, 3 |
| 266 | * 32-34 select field: nest (subunit) event selector | 266 | * 32-34 select field: nest (subunit) event selector |
| 267 | */ | 267 | */ |
| 268 | static int p6_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | 268 | static int p6_get_constraint(u64 event, u64 *maskp, u64 *valp) |
| 269 | { | 269 | { |
| 270 | int pmc, byte, sh, subunit; | 270 | int pmc, byte, sh, subunit; |
| 271 | u64 mask = 0, value = 0; | 271 | u64 mask = 0, value = 0; |
| @@ -298,7 +298,7 @@ static int p6_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | |||
| 298 | return 0; | 298 | return 0; |
| 299 | } | 299 | } |
| 300 | 300 | ||
| 301 | static int p6_limited_pmc_event(unsigned int event) | 301 | static int p6_limited_pmc_event(u64 event) |
| 302 | { | 302 | { |
| 303 | int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; | 303 | int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; |
| 304 | 304 | ||
| @@ -337,7 +337,7 @@ static const unsigned int event_alternatives[][MAX_ALT] = { | |||
| 337 | * This could be made more efficient with a binary search on | 337 | * This could be made more efficient with a binary search on |
| 338 | * a presorted list, if necessary | 338 | * a presorted list, if necessary |
| 339 | */ | 339 | */ |
| 340 | static int find_alternatives_list(unsigned int event) | 340 | static int find_alternatives_list(u64 event) |
| 341 | { | 341 | { |
| 342 | int i, j; | 342 | int i, j; |
| 343 | unsigned int alt; | 343 | unsigned int alt; |
| @@ -356,12 +356,12 @@ static int find_alternatives_list(unsigned int event) | |||
| 356 | return -1; | 356 | return -1; |
| 357 | } | 357 | } |
| 358 | 358 | ||
| 359 | static int p6_get_alternatives(unsigned int event, unsigned int flags, | 359 | static int p6_get_alternatives(u64 event, unsigned int flags, u64 alt[]) |
| 360 | unsigned int alt[]) | ||
| 361 | { | 360 | { |
| 362 | int i, j, nlim; | 361 | int i, j, nlim; |
| 363 | unsigned int aevent, psel, pmc; | 362 | unsigned int psel, pmc; |
| 364 | unsigned int nalt = 1; | 363 | unsigned int nalt = 1; |
| 364 | u64 aevent; | ||
| 365 | 365 | ||
| 366 | alt[0] = event; | 366 | alt[0] = event; |
| 367 | nlim = p6_limited_pmc_event(event); | 367 | nlim = p6_limited_pmc_event(event); |
diff --git a/arch/powerpc/kernel/ppc970-pmu.c b/arch/powerpc/kernel/ppc970-pmu.c index af2d1884058c..eed47c4523f1 100644 --- a/arch/powerpc/kernel/ppc970-pmu.c +++ b/arch/powerpc/kernel/ppc970-pmu.c | |||
| @@ -147,7 +147,7 @@ static unsigned char direct_marked_event[8] = { | |||
| 147 | * Returns 1 if event counts things relating to marked instructions | 147 | * Returns 1 if event counts things relating to marked instructions |
| 148 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. | 148 | * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not. |
| 149 | */ | 149 | */ |
| 150 | static int p970_marked_instr_event(unsigned int event) | 150 | static int p970_marked_instr_event(u64 event) |
| 151 | { | 151 | { |
| 152 | int pmc, psel, unit, byte, bit; | 152 | int pmc, psel, unit, byte, bit; |
| 153 | unsigned int mask; | 153 | unsigned int mask; |
| @@ -192,7 +192,7 @@ static u64 unit_cons[PM_LASTUNIT+1][2] = { | |||
| 192 | [PM_STS] = { 0x380000000000ull, 0x310000000000ull }, | 192 | [PM_STS] = { 0x380000000000ull, 0x310000000000ull }, |
| 193 | }; | 193 | }; |
| 194 | 194 | ||
| 195 | static int p970_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | 195 | static int p970_get_constraint(u64 event, u64 *maskp, u64 *valp) |
| 196 | { | 196 | { |
| 197 | int pmc, byte, unit, sh, spcsel; | 197 | int pmc, byte, unit, sh, spcsel; |
| 198 | u64 mask = 0, value = 0; | 198 | u64 mask = 0, value = 0; |
| @@ -243,8 +243,7 @@ static int p970_get_constraint(unsigned int event, u64 *maskp, u64 *valp) | |||
| 243 | return 0; | 243 | return 0; |
| 244 | } | 244 | } |
| 245 | 245 | ||
| 246 | static int p970_get_alternatives(unsigned int event, unsigned int flags, | 246 | static int p970_get_alternatives(u64 event, unsigned int flags, u64 alt[]) |
| 247 | unsigned int alt[]) | ||
| 248 | { | 247 | { |
| 249 | alt[0] = event; | 248 | alt[0] = event; |
| 250 | 249 | ||
| @@ -257,7 +256,7 @@ static int p970_get_alternatives(unsigned int event, unsigned int flags, | |||
| 257 | return 1; | 256 | return 1; |
| 258 | } | 257 | } |
| 259 | 258 | ||
| 260 | static int p970_compute_mmcr(unsigned int event[], int n_ev, | 259 | static int p970_compute_mmcr(u64 event[], int n_ev, |
| 261 | unsigned int hwc[], u64 mmcr[]) | 260 | unsigned int hwc[], u64 mmcr[]) |
| 262 | { | 261 | { |
| 263 | u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0; | 262 | u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0; |
