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-rw-r--r--drivers/spi/spi-pxa2xx-dma.c28
-rw-r--r--drivers/spi/spi-pxa2xx.c229
-rw-r--r--drivers/spi/spi-pxa2xx.h17
3 files changed, 89 insertions, 185 deletions
diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c
index 5d0d8fe07966..2fa7f4b43492 100644
--- a/drivers/spi/spi-pxa2xx-dma.c
+++ b/drivers/spi/spi-pxa2xx-dma.c
@@ -51,19 +51,15 @@ static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data,
51 if (!pxa25x_ssp_comp(drv_data)) 51 if (!pxa25x_ssp_comp(drv_data))
52 pxa2xx_spi_write(drv_data, SSTO, 0); 52 pxa2xx_spi_write(drv_data, SSTO, 0);
53 53
54 if (!error) { 54 if (error) {
55 msg->actual_length += drv_data->len;
56 msg->state = pxa2xx_spi_next_transfer(drv_data);
57 } else {
58 /* In case we got an error we disable the SSP now */ 55 /* In case we got an error we disable the SSP now */
59 pxa2xx_spi_write(drv_data, SSCR0, 56 pxa2xx_spi_write(drv_data, SSCR0,
60 pxa2xx_spi_read(drv_data, SSCR0) 57 pxa2xx_spi_read(drv_data, SSCR0)
61 & ~SSCR0_SSE); 58 & ~SSCR0_SSE);
62 59 msg->status = -EIO;
63 msg->state = ERROR_STATE;
64 } 60 }
65 61
66 tasklet_schedule(&drv_data->pump_transfers); 62 spi_finalize_current_transfer(drv_data->master);
67 } 63 }
68} 64}
69 65
@@ -74,11 +70,11 @@ static void pxa2xx_spi_dma_callback(void *data)
74 70
75static struct dma_async_tx_descriptor * 71static struct dma_async_tx_descriptor *
76pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data, 72pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data,
77 enum dma_transfer_direction dir) 73 enum dma_transfer_direction dir,
74 struct spi_transfer *xfer)
78{ 75{
79 struct chip_data *chip = 76 struct chip_data *chip =
80 spi_get_ctldata(drv_data->master->cur_msg->spi); 77 spi_get_ctldata(drv_data->master->cur_msg->spi);
81 struct spi_transfer *xfer = drv_data->cur_transfer;
82 enum dma_slave_buswidth width; 78 enum dma_slave_buswidth width;
83 struct dma_slave_config cfg; 79 struct dma_slave_config cfg;
84 struct dma_chan *chan; 80 struct dma_chan *chan;
@@ -144,12 +140,13 @@ irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data)
144 return IRQ_NONE; 140 return IRQ_NONE;
145} 141}
146 142
147int pxa2xx_spi_dma_prepare(struct driver_data *drv_data) 143int pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
144 struct spi_transfer *xfer)
148{ 145{
149 struct dma_async_tx_descriptor *tx_desc, *rx_desc; 146 struct dma_async_tx_descriptor *tx_desc, *rx_desc;
150 int err; 147 int err;
151 148
152 tx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_MEM_TO_DEV); 149 tx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_MEM_TO_DEV, xfer);
153 if (!tx_desc) { 150 if (!tx_desc) {
154 dev_err(&drv_data->pdev->dev, 151 dev_err(&drv_data->pdev->dev,
155 "failed to get DMA TX descriptor\n"); 152 "failed to get DMA TX descriptor\n");
@@ -157,7 +154,7 @@ int pxa2xx_spi_dma_prepare(struct driver_data *drv_data)
157 goto err_tx; 154 goto err_tx;
158 } 155 }
159 156
160 rx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_DEV_TO_MEM); 157 rx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_DEV_TO_MEM, xfer);
161 if (!rx_desc) { 158 if (!rx_desc) {
162 dev_err(&drv_data->pdev->dev, 159 dev_err(&drv_data->pdev->dev,
163 "failed to get DMA RX descriptor\n"); 160 "failed to get DMA RX descriptor\n");
@@ -187,6 +184,13 @@ void pxa2xx_spi_dma_start(struct driver_data *drv_data)
187 atomic_set(&drv_data->dma_running, 1); 184 atomic_set(&drv_data->dma_running, 1);
188} 185}
189 186
187void pxa2xx_spi_dma_stop(struct driver_data *drv_data)
188{
189 atomic_set(&drv_data->dma_running, 0);
190 dmaengine_terminate_sync(drv_data->master->dma_rx);
191 dmaengine_terminate_sync(drv_data->master->dma_tx);
192}
193
190int pxa2xx_spi_dma_setup(struct driver_data *drv_data) 194int pxa2xx_spi_dma_setup(struct driver_data *drv_data)
191{ 195{
192 struct pxa2xx_spi_master *pdata = drv_data->master_info; 196 struct pxa2xx_spi_master *pdata = drv_data->master_info;
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index e4930542bc4b..c852ea5c28c6 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -340,9 +340,11 @@ static void lpss_ssp_setup(struct driver_data *drv_data)
340 } 340 }
341} 341}
342 342
343static void lpss_ssp_select_cs(struct driver_data *drv_data, 343static void lpss_ssp_select_cs(struct spi_device *spi,
344 const struct lpss_config *config) 344 const struct lpss_config *config)
345{ 345{
346 struct driver_data *drv_data =
347 spi_controller_get_devdata(spi->controller);
346 u32 value, cs; 348 u32 value, cs;
347 349
348 if (!config->cs_sel_mask) 350 if (!config->cs_sel_mask)
@@ -350,7 +352,7 @@ static void lpss_ssp_select_cs(struct driver_data *drv_data,
350 352
351 value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl); 353 value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl);
352 354
353 cs = drv_data->master->cur_msg->spi->chip_select; 355 cs = spi->chip_select;
354 cs <<= config->cs_sel_shift; 356 cs <<= config->cs_sel_shift;
355 if (cs != (value & config->cs_sel_mask)) { 357 if (cs != (value & config->cs_sel_mask)) {
356 /* 358 /*
@@ -369,15 +371,17 @@ static void lpss_ssp_select_cs(struct driver_data *drv_data,
369 } 371 }
370} 372}
371 373
372static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable) 374static void lpss_ssp_cs_control(struct spi_device *spi, bool enable)
373{ 375{
376 struct driver_data *drv_data =
377 spi_controller_get_devdata(spi->controller);
374 const struct lpss_config *config; 378 const struct lpss_config *config;
375 u32 value; 379 u32 value;
376 380
377 config = lpss_get_config(drv_data); 381 config = lpss_get_config(drv_data);
378 382
379 if (enable) 383 if (enable)
380 lpss_ssp_select_cs(drv_data, config); 384 lpss_ssp_select_cs(spi, config);
381 385
382 value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl); 386 value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl);
383 if (enable) 387 if (enable)
@@ -387,10 +391,11 @@ static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable)
387 __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); 391 __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value);
388} 392}
389 393
390static void cs_assert(struct driver_data *drv_data) 394static void cs_assert(struct spi_device *spi)
391{ 395{
392 struct chip_data *chip = 396 struct chip_data *chip = spi_get_ctldata(spi);
393 spi_get_ctldata(drv_data->master->cur_msg->spi); 397 struct driver_data *drv_data =
398 spi_controller_get_devdata(spi->controller);
394 399
395 if (drv_data->ssp_type == CE4100_SSP) { 400 if (drv_data->ssp_type == CE4100_SSP) {
396 pxa2xx_spi_write(drv_data, SSSR, chip->frm); 401 pxa2xx_spi_write(drv_data, SSSR, chip->frm);
@@ -408,13 +413,14 @@ static void cs_assert(struct driver_data *drv_data)
408 } 413 }
409 414
410 if (is_lpss_ssp(drv_data)) 415 if (is_lpss_ssp(drv_data))
411 lpss_ssp_cs_control(drv_data, true); 416 lpss_ssp_cs_control(spi, true);
412} 417}
413 418
414static void cs_deassert(struct driver_data *drv_data) 419static void cs_deassert(struct spi_device *spi)
415{ 420{
416 struct chip_data *chip = 421 struct chip_data *chip = spi_get_ctldata(spi);
417 spi_get_ctldata(drv_data->master->cur_msg->spi); 422 struct driver_data *drv_data =
423 spi_controller_get_devdata(spi->controller);
418 unsigned long timeout; 424 unsigned long timeout;
419 425
420 if (drv_data->ssp_type == CE4100_SSP) 426 if (drv_data->ssp_type == CE4100_SSP)
@@ -437,7 +443,15 @@ static void cs_deassert(struct driver_data *drv_data)
437 } 443 }
438 444
439 if (is_lpss_ssp(drv_data)) 445 if (is_lpss_ssp(drv_data))
440 lpss_ssp_cs_control(drv_data, false); 446 lpss_ssp_cs_control(spi, false);
447}
448
449static void pxa2xx_spi_set_cs(struct spi_device *spi, bool level)
450{
451 if (level)
452 cs_deassert(spi);
453 else
454 cs_assert(spi);
441} 455}
442 456
443int pxa2xx_spi_flush(struct driver_data *drv_data) 457int pxa2xx_spi_flush(struct driver_data *drv_data)
@@ -549,70 +563,6 @@ static int u32_reader(struct driver_data *drv_data)
549 return drv_data->rx == drv_data->rx_end; 563 return drv_data->rx == drv_data->rx_end;
550} 564}
551 565
552void *pxa2xx_spi_next_transfer(struct driver_data *drv_data)
553{
554 struct spi_message *msg = drv_data->master->cur_msg;
555 struct spi_transfer *trans = drv_data->cur_transfer;
556
557 /* Move to next transfer */
558 if (trans->transfer_list.next != &msg->transfers) {
559 drv_data->cur_transfer =
560 list_entry(trans->transfer_list.next,
561 struct spi_transfer,
562 transfer_list);
563 return RUNNING_STATE;
564 } else
565 return DONE_STATE;
566}
567
568/* caller already set message->status; dma and pio irqs are blocked */
569static void giveback(struct driver_data *drv_data)
570{
571 struct spi_transfer* last_transfer;
572 struct spi_message *msg;
573
574 msg = drv_data->master->cur_msg;
575 drv_data->cur_transfer = NULL;
576
577 last_transfer = list_last_entry(&msg->transfers, struct spi_transfer,
578 transfer_list);
579
580 /* Delay if requested before any change in chip select */
581 if (last_transfer->delay_usecs)
582 udelay(last_transfer->delay_usecs);
583
584 /* Drop chip select UNLESS cs_change is true or we are returning
585 * a message with an error, or next message is for another chip
586 */
587 if (!last_transfer->cs_change)
588 cs_deassert(drv_data);
589 else {
590 struct spi_message *next_msg;
591
592 /* Holding of cs was hinted, but we need to make sure
593 * the next message is for the same chip. Don't waste
594 * time with the following tests unless this was hinted.
595 *
596 * We cannot postpone this until pump_messages, because
597 * after calling msg->complete (below) the driver that
598 * sent the current message could be unloaded, which
599 * could invalidate the cs_control() callback...
600 */
601
602 /* get a pointer to the next message, if any */
603 next_msg = spi_get_next_queued_message(drv_data->master);
604
605 /* see if the next and current messages point
606 * to the same chip
607 */
608 if ((next_msg && next_msg->spi != msg->spi) ||
609 msg->state == ERROR_STATE)
610 cs_deassert(drv_data);
611 }
612
613 spi_finalize_current_message(drv_data->master);
614}
615
616static void reset_sccr1(struct driver_data *drv_data) 566static void reset_sccr1(struct driver_data *drv_data)
617{ 567{
618 struct chip_data *chip = 568 struct chip_data *chip =
@@ -648,8 +598,8 @@ static void int_error_stop(struct driver_data *drv_data, const char* msg)
648 598
649 dev_err(&drv_data->pdev->dev, "%s\n", msg); 599 dev_err(&drv_data->pdev->dev, "%s\n", msg);
650 600
651 drv_data->master->cur_msg->state = ERROR_STATE; 601 drv_data->master->cur_msg->status = -EIO;
652 tasklet_schedule(&drv_data->pump_transfers); 602 spi_finalize_current_transfer(drv_data->master);
653} 603}
654 604
655static void int_transfer_complete(struct driver_data *drv_data) 605static void int_transfer_complete(struct driver_data *drv_data)
@@ -660,19 +610,7 @@ static void int_transfer_complete(struct driver_data *drv_data)
660 if (!pxa25x_ssp_comp(drv_data)) 610 if (!pxa25x_ssp_comp(drv_data))
661 pxa2xx_spi_write(drv_data, SSTO, 0); 611 pxa2xx_spi_write(drv_data, SSTO, 0);
662 612
663 /* Update total byte transferred return count actual bytes read */ 613 spi_finalize_current_transfer(drv_data->master);
664 drv_data->master->cur_msg->actual_length += drv_data->len -
665 (drv_data->rx_end - drv_data->rx);
666
667 /* Transfer delays and chip select release are
668 * handled in pump_transfers or giveback
669 */
670
671 /* Move to next transfer */
672 drv_data->master->cur_msg->state = pxa2xx_spi_next_transfer(drv_data);
673
674 /* Schedule transfer tasklet */
675 tasklet_schedule(&drv_data->pump_transfers);
676} 614}
677 615
678static irqreturn_t interrupt_transfer(struct driver_data *drv_data) 616static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
@@ -973,17 +911,16 @@ static bool pxa2xx_spi_can_dma(struct spi_controller *master,
973 xfer->len >= chip->dma_burst_size; 911 xfer->len >= chip->dma_burst_size;
974} 912}
975 913
976static void pump_transfers(unsigned long data) 914int pxa2xx_spi_transfer_one(struct spi_controller *master,
915 struct spi_device *spi,
916 struct spi_transfer *transfer)
977{ 917{
978 struct driver_data *drv_data = (struct driver_data *)data; 918 struct driver_data *drv_data = spi_controller_get_devdata(master);
979 struct spi_controller *master = drv_data->master;
980 struct spi_message *message = master->cur_msg; 919 struct spi_message *message = master->cur_msg;
981 struct chip_data *chip = spi_get_ctldata(message->spi); 920 struct chip_data *chip = spi_get_ctldata(message->spi);
982 u32 dma_thresh = chip->dma_threshold; 921 u32 dma_thresh = chip->dma_threshold;
983 u32 dma_burst = chip->dma_burst_size; 922 u32 dma_burst = chip->dma_burst_size;
984 u32 change_mask = pxa2xx_spi_get_ssrc1_change_mask(drv_data); 923 u32 change_mask = pxa2xx_spi_get_ssrc1_change_mask(drv_data);
985 struct spi_transfer *transfer;
986 struct spi_transfer *previous;
987 u32 clk_div; 924 u32 clk_div;
988 u8 bits; 925 u8 bits;
989 u32 speed; 926 u32 speed;
@@ -992,36 +929,6 @@ static void pump_transfers(unsigned long data)
992 int err; 929 int err;
993 int dma_mapped; 930 int dma_mapped;
994 931
995 /* Get current state information */
996 transfer = drv_data->cur_transfer;
997
998 /* Handle for abort */
999 if (message->state == ERROR_STATE) {
1000 message->status = -EIO;
1001 giveback(drv_data);
1002 return;
1003 }
1004
1005 /* Handle end of message */
1006 if (message->state == DONE_STATE) {
1007 message->status = 0;
1008 giveback(drv_data);
1009 return;
1010 }
1011
1012 /* Delay if requested at end of transfer before CS change */
1013 if (message->state == RUNNING_STATE) {
1014 previous = list_entry(transfer->transfer_list.prev,
1015 struct spi_transfer,
1016 transfer_list);
1017 if (previous->delay_usecs)
1018 udelay(previous->delay_usecs);
1019
1020 /* Drop chip select only if cs_change is requested */
1021 if (previous->cs_change)
1022 cs_deassert(drv_data);
1023 }
1024
1025 /* Check if we can DMA this transfer */ 932 /* Check if we can DMA this transfer */
1026 if (transfer->len > MAX_DMA_LEN && chip->enable_dma) { 933 if (transfer->len > MAX_DMA_LEN && chip->enable_dma) {
1027 934
@@ -1031,30 +938,25 @@ static void pump_transfers(unsigned long data)
1031 dev_err(&drv_data->pdev->dev, 938 dev_err(&drv_data->pdev->dev,
1032 "Mapped transfer length of %u is greater than %d\n", 939 "Mapped transfer length of %u is greater than %d\n",
1033 transfer->len, MAX_DMA_LEN); 940 transfer->len, MAX_DMA_LEN);
1034 message->status = -EINVAL; 941 return -EINVAL;
1035 giveback(drv_data);
1036 return;
1037 } 942 }
1038 943
1039 /* warn ... we force this to PIO mode */ 944 /* warn ... we force this to PIO mode */
1040 dev_warn_ratelimited(&message->spi->dev, 945 dev_warn_ratelimited(&message->spi->dev,
1041 "DMA disabled for transfer length %ld greater than %d\n", 946 "DMA disabled for transfer length %ld greater than %d\n",
1042 (long)drv_data->len, MAX_DMA_LEN); 947 (long)transfer->len, MAX_DMA_LEN);
1043 } 948 }
1044 949
1045 /* Setup the transfer state based on the type of transfer */ 950 /* Setup the transfer state based on the type of transfer */
1046 if (pxa2xx_spi_flush(drv_data) == 0) { 951 if (pxa2xx_spi_flush(drv_data) == 0) {
1047 dev_err(&drv_data->pdev->dev, "Flush failed\n"); 952 dev_err(&drv_data->pdev->dev, "Flush failed\n");
1048 message->status = -EIO; 953 return -EIO;
1049 giveback(drv_data);
1050 return;
1051 } 954 }
1052 drv_data->n_bytes = chip->n_bytes; 955 drv_data->n_bytes = chip->n_bytes;
1053 drv_data->tx = (void *)transfer->tx_buf; 956 drv_data->tx = (void *)transfer->tx_buf;
1054 drv_data->tx_end = drv_data->tx + transfer->len; 957 drv_data->tx_end = drv_data->tx + transfer->len;
1055 drv_data->rx = transfer->rx_buf; 958 drv_data->rx = transfer->rx_buf;
1056 drv_data->rx_end = drv_data->rx + transfer->len; 959 drv_data->rx_end = drv_data->rx + transfer->len;
1057 drv_data->len = transfer->len;
1058 drv_data->write = drv_data->tx ? chip->write : null_writer; 960 drv_data->write = drv_data->tx ? chip->write : null_writer;
1059 drv_data->read = drv_data->rx ? chip->read : null_reader; 961 drv_data->read = drv_data->rx ? chip->read : null_reader;
1060 962
@@ -1096,8 +998,6 @@ static void pump_transfers(unsigned long data)
1096 "DMA burst size reduced to match bits_per_word\n"); 998 "DMA burst size reduced to match bits_per_word\n");
1097 } 999 }
1098 1000
1099 message->state = RUNNING_STATE;
1100
1101 dma_mapped = master->can_dma && 1001 dma_mapped = master->can_dma &&
1102 master->can_dma(master, message->spi, transfer) && 1002 master->can_dma(master, message->spi, transfer) &&
1103 master->cur_msg_mapped; 1003 master->cur_msg_mapped;
@@ -1106,12 +1006,9 @@ static void pump_transfers(unsigned long data)
1106 /* Ensure we have the correct interrupt handler */ 1006 /* Ensure we have the correct interrupt handler */
1107 drv_data->transfer_handler = pxa2xx_spi_dma_transfer; 1007 drv_data->transfer_handler = pxa2xx_spi_dma_transfer;
1108 1008
1109 err = pxa2xx_spi_dma_prepare(drv_data); 1009 err = pxa2xx_spi_dma_prepare(drv_data, transfer);
1110 if (err) { 1010 if (err)
1111 message->status = err; 1011 return err;
1112 giveback(drv_data);
1113 return;
1114 }
1115 1012
1116 /* Clear status and start DMA engine */ 1013 /* Clear status and start DMA engine */
1117 cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1; 1014 cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1;
@@ -1173,27 +1070,40 @@ static void pump_transfers(unsigned long data)
1173 pxa2xx_spi_write(drv_data, SSTO, chip->timeout); 1070 pxa2xx_spi_write(drv_data, SSTO, chip->timeout);
1174 } 1071 }
1175 1072
1176 cs_assert(drv_data); 1073 /*
1177 1074 * Release the data by enabling service requests and interrupts,
1178 /* after chip select, release the data by enabling service 1075 * without changing any mode bits
1179 * requests and interrupts, without changing any mode bits */ 1076 */
1180 pxa2xx_spi_write(drv_data, SSCR1, cr1); 1077 pxa2xx_spi_write(drv_data, SSCR1, cr1);
1078
1079 return 1;
1181} 1080}
1182 1081
1183static int pxa2xx_spi_transfer_one_message(struct spi_controller *master, 1082static void pxa2xx_spi_handle_err(struct spi_controller *master,
1184 struct spi_message *msg) 1083 struct spi_message *msg)
1185{ 1084{
1186 struct driver_data *drv_data = spi_controller_get_devdata(master); 1085 struct driver_data *drv_data = spi_controller_get_devdata(master);
1187 1086
1188 /* Initial message state*/ 1087 /* Disable the SSP */
1189 msg->state = START_STATE; 1088 pxa2xx_spi_write(drv_data, SSCR0,
1190 drv_data->cur_transfer = list_entry(msg->transfers.next, 1089 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);
1191 struct spi_transfer, 1090 /* Clear and disable interrupts and service requests */
1192 transfer_list); 1091 write_SSSR_CS(drv_data, drv_data->clear_sr);
1092 pxa2xx_spi_write(drv_data, SSCR1,
1093 pxa2xx_spi_read(drv_data, SSCR1)
1094 & ~(drv_data->int_cr1 | drv_data->dma_cr1));
1095 if (!pxa25x_ssp_comp(drv_data))
1096 pxa2xx_spi_write(drv_data, SSTO, 0);
1193 1097
1194 /* Mark as busy and launch transfers */ 1098 /*
1195 tasklet_schedule(&drv_data->pump_transfers); 1099 * Stop the DMA if running. Note DMA callback handler may have unset
1196 return 0; 1100 * the dma_running already, which is fine as stopping is not needed
1101 * then but we shouldn't rely this flag for anything else than
1102 * stopping. For instance to differentiate between PIO and DMA
1103 * transfers.
1104 */
1105 if (atomic_read(&drv_data->dma_running))
1106 pxa2xx_spi_dma_stop(drv_data);
1197} 1107}
1198 1108
1199static int pxa2xx_spi_unprepare_transfer(struct spi_controller *master) 1109static int pxa2xx_spi_unprepare_transfer(struct spi_controller *master)
@@ -1649,7 +1559,9 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
1649 master->dma_alignment = DMA_ALIGNMENT; 1559 master->dma_alignment = DMA_ALIGNMENT;
1650 master->cleanup = cleanup; 1560 master->cleanup = cleanup;
1651 master->setup = setup; 1561 master->setup = setup;
1652 master->transfer_one_message = pxa2xx_spi_transfer_one_message; 1562 master->set_cs = pxa2xx_spi_set_cs;
1563 master->transfer_one = pxa2xx_spi_transfer_one;
1564 master->handle_err = pxa2xx_spi_handle_err;
1653 master->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer; 1565 master->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer;
1654 master->fw_translate_cs = pxa2xx_spi_fw_translate_cs; 1566 master->fw_translate_cs = pxa2xx_spi_fw_translate_cs;
1655 master->auto_runtime_pm = true; 1567 master->auto_runtime_pm = true;
@@ -1785,9 +1697,6 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
1785 } 1697 }
1786 } 1698 }
1787 1699
1788 tasklet_init(&drv_data->pump_transfers, pump_transfers,
1789 (unsigned long)drv_data);
1790
1791 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1700 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1792 pm_runtime_use_autosuspend(&pdev->dev); 1701 pm_runtime_use_autosuspend(&pdev->dev);
1793 pm_runtime_set_active(&pdev->dev); 1702 pm_runtime_set_active(&pdev->dev);
diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h
index 08aa7e50d011..baf558b89c73 100644
--- a/drivers/spi/spi-pxa2xx.h
+++ b/drivers/spi/spi-pxa2xx.h
@@ -46,15 +46,10 @@ struct driver_data {
46 u32 clear_sr; 46 u32 clear_sr;
47 u32 mask_sr; 47 u32 mask_sr;
48 48
49 /* Message Transfer pump */
50 struct tasklet_struct pump_transfers;
51
52 /* DMA engine support */ 49 /* DMA engine support */
53 atomic_t dma_running; 50 atomic_t dma_running;
54 51
55 /* Current message transfer state info */ 52 /* Current transfer state info */
56 struct spi_transfer *cur_transfer;
57 size_t len;
58 void *tx; 53 void *tx;
59 void *tx_end; 54 void *tx_end;
60 void *rx; 55 void *rx;
@@ -104,11 +99,6 @@ static inline void pxa2xx_spi_write(const struct driver_data *drv_data,
104 __raw_writel(val, drv_data->ioaddr + reg); 99 __raw_writel(val, drv_data->ioaddr + reg);
105} 100}
106 101
107#define START_STATE ((void *)0)
108#define RUNNING_STATE ((void *)1)
109#define DONE_STATE ((void *)2)
110#define ERROR_STATE ((void *)-1)
111
112#define DMA_ALIGNMENT 8 102#define DMA_ALIGNMENT 8
113 103
114static inline int pxa25x_ssp_comp(struct driver_data *drv_data) 104static inline int pxa25x_ssp_comp(struct driver_data *drv_data)
@@ -133,14 +123,15 @@ static inline void write_SSSR_CS(struct driver_data *drv_data, u32 val)
133} 123}
134 124
135extern int pxa2xx_spi_flush(struct driver_data *drv_data); 125extern int pxa2xx_spi_flush(struct driver_data *drv_data);
136extern void *pxa2xx_spi_next_transfer(struct driver_data *drv_data);
137 126
138#define MAX_DMA_LEN SZ_64K 127#define MAX_DMA_LEN SZ_64K
139#define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL) 128#define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
140 129
141extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data); 130extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
142extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data); 131extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
132 struct spi_transfer *xfer);
143extern void pxa2xx_spi_dma_start(struct driver_data *drv_data); 133extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
134extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data);
144extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data); 135extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
145extern void pxa2xx_spi_dma_release(struct driver_data *drv_data); 136extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
146extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip, 137extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,