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-rw-r--r--arch/arm/mm/cache-v7.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index d062f8cbb886..5b5d0c00bca7 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -103,8 +103,7 @@ ALT_UP( mov r3, r0, lsr #26) @ move LoUU into position
103 moveqs r3, #1 << 1 @ fix LoUIS value (and set flags state to 'ne') 103 moveqs r3, #1 << 1 @ fix LoUIS value (and set flags state to 'ne')
104#endif 104#endif
105 reteq lr @ return if level == 0 105 reteq lr @ return if level == 0
106 mov r10, #0 @ r10 (starting level) = 0 106 b start_flush_levels @ start flushing cache levels
107 b flush_levels @ start flushing cache levels
108ENDPROC(v7_flush_dcache_louis) 107ENDPROC(v7_flush_dcache_louis)
109 108
110/* 109/*
@@ -122,6 +121,7 @@ ENTRY(v7_flush_dcache_all)
122 mov r3, r0, lsr #23 @ move LoC into position 121 mov r3, r0, lsr #23 @ move LoC into position
123 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr 122 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
124 beq finished @ if loc is 0, then no need to clean 123 beq finished @ if loc is 0, then no need to clean
124start_flush_levels:
125 mov r10, #0 @ start clean at cache level 0 125 mov r10, #0 @ start clean at cache level 0
126flush_levels: 126flush_levels:
127 add r2, r10, r10, lsr #1 @ work out 3x current cache level 127 add r2, r10, r10, lsr #1 @ work out 3x current cache level