diff options
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 20ce682a2540..da4caf6da739 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -93,6 +93,7 @@ | |||
93 | * Microarchitectural Data | 93 | * Microarchitectural Data |
94 | * Sampling (MDS) vulnerabilities. | 94 | * Sampling (MDS) vulnerabilities. |
95 | */ | 95 | */ |
96 | #define ARCH_CAP_TSX_CTRL_MSR BIT(7) /* MSR for TSX control is available. */ | ||
96 | 97 | ||
97 | #define MSR_IA32_FLUSH_CMD 0x0000010b | 98 | #define MSR_IA32_FLUSH_CMD 0x0000010b |
98 | #define L1D_FLUSH BIT(0) /* | 99 | #define L1D_FLUSH BIT(0) /* |
@@ -103,6 +104,10 @@ | |||
103 | #define MSR_IA32_BBL_CR_CTL 0x00000119 | 104 | #define MSR_IA32_BBL_CR_CTL 0x00000119 |
104 | #define MSR_IA32_BBL_CR_CTL3 0x0000011e | 105 | #define MSR_IA32_BBL_CR_CTL3 0x0000011e |
105 | 106 | ||
107 | #define MSR_IA32_TSX_CTRL 0x00000122 | ||
108 | #define TSX_CTRL_RTM_DISABLE BIT(0) /* Disable RTM feature */ | ||
109 | #define TSX_CTRL_CPUID_CLEAR BIT(1) /* Disable TSX enumeration */ | ||
110 | |||
106 | #define MSR_IA32_SYSENTER_CS 0x00000174 | 111 | #define MSR_IA32_SYSENTER_CS 0x00000174 |
107 | #define MSR_IA32_SYSENTER_ESP 0x00000175 | 112 | #define MSR_IA32_SYSENTER_ESP 0x00000175 |
108 | #define MSR_IA32_SYSENTER_EIP 0x00000176 | 113 | #define MSR_IA32_SYSENTER_EIP 0x00000176 |