diff options
-rw-r--r-- | drivers/rtc/rtc-pcf2127.c | 59 |
1 files changed, 33 insertions, 26 deletions
diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c index 58eb96506e4b..cd8def79b379 100644 --- a/drivers/rtc/rtc-pcf2127.c +++ b/drivers/rtc/rtc-pcf2127.c | |||
@@ -19,26 +19,32 @@ | |||
19 | #include <linux/of.h> | 19 | #include <linux/of.h> |
20 | #include <linux/regmap.h> | 20 | #include <linux/regmap.h> |
21 | 21 | ||
22 | #define PCF2127_REG_CTRL1 (0x00) /* Control Register 1 */ | 22 | /* Control register 1 */ |
23 | #define PCF2127_REG_CTRL2 (0x01) /* Control Register 2 */ | 23 | #define PCF2127_REG_CTRL1 0x00 |
24 | 24 | /* Control register 2 */ | |
25 | #define PCF2127_REG_CTRL3 (0x02) /* Control Register 3 */ | 25 | #define PCF2127_REG_CTRL2 0x01 |
26 | #define PCF2127_REG_CTRL3_BLF BIT(2) | 26 | /* Control register 3 */ |
27 | 27 | #define PCF2127_REG_CTRL3 0x02 | |
28 | #define PCF2127_REG_SC (0x03) /* datetime */ | 28 | #define PCF2127_BIT_CTRL3_BLF BIT(2) |
29 | #define PCF2127_REG_MN (0x04) | 29 | /* Time and date registers */ |
30 | #define PCF2127_REG_HR (0x05) | 30 | #define PCF2127_REG_SC 0x03 |
31 | #define PCF2127_REG_DM (0x06) | 31 | #define PCF2127_BIT_SC_OSF BIT(7) |
32 | #define PCF2127_REG_DW (0x07) | 32 | #define PCF2127_REG_MN 0x04 |
33 | #define PCF2127_REG_MO (0x08) | 33 | #define PCF2127_REG_HR 0x05 |
34 | #define PCF2127_REG_YR (0x09) | 34 | #define PCF2127_REG_DM 0x06 |
35 | 35 | #define PCF2127_REG_DW 0x07 | |
36 | /* the pcf2127 has 512 bytes nvmem, pcf2129 doesn't */ | 36 | #define PCF2127_REG_MO 0x08 |
37 | #define PCF2127_REG_RAM_addr_MSB 0x1a | 37 | #define PCF2127_REG_YR 0x09 |
38 | #define PCF2127_REG_RAM_wrt_cmd 0x1c | 38 | /* |
39 | #define PCF2127_REG_RAM_rd_cmd 0x1d | 39 | * RAM registers |
40 | * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is | ||
41 | * battery backed and can survive a power outage. | ||
42 | * PCF2129 doesn't have this feature. | ||
43 | */ | ||
44 | #define PCF2127_REG_RAM_ADDR_MSB 0x1A | ||
45 | #define PCF2127_REG_RAM_WRT_CMD 0x1C | ||
46 | #define PCF2127_REG_RAM_RD_CMD 0x1D | ||
40 | 47 | ||
41 | #define PCF2127_OSF BIT(7) /* Oscillator Fail flag */ | ||
42 | 48 | ||
43 | struct pcf2127 { | 49 | struct pcf2127 { |
44 | struct rtc_device *rtc; | 50 | struct rtc_device *rtc; |
@@ -73,11 +79,12 @@ static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
73 | return ret; | 79 | return ret; |
74 | } | 80 | } |
75 | 81 | ||
76 | if (buf[PCF2127_REG_CTRL3] & PCF2127_REG_CTRL3_BLF) | 82 | if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF) |
77 | dev_info(dev, | 83 | dev_info(dev, |
78 | "low voltage detected, check/replace RTC battery.\n"); | 84 | "low voltage detected, check/replace RTC battery.\n"); |
79 | 85 | ||
80 | if (buf[PCF2127_REG_SC] & PCF2127_OSF) { | 86 | /* Clock integrity is not guaranteed when OSF flag is set. */ |
87 | if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) { | ||
81 | /* | 88 | /* |
82 | * no need clear the flag here, | 89 | * no need clear the flag here, |
83 | * it will be cleared once the new date is saved | 90 | * it will be cleared once the new date is saved |
@@ -166,7 +173,7 @@ static int pcf2127_rtc_ioctl(struct device *dev, | |||
166 | if (ret) | 173 | if (ret) |
167 | return ret; | 174 | return ret; |
168 | 175 | ||
169 | touser = touser & PCF2127_REG_CTRL3_BLF ? 1 : 0; | 176 | touser = touser & PCF2127_BIT_CTRL3_BLF ? 1 : 0; |
170 | 177 | ||
171 | if (copy_to_user((void __user *)arg, &touser, sizeof(int))) | 178 | if (copy_to_user((void __user *)arg, &touser, sizeof(int))) |
172 | return -EFAULT; | 179 | return -EFAULT; |
@@ -192,12 +199,12 @@ static int pcf2127_nvmem_read(void *priv, unsigned int offset, | |||
192 | int ret; | 199 | int ret; |
193 | unsigned char offsetbuf[] = { offset >> 8, offset }; | 200 | unsigned char offsetbuf[] = { offset >> 8, offset }; |
194 | 201 | ||
195 | ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_addr_MSB, | 202 | ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB, |
196 | offsetbuf, 2); | 203 | offsetbuf, 2); |
197 | if (ret) | 204 | if (ret) |
198 | return ret; | 205 | return ret; |
199 | 206 | ||
200 | ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_rd_cmd, | 207 | ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD, |
201 | val, bytes); | 208 | val, bytes); |
202 | 209 | ||
203 | return ret ?: bytes; | 210 | return ret ?: bytes; |
@@ -210,12 +217,12 @@ static int pcf2127_nvmem_write(void *priv, unsigned int offset, | |||
210 | int ret; | 217 | int ret; |
211 | unsigned char offsetbuf[] = { offset >> 8, offset }; | 218 | unsigned char offsetbuf[] = { offset >> 8, offset }; |
212 | 219 | ||
213 | ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_addr_MSB, | 220 | ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB, |
214 | offsetbuf, 2); | 221 | offsetbuf, 2); |
215 | if (ret) | 222 | if (ret) |
216 | return ret; | 223 | return ret; |
217 | 224 | ||
218 | ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_wrt_cmd, | 225 | ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD, |
219 | val, bytes); | 226 | val, bytes); |
220 | 227 | ||
221 | return ret ?: bytes; | 228 | return ret ?: bytes; |