244 files changed, 7785 insertions, 3688 deletions

diff --git a/Documentation/ABI/testing/sysfs-class-backlight b/Documentation/ABI/testing/sysfs-class-backlight
new file mode 100644
index 000000000000..3ab175a3f5cb
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-class-backlight
@@ -0,0 +1,26 @@
+What:           /sys/class/backlight/<backlight>/scale
+Date:           July 2019
+KernelVersion:  5.4
+Contact:        Daniel Thompson <daniel.thompson@linaro.org>
+Description:
+                Description of the scale of the brightness curve.
+
+                The human eye senses brightness approximately logarithmically,
+                hence linear changes in brightness are perceived as being
+                non-linear. To achieve a linear perception of brightness changes
+                controls like sliders need to apply a logarithmic mapping for
+                backlights with a linear brightness curve.
+
+                Possible values of the attribute are:
+
+                unknown
+                  The scale of the brightness curve is unknown.
+
+                linear
+                  The brightness changes linearly with each step. Brightness
+                  controls should apply a logarithmic mapping for a linear
+                  perception.
+
+                non-linear
+                  The brightness changes non-linearly with each step. Brightness
+                  controls should use a linear mapping for a linear perception.
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 8a54ed862049..944e03e29f65 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3467,12 +3467,13 @@
                                 specify the device is described above.
                                 If <order of align> is not specified,
                                 PAGE_SIZE is used as alignment.
-                                PCI-PCI bridge can be specified, if resource
+                                A PCI-PCI bridge can be specified if resource
                                 windows need to be expanded.
                                 To specify the alignment for several
                                 instances of a device, the PCI vendor,
                                 device, subvendor, and subdevice may be
-                                specified, e.g., 4096@pci:8086:9c22:103c:198f
+                                specified, e.g., 12@pci:8086:9c22:103c:198f
+                                for 4096-byte alignment.
                 ecrc=           Enable/disable PCIe ECRC (transaction layer
                                 end-to-end CRC checking).
                                 bios: Use BIOS/firmware settings. This is the
diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt
index 0ebd08af777d..a9b105ac00a8 100644
--- a/Documentation/devicetree/bindings/mfd/mt6397.txt
+++ b/Documentation/devicetree/bindings/mfd/mt6397.txt
@@ -8,11 +8,12 @@ MT6397/MT6323 is a multifunction device with the following sub modules:
 - Clock
 - LED
 - Keys
+- Power controller
 
 It is interfaced to host controller using SPI interface by a proprietary hardware
 called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap.
 See the following for pwarp node definitions:
-Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+../soc/mediatek/pwrap.txt
 
 This document describes the binding for MFD device and its sub module.
 
@@ -22,14 +23,16 @@ compatible: "mediatek,mt6397" or "mediatek,mt6323"
 Optional subnodes:
 
 - rtc
-        Required properties:
+        Required properties: Should be one of follows
+                - compatible: "mediatek,mt6323-rtc"
                 - compatible: "mediatek,mt6397-rtc"
+        For details, see ../rtc/rtc-mt6397.txt
 - regulators
         Required properties:
                 - compatible: "mediatek,mt6397-regulator"
-        see Documentation/devicetree/bindings/regulator/mt6397-regulator.txt
+        see ../regulator/mt6397-regulator.txt
                 - compatible: "mediatek,mt6323-regulator"
-        see Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
+        see ../regulator/mt6323-regulator.txt
 - codec
         Required properties:
                 - compatible: "mediatek,mt6397-codec"
@@ -39,12 +42,17 @@ Optional subnodes:
 - led
         Required properties:
                 - compatible: "mediatek,mt6323-led"
-        see Documentation/devicetree/bindings/leds/leds-mt6323.txt
+        see ../leds/leds-mt6323.txt
 
 - keys
         Required properties:
                 - compatible: "mediatek,mt6397-keys" or "mediatek,mt6323-keys"
-        see Documentation/devicetree/bindings/input/mtk-pmic-keys.txt
+        see ../input/mtk-pmic-keys.txt
+
+- power-controller
+        Required properties:
+                - compatible: "mediatek,mt6323-pwrc"
+        For details, see ../power/reset/mt6323-poweroff.txt
 
 Example:
         pwrap: pwrap@1000f000 {
diff --git a/Documentation/devicetree/bindings/mfd/rn5t618.txt b/Documentation/devicetree/bindings/mfd/rn5t618.txt
index 65c23263cc54..b74e5e94d1cb 100644
--- a/Documentation/devicetree/bindings/mfd/rn5t618.txt
+++ b/Documentation/devicetree/bindings/mfd/rn5t618.txt
@@ -14,6 +14,10 @@ Required properties:
                 "ricoh,rc5t619"
  - reg: the I2C slave address of the device
 
+Optional properties:
+ - system-power-controller:
+   See Documentation/devicetree/bindings/power/power-controller.txt
+
 Sub-nodes:
  - regulators: the node is required if the regulator functionality is
    needed. The valid regulator names are: DCDC1, DCDC2, DCDC3, DCDC4
@@ -28,6 +32,7 @@ Example:
         pmic@32 {
                 compatible = "ricoh,rn5t618";
                 reg = <0x32>;
+                system-power-controller;
 
                 regulators {
                         DCDC1 {
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 5561a1c060d0..78494c4050f7 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -11,7 +11,6 @@ Required properties:
              the ATU address space.
     (The old way of getting the configuration address space from "ranges"
     is deprecated and should be avoided.)
-- num-lanes: number of lanes to use
 RC mode:
 - #address-cells: set to <3>
 - #size-cells: set to <2>
@@ -34,6 +33,11 @@ Optional properties:
 - clock-names: Must include the following entries:
         - "pcie"
         - "pcie_bus"
+- snps,enable-cdm-check: This is a boolean property and if present enables
+   automatic checking of CDM (Configuration Dependent Module) registers
+   for data corruption. CDM registers include standard PCIe configuration
+   space registers, Port Logic registers, DMA and iATU (internal Address
+   Translation Unit) registers.
 RC mode:
 - num-viewport: number of view ports configured in hardware. If a platform
   does not specify it, the driver assumes 2.
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index a7f5f5afa0e6..de4b2baf91e8 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -50,7 +50,7 @@ Additional required properties for imx7d-pcie and imx8mq-pcie:
 - power-domains: Must be set to a phandle pointing to PCIE_PHY power domain
 - resets: Must contain phandles to PCIe-related reset lines exposed by SRC
   IP block
-- reset-names: Must contain the following entires:
+- reset-names: Must contain the following entries:
                - "pciephy"
                - "apps"
                - "turnoff"
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
index 92437a366e5f..7468d666763a 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt
@@ -6,6 +6,7 @@ Required properties:
         "mediatek,mt2712-pcie"
         "mediatek,mt7622-pcie"
         "mediatek,mt7623-pcie"
+        "mediatek,mt7629-pcie"
 - device_type: Must be "pci"
 - reg: Base addresses and lengths of the PCIe subsys and root ports.
 - reg-names: Names of the above areas to use during resource lookup.
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
new file mode 100644
index 000000000000..b739f92da58e
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
@@ -0,0 +1,171 @@
+NVIDIA Tegra PCIe controller (Synopsys DesignWare Core based)
+
+This PCIe host controller is based on the Synopsis Designware PCIe IP
+and thus inherits all the common properties defined in designware-pcie.txt.
+
+Required properties:
+- compatible: For Tegra19x, must contain "nvidia,tegra194-pcie".
+- device_type: Must be "pci"
+- power-domains: A phandle to the node that controls power to the respective
+  PCIe controller and a specifier name for the PCIe controller. Following are
+  the specifiers for the different PCIe controllers
+    TEGRA194_POWER_DOMAIN_PCIEX8B: C0
+    TEGRA194_POWER_DOMAIN_PCIEX1A: C1
+    TEGRA194_POWER_DOMAIN_PCIEX1A: C2
+    TEGRA194_POWER_DOMAIN_PCIEX1A: C3
+    TEGRA194_POWER_DOMAIN_PCIEX4A: C4
+    TEGRA194_POWER_DOMAIN_PCIEX8A: C5
+  these specifiers are defined in
+  "include/dt-bindings/power/tegra194-powergate.h" file.
+- reg: A list of physical base address and length pairs for each set of
+  controller registers. Must contain an entry for each entry in the reg-names
+  property.
+- reg-names: Must include the following entries:
+  "appl": Controller's application logic registers
+  "config": As per the definition in designware-pcie.txt
+  "atu_dma": iATU and DMA registers. This is where the iATU (internal Address
+             Translation Unit) registers of the PCIe core are made available
+             for SW access.
+  "dbi": The aperture where root port's own configuration registers are
+         available
+- interrupts: A list of interrupt outputs of the controller. Must contain an
+  entry for each entry in the interrupt-names property.
+- interrupt-names: Must include the following entries:
+  "intr": The Tegra interrupt that is asserted for controller interrupts
+  "msi": The Tegra interrupt that is asserted when an MSI is received
+- bus-range: Range of bus numbers associated with this controller
+- #address-cells: Address representation for root ports (must be 3)
+  - cell 0 specifies the bus and device numbers of the root port:
+    [23:16]: bus number
+    [15:11]: device number
+  - cell 1 denotes the upper 32 address bits and should be 0
+  - cell 2 contains the lower 32 address bits and is used to translate to the
+    CPU address space
+- #size-cells: Size representation for root ports (must be 2)
+- ranges: Describes the translation of addresses for root ports and standard
+  PCI regions. The entries must be 7 cells each, where the first three cells
+  correspond to the address as described for the #address-cells property
+  above, the fourth and fifth cells are for the physical CPU address to
+  translate to and the sixth and seventh cells are as described for the
+  #size-cells property above.
+  - Entries setup the mapping for the standard I/O, memory and
+    prefetchable PCI regions. The first cell determines the type of region
+    that is setup:
+    - 0x81000000: I/O memory region
+    - 0x82000000: non-prefetchable memory region
+    - 0xc2000000: prefetchable memory region
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+- #interrupt-cells: Size representation for interrupts (must be 1)
+- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+- clocks: Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: Must include the following entries:
+  - core
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - apb
+  - core
+- phys: Must contain a phandle to P2U PHY for each entry in phy-names.
+- phy-names: Must include an entry for each active lane.
+  "p2u-N": where N ranges from 0 to one less than the total number of lanes
+- nvidia,bpmp: Must contain a pair of phandle to BPMP controller node followed
+  by controller-id. Following are the controller ids for each controller.
+    0: C0
+    1: C1
+    2: C2
+    3: C3
+    4: C4
+    5: C5
+- vddio-pex-ctl-supply: Regulator supply for PCIe side band signals
+
+Optional properties:
+- pinctrl-names: A list of pinctrl state names.
+  It is mandatory for C5 controller and optional for other controllers.
+  - "default": Configures PCIe I/O for proper operation.
+- pinctrl-0: phandle for the 'default' state of pin configuration.
+  It is mandatory for C5 controller and optional for other controllers.
+- supports-clkreq: Refer to Documentation/devicetree/bindings/pci/pci.txt
+- nvidia,update-fc-fixup: This is a boolean property and needs to be present to
+    improve performance when a platform is designed in such a way that it
+    satisfies at least one of the following conditions thereby enabling root
+    port to exchange optimum number of FC (Flow Control) credits with
+    downstream devices
+    1. If C0/C4/C5 run at x1/x2 link widths (irrespective of speed and MPS)
+    2. If C0/C1/C2/C3/C4/C5 operate at their respective max link widths and
+       a) speed is Gen-2 and MPS is 256B
+       b) speed is >= Gen-3 with any MPS
+- nvidia,aspm-cmrt-us: Common Mode Restore Time for proper operation of ASPM
+   to be specified in microseconds
+- nvidia,aspm-pwr-on-t-us: Power On time for proper operation of ASPM to be
+   specified in microseconds
+- nvidia,aspm-l0s-entrance-latency-us: ASPM L0s entrance latency to be
+   specified in microseconds
+- vpcie3v3-supply: A phandle to the regulator node that supplies 3.3V to the slot
+  if the platform has one such slot. (Ex:- x16 slot owned by C5 controller
+  in p2972-0000 platform).
+- vpcie12v-supply: A phandle to the regulator node that supplies 12V to the slot
+  if the platform has one such slot. (Ex:- x16 slot owned by C5 controller
+  in p2972-0000 platform).
+
+Examples:
+=========
+
+Tegra194:
+--------
+
+        pcie@14180000 {
+                compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
+                power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
+                reg = <0x00 0x14180000 0x0 0x00020000   /* appl registers (128K)      */
+                       0x00 0x38000000 0x0 0x00040000   /* configuration space (256K) */
+                       0x00 0x38040000 0x0 0x00040000>; /* iATU_DMA reg space (256K)  */
+                reg-names = "appl", "config", "atu_dma";
+
+                #address-cells = <3>;
+                #size-cells = <2>;
+                device_type = "pci";
+                num-lanes = <8>;
+                linux,pci-domain = <0>;
+
+                pinctrl-names = "default";
+                pinctrl-0 = <&pex_rst_c5_out_state>, <&clkreq_c5_bi_dir_state>;
+
+                clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_0>;
+                clock-names = "core";
+
+                resets = <&bpmp TEGRA194_RESET_PEX0_CORE_0_APB>,
+                         <&bpmp TEGRA194_RESET_PEX0_CORE_0>;
+                reset-names = "apb", "core";
+
+                interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,  /* controller interrupt */
+                             <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;  /* MSI interrupt */
+                interrupt-names = "intr", "msi";
+
+                #interrupt-cells = <1>;
+                interrupt-map-mask = <0 0 0 0>;
+                interrupt-map = <0 0 0 0 &gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+
+                nvidia,bpmp = <&bpmp 0>;
+
+                supports-clkreq;
+                nvidia,aspm-cmrt-us = <60>;
+                nvidia,aspm-pwr-on-t-us = <20>;
+                nvidia,aspm-l0s-entrance-latency-us = <3>;
+
+                bus-range = <0x0 0xff>;
+                ranges = <0x81000000 0x0  0x38100000 0x0  0x38100000 0x0 0x00100000    /* downstream I/O (1MB) */
+                          0x82000000 0x0  0x38200000 0x0  0x38200000 0x0 0x01E00000    /* non-prefetchable memory (30MB) */
+                          0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000>;  /* prefetchable memory (16GB) */
+
+                vddio-pex-ctl-supply = <&vdd_1v8ao>;
+                vpcie3v3-supply = <&vdd_3v3_pcie>;
+                vpcie12v-supply = <&vdd_12v_pcie>;
+
+                phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
+                       <&p2u_hsio_5>;
+                phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
+        };
diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
index 8324a4ee6f06..7a813d0e6d63 100644
--- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt
+++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
@@ -11,7 +11,7 @@ Required properties:
 - reg-names:
    - "ctrl" for the control register region
    - "config" for the config space region
-- interrupts: Interrupt specifier for the PCIe controler
+- interrupts: Interrupt specifier for the PCIe controller
 - clocks: reference to the PCIe controller clocks
 - clock-names: mandatory if there is a second clock, in this case the
    name must be "core" for the first clock and "reg" for the second
diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
index 2a5d91024059..29bcbd88f457 100644
--- a/Documentation/devicetree/bindings/pci/pci.txt
+++ b/Documentation/devicetree/bindings/pci/pci.txt
@@ -27,6 +27,11 @@ driver implementation may support the following properties:
 - reset-gpios:
    If present this property specifies PERST# GPIO. Host drivers can parse the
    GPIO and apply fundamental reset to endpoints.
+- supports-clkreq:
+   If present this property specifies that CLKREQ signal routing exists from
+   root port to downstream device and host bridge drivers can do programming
+   which depends on CLKREQ signal existence. For example, programming root port
+   not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
 
 PCI-PCI Bridge properties
 -------------------------
diff --git a/Documentation/devicetree/bindings/pci/pcie-al.txt b/Documentation/devicetree/bindings/pci/pcie-al.txt
new file mode 100644
index 000000000000..557a5089229d
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/pcie-al.txt
@@ -0,0 +1,46 @@
+* Amazon Annapurna Labs PCIe host bridge
+
+Amazon's Annapurna Labs PCIe Host Controller is based on the Synopsys DesignWare
+PCI core. It inherits common properties defined in
+Documentation/devicetree/bindings/pci/designware-pcie.txt.
+
+Properties of the host controller node that differ from it are:
+
+- compatible:
+        Usage: required
+        Value type: <stringlist>
+        Definition: Value should contain
+                        - "amazon,al-alpine-v2-pcie" for alpine_v2
+                        - "amazon,al-alpine-v3-pcie" for alpine_v3
+
+- reg:
+        Usage: required
+        Value type: <prop-encoded-array>
+        Definition: Register ranges as listed in the reg-names property
+
+- reg-names:
+        Usage: required
+        Value type: <stringlist>
+        Definition: Must include the following entries
+                        - "config"      PCIe ECAM space
+                        - "controller"  AL proprietary registers
+                        - "dbi"         Designware PCIe registers
+
+Example:
+
+        pcie-external0: pcie@fb600000 {
+                compatible = "amazon,al-alpine-v3-pcie";
+                reg = <0x0 0xfb600000 0x0 0x00100000
+                       0x0 0xfd800000 0x0 0x00010000
+                       0x0 0xfd810000 0x0 0x00001000>;
+                reg-names = "config", "controller", "dbi";
+                bus-range = <0 255>;
+                device_type = "pci";
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-map-mask = <0x00 0 0 7>;
+                interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; /* INTa */
+                ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0 0x07ff0000>;
+        };
diff --git a/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt
new file mode 100644
index 000000000000..d23ff90baad5
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt
@@ -0,0 +1,28 @@
+NVIDIA Tegra194 P2U binding
+
+Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
+Speed) each interfacing with 12 and 8 P2U instances respectively.
+A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
+interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe
+lane.
+
+Required properties:
+- compatible: For Tegra19x, must contain "nvidia,tegra194-p2u".
+- reg: Should be the physical address space and length of respective each P2U
+       instance.
+- reg-names: Must include the entry "ctl".
+
+Required properties for PHY port node:
+- #phy-cells: Defined by generic PHY bindings.  Must be 0.
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties.
+
+Example:
+
+p2u_hsio_0: phy@3e10000 {
+        compatible = "nvidia,tegra194-p2u";
+        reg = <0x03e10000 0x10000>;
+        reg-names = "ctl";
+
+        #phy-cells = <0>;
+};
diff --git a/Documentation/devicetree/bindings/power/reset/mt6323-poweroff.txt b/Documentation/devicetree/bindings/power/reset/mt6323-poweroff.txt
new file mode 100644
index 000000000000..933f0c48e887
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/mt6323-poweroff.txt
@@ -0,0 +1,20 @@
+Device Tree Bindings for Power Controller on MediaTek PMIC
+
+The power controller which could be found on PMIC is responsible for externally
+powering off or on the remote MediaTek SoC through the circuit BBPU.
+
+Required properties:
+- compatible: Should be one of follows
+       "mediatek,mt6323-pwrc": for MT6323 PMIC
+
+Example:
+
+       pmic {
+               compatible = "mediatek,mt6323";
+
+               ...
+
+               power-controller {
+                       compatible = "mediatek,mt6323-pwrc";
+               };
+       }
diff --git a/MAINTAINERS b/MAINTAINERS
index a400af0501c9..54f1286087e9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -728,7 +728,7 @@ ALTERA SYSTEM MANAGER DRIVER
 M:      Thor Thayer <thor.thayer@linux.intel.com>
 S:      Maintained
 F:      drivers/mfd/altera-sysmgr.c
-F:      include/linux/mfd/altera-sysgmr.h
+F:      include/linux/mfd/altera-sysmgr.h
 
 ALTERA SYSTEM RESOURCE DRIVER FOR ARRIA10 DEVKIT
 M:      Thor Thayer <thor.thayer@linux.intel.com>
@@ -2921,6 +2921,8 @@ F:	drivers/video/backlight/
 F:      include/linux/backlight.h
 F:      include/linux/pwm_backlight.h
 F:      Documentation/devicetree/bindings/leds/backlight
+F:      Documentation/ABI/stable/sysfs-class-backlight
+F:      Documentation/ABI/testing/sysfs-class-backlight
 
 BATMAN ADVANCED
 M:      Marek Lindner <mareklindner@neomailbox.ch>
@@ -4338,6 +4340,12 @@ S:	Maintained
 F:      Documentation/filesystems/cramfs.txt
 F:      fs/cramfs/
 
+CREATIVE SB0540
+M:      Bastien Nocera <hadess@hadess.net>
+L:      linux-input@vger.kernel.org
+S:      Maintained
+F:      drivers/hid/hid-creative-sb0540.c
+
 CRYPTO API
 M:      Herbert Xu <herbert@gondor.apana.org.au>
 M:      "David S. Miller" <davem@davemloft.net>
@@ -12574,16 +12582,18 @@ F:	arch/x86/kernel/early-quirks.c
 
 PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS
 M:      Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+R:      Andrew Murray <andrew.murray@arm.com>
 L:      linux-pci@vger.kernel.org
 Q:      http://patchwork.ozlabs.org/project/linux-pci/list/
 T:      git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/
 S:      Supported
 F:      drivers/pci/controller/
 
-PCIE DRIVER FOR ANNAPURNA LABS
+PCIE DRIVER FOR AMAZON ANNAPURNA LABS
 M:      Jonathan Chocron <jonnyc@amazon.com>
 L:      linux-pci@vger.kernel.org
 S:      Maintained
+F:      Documentation/devicetree/bindings/pci/pcie-al.txt
 F:      drivers/pci/controller/dwc/pcie-al.c
 
 PCIE DRIVER FOR AMLOGIC MESON
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 464df4290ffc..2f6977ada447 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -874,7 +874,6 @@
                         #address-cells = <3>;
                         #size-cells = <2>;
                         device_type = "pci";
-                        num-lanes = <4>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -899,7 +898,6 @@
                         #address-cells = <3>;
                         #size-cells = <2>;
                         device_type = "pci";
-                        num-lanes = <4>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 124a7e2d8442..337919366dc8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -486,7 +486,6 @@
                         #address-cells = <3>;
                         #size-cells = <2>;
                         device_type = "pci";
-                        num-lanes = <4>;
                         num-viewport = <2>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 71d9ed9ff985..c084c7a4b6a6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -677,7 +677,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <4>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -704,7 +703,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <2>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -731,7 +729,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <2>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index b0ef08b090dd..d4c1da3d4bde 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -649,7 +649,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <4>;
                         num-viewport = <8>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -671,7 +670,6 @@
                         reg-names = "regs", "addr_space";
                         num-ib-windows = <6>;
                         num-ob-windows = <8>;
-                        num-lanes = <2>;
                         status = "disabled";
                 };
 
@@ -687,7 +685,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <2>;
                         num-viewport = <8>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -709,7 +706,6 @@
                         reg-names = "regs", "addr_space";
                         num-ib-windows = <6>;
                         num-ob-windows = <8>;
-                        num-lanes = <2>;
                         status = "disabled";
                 };
 
@@ -725,7 +721,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <2>;
                         num-viewport = <8>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -747,7 +742,6 @@
                         reg-names = "regs", "addr_space";
                         num-ib-windows = <6>;
                         num-ob-windows = <8>;
-                        num-lanes = <2>;
                         status = "disabled";
                 };
 
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index d1469b0747c7..c676d0771762 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -469,7 +469,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <4>;
                         num-viewport = <256>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -495,7 +494,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <4>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -521,7 +519,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <8>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000   /* downstream I/O */
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 64101c9962ce..7a0be8eaa84a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -639,7 +639,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <4>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         msi-parent = <&its>;
@@ -661,7 +660,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <4>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         msi-parent = <&its>;
@@ -683,7 +681,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <8>;
                         num-viewport = <256>;
                         bus-range = <0x0 0xff>;
                         msi-parent = <&its>;
@@ -705,7 +702,6 @@
                         #size-cells = <2>;
                         device_type = "pci";
                         dma-coherent;
-                        num-lanes = <4>;
                         num-viewport = <6>;
                         bus-range = <0x0 0xff>;
                         msi-parent = <&its>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
index 62e07e1197cc..4c38426a6969 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
@@ -289,5 +289,29 @@
                         gpio = <&gpio TEGRA194_MAIN_GPIO(A, 3) GPIO_ACTIVE_HIGH>;
                         enable-active-high;
                 };
+
+                vdd_3v3_pcie: regulator@2 {
+                        compatible = "regulator-fixed";
+                        reg = <2>;
+
+                        regulator-name = "PEX_3V3";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
+                        regulator-boot-on;
+                        enable-active-high;
+                };
+
+                vdd_12v_pcie: regulator@3 {
+                        compatible = "regulator-fixed";
+                        reg = <3>;
+
+                        regulator-name = "VDD_12V";
+                        regulator-min-microvolt = <1200000>;
+                        regulator-max-microvolt = <1200000>;
+                        gpio = <&gpio TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW>;
+                        regulator-boot-on;
+                        enable-active-low;
+                };
         };
 };
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index 23597d53c9c9..d47cd8c4dd24 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -93,9 +93,11 @@
         };
 
         pcie@141a0000 {
-                status = "disabled";
+                status = "okay";
 
                 vddio-pex-ctl-supply = <&vdd_1v8ao>;
+                vpcie3v3-supply = <&vdd_3v3_pcie>;
+                vpcie12v-supply = <&vdd_12v_pcie>;
 
                 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
                        <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index adebbbf36bd0..3c0cf54f0aab 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -3,8 +3,9 @@
 #include <dt-bindings/gpio/tegra194-gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/mailbox/tegra186-hsp.h>
-#include <dt-bindings/reset/tegra194-reset.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/power/tegra194-powergate.h>
+#include <dt-bindings/reset/tegra194-reset.h>
 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
 
 / {
@@ -130,6 +131,38 @@
                         };
                 };
 
+                pinmux: pinmux@2430000 {
+                        compatible = "nvidia,tegra194-pinmux";
+                        reg = <0x2430000 0x17000
+                               0xc300000 0x4000>;
+
+                        status = "okay";
+
+                        pex_rst_c5_out_state: pex_rst_c5_out {
+                                pex_rst {
+                                        nvidia,pins = "pex_l5_rst_n_pgg1";
+                                        nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                                        nvidia,lpdr = <TEGRA_PIN_ENABLE>;
+                                        nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+                                        nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
+                                        nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                                        nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                };
+                        };
+
+                        clkreq_c5_bi_dir_state: clkreq_c5_bi_dir {
+                                clkreq {
+                                        nvidia,pins = "pex_l5_clkreq_n_pgg0";
+                                        nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+                                        nvidia,lpdr = <TEGRA_PIN_ENABLE>;
+                                        nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                                        nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
+                                        nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                                        nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                                };
+                        };
+                };
+
                 uarta: serial@3100000 {
                         compatible = "nvidia,tegra194-uart", "nvidia,tegra20-uart";
                         reg = <0x03100000 0x40>;
@@ -1365,6 +1398,9 @@
                 num-viewport = <8>;
                 linux,pci-domain = <5>;
 
+                pinctrl-names = "default";
+                pinctrl-0 = <&pex_rst_c5_out_state>, <&clkreq_c5_bi_dir_state>;
+
                 clocks = <&bpmp TEGRA194_CLK_PEX1_CORE_5>,
                         <&bpmp TEGRA194_CLK_PEX1_CORE_5M>;
                 clock-names = "core", "core_m";
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index f10208478131..8e91c86e8072 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -583,6 +583,7 @@ void ia64_process_pending_intr(void)
 static irqreturn_t dummy_handler (int irq, void *dev_id)
 {
         BUG();
+        return IRQ_NONE;
 }
 
 static struct irqaction ipi_irqaction = {
diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c
index db09a693f094..5b00dc3898e1 100644
--- a/arch/ia64/mm/contig.c
+++ b/arch/ia64/mm/contig.c
@@ -108,7 +108,6 @@ setup_per_cpu_areas(void)
         struct pcpu_group_info *gi;
         unsigned int cpu;
         ssize_t static_size, reserved_size, dyn_size;
-        int rc;
 
         ai = pcpu_alloc_alloc_info(1, num_possible_cpus());
         if (!ai)
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
index 219fc640414b..4f33f6e7e206 100644
--- a/arch/ia64/mm/discontig.c
+++ b/arch/ia64/mm/discontig.c
@@ -186,7 +186,7 @@ void __init setup_per_cpu_areas(void)
         unsigned long base_offset;
         unsigned int cpu;
         ssize_t static_size, reserved_size, dyn_size;
-        int node, prev_node, unit, nr_units, rc;
+        int node, prev_node, unit, nr_units;
 
         ai = pcpu_alloc_alloc_info(MAX_NUMNODES, nr_cpu_ids);
         if (!ai)
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 632c9477a0f6..c9c4be822456 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -5,15 +5,18 @@ config MICROBLAZE
         select ARCH_NO_SWAP
         select ARCH_HAS_BINFMT_FLAT if !MMU
         select ARCH_HAS_DMA_COHERENT_TO_PFN if MMU
+        select ARCH_HAS_DMA_PREP_COHERENT
         select ARCH_HAS_GCOV_PROFILE_ALL
         select ARCH_HAS_SYNC_DMA_FOR_CPU
         select ARCH_HAS_SYNC_DMA_FOR_DEVICE
+        select ARCH_HAS_UNCACHED_SEGMENT if !MMU
         select ARCH_MIGHT_HAVE_PC_PARPORT
         select ARCH_WANT_IPC_PARSE_VERSION
         select BUILDTIME_EXTABLE_SORT
         select TIMER_OF
         select CLONE_BACKWARDS3
         select COMMON_CLK
+        select DMA_DIRECT_REMAP if MMU
         select GENERIC_ATOMIC64
         select GENERIC_CLOCKEVENTS
         select GENERIC_CPU_DEVICES
diff --git a/arch/microblaze/boot/dts/system.dts b/arch/microblaze/boot/dts/system.dts
index 5a8a9d090c37..5b236527176e 100644
--- a/arch/microblaze/boot/dts/system.dts
+++ b/arch/microblaze/boot/dts/system.dts
@@ -18,7 +18,6 @@
         #address-cells = <1>;
         #size-cells = <1>;
         compatible = "xlnx,microblaze";
-        hard-reset-gpios = <&LEDs_8Bit 2 1>;
         model = "testing";
         DDR2_SDRAM: memory@90000000 {
                 device_type = "memory";
@@ -281,6 +280,21 @@
                                 gpios = <&LEDs_8Bit 7 1>;
                         };
                 } ;
+
+                gpio-restart {
+                        compatible = "gpio-restart";
+                        /*
+                         * FIXME: is this active low or active high?
+                         * the current flag (1) indicates active low.
+                         * delay measures are templates, should be adjusted
+                         * to datasheet or trial-and-error with real hardware.
+                         */
+                        gpios = <&LEDs_8Bit 2 1>;
+                        active-delay = <100>;
+                        inactive-delay = <10>;
+                        wait-delay = <100>;
+                };
+
                 RS232_Uart_1: serial@84000000 {
                         clock-frequency = <125000000>;
                         compatible = "xlnx,xps-uartlite-1.00.a";
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig
index 92fd4e95b488..654edfdc7867 100644
--- a/arch/microblaze/configs/mmu_defconfig
+++ b/arch/microblaze/configs/mmu_defconfig
@@ -5,15 +5,10 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_KALLSYMS_ALL=y
 # CONFIG_BASE_FULL is not set
+CONFIG_KALLSYMS_ALL=y
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_EFI_PARTITION is not set
 CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
 CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
 CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
@@ -25,14 +20,19 @@ CONFIG_MMU=y
 CONFIG_CMDLINE_BOOL=y
 CONFIG_CMDLINE_FORCE=y
 CONFIG_HIGHMEM=y
-CONFIG_PCI=y
 CONFIG_PCI_XILINX=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_EFI_PARTITION is not set
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
 # CONFIG_IPV6 is not set
 CONFIG_BRIDGE=m
+CONFIG_PCI=y
 CONFIG_MTD=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_INTELEXT=y
@@ -41,6 +41,7 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_NETDEVICES=y
 CONFIG_XILINX_EMACLITE=y
+CONFIG_XILINX_AXI_EMAC=y
 CONFIG_XILINX_LL_TEMAC=y
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
@@ -59,6 +60,8 @@ CONFIG_SPI_XILINX=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_XILINX=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_XILINX_WATCHDOG=y
@@ -74,8 +77,8 @@ CONFIG_CRAMFS=y
 CONFIG_ROMFS_FS=y
 CONFIG_NFS_FS=y
 CONFIG_CIFS=y
-CONFIG_CIFS_STATS=y
 CONFIG_CIFS_STATS2=y
+CONFIG_ENCRYPTED_KEYS=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_SLAB=y
 CONFIG_DETECT_HUNG_TASK=y
@@ -83,6 +86,3 @@ CONFIG_DEBUG_SPINLOCK=y
 CONFIG_KGDB=y
 CONFIG_KGDB_TESTS=y
 CONFIG_KGDB_KDB=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_KEYS=y
-CONFIG_ENCRYPTED_KEYS=y
diff --git a/arch/microblaze/configs/nommu_defconfig b/arch/microblaze/configs/nommu_defconfig
index 06d69a6e192d..377de39ccb8c 100644
--- a/arch/microblaze/configs/nommu_defconfig
+++ b/arch/microblaze/configs/nommu_defconfig
@@ -7,15 +7,10 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_KALLSYMS_ALL=y
 # CONFIG_BASE_FULL is not set
+CONFIG_KALLSYMS_ALL=y
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_EFI_PARTITION is not set
 CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
 CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
 CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
@@ -25,13 +20,18 @@ CONFIG_XILINX_MICROBLAZE0_USE_FPU=2
 CONFIG_HZ_100=y
 CONFIG_CMDLINE_BOOL=y
 CONFIG_CMDLINE_FORCE=y
-CONFIG_PCI=y
 CONFIG_PCI_XILINX=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_EFI_PARTITION is not set
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
 # CONFIG_IPV6 is not set
+CONFIG_PCI=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_BLOCK=y
@@ -62,6 +62,8 @@ CONFIG_SPI_XILINX=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_XILINX=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_XILINX_WATCHDOG=y
@@ -75,11 +77,6 @@ CONFIG_ROMFS_FS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NLS=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_SLAB=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_EARLY_PRINTK=y
 CONFIG_KEYS=y
 CONFIG_ENCRYPTED_KEYS=y
 CONFIG_CRYPTO_ECB=y
@@ -87,3 +84,7 @@ CONFIG_CRYPTO_MD4=y
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_ARC4=y
 CONFIG_CRYPTO_DES=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_SLAB=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEBUG_SPINLOCK=y
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index c7968139486f..86c95b2a1ce1 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -40,7 +40,6 @@ extern void iounmap(volatile void __iomem *addr);
 
 extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
 #define ioremap_nocache(addr, size)             ioremap((addr), (size))
-#define ioremap_fullcache(addr, size)           ioremap((addr), (size))
 #define ioremap_wc(addr, size)                  ioremap((addr), (size))
 #define ioremap_wt(addr, size)                  ioremap((addr), (size))
 
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 21ddba9188b2..7c4dc5d85f53 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -66,8 +66,6 @@ extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
                                          unsigned long size,
                                          pgprot_t prot);
 
-#define HAVE_ARCH_PCI_RESOURCE_TO_USER
-
 /* This part of code was originally in xilinx-pci.h */
 #ifdef CONFIG_PCI_XILINX
 extern void __init xilinx_pci_init(void);
diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h
index bff2a71c828a..a1f206b90753 100644
--- a/arch/microblaze/include/asm/uaccess.h
+++ b/arch/microblaze/include/asm/uaccess.h
@@ -163,44 +163,15 @@ extern long __user_bad(void);
  * Returns zero on success, or -EFAULT on error.
  * On error, the variable @x is set to zero.
  */
-#define get_user(x, ptr)                                                \
-        __get_user_check((x), (ptr), sizeof(*(ptr)))
-
-#define __get_user_check(x, ptr, size)                                  \
-({                                                                      \
-        unsigned long __gu_val = 0;                                     \
-        const typeof(*(ptr)) __user *__gu_addr = (ptr);                 \
-        int __gu_err = 0;                                               \
-                                                                        \
-        if (access_ok(__gu_addr, size)) {                       \
-                switch (size) {                                         \
-                case 1:                                                 \
-                        __get_user_asm("lbu", __gu_addr, __gu_val,      \
-                                       __gu_err);                       \
-                        break;                                          \
-                case 2:                                                 \
-                        __get_user_asm("lhu", __gu_addr, __gu_val,      \
-                                       __gu_err);                       \
-                        break;                                          \
-                case 4:                                                 \
-                        __get_user_asm("lw", __gu_addr, __gu_val,       \
-                                       __gu_err);                       \
-                        break;                                          \
-                default:                                                \
-                        __gu_err = __user_bad();                        \
-                        break;                                          \
-                }                                                       \
-        } else {                                                        \
-                __gu_err = -EFAULT;                                     \
-        }                                                               \
-        x = (__force typeof(*(ptr)))__gu_val;                           \
-        __gu_err;                                                       \
+#define get_user(x, ptr) ({                             \
+        const typeof(*(ptr)) __user *__gu_ptr = (ptr);  \
+        access_ok(__gu_ptr, sizeof(*__gu_ptr)) ?        \
+                __get_user(x, __gu_ptr) : -EFAULT;      \
 })
 
 #define __get_user(x, ptr)                                              \
 ({                                                                      \
         unsigned long __gu_val = 0;                                     \
-        /*unsigned long __gu_ptr = (unsigned long)(ptr);*/              \
         long __gu_err;                                                  \
         switch (sizeof(*(ptr))) {                                       \
         case 1:                                                         \
@@ -212,6 +183,11 @@ extern long __user_bad(void);
         case 4:                                                         \
                 __get_user_asm("lw", (ptr), __gu_val, __gu_err);        \
                 break;                                                  \
+        case 8:                                                         \
+                __gu_err = __copy_from_user(&__gu_val, ptr, 8);         \
+                if (__gu_err)                                           \
+                        __gu_err = -EFAULT;                             \
+                break;                                                  \
         default:                                                        \
                 /* __gu_val = 0; __gu_err = -EINVAL;*/ __gu_err = __user_bad();\
         }                                                               \
diff --git a/arch/microblaze/kernel/reset.c b/arch/microblaze/kernel/reset.c
index fcbe1daf6316..5f4722908164 100644
--- a/arch/microblaze/kernel/reset.c
+++ b/arch/microblaze/kernel/reset.c
@@ -8,83 +8,9 @@
  */
 
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/of_platform.h>
-
-/* Trigger specific functions */
-#ifdef CONFIG_GPIOLIB
-
-#include <linux/of_gpio.h>
-
-static int handle; /* reset pin handle */
-static unsigned int reset_val;
-
-static int of_platform_reset_gpio_probe(void)
-{
-        int ret;
-        handle = of_get_named_gpio(of_find_node_by_path("/"),
-                                   "hard-reset-gpios", 0);
-
-        if (!gpio_is_valid(handle)) {
-                pr_info("Skipping unavailable RESET gpio %d (%s)\n",
-                                handle, "reset");
-                return -ENODEV;
-        }
-
-        ret = gpio_request(handle, "reset");
-        if (ret < 0) {
-                pr_info("GPIO pin is already allocated\n");
-                return ret;
-        }
-
-        /* get current setup value */
-        reset_val = gpio_get_value(handle);
-        /* FIXME maybe worth to perform any action */
-        pr_debug("Reset: Gpio output state: 0x%x\n", reset_val);
-
-        /* Setup GPIO as output */
-        ret = gpio_direction_output(handle, 0);
-        if (ret < 0)
-                goto err;
-
-        /* Setup output direction */
-        gpio_set_value(handle, 0);
-
-        pr_info("RESET: Registered gpio device: %d, current val: %d\n",
-                                                        handle, reset_val);
-        return 0;
-err:
-        gpio_free(handle);
-        return ret;
-}
-device_initcall(of_platform_reset_gpio_probe);
-
-
-static void gpio_system_reset(void)
-{
-        if (gpio_is_valid(handle))
-                gpio_set_value(handle, 1 - reset_val);
-        else
-                pr_notice("Reset GPIO unavailable - halting!\n");
-}
-#else
-static void gpio_system_reset(void)
-{
-        pr_notice("No reset GPIO present - halting!\n");
-}
-
-void of_platform_reset_gpio_probe(void)
-{
-        return;
-}
-#endif
-
-void machine_restart(char *cmd)
-{
-        pr_notice("Machine restart...\n");
-        gpio_system_reset();
-        while (1)
-                ;
-}
+#include <linux/reboot.h>
 
 void machine_shutdown(void)
 {
@@ -106,3 +32,12 @@ void machine_power_off(void)
         while (1)
                 ;
 }
+
+void machine_restart(char *cmd)
+{
+        do_kernel_restart(cmd);
+        /* Give the restart hook 1 s to take us down */
+        mdelay(1000);
+        pr_emerg("Reboot failed -- System halted\n");
+        while (1);
+}
diff --git a/arch/microblaze/mm/consistent.c b/arch/microblaze/mm/consistent.c
index bc7042209c57..8c5f0c332d8b 100644
--- a/arch/microblaze/mm/consistent.c
+++ b/arch/microblaze/mm/consistent.c
@@ -4,217 +4,56 @@
  * Copyright (C) 2010 Michal Simek <monstr@monstr.eu>
  * Copyright (C) 2010 PetaLogix
  * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
- *
- * Based on PowerPC version derived from arch/arm/mm/consistent.c
- * Copyright (C) 2001 Dan Malek (dmalek@jlc.net)
- * Copyright (C) 2000 Russell King
  */
 
-#include <linux/export.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
 #include <linux/kernel.h>
-#include <linux/errno.h>
 #include <linux/string.h>
 #include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
 #include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/stddef.h>
-#include <linux/vmalloc.h>
 #include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/memblock.h>
-#include <linux/highmem.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/gfp.h>
 #include <linux/dma-noncoherent.h>
-
-#include <asm/pgalloc.h>
-#include <linux/io.h>
-#include <linux/hardirq.h>
-#include <linux/mmu_context.h>
-#include <asm/mmu.h>
-#include <linux/uaccess.h>
-#include <asm/pgtable.h>
 #include <asm/cpuinfo.h>
-#include <asm/tlbflush.h>
+#include <asm/cacheflush.h>
 
-#ifndef CONFIG_MMU
-/* I have to use dcache values because I can't relate on ram size */
-# define UNCACHED_SHADOW_MASK (cpuinfo.dcache_high - cpuinfo.dcache_base + 1)
-#endif
-
-/*
- * Consistent memory allocators. Used for DMA devices that want to
- * share uncached memory with the processor core.
- * My crufty no-MMU approach is simple. In the HW platform we can optionally
- * mirror the DDR up above the processor cacheable region.  So, memory accessed
- * in this mirror region will not be cached.  It's alloced from the same
- * pool as normal memory, but the handle we return is shifted up into the
- * uncached region.  This will no doubt cause big problems if memory allocated
- * here is not also freed properly. -- JW
- */
-void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
-                gfp_t gfp, unsigned long attrs)
+void arch_dma_prep_coherent(struct page *page, size_t size)
 {
-        unsigned long order, vaddr;
-        void *ret;
-        unsigned int i, err = 0;
-        struct page *page, *end;
-
-#ifdef CONFIG_MMU
-        phys_addr_t pa;
-        struct vm_struct *area;
-        unsigned long va;
-#endif
-
-        if (in_interrupt())
-                BUG();
-
-        /* Only allocate page size areas. */
-        size = PAGE_ALIGN(size);
-        order = get_order(size);
-
-        vaddr = __get_free_pages(gfp | __GFP_ZERO, order);
-        if (!vaddr)
-                return NULL;
+        phys_addr_t paddr = page_to_phys(page);
 
-        /*
-         * we need to ensure that there are no cachelines in use,
-         * or worse dirty in this area.
-         */
-        flush_dcache_range(virt_to_phys((void *)vaddr),
-                                        virt_to_phys((void *)vaddr) + size);
+        flush_dcache_range(paddr, paddr + size);
+}
 
 #ifndef CONFIG_MMU
-        ret = (void *)vaddr;
-        /*
-         * Here's the magic!  Note if the uncached shadow is not implemented,
-         * it's up to the calling code to also test that condition and make
-         * other arranegments, such as manually flushing the cache and so on.
-         */
-# ifdef CONFIG_XILINX_UNCACHED_SHADOW
-        ret = (void *)((unsigned) ret | UNCACHED_SHADOW_MASK);
-# endif
-        if ((unsigned int)ret > cpuinfo.dcache_base &&
-                                (unsigned int)ret < cpuinfo.dcache_high)
-                pr_warn("ERROR: Your cache coherent area is CACHED!!!\n");
-
-        /* dma_handle is same as physical (shadowed) address */
-        *dma_handle = (dma_addr_t)ret;
+/*
+ * Consistent memory allocators. Used for DMA devices that want to share
+ * uncached memory with the processor core.  My crufty no-MMU approach is
+ * simple.  In the HW platform we can optionally mirror the DDR up above the
+ * processor cacheable region.  So, memory accessed in this mirror region will
+ * not be cached.  It's alloced from the same pool as normal memory, but the
+ * handle we return is shifted up into the uncached region.  This will no doubt
+ * cause big problems if memory allocated here is not also freed properly. -- JW
+ *
+ * I have to use dcache values because I can't relate on ram size:
+ */
+#ifdef CONFIG_XILINX_UNCACHED_SHADOW
+#define UNCACHED_SHADOW_MASK (cpuinfo.dcache_high - cpuinfo.dcache_base + 1)
 #else
-        /* Allocate some common virtual space to map the new pages. */
-        area = get_vm_area(size, VM_ALLOC);
-        if (!area) {
-                free_pages(vaddr, order);
-                return NULL;
-        }
-        va = (unsigned long) area->addr;
-        ret = (void *)va;
-
-        /* This gives us the real physical address of the first page. */
-        *dma_handle = pa = __virt_to_phys(vaddr);
-#endif
-
-        /*
-         * free wasted pages.  We skip the first page since we know
-         * that it will have count = 1 and won't require freeing.
-         * We also mark the pages in use as reserved so that
-         * remap_page_range works.
-         */
-        page = virt_to_page(vaddr);
-        end = page + (1 << order);
-
-        split_page(page, order);
-
-        for (i = 0; i < size && err == 0; i += PAGE_SIZE) {
-#ifdef CONFIG_MMU
-                /* MS: This is the whole magic - use cache inhibit pages */
-                err = map_page(va + i, pa + i, _PAGE_KERNEL | _PAGE_NO_CACHE);
-#endif
+#define UNCACHED_SHADOW_MASK 0
+#endif /* CONFIG_XILINX_UNCACHED_SHADOW */
 
-                SetPageReserved(page);
-                page++;
-        }
-
-        /* Free the otherwise unused pages. */
-        while (page < end) {
-                __free_page(page);
-                page++;
-        }
-
-        if (err) {
-                free_pages(vaddr, order);
-                return NULL;
-        }
-
-        return ret;
-}
-
-#ifdef CONFIG_MMU
-static pte_t *consistent_virt_to_pte(void *vaddr)
+void *uncached_kernel_address(void *ptr)
 {
-        unsigned long addr = (unsigned long)vaddr;
-
-        return pte_offset_kernel(pmd_offset(pgd_offset_k(addr), addr), addr);
-}
-
-long arch_dma_coherent_to_pfn(struct device *dev, void *vaddr,
-                dma_addr_t dma_addr)
-{
-        pte_t *ptep = consistent_virt_to_pte(vaddr);
-
-        if (pte_none(*ptep) || !pte_present(*ptep))
-                return 0;
+        unsigned long addr = (unsigned long)ptr;
 
-        return pte_pfn(*ptep);
+        addr |= UNCACHED_SHADOW_MASK;
+        if (addr > cpuinfo.dcache_base && addr < cpuinfo.dcache_high)
+                pr_warn("ERROR: Your cache coherent area is CACHED!!!\n");
+        return (void *)addr;
 }
-#endif
 
-/*
- * free page(s) as defined by the above mapping.
- */
-void arch_dma_free(struct device *dev, size_t size, void *vaddr,
-                dma_addr_t dma_addr, unsigned long attrs)
+void *cached_kernel_address(void *ptr)
 {
-        struct page *page;
-
-        if (in_interrupt())
-                BUG();
-
-        size = PAGE_ALIGN(size);
-
-#ifndef CONFIG_MMU
-        /* Clear SHADOW_MASK bit in address, and free as per usual */
-# ifdef CONFIG_XILINX_UNCACHED_SHADOW
-        vaddr = (void *)((unsigned)vaddr & ~UNCACHED_SHADOW_MASK);
-# endif
-        page = virt_to_page(vaddr);
-
-        do {
-                __free_reserved_page(page);
-                page++;
-        } while (size -= PAGE_SIZE);
-#else
-        do {
-                pte_t *ptep = consistent_virt_to_pte(vaddr);
-                unsigned long pfn;
-
-                if (!pte_none(*ptep) && pte_present(*ptep)) {
-                        pfn = pte_pfn(*ptep);
-                        pte_clear(&init_mm, (unsigned int)vaddr, ptep);
-                        if (pfn_valid(pfn)) {
-                                page = pfn_to_page(pfn);
-                                __free_reserved_page(page);
-                        }
-                }
-                vaddr += PAGE_SIZE;
-        } while (size -= PAGE_SIZE);
+        unsigned long addr = (unsigned long)ptr;
 
-        /* flush tlb */
-        flush_tlb_all();
-#endif
+        return (void *)(addr & ~UNCACHED_SHADOW_MASK);
 }
+#endif /* CONFIG_MMU */
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 436099883022..6f48649201c5 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -108,7 +108,6 @@ extern unsigned long PCIBIOS_MIN_MEM;
 
 #define HAVE_PCI_MMAP
 #define ARCH_GENERIC_PCI_MMAP_RESOURCE
-#define HAVE_ARCH_PCI_RESOURCE_TO_USER
 
 /*
  * Dynamic DMA mapping stuff.
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 2372d35533ad..327567b8f7d6 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -112,8 +112,6 @@ extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
                                          unsigned long size,
                                          pgprot_t prot);
 
-#define HAVE_ARCH_PCI_RESOURCE_TO_USER
-
 extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
 extern void pcibios_setup_bus_self(struct pci_bus *bus);
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 065ff14b76e1..1d93e55a2de1 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -10,6 +10,8 @@
 
 #include <linux/file.h>
 #include <linux/fs.h>
+#include <linux/fs_context.h>
+#include <linux/fs_parser.h>
 #include <linux/fsnotify.h>
 #include <linux/backing-dev.h>
 #include <linux/init.h>
@@ -20,7 +22,6 @@
 #include <linux/pagemap.h>
 #include <linux/poll.h>
 #include <linux/slab.h>
-#include <linux/parser.h>
 
 #include <asm/prom.h>
 #include <asm/spu.h>
@@ -30,7 +31,7 @@
 #include "spufs.h"
 
 struct spufs_sb_info {
-        int debug;
+        bool debug;
 };
 
 static struct kmem_cache *spufs_inode_cache;
@@ -574,16 +575,27 @@ long spufs_create(struct path *path, struct dentry *dentry,
 }
 
 /* File system initialization */
+struct spufs_fs_context {
+        kuid_t  uid;
+        kgid_t  gid;
+        umode_t mode;
+};
+
 enum {
-        Opt_uid, Opt_gid, Opt_mode, Opt_debug, Opt_err,
+        Opt_uid, Opt_gid, Opt_mode, Opt_debug,
+};
+
+static const struct fs_parameter_spec spufs_param_specs[] = {
+        fsparam_u32     ("gid",                         Opt_gid),
+        fsparam_u32oct  ("mode",                        Opt_mode),
+        fsparam_u32     ("uid",                         Opt_uid),
+        fsparam_flag    ("debug",                       Opt_debug),
+        {}
 };
 
-static const match_table_t spufs_tokens = {
-        { Opt_uid,   "uid=%d" },
-        { Opt_gid,   "gid=%d" },
-        { Opt_mode,  "mode=%o" },
-        { Opt_debug, "debug" },
-        { Opt_err,    NULL  },
+static const struct fs_parameter_description spufs_fs_parameters = {
+        .name           = "spufs",
+        .specs          = spufs_param_specs,
 };
 
 static int spufs_show_options(struct seq_file *m, struct dentry *root)
@@ -604,47 +616,41 @@ static int spufs_show_options(struct seq_file *m, struct dentry *root)
         return 0;
 }
 
-static int
-spufs_parse_options(struct super_block *sb, char *options, struct inode *root)
-{
-        char *p;
-        substring_t args[MAX_OPT_ARGS];
-
-        while ((p = strsep(&options, ",")) != NULL) {
-                int token, option;
-
-                if (!*p)
-                        continue;
-
-                token = match_token(p, spufs_tokens, args);
-                switch (token) {
-                case Opt_uid:
-                        if (match_int(&args[0], &option))
-                                return 0;
-                        root->i_uid = make_kuid(current_user_ns(), option);
-                        if (!uid_valid(root->i_uid))
-                                return 0;
-                        break;
-                case Opt_gid:
-                        if (match_int(&args[0], &option))
-                                return 0;
-                        root->i_gid = make_kgid(current_user_ns(), option);
-                        if (!gid_valid(root->i_gid))
-                                return 0;
-                        break;
-                case Opt_mode:
-                        if (match_octal(&args[0], &option))
-                                return 0;
-                        root->i_mode = option | S_IFDIR;
-                        break;
-                case Opt_debug:
-                        spufs_get_sb_info(sb)->debug = 1;
-                        break;
-                default:
-                        return 0;
-                }
+static int spufs_parse_param(struct fs_context *fc, struct fs_parameter *param)
+{
+        struct spufs_fs_context *ctx = fc->fs_private;
+        struct spufs_sb_info *sbi = fc->s_fs_info;
+        struct fs_parse_result result;
+        kuid_t uid;
+        kgid_t gid;
+        int opt;
+
+        opt = fs_parse(fc, &spufs_fs_parameters, param, &result);
+        if (opt < 0)
+                return opt;
+
+        switch (opt) {
+        case Opt_uid:
+                uid = make_kuid(current_user_ns(), result.uint_32);
+                if (!uid_valid(uid))
+                        return invalf(fc, "Unknown uid");
+                ctx->uid = uid;
+                break;
+        case Opt_gid:
+                gid = make_kgid(current_user_ns(), result.uint_32);
+                if (!gid_valid(gid))
+                        return invalf(fc, "Unknown gid");
+                ctx->gid = gid;
+                break;
+        case Opt_mode:
+                ctx->mode = result.uint_32 & S_IALLUGO;
+                break;
+        case Opt_debug:
+                sbi->debug = true;
+                break;
         }
-        return 1;
+
+        return 0;
 }
 
 static void spufs_exit_isolated_loader(void)
@@ -678,79 +684,98 @@ spufs_init_isolated_loader(void)
         printk(KERN_INFO "spufs: SPU isolation mode enabled\n");
 }
 
-static int
-spufs_create_root(struct super_block *sb, void *data)
+static int spufs_create_root(struct super_block *sb, struct fs_context *fc)
 {
+        struct spufs_fs_context *ctx = fc->fs_private;
         struct inode *inode;
-        int ret;
 
-        ret = -ENODEV;
         if (!spu_management_ops)
-                goto out;
+                return -ENODEV;
 
-        ret = -ENOMEM;
-        inode = spufs_new_inode(sb, S_IFDIR | 0775);
+        inode = spufs_new_inode(sb, S_IFDIR | ctx->mode);
         if (!inode)
-                goto out;
+                return -ENOMEM;
 
+        inode->i_uid = ctx->uid;
+        inode->i_gid = ctx->gid;
         inode->i_op = &simple_dir_inode_operations;
         inode->i_fop = &simple_dir_operations;
         SPUFS_I(inode)->i_ctx = NULL;
         inc_nlink(inode);
 
-        ret = -EINVAL;
-        if (!spufs_parse_options(sb, data, inode))
-                goto out_iput;
-
-        ret = -ENOMEM;
         sb->s_root = d_make_root(inode);
         if (!sb->s_root)
-                goto out;
-
+                return -ENOMEM;
         return 0;
-out_iput:
-        iput(inode);
-out:
-        return ret;
 }
 
-static int
-spufs_fill_super(struct super_block *sb, void *data, int silent)
-{
-        struct spufs_sb_info *info;
-        static const struct super_operations s_ops = {
-                .alloc_inode = spufs_alloc_inode,
-                .free_inode = spufs_free_inode,
-                .statfs = simple_statfs,
-                .evict_inode = spufs_evict_inode,
-                .show_options = spufs_show_options,
-        };
-
-        info = kzalloc(sizeof(*info), GFP_KERNEL);
-        if (!info)
-                return -ENOMEM;
+static const struct super_operations spufs_ops = {
+        .alloc_inode    = spufs_alloc_inode,
+        .free_inode     = spufs_free_inode,
+        .statfs         = simple_statfs,
+        .evict_inode    = spufs_evict_inode,
+        .show_options   = spufs_show_options,
+};
 
+static int spufs_fill_super(struct super_block *sb, struct fs_context *fc)
+{
         sb->s_maxbytes = MAX_LFS_FILESIZE;
         sb->s_blocksize = PAGE_SIZE;
         sb->s_blocksize_bits = PAGE_SHIFT;
         sb->s_magic = SPUFS_MAGIC;
-        sb->s_op = &s_ops;
-        sb->s_fs_info = info;
+        sb->s_op = &spufs_ops;
 
-        return spufs_create_root(sb, data);
+        return spufs_create_root(sb, fc);
+}
+
+static int spufs_get_tree(struct fs_context *fc)
+{
+        return get_tree_single(fc, spufs_fill_super);
 }
 
-static struct dentry *
-spufs_mount(struct file_system_type *fstype, int flags,
-                const char *name, void *data)
+static void spufs_free_fc(struct fs_context *fc)
 {
-        return mount_single(fstype, flags, data, spufs_fill_super);
+        kfree(fc->s_fs_info);
+}
+
+static const struct fs_context_operations spufs_context_ops = {
+        .free           = spufs_free_fc,
+        .parse_param    = spufs_parse_param,
+        .get_tree       = spufs_get_tree,
+};
+
+static int spufs_init_fs_context(struct fs_context *fc)
+{
+        struct spufs_fs_context *ctx;
+        struct spufs_sb_info *sbi;
+
+        ctx = kzalloc(sizeof(struct spufs_fs_context), GFP_KERNEL);
+        if (!ctx)
+                goto nomem;
+
+        sbi = kzalloc(sizeof(struct spufs_sb_info), GFP_KERNEL);
+        if (!sbi)
+                goto nomem_ctx;
+
+        ctx->uid = current_uid();
+        ctx->gid = current_gid();
+        ctx->mode = 0755;
+
+        fc->s_fs_info = sbi;
+        fc->ops = &spufs_context_ops;
+        return 0;
+
+nomem_ctx:
+        kfree(ctx);
+nomem:
+        return -ENOMEM;
 }
 
 static struct file_system_type spufs_type = {
         .owner = THIS_MODULE,
         .name = "spufs",
-        .mount = spufs_mount,
+        .init_fs_context = spufs_init_fs_context,
+        .parameters     = &spufs_fs_parameters,
         .kill_sb = kill_litter_super,
 };
 MODULE_ALIAS_FS("spufs");
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index a4418fc425b8..70139d0791b6 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -12,17 +12,17 @@
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/fs.h>
+#include <linux/fs_context.h>
+#include <linux/fs_parser.h>
 #include <linux/namei.h>
 #include <linux/vfs.h>
 #include <linux/slab.h>
 #include <linux/pagemap.h>
 #include <linux/time.h>
-#include <linux/parser.h>
 #include <linux/sysfs.h>
 #include <linux/init.h>
 #include <linux/kobject.h>
 #include <linux/seq_file.h>
-#include <linux/mount.h>
 #include <linux/uio.h>
 #include <asm/ebcdic.h>
 #include "hypfs.h"
@@ -207,52 +207,44 @@ static int hypfs_release(struct inode *inode, struct file *filp)
         return 0;
 }
 
-enum { opt_uid, opt_gid, opt_err };
+enum { Opt_uid, Opt_gid, };
 
-static const match_table_t hypfs_tokens = {
-        {opt_uid, "uid=%u"},
-        {opt_gid, "gid=%u"},
-        {opt_err, NULL}
+static const struct fs_parameter_spec hypfs_param_specs[] = {
+        fsparam_u32("gid", Opt_gid),
+        fsparam_u32("uid", Opt_uid),
+        {}
 };
 
-static int hypfs_parse_options(char *options, struct super_block *sb)
+static const struct fs_parameter_description hypfs_fs_parameters = {
+        .name           = "hypfs",
+        .specs          = hypfs_param_specs,
+};
+
+static int hypfs_parse_param(struct fs_context *fc, struct fs_parameter *param)
 {
-        char *str;
-        substring_t args[MAX_OPT_ARGS];
+        struct hypfs_sb_info *hypfs_info = fc->s_fs_info;
+        struct fs_parse_result result;
         kuid_t uid;
         kgid_t gid;
-
-        if (!options)
-                return 0;
-        while ((str = strsep(&options, ",")) != NULL) {
-                int token, option;
-                struct hypfs_sb_info *hypfs_info = sb->s_fs_info;
-
-                if (!*str)
-                        continue;
-                token = match_token(str, hypfs_tokens, args);
-                switch (token) {
-                case opt_uid:
-                        if (match_int(&args[0], &option))
-                                return -EINVAL;
-                        uid = make_kuid(current_user_ns(), option);
-                        if (!uid_valid(uid))
-                                return -EINVAL;
-                        hypfs_info->uid = uid;
-                        break;
-                case opt_gid:
-                        if (match_int(&args[0], &option))
-                                return -EINVAL;
-                        gid = make_kgid(current_user_ns(), option);
-                        if (!gid_valid(gid))
-                                return -EINVAL;
-                        hypfs_info->gid = gid;
-                        break;
-                case opt_err:
-                default:
-                        pr_err("%s is not a valid mount option\n", str);
-                        return -EINVAL;
-                }
+        int opt;
+
+        opt = fs_parse(fc, &hypfs_fs_parameters, param, &result);
+        if (opt < 0)
+                return opt;
+
+        switch (opt) {
+        case Opt_uid:
+                uid = make_kuid(current_user_ns(), result.uint_32);
+                if (!uid_valid(uid))
+                        return invalf(fc, "Unknown uid");
+                hypfs_info->uid = uid;
+                break;
+        case Opt_gid:
+                gid = make_kgid(current_user_ns(), result.uint_32);
+                if (!gid_valid(gid))
+                        return invalf(fc, "Unknown gid");
+                hypfs_info->gid = gid;
+                break;
         }
         return 0;
 }
@@ -266,26 +258,18 @@ static int hypfs_show_options(struct seq_file *s, struct dentry *root)
         return 0;
 }
 
-static int hypfs_fill_super(struct super_block *sb, void *data, int silent)
+static int hypfs_fill_super(struct super_block *sb, struct fs_context *fc)
 {
+        struct hypfs_sb_info *sbi = sb->s_fs_info;
         struct inode *root_inode;
-        struct dentry *root_dentry;
-        int rc = 0;
-        struct hypfs_sb_info *sbi;
+        struct dentry *root_dentry, *update_file;
+        int rc;
 
-        sbi = kzalloc(sizeof(struct hypfs_sb_info), GFP_KERNEL);
-        if (!sbi)
-                return -ENOMEM;
-        mutex_init(&sbi->lock);
-        sbi->uid = current_uid();
-        sbi->gid = current_gid();
-        sb->s_fs_info = sbi;
         sb->s_blocksize = PAGE_SIZE;
         sb->s_blocksize_bits = PAGE_SHIFT;
         sb->s_magic = HYPFS_MAGIC;
         sb->s_op = &hypfs_s_ops;
-        if (hypfs_parse_options(data, sb))
-                return -EINVAL;
+
         root_inode = hypfs_make_inode(sb, S_IFDIR | 0755);
         if (!root_inode)
                 return -ENOMEM;
@@ -300,18 +284,46 @@ static int hypfs_fill_super(struct super_block *sb, void *data, int silent)
                 rc = hypfs_diag_create_files(root_dentry);
         if (rc)
                 return rc;
-        sbi->update_file = hypfs_create_update_file(root_dentry);
-        if (IS_ERR(sbi->update_file))
-                return PTR_ERR(sbi->update_file);
+        update_file = hypfs_create_update_file(root_dentry);
+        if (IS_ERR(update_file))
+                return PTR_ERR(update_file);
+        sbi->update_file = update_file;
         hypfs_update_update(sb);
         pr_info("Hypervisor filesystem mounted\n");
         return 0;
 }
 
-static struct dentry *hypfs_mount(struct file_system_type *fst, int flags,
-                        const char *devname, void *data)
+static int hypfs_get_tree(struct fs_context *fc)
+{
+        return get_tree_single(fc, hypfs_fill_super);
+}
+
+static void hypfs_free_fc(struct fs_context *fc)
 {
-        return mount_single(fst, flags, data, hypfs_fill_super);
+        kfree(fc->s_fs_info);
+}
+
+static const struct fs_context_operations hypfs_context_ops = {
+        .free           = hypfs_free_fc,
+        .parse_param    = hypfs_parse_param,
+        .get_tree       = hypfs_get_tree,
+};
+
+static int hypfs_init_fs_context(struct fs_context *fc)
+{
+        struct hypfs_sb_info *sbi;
+
+        sbi = kzalloc(sizeof(struct hypfs_sb_info), GFP_KERNEL);
+        if (!sbi)
+                return -ENOMEM;
+
+        mutex_init(&sbi->lock);
+        sbi->uid = current_uid();
+        sbi->gid = current_gid();
+
+        fc->s_fs_info = sbi;
+        fc->ops = &hypfs_context_ops;
+        return 0;
 }
 
 static void hypfs_kill_super(struct super_block *sb)
@@ -442,7 +454,8 @@ static const struct file_operations hypfs_file_ops = {
 static struct file_system_type hypfs_type = {
         .owner          = THIS_MODULE,
         .name           = "s390_hypfs",
-        .mount          = hypfs_mount,
+        .init_fs_context = hypfs_init_fs_context,
+        .parameters     = &hypfs_fs_parameters,
         .kill_sb        = hypfs_kill_super
 };
 
diff --git a/arch/sparc/include/asm/pci.h b/arch/sparc/include/asm/pci.h
index cfec79bb1831..4deddf430e5d 100644
--- a/arch/sparc/include/asm/pci.h
+++ b/arch/sparc/include/asm/pci.h
@@ -38,8 +38,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 #define arch_can_pci_mmap_io()  1
 #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
 #define get_pci_unmapped_area get_fb_unmapped_area
-
-#define HAVE_ARCH_PCI_RESOURCE_TO_USER
 #endif /* CONFIG_SPARC64 */
 
 #if defined(CONFIG_SPARC64) || defined(CONFIG_LEON_PCI)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 314a187ed572..d1e666ef3fcc 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -15,7 +15,6 @@
 #include <linux/pm_runtime.h>
 #include <linux/pci.h>
 #include <linux/pci-acpi.h>
-#include <linux/pci-aspm.h>
 #include <linux/dmar.h>
 #include <linux/acpi.h>
 #include <linux/slab.h>
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index bdab5d9af8d2..80b850ef1bf6 100644
--- a/drivers/char/hw_random/core.c
+++ b/drivers/char/hw_random/core.c
@@ -68,7 +68,7 @@ static void add_early_randomness(struct hwrng *rng)
         size_t size = min_t(size_t, 16, rng_buffer_size());
 
         mutex_lock(&reading_mutex);
-        bytes_read = rng_get_data(rng, rng_buffer, size, 1);
+        bytes_read = rng_get_data(rng, rng_buffer, size, 0);
         mutex_unlock(&reading_mutex);
         if (bytes_read > 0)
                 add_device_randomness(rng_buffer, bytes_read);
diff --git a/drivers/char/xillybus/xillybus_pcie.c b/drivers/char/xillybus/xillybus_pcie.c
index 02c15952b103..18b0c392bc93 100644
--- a/drivers/char/xillybus/xillybus_pcie.c
+++ b/drivers/char/xillybus/xillybus_pcie.c
@@ -9,7 +9,6 @@
 
 #include <linux/module.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/slab.h>
 #include "xillybus.h"
 
diff --git a/drivers/crypto/hisilicon/sec/sec_algs.c b/drivers/crypto/hisilicon/sec/sec_algs.c
index e0508ea160f1..c27e7160d2df 100644
--- a/drivers/crypto/hisilicon/sec/sec_algs.c
+++ b/drivers/crypto/hisilicon/sec/sec_algs.c
@@ -153,6 +153,24 @@ static void sec_alg_skcipher_init_context(struct crypto_skcipher *atfm,
                                        ctx->cipher_alg);
 }
 
+static void sec_free_hw_sgl(struct sec_hw_sgl *hw_sgl,
+                            dma_addr_t psec_sgl, struct sec_dev_info *info)
+{
+        struct sec_hw_sgl *sgl_current, *sgl_next;
+        dma_addr_t sgl_next_dma;
+
+        sgl_current = hw_sgl;
+        while (sgl_current) {
+                sgl_next = sgl_current->next;
+                sgl_next_dma = sgl_current->next_sgl;
+
+                dma_pool_free(info->hw_sgl_pool, sgl_current, psec_sgl);
+
+                sgl_current = sgl_next;
+                psec_sgl = sgl_next_dma;
+        }
+}
+
 static int sec_alloc_and_fill_hw_sgl(struct sec_hw_sgl **sec_sgl,
                                      dma_addr_t *psec_sgl,
                                      struct scatterlist *sgl,
@@ -199,35 +217,12 @@ static int sec_alloc_and_fill_hw_sgl(struct sec_hw_sgl **sec_sgl,
         return 0;
 
 err_free_hw_sgls:
-        sgl_current = *sec_sgl;
-        while (sgl_current) {
-                sgl_next = sgl_current->next;
-                dma_pool_free(info->hw_sgl_pool, sgl_current,
-                              sgl_current->next_sgl);
-                sgl_current = sgl_next;
-        }
+        sec_free_hw_sgl(*sec_sgl, *psec_sgl, info);
         *psec_sgl = 0;
 
         return ret;
 }
 
-static void sec_free_hw_sgl(struct sec_hw_sgl *hw_sgl,
-                            dma_addr_t psec_sgl, struct sec_dev_info *info)
-{
-        struct sec_hw_sgl *sgl_current, *sgl_next;
-
-        if (!hw_sgl)
-                return;
-        sgl_current = hw_sgl;
-        while (sgl_current->next) {
-                sgl_next = sgl_current->next;
-                dma_pool_free(info->hw_sgl_pool, sgl_current,
-                              sgl_current->next_sgl);
-                sgl_current = sgl_next;
-        }
-        dma_pool_free(info->hw_sgl_pool, hw_sgl, psec_sgl);
-}
-
 static int sec_alg_skcipher_setkey(struct crypto_skcipher *tfm,
                                    const u8 *key, unsigned int keylen,
                                    enum sec_cipher_alg alg)
diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c b/drivers/crypto/hisilicon/zip/zip_crypto.c
index 5a3f84dcdcde..59023545a1c4 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -559,7 +559,7 @@ static int hisi_zip_acompress(struct acomp_req *acomp_req)
         struct hisi_zip_ctx *ctx = crypto_tfm_ctx(acomp_req->base.tfm);
         struct hisi_zip_qp_ctx *qp_ctx = &ctx->qp_ctx[QPC_COMP];
         struct hisi_zip_req *req;
-        size_t head_size;
+        int head_size;
         int ret;
 
         /* let's output compression head now */
@@ -567,7 +567,7 @@ static int hisi_zip_acompress(struct acomp_req *acomp_req)
         if (head_size < 0)
                 return -ENOMEM;
 
-        req = hisi_zip_create_req(acomp_req, qp_ctx, head_size, true);
+        req = hisi_zip_create_req(acomp_req, qp_ctx, (size_t)head_size, true);
         if (IS_ERR(req))
                 return PTR_ERR(req);
 
diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
index 6e0ca75585d4..1b2ee96c888d 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -785,7 +785,6 @@ static int hisi_zip_clear_vft_config(struct hisi_zip *hisi_zip)
 
 static int hisi_zip_sriov_enable(struct pci_dev *pdev, int max_vfs)
 {
-#ifdef CONFIG_PCI_IOV
         struct hisi_zip *hisi_zip = pci_get_drvdata(pdev);
         int pre_existing_vfs, num_vfs, ret;
 
@@ -815,9 +814,6 @@ static int hisi_zip_sriov_enable(struct pci_dev *pdev, int max_vfs)
         }
 
         return num_vfs;
-#else
-        return 0;
-#endif
 }
 
 static int hisi_zip_sriov_disable(struct pci_dev *pdev)
@@ -948,7 +944,8 @@ static struct pci_driver hisi_zip_pci_driver = {
         .id_table               = hisi_zip_dev_ids,
         .probe                  = hisi_zip_probe,
         .remove                 = hisi_zip_remove,
-        .sriov_configure        = hisi_zip_sriov_configure,
+        .sriov_configure        = IS_ENABLED(CONFIG_PCI_IOV) ?
+                                        hisi_zip_sriov_configure : 0,
         .err_handler            = &hisi_zip_err_handler,
 };
 
diff --git a/drivers/crypto/inside-secure/safexcel.c b/drivers/crypto/inside-secure/safexcel.c
index b456b85f46d3..4ab1bde8dd9b 100644
--- a/drivers/crypto/inside-secure/safexcel.c
+++ b/drivers/crypto/inside-secure/safexcel.c
@@ -1789,32 +1789,50 @@ static struct pci_driver safexcel_pci_driver = {
 };
 #endif
 
-static int __init safexcel_init(void)
-{
-        int rc;
-
+/* Unfortunately, we have to resort to global variables here */
+#if IS_ENABLED(CONFIG_PCI)
+int pcireg_rc = -EINVAL; /* Default safe value */
+#endif
 #if IS_ENABLED(CONFIG_OF)
-                /* Register platform driver */
-                platform_driver_register(&crypto_safexcel);
+int ofreg_rc = -EINVAL; /* Default safe value */
 #endif
 
+static int __init safexcel_init(void)
+{
 #if IS_ENABLED(CONFIG_PCI)
-                /* Register PCI driver */
-                rc = pci_register_driver(&safexcel_pci_driver);
+        /* Register PCI driver */
+        pcireg_rc = pci_register_driver(&safexcel_pci_driver);
 #endif
 
-        return 0;
+#if IS_ENABLED(CONFIG_OF)
+        /* Register platform driver */
+        ofreg_rc = platform_driver_register(&crypto_safexcel);
+ #if IS_ENABLED(CONFIG_PCI)
+        /* Return success if either PCI or OF registered OK */
+        return pcireg_rc ? ofreg_rc : 0;
+ #else
+        return ofreg_rc;
+ #endif
+#else
+ #if IS_ENABLED(CONFIG_PCI)
+        return pcireg_rc;
+ #else
+        return -EINVAL;
+ #endif
+#endif
 }
 
 static void __exit safexcel_exit(void)
 {
 #if IS_ENABLED(CONFIG_OF)
-                /* Unregister platform driver */
+        /* Unregister platform driver */
+        if (!ofreg_rc)
                 platform_driver_unregister(&crypto_safexcel);
 #endif
 
 #if IS_ENABLED(CONFIG_PCI)
-                /* Unregister PCI driver if successfully registered before */
+        /* Unregister PCI driver if successfully registered before */
+        if (!pcireg_rc)
                 pci_unregister_driver(&safexcel_pci_driver);
 #endif
 }
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index cb6c10b1bf36..56e3068c9947 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -3116,6 +3116,7 @@ static int talitos_remove(struct platform_device *ofdev)
                         break;
                 case CRYPTO_ALG_TYPE_AEAD:
                         crypto_unregister_aead(&t_alg->algt.alg.aead);
+                        break;
                 case CRYPTO_ALG_TYPE_AHASH:
                         crypto_unregister_ahash(&t_alg->algt.alg.hash);
                         break;
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index a958b9625bba..1ecb5124421c 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -273,6 +273,15 @@ config HID_CP2112
         and gpiochip to expose these functions of the CP2112. The
         customizable USB descriptor fields are exposed as sysfs attributes.
 
+config HID_CREATIVE_SB0540
+        tristate "Creative SB0540 infrared receiver"
+        depends on USB_HID
+        help
+        Support for Creative infrared SB0540-compatible remote controls, such
+        as the RM-1500 and RM-1800 remotes.
+
+        Say Y here if you want support for Creative SB0540 infrared receiver.
+
 config HID_CYPRESS
         tristate "Cypress mouse and barcode readers"
         depends on HID
diff --git a/drivers/hid/Makefile b/drivers/hid/Makefile
index cc5d827c9164..0c03308cfb08 100644
--- a/drivers/hid/Makefile
+++ b/drivers/hid/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_HID_ALPS)		+= hid-alps.o
 obj-$(CONFIG_HID_ACRUX)         += hid-axff.o
 obj-$(CONFIG_HID_APPLE)         += hid-apple.o
 obj-$(CONFIG_HID_APPLEIR)       += hid-appleir.o
+obj-$(CONFIG_HID_CREATIVE_SB0540)       += hid-creative-sb0540.o
 obj-$(CONFIG_HID_ASUS)          += hid-asus.o
 obj-$(CONFIG_HID_AUREAL)        += hid-aureal.o
 obj-$(CONFIG_HID_BELKIN)        += hid-belkin.o
diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c
index 81df62f48c4c..6ac8becc2372 100644
--- a/drivers/hid/hid-apple.c
+++ b/drivers/hid/hid-apple.c
@@ -54,7 +54,6 @@ MODULE_PARM_DESC(swap_opt_cmd, "Swap the Option (\"Alt\") and Command (\"Flag\")
 struct apple_sc {
         unsigned long quirks;
         unsigned int fn_on;
-        DECLARE_BITMAP(pressed_fn, KEY_CNT);
         DECLARE_BITMAP(pressed_numlock, KEY_CNT);
 };
 
@@ -181,6 +180,8 @@ static int hidinput_apple_event(struct hid_device *hid, struct input_dev *input,
 {
         struct apple_sc *asc = hid_get_drvdata(hid);
         const struct apple_key_translation *trans, *table;
+        bool do_translate;
+        u16 code = 0;
 
         if (usage->code == KEY_FN) {
                 asc->fn_on = !!value;
@@ -189,8 +190,6 @@ static int hidinput_apple_event(struct hid_device *hid, struct input_dev *input,
         }
 
         if (fnmode) {
-                int do_translate;
-
                 if (hid->product >= USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI &&
                                 hid->product <= USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS)
                         table = macbookair_fn_keys;
@@ -202,25 +201,33 @@ static int hidinput_apple_event(struct hid_device *hid, struct input_dev *input,
                 trans = apple_find_translation (table, usage->code);
 
                 if (trans) {
-                        if (test_bit(usage->code, asc->pressed_fn))
-                                do_translate = 1;
-                        else if (trans->flags & APPLE_FLAG_FKEY)
-                                do_translate = (fnmode == 2 && asc->fn_on) ||
-                                        (fnmode == 1 && !asc->fn_on);
-                        else
-                                do_translate = asc->fn_on;
-
-                        if (do_translate) {
-                                if (value)
-                                        set_bit(usage->code, asc->pressed_fn);
-                                else
-                                        clear_bit(usage->code, asc->pressed_fn);
-
-                                input_event(input, usage->type, trans->to,
-                                                value);
-
-                                return 1;
+                        if (test_bit(trans->from, input->key))
+                                code = trans->from;
+                        else if (test_bit(trans->to, input->key))
+                                code = trans->to;
+
+                        if (!code) {
+                                if (trans->flags & APPLE_FLAG_FKEY) {
+                                        switch (fnmode) {
+                                        case 1:
+                                                do_translate = !asc->fn_on;
+                                                break;
+                                        case 2:
+                                                do_translate = asc->fn_on;
+                                                break;
+                                        default:
+                                                /* should never happen */
+                                                do_translate = false;
+                                        }
+                                } else {
+                                        do_translate = asc->fn_on;
+                                }
+
+                                code = do_translate ? trans->to : trans->from;
                         }
+
+                        input_event(input, usage->type, code, value);
+                        return 1;
                 }
 
                 if (asc->quirks & APPLE_NUMLOCK_EMULATION &&
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index 210b81a56e1a..3eaee2c37931 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1311,8 +1311,8 @@ u32 hid_field_extract(const struct hid_device *hid, u8 *report,
                         unsigned offset, unsigned n)
 {
         if (n > 32) {
-                hid_warn(hid, "hid_field_extract() called with n (%d) > 32! (%s)\n",
-                         n, current->comm);
+                hid_warn_once(hid, "%s() called with n (%d) > 32! (%s)\n",
+                              __func__, n, current->comm);
                 n = 32;
         }
 
diff --git a/drivers/hid/hid-cougar.c b/drivers/hid/hid-cougar.c
index e0bb7b34f3a4..4ff3bc1d25e2 100644
--- a/drivers/hid/hid-cougar.c
+++ b/drivers/hid/hid-cougar.c
@@ -207,7 +207,7 @@ static int cougar_probe(struct hid_device *hdev,
         error = hid_parse(hdev);
         if (error) {
                 hid_err(hdev, "parse failed\n");
-                goto fail;
+                return error;
         }
 
         if (hdev->collection->usage == COUGAR_VENDOR_USAGE) {
@@ -219,7 +219,7 @@ static int cougar_probe(struct hid_device *hdev,
         error = hid_hw_start(hdev, connect_mask);
         if (error) {
                 hid_err(hdev, "hw start failed\n");
-                goto fail;
+                return error;
         }
 
         error = cougar_bind_shared_data(hdev, cougar);
@@ -249,8 +249,6 @@ static int cougar_probe(struct hid_device *hdev,
 
 fail_stop_and_cleanup:
         hid_hw_stop(hdev);
-fail:
-        hid_set_drvdata(hdev, NULL);
         return error;
 }
 
diff --git a/drivers/hid/hid-creative-sb0540.c b/drivers/hid/hid-creative-sb0540.c
new file mode 100644
index 000000000000..b4c8e7a5d3e0
--- /dev/null
+++ b/drivers/hid/hid-creative-sb0540.c
@@ -0,0 +1,268 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * HID driver for the Creative SB0540 receiver
+ *
+ * Copyright (C) 2019 Red Hat Inc. All Rights Reserved
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/hid.h>
+#include <linux/module.h>
+#include "hid-ids.h"
+
+MODULE_AUTHOR("Bastien Nocera <hadess@hadess.net>");
+MODULE_DESCRIPTION("HID Creative SB0540 receiver");
+MODULE_LICENSE("GPL");
+
+static const unsigned short creative_sb0540_key_table[] = {
+        KEY_POWER,
+        KEY_RESERVED,           /* text: 24bit */
+        KEY_RESERVED,           /* 24bit wheel up */
+        KEY_RESERVED,           /* 24bit wheel down */
+        KEY_RESERVED,           /* text: CMSS */
+        KEY_RESERVED,           /* CMSS wheel Up */
+        KEY_RESERVED,           /* CMSS wheel Down */
+        KEY_RESERVED,           /* text: EAX */
+        KEY_RESERVED,           /* EAX wheel up */
+        KEY_RESERVED,           /* EAX wheel down */
+        KEY_RESERVED,           /* text: 3D Midi */
+        KEY_RESERVED,           /* 3D Midi wheel up */
+        KEY_RESERVED,           /* 3D Midi wheel down */
+        KEY_MUTE,
+        KEY_VOLUMEUP,
+        KEY_VOLUMEDOWN,
+        KEY_UP,
+        KEY_LEFT,
+        KEY_RIGHT,
+        KEY_REWIND,
+        KEY_OK,
+        KEY_FASTFORWARD,
+        KEY_DOWN,
+        KEY_AGAIN,              /* text: Return, symbol: Jump to */
+        KEY_PLAY,               /* text: Start */
+        KEY_ESC,                /* text: Cancel */
+        KEY_RECORD,
+        KEY_OPTION,
+        KEY_MENU,               /* text: Display */
+        KEY_PREVIOUS,
+        KEY_PLAYPAUSE,
+        KEY_NEXT,
+        KEY_SLOW,
+        KEY_STOP,
+        KEY_NUMERIC_1,
+        KEY_NUMERIC_2,
+        KEY_NUMERIC_3,
+        KEY_NUMERIC_4,
+        KEY_NUMERIC_5,
+        KEY_NUMERIC_6,
+        KEY_NUMERIC_7,
+        KEY_NUMERIC_8,
+        KEY_NUMERIC_9,
+        KEY_NUMERIC_0
+};
+
+/*
+ * Codes and keys from lirc's
+ * remotes/creative/lircd.conf.alsa_usb
+ * order and size must match creative_sb0540_key_table[] above
+ */
+static const unsigned short creative_sb0540_codes[] = {
+        0x619E,
+        0x916E,
+        0x926D,
+        0x936C,
+        0x718E,
+        0x946B,
+        0x956A,
+        0x8C73,
+        0x9669,
+        0x9768,
+        0x9867,
+        0x9966,
+        0x9A65,
+        0x6E91,
+        0x629D,
+        0x639C,
+        0x7B84,
+        0x6B94,
+        0x728D,
+        0x8778,
+        0x817E,
+        0x758A,
+        0x8D72,
+        0x8E71,
+        0x8877,
+        0x7C83,
+        0x738C,
+        0x827D,
+        0x7689,
+        0x7F80,
+        0x7986,
+        0x7A85,
+        0x7D82,
+        0x857A,
+        0x8B74,
+        0x8F70,
+        0x906F,
+        0x8A75,
+        0x847B,
+        0x7887,
+        0x8976,
+        0x837C,
+        0x7788,
+        0x807F
+};
+
+struct creative_sb0540 {
+        struct input_dev *input_dev;
+        struct hid_device *hid;
+        unsigned short keymap[ARRAY_SIZE(creative_sb0540_key_table)];
+};
+
+static inline u64 reverse(u64 data, int bits)
+{
+        int i;
+        u64 c;
+
+        c = 0;
+        for (i = 0; i < bits; i++) {
+                c |= (u64) (((data & (((u64) 1) << i)) ? 1 : 0))
+                        << (bits - 1 - i);
+        }
+        return (c);
+}
+
+static int get_key(struct creative_sb0540 *creative_sb0540, u64 keycode)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(creative_sb0540_codes); i++) {
+                if (creative_sb0540_codes[i] == keycode)
+                        return creative_sb0540->keymap[i];
+        }
+
+        return 0;
+
+}
+
+static int creative_sb0540_raw_event(struct hid_device *hid,
+        struct hid_report *report, u8 *data, int len)
+{
+        struct creative_sb0540 *creative_sb0540 = hid_get_drvdata(hid);
+        u64 code, main_code;
+        int key;
+
+        if (len != 6)
+                return 0;
+
+        /* From daemons/hw_hiddev.c sb0540_rec() in lirc */
+        code = reverse(data[5], 8);
+        main_code = (code << 8) + ((~code) & 0xff);
+
+        /*
+         * Flip to get values in the same format as
+         * remotes/creative/lircd.conf.alsa_usb in lirc
+         */
+        main_code = ((main_code & 0xff) << 8) +
+                ((main_code & 0xff00) >> 8);
+
+        key = get_key(creative_sb0540, main_code);
+        if (key == 0 || key == KEY_RESERVED) {
+                hid_err(hid, "Could not get a key for main_code %llX\n",
+                        main_code);
+                return 0;
+        }
+
+        input_report_key(creative_sb0540->input_dev, key, 1);
+        input_report_key(creative_sb0540->input_dev, key, 0);
+        input_sync(creative_sb0540->input_dev);
+
+        /* let hidraw and hiddev handle the report */
+        return 0;
+}
+
+static int creative_sb0540_input_configured(struct hid_device *hid,
+                struct hid_input *hidinput)
+{
+        struct input_dev *input_dev = hidinput->input;
+        struct creative_sb0540 *creative_sb0540 = hid_get_drvdata(hid);
+        int i;
+
+        creative_sb0540->input_dev = input_dev;
+
+        input_dev->keycode = creative_sb0540->keymap;
+        input_dev->keycodesize = sizeof(unsigned short);
+        input_dev->keycodemax = ARRAY_SIZE(creative_sb0540->keymap);
+
+        input_dev->evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
+
+        memcpy(creative_sb0540->keymap, creative_sb0540_key_table,
+                sizeof(creative_sb0540->keymap));
+        for (i = 0; i < ARRAY_SIZE(creative_sb0540_key_table); i++)
+                set_bit(creative_sb0540->keymap[i], input_dev->keybit);
+        clear_bit(KEY_RESERVED, input_dev->keybit);
+
+        return 0;
+}
+
+static int creative_sb0540_input_mapping(struct hid_device *hid,
+                struct hid_input *hi, struct hid_field *field,
+                struct hid_usage *usage, unsigned long **bit, int *max)
+{
+        /*
+         * We are remapping the keys ourselves, so ignore the hid-input
+         * keymap processing.
+         */
+        return -1;
+}
+
+static int creative_sb0540_probe(struct hid_device *hid,
+                const struct hid_device_id *id)
+{
+        int ret;
+        struct creative_sb0540 *creative_sb0540;
+
+        creative_sb0540 = devm_kzalloc(&hid->dev,
+                sizeof(struct creative_sb0540), GFP_KERNEL);
+
+        if (!creative_sb0540)
+                return -ENOMEM;
+
+        creative_sb0540->hid = hid;
+
+        /* force input as some remotes bypass the input registration */
+        hid->quirks |= HID_QUIRK_HIDINPUT_FORCE;
+
+        hid_set_drvdata(hid, creative_sb0540);
+
+        ret = hid_parse(hid);
+        if (ret) {
+                hid_err(hid, "parse failed\n");
+                return ret;
+        }
+
+        ret = hid_hw_start(hid, HID_CONNECT_DEFAULT);
+        if (ret) {
+                hid_err(hid, "hw start failed\n");
+                return ret;
+        }
+
+        return ret;
+}
+
+static const struct hid_device_id creative_sb0540_devices[] = {
+        { HID_USB_DEVICE(USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_CREATIVE_SB0540) },
+        { }
+};
+MODULE_DEVICE_TABLE(hid, creative_sb0540_devices);
+
+static struct hid_driver creative_sb0540_driver = {
+        .name = "creative-sb0540",
+        .id_table = creative_sb0540_devices,
+        .raw_event = creative_sb0540_raw_event,
+        .input_configured = creative_sb0540_input_configured,
+        .probe = creative_sb0540_probe,
+        .input_mapping = creative_sb0540_input_mapping,
+};
+module_hid_driver(creative_sb0540_driver);
diff --git a/drivers/hid/hid-gfrm.c b/drivers/hid/hid-gfrm.c
index 86c317320bf2..699186ff2349 100644
--- a/drivers/hid/hid-gfrm.c
+++ b/drivers/hid/hid-gfrm.c
@@ -123,12 +123,6 @@ done:
         return ret;
 }
 
-static void gfrm_remove(struct hid_device *hdev)
-{
-        hid_hw_stop(hdev);
-        hid_set_drvdata(hdev, NULL);
-}
-
 static const struct hid_device_id gfrm_devices[] = {
         { HID_BLUETOOTH_DEVICE(0x58, 0x2000),
                 .driver_data = GFRM100 },
@@ -142,7 +136,6 @@ static struct hid_driver gfrm_driver = {
         .name = "gfrm",
         .id_table = gfrm_devices,
         .probe = gfrm_probe,
-        .remove = gfrm_remove,
         .input_mapping = gfrm_input_mapping,
         .raw_event = gfrm_raw_event,
         .input_configured = gfrm_input_configured,
diff --git a/drivers/hid/hid-hyperv.c b/drivers/hid/hid-hyperv.c
index 7795831d37c2..cc5b09b87ab0 100644
--- a/drivers/hid/hid-hyperv.c
+++ b/drivers/hid/hid-hyperv.c
@@ -104,8 +104,8 @@ struct synthhid_input_report {
 
 #pragma pack(pop)
 
-#define INPUTVSC_SEND_RING_BUFFER_SIZE          (10*PAGE_SIZE)
-#define INPUTVSC_RECV_RING_BUFFER_SIZE          (10*PAGE_SIZE)
+#define INPUTVSC_SEND_RING_BUFFER_SIZE          (40 * 1024)
+#define INPUTVSC_RECV_RING_BUFFER_SIZE          (40 * 1024)
 
 
 enum pipe_prot_msg_type {
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 0a00be19f7a0..76969a22b0f2 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -314,6 +314,7 @@
 #define USB_VENDOR_ID_CREATIVELABS      0x041e
 #define USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51      0x322c
 #define USB_DEVICE_ID_PRODIKEYS_PCMIDI  0x2801
+#define USB_DEVICE_ID_CREATIVE_SB0540   0x3100
 
 #define USB_VENDOR_ID_CVTOUCH           0x1ff7
 #define USB_DEVICE_ID_CVTOUCH_SCREEN    0x0013
@@ -568,6 +569,7 @@
 #define USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A   0x0b4a
 #define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE          0x134a
 #define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_094A     0x094a
+#define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0941     0x0941
 #define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0641     0x0641
 
 #define USB_VENDOR_ID_HUION             0x256c
@@ -769,7 +771,8 @@
 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER            0xc52f
 #define USB_DEVICE_ID_LOGITECH_UNIFYING_RECEIVER_2      0xc532
 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_2          0xc534
-#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED 0xc539
+#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1       0xc539
+#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_1     0xc53f
 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_POWERPLAY  0xc53a
 #define USB_DEVICE_ID_SPACETRAVELLER    0xc623
 #define USB_DEVICE_ID_SPACENAVIGATOR    0xc626
diff --git a/drivers/hid/hid-lenovo.c b/drivers/hid/hid-lenovo.c
index 364bc7f11d9d..96fa2a2c2cd3 100644
--- a/drivers/hid/hid-lenovo.c
+++ b/drivers/hid/hid-lenovo.c
@@ -866,8 +866,6 @@ static void lenovo_remove_tpkbd(struct hid_device *hdev)
 
         led_classdev_unregister(&data_pointer->led_micmute);
         led_classdev_unregister(&data_pointer->led_mute);
-
-        hid_set_drvdata(hdev, NULL);
 }
 
 static void lenovo_remove_cptkbd(struct hid_device *hdev)
diff --git a/drivers/hid/hid-lg.c b/drivers/hid/hid-lg.c
index 5008a3dc28f4..0dc7cdfc56f7 100644
--- a/drivers/hid/hid-lg.c
+++ b/drivers/hid/hid-lg.c
@@ -818,7 +818,7 @@ static int lg_probe(struct hid_device *hdev, const struct hid_device_id *id)
 
                 if (!buf) {
                         ret = -ENOMEM;
-                        goto err_free;
+                        goto err_stop;
                 }
 
                 ret = hid_hw_raw_request(hdev, buf[0], buf, sizeof(cbuf),
@@ -850,9 +850,12 @@ static int lg_probe(struct hid_device *hdev, const struct hid_device_id *id)
                 ret = lg4ff_init(hdev);
 
         if (ret)
-                goto err_free;
+                goto err_stop;
 
         return 0;
+
+err_stop:
+        hid_hw_stop(hdev);
 err_free:
         kfree(drv_data);
         return ret;
@@ -863,8 +866,7 @@ static void lg_remove(struct hid_device *hdev)
         struct lg_drv_data *drv_data = hid_get_drvdata(hdev);
         if (drv_data->quirks & LG_FF4)
                 lg4ff_deinit(hdev);
-        else
-                hid_hw_stop(hdev);
+        hid_hw_stop(hdev);
         kfree(drv_data);
 }
 
diff --git a/drivers/hid/hid-lg4ff.c b/drivers/hid/hid-lg4ff.c
index cefba038520c..03f0220062ca 100644
--- a/drivers/hid/hid-lg4ff.c
+++ b/drivers/hid/hid-lg4ff.c
@@ -1477,7 +1477,6 @@ int lg4ff_deinit(struct hid_device *hid)
                 }
         }
 #endif
-        hid_hw_stop(hid);
         drv_data->device_props = NULL;
 
         kfree(entry);
diff --git a/drivers/hid/hid-logitech-dj.c b/drivers/hid/hid-logitech-dj.c
index cc47f948c1d0..bb50d6e7745b 100644
--- a/drivers/hid/hid-logitech-dj.c
+++ b/drivers/hid/hid-logitech-dj.c
@@ -380,9 +380,9 @@ static const char consumer_descriptor[] = {
         0x75, 0x10,             /* REPORT_SIZE (16)                    */
         0x95, 0x02,             /* REPORT_COUNT (2)                    */
         0x15, 0x01,             /* LOGICAL_MIN (1)                     */
-        0x26, 0x8C, 0x02,       /* LOGICAL_MAX (652)                   */
+        0x26, 0xFF, 0x02,       /* LOGICAL_MAX (767)                   */
         0x19, 0x01,             /* USAGE_MIN (1)                       */
-        0x2A, 0x8C, 0x02,       /* USAGE_MAX (652)                     */
+        0x2A, 0xFF, 0x02,       /* USAGE_MAX (767)                     */
         0x81, 0x00,             /* INPUT (Data Ary Abs)                */
         0xC0,                   /* END_COLLECTION                      */
 };                              /*                                     */
@@ -959,6 +959,7 @@ static void logi_hidpp_recv_queue_notif(struct hid_device *hdev,
                 break;
         case 0x07:
                 device_type = "eQUAD step 4 Gaming";
+                logi_hidpp_dev_conn_notif_equad(hdev, hidpp_report, &workitem);
                 break;
         case 0x08:
                 device_type = "eQUAD step 4 for gamepads";
@@ -968,7 +969,12 @@ static void logi_hidpp_recv_queue_notif(struct hid_device *hdev,
                 logi_hidpp_dev_conn_notif_equad(hdev, hidpp_report, &workitem);
                 break;
         case 0x0c:
-                device_type = "eQUAD Lightspeed";
+                device_type = "eQUAD Lightspeed 1";
+                logi_hidpp_dev_conn_notif_equad(hdev, hidpp_report, &workitem);
+                workitem.reports_supported |= STD_KEYBOARD;
+                break;
+        case 0x0d:
+                device_type = "eQUAD Lightspeed 1_1";
                 logi_hidpp_dev_conn_notif_equad(hdev, hidpp_report, &workitem);
                 workitem.reports_supported |= STD_KEYBOARD;
                 break;
@@ -1734,14 +1740,14 @@ static int logi_dj_probe(struct hid_device *hdev,
                 if (retval < 0) {
                         hid_err(hdev, "%s: logi_dj_recv_query_paired_devices error:%d\n",
                                 __func__, retval);
-                        goto logi_dj_recv_query_paired_devices_failed;
+                        /*
+                         * This can happen with a KVM, let the probe succeed,
+                         * logi_dj_recv_queue_unknown_work will retry later.
+                         */
                 }
         }
 
-        return retval;
-
-logi_dj_recv_query_paired_devices_failed:
-        hid_hw_close(hdev);
+        return 0;
 
 llopen_failed:
 switch_to_dj_mode_fail:
@@ -1832,9 +1838,17 @@ static const struct hid_device_id logi_dj_receivers[] = {
           HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
                          USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_2),
          .driver_data = recvr_type_hidpp},
+        { /* Logitech G700(s) receiver (0xc531) */
+          HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
+                0xc531),
+         .driver_data = recvr_type_gaming_hidpp},
         { /* Logitech lightspeed receiver (0xc539) */
           HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
-                USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED),
+                USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1),
+         .driver_data = recvr_type_gaming_hidpp},
+        { /* Logitech lightspeed receiver (0xc53f) */
+          HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
+                USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_1),
          .driver_data = recvr_type_gaming_hidpp},
         { /* Logitech 27 MHz HID++ 1.0 receiver (0xc513) */
           HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_MX3000_RECEIVER),
diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
index b603c14d043b..3cfeb1629f79 100644
--- a/drivers/hid/hid-multitouch.c
+++ b/drivers/hid/hid-multitouch.c
@@ -68,6 +68,7 @@ MODULE_LICENSE("GPL");
 #define MT_QUIRK_STICKY_FINGERS         BIT(16)
 #define MT_QUIRK_ASUS_CUSTOM_UP         BIT(17)
 #define MT_QUIRK_WIN8_PTP_BUTTONS       BIT(18)
+#define MT_QUIRK_SEPARATE_APP_REPORT    BIT(19)
 
 #define MT_INPUTMODE_TOUCHSCREEN        0x02
 #define MT_INPUTMODE_TOUCHPAD           0x03
@@ -103,6 +104,7 @@ struct mt_usages {
 struct mt_application {
         struct list_head list;
         unsigned int application;
+        unsigned int report_id;
         struct list_head mt_usages;     /* mt usages list */
 
         __s32 quirks;
@@ -203,6 +205,7 @@ static void mt_post_parse(struct mt_device *td, struct mt_application *app);
 #define MT_CLS_VTL                              0x0110
 #define MT_CLS_GOOGLE                           0x0111
 #define MT_CLS_RAZER_BLADE_STEALTH              0x0112
+#define MT_CLS_SMART_TECH                       0x0113
 
 #define MT_DEFAULT_MAXCONTACT   10
 #define MT_MAX_MAXCONTACT       250
@@ -263,7 +266,8 @@ static const struct mt_class mt_classes[] = {
                         MT_QUIRK_HOVERING |
                         MT_QUIRK_CONTACT_CNT_ACCURATE |
                         MT_QUIRK_STICKY_FINGERS |
-                        MT_QUIRK_WIN8_PTP_BUTTONS },
+                        MT_QUIRK_WIN8_PTP_BUTTONS,
+                .export_all_inputs = true },
         { .name = MT_CLS_EXPORT_ALL_INPUTS,
                 .quirks = MT_QUIRK_ALWAYS_VALID |
                         MT_QUIRK_CONTACT_CNT_ACCURATE,
@@ -353,6 +357,12 @@ static const struct mt_class mt_classes[] = {
                         MT_QUIRK_CONTACT_CNT_ACCURATE |
                         MT_QUIRK_WIN8_PTP_BUTTONS,
         },
+        { .name = MT_CLS_SMART_TECH,
+                .quirks = MT_QUIRK_ALWAYS_VALID |
+                        MT_QUIRK_IGNORE_DUPLICATES |
+                        MT_QUIRK_CONTACT_CNT_ACCURATE |
+                        MT_QUIRK_SEPARATE_APP_REPORT,
+        },
         { }
 };
 
@@ -509,8 +519,9 @@ static struct mt_usages *mt_allocate_usage(struct hid_device *hdev,
 }
 
 static struct mt_application *mt_allocate_application(struct mt_device *td,
-                                                      unsigned int application)
+                                                      struct hid_report *report)
 {
+        unsigned int application = report->application;
         struct mt_application *mt_application;
 
         mt_application = devm_kzalloc(&td->hdev->dev, sizeof(*mt_application),
@@ -535,6 +546,7 @@ static struct mt_application *mt_allocate_application(struct mt_device *td,
         mt_application->scantime = DEFAULT_ZERO;
         mt_application->raw_cc = DEFAULT_ZERO;
         mt_application->quirks = td->mtclass.quirks;
+        mt_application->report_id = report->id;
 
         list_add_tail(&mt_application->list, &td->applications);
 
@@ -542,19 +554,23 @@ static struct mt_application *mt_allocate_application(struct mt_device *td,
 }
 
 static struct mt_application *mt_find_application(struct mt_device *td,
-                                                  unsigned int application)
+                                                  struct hid_report *report)
 {
+        unsigned int application = report->application;
         struct mt_application *tmp, *mt_application = NULL;
 
         list_for_each_entry(tmp, &td->applications, list) {
                 if (application == tmp->application) {
-                        mt_application = tmp;
-                        break;
+                        if (!(td->mtclass.quirks & MT_QUIRK_SEPARATE_APP_REPORT) ||
+                            tmp->report_id == report->id) {
+                                mt_application = tmp;
+                                break;
+                        }
                 }
         }
 
         if (!mt_application)
-                mt_application = mt_allocate_application(td, application);
+                mt_application = mt_allocate_application(td, report);
 
         return mt_application;
 }
@@ -571,7 +587,7 @@ static struct mt_report_data *mt_allocate_report_data(struct mt_device *td,
                 return NULL;
 
         rdata->report = report;
-        rdata->application = mt_find_application(td, report->application);
+        rdata->application = mt_find_application(td, report);
 
         if (!rdata->application) {
                 devm_kfree(&td->hdev->dev, rdata);
@@ -1561,6 +1577,9 @@ static int mt_input_configured(struct hid_device *hdev, struct hid_input *hi)
         case HID_VD_ASUS_CUSTOM_MEDIA_KEYS:
                 suffix = "Custom Media Keys";
                 break;
+        case HID_DG_PEN:
+                suffix = "Stylus";
+                break;
         default:
                 suffix = "UNKNOWN";
                 break;
@@ -2022,6 +2041,10 @@ static const struct hid_device_id mt_devices[] = {
                 HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8,
                         USB_VENDOR_ID_SYNAPTICS, 0x8323) },
 
+        /* Smart Tech panels */
+        { .driver_data = MT_CLS_SMART_TECH,
+                MT_USB_DEVICE(0x0b8c, 0x0092)},
+
         /* Stantum panels */
         { .driver_data = MT_CLS_CONFIDENCE,
                 MT_USB_DEVICE(USB_VENDOR_ID_STANTUM_STM,
diff --git a/drivers/hid/hid-picolcd_core.c b/drivers/hid/hid-picolcd_core.c
index 5f7a39a5d4af..1b5c63241af0 100644
--- a/drivers/hid/hid-picolcd_core.c
+++ b/drivers/hid/hid-picolcd_core.c
@@ -534,8 +534,7 @@ static int picolcd_probe(struct hid_device *hdev,
         data = kzalloc(sizeof(struct picolcd_data), GFP_KERNEL);
         if (data == NULL) {
                 hid_err(hdev, "can't allocate space for Minibox PicoLCD device data\n");
-                error = -ENOMEM;
-                goto err_no_cleanup;
+                return -ENOMEM;
         }
 
         spin_lock_init(&data->lock);
@@ -597,9 +596,6 @@ err_cleanup_hid_hw:
         hid_hw_stop(hdev);
 err_cleanup_data:
         kfree(data);
-err_no_cleanup:
-        hid_set_drvdata(hdev, NULL);
-
         return error;
 }
 
@@ -635,7 +631,6 @@ static void picolcd_remove(struct hid_device *hdev)
         picolcd_exit_cir(data);
         picolcd_exit_keys(data);
 
-        hid_set_drvdata(hdev, NULL);
         mutex_destroy(&data->mutex);
         /* Finally, clean up the picolcd data itself */
         kfree(data);
diff --git a/drivers/hid/hid-prodikeys.c b/drivers/hid/hid-prodikeys.c
index 21544ebff855..5a3b3d974d84 100644
--- a/drivers/hid/hid-prodikeys.c
+++ b/drivers/hid/hid-prodikeys.c
@@ -551,10 +551,14 @@ static void pcmidi_setup_extra_keys(
 
 static int pcmidi_set_operational(struct pcmidi_snd *pm)
 {
+        int rc;
+
         if (pm->ifnum != 1)
                 return 0; /* only set up ONCE for interace 1 */
 
-        pcmidi_get_output_report(pm);
+        rc = pcmidi_get_output_report(pm);
+        if (rc < 0)
+                return rc;
         pcmidi_submit_output_report(pm, 0xc1);
         return 0;
 }
@@ -683,7 +687,11 @@ static int pcmidi_snd_initialise(struct pcmidi_snd *pm)
         spin_lock_init(&pm->rawmidi_in_lock);
 
         init_sustain_timers(pm);
-        pcmidi_set_operational(pm);
+        err = pcmidi_set_operational(pm);
+        if (err < 0) {
+                pk_error("failed to find output report\n");
+                goto fail_register;
+        }
 
         /* register it */
         err = snd_card_register(card);
diff --git a/drivers/hid/hid-quirks.c b/drivers/hid/hid-quirks.c
index 166f41f3173b..c50bcd967d99 100644
--- a/drivers/hid/hid-quirks.c
+++ b/drivers/hid/hid-quirks.c
@@ -92,6 +92,7 @@ static const struct hid_device_id hid_quirks[] = {
         { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A), HID_QUIRK_ALWAYS_POLL },
         { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL },
         { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_094A), HID_QUIRK_ALWAYS_POLL },
+        { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0941), HID_QUIRK_ALWAYS_POLL },
         { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0641), HID_QUIRK_ALWAYS_POLL },
         { HID_USB_DEVICE(USB_VENDOR_ID_IDEACOM, USB_DEVICE_ID_IDEACOM_IDC6680), HID_QUIRK_MULTI_INPUT },
         { HID_USB_DEVICE(USB_VENDOR_ID_INNOMEDIA, USB_DEVICE_ID_INNEX_GENESIS_ATARI), HID_QUIRK_MULTI_INPUT },
diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c
index be92a6f79687..94c7398b5c27 100644
--- a/drivers/hid/hid-sensor-hub.c
+++ b/drivers/hid/hid-sensor-hub.c
@@ -742,7 +742,6 @@ static void sensor_hub_remove(struct hid_device *hdev)
         }
         spin_unlock_irqrestore(&data->lock, flags);
         mfd_remove_devices(&hdev->dev);
-        hid_set_drvdata(hdev, NULL);
         mutex_destroy(&data->mutex);
 }
 
diff --git a/drivers/hid/hid-sony.c b/drivers/hid/hid-sony.c
index 49dd2d905c7f..73c0f7a95e2d 100644
--- a/drivers/hid/hid-sony.c
+++ b/drivers/hid/hid-sony.c
@@ -2811,7 +2811,6 @@ err_stop:
         sony_cancel_work_sync(sc);
         sony_remove_dev_list(sc);
         sony_release_device_id(sc);
-        hid_hw_stop(hdev);
         return ret;
 }
 
@@ -2876,6 +2875,7 @@ static int sony_probe(struct hid_device *hdev, const struct hid_device_id *id)
          */
         if (!(hdev->claimed & HID_CLAIMED_INPUT)) {
                 hid_err(hdev, "failed to claim input\n");
+                hid_hw_stop(hdev);
                 return -ENODEV;
         }
 
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c
index 006bd6f4f653..bbc6ec1aa5cb 100644
--- a/drivers/hid/hidraw.c
+++ b/drivers/hid/hidraw.c
@@ -252,7 +252,7 @@ static __poll_t hidraw_poll(struct file *file, poll_table *wait)
 
         poll_wait(file, &list->hidraw->wait, wait);
         if (list->head != list->tail)
-                return EPOLLIN | EPOLLRDNORM;
+                return EPOLLIN | EPOLLRDNORM | EPOLLOUT;
         if (!list->hidraw->exist)
                 return EPOLLERR | EPOLLHUP;
         return 0;
@@ -370,7 +370,7 @@ static long hidraw_ioctl(struct file *file, unsigned int cmd,
 
         mutex_lock(&minors_lock);
         dev = hidraw_table[minor];
-        if (!dev) {
+        if (!dev || !dev->exist) {
                 ret = -ENODEV;
                 goto out;
         }
diff --git a/drivers/hid/i2c-hid/i2c-hid-core.c b/drivers/hid/i2c-hid/i2c-hid-core.c
index 90164fed08d3..2a7c6e33bb1c 100644
--- a/drivers/hid/i2c-hid/i2c-hid-core.c
+++ b/drivers/hid/i2c-hid/i2c-hid-core.c
@@ -169,9 +169,7 @@ static const struct i2c_hid_quirks {
         __u16 idProduct;
         __u32 quirks;
 } i2c_hid_quirks[] = {
-        { USB_VENDOR_ID_WEIDA, USB_DEVICE_ID_WEIDA_8752,
-                I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV },
-        { USB_VENDOR_ID_WEIDA, USB_DEVICE_ID_WEIDA_8755,
+        { USB_VENDOR_ID_WEIDA, HID_ANY_ID,
                 I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV },
         { I2C_VENDOR_ID_HANTICK, I2C_PRODUCT_ID_HANTICK_5288,
                 I2C_HID_QUIRK_NO_IRQ_AFTER_RESET |
diff --git a/drivers/hid/intel-ish-hid/ipc/hw-ish.h b/drivers/hid/intel-ish-hid/ipc/hw-ish.h
index 5792a104000a..6c1e6110867f 100644
--- a/drivers/hid/intel-ish-hid/ipc/hw-ish.h
+++ b/drivers/hid/intel-ish-hid/ipc/hw-ish.h
@@ -78,5 +78,6 @@ irqreturn_t ish_irq_handler(int irq, void *dev_id);
 struct ishtp_device *ish_dev_init(struct pci_dev *pdev);
 int ish_hw_start(struct ishtp_device *dev);
 void ish_device_disable(struct ishtp_device *dev);
+int ish_disable_dma(struct ishtp_device *dev);
 
 #endif /* _ISHTP_HW_ISH_H_ */
diff --git a/drivers/hid/intel-ish-hid/ipc/ipc.c b/drivers/hid/intel-ish-hid/ipc/ipc.c
index 18fe8af89aad..8f8dfdf64833 100644
--- a/drivers/hid/intel-ish-hid/ipc/ipc.c
+++ b/drivers/hid/intel-ish-hid/ipc/ipc.c
@@ -672,7 +672,7 @@ eoi:
  *
  * Return: 0 for success else error code.
  */
-static int ish_disable_dma(struct ishtp_device *dev)
+int ish_disable_dma(struct ishtp_device *dev)
 {
         unsigned int    dma_delay;
 
diff --git a/drivers/hid/intel-ish-hid/ipc/pci-ish.c b/drivers/hid/intel-ish-hid/ipc/pci-ish.c
index 279567baca3d..784dcc8c7022 100644
--- a/drivers/hid/intel-ish-hid/ipc/pci-ish.c
+++ b/drivers/hid/intel-ish-hid/ipc/pci-ish.c
@@ -14,6 +14,7 @@
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/sched.h>
+#include <linux/suspend.h>
 #include <linux/interrupt.h>
 #include <linux/workqueue.h>
 #define CREATE_TRACE_POINTS
@@ -98,6 +99,11 @@ static const struct pci_device_id ish_invalid_pci_ids[] = {
         {}
 };
 
+static inline bool ish_should_enter_d0i3(struct pci_dev *pdev)
+{
+        return !pm_suspend_via_firmware() || pdev->device == CHV_DEVICE_ID;
+}
+
 /**
  * ish_probe() - PCI driver probe callback
  * @pdev:       pci device
@@ -148,7 +154,6 @@ static int ish_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         /* mapping IO device memory */
         hw->mem_addr = pcim_iomap_table(pdev)[0];
         ishtp->pdev = pdev;
-        pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
 
         /* request and enable interrupt */
         ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
@@ -185,7 +190,6 @@ static void ish_remove(struct pci_dev *pdev)
         struct ishtp_device *ishtp_dev = pci_get_drvdata(pdev);
 
         ishtp_bus_remove_all_clients(ishtp_dev, false);
-        pdev->dev_flags &= ~PCI_DEV_FLAGS_NO_D3;
         ish_device_disable(ishtp_dev);
 }
 
@@ -207,17 +211,13 @@ static void __maybe_unused ish_resume_handler(struct work_struct *work)
 {
         struct pci_dev *pdev = to_pci_dev(ish_resume_device);
         struct ishtp_device *dev = pci_get_drvdata(pdev);
-        uint32_t fwsts;
         int ret;
 
-        /* Get ISH FW status */
-        fwsts = IPC_GET_ISH_FWSTS(dev->ops->get_fw_status(dev));
+        /* Check the NO_D3 flag to distinguish the resume paths */
+        if (pdev->dev_flags & PCI_DEV_FLAGS_NO_D3) {
+                pdev->dev_flags &= ~PCI_DEV_FLAGS_NO_D3;
+                disable_irq_wake(pdev->irq);
 
-        /*
-         * If currently, in ISH FW, sensor app is loaded or beyond that,
-         * it means ISH isn't powered off, in this case, send a resume message.
-         */
-        if (fwsts >= FWSTS_SENSOR_APP_LOADED) {
                 ishtp_send_resume(dev);
 
                 /* Waiting to get resume response */
@@ -225,16 +225,20 @@ static void __maybe_unused ish_resume_handler(struct work_struct *work)
                         ret = wait_event_interruptible_timeout(dev->resume_wait,
                                 !dev->resume_flag,
                                 msecs_to_jiffies(WAIT_FOR_RESUME_ACK_MS));
-        }
 
-        /*
-         * If in ISH FW, sensor app isn't loaded yet, or no resume response.
-         * That means this platform is not S0ix compatible, or something is
-         * wrong with ISH FW. So on resume, full reboot of ISH processor will
-         * happen, so need to go through init sequence again.
-         */
-        if (dev->resume_flag)
+                /*
+                 * If the flag is not cleared, something is wrong with ISH FW.
+                 * So on resume, need to go through init sequence again.
+                 */
+                if (dev->resume_flag)
+                        ish_init(dev);
+        } else {
+                /*
+                 * Resume from the D3, full reboot of ISH processor will happen,
+                 * so need to go through init sequence again.
+                 */
                 ish_init(dev);
+        }
 }
 
 /**
@@ -250,23 +254,43 @@ static int __maybe_unused ish_suspend(struct device *device)
         struct pci_dev *pdev = to_pci_dev(device);
         struct ishtp_device *dev = pci_get_drvdata(pdev);
 
-        enable_irq_wake(pdev->irq);
-        /*
-         * If previous suspend hasn't been asnwered then ISH is likely dead,
-         * don't attempt nested notification
-         */
-        if (dev->suspend_flag)
-                return  0;
-
-        dev->resume_flag = 0;
-        dev->suspend_flag = 1;
-        ishtp_send_suspend(dev);
-
-        /* 25 ms should be enough for live ISH to flush all IPC buf */
-        if (dev->suspend_flag)
-                wait_event_interruptible_timeout(dev->suspend_wait,
-                                                 !dev->suspend_flag,
-                                                  msecs_to_jiffies(25));
+        if (ish_should_enter_d0i3(pdev)) {
+                /*
+                 * If previous suspend hasn't been asnwered then ISH is likely
+                 * dead, don't attempt nested notification
+                 */
+                if (dev->suspend_flag)
+                        return  0;
+
+                dev->resume_flag = 0;
+                dev->suspend_flag = 1;
+                ishtp_send_suspend(dev);
+
+                /* 25 ms should be enough for live ISH to flush all IPC buf */
+                if (dev->suspend_flag)
+                        wait_event_interruptible_timeout(dev->suspend_wait,
+                                        !dev->suspend_flag,
+                                        msecs_to_jiffies(25));
+
+                if (dev->suspend_flag) {
+                        /*
+                         * It looks like FW halt, clear the DMA bit, and put
+                         * ISH into D3, and FW would reset on resume.
+                         */
+                        ish_disable_dma(dev);
+                } else {
+                        /* Set the NO_D3 flag, the ISH would enter D0i3 */
+                        pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
+
+                        enable_irq_wake(pdev->irq);
+                }
+        } else {
+                /*
+                 * Clear the DMA bit before putting ISH into D3,
+                 * or ISH FW would reset automatically.
+                 */
+                ish_disable_dma(dev);
+        }
 
         return 0;
 }
@@ -288,7 +312,6 @@ static int __maybe_unused ish_resume(struct device *device)
         ish_resume_device = device;
         dev->resume_flag = 1;
 
-        disable_irq_wake(pdev->irq);
         schedule_work(&resume_work);
 
         return 0;
diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c
index 4e11cc6fc34b..1f9bc4483465 100644
--- a/drivers/hid/usbhid/hiddev.c
+++ b/drivers/hid/usbhid/hiddev.c
@@ -428,7 +428,7 @@ static __poll_t hiddev_poll(struct file *file, poll_table *wait)
 
         poll_wait(file, &list->hiddev->wait, wait);
         if (list->head != list->tail)
-                return EPOLLIN | EPOLLRDNORM;
+                return EPOLLIN | EPOLLRDNORM | EPOLLOUT;
         if (!list->hiddev->exist)
                 return EPOLLERR | EPOLLHUP;
         return 0;
diff --git a/drivers/hid/wacom_sys.c b/drivers/hid/wacom_sys.c
index 53bddb50aeba..5ded94b7bf68 100644
--- a/drivers/hid/wacom_sys.c
+++ b/drivers/hid/wacom_sys.c
@@ -88,7 +88,7 @@ static void wacom_wac_queue_flush(struct hid_device *hdev,
 }
 
 static int wacom_wac_pen_serial_enforce(struct hid_device *hdev,
-                struct hid_report *report, u8 *raw_data, int size)
+                struct hid_report *report, u8 *raw_data, int report_size)
 {
         struct wacom *wacom = hid_get_drvdata(hdev);
         struct wacom_wac *wacom_wac = &wacom->wacom_wac;
@@ -149,7 +149,8 @@ static int wacom_wac_pen_serial_enforce(struct hid_device *hdev,
         if (flush)
                 wacom_wac_queue_flush(hdev, &wacom_wac->pen_fifo);
         else if (insert)
-                wacom_wac_queue_insert(hdev, &wacom_wac->pen_fifo, raw_data, size);
+                wacom_wac_queue_insert(hdev, &wacom_wac->pen_fifo,
+                                       raw_data, report_size);
 
         return insert && !flush;
 }
@@ -2176,7 +2177,7 @@ static void wacom_update_name(struct wacom *wacom, const char *suffix)
 {
         struct wacom_wac *wacom_wac = &wacom->wacom_wac;
         struct wacom_features *features = &wacom_wac->features;
-        char name[WACOM_NAME_MAX];
+        char name[WACOM_NAME_MAX - 20]; /* Leave some room for suffixes */
 
         /* Generic devices name unspecified */
         if ((features->type == HID_GENERIC) && !strcmp("Wacom HID", features->name)) {
@@ -2718,14 +2719,12 @@ static int wacom_probe(struct hid_device *hdev,
         wacom_wac->features = *((struct wacom_features *)id->driver_data);
         features = &wacom_wac->features;
 
-        if (features->check_for_hid_type && features->hid_type != hdev->type) {
-                error = -ENODEV;
-                goto fail;
-        }
+        if (features->check_for_hid_type && features->hid_type != hdev->type)
+                return -ENODEV;
 
         error = kfifo_alloc(&wacom_wac->pen_fifo, WACOM_PKGLEN_MAX, GFP_KERNEL);
         if (error)
-                goto fail;
+                return error;
 
         wacom_wac->hid_data.inputmode = -1;
         wacom_wac->mode_report = -1;
@@ -2743,12 +2742,12 @@ static int wacom_probe(struct hid_device *hdev,
         error = hid_parse(hdev);
         if (error) {
                 hid_err(hdev, "parse failed\n");
-                goto fail;
+                return error;
         }
 
         error = wacom_parse_and_register(wacom, false);
         if (error)
-                goto fail;
+                return error;
 
         if (hdev->bus == BUS_BLUETOOTH) {
                 error = device_create_file(&hdev->dev, &dev_attr_speed);
@@ -2759,10 +2758,6 @@ static int wacom_probe(struct hid_device *hdev,
         }
 
         return 0;
-
-fail:
-        hid_set_drvdata(hdev, NULL);
-        return error;
 }
 
 static void wacom_remove(struct hid_device *hdev)
@@ -2791,8 +2786,6 @@ static void wacom_remove(struct hid_device *hdev)
                 wacom_release_resources(wacom);
 
         kfifo_free(&wacom_wac->pen_fifo);
-
-        hid_set_drvdata(hdev, NULL);
 }
 
 #ifdef CONFIG_PM
diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
index 1713235d28cb..2b0a5b8ca6e6 100644
--- a/drivers/hid/wacom_wac.c
+++ b/drivers/hid/wacom_wac.c
@@ -251,7 +251,7 @@ static int wacom_dtu_irq(struct wacom_wac *wacom)
 
 static int wacom_dtus_irq(struct wacom_wac *wacom)
 {
-        char *data = wacom->data;
+        unsigned char *data = wacom->data;
         struct input_dev *input = wacom->pen_input;
         unsigned short prox, pressure = 0;
 
@@ -483,6 +483,8 @@ static int wacom_intuos_pad(struct wacom_wac *wacom)
         int ring1 = 0, ring2 = 0;
         int strip1 = 0, strip2 = 0;
         bool prox = false;
+        bool wrench = false, keyboard = false, mute_touch = false, menu = false,
+             info = false;
 
         /* pad packets. Works as a second tool and is always in prox */
         if (!(data[0] == WACOM_REPORT_INTUOSPAD || data[0] == WACOM_REPORT_INTUOS5PAD ||
@@ -512,10 +514,32 @@ static int wacom_intuos_pad(struct wacom_wac *wacom)
                 keys = ((data[3] & 0x1C) ? 1<<2 : 0) |
                        ((data[4] & 0xE0) ? 1<<1 : 0) |
                        ((data[4] & 0x07) ? 1<<0 : 0);
+                keyboard = !!(data[4] & 0xE0);
+                info = !!(data[3] & 0x1C);
+
+                if (features->oPid) {
+                        mute_touch = !!(data[4] & 0x07);
+                        if (mute_touch)
+                                wacom->shared->is_touch_on =
+                                        !wacom->shared->is_touch_on;
+                } else {
+                        wrench = !!(data[4] & 0x07);
+                }
         } else if (features->type == WACOM_27QHD) {
                 nkeys = 3;
                 keys = data[2] & 0x07;
 
+                wrench = !!(data[2] & 0x01);
+                keyboard = !!(data[2] & 0x02);
+
+                if (features->oPid) {
+                        mute_touch = !!(data[2] & 0x04);
+                        if (mute_touch)
+                                wacom->shared->is_touch_on =
+                                        !wacom->shared->is_touch_on;
+                } else {
+                        menu = !!(data[2] & 0x04);
+                }
                 input_report_abs(input, ABS_X, be16_to_cpup((__be16 *)&data[4]));
                 input_report_abs(input, ABS_Y, be16_to_cpup((__be16 *)&data[6]));
                 input_report_abs(input, ABS_Z, be16_to_cpup((__be16 *)&data[8]));
@@ -561,6 +585,9 @@ static int wacom_intuos_pad(struct wacom_wac *wacom)
                         if (features->type == WACOM_22HD) {
                                 nkeys = 3;
                                 keys = data[9] & 0x07;
+
+                                info = !!(data[9] & 0x01);
+                                wrench = !!(data[9] & 0x02);
                         }
                 } else {
                         buttons = ((data[6] & 0x10) << 5)  |
@@ -572,7 +599,7 @@ static int wacom_intuos_pad(struct wacom_wac *wacom)
                 strip2 = ((data[3] & 0x1f) << 8) | data[4];
         }
 
-        prox = (buttons & ~(~0 << nbuttons)) | (keys & ~(~0 << nkeys)) |
+        prox = (buttons & ~(~0U << nbuttons)) | (keys & ~(~0U << nkeys)) |
                (ring1 & 0x80) | (ring2 & 0x80) | strip1 | strip2;
 
         wacom_report_numbered_buttons(input, nbuttons, buttons);
@@ -580,6 +607,18 @@ static int wacom_intuos_pad(struct wacom_wac *wacom)
         for (i = 0; i < nkeys; i++)
                 input_report_key(input, KEY_PROG1 + i, keys & (1 << i));
 
+        input_report_key(input, KEY_BUTTONCONFIG, wrench);
+        input_report_key(input, KEY_ONSCREEN_KEYBOARD, keyboard);
+        input_report_key(input, KEY_CONTROLPANEL, menu);
+        input_report_key(input, KEY_INFO, info);
+
+        if (wacom->shared && wacom->shared->touch_input) {
+                input_report_switch(wacom->shared->touch_input,
+                                    SW_MUTE_DEVICE,
+                                    !wacom->shared->is_touch_on);
+                input_sync(wacom->shared->touch_input);
+        }
+
         input_report_abs(input, ABS_RX, strip1);
         input_report_abs(input, ABS_RY, strip2);
 
@@ -1483,6 +1522,12 @@ static int wacom_24hdt_irq(struct wacom_wac *wacom)
         int byte_per_packet = WACOM_BYTES_PER_24HDT_PACKET;
         int y_offset = 2;
 
+        if (wacom->shared->has_mute_touch_switch &&
+            !wacom->shared->is_touch_on) {
+                if (!wacom->shared->touch_down)
+                        return 0;
+        }
+
         if (wacom->features.type == WACOM_27QHDT) {
                 current_num_contacts = data[63];
                 num_contacts_left = 10;
@@ -2051,14 +2096,14 @@ static void wacom_wac_pad_event(struct hid_device *hdev, struct hid_field *field
                     (hdev->product == 0x34d || hdev->product == 0x34e ||  /* MobileStudio Pro */
                      hdev->product == 0x357 || hdev->product == 0x358 ||  /* Intuos Pro 2 */
                      hdev->product == 0x392 ||                            /* Intuos Pro 2 */
-                     hdev->product == 0x399)) {                           /* MobileStudio Pro */
+                     hdev->product == 0x398 || hdev->product == 0x399)) { /* MobileStudio Pro */
                         value = (field->logical_maximum - value);
 
                         if (hdev->product == 0x357 || hdev->product == 0x358 ||
                             hdev->product == 0x392)
                                 value = wacom_offset_rotation(input, usage, value, 3, 16);
                         else if (hdev->product == 0x34d || hdev->product == 0x34e ||
-                                 hdev->product == 0x399)
+                                 hdev->product == 0x398 || hdev->product == 0x399)
                                 value = wacom_offset_rotation(input, usage, value, 1, 2);
                 }
                 else {
@@ -3815,6 +3860,14 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev,
                 /* fall through */
 
         case WACOM_27QHDT:
+                if (wacom_wac->shared->touch->product == 0x32C ||
+                    wacom_wac->shared->touch->product == 0xF6) {
+                        input_dev->evbit[0] |= BIT_MASK(EV_SW);
+                        __set_bit(SW_MUTE_DEVICE, input_dev->swbit);
+                        wacom_wac->shared->has_mute_touch_switch = true;
+                }
+                /* fall through */
+
         case MTSCREEN:
         case MTTPC:
         case MTTPC_B:
@@ -4050,6 +4103,12 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev,
                 __set_bit(KEY_PROG2, input_dev->keybit);
                 __set_bit(KEY_PROG3, input_dev->keybit);
 
+                __set_bit(KEY_ONSCREEN_KEYBOARD, input_dev->keybit);
+                __set_bit(KEY_INFO, input_dev->keybit);
+
+                if (!features->oPid)
+                        __set_bit(KEY_BUTTONCONFIG, input_dev->keybit);
+
                 input_set_abs_params(input_dev, ABS_WHEEL, 0, 71, 0, 0);
                 input_set_abs_params(input_dev, ABS_THROTTLE, 0, 71, 0, 0);
                 break;
@@ -4058,6 +4117,12 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev,
                 __set_bit(KEY_PROG1, input_dev->keybit);
                 __set_bit(KEY_PROG2, input_dev->keybit);
                 __set_bit(KEY_PROG3, input_dev->keybit);
+
+                __set_bit(KEY_ONSCREEN_KEYBOARD, input_dev->keybit);
+                __set_bit(KEY_BUTTONCONFIG, input_dev->keybit);
+
+                if (!features->oPid)
+                        __set_bit(KEY_CONTROLPANEL, input_dev->keybit);
                 input_set_abs_params(input_dev, ABS_X, -2048, 2048, 0, 0);
                 input_abs_set_res(input_dev, ABS_X, 1024); /* points/g */
                 input_set_abs_params(input_dev, ABS_Y, -2048, 2048, 0, 0);
@@ -4071,6 +4136,9 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev,
                 __set_bit(KEY_PROG1, input_dev->keybit);
                 __set_bit(KEY_PROG2, input_dev->keybit);
                 __set_bit(KEY_PROG3, input_dev->keybit);
+
+                __set_bit(KEY_BUTTONCONFIG, input_dev->keybit);
+                __set_bit(KEY_INFO, input_dev->keybit);
                 /* fall through */
 
         case WACOM_21UX2:
diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c
index addcef50df7a..8eb167540b4f 100644
--- a/drivers/hv/channel_mgmt.c
+++ b/drivers/hv/channel_mgmt.c
@@ -407,7 +407,15 @@ void hv_process_channel_removal(struct vmbus_channel *channel)
                 cpumask_clear_cpu(channel->target_cpu,
                                   &primary_channel->alloced_cpus_in_node);
 
-        vmbus_release_relid(channel->offermsg.child_relid);
+        /*
+         * Upon suspend, an in-use hv_sock channel is marked as "rescinded" and
+         * the relid is invalidated; after hibernation, when the user-space app
+         * destroys the channel, the relid is INVALID_RELID, and in this case
+         * it's unnecessary and unsafe to release the old relid, since the same
+         * relid can refer to a completely different channel now.
+         */
+        if (channel->offermsg.child_relid != INVALID_RELID)
+                vmbus_release_relid(channel->offermsg.child_relid);
 
         free_channel(channel);
 }
@@ -545,6 +553,10 @@ static void vmbus_process_offer(struct vmbus_channel *newchannel)
 
         mutex_lock(&vmbus_connection.channel_mutex);
 
+        /* Remember the channels that should be cleaned up upon suspend. */
+        if (is_hvsock_channel(newchannel) || is_sub_channel(newchannel))
+                atomic_inc(&vmbus_connection.nr_chan_close_on_suspend);
+
         /*
          * Now that we have acquired the channel_mutex,
          * we can release the potentially racing rescind thread.
@@ -847,6 +859,67 @@ void vmbus_initiate_unload(bool crash)
                 vmbus_wait_for_unload();
 }
 
+static void check_ready_for_resume_event(void)
+{
+        /*
+         * If all the old primary channels have been fixed up, then it's safe
+         * to resume.
+         */
+        if (atomic_dec_and_test(&vmbus_connection.nr_chan_fixup_on_resume))
+                complete(&vmbus_connection.ready_for_resume_event);
+}
+
+static void vmbus_setup_channel_state(struct vmbus_channel *channel,
+                                      struct vmbus_channel_offer_channel *offer)
+{
+        /*
+         * Setup state for signalling the host.
+         */
+        channel->sig_event = VMBUS_EVENT_CONNECTION_ID;
+
+        if (vmbus_proto_version != VERSION_WS2008) {
+                channel->is_dedicated_interrupt =
+                                (offer->is_dedicated_interrupt != 0);
+                channel->sig_event = offer->connection_id;
+        }
+
+        memcpy(&channel->offermsg, offer,
+               sizeof(struct vmbus_channel_offer_channel));
+        channel->monitor_grp = (u8)offer->monitorid / 32;
+        channel->monitor_bit = (u8)offer->monitorid % 32;
+}
+
+/*
+ * find_primary_channel_by_offer - Get the channel object given the new offer.
+ * This is only used in the resume path of hibernation.
+ */
+static struct vmbus_channel *
+find_primary_channel_by_offer(const struct vmbus_channel_offer_channel *offer)
+{
+        struct vmbus_channel *channel = NULL, *iter;
+        const guid_t *inst1, *inst2;
+
+        /* Ignore sub-channel offers. */
+        if (offer->offer.sub_channel_index != 0)
+                return NULL;
+
+        mutex_lock(&vmbus_connection.channel_mutex);
+
+        list_for_each_entry(iter, &vmbus_connection.chn_list, listentry) {
+                inst1 = &iter->offermsg.offer.if_instance;
+                inst2 = &offer->offer.if_instance;
+
+                if (guid_equal(inst1, inst2)) {
+                        channel = iter;
+                        break;
+                }
+        }
+
+        mutex_unlock(&vmbus_connection.channel_mutex);
+
+        return channel;
+}
+
 /*
  * vmbus_onoffer - Handler for channel offers from vmbus in parent partition.
  *
@@ -854,12 +927,58 @@ void vmbus_initiate_unload(bool crash)
 static void vmbus_onoffer(struct vmbus_channel_message_header *hdr)
 {
         struct vmbus_channel_offer_channel *offer;
-        struct vmbus_channel *newchannel;
+        struct vmbus_channel *oldchannel, *newchannel;
+        size_t offer_sz;
 
         offer = (struct vmbus_channel_offer_channel *)hdr;
 
         trace_vmbus_onoffer(offer);
 
+        oldchannel = find_primary_channel_by_offer(offer);
+
+        if (oldchannel != NULL) {
+                atomic_dec(&vmbus_connection.offer_in_progress);
+
+                /*
+                 * We're resuming from hibernation: all the sub-channel and
+                 * hv_sock channels we had before the hibernation should have
+                 * been cleaned up, and now we must be seeing a re-offered
+                 * primary channel that we had before the hibernation.
+                 */
+
+                WARN_ON(oldchannel->offermsg.child_relid != INVALID_RELID);
+                /* Fix up the relid. */
+                oldchannel->offermsg.child_relid = offer->child_relid;
+
+                offer_sz = sizeof(*offer);
+                if (memcmp(offer, &oldchannel->offermsg, offer_sz) == 0) {
+                        check_ready_for_resume_event();
+                        return;
+                }
+
+                /*
+                 * This is not an error, since the host can also change the
+                 * other field(s) of the offer, e.g. on WS RS5 (Build 17763),
+                 * the offer->connection_id of the Mellanox VF vmbus device
+                 * can change when the host reoffers the device upon resume.
+                 */
+                pr_debug("vmbus offer changed: relid=%d\n",
+                         offer->child_relid);
+
+                print_hex_dump_debug("Old vmbus offer: ", DUMP_PREFIX_OFFSET,
+                                     16, 4, &oldchannel->offermsg, offer_sz,
+                                     false);
+                print_hex_dump_debug("New vmbus offer: ", DUMP_PREFIX_OFFSET,
+                                     16, 4, offer, offer_sz, false);
+
+                /* Fix up the old channel. */
+                vmbus_setup_channel_state(oldchannel, offer);
+
+                check_ready_for_resume_event();
+
+                return;
+        }
+
         /* Allocate the channel object and save this offer. */
         newchannel = alloc_channel();
         if (!newchannel) {
@@ -869,25 +988,21 @@ static void vmbus_onoffer(struct vmbus_channel_message_header *hdr)
                 return;
         }
 
-        /*
-         * Setup state for signalling the host.
-         */
-        newchannel->sig_event = VMBUS_EVENT_CONNECTION_ID;
-
-        if (vmbus_proto_version != VERSION_WS2008) {
-                newchannel->is_dedicated_interrupt =
-                                (offer->is_dedicated_interrupt != 0);
-                newchannel->sig_event = offer->connection_id;
-        }
-
-        memcpy(&newchannel->offermsg, offer,
-               sizeof(struct vmbus_channel_offer_channel));
-        newchannel->monitor_grp = (u8)offer->monitorid / 32;
-        newchannel->monitor_bit = (u8)offer->monitorid % 32;
+        vmbus_setup_channel_state(newchannel, offer);
 
         vmbus_process_offer(newchannel);
 }
 
+static void check_ready_for_suspend_event(void)
+{
+        /*
+         * If all the sub-channels or hv_sock channels have been cleaned up,
+         * then it's safe to suspend.
+         */
+        if (atomic_dec_and_test(&vmbus_connection.nr_chan_close_on_suspend))
+                complete(&vmbus_connection.ready_for_suspend_event);
+}
+
 /*
  * vmbus_onoffer_rescind - Rescind offer handler.
  *
@@ -898,6 +1013,7 @@ static void vmbus_onoffer_rescind(struct vmbus_channel_message_header *hdr)
         struct vmbus_channel_rescind_offer *rescind;
         struct vmbus_channel *channel;
         struct device *dev;
+        bool clean_up_chan_for_suspend;
 
         rescind = (struct vmbus_channel_rescind_offer *)hdr;
 
@@ -937,6 +1053,8 @@ static void vmbus_onoffer_rescind(struct vmbus_channel_message_header *hdr)
                 return;
         }
 
+        clean_up_chan_for_suspend = is_hvsock_channel(channel) ||
+                                    is_sub_channel(channel);
         /*
          * Before setting channel->rescind in vmbus_rescind_cleanup(), we
          * should make sure the channel callback is not running any more.
@@ -962,6 +1080,10 @@ static void vmbus_onoffer_rescind(struct vmbus_channel_message_header *hdr)
         if (channel->device_obj) {
                 if (channel->chn_rescind_callback) {
                         channel->chn_rescind_callback(channel);
+
+                        if (clean_up_chan_for_suspend)
+                                check_ready_for_suspend_event();
+
                         return;
                 }
                 /*
@@ -994,6 +1116,11 @@ static void vmbus_onoffer_rescind(struct vmbus_channel_message_header *hdr)
                 }
                 mutex_unlock(&vmbus_connection.channel_mutex);
         }
+
+        /* The "channel" may have been freed. Do not access it any longer. */
+
+        if (clean_up_chan_for_suspend)
+                check_ready_for_suspend_event();
 }
 
 void vmbus_hvsock_device_unregister(struct vmbus_channel *channel)
diff --git a/drivers/hv/connection.c b/drivers/hv/connection.c
index 09829e15d4a0..6e4c015783ff 100644
--- a/drivers/hv/connection.c
+++ b/drivers/hv/connection.c
@@ -26,6 +26,11 @@
 struct vmbus_connection vmbus_connection = {
         .conn_state             = DISCONNECTED,
         .next_gpadl_handle      = ATOMIC_INIT(0xE1E10),
+
+        .ready_for_suspend_event= COMPLETION_INITIALIZER(
+                                  vmbus_connection.ready_for_suspend_event),
+        .ready_for_resume_event = COMPLETION_INITIALIZER(
+                                  vmbus_connection.ready_for_resume_event),
 };
 EXPORT_SYMBOL_GPL(vmbus_connection);
 
@@ -59,8 +64,7 @@ static __u32 vmbus_get_next_version(__u32 current_version)
         }
 }
 
-static int vmbus_negotiate_version(struct vmbus_channel_msginfo *msginfo,
-                                        __u32 version)
+int vmbus_negotiate_version(struct vmbus_channel_msginfo *msginfo, u32 version)
 {
         int ret = 0;
         unsigned int cur_cpu;
diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c
index 6188fb7dda42..fcc52797c169 100644
--- a/drivers/hv/hv.c
+++ b/drivers/hv/hv.c
@@ -154,7 +154,7 @@ void hv_synic_free(void)
  * retrieve the initialized message and event pages.  Otherwise, we create and
  * initialize the message and event pages.
  */
-int hv_synic_init(unsigned int cpu)
+void hv_synic_enable_regs(unsigned int cpu)
 {
         struct hv_per_cpu_context *hv_cpu
                 = per_cpu_ptr(hv_context.cpu_context, cpu);
@@ -196,6 +196,11 @@ int hv_synic_init(unsigned int cpu)
         sctrl.enable = 1;
 
         hv_set_synic_state(sctrl.as_uint64);
+}
+
+int hv_synic_init(unsigned int cpu)
+{
+        hv_synic_enable_regs(cpu);
 
         hv_stimer_init(cpu);
 
@@ -205,20 +210,45 @@ int hv_synic_init(unsigned int cpu)
 /*
  * hv_synic_cleanup - Cleanup routine for hv_synic_init().
  */
-int hv_synic_cleanup(unsigned int cpu)
+void hv_synic_disable_regs(unsigned int cpu)
 {
         union hv_synic_sint shared_sint;
         union hv_synic_simp simp;
         union hv_synic_siefp siefp;
         union hv_synic_scontrol sctrl;
+
+        hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
+
+        shared_sint.masked = 1;
+
+        /* Need to correctly cleanup in the case of SMP!!! */
+        /* Disable the interrupt */
+        hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
+
+        hv_get_simp(simp.as_uint64);
+        simp.simp_enabled = 0;
+        simp.base_simp_gpa = 0;
+
+        hv_set_simp(simp.as_uint64);
+
+        hv_get_siefp(siefp.as_uint64);
+        siefp.siefp_enabled = 0;
+        siefp.base_siefp_gpa = 0;
+
+        hv_set_siefp(siefp.as_uint64);
+
+        /* Disable the global synic bit */
+        hv_get_synic_state(sctrl.as_uint64);
+        sctrl.enable = 0;
+        hv_set_synic_state(sctrl.as_uint64);
+}
+
+int hv_synic_cleanup(unsigned int cpu)
+{
         struct vmbus_channel *channel, *sc;
         bool channel_found = false;
         unsigned long flags;
 
-        hv_get_synic_state(sctrl.as_uint64);
-        if (sctrl.enable != 1)
-                return -EFAULT;
-
         /*
          * Search for channels which are bound to the CPU we're about to
          * cleanup. In case we find one and vmbus is still connected we need to
@@ -249,29 +279,7 @@ int hv_synic_cleanup(unsigned int cpu)
 
         hv_stimer_cleanup(cpu);
 
-        hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
-
-        shared_sint.masked = 1;
-
-        /* Need to correctly cleanup in the case of SMP!!! */
-        /* Disable the interrupt */
-        hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
-
-        hv_get_simp(simp.as_uint64);
-        simp.simp_enabled = 0;
-        simp.base_simp_gpa = 0;
-
-        hv_set_simp(simp.as_uint64);
-
-        hv_get_siefp(siefp.as_uint64);
-        siefp.siefp_enabled = 0;
-        siefp.base_siefp_gpa = 0;
-
-        hv_set_siefp(siefp.as_uint64);
-
-        /* Disable the global synic bit */
-        sctrl.enable = 0;
-        hv_set_synic_state(sctrl.as_uint64);
+        hv_synic_disable_regs(cpu);
 
         return 0;
 }
diff --git a/drivers/hv/hv_balloon.c b/drivers/hv/hv_balloon.c
index 6fb4ea5f0304..34bd73526afd 100644
--- a/drivers/hv/hv_balloon.c
+++ b/drivers/hv/hv_balloon.c
@@ -494,7 +494,7 @@ enum hv_dm_state {
 
 
 static __u8 recv_buffer[PAGE_SIZE];
-static __u8 *send_buffer;
+static __u8 balloon_up_send_buffer[PAGE_SIZE];
 #define PAGES_IN_2M     512
 #define HA_CHUNK (32 * 1024)
 
@@ -1292,8 +1292,8 @@ static void balloon_up(struct work_struct *dummy)
         }
 
         while (!done) {
-                bl_resp = (struct dm_balloon_response *)send_buffer;
-                memset(send_buffer, 0, PAGE_SIZE);
+                memset(balloon_up_send_buffer, 0, PAGE_SIZE);
+                bl_resp = (struct dm_balloon_response *)balloon_up_send_buffer;
                 bl_resp->hdr.type = DM_BALLOON_RESPONSE;
                 bl_resp->hdr.size = sizeof(struct dm_balloon_response);
                 bl_resp->more_pages = 1;
@@ -1564,58 +1564,18 @@ static void balloon_onchannelcallback(void *context)
 
 }
 
-static int balloon_probe(struct hv_device *dev,
-                        const struct hv_vmbus_device_id *dev_id)
+static int balloon_connect_vsp(struct hv_device *dev)
 {
-        int ret;
-        unsigned long t;
         struct dm_version_request version_req;
         struct dm_capabilities cap_msg;
-
-#ifdef CONFIG_MEMORY_HOTPLUG
-        do_hot_add = hot_add;
-#else
-        do_hot_add = false;
-#endif
-
-        /*
-         * First allocate a send buffer.
-         */
-
-        send_buffer = kmalloc(PAGE_SIZE, GFP_KERNEL);
-        if (!send_buffer)
-                return -ENOMEM;
+        unsigned long t;
+        int ret;
 
         ret = vmbus_open(dev->channel, dm_ring_size, dm_ring_size, NULL, 0,
-                        balloon_onchannelcallback, dev);
-
+                         balloon_onchannelcallback, dev);
         if (ret)
-                goto probe_error0;
+                return ret;
 
-        dm_device.dev = dev;
-        dm_device.state = DM_INITIALIZING;
-        dm_device.next_version = DYNMEM_PROTOCOL_VERSION_WIN8;
-        init_completion(&dm_device.host_event);
-        init_completion(&dm_device.config_event);
-        INIT_LIST_HEAD(&dm_device.ha_region_list);
-        spin_lock_init(&dm_device.ha_lock);
-        INIT_WORK(&dm_device.balloon_wrk.wrk, balloon_up);
-        INIT_WORK(&dm_device.ha_wrk.wrk, hot_add_req);
-        dm_device.host_specified_ha_region = false;
-
-        dm_device.thread =
-                 kthread_run(dm_thread_func, &dm_device, "hv_balloon");
-        if (IS_ERR(dm_device.thread)) {
-                ret = PTR_ERR(dm_device.thread);
-                goto probe_error1;
-        }
-
-#ifdef CONFIG_MEMORY_HOTPLUG
-        set_online_page_callback(&hv_online_page);
-        register_memory_notifier(&hv_memory_nb);
-#endif
-
-        hv_set_drvdata(dev, &dm_device);
         /*
          * Initiate the hand shake with the host and negotiate
          * a version that the host can support. We start with the
@@ -1631,16 +1591,15 @@ static int balloon_probe(struct hv_device *dev,
         dm_device.version = version_req.version.version;
 
         ret = vmbus_sendpacket(dev->channel, &version_req,
-                                sizeof(struct dm_version_request),
-                                (unsigned long)NULL,
-                                VM_PKT_DATA_INBAND, 0);
+                               sizeof(struct dm_version_request),
+                               (unsigned long)NULL, VM_PKT_DATA_INBAND, 0);
         if (ret)
-                goto probe_error2;
+                goto out;
 
         t = wait_for_completion_timeout(&dm_device.host_event, 5*HZ);
         if (t == 0) {
                 ret = -ETIMEDOUT;
-                goto probe_error2;
+                goto out;
         }
 
         /*
@@ -1648,8 +1607,8 @@ static int balloon_probe(struct hv_device *dev,
          * fail the probe function.
          */
         if (dm_device.state == DM_INIT_ERROR) {
-                ret = -ETIMEDOUT;
-                goto probe_error2;
+                ret = -EPROTO;
+                goto out;
         }
 
         pr_info("Using Dynamic Memory protocol version %u.%u\n",
@@ -1682,16 +1641,15 @@ static int balloon_probe(struct hv_device *dev,
         cap_msg.max_page_number = -1;
 
         ret = vmbus_sendpacket(dev->channel, &cap_msg,
-                                sizeof(struct dm_capabilities),
-                                (unsigned long)NULL,
-                                VM_PKT_DATA_INBAND, 0);
+                               sizeof(struct dm_capabilities),
+                               (unsigned long)NULL, VM_PKT_DATA_INBAND, 0);
         if (ret)
-                goto probe_error2;
+                goto out;
 
         t = wait_for_completion_timeout(&dm_device.host_event, 5*HZ);
         if (t == 0) {
                 ret = -ETIMEDOUT;
-                goto probe_error2;
+                goto out;
         }
 
         /*
@@ -1699,25 +1657,65 @@ static int balloon_probe(struct hv_device *dev,
          * fail the probe function.
          */
         if (dm_device.state == DM_INIT_ERROR) {
-                ret = -ETIMEDOUT;
-                goto probe_error2;
+                ret = -EPROTO;
+                goto out;
         }
 
+        return 0;
+out:
+        vmbus_close(dev->channel);
+        return ret;
+}
+
+static int balloon_probe(struct hv_device *dev,
+                         const struct hv_vmbus_device_id *dev_id)
+{
+        int ret;
+
+#ifdef CONFIG_MEMORY_HOTPLUG
+        do_hot_add = hot_add;
+#else
+        do_hot_add = false;
+#endif
+        dm_device.dev = dev;
+        dm_device.state = DM_INITIALIZING;
+        dm_device.next_version = DYNMEM_PROTOCOL_VERSION_WIN8;
+        init_completion(&dm_device.host_event);
+        init_completion(&dm_device.config_event);
+        INIT_LIST_HEAD(&dm_device.ha_region_list);
+        spin_lock_init(&dm_device.ha_lock);
+        INIT_WORK(&dm_device.balloon_wrk.wrk, balloon_up);
+        INIT_WORK(&dm_device.ha_wrk.wrk, hot_add_req);
+        dm_device.host_specified_ha_region = false;
+
+#ifdef CONFIG_MEMORY_HOTPLUG
+        set_online_page_callback(&hv_online_page);
+        register_memory_notifier(&hv_memory_nb);
+#endif
+
+        hv_set_drvdata(dev, &dm_device);
+
+        ret = balloon_connect_vsp(dev);
+        if (ret != 0)
+                return ret;
+
         dm_device.state = DM_INITIALIZED;
-        last_post_time = jiffies;
+
+        dm_device.thread =
+                 kthread_run(dm_thread_func, &dm_device, "hv_balloon");
+        if (IS_ERR(dm_device.thread)) {
+                ret = PTR_ERR(dm_device.thread);
+                goto probe_error;
+        }
 
         return 0;
 
-probe_error2:
+probe_error:
+        vmbus_close(dev->channel);
 #ifdef CONFIG_MEMORY_HOTPLUG
+        unregister_memory_notifier(&hv_memory_nb);
         restore_online_page_callback(&hv_online_page);
 #endif
-        kthread_stop(dm_device.thread);
-
-probe_error1:
-        vmbus_close(dev->channel);
-probe_error0:
-        kfree(send_buffer);
         return ret;
 }
 
@@ -1734,12 +1732,11 @@ static int balloon_remove(struct hv_device *dev)
         cancel_work_sync(&dm->balloon_wrk.wrk);
         cancel_work_sync(&dm->ha_wrk.wrk);
 
-        vmbus_close(dev->channel);
         kthread_stop(dm->thread);
-        kfree(send_buffer);
+        vmbus_close(dev->channel);
 #ifdef CONFIG_MEMORY_HOTPLUG
-        restore_online_page_callback(&hv_online_page);
         unregister_memory_notifier(&hv_memory_nb);
+        restore_online_page_callback(&hv_online_page);
 #endif
         spin_lock_irqsave(&dm_device.ha_lock, flags);
         list_for_each_entry_safe(has, tmp, &dm->ha_region_list, list) {
diff --git a/drivers/hv/hyperv_vmbus.h b/drivers/hv/hyperv_vmbus.h
index 50eaa1fd6e45..af9379a3bf89 100644
--- a/drivers/hv/hyperv_vmbus.h
+++ b/drivers/hv/hyperv_vmbus.h
@@ -169,8 +169,10 @@ extern int hv_synic_alloc(void);
 
 extern void hv_synic_free(void);
 
+extern void hv_synic_enable_regs(unsigned int cpu);
 extern int hv_synic_init(unsigned int cpu);
 
+extern void hv_synic_disable_regs(unsigned int cpu);
 extern int hv_synic_cleanup(unsigned int cpu);
 
 /* Interface */
@@ -256,6 +258,32 @@ struct vmbus_connection {
         struct workqueue_struct *work_queue;
         struct workqueue_struct *handle_primary_chan_wq;
         struct workqueue_struct *handle_sub_chan_wq;
+
+        /*
+         * The number of sub-channels and hv_sock channels that should be
+         * cleaned up upon suspend: sub-channels will be re-created upon
+         * resume, and hv_sock channels should not survive suspend.
+         */
+        atomic_t nr_chan_close_on_suspend;
+        /*
+         * vmbus_bus_suspend() waits for "nr_chan_close_on_suspend" to
+         * drop to zero.
+         */
+        struct completion ready_for_suspend_event;
+
+        /*
+         * The number of primary channels that should be "fixed up"
+         * upon resume: these channels are re-offered upon resume, and some
+         * fields of the channel offers (i.e. child_relid and connection_id)
+         * can change, so the old offermsg must be fixed up, before the resume
+         * callbacks of the VSC drivers start to further touch the channels.
+         */
+        atomic_t nr_chan_fixup_on_resume;
+        /*
+         * vmbus_bus_resume() waits for "nr_chan_fixup_on_resume" to
+         * drop to zero.
+         */
+        struct completion ready_for_resume_event;
 };
 
 
@@ -270,6 +298,8 @@ struct vmbus_msginfo {
 
 extern struct vmbus_connection vmbus_connection;
 
+int vmbus_negotiate_version(struct vmbus_channel_msginfo *msginfo, u32 version);
+
 static inline void vmbus_send_interrupt(u32 relid)
 {
         sync_set_bit(relid, vmbus_connection.send_int_page);
diff --git a/drivers/hv/vmbus_drv.c b/drivers/hv/vmbus_drv.c
index ebd35fc35290..391f0b225c9a 100644
--- a/drivers/hv/vmbus_drv.c
+++ b/drivers/hv/vmbus_drv.c
@@ -24,12 +24,14 @@
 #include <linux/sched/task_stack.h>
 
 #include <asm/mshyperv.h>
+#include <linux/delay.h>
 #include <linux/notifier.h>
 #include <linux/ptrace.h>
 #include <linux/screen_info.h>
 #include <linux/kdebug.h>
 #include <linux/efi.h>
 #include <linux/random.h>
+#include <linux/syscore_ops.h>
 #include <clocksource/hyperv_timer.h>
 #include "hyperv_vmbus.h"
 
@@ -910,6 +912,43 @@ static void vmbus_shutdown(struct device *child_device)
                 drv->shutdown(dev);
 }
 
+/*
+ * vmbus_suspend - Suspend a vmbus device
+ */
+static int vmbus_suspend(struct device *child_device)
+{
+        struct hv_driver *drv;
+        struct hv_device *dev = device_to_hv_device(child_device);
+
+        /* The device may not be attached yet */
+        if (!child_device->driver)
+                return 0;
+
+        drv = drv_to_hv_drv(child_device->driver);
+        if (!drv->suspend)
+                return -EOPNOTSUPP;
+
+        return drv->suspend(dev);
+}
+
+/*
+ * vmbus_resume - Resume a vmbus device
+ */
+static int vmbus_resume(struct device *child_device)
+{
+        struct hv_driver *drv;
+        struct hv_device *dev = device_to_hv_device(child_device);
+
+        /* The device may not be attached yet */
+        if (!child_device->driver)
+                return 0;
+
+        drv = drv_to_hv_drv(child_device->driver);
+        if (!drv->resume)
+                return -EOPNOTSUPP;
+
+        return drv->resume(dev);
+}
 
 /*
  * vmbus_device_release - Final callback release of the vmbus child device
@@ -925,6 +964,14 @@ static void vmbus_device_release(struct device *device)
         kfree(hv_dev);
 }
 
+/*
+ * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than
+ * SET_SYSTEM_SLEEP_PM_OPS: see the comment before vmbus_bus_pm.
+ */
+static const struct dev_pm_ops vmbus_pm = {
+        SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_suspend, vmbus_resume)
+};
+
 /* The one and only one */
 static struct bus_type  hv_bus = {
         .name =         "vmbus",
@@ -935,6 +982,7 @@ static struct bus_type  hv_bus = {
         .uevent =               vmbus_uevent,
         .dev_groups =           vmbus_dev_groups,
         .drv_groups =           vmbus_drv_groups,
+        .pm =                   &vmbus_pm,
 };
 
 struct onmessage_work_context {
@@ -1022,6 +1070,41 @@ msg_handled:
         vmbus_signal_eom(msg, message_type);
 }
 
+/*
+ * Fake RESCIND_CHANNEL messages to clean up hv_sock channels by force for
+ * hibernation, because hv_sock connections can not persist across hibernation.
+ */
+static void vmbus_force_channel_rescinded(struct vmbus_channel *channel)
+{
+        struct onmessage_work_context *ctx;
+        struct vmbus_channel_rescind_offer *rescind;
+
+        WARN_ON(!is_hvsock_channel(channel));
+
+        /*
+         * sizeof(*ctx) is small and the allocation should really not fail,
+         * otherwise the state of the hv_sock connections ends up in limbo.
+         */
+        ctx = kzalloc(sizeof(*ctx), GFP_KERNEL | __GFP_NOFAIL);
+
+        /*
+         * So far, these are not really used by Linux. Just set them to the
+         * reasonable values conforming to the definitions of the fields.
+         */
+        ctx->msg.header.message_type = 1;
+        ctx->msg.header.payload_size = sizeof(*rescind);
+
+        /* These values are actually used by Linux. */
+        rescind = (struct vmbus_channel_rescind_offer *)ctx->msg.u.payload;
+        rescind->header.msgtype = CHANNELMSG_RESCIND_CHANNELOFFER;
+        rescind->child_relid = channel->offermsg.child_relid;
+
+        INIT_WORK(&ctx->work, vmbus_onmessage_work);
+
+        queue_work_on(vmbus_connection.connect_cpu,
+                      vmbus_connection.work_queue,
+                      &ctx->work);
+}
 
 /*
  * Direct callback for channels using other deferred processing
@@ -2042,6 +2125,129 @@ acpi_walk_err:
         return ret_val;
 }
 
+static int vmbus_bus_suspend(struct device *dev)
+{
+        struct vmbus_channel *channel, *sc;
+        unsigned long flags;
+
+        while (atomic_read(&vmbus_connection.offer_in_progress) != 0) {
+                /*
+                 * We wait here until the completion of any channel
+                 * offers that are currently in progress.
+                 */
+                msleep(1);
+        }
+
+        mutex_lock(&vmbus_connection.channel_mutex);
+        list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
+                if (!is_hvsock_channel(channel))
+                        continue;
+
+                vmbus_force_channel_rescinded(channel);
+        }
+        mutex_unlock(&vmbus_connection.channel_mutex);
+
+        /*
+         * Wait until all the sub-channels and hv_sock channels have been
+         * cleaned up. Sub-channels should be destroyed upon suspend, otherwise
+         * they would conflict with the new sub-channels that will be created
+         * in the resume path. hv_sock channels should also be destroyed, but
+         * a hv_sock channel of an established hv_sock connection can not be
+         * really destroyed since it may still be referenced by the userspace
+         * application, so we just force the hv_sock channel to be rescinded
+         * by vmbus_force_channel_rescinded(), and the userspace application
+         * will thoroughly destroy the channel after hibernation.
+         *
+         * Note: the counter nr_chan_close_on_suspend may never go above 0 if
+         * the VM has no sub-channel and hv_sock channel, e.g. a 1-vCPU VM.
+         */
+        if (atomic_read(&vmbus_connection.nr_chan_close_on_suspend) > 0)
+                wait_for_completion(&vmbus_connection.ready_for_suspend_event);
+
+        WARN_ON(atomic_read(&vmbus_connection.nr_chan_fixup_on_resume) != 0);
+
+        mutex_lock(&vmbus_connection.channel_mutex);
+
+        list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
+                /*
+                 * Invalidate the field. Upon resume, vmbus_onoffer() will fix
+                 * up the field, and the other fields (if necessary).
+                 */
+                channel->offermsg.child_relid = INVALID_RELID;
+
+                if (is_hvsock_channel(channel)) {
+                        if (!channel->rescind) {
+                                pr_err("hv_sock channel not rescinded!\n");
+                                WARN_ON_ONCE(1);
+                        }
+                        continue;
+                }
+
+                spin_lock_irqsave(&channel->lock, flags);
+                list_for_each_entry(sc, &channel->sc_list, sc_list) {
+                        pr_err("Sub-channel not deleted!\n");
+                        WARN_ON_ONCE(1);
+                }
+                spin_unlock_irqrestore(&channel->lock, flags);
+
+                atomic_inc(&vmbus_connection.nr_chan_fixup_on_resume);
+        }
+
+        mutex_unlock(&vmbus_connection.channel_mutex);
+
+        vmbus_initiate_unload(false);
+
+        vmbus_connection.conn_state = DISCONNECTED;
+
+        /* Reset the event for the next resume. */
+        reinit_completion(&vmbus_connection.ready_for_resume_event);
+
+        return 0;
+}
+
+static int vmbus_bus_resume(struct device *dev)
+{
+        struct vmbus_channel_msginfo *msginfo;
+        size_t msgsize;
+        int ret;
+
+        /*
+         * We only use the 'vmbus_proto_version', which was in use before
+         * hibernation, to re-negotiate with the host.
+         */
+        if (vmbus_proto_version == VERSION_INVAL ||
+            vmbus_proto_version == 0) {
+                pr_err("Invalid proto version = 0x%x\n", vmbus_proto_version);
+                return -EINVAL;
+        }
+
+        msgsize = sizeof(*msginfo) +
+                  sizeof(struct vmbus_channel_initiate_contact);
+
+        msginfo = kzalloc(msgsize, GFP_KERNEL);
+
+        if (msginfo == NULL)
+                return -ENOMEM;
+
+        ret = vmbus_negotiate_version(msginfo, vmbus_proto_version);
+
+        kfree(msginfo);
+
+        if (ret != 0)
+                return ret;
+
+        WARN_ON(atomic_read(&vmbus_connection.nr_chan_fixup_on_resume) == 0);
+
+        vmbus_request_offers();
+
+        wait_for_completion(&vmbus_connection.ready_for_resume_event);
+
+        /* Reset the event for the next suspend. */
+        reinit_completion(&vmbus_connection.ready_for_suspend_event);
+
+        return 0;
+}
+
 static const struct acpi_device_id vmbus_acpi_device_ids[] = {
         {"VMBUS", 0},
         {"VMBus", 0},
@@ -2049,6 +2255,19 @@ static const struct acpi_device_id vmbus_acpi_device_ids[] = {
 };
 MODULE_DEVICE_TABLE(acpi, vmbus_acpi_device_ids);
 
+/*
+ * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than
+ * SET_SYSTEM_SLEEP_PM_OPS, otherwise NIC SR-IOV can not work, because the
+ * "pci_dev_pm_ops" uses the "noirq" callbacks: in the resume path, the
+ * pci "noirq" restore callback runs before "non-noirq" callbacks (see
+ * resume_target_kernel() -> dpm_resume_start(), and hibernation_restore() ->
+ * dpm_resume_end()). This means vmbus_bus_resume() and the pci-hyperv's
+ * resume callback must also run via the "noirq" callbacks.
+ */
+static const struct dev_pm_ops vmbus_bus_pm = {
+        SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_bus_suspend, vmbus_bus_resume)
+};
+
 static struct acpi_driver vmbus_acpi_driver = {
         .name = "vmbus",
         .ids = vmbus_acpi_device_ids,
@@ -2056,6 +2275,7 @@ static struct acpi_driver vmbus_acpi_driver = {
                 .add = vmbus_acpi_add,
                 .remove = vmbus_acpi_remove,
         },
+        .drv.pm = &vmbus_bus_pm,
 };
 
 static void hv_kexec_handler(void)
@@ -2086,6 +2306,47 @@ static void hv_crash_handler(struct pt_regs *regs)
         hyperv_cleanup();
 };
 
+static int hv_synic_suspend(void)
+{
+        /*
+         * When we reach here, all the non-boot CPUs have been offlined, and
+         * the stimers on them have been unbound in hv_synic_cleanup() ->
+         * hv_stimer_cleanup() -> clockevents_unbind_device().
+         *
+         * hv_synic_suspend() only runs on CPU0 with interrupts disabled. Here
+         * we do not unbind the stimer on CPU0 because: 1) it's unnecessary
+         * because the interrupts remain disabled between syscore_suspend()
+         * and syscore_resume(): see create_image() and resume_target_kernel();
+         * 2) the stimer on CPU0 is automatically disabled later by
+         * syscore_suspend() -> timekeeping_suspend() -> tick_suspend() -> ...
+         * -> clockevents_shutdown() -> ... -> hv_ce_shutdown(); 3) a warning
+         * would be triggered if we call clockevents_unbind_device(), which
+         * may sleep, in an interrupts-disabled context. So, we intentionally
+         * don't call hv_stimer_cleanup(0) here.
+         */
+
+        hv_synic_disable_regs(0);
+
+        return 0;
+}
+
+static void hv_synic_resume(void)
+{
+        hv_synic_enable_regs(0);
+
+        /*
+         * Note: we don't need to call hv_stimer_init(0), because the timer
+         * on CPU0 is not unbound in hv_synic_suspend(), and the timer is
+         * automatically re-enabled in timekeeping_resume().
+         */
+}
+
+/* The callbacks run only on CPU0, with irqs_disabled. */
+static struct syscore_ops hv_synic_syscore_ops = {
+        .suspend = hv_synic_suspend,
+        .resume = hv_synic_resume,
+};
+
 static int __init hv_acpi_init(void)
 {
         int ret, t;
@@ -2116,6 +2377,8 @@ static int __init hv_acpi_init(void)
         hv_setup_kexec_handler(hv_kexec_handler);
         hv_setup_crash_handler(hv_crash_handler);
 
+        register_syscore_ops(&hv_synic_syscore_ops);
+
         return 0;
 
 cleanup:
@@ -2128,6 +2391,8 @@ static void __exit vmbus_exit(void)
 {
         int cpu;
 
+        unregister_syscore_ops(&hv_synic_syscore_ops);
+
         hv_remove_kexec_handler();
         hv_remove_crash_handler();
         vmbus_connection.conn_state = DISCONNECTED;
diff --git a/drivers/infiniband/core/rw.c b/drivers/infiniband/core/rw.c
index dce06108c8c3..5337393d4dfe 100644
--- a/drivers/infiniband/core/rw.c
+++ b/drivers/infiniband/core/rw.c
@@ -583,8 +583,10 @@ void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num,
                 break;
         }
 
-        /* P2PDMA contexts do not need to be unmapped */
-        if (!is_pci_p2pdma_page(sg_page(sg)))
+        if (is_pci_p2pdma_page(sg_page(sg)))
+                pci_p2pdma_unmap_sg(qp->pd->device->dma_device, sg,
+                                    sg_cnt, dir);
+        else
                 ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
 }
 EXPORT_SYMBOL(rdma_rw_ctx_destroy);
diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c
index f2d9fb4c4e8e..4e8d0d6b9b5c 100644
--- a/drivers/mfd/88pm800.c
+++ b/drivers/mfd/88pm800.c
@@ -425,10 +425,10 @@ static int pm800_pages_init(struct pm80x_chip *chip)
                 return -ENODEV;
 
         /* PM800 block power page */
-        subchip->power_page = i2c_new_dummy(client->adapter,
+        subchip->power_page = i2c_new_dummy_device(client->adapter,
                                             subchip->power_page_addr);
-        if (subchip->power_page == NULL) {
-                ret = -ENODEV;
+        if (IS_ERR(subchip->power_page)) {
+                ret = PTR_ERR(subchip->power_page);
                 goto out;
         }
 
@@ -444,10 +444,10 @@ static int pm800_pages_init(struct pm80x_chip *chip)
         i2c_set_clientdata(subchip->power_page, chip);
 
         /* PM800 block GPADC */
-        subchip->gpadc_page = i2c_new_dummy(client->adapter,
+        subchip->gpadc_page = i2c_new_dummy_device(client->adapter,
                                             subchip->gpadc_page_addr);
-        if (subchip->gpadc_page == NULL) {
-                ret = -ENODEV;
+        if (IS_ERR(subchip->gpadc_page)) {
+                ret = PTR_ERR(subchip->gpadc_page);
                 goto out;
         }
 
diff --git a/drivers/mfd/88pm860x-core.c b/drivers/mfd/88pm860x-core.c
index 9e0bd135730f..c9bae71f643a 100644
--- a/drivers/mfd/88pm860x-core.c
+++ b/drivers/mfd/88pm860x-core.c
@@ -1178,12 +1178,12 @@ static int pm860x_probe(struct i2c_client *client)
          */
         if (pdata->companion_addr && (pdata->companion_addr != client->addr)) {
                 chip->companion_addr = pdata->companion_addr;
-                chip->companion = i2c_new_dummy(chip->client->adapter,
+                chip->companion = i2c_new_dummy_device(chip->client->adapter,
                                                 chip->companion_addr);
-                if (!chip->companion) {
+                if (IS_ERR(chip->companion)) {
                         dev_err(&client->dev,
                                 "Failed to allocate I2C companion device\n");
-                        return -ENODEV;
+                        return PTR_ERR(chip->companion);
                 }
                 chip->regmap_companion = regmap_init_i2c(chip->companion,
                                                         &pm860x_regmap_config);
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index c9c49da42446..ae24d3ea68ea 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -589,6 +589,17 @@ config INTEL_SOC_PMIC_CHTDC_TI
           Select this option for supporting Dollar Cove (TI version) PMIC
           device that is found on some Intel Cherry Trail systems.
 
+config INTEL_SOC_PMIC_MRFLD
+        tristate "Support for Intel Merrifield Basin Cove PMIC"
+        depends on GPIOLIB
+        depends on ACPI
+        depends on INTEL_SCU_IPC
+        select MFD_CORE
+        select REGMAP_IRQ
+        help
+          Select this option for supporting Basin Cove PMIC device
+          that is found on Intel Merrifield systems.
+
 config MFD_INTEL_LPSS
         tristate
         select COMMON_CLK
@@ -641,15 +652,6 @@ config MFD_JANZ_CMODIO
           host many different types of MODULbus daughterboards, including
           CAN and GPIO controllers.
 
-config MFD_JZ4740_ADC
-        bool "Janz JZ4740 ADC core"
-        select MFD_CORE
-        select GENERIC_IRQ_CHIP
-        depends on MACH_JZ4740
-        help
-          Say yes here if you want support for the ADC unit in the JZ4740 SoC.
-          This driver is necessary for jz4740-battery and jz4740-hwmon driver.
-
 config MFD_KEMPLD
         tristate "Kontron module PLD device"
         select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 0c0a848e62df..c1067ea46204 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -189,7 +189,6 @@ obj-$(CONFIG_LPC_SCH)		+= lpc_sch.o
 obj-$(CONFIG_LPC_ICH)           += lpc_ich.o
 obj-$(CONFIG_MFD_RDC321X)       += rdc321x-southbridge.o
 obj-$(CONFIG_MFD_JANZ_CMODIO)   += janz-cmodio.o
-obj-$(CONFIG_MFD_JZ4740_ADC)    += jz4740-adc.o
 obj-$(CONFIG_MFD_TPS6586X)      += tps6586x.o
 obj-$(CONFIG_MFD_VX855)         += vx855.o
 obj-$(CONFIG_MFD_WL1273_CORE)   += wl1273-core.o
@@ -239,7 +238,9 @@ obj-$(CONFIG_INTEL_SOC_PMIC)	+= intel-soc-pmic.o
 obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC)      += intel_soc_pmic_bxtwc.o
 obj-$(CONFIG_INTEL_SOC_PMIC_CHTWC)      += intel_soc_pmic_chtwc.o
 obj-$(CONFIG_INTEL_SOC_PMIC_CHTDC_TI)   += intel_soc_pmic_chtdc_ti.o
-obj-$(CONFIG_MFD_MT6397)        += mt6397-core.o
+mt6397-objs     := mt6397-core.o mt6397-irq.o
+obj-$(CONFIG_MFD_MT6397)        += mt6397.o
+obj-$(CONFIG_INTEL_SOC_PMIC_MRFLD)      += intel_soc_pmic_mrfld.o
 
 obj-$(CONFIG_MFD_ALTERA_A10SR)  += altera-a10sr.o
 obj-$(CONFIG_MFD_ALTERA_SYSMGR) += altera-sysmgr.o
diff --git a/drivers/mfd/ab3100-core.c b/drivers/mfd/ab3100-core.c
index 9f3dbc31d3e9..57723f116bb5 100644
--- a/drivers/mfd/ab3100-core.c
+++ b/drivers/mfd/ab3100-core.c
@@ -865,10 +865,10 @@ static int ab3100_probe(struct i2c_client *client,
                  &ab3100->chip_name[0]);
 
         /* Attach a second dummy i2c_client to the test register address */
-        ab3100->testreg_client = i2c_new_dummy(client->adapter,
+        ab3100->testreg_client = i2c_new_dummy_device(client->adapter,
                                                client->addr + 1);
-        if (!ab3100->testreg_client) {
-                err = -ENOMEM;
+        if (IS_ERR(ab3100->testreg_client)) {
+                err = PTR_ERR(ab3100->testreg_client);
                 goto exit_no_testreg_client;
         }
 
diff --git a/drivers/mfd/ab8500-debugfs.c b/drivers/mfd/ab8500-debugfs.c
index 567a34b073dd..f4e26b6e5362 100644
--- a/drivers/mfd/ab8500-debugfs.c
+++ b/drivers/mfd/ab8500-debugfs.c
@@ -2680,16 +2680,12 @@ static int ab8500_debug_probe(struct platform_device *plf)
         irq_ab8500 = res->start;
 
         irq_first = platform_get_irq_byname(plf, "IRQ_FIRST");
-        if (irq_first < 0) {
-                dev_err(&plf->dev, "First irq not found, err %d\n", irq_first);
+        if (irq_first < 0)
                 return irq_first;
-        }
 
         irq_last = platform_get_irq_byname(plf, "IRQ_LAST");
-        if (irq_last < 0) {
-                dev_err(&plf->dev, "Last irq not found, err %d\n", irq_last);
+        if (irq_last < 0)
                 return irq_last;
-        }
 
         ab8500_dir = debugfs_create_dir(AB8500_NAME_STRING, NULL);
 
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index 83b18c998d6f..a6bd2134cea2 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -15,7 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/irq.h>
-#include <linux/gpio.h>
+#include <linux/gpio/driver.h>
 #include <linux/export.h>
 #include <linux/io.h>
 #include <linux/slab.h>
diff --git a/drivers/mfd/bcm590xx.c b/drivers/mfd/bcm590xx.c
index 1aeb5e498d91..bfac5dc091ca 100644
--- a/drivers/mfd/bcm590xx.c
+++ b/drivers/mfd/bcm590xx.c
@@ -61,11 +61,11 @@ static int bcm590xx_i2c_probe(struct i2c_client *i2c_pri,
         }
 
         /* Secondary I2C slave address is the base address with A(2) asserted */
-        bcm590xx->i2c_sec = i2c_new_dummy(i2c_pri->adapter,
+        bcm590xx->i2c_sec = i2c_new_dummy_device(i2c_pri->adapter,
                                           i2c_pri->addr | BIT(2));
-        if (!bcm590xx->i2c_sec) {
+        if (IS_ERR(bcm590xx->i2c_sec)) {
                 dev_err(&i2c_pri->dev, "failed to add secondary I2C device\n");
-                return -ENODEV;
+                return PTR_ERR(bcm590xx->i2c_sec);
         }
         i2c_set_clientdata(bcm590xx->i2c_sec, bcm590xx);
 
diff --git a/drivers/mfd/da9150-core.c b/drivers/mfd/da9150-core.c
index 13033068721a..7f0aa1e8db96 100644
--- a/drivers/mfd/da9150-core.c
+++ b/drivers/mfd/da9150-core.c
@@ -420,10 +420,10 @@ static int da9150_probe(struct i2c_client *client,
         qif_addr = da9150_reg_read(da9150, DA9150_CORE2WIRE_CTRL_A);
         qif_addr = (qif_addr & DA9150_CORE_BASE_ADDR_MASK) >> 1;
         qif_addr |= DA9150_QIF_I2C_ADDR_LSB;
-        da9150->core_qif = i2c_new_dummy(client->adapter, qif_addr);
-        if (!da9150->core_qif) {
+        da9150->core_qif = i2c_new_dummy_device(client->adapter, qif_addr);
+        if (IS_ERR(da9150->core_qif)) {
                 dev_err(da9150->dev, "Failed to attach QIF client\n");
-                return -ENODEV;
+                return PTR_ERR(da9150->core_qif);
         }
 
         i2c_set_clientdata(da9150->core_qif, da9150);
diff --git a/drivers/mfd/davinci_voicecodec.c b/drivers/mfd/davinci_voicecodec.c
index 13ca7203e193..e5c8bc998eb4 100644
--- a/drivers/mfd/davinci_voicecodec.c
+++ b/drivers/mfd/davinci_voicecodec.c
@@ -19,7 +19,6 @@
 #include <sound/pcm.h>
 
 #include <linux/mfd/davinci_voicecodec.h>
-#include <mach/hardware.h>
 
 static const struct regmap_config davinci_vc_regmap = {
         .reg_bits = 32,
@@ -31,6 +30,7 @@ static int __init davinci_vc_probe(struct platform_device *pdev)
         struct davinci_vc *davinci_vc;
         struct resource *res;
         struct mfd_cell *cell = NULL;
+        dma_addr_t fifo_base;
         int ret;
 
         davinci_vc = devm_kzalloc(&pdev->dev,
@@ -48,6 +48,7 @@ static int __init davinci_vc_probe(struct platform_device *pdev)
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 
+        fifo_base = (dma_addr_t)res->start;
         davinci_vc->base = devm_ioremap_resource(&pdev->dev, res);
         if (IS_ERR(davinci_vc->base)) {
                 ret = PTR_ERR(davinci_vc->base);
@@ -70,8 +71,7 @@ static int __init davinci_vc_probe(struct platform_device *pdev)
         }
 
         davinci_vc->davinci_vcif.dma_tx_channel = res->start;
-        davinci_vc->davinci_vcif.dma_tx_addr =
-                (dma_addr_t)(io_v2p(davinci_vc->base) + DAVINCI_VC_WFIFO);
+        davinci_vc->davinci_vcif.dma_tx_addr = fifo_base + DAVINCI_VC_WFIFO;
 
         res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
         if (!res) {
@@ -81,8 +81,7 @@ static int __init davinci_vc_probe(struct platform_device *pdev)
         }
 
         davinci_vc->davinci_vcif.dma_rx_channel = res->start;
-        davinci_vc->davinci_vcif.dma_rx_addr =
-                (dma_addr_t)(io_v2p(davinci_vc->base) + DAVINCI_VC_RFIFO);
+        davinci_vc->davinci_vcif.dma_rx_addr = fifo_base + DAVINCI_VC_RFIFO;
 
         davinci_vc->dev = &pdev->dev;
         davinci_vc->pdev = pdev;
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 90e0f21bc49c..0e019cc5da42 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -1695,21 +1695,41 @@ static long round_clock_rate(u8 clock, unsigned long rate)
         return rounded_rate;
 }
 
-static const unsigned long armss_freqs[] = {
+static const unsigned long db8500_armss_freqs[] = {
         200000000,
         400000000,
         800000000,
         998400000
 };
 
+/* The DB8520 has slightly higher ARMSS max frequency */
+static const unsigned long db8520_armss_freqs[] = {
+        200000000,
+        400000000,
+        800000000,
+        1152000000
+};
+
+
+
 static long round_armss_rate(unsigned long rate)
 {
         unsigned long freq = 0;
+        const unsigned long *freqs;
+        int nfreqs;
         int i;
 
+        if (fw_info.version.project == PRCMU_FW_PROJECT_U8520) {
+                freqs = db8520_armss_freqs;
+                nfreqs = ARRAY_SIZE(db8520_armss_freqs);
+        } else {
+                freqs = db8500_armss_freqs;
+                nfreqs = ARRAY_SIZE(db8500_armss_freqs);
+        }
+
         /* Find the corresponding arm opp from the cpufreq table. */
-        for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) {
-                freq = armss_freqs[i];
+        for (i = 0; i < nfreqs; i++) {
+                freq = freqs[i];
                 if (rate <= freq)
                         break;
         }
@@ -1854,11 +1874,21 @@ static int set_armss_rate(unsigned long rate)
 {
         unsigned long freq;
         u8 opps[] = { ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP };
+        const unsigned long *freqs;
+        int nfreqs;
         int i;
 
+        if (fw_info.version.project == PRCMU_FW_PROJECT_U8520) {
+                freqs = db8520_armss_freqs;
+                nfreqs = ARRAY_SIZE(db8520_armss_freqs);
+        } else {
+                freqs = db8500_armss_freqs;
+                nfreqs = ARRAY_SIZE(db8500_armss_freqs);
+        }
+
         /* Find the corresponding arm opp from the cpufreq table. */
-        for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) {
-                freq = armss_freqs[i];
+        for (i = 0; i < nfreqs; i++) {
+                freq = freqs[i];
                 if (rate == freq)
                         break;
         }
@@ -3130,10 +3160,8 @@ static int db8500_prcmu_probe(struct platform_device *pdev)
         writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);
 
         irq = platform_get_irq(pdev, 0);
-        if (irq <= 0) {
-                dev_err(&pdev->dev, "no prcmu irq provided\n");
+        if (irq <= 0)
                 return irq;
-        }
 
         err = request_threaded_irq(irq, prcmu_irq_handler,
                 prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL);
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c
index f505e3e1274b..70fa18b04ad2 100644
--- a/drivers/mfd/ezx-pcap.c
+++ b/drivers/mfd/ezx-pcap.c
@@ -35,7 +35,7 @@ struct pcap_chip {
 
         /* IO */
         u32 buf;
-        struct mutex io_mutex;
+        spinlock_t io_lock;
 
         /* IRQ */
         unsigned int irq_base;
@@ -48,7 +48,7 @@ struct pcap_chip {
         struct pcap_adc_request *adc_queue[PCAP_ADC_MAXQ];
         u8 adc_head;
         u8 adc_tail;
-        struct mutex adc_mutex;
+        spinlock_t adc_lock;
 };
 
 /* IO */
@@ -76,14 +76,15 @@ static int ezx_pcap_putget(struct pcap_chip *pcap, u32 *data)
 
 int ezx_pcap_write(struct pcap_chip *pcap, u8 reg_num, u32 value)
 {
+        unsigned long flags;
         int ret;
 
-        mutex_lock(&pcap->io_mutex);
+        spin_lock_irqsave(&pcap->io_lock, flags);
         value &= PCAP_REGISTER_VALUE_MASK;
         value |= PCAP_REGISTER_WRITE_OP_BIT
                 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
         ret = ezx_pcap_putget(pcap, &value);
-        mutex_unlock(&pcap->io_mutex);
+        spin_unlock_irqrestore(&pcap->io_lock, flags);
 
         return ret;
 }
@@ -91,14 +92,15 @@ EXPORT_SYMBOL_GPL(ezx_pcap_write);
 
 int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value)
 {
+        unsigned long flags;
         int ret;
 
-        mutex_lock(&pcap->io_mutex);
+        spin_lock_irqsave(&pcap->io_lock, flags);
         *value = PCAP_REGISTER_READ_OP_BIT
                 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
 
         ret = ezx_pcap_putget(pcap, value);
-        mutex_unlock(&pcap->io_mutex);
+        spin_unlock_irqrestore(&pcap->io_lock, flags);
 
         return ret;
 }
@@ -106,11 +108,12 @@ EXPORT_SYMBOL_GPL(ezx_pcap_read);
 
 int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val)
 {
+        unsigned long flags;
         int ret;
         u32 tmp = PCAP_REGISTER_READ_OP_BIT |
                 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
 
-        mutex_lock(&pcap->io_mutex);
+        spin_lock_irqsave(&pcap->io_lock, flags);
         ret = ezx_pcap_putget(pcap, &tmp);
         if (ret)
                 goto out_unlock;
@@ -121,7 +124,7 @@ int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val)
 
         ret = ezx_pcap_putget(pcap, &tmp);
 out_unlock:
-        mutex_unlock(&pcap->io_mutex);
+        spin_unlock_irqrestore(&pcap->io_lock, flags);
 
         return ret;
 }
@@ -212,14 +215,15 @@ static void pcap_irq_handler(struct irq_desc *desc)
 /* ADC */
 void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits)
 {
+        unsigned long flags;
         u32 tmp;
 
-        mutex_lock(&pcap->adc_mutex);
+        spin_lock_irqsave(&pcap->adc_lock, flags);
         ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
         tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
         tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
         ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
-        mutex_unlock(&pcap->adc_mutex);
+        spin_unlock_irqrestore(&pcap->adc_lock, flags);
 }
 EXPORT_SYMBOL_GPL(pcap_set_ts_bits);
 
@@ -234,15 +238,16 @@ static void pcap_disable_adc(struct pcap_chip *pcap)
 
 static void pcap_adc_trigger(struct pcap_chip *pcap)
 {
+        unsigned long flags;
         u32 tmp;
         u8 head;
 
-        mutex_lock(&pcap->adc_mutex);
+        spin_lock_irqsave(&pcap->adc_lock, flags);
         head = pcap->adc_head;
         if (!pcap->adc_queue[head]) {
                 /* queue is empty, save power */
                 pcap_disable_adc(pcap);
-                mutex_unlock(&pcap->adc_mutex);
+                spin_unlock_irqrestore(&pcap->adc_lock, flags);
                 return;
         }
         /* start conversion on requested bank, save TS_M bits */
@@ -254,7 +259,7 @@ static void pcap_adc_trigger(struct pcap_chip *pcap)
                 tmp |= PCAP_ADC_AD_SEL1;
 
         ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
-        mutex_unlock(&pcap->adc_mutex);
+        spin_unlock_irqrestore(&pcap->adc_lock, flags);
         ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC);
 }
 
@@ -265,11 +270,11 @@ static irqreturn_t pcap_adc_irq(int irq, void *_pcap)
         u16 res[2];
         u32 tmp;
 
-        mutex_lock(&pcap->adc_mutex);
+        spin_lock(&pcap->adc_lock);
         req = pcap->adc_queue[pcap->adc_head];
 
         if (WARN(!req, "adc irq without pending request\n")) {
-                mutex_unlock(&pcap->adc_mutex);
+                spin_unlock(&pcap->adc_lock);
                 return IRQ_HANDLED;
         }
 
@@ -285,7 +290,7 @@ static irqreturn_t pcap_adc_irq(int irq, void *_pcap)
 
         pcap->adc_queue[pcap->adc_head] = NULL;
         pcap->adc_head = (pcap->adc_head + 1) & (PCAP_ADC_MAXQ - 1);
-        mutex_unlock(&pcap->adc_mutex);
+        spin_unlock(&pcap->adc_lock);
 
         /* pass the results and release memory */
         req->callback(req->data, res);
@@ -301,6 +306,7 @@ int pcap_adc_async(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[],
                                                 void *callback, void *data)
 {
         struct pcap_adc_request *req;
+        unsigned long irq_flags;
 
         /* This will be freed after we have a result */
         req = kmalloc(sizeof(struct pcap_adc_request), GFP_KERNEL);
@@ -314,15 +320,15 @@ int pcap_adc_async(struct pcap_chip *pcap, u8 bank, u32 flags, u8 ch[],
         req->callback = callback;
         req->data = data;
 
-        mutex_lock(&pcap->adc_mutex);
+        spin_lock_irqsave(&pcap->adc_lock, irq_flags);
         if (pcap->adc_queue[pcap->adc_tail]) {
-                mutex_unlock(&pcap->adc_mutex);
+                spin_unlock_irqrestore(&pcap->adc_lock, irq_flags);
                 kfree(req);
                 return -EBUSY;
         }
         pcap->adc_queue[pcap->adc_tail] = req;
         pcap->adc_tail = (pcap->adc_tail + 1) & (PCAP_ADC_MAXQ - 1);
-        mutex_unlock(&pcap->adc_mutex);
+        spin_unlock_irqrestore(&pcap->adc_lock, irq_flags);
 
         /* start conversion */
         pcap_adc_trigger(pcap);
@@ -389,16 +395,17 @@ static int pcap_add_subdev(struct pcap_chip *pcap,
 static int ezx_pcap_remove(struct spi_device *spi)
 {
         struct pcap_chip *pcap = spi_get_drvdata(spi);
+        unsigned long flags;
         int i;
 
         /* remove all registered subdevs */
         device_for_each_child(&spi->dev, NULL, pcap_remove_subdev);
 
         /* cleanup ADC */
-        mutex_lock(&pcap->adc_mutex);
+        spin_lock_irqsave(&pcap->adc_lock, flags);
         for (i = 0; i < PCAP_ADC_MAXQ; i++)
                 kfree(pcap->adc_queue[i]);
-        mutex_unlock(&pcap->adc_mutex);
+        spin_unlock_irqrestore(&pcap->adc_lock, flags);
 
         /* cleanup irqchip */
         for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++)
@@ -426,8 +433,8 @@ static int ezx_pcap_probe(struct spi_device *spi)
                 goto ret;
         }
 
-        mutex_init(&pcap->io_mutex);
-        mutex_init(&pcap->adc_mutex);
+        spin_lock_init(&pcap->io_lock);
+        spin_lock_init(&pcap->adc_lock);
         INIT_WORK(&pcap->isr_work, pcap_isr_work);
         INIT_WORK(&pcap->msr_work, pcap_msr_work);
         spi_set_drvdata(spi, pcap);
diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
index 20791cab7263..a016b39fe9b0 100644
--- a/drivers/mfd/fsl-imx25-tsadc.c
+++ b/drivers/mfd/fsl-imx25-tsadc.c
@@ -69,10 +69,8 @@ static int mx25_tsadc_setup_irq(struct platform_device *pdev,
         int irq;
 
         irq = platform_get_irq(pdev, 0);
-        if (irq <= 0) {
-                dev_err(dev, "Failed to get irq\n");
+        if (irq <= 0)
                 return irq;
-        }
 
         tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
                                               tsadc);
diff --git a/drivers/mfd/htc-i2cpld.c b/drivers/mfd/htc-i2cpld.c
index 370519af5d0b..8ad6768bd7a2 100644
--- a/drivers/mfd/htc-i2cpld.c
+++ b/drivers/mfd/htc-i2cpld.c
@@ -385,8 +385,7 @@ static void htcpld_unregister_chip_i2c(
         htcpld = platform_get_drvdata(pdev);
         chip = &htcpld->chip[chip_index];
 
-        if (chip->client)
-                i2c_unregister_device(chip->client);
+        i2c_unregister_device(chip->client);
 }
 
 static int htcpld_register_chip_gpio(
diff --git a/drivers/mfd/intel-lpss-acpi.c b/drivers/mfd/intel-lpss-acpi.c
index 61ffb8b393e4..c8fe334b5fe8 100644
--- a/drivers/mfd/intel-lpss-acpi.c
+++ b/drivers/mfd/intel-lpss-acpi.c
@@ -18,6 +18,10 @@
 
 #include "intel-lpss.h"
 
+static const struct intel_lpss_platform_info spt_info = {
+        .clk_rate = 120000000,
+};
+
 static struct property_entry spt_i2c_properties[] = {
         PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
         { },
@@ -28,6 +32,19 @@ static const struct intel_lpss_platform_info spt_i2c_info = {
         .properties = spt_i2c_properties,
 };
 
+static struct property_entry uart_properties[] = {
+        PROPERTY_ENTRY_U32("reg-io-width", 4),
+        PROPERTY_ENTRY_U32("reg-shift", 2),
+        PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
+        { },
+};
+
+static const struct intel_lpss_platform_info spt_uart_info = {
+        .clk_rate = 120000000,
+        .clk_con_id = "baudclk",
+        .properties = uart_properties,
+};
+
 static const struct intel_lpss_platform_info bxt_info = {
         .clk_rate = 100000000,
 };
@@ -58,8 +75,17 @@ static const struct intel_lpss_platform_info apl_i2c_info = {
 
 static const struct acpi_device_id intel_lpss_acpi_ids[] = {
         /* SPT */
+        { "INT3440", (kernel_ulong_t)&spt_info },
+        { "INT3441", (kernel_ulong_t)&spt_info },
+        { "INT3442", (kernel_ulong_t)&spt_i2c_info },
+        { "INT3443", (kernel_ulong_t)&spt_i2c_info },
+        { "INT3444", (kernel_ulong_t)&spt_i2c_info },
+        { "INT3445", (kernel_ulong_t)&spt_i2c_info },
         { "INT3446", (kernel_ulong_t)&spt_i2c_info },
         { "INT3447", (kernel_ulong_t)&spt_i2c_info },
+        { "INT3448", (kernel_ulong_t)&spt_uart_info },
+        { "INT3449", (kernel_ulong_t)&spt_uart_info },
+        { "INT344A", (kernel_ulong_t)&spt_uart_info },
         /* BXT */
         { "80860AAC", (kernel_ulong_t)&bxt_i2c_info },
         { "80860ABC", (kernel_ulong_t)&bxt_info },
diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
index ade6e1ce5a98..9355db29d2f9 100644
--- a/drivers/mfd/intel-lpss-pci.c
+++ b/drivers/mfd/intel-lpss-pci.c
@@ -35,6 +35,8 @@ static int intel_lpss_pci_probe(struct pci_dev *pdev,
         info->mem = &pdev->resource[0];
         info->irq = pdev->irq;
 
+        pdev->d3cold_delay = 0;
+
         /* Probably it is enough to set this for iDMA capable devices only */
         pci_set_master(pdev);
         pci_try_set_mwi(pdev);
@@ -256,6 +258,29 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
         { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info },
         { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info },
         { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info },
+        /* TGL-LP */
+        { PCI_VDEVICE(INTEL, 0xa0a8), (kernel_ulong_t)&bxt_uart_info },
+        { PCI_VDEVICE(INTEL, 0xa0a9), (kernel_ulong_t)&bxt_uart_info },
+        { PCI_VDEVICE(INTEL, 0xa0aa), (kernel_ulong_t)&spt_info },
+        { PCI_VDEVICE(INTEL, 0xa0ab), (kernel_ulong_t)&spt_info },
+        { PCI_VDEVICE(INTEL, 0xa0c5), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0c6), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0c7), (kernel_ulong_t)&bxt_uart_info },
+        { PCI_VDEVICE(INTEL, 0xa0d8), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0d9), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0da), (kernel_ulong_t)&bxt_uart_info },
+        { PCI_VDEVICE(INTEL, 0xa0db), (kernel_ulong_t)&bxt_uart_info },
+        { PCI_VDEVICE(INTEL, 0xa0dc), (kernel_ulong_t)&bxt_uart_info },
+        { PCI_VDEVICE(INTEL, 0xa0dd), (kernel_ulong_t)&bxt_uart_info },
+        { PCI_VDEVICE(INTEL, 0xa0de), (kernel_ulong_t)&spt_info },
+        { PCI_VDEVICE(INTEL, 0xa0df), (kernel_ulong_t)&spt_info },
+        { PCI_VDEVICE(INTEL, 0xa0e8), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0e9), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0ea), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0eb), (kernel_ulong_t)&spt_i2c_info },
+        { PCI_VDEVICE(INTEL, 0xa0fb), (kernel_ulong_t)&spt_info },
+        { PCI_VDEVICE(INTEL, 0xa0fd), (kernel_ulong_t)&spt_info },
+        { PCI_VDEVICE(INTEL, 0xa0fe), (kernel_ulong_t)&spt_info },
         /* SPT-H */
         { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
         { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c
index 277f48f1cc1c..bfe4ff337581 100644
--- a/drivers/mfd/intel-lpss.c
+++ b/drivers/mfd/intel-lpss.c
@@ -47,10 +47,10 @@
 #define LPSS_PRIV_IDLELTR               0x14
 
 #define LPSS_PRIV_LTR_REQ               BIT(15)
-#define LPSS_PRIV_LTR_SCALE_MASK        0xc00
-#define LPSS_PRIV_LTR_SCALE_1US         0x800
-#define LPSS_PRIV_LTR_SCALE_32US        0xc00
-#define LPSS_PRIV_LTR_VALUE_MASK        0x3ff
+#define LPSS_PRIV_LTR_SCALE_MASK        GENMASK(11, 10)
+#define LPSS_PRIV_LTR_SCALE_1US         (2 << 10)
+#define LPSS_PRIV_LTR_SCALE_32US        (3 << 10)
+#define LPSS_PRIV_LTR_VALUE_MASK        GENMASK(9, 0)
 
 #define LPSS_PRIV_SSP_REG               0x20
 #define LPSS_PRIV_SSP_REG_DIS_DMA_FIN   BIT(0)
@@ -59,8 +59,8 @@
 
 #define LPSS_PRIV_CAPS                  0xfc
 #define LPSS_PRIV_CAPS_NO_IDMA          BIT(8)
+#define LPSS_PRIV_CAPS_TYPE_MASK        GENMASK(7, 4)
 #define LPSS_PRIV_CAPS_TYPE_SHIFT       4
-#define LPSS_PRIV_CAPS_TYPE_MASK        (0xf << LPSS_PRIV_CAPS_TYPE_SHIFT)
 
 /* This matches the type field in CAPS register */
 enum intel_lpss_dev_type {
@@ -128,17 +128,6 @@ static const struct mfd_cell intel_lpss_spi_cell = {
 static DEFINE_IDA(intel_lpss_devid_ida);
 static struct dentry *intel_lpss_debugfs;
 
-static int intel_lpss_request_dma_module(const char *name)
-{
-        static bool intel_lpss_dma_requested;
-
-        if (intel_lpss_dma_requested)
-                return 0;
-
-        intel_lpss_dma_requested = true;
-        return request_module("%s", name);
-}
-
 static void intel_lpss_cache_ltr(struct intel_lpss *lpss)
 {
         lpss->active_ltr = readl(lpss->priv + LPSS_PRIV_ACTIVELTR);
@@ -429,16 +418,6 @@ int intel_lpss_probe(struct device *dev,
                 dev_warn(dev, "Failed to create debugfs entries\n");
 
         if (intel_lpss_has_idma(lpss)) {
-                /*
-                 * Ensure the DMA driver is loaded before the host
-                 * controller device appears, so that the host controller
-                 * driver can request its DMA channels as early as
-                 * possible.
-                 *
-                 * If the DMA module is not there that's OK as well.
-                 */
-                intel_lpss_request_dma_module(LPSS_IDMA64_DRIVER_NAME);
-
                 ret = mfd_add_devices(dev, lpss->devid, &intel_lpss_idma64_cell,
                                       1, info->mem, info->irq, NULL);
                 if (ret)
@@ -554,3 +533,11 @@ MODULE_AUTHOR("Heikki Krogerus <heikki.krogerus@linux.intel.com>");
 MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@linux.intel.com>");
 MODULE_DESCRIPTION("Intel LPSS core driver");
 MODULE_LICENSE("GPL v2");
+/*
+ * Ensure the DMA driver is loaded before the host controller device appears,
+ * so that the host controller driver can request its DMA channels as early
+ * as possible.
+ *
+ * If the DMA module is not there that's OK as well.
+ */
+MODULE_SOFTDEP("pre: platform:" LPSS_IDMA64_DRIVER_NAME);
diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c
index 6310c3bdb991..739cfb5b69fe 100644
--- a/drivers/mfd/intel_soc_pmic_bxtwc.c
+++ b/drivers/mfd/intel_soc_pmic_bxtwc.c
@@ -450,10 +450,8 @@ static int bxtwc_probe(struct platform_device *pdev)
                 return -ENOMEM;
 
         ret = platform_get_irq(pdev, 0);
-        if (ret < 0) {
-                dev_err(&pdev->dev, "Invalid IRQ\n");
+        if (ret < 0)
                 return ret;
-        }
         pmic->irq = ret;
 
         dev_set_drvdata(&pdev->dev, pmic);
diff --git a/drivers/mfd/intel_soc_pmic_mrfld.c b/drivers/mfd/intel_soc_pmic_mrfld.c
new file mode 100644
index 000000000000..26a1551c5faf
--- /dev/null
+++ b/drivers/mfd/intel_soc_pmic_mrfld.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device access for Basin Cove PMIC
+ *
+ * Copyright (c) 2019, Intel Corporation.
+ * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+ */
+
+#include <linux/acpi.h>
+#include <linux/interrupt.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/intel_soc_pmic.h>
+#include <linux/mfd/intel_soc_pmic_mrfld.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#include <asm/intel_scu_ipc.h>
+
+/*
+ * Level 2 IRQs
+ *
+ * Firmware on the systems with Basin Cove PMIC services Level 1 IRQs
+ * without an assistance. Thus, each of the Level 1 IRQ is represented
+ * as a separate RTE in IOAPIC.
+ */
+static struct resource irq_level2_resources[] = {
+        DEFINE_RES_IRQ(0), /* power button */
+        DEFINE_RES_IRQ(0), /* TMU */
+        DEFINE_RES_IRQ(0), /* thermal */
+        DEFINE_RES_IRQ(0), /* BCU */
+        DEFINE_RES_IRQ(0), /* ADC */
+        DEFINE_RES_IRQ(0), /* charger */
+        DEFINE_RES_IRQ(0), /* GPIO */
+};
+
+static const struct mfd_cell bcove_dev[] = {
+        {
+                .name = "mrfld_bcove_pwrbtn",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[0],
+        }, {
+                .name = "mrfld_bcove_tmu",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[1],
+        }, {
+                .name = "mrfld_bcove_thermal",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[2],
+        }, {
+                .name = "mrfld_bcove_bcu",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[3],
+        }, {
+                .name = "mrfld_bcove_adc",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[4],
+        }, {
+                .name = "mrfld_bcove_charger",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[5],
+        }, {
+                .name = "mrfld_bcove_pwrsrc",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[5],
+        }, {
+                .name = "mrfld_bcove_gpio",
+                .num_resources = 1,
+                .resources = &irq_level2_resources[6],
+        },
+        {       .name = "mrfld_bcove_region", },
+};
+
+static int bcove_ipc_byte_reg_read(void *context, unsigned int reg,
+                                    unsigned int *val)
+{
+        u8 ipc_out;
+        int ret;
+
+        ret = intel_scu_ipc_ioread8(reg, &ipc_out);
+        if (ret)
+                return ret;
+
+        *val = ipc_out;
+        return 0;
+}
+
+static int bcove_ipc_byte_reg_write(void *context, unsigned int reg,
+                                     unsigned int val)
+{
+        u8 ipc_in = val;
+        int ret;
+
+        ret = intel_scu_ipc_iowrite8(reg, ipc_in);
+        if (ret)
+                return ret;
+
+        return 0;
+}
+
+static const struct regmap_config bcove_regmap_config = {
+        .reg_bits = 16,
+        .val_bits = 8,
+        .max_register = 0xff,
+        .reg_write = bcove_ipc_byte_reg_write,
+        .reg_read = bcove_ipc_byte_reg_read,
+};
+
+static int bcove_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct intel_soc_pmic *pmic;
+        unsigned int i;
+        int ret;
+
+        pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
+        if (!pmic)
+                return -ENOMEM;
+
+        platform_set_drvdata(pdev, pmic);
+        pmic->dev = &pdev->dev;
+
+        pmic->regmap = devm_regmap_init(dev, NULL, pmic, &bcove_regmap_config);
+        if (IS_ERR(pmic->regmap))
+                return PTR_ERR(pmic->regmap);
+
+        for (i = 0; i < ARRAY_SIZE(irq_level2_resources); i++) {
+                ret = platform_get_irq(pdev, i);
+                if (ret < 0)
+                        return ret;
+
+                irq_level2_resources[i].start = ret;
+                irq_level2_resources[i].end = ret;
+        }
+
+        return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
+                                    bcove_dev, ARRAY_SIZE(bcove_dev),
+                                    NULL, 0, NULL);
+}
+
+static const struct acpi_device_id bcove_acpi_ids[] = {
+        { "INTC100E" },
+        {}
+};
+MODULE_DEVICE_TABLE(acpi, bcove_acpi_ids);
+
+static struct platform_driver bcove_driver = {
+        .driver = {
+                .name = "intel_soc_pmic_mrfld",
+                .acpi_match_table = bcove_acpi_ids,
+        },
+        .probe = bcove_probe,
+};
+module_platform_driver(bcove_driver);
+
+MODULE_DESCRIPTION("IPC driver for Intel SoC Basin Cove PMIC");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c
deleted file mode 100644
index 082f16917519..000000000000
--- a/drivers/mfd/jz4740-adc.c
+++ /dev/null
@@ -1,324 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 SoC ADC driver
- *
- * This driver synchronizes access to the JZ4740 ADC core between the
- * JZ4740 battery and hwmon drivers.
- */
-
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-
-#include <linux/clk.h>
-#include <linux/mfd/core.h>
-
-#include <linux/jz4740-adc.h>
-
-
-#define JZ_REG_ADC_ENABLE       0x00
-#define JZ_REG_ADC_CFG          0x04
-#define JZ_REG_ADC_CTRL         0x08
-#define JZ_REG_ADC_STATUS       0x0c
-
-#define JZ_REG_ADC_TOUCHSCREEN_BASE     0x10
-#define JZ_REG_ADC_BATTERY_BASE 0x1c
-#define JZ_REG_ADC_HWMON_BASE   0x20
-
-#define JZ_ADC_ENABLE_TOUCH     BIT(2)
-#define JZ_ADC_ENABLE_BATTERY   BIT(1)
-#define JZ_ADC_ENABLE_ADCIN     BIT(0)
-
-enum {
-        JZ_ADC_IRQ_ADCIN = 0,
-        JZ_ADC_IRQ_BATTERY,
-        JZ_ADC_IRQ_TOUCH,
-        JZ_ADC_IRQ_PENUP,
-        JZ_ADC_IRQ_PENDOWN,
-};
-
-struct jz4740_adc {
-        struct resource *mem;
-        void __iomem *base;
-
-        int irq;
-        struct irq_chip_generic *gc;
-
-        struct clk *clk;
-        atomic_t clk_ref;
-
-        spinlock_t lock;
-};
-
-static void jz4740_adc_irq_demux(struct irq_desc *desc)
-{
-        struct irq_chip_generic *gc = irq_desc_get_handler_data(desc);
-        uint8_t status;
-        unsigned int i;
-
-        status = readb(gc->reg_base + JZ_REG_ADC_STATUS);
-
-        for (i = 0; i < 5; ++i) {
-                if (status & BIT(i))
-                        generic_handle_irq(gc->irq_base + i);
-        }
-}
-
-
-/* Refcounting for the ADC clock is done in here instead of in the clock
- * framework, because it is the only clock which is shared between multiple
- * devices and thus is the only clock which needs refcounting */
-static inline void jz4740_adc_clk_enable(struct jz4740_adc *adc)
-{
-        if (atomic_inc_return(&adc->clk_ref) == 1)
-                clk_prepare_enable(adc->clk);
-}
-
-static inline void jz4740_adc_clk_disable(struct jz4740_adc *adc)
-{
-        if (atomic_dec_return(&adc->clk_ref) == 0)
-                clk_disable_unprepare(adc->clk);
-}
-
-static inline void jz4740_adc_set_enabled(struct jz4740_adc *adc, int engine,
-        bool enabled)
-{
-        unsigned long flags;
-        uint8_t val;
-
-        spin_lock_irqsave(&adc->lock, flags);
-
-        val = readb(adc->base + JZ_REG_ADC_ENABLE);
-        if (enabled)
-                val |= BIT(engine);
-        else
-                val &= ~BIT(engine);
-        writeb(val, adc->base + JZ_REG_ADC_ENABLE);
-
-        spin_unlock_irqrestore(&adc->lock, flags);
-}
-
-static int jz4740_adc_cell_enable(struct platform_device *pdev)
-{
-        struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent);
-
-        jz4740_adc_clk_enable(adc);
-        jz4740_adc_set_enabled(adc, pdev->id, true);
-
-        return 0;
-}
-
-static int jz4740_adc_cell_disable(struct platform_device *pdev)
-{
-        struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent);
-
-        jz4740_adc_set_enabled(adc, pdev->id, false);
-        jz4740_adc_clk_disable(adc);
-
-        return 0;
-}
-
-int jz4740_adc_set_config(struct device *dev, uint32_t mask, uint32_t val)
-{
-        struct jz4740_adc *adc = dev_get_drvdata(dev);
-        unsigned long flags;
-        uint32_t cfg;
-
-        if (!adc)
-                return -ENODEV;
-
-        spin_lock_irqsave(&adc->lock, flags);
-
-        cfg = readl(adc->base + JZ_REG_ADC_CFG);
-
-        cfg &= ~mask;
-        cfg |= val;
-
-        writel(cfg, adc->base + JZ_REG_ADC_CFG);
-
-        spin_unlock_irqrestore(&adc->lock, flags);
-
-        return 0;
-}
-EXPORT_SYMBOL_GPL(jz4740_adc_set_config);
-
-static struct resource jz4740_hwmon_resources[] = {
-        {
-                .start = JZ_ADC_IRQ_ADCIN,
-                .flags = IORESOURCE_IRQ,
-        },
-        {
-                .start  = JZ_REG_ADC_HWMON_BASE,
-                .end    = JZ_REG_ADC_HWMON_BASE + 3,
-                .flags  = IORESOURCE_MEM,
-        },
-};
-
-static struct resource jz4740_battery_resources[] = {
-        {
-                .start = JZ_ADC_IRQ_BATTERY,
-                .flags = IORESOURCE_IRQ,
-        },
-        {
-                .start  = JZ_REG_ADC_BATTERY_BASE,
-                .end    = JZ_REG_ADC_BATTERY_BASE + 3,
-                .flags  = IORESOURCE_MEM,
-        },
-};
-
-static const struct mfd_cell jz4740_adc_cells[] = {
-        {
-                .id = 0,
-                .name = "jz4740-hwmon",
-                .num_resources = ARRAY_SIZE(jz4740_hwmon_resources),
-                .resources = jz4740_hwmon_resources,
-
-                .enable = jz4740_adc_cell_enable,
-                .disable = jz4740_adc_cell_disable,
-        },
-        {
-                .id = 1,
-                .name = "jz4740-battery",
-                .num_resources = ARRAY_SIZE(jz4740_battery_resources),
-                .resources = jz4740_battery_resources,
-
-                .enable = jz4740_adc_cell_enable,
-                .disable = jz4740_adc_cell_disable,
-        },
-};
-
-static int jz4740_adc_probe(struct platform_device *pdev)
-{
-        struct irq_chip_generic *gc;
-        struct irq_chip_type *ct;
-        struct jz4740_adc *adc;
-        struct resource *mem_base;
-        int ret;
-        int irq_base;
-
-        adc = devm_kzalloc(&pdev->dev, sizeof(*adc), GFP_KERNEL);
-        if (!adc)
-                return -ENOMEM;
-
-        adc->irq = platform_get_irq(pdev, 0);
-        if (adc->irq < 0) {
-                ret = adc->irq;
-                dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
-                return ret;
-        }
-
-        irq_base = platform_get_irq(pdev, 1);
-        if (irq_base < 0) {
-                dev_err(&pdev->dev, "Failed to get irq base: %d\n", irq_base);
-                return irq_base;
-        }
-
-        mem_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (!mem_base) {
-                dev_err(&pdev->dev, "Failed to get platform mmio resource\n");
-                return -ENOENT;
-        }
-
-        /* Only request the shared registers for the MFD driver */
-        adc->mem = request_mem_region(mem_base->start, JZ_REG_ADC_STATUS,
-                                        pdev->name);
-        if (!adc->mem) {
-                dev_err(&pdev->dev, "Failed to request mmio memory region\n");
-                return -EBUSY;
-        }
-
-        adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem));
-        if (!adc->base) {
-                ret = -EBUSY;
-                dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
-                goto err_release_mem_region;
-        }
-
-        adc->clk = clk_get(&pdev->dev, "adc");
-        if (IS_ERR(adc->clk)) {
-                ret = PTR_ERR(adc->clk);
-                dev_err(&pdev->dev, "Failed to get clock: %d\n", ret);
-                goto err_iounmap;
-        }
-
-        spin_lock_init(&adc->lock);
-        atomic_set(&adc->clk_ref, 0);
-
-        platform_set_drvdata(pdev, adc);
-
-        gc = irq_alloc_generic_chip("INTC", 1, irq_base, adc->base,
-                handle_level_irq);
-
-        ct = gc->chip_types;
-        ct->regs.mask = JZ_REG_ADC_CTRL;
-        ct->regs.ack = JZ_REG_ADC_STATUS;
-        ct->chip.irq_mask = irq_gc_mask_set_bit;
-        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
-        ct->chip.irq_ack = irq_gc_ack_set_bit;
-
-        irq_setup_generic_chip(gc, IRQ_MSK(5), IRQ_GC_INIT_MASK_CACHE, 0,
-                                IRQ_NOPROBE | IRQ_LEVEL);
-
-        adc->gc = gc;
-
-        irq_set_chained_handler_and_data(adc->irq, jz4740_adc_irq_demux, gc);
-
-        writeb(0x00, adc->base + JZ_REG_ADC_ENABLE);
-        writeb(0xff, adc->base + JZ_REG_ADC_CTRL);
-
-        ret = mfd_add_devices(&pdev->dev, 0, jz4740_adc_cells,
-                              ARRAY_SIZE(jz4740_adc_cells), mem_base,
-                              irq_base, NULL);
-        if (ret < 0)
-                goto err_clk_put;
-
-        return 0;
-
-err_clk_put:
-        clk_put(adc->clk);
-err_iounmap:
-        iounmap(adc->base);
-err_release_mem_region:
-        release_mem_region(adc->mem->start, resource_size(adc->mem));
-        return ret;
-}
-
-static int jz4740_adc_remove(struct platform_device *pdev)
-{
-        struct jz4740_adc *adc = platform_get_drvdata(pdev);
-
-        mfd_remove_devices(&pdev->dev);
-
-        irq_remove_generic_chip(adc->gc, IRQ_MSK(5), IRQ_NOPROBE | IRQ_LEVEL, 0);
-        kfree(adc->gc);
-        irq_set_chained_handler_and_data(adc->irq, NULL, NULL);
-
-        iounmap(adc->base);
-        release_mem_region(adc->mem->start, resource_size(adc->mem));
-
-        clk_put(adc->clk);
-
-        return 0;
-}
-
-static struct platform_driver jz4740_adc_driver = {
-        .probe  = jz4740_adc_probe,
-        .remove = jz4740_adc_remove,
-        .driver = {
-                .name = "jz4740-adc",
-        },
-};
-
-module_platform_driver(jz4740_adc_driver);
-
-MODULE_DESCRIPTION("JZ4740 SoC ADC driver");
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:jz4740-adc");
diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c
index ebb13d5de530..fd8864cafd25 100644
--- a/drivers/mfd/max14577.c
+++ b/drivers/mfd/max14577.c
@@ -297,11 +297,11 @@ static int max77836_init(struct max14577 *max14577)
         int ret;
         u8 intsrc_mask;
 
-        max14577->i2c_pmic = i2c_new_dummy(max14577->i2c->adapter,
+        max14577->i2c_pmic = i2c_new_dummy_device(max14577->i2c->adapter,
                         I2C_ADDR_PMIC);
-        if (!max14577->i2c_pmic) {
+        if (IS_ERR(max14577->i2c_pmic)) {
                 dev_err(max14577->dev, "Failed to register PMIC I2C device\n");
-                return -ENODEV;
+                return PTR_ERR(max14577->i2c_pmic);
         }
         i2c_set_clientdata(max14577->i2c_pmic, max14577);
 
diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c
index 0c28965fcc6a..a851ff473a44 100644
--- a/drivers/mfd/max77620.c
+++ b/drivers/mfd/max77620.c
@@ -416,8 +416,10 @@ static int max77620_initialise_fps(struct max77620_chip *chip)
 
         for_each_child_of_node(fps_np, fps_child) {
                 ret = max77620_config_fps(chip, fps_child);
-                if (ret < 0)
+                if (ret < 0) {
+                        of_node_put(fps_child);
                         return ret;
+                }
         }
 
         config = chip->enable_global_lpm ? MAX77620_ONOFFCNFG2_SLP_LPM_MSK : 0;
diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c
index 901d99d65924..596ed85cab3b 100644
--- a/drivers/mfd/max77693.c
+++ b/drivers/mfd/max77693.c
@@ -183,17 +183,17 @@ static int max77693_i2c_probe(struct i2c_client *i2c,
         } else
                 dev_info(max77693->dev, "device ID: 0x%x\n", reg_data);
 
-        max77693->i2c_muic = i2c_new_dummy(i2c->adapter, I2C_ADDR_MUIC);
-        if (!max77693->i2c_muic) {
+        max77693->i2c_muic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_MUIC);
+        if (IS_ERR(max77693->i2c_muic)) {
                 dev_err(max77693->dev, "Failed to allocate I2C device for MUIC\n");
-                return -ENODEV;
+                return PTR_ERR(max77693->i2c_muic);
         }
         i2c_set_clientdata(max77693->i2c_muic, max77693);
 
-        max77693->i2c_haptic = i2c_new_dummy(i2c->adapter, I2C_ADDR_HAPTIC);
-        if (!max77693->i2c_haptic) {
+        max77693->i2c_haptic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_HAPTIC);
+        if (IS_ERR(max77693->i2c_haptic)) {
                 dev_err(max77693->dev, "Failed to allocate I2C device for Haptic\n");
-                ret = -ENODEV;
+                ret = PTR_ERR(max77693->i2c_haptic);
                 goto err_i2c_haptic;
         }
         i2c_set_clientdata(max77693->i2c_haptic, max77693);
diff --git a/drivers/mfd/max77843.c b/drivers/mfd/max77843.c
index 25cbb2242b26..209ee24d9ce1 100644
--- a/drivers/mfd/max77843.c
+++ b/drivers/mfd/max77843.c
@@ -70,11 +70,11 @@ static int max77843_chg_init(struct max77693_dev *max77843)
 {
         int ret;
 
-        max77843->i2c_chg = i2c_new_dummy(max77843->i2c->adapter, I2C_ADDR_CHG);
-        if (!max77843->i2c_chg) {
+        max77843->i2c_chg = i2c_new_dummy_device(max77843->i2c->adapter, I2C_ADDR_CHG);
+        if (IS_ERR(max77843->i2c_chg)) {
                 dev_err(&max77843->i2c->dev,
                                 "Cannot allocate I2C device for Charger\n");
-                return -ENODEV;
+                return PTR_ERR(max77843->i2c_chg);
         }
         i2c_set_clientdata(max77843->i2c_chg, max77843);
 
diff --git a/drivers/mfd/max8907.c b/drivers/mfd/max8907.c
index cc01f706cb32..d44baafd9d14 100644
--- a/drivers/mfd/max8907.c
+++ b/drivers/mfd/max8907.c
@@ -214,9 +214,9 @@ static int max8907_i2c_probe(struct i2c_client *i2c,
                 goto err_regmap_gen;
         }
 
-        max8907->i2c_rtc = i2c_new_dummy(i2c->adapter, MAX8907_RTC_I2C_ADDR);
-        if (!max8907->i2c_rtc) {
-                ret = -ENOMEM;
+        max8907->i2c_rtc = i2c_new_dummy_device(i2c->adapter, MAX8907_RTC_I2C_ADDR);
+        if (IS_ERR(max8907->i2c_rtc)) {
+                ret = PTR_ERR(max8907->i2c_rtc);
                 goto err_dummy_rtc;
         }
         i2c_set_clientdata(max8907->i2c_rtc, max8907);
diff --git a/drivers/mfd/max8925-i2c.c b/drivers/mfd/max8925-i2c.c
index 20bb19b71109..114e905bef25 100644
--- a/drivers/mfd/max8925-i2c.c
+++ b/drivers/mfd/max8925-i2c.c
@@ -176,18 +176,18 @@ static int max8925_probe(struct i2c_client *client,
         dev_set_drvdata(chip->dev, chip);
         mutex_init(&chip->io_lock);
 
-        chip->rtc = i2c_new_dummy(chip->i2c->adapter, RTC_I2C_ADDR);
-        if (!chip->rtc) {
+        chip->rtc = i2c_new_dummy_device(chip->i2c->adapter, RTC_I2C_ADDR);
+        if (IS_ERR(chip->rtc)) {
                 dev_err(chip->dev, "Failed to allocate I2C device for RTC\n");
-                return -ENODEV;
+                return PTR_ERR(chip->rtc);
         }
         i2c_set_clientdata(chip->rtc, chip);
 
-        chip->adc = i2c_new_dummy(chip->i2c->adapter, ADC_I2C_ADDR);
-        if (!chip->adc) {
+        chip->adc = i2c_new_dummy_device(chip->i2c->adapter, ADC_I2C_ADDR);
+        if (IS_ERR(chip->adc)) {
                 dev_err(chip->dev, "Failed to allocate I2C device for ADC\n");
                 i2c_unregister_device(chip->rtc);
-                return -ENODEV;
+                return PTR_ERR(chip->adc);
         }
         i2c_set_clientdata(chip->adc, chip);
 
diff --git a/drivers/mfd/max8997.c b/drivers/mfd/max8997.c
index 8c06c09e36d1..68d8f2b95287 100644
--- a/drivers/mfd/max8997.c
+++ b/drivers/mfd/max8997.c
@@ -185,25 +185,25 @@ static int max8997_i2c_probe(struct i2c_client *i2c,
 
         mutex_init(&max8997->iolock);
 
-        max8997->rtc = i2c_new_dummy(i2c->adapter, I2C_ADDR_RTC);
-        if (!max8997->rtc) {
+        max8997->rtc = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_RTC);
+        if (IS_ERR(max8997->rtc)) {
                 dev_err(max8997->dev, "Failed to allocate I2C device for RTC\n");
-                return -ENODEV;
+                return PTR_ERR(max8997->rtc);
         }
         i2c_set_clientdata(max8997->rtc, max8997);
 
-        max8997->haptic = i2c_new_dummy(i2c->adapter, I2C_ADDR_HAPTIC);
-        if (!max8997->haptic) {
+        max8997->haptic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_HAPTIC);
+        if (IS_ERR(max8997->haptic)) {
                 dev_err(max8997->dev, "Failed to allocate I2C device for Haptic\n");
-                ret = -ENODEV;
+                ret = PTR_ERR(max8997->haptic);
                 goto err_i2c_haptic;
         }
         i2c_set_clientdata(max8997->haptic, max8997);
 
-        max8997->muic = i2c_new_dummy(i2c->adapter, I2C_ADDR_MUIC);
-        if (!max8997->muic) {
+        max8997->muic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_MUIC);
+        if (IS_ERR(max8997->muic)) {
                 dev_err(max8997->dev, "Failed to allocate I2C device for MUIC\n");
-                ret = -ENODEV;
+                ret = PTR_ERR(max8997->muic);
                 goto err_i2c_muic;
         }
         i2c_set_clientdata(max8997->muic, max8997);
diff --git a/drivers/mfd/max8998.c b/drivers/mfd/max8998.c
index 56409df120f8..785f8e9841b7 100644
--- a/drivers/mfd/max8998.c
+++ b/drivers/mfd/max8998.c
@@ -195,10 +195,10 @@ static int max8998_i2c_probe(struct i2c_client *i2c,
         }
         mutex_init(&max8998->iolock);
 
-        max8998->rtc = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR);
-        if (!max8998->rtc) {
+        max8998->rtc = i2c_new_dummy_device(i2c->adapter, RTC_I2C_ADDR);
+        if (IS_ERR(max8998->rtc)) {
                 dev_err(&i2c->dev, "Failed to allocate I2C device for RTC\n");
-                return -ENODEV;
+                return PTR_ERR(max8998->rtc);
         }
         i2c_set_clientdata(max8998->rtc, max8998);
 
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index 337bcccdb914..310dae26ddff 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -5,34 +5,34 @@
  */
 
 #include <linux/interrupt.h>
+#include <linux/ioport.h>
 #include <linux/module.h>
 #include <linux/of_device.h>
 #include <linux/of_irq.h>
 #include <linux/regmap.h>
 #include <linux/mfd/core.h>
-#include <linux/mfd/mt6397/core.h>
 #include <linux/mfd/mt6323/core.h>
-#include <linux/mfd/mt6397/registers.h>
+#include <linux/mfd/mt6397/core.h>
 #include <linux/mfd/mt6323/registers.h>
+#include <linux/mfd/mt6397/registers.h>
+
+#define MT6323_RTC_BASE         0x8000
+#define MT6323_RTC_SIZE         0x40
 
 #define MT6397_RTC_BASE         0xe000
 #define MT6397_RTC_SIZE         0x3e
 
-#define MT6323_CID_CODE         0x23
-#define MT6391_CID_CODE         0x91
-#define MT6397_CID_CODE         0x97
+#define MT6323_PWRC_BASE        0x8000
+#define MT6323_PWRC_SIZE        0x40
+
+static const struct resource mt6323_rtc_resources[] = {
+        DEFINE_RES_MEM(MT6323_RTC_BASE, MT6323_RTC_SIZE),
+        DEFINE_RES_IRQ(MT6323_IRQ_STATUS_RTC),
+};
 
 static const struct resource mt6397_rtc_resources[] = {
-        {
-                .start = MT6397_RTC_BASE,
-                .end   = MT6397_RTC_BASE + MT6397_RTC_SIZE,
-                .flags = IORESOURCE_MEM,
-        },
-        {
-                .start = MT6397_IRQ_RTC,
-                .end   = MT6397_IRQ_RTC,
-                .flags = IORESOURCE_IRQ,
-        },
+        DEFINE_RES_MEM(MT6397_RTC_BASE, MT6397_RTC_SIZE),
+        DEFINE_RES_IRQ(MT6397_IRQ_RTC),
 };
 
 static const struct resource mt6323_keys_resources[] = {
@@ -45,8 +45,17 @@ static const struct resource mt6397_keys_resources[] = {
         DEFINE_RES_IRQ(MT6397_IRQ_HOMEKEY),
 };
 
+static const struct resource mt6323_pwrc_resources[] = {
+        DEFINE_RES_MEM(MT6323_PWRC_BASE, MT6323_PWRC_SIZE),
+};
+
 static const struct mfd_cell mt6323_devs[] = {
         {
+                .name = "mt6323-rtc",
+                .num_resources = ARRAY_SIZE(mt6323_rtc_resources),
+                .resources = mt6323_rtc_resources,
+                .of_compatible = "mediatek,mt6323-rtc",
+        }, {
                 .name = "mt6323-regulator",
                 .of_compatible = "mediatek,mt6323-regulator"
         }, {
@@ -57,6 +66,11 @@ static const struct mfd_cell mt6323_devs[] = {
                 .num_resources = ARRAY_SIZE(mt6323_keys_resources),
                 .resources = mt6323_keys_resources,
                 .of_compatible = "mediatek,mt6323-keys"
+        }, {
+                .name = "mt6323-pwrc",
+                .num_resources = ARRAY_SIZE(mt6323_pwrc_resources),
+                .resources = mt6323_pwrc_resources,
+                .of_compatible = "mediatek,mt6323-pwrc"
         },
 };
 
@@ -86,148 +100,6 @@ static const struct mfd_cell mt6397_devs[] = {
         }
 };
 
-static void mt6397_irq_lock(struct irq_data *data)
-{
-        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
-
-        mutex_lock(&mt6397->irqlock);
-}
-
-static void mt6397_irq_sync_unlock(struct irq_data *data)
-{
-        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
-
-        regmap_write(mt6397->regmap, mt6397->int_con[0],
-                     mt6397->irq_masks_cur[0]);
-        regmap_write(mt6397->regmap, mt6397->int_con[1],
-                     mt6397->irq_masks_cur[1]);
-
-        mutex_unlock(&mt6397->irqlock);
-}
-
-static void mt6397_irq_disable(struct irq_data *data)
-{
-        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
-        int shift = data->hwirq & 0xf;
-        int reg = data->hwirq >> 4;
-
-        mt6397->irq_masks_cur[reg] &= ~BIT(shift);
-}
-
-static void mt6397_irq_enable(struct irq_data *data)
-{
-        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
-        int shift = data->hwirq & 0xf;
-        int reg = data->hwirq >> 4;
-
-        mt6397->irq_masks_cur[reg] |= BIT(shift);
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
-{
-        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
-        int shift = irq_data->hwirq & 0xf;
-        int reg = irq_data->hwirq >> 4;
-
-        if (on)
-                mt6397->wake_mask[reg] |= BIT(shift);
-        else
-                mt6397->wake_mask[reg] &= ~BIT(shift);
-
-        return 0;
-}
-#else
-#define mt6397_irq_set_wake NULL
-#endif
-
-static struct irq_chip mt6397_irq_chip = {
-        .name = "mt6397-irq",
-        .irq_bus_lock = mt6397_irq_lock,
-        .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
-        .irq_enable = mt6397_irq_enable,
-        .irq_disable = mt6397_irq_disable,
-        .irq_set_wake = mt6397_irq_set_wake,
-};
-
-static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
-                int irqbase)
-{
-        unsigned int status;
-        int i, irq, ret;
-
-        ret = regmap_read(mt6397->regmap, reg, &status);
-        if (ret) {
-                dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
-                return;
-        }
-
-        for (i = 0; i < 16; i++) {
-                if (status & BIT(i)) {
-                        irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
-                        if (irq)
-                                handle_nested_irq(irq);
-                }
-        }
-
-        regmap_write(mt6397->regmap, reg, status);
-}
-
-static irqreturn_t mt6397_irq_thread(int irq, void *data)
-{
-        struct mt6397_chip *mt6397 = data;
-
-        mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
-        mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
-
-        return IRQ_HANDLED;
-}
-
-static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
-                                        irq_hw_number_t hw)
-{
-        struct mt6397_chip *mt6397 = d->host_data;
-
-        irq_set_chip_data(irq, mt6397);
-        irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
-        irq_set_nested_thread(irq, 1);
-        irq_set_noprobe(irq);
-
-        return 0;
-}
-
-static const struct irq_domain_ops mt6397_irq_domain_ops = {
-        .map = mt6397_irq_domain_map,
-};
-
-static int mt6397_irq_init(struct mt6397_chip *mt6397)
-{
-        int ret;
-
-        mutex_init(&mt6397->irqlock);
-
-        /* Mask all interrupt sources */
-        regmap_write(mt6397->regmap, mt6397->int_con[0], 0x0);
-        regmap_write(mt6397->regmap, mt6397->int_con[1], 0x0);
-
-        mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
-                MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
-        if (!mt6397->irq_domain) {
-                dev_err(mt6397->dev, "could not create irq domain\n");
-                return -ENOMEM;
-        }
-
-        ret = devm_request_threaded_irq(mt6397->dev, mt6397->irq, NULL,
-                mt6397_irq_thread, IRQF_ONESHOT, "mt6397-pmic", mt6397);
-        if (ret) {
-                dev_err(mt6397->dev, "failed to register irq=%d; err: %d\n",
-                        mt6397->irq, ret);
-                return ret;
-        }
-
-        return 0;
-}
-
 #ifdef CONFIG_PM_SLEEP
 static int mt6397_irq_suspend(struct device *dev)
 {
@@ -290,7 +162,7 @@ static int mt6397_probe(struct platform_device *pdev)
                 return pmic->irq;
 
         switch (id & 0xff) {
-        case MT6323_CID_CODE:
+        case MT6323_CHIP_ID:
                 pmic->int_con[0] = MT6323_INT_CON0;
                 pmic->int_con[1] = MT6323_INT_CON1;
                 pmic->int_status[0] = MT6323_INT_STATUS0;
@@ -304,8 +176,8 @@ static int mt6397_probe(struct platform_device *pdev)
                                            0, pmic->irq_domain);
                 break;
 
-        case MT6397_CID_CODE:
-        case MT6391_CID_CODE:
+        case MT6391_CHIP_ID:
+        case MT6397_CHIP_ID:
                 pmic->int_con[0] = MT6397_INT_CON0;
                 pmic->int_con[1] = MT6397_INT_CON1;
                 pmic->int_status[0] = MT6397_INT_STATUS0;
diff --git a/drivers/mfd/mt6397-irq.c b/drivers/mfd/mt6397-irq.c
new file mode 100644
index 000000000000..b2d3ce1f3115
--- /dev/null
+++ b/drivers/mfd/mt6397-irq.c
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (c) 2019 MediaTek Inc.
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/mfd/mt6323/core.h>
+#include <linux/mfd/mt6323/registers.h>
+#include <linux/mfd/mt6397/core.h>
+#include <linux/mfd/mt6397/registers.h>
+
+static void mt6397_irq_lock(struct irq_data *data)
+{
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
+
+        mutex_lock(&mt6397->irqlock);
+}
+
+static void mt6397_irq_sync_unlock(struct irq_data *data)
+{
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
+
+        regmap_write(mt6397->regmap, mt6397->int_con[0],
+                     mt6397->irq_masks_cur[0]);
+        regmap_write(mt6397->regmap, mt6397->int_con[1],
+                     mt6397->irq_masks_cur[1]);
+
+        mutex_unlock(&mt6397->irqlock);
+}
+
+static void mt6397_irq_disable(struct irq_data *data)
+{
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
+        int shift = data->hwirq & 0xf;
+        int reg = data->hwirq >> 4;
+
+        mt6397->irq_masks_cur[reg] &= ~BIT(shift);
+}
+
+static void mt6397_irq_enable(struct irq_data *data)
+{
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
+        int shift = data->hwirq & 0xf;
+        int reg = data->hwirq >> 4;
+
+        mt6397->irq_masks_cur[reg] |= BIT(shift);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
+{
+        struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
+        int shift = irq_data->hwirq & 0xf;
+        int reg = irq_data->hwirq >> 4;
+
+        if (on)
+                mt6397->wake_mask[reg] |= BIT(shift);
+        else
+                mt6397->wake_mask[reg] &= ~BIT(shift);
+
+        return 0;
+}
+#else
+#define mt6397_irq_set_wake NULL
+#endif
+
+static struct irq_chip mt6397_irq_chip = {
+        .name = "mt6397-irq",
+        .irq_bus_lock = mt6397_irq_lock,
+        .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
+        .irq_enable = mt6397_irq_enable,
+        .irq_disable = mt6397_irq_disable,
+        .irq_set_wake = mt6397_irq_set_wake,
+};
+
+static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
+                                  int irqbase)
+{
+        unsigned int status;
+        int i, irq, ret;
+
+        ret = regmap_read(mt6397->regmap, reg, &status);
+        if (ret) {
+                dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
+                return;
+        }
+
+        for (i = 0; i < 16; i++) {
+                if (status & BIT(i)) {
+                        irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
+                        if (irq)
+                                handle_nested_irq(irq);
+                }
+        }
+
+        regmap_write(mt6397->regmap, reg, status);
+}
+
+static irqreturn_t mt6397_irq_thread(int irq, void *data)
+{
+        struct mt6397_chip *mt6397 = data;
+
+        mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
+        mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
+
+        return IRQ_HANDLED;
+}
+
+static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
+                                 irq_hw_number_t hw)
+{
+        struct mt6397_chip *mt6397 = d->host_data;
+
+        irq_set_chip_data(irq, mt6397);
+        irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
+        irq_set_nested_thread(irq, 1);
+        irq_set_noprobe(irq);
+
+        return 0;
+}
+
+static const struct irq_domain_ops mt6397_irq_domain_ops = {
+        .map = mt6397_irq_domain_map,
+};
+
+int mt6397_irq_init(struct mt6397_chip *chip)
+{
+        int ret;
+
+        mutex_init(&chip->irqlock);
+
+        switch (chip->chip_id) {
+        case MT6323_CHIP_ID:
+                chip->int_con[0] = MT6323_INT_CON0;
+                chip->int_con[1] = MT6323_INT_CON1;
+                chip->int_status[0] = MT6323_INT_STATUS0;
+                chip->int_status[1] = MT6323_INT_STATUS1;
+                break;
+
+        case MT6391_CHIP_ID:
+        case MT6397_CHIP_ID:
+                chip->int_con[0] = MT6397_INT_CON0;
+                chip->int_con[1] = MT6397_INT_CON1;
+                chip->int_status[0] = MT6397_INT_STATUS0;
+                chip->int_status[1] = MT6397_INT_STATUS1;
+                break;
+
+        default:
+                dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
+                return -ENODEV;
+        }
+
+        /* Mask all interrupt sources */
+        regmap_write(chip->regmap, chip->int_con[0], 0x0);
+        regmap_write(chip->regmap, chip->int_con[1], 0x0);
+
+        chip->irq_domain = irq_domain_add_linear(chip->dev->of_node,
+                                                 MT6397_IRQ_NR,
+                                                 &mt6397_irq_domain_ops,
+                                                 chip);
+        if (!chip->irq_domain) {
+                dev_err(chip->dev, "could not create irq domain\n");
+                return -ENOMEM;
+        }
+
+        ret = devm_request_threaded_irq(chip->dev, chip->irq, NULL,
+                                        mt6397_irq_thread, IRQF_ONESHOT,
+                                        "mt6397-pmic", chip);
+        if (ret) {
+                dev_err(chip->dev, "failed to register irq=%d; err: %d\n",
+                        chip->irq, ret);
+                return ret;
+        }
+
+        return 0;
+}
diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c
index 6818ff34837c..f5b3fa973b13 100644
--- a/drivers/mfd/palmas.c
+++ b/drivers/mfd/palmas.c
@@ -549,12 +549,12 @@ static int palmas_i2c_probe(struct i2c_client *i2c,
                         palmas->i2c_clients[i] = i2c;
                 else {
                         palmas->i2c_clients[i] =
-                                        i2c_new_dummy(i2c->adapter,
+                                        i2c_new_dummy_device(i2c->adapter,
                                                         i2c->addr + i);
-                        if (!palmas->i2c_clients[i]) {
+                        if (IS_ERR(palmas->i2c_clients[i])) {
                                 dev_err(palmas->dev,
                                         "can't attach client %d\n", i);
-                                ret = -ENOMEM;
+                                ret = PTR_ERR(palmas->i2c_clients[i]);
                                 goto err_i2c;
                         }
                         palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
diff --git a/drivers/mfd/qcom_rpm.c b/drivers/mfd/qcom_rpm.c
index 4d7e9008628c..71bc34b74bc9 100644
--- a/drivers/mfd/qcom_rpm.c
+++ b/drivers/mfd/qcom_rpm.c
@@ -561,22 +561,16 @@ static int qcom_rpm_probe(struct platform_device *pdev)
         clk_prepare_enable(rpm->ramclk); /* Accepts NULL */
 
         irq_ack = platform_get_irq_byname(pdev, "ack");
-        if (irq_ack < 0) {
-                dev_err(&pdev->dev, "required ack interrupt missing\n");
+        if (irq_ack < 0)
                 return irq_ack;
-        }
 
         irq_err = platform_get_irq_byname(pdev, "err");
-        if (irq_err < 0) {
-                dev_err(&pdev->dev, "required err interrupt missing\n");
+        if (irq_err < 0)
                 return irq_err;
-        }
 
         irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
-        if (irq_wakeup < 0) {
-                dev_err(&pdev->dev, "required wakeup interrupt missing\n");
+        if (irq_wakeup < 0)
                 return irq_wakeup;
-        }
 
         match = of_match_device(qcom_rpm_of_match, &pdev->dev);
         if (!match)
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index 9b9b06d36cb1..154270f8d8d7 100644
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -17,6 +17,7 @@
 #include <linux/platform_device.h>
 #include <linux/pci.h>
 #include <linux/platform_data/i2c-gpio.h>
+#include <linux/gpio/driver.h>
 #include <linux/gpio/machine.h>
 #include <linux/slab.h>
 
@@ -1394,10 +1395,8 @@ static int sm501_plat_probe(struct platform_device *dev)
         sm->platdata = dev_get_platdata(&dev->dev);
 
         ret = platform_get_irq(dev, 0);
-        if (ret < 0) {
-                dev_err(&dev->dev, "failed to get irq resource\n");
+        if (ret < 0)
                 goto err_res;
-        }
         sm->irq = ret;
 
         sm->io_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c
index 60c122e9b39f..faecbca6dba3 100644
--- a/drivers/mfd/timberdale.c
+++ b/drivers/mfd/timberdale.c
@@ -626,8 +626,7 @@ static const struct mfd_cell timberdale_cells_bar2[] = {
 static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr,
         char *buf)
 {
-        struct pci_dev *pdev = to_pci_dev(dev);
-        struct timberdale_device *priv = pci_get_drvdata(pdev);
+        struct timberdale_device *priv = dev_get_drvdata(dev);
 
         return sprintf(buf, "%d.%d.%d\n", priv->fw.major, priv->fw.minor,
                 priv->fw.config);
diff --git a/drivers/mfd/tps80031.c b/drivers/mfd/tps80031.c
index 865257ade8ac..907452b86e32 100644
--- a/drivers/mfd/tps80031.c
+++ b/drivers/mfd/tps80031.c
@@ -437,12 +437,11 @@ static int tps80031_probe(struct i2c_client *client,
                 if (tps80031_slave_address[i] == client->addr)
                         tps80031->clients[i] = client;
                 else
-                        tps80031->clients[i] = i2c_new_dummy(client->adapter,
-                                                tps80031_slave_address[i]);
-                if (!tps80031->clients[i]) {
+                        tps80031->clients[i] = devm_i2c_new_dummy_device(&client->dev,
+                                                client->adapter, tps80031_slave_address[i]);
+                if (IS_ERR(tps80031->clients[i])) {
                         dev_err(&client->dev, "can't attach client %d\n", i);
-                        ret = -ENOMEM;
-                        goto fail_client_reg;
+                        return PTR_ERR(tps80031->clients[i]);
                 }
 
                 i2c_set_clientdata(tps80031->clients[i], tps80031);
@@ -452,7 +451,7 @@ static int tps80031_probe(struct i2c_client *client,
                         ret = PTR_ERR(tps80031->regmap[i]);
                         dev_err(&client->dev,
                                 "regmap %d init failed, err %d\n", i, ret);
-                        goto fail_client_reg;
+                        return ret;
                 }
         }
 
@@ -461,7 +460,7 @@ static int tps80031_probe(struct i2c_client *client,
         if (ret < 0) {
                 dev_err(&client->dev,
                         "Silicon version number read failed: %d\n", ret);
-                goto fail_client_reg;
+                return ret;
         }
 
         ret = tps80031_read(&client->dev, TPS80031_SLAVE_ID3,
@@ -469,7 +468,7 @@ static int tps80031_probe(struct i2c_client *client,
         if (ret < 0) {
                 dev_err(&client->dev,
                         "Silicon eeprom version read failed: %d\n", ret);
-                goto fail_client_reg;
+                return ret;
         }
 
         dev_info(&client->dev, "ES version 0x%02x and EPROM version 0x%02x\n",
@@ -482,7 +481,7 @@ static int tps80031_probe(struct i2c_client *client,
         ret = tps80031_irq_init(tps80031, client->irq, pdata->irq_base);
         if (ret) {
                 dev_err(&client->dev, "IRQ init failed: %d\n", ret);
-                goto fail_client_reg;
+                return ret;
         }
 
         tps80031_pupd_init(tps80031, pdata);
@@ -506,12 +505,6 @@ static int tps80031_probe(struct i2c_client *client,
 
 fail_mfd_add:
         regmap_del_irq_chip(client->irq, tps80031->irq_data);
-
-fail_client_reg:
-        for (i = 0; i < TPS80031_NUM_SLAVES; i++) {
-                if (tps80031->clients[i]  && (tps80031->clients[i] != client))
-                        i2c_unregister_device(tps80031->clients[i]);
-        }
         return ret;
 }
 
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 448d9397ff04..20cf8cfe4f3b 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -1141,12 +1141,12 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
                 if (i == 0) {
                         twl->client = client;
                 } else {
-                        twl->client = i2c_new_dummy(client->adapter,
+                        twl->client = i2c_new_dummy_device(client->adapter,
                                                     client->addr + i);
-                        if (!twl->client) {
+                        if (IS_ERR(twl->client)) {
                                 dev_err(&client->dev,
                                         "can't attach client %d\n", i);
-                                status = -ENOMEM;
+                                status = PTR_ERR(twl->client);
                                 goto fail;
                         }
                 }
diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h
index 34cd67951aec..6c51b1bad8c4 100644
--- a/drivers/net/ethernet/intel/e1000e/e1000.h
+++ b/drivers/net/ethernet/intel/e1000e/e1000.h
@@ -13,7 +13,6 @@
 #include <linux/io.h>
 #include <linux/netdevice.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/crc32.h>
 #include <linux/if_vlan.h>
 #include <linux/timecounter.h>
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c
index 6d52cf5ce20e..25aa400e2e3c 100644
--- a/drivers/net/ethernet/jme.c
+++ b/drivers/net/ethernet/jme.c
@@ -14,7 +14,6 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
 #include <linux/ethtool.h>
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index 0ef01db1f8b8..74f81fe03810 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -28,7 +28,6 @@
 #include <linux/dma-mapping.h>
 #include <linux/pm_runtime.h>
 #include <linux/prefetch.h>
-#include <linux/pci-aspm.h>
 #include <linux/ipv6.h>
 #include <net/ip6_checksum.h>
 
diff --git a/drivers/net/wireless/ath/ath5k/pci.c b/drivers/net/wireless/ath/ath5k/pci.c
index c6156cc38940..d5ee32ce9eb3 100644
--- a/drivers/net/wireless/ath/ath5k/pci.c
+++ b/drivers/net/wireless/ath/ath5k/pci.c
@@ -18,7 +18,6 @@
 
 #include <linux/nl80211.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/etherdevice.h>
 #include <linux/module.h>
 #include "../ath.h"
diff --git a/drivers/net/wireless/intel/iwlegacy/3945-mac.c b/drivers/net/wireless/intel/iwlegacy/3945-mac.c
index b82da75a9ae3..4fbcc7fba3cc 100644
--- a/drivers/net/wireless/intel/iwlegacy/3945-mac.c
+++ b/drivers/net/wireless/intel/iwlegacy/3945-mac.c
@@ -18,7 +18,6 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/slab.h>
 #include <linux/dma-mapping.h>
 #include <linux/delay.h>
diff --git a/drivers/net/wireless/intel/iwlegacy/4965-mac.c b/drivers/net/wireless/intel/iwlegacy/4965-mac.c
index fa2c02881939..ffb705b18fb1 100644
--- a/drivers/net/wireless/intel/iwlegacy/4965-mac.c
+++ b/drivers/net/wireless/intel/iwlegacy/4965-mac.c
@@ -18,7 +18,6 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/slab.h>
 #include <linux/dma-mapping.h>
 #include <linux/delay.h>
diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
index 5ab87a8dc907..f8a1f985a1d8 100644
--- a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
@@ -62,7 +62,6 @@
  *
  *****************************************************************************/
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/interrupt.h>
 #include <linux/debugfs.h>
 #include <linux/sched.h>
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 6b4d7b064b38..c0808f9eb8ab 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -549,8 +549,10 @@ static void nvme_unmap_data(struct nvme_dev *dev, struct request *req)
 
         WARN_ON_ONCE(!iod->nents);
 
-        /* P2PDMA requests do not need to be unmapped */
-        if (!is_pci_p2pdma_page(sg_page(iod->sg)))
+        if (is_pci_p2pdma_page(sg_page(iod->sg)))
+                pci_p2pdma_unmap_sg(dev->dev, iod->sg, iod->nents,
+                                    rq_dma_dir(req));
+        else
                 dma_unmap_sg(dev->dev, iod->sg, iod->nents, rq_dma_dir(req));
 
 
@@ -834,8 +836,8 @@ static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *req,
                 goto out;
 
         if (is_pci_p2pdma_page(sg_page(iod->sg)))
-                nr_mapped = pci_p2pdma_map_sg(dev->dev, iod->sg, iod->nents,
-                                              rq_dma_dir(req));
+                nr_mapped = pci_p2pdma_map_sg_attrs(dev->dev, iod->sg,
+                                iod->nents, rq_dma_dir(req), DMA_ATTR_NO_WARN);
         else
                 nr_mapped = dma_map_sg_attrs(dev->dev, iod->sg, iod->nents,
                                              rq_dma_dir(req), DMA_ATTR_NO_WARN);
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index c313de96a357..a304f5ea11b9 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -52,7 +52,7 @@ config PCI_MSI
            If you don't know what to do here, say Y.
 
 config PCI_MSI_IRQ_DOMAIN
-        def_bool ARC || ARM || ARM64 || X86
+        def_bool ARC || ARM || ARM64 || X86 || RISCV
         depends on PCI_MSI
         select GENERIC_MSI_IRQ_DOMAIN
 
@@ -170,7 +170,7 @@ config PCI_P2PDMA
 
           Many PCIe root complexes do not support P2P transactions and
           it's hard to tell which support it at all, so at this time,
-          P2P DMA transations must be between devices behind the same root
+          P2P DMA transactions must be between devices behind the same root
           port.
 
           If unsure, say N.
@@ -181,7 +181,7 @@ config PCI_LABEL
 
 config PCI_HYPERV
         tristate "Hyper-V PCI Frontend"
-        depends on X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && X86_64
+        depends on X86_64 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && SYSFS
         select PCI_HYPERV_INTERFACE
         help
           The PCI device frontend driver allows the kernel to import arbitrary
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 544922f097c0..2fccb5762c76 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -336,15 +336,6 @@ static inline int pcie_cap_version(const struct pci_dev *dev)
         return pcie_caps_reg(dev) & PCI_EXP_FLAGS_VERS;
 }
 
-static bool pcie_downstream_port(const struct pci_dev *dev)
-{
-        int type = pci_pcie_type(dev);
-
-        return type == PCI_EXP_TYPE_ROOT_PORT ||
-               type == PCI_EXP_TYPE_DOWNSTREAM ||
-               type == PCI_EXP_TYPE_PCIE_BRIDGE;
-}
-
 bool pcie_cap_has_lnkctl(const struct pci_dev *dev)
 {
         int type = pci_pcie_type(dev);
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 495059d923f7..8e40b3e6da77 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -417,11 +417,9 @@ struct pci_bus *pci_bus_get(struct pci_bus *bus)
                 get_device(&bus->dev);
         return bus;
 }
-EXPORT_SYMBOL(pci_bus_get);
 
 void pci_bus_put(struct pci_bus *bus)
 {
         if (bus)
                 put_device(&bus->dev);
 }
-EXPORT_SYMBOL(pci_bus_put);
diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index 6ea778ae4877..0ba988b5b5bc 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP
           DesignWare core functions to implement the driver.
 
 config PCI_LAYERSCAPE
-        bool "Freescale Layerscape PCIe controller"
+        bool "Freescale Layerscape PCIe controller - Host mode"
         depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
         depends on PCI_MSI_IRQ_DOMAIN
         select MFD_SYSCON
         select PCIE_DW_HOST
         help
-          Say Y here if you want PCIe controller support on Layerscape SoCs.
+          Say Y here if you want to enable PCIe controller support on Layerscape
+          SoCs to work in Host mode.
+          This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
+          determines which PCIe controller works in EP mode and which PCIe
+          controller works in RC mode.
+
+config PCI_LAYERSCAPE_EP
+        bool "Freescale Layerscape PCIe controller - Endpoint mode"
+        depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
+        depends on PCI_ENDPOINT
+        select PCIE_DW_EP
+        help
+          Say Y here if you want to enable PCIe controller support on Layerscape
+          SoCs to work in Endpoint mode.
+          This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
+          determines which PCIe controller works in EP mode and which PCIe
+          controller works in RC mode.
 
 config PCI_HISI
         depends on OF && (ARM64 || COMPILE_TEST)
@@ -220,6 +236,16 @@ config PCI_MESON
           and therefore the driver re-uses the DesignWare core functions to
           implement the driver.
 
+config PCIE_TEGRA194
+        tristate "NVIDIA Tegra194 (and later) PCIe controller"
+        depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
+        depends on PCI_MSI_IRQ_DOMAIN
+        select PCIE_DW_HOST
+        select PHY_TEGRA194_P2U
+        help
+          Say Y here if you want support for DesignWare core based PCIe host
+          controller found in NVIDIA Tegra194 SoC.
+
 config PCIE_UNIPHIER
         bool "Socionext UniPhier PCIe controllers"
         depends on ARCH_UNIPHIER || COMPILE_TEST
@@ -230,4 +256,16 @@ config PCIE_UNIPHIER
           Say Y here if you want PCIe controller support on UniPhier SoCs.
           This driver supports LD20 and PXs3 SoCs.
 
+config PCIE_AL
+        bool "Amazon Annapurna Labs PCIe controller"
+        depends on OF && (ARM64 || COMPILE_TEST)
+        depends on PCI_MSI_IRQ_DOMAIN
+        select PCIE_DW_HOST
+        help
+          Say Y here to enable support of the Amazon's Annapurna Labs PCIe
+          controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
+          core plus Annapurna Labs proprietary hardware wrappers. This is
+          required only for DT-based platforms. ACPI platforms with the
+          Annapurna Labs PCIe controller don't need to enable this.
+
 endmenu
diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile
index b085dfd4fab7..69faff371f11 100644
--- a/drivers/pci/controller/dwc/Makefile
+++ b/drivers/pci/controller/dwc/Makefile
@@ -8,13 +8,15 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
 obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
 obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
 obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o
-obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o
+obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
+obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o
 obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
 obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
 obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
 obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o
 obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o
 obj-$(CONFIG_PCI_MESON) += pci-meson.o
+obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o
 obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o
 
 # The following drivers are for devices that use the generic ACPI
diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controller/dwc/pci-exynos.c
index cee5f2f590e2..14a6ba4067fb 100644
--- a/drivers/pci/controller/dwc/pci-exynos.c
+++ b/drivers/pci/controller/dwc/pci-exynos.c
@@ -465,7 +465,7 @@ static int __init exynos_pcie_probe(struct platform_device *pdev)
 
         ep->phy = devm_of_phy_get(dev, np, NULL);
         if (IS_ERR(ep->phy)) {
-                if (PTR_ERR(ep->phy) == -EPROBE_DEFER)
+                if (PTR_ERR(ep->phy) != -ENODEV)
                         return PTR_ERR(ep->phy);
 
                 ep->phy = NULL;
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 9b5cb5b70389..acfbd34032a8 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -57,6 +57,7 @@ enum imx6_pcie_variants {
 struct imx6_pcie_drvdata {
         enum imx6_pcie_variants variant;
         u32 flags;
+        int dbi_length;
 };
 
 struct imx6_pcie {
@@ -1173,8 +1174,8 @@ static int imx6_pcie_probe(struct platform_device *pdev)
 
         imx6_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie");
         if (IS_ERR(imx6_pcie->vpcie)) {
-                if (PTR_ERR(imx6_pcie->vpcie) == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
+                if (PTR_ERR(imx6_pcie->vpcie) != -ENODEV)
+                        return PTR_ERR(imx6_pcie->vpcie);
                 imx6_pcie->vpcie = NULL;
         }
 
@@ -1212,6 +1213,7 @@ static const struct imx6_pcie_drvdata drvdata[] = {
                 .variant = IMX6Q,
                 .flags = IMX6_PCIE_FLAG_IMX6_PHY |
                          IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE,
+                .dbi_length = 0x200,
         },
         [IMX6SX] = {
                 .variant = IMX6SX,
@@ -1254,6 +1256,37 @@ static struct platform_driver imx6_pcie_driver = {
         .shutdown = imx6_pcie_shutdown,
 };
 
+static void imx6_pcie_quirk(struct pci_dev *dev)
+{
+        struct pci_bus *bus = dev->bus;
+        struct pcie_port *pp = bus->sysdata;
+
+        /* Bus parent is the PCI bridge, its parent is this platform driver */
+        if (!bus->dev.parent || !bus->dev.parent->parent)
+                return;
+
+        /* Make sure we only quirk devices associated with this driver */
+        if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver)
+                return;
+
+        if (bus->number == pp->root_bus_nr) {
+                struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+                struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
+
+                /*
+                 * Limit config length to avoid the kernel reading beyond
+                 * the register set and causing an abort on i.MX 6Quad
+                 */
+                if (imx6_pcie->drvdata->dbi_length) {
+                        dev->cfg_size = imx6_pcie->drvdata->dbi_length;
+                        dev_info(&dev->dev, "Limiting cfg_size to %d\n",
+                                        dev->cfg_size);
+                }
+        }
+}
+DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd,
+                        PCI_CLASS_BRIDGE_PCI, 8, imx6_pcie_quirk);
+
 static int __init imx6_pcie_init(void)
 {
 #ifdef CONFIG_ARM
diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
index be61d96cc95e..ca9aa4501e7e 100644
--- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
+++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
@@ -44,6 +44,7 @@ static const struct pci_epc_features ls_pcie_epc_features = {
         .linkup_notifier = false,
         .msi_capable = true,
         .msix_capable = false,
+        .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
 };
 
 static const struct pci_epc_features*
diff --git a/drivers/pci/controller/dwc/pcie-al.c b/drivers/pci/controller/dwc/pcie-al.c
index 3ab58f0584a8..1eeda2f6371f 100644
--- a/drivers/pci/controller/dwc/pcie-al.c
+++ b/drivers/pci/controller/dwc/pcie-al.c
@@ -91,3 +91,368 @@ struct pci_ecam_ops al_pcie_ops = {
 };
 
 #endif /* defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) */
+
+#ifdef CONFIG_PCIE_AL
+
+#include <linux/of_pci.h>
+#include "pcie-designware.h"
+
+#define AL_PCIE_REV_ID_2        2
+#define AL_PCIE_REV_ID_3        3
+#define AL_PCIE_REV_ID_4        4
+
+#define AXI_BASE_OFFSET         0x0
+
+#define DEVICE_ID_OFFSET        0x16c
+
+#define DEVICE_REV_ID                   0x0
+#define DEVICE_REV_ID_DEV_ID_MASK       GENMASK(31, 16)
+
+#define DEVICE_REV_ID_DEV_ID_X4         0
+#define DEVICE_REV_ID_DEV_ID_X8         2
+#define DEVICE_REV_ID_DEV_ID_X16        4
+
+#define OB_CTRL_REV1_2_OFFSET   0x0040
+#define OB_CTRL_REV3_5_OFFSET   0x0030
+
+#define CFG_TARGET_BUS                  0x0
+#define CFG_TARGET_BUS_MASK_MASK        GENMASK(7, 0)
+#define CFG_TARGET_BUS_BUSNUM_MASK      GENMASK(15, 8)
+
+#define CFG_CONTROL                     0x4
+#define CFG_CONTROL_SUBBUS_MASK         GENMASK(15, 8)
+#define CFG_CONTROL_SEC_BUS_MASK        GENMASK(23, 16)
+
+struct al_pcie_reg_offsets {
+        unsigned int ob_ctrl;
+};
+
+struct al_pcie_target_bus_cfg {
+        u8 reg_val;
+        u8 reg_mask;
+        u8 ecam_mask;
+};
+
+struct al_pcie {
+        struct dw_pcie *pci;
+        void __iomem *controller_base; /* base of PCIe unit (not DW core) */
+        struct device *dev;
+        resource_size_t ecam_size;
+        unsigned int controller_rev_id;
+        struct al_pcie_reg_offsets reg_offsets;
+        struct al_pcie_target_bus_cfg target_bus_cfg;
+};
+
+#define PCIE_ECAM_DEVFN(x)              (((x) & 0xff) << 12)
+
+#define to_al_pcie(x)           dev_get_drvdata((x)->dev)
+
+static inline u32 al_pcie_controller_readl(struct al_pcie *pcie, u32 offset)
+{
+        return readl_relaxed(pcie->controller_base + offset);
+}
+
+static inline void al_pcie_controller_writel(struct al_pcie *pcie, u32 offset,
+                                             u32 val)
+{
+        writel_relaxed(val, pcie->controller_base + offset);
+}
+
+static int al_pcie_rev_id_get(struct al_pcie *pcie, unsigned int *rev_id)
+{
+        u32 dev_rev_id_val;
+        u32 dev_id_val;
+
+        dev_rev_id_val = al_pcie_controller_readl(pcie, AXI_BASE_OFFSET +
+                                                  DEVICE_ID_OFFSET +
+                                                  DEVICE_REV_ID);
+        dev_id_val = FIELD_GET(DEVICE_REV_ID_DEV_ID_MASK, dev_rev_id_val);
+
+        switch (dev_id_val) {
+        case DEVICE_REV_ID_DEV_ID_X4:
+                *rev_id = AL_PCIE_REV_ID_2;
+                break;
+        case DEVICE_REV_ID_DEV_ID_X8:
+                *rev_id = AL_PCIE_REV_ID_3;
+                break;
+        case DEVICE_REV_ID_DEV_ID_X16:
+                *rev_id = AL_PCIE_REV_ID_4;
+                break;
+        default:
+                dev_err(pcie->dev, "Unsupported dev_id_val (0x%x)\n",
+                        dev_id_val);
+                return -EINVAL;
+        }
+
+        dev_dbg(pcie->dev, "dev_id_val: 0x%x\n", dev_id_val);
+
+        return 0;
+}
+
+static int al_pcie_reg_offsets_set(struct al_pcie *pcie)
+{
+        switch (pcie->controller_rev_id) {
+        case AL_PCIE_REV_ID_2:
+                pcie->reg_offsets.ob_ctrl = OB_CTRL_REV1_2_OFFSET;
+                break;
+        case AL_PCIE_REV_ID_3:
+        case AL_PCIE_REV_ID_4:
+                pcie->reg_offsets.ob_ctrl = OB_CTRL_REV3_5_OFFSET;
+                break;
+        default:
+                dev_err(pcie->dev, "Unsupported controller rev_id: 0x%x\n",
+                        pcie->controller_rev_id);
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static inline void al_pcie_target_bus_set(struct al_pcie *pcie,
+                                          u8 target_bus,
+                                          u8 mask_target_bus)
+{
+        u32 reg;
+
+        reg = FIELD_PREP(CFG_TARGET_BUS_MASK_MASK, mask_target_bus) |
+              FIELD_PREP(CFG_TARGET_BUS_BUSNUM_MASK, target_bus);
+
+        al_pcie_controller_writel(pcie, AXI_BASE_OFFSET +
+                                  pcie->reg_offsets.ob_ctrl + CFG_TARGET_BUS,
+                                  reg);
+}
+
+static void __iomem *al_pcie_conf_addr_map(struct al_pcie *pcie,
+                                           unsigned int busnr,
+                                           unsigned int devfn)
+{
+        struct al_pcie_target_bus_cfg *target_bus_cfg = &pcie->target_bus_cfg;
+        unsigned int busnr_ecam = busnr & target_bus_cfg->ecam_mask;
+        unsigned int busnr_reg = busnr & target_bus_cfg->reg_mask;
+        struct pcie_port *pp = &pcie->pci->pp;
+        void __iomem *pci_base_addr;
+
+        pci_base_addr = (void __iomem *)((uintptr_t)pp->va_cfg0_base +
+                                         (busnr_ecam << 20) +
+                                         PCIE_ECAM_DEVFN(devfn));
+
+        if (busnr_reg != target_bus_cfg->reg_val) {
+                dev_dbg(pcie->pci->dev, "Changing target bus busnum val from 0x%x to 0x%x\n",
+                        target_bus_cfg->reg_val, busnr_reg);
+                target_bus_cfg->reg_val = busnr_reg;
+                al_pcie_target_bus_set(pcie,
+                                       target_bus_cfg->reg_val,
+                                       target_bus_cfg->reg_mask);
+        }
+
+        return pci_base_addr;
+}
+
+static int al_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
+                                 unsigned int devfn, int where, int size,
+                                 u32 *val)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct al_pcie *pcie = to_al_pcie(pci);
+        unsigned int busnr = bus->number;
+        void __iomem *pci_addr;
+        int rc;
+
+        pci_addr = al_pcie_conf_addr_map(pcie, busnr, devfn);
+
+        rc = dw_pcie_read(pci_addr + where, size, val);
+
+        dev_dbg(pci->dev, "%d-byte config read from %04x:%02x:%02x.%d offset 0x%x (pci_addr: 0x%px) - val:0x%x\n",
+                size, pci_domain_nr(bus), bus->number,
+                PCI_SLOT(devfn), PCI_FUNC(devfn), where,
+                (pci_addr + where), *val);
+
+        return rc;
+}
+
+static int al_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,
+                                 unsigned int devfn, int where, int size,
+                                 u32 val)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct al_pcie *pcie = to_al_pcie(pci);
+        unsigned int busnr = bus->number;
+        void __iomem *pci_addr;
+        int rc;
+
+        pci_addr = al_pcie_conf_addr_map(pcie, busnr, devfn);
+
+        rc = dw_pcie_write(pci_addr + where, size, val);
+
+        dev_dbg(pci->dev, "%d-byte config write to %04x:%02x:%02x.%d offset 0x%x (pci_addr: 0x%px) - val:0x%x\n",
+                size, pci_domain_nr(bus), bus->number,
+                PCI_SLOT(devfn), PCI_FUNC(devfn), where,
+                (pci_addr + where), val);
+
+        return rc;
+}
+
+static void al_pcie_config_prepare(struct al_pcie *pcie)
+{
+        struct al_pcie_target_bus_cfg *target_bus_cfg;
+        struct pcie_port *pp = &pcie->pci->pp;
+        unsigned int ecam_bus_mask;
+        u32 cfg_control_offset;
+        u8 subordinate_bus;
+        u8 secondary_bus;
+        u32 cfg_control;
+        u32 reg;
+
+        target_bus_cfg = &pcie->target_bus_cfg;
+
+        ecam_bus_mask = (pcie->ecam_size >> 20) - 1;
+        if (ecam_bus_mask > 255) {
+                dev_warn(pcie->dev, "ECAM window size is larger than 256MB. Cutting off at 256\n");
+                ecam_bus_mask = 255;
+        }
+
+        /* This portion is taken from the transaction address */
+        target_bus_cfg->ecam_mask = ecam_bus_mask;
+        /* This portion is taken from the cfg_target_bus reg */
+        target_bus_cfg->reg_mask = ~target_bus_cfg->ecam_mask;
+        target_bus_cfg->reg_val = pp->busn->start & target_bus_cfg->reg_mask;
+
+        al_pcie_target_bus_set(pcie, target_bus_cfg->reg_val,
+                               target_bus_cfg->reg_mask);
+
+        secondary_bus = pp->busn->start + 1;
+        subordinate_bus = pp->busn->end;
+
+        /* Set the valid values of secondary and subordinate buses */
+        cfg_control_offset = AXI_BASE_OFFSET + pcie->reg_offsets.ob_ctrl +
+                             CFG_CONTROL;
+
+        cfg_control = al_pcie_controller_readl(pcie, cfg_control_offset);
+
+        reg = cfg_control &
+              ~(CFG_CONTROL_SEC_BUS_MASK | CFG_CONTROL_SUBBUS_MASK);
+
+        reg |= FIELD_PREP(CFG_CONTROL_SUBBUS_MASK, subordinate_bus) |
+               FIELD_PREP(CFG_CONTROL_SEC_BUS_MASK, secondary_bus);
+
+        al_pcie_controller_writel(pcie, cfg_control_offset, reg);
+}
+
+static int al_pcie_host_init(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct al_pcie *pcie = to_al_pcie(pci);
+        int rc;
+
+        rc = al_pcie_rev_id_get(pcie, &pcie->controller_rev_id);
+        if (rc)
+                return rc;
+
+        rc = al_pcie_reg_offsets_set(pcie);
+        if (rc)
+                return rc;
+
+        al_pcie_config_prepare(pcie);
+
+        return 0;
+}
+
+static const struct dw_pcie_host_ops al_pcie_host_ops = {
+        .rd_other_conf = al_pcie_rd_other_conf,
+        .wr_other_conf = al_pcie_wr_other_conf,
+        .host_init = al_pcie_host_init,
+};
+
+static int al_add_pcie_port(struct pcie_port *pp,
+                            struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        int ret;
+
+        pp->ops = &al_pcie_host_ops;
+
+        ret = dw_pcie_host_init(pp);
+        if (ret) {
+                dev_err(dev, "failed to initialize host\n");
+                return ret;
+        }
+
+        return 0;
+}
+
+static const struct dw_pcie_ops dw_pcie_ops = {
+};
+
+static int al_pcie_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct resource *controller_res;
+        struct resource *ecam_res;
+        struct resource *dbi_res;
+        struct al_pcie *al_pcie;
+        struct dw_pcie *pci;
+
+        al_pcie = devm_kzalloc(dev, sizeof(*al_pcie), GFP_KERNEL);
+        if (!al_pcie)
+                return -ENOMEM;
+
+        pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
+        if (!pci)
+                return -ENOMEM;
+
+        pci->dev = dev;
+        pci->ops = &dw_pcie_ops;
+
+        al_pcie->pci = pci;
+        al_pcie->dev = dev;
+
+        dbi_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+        pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_res);
+        if (IS_ERR(pci->dbi_base)) {
+                dev_err(dev, "couldn't remap dbi base %pR\n", dbi_res);
+                return PTR_ERR(pci->dbi_base);
+        }
+
+        ecam_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
+        if (!ecam_res) {
+                dev_err(dev, "couldn't find 'config' reg in DT\n");
+                return -ENOENT;
+        }
+        al_pcie->ecam_size = resource_size(ecam_res);
+
+        controller_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+                                                      "controller");
+        al_pcie->controller_base = devm_ioremap_resource(dev, controller_res);
+        if (IS_ERR(al_pcie->controller_base)) {
+                dev_err(dev, "couldn't remap controller base %pR\n",
+                        controller_res);
+                return PTR_ERR(al_pcie->controller_base);
+        }
+
+        dev_dbg(dev, "From DT: dbi_base: %pR, controller_base: %pR\n",
+                dbi_res, controller_res);
+
+        platform_set_drvdata(pdev, al_pcie);
+
+        return al_add_pcie_port(&pci->pp, pdev);
+}
+
+static const struct of_device_id al_pcie_of_match[] = {
+        { .compatible = "amazon,al-alpine-v2-pcie",
+        },
+        { .compatible = "amazon,al-alpine-v3-pcie",
+        },
+        {},
+};
+
+static struct platform_driver al_pcie_driver = {
+        .driver = {
+                .name   = "al-pcie",
+                .of_match_table = al_pcie_of_match,
+                .suppress_bind_attrs = true,
+        },
+        .probe = al_pcie_probe,
+};
+builtin_platform_driver(al_pcie_driver);
+
+#endif /* CONFIG_PCIE_AL*/
diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c
index 3d55dc78d999..49596547e8c2 100644
--- a/drivers/pci/controller/dwc/pcie-armada8k.c
+++ b/drivers/pci/controller/dwc/pcie-armada8k.c
@@ -118,11 +118,10 @@ static int armada8k_pcie_setup_phys(struct armada8k_pcie *pcie)
 
         for (i = 0; i < ARMADA8K_PCIE_MAX_LANES; i++) {
                 pcie->phy[i] = devm_of_phy_get_by_index(dev, node, i);
-                if (IS_ERR(pcie->phy[i]) &&
-                    (PTR_ERR(pcie->phy[i]) == -EPROBE_DEFER))
-                        return PTR_ERR(pcie->phy[i]);
-
                 if (IS_ERR(pcie->phy[i])) {
+                        if (PTR_ERR(pcie->phy[i]) != -ENODEV)
+                                return PTR_ERR(pcie->phy[i]);
+
                         pcie->phy[i] = NULL;
                         continue;
                 }
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 2bf5a35c0570..3dd2e2697294 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -40,39 +40,6 @@ void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar)
         __dw_pcie_ep_reset_bar(pci, bar, 0);
 }
 
-static u8 __dw_pcie_ep_find_next_cap(struct dw_pcie *pci, u8 cap_ptr,
-                              u8 cap)
-{
-        u8 cap_id, next_cap_ptr;
-        u16 reg;
-
-        if (!cap_ptr)
-                return 0;
-
-        reg = dw_pcie_readw_dbi(pci, cap_ptr);
-        cap_id = (reg & 0x00ff);
-
-        if (cap_id > PCI_CAP_ID_MAX)
-                return 0;
-
-        if (cap_id == cap)
-                return cap_ptr;
-
-        next_cap_ptr = (reg & 0xff00) >> 8;
-        return __dw_pcie_ep_find_next_cap(pci, next_cap_ptr, cap);
-}
-
-static u8 dw_pcie_ep_find_capability(struct dw_pcie *pci, u8 cap)
-{
-        u8 next_cap_ptr;
-        u16 reg;
-
-        reg = dw_pcie_readw_dbi(pci, PCI_CAPABILITY_LIST);
-        next_cap_ptr = (reg & 0x00ff);
-
-        return __dw_pcie_ep_find_next_cap(pci, next_cap_ptr, cap);
-}
-
 static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no,
                                    struct pci_epf_header *hdr)
 {
@@ -531,6 +498,7 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
         int ret;
         u32 reg;
         void *addr;
+        u8 hdr_type;
         unsigned int nbars;
         unsigned int offset;
         struct pci_epc *epc;
@@ -595,6 +563,13 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
         if (ep->ops->ep_init)
                 ep->ops->ep_init(ep);
 
+        hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE);
+        if (hdr_type != PCI_HEADER_TYPE_NORMAL) {
+                dev_err(pci->dev, "PCIe controller is not set to EP mode (hdr_type:0x%x)!\n",
+                        hdr_type);
+                return -EIO;
+        }
+
         ret = of_property_read_u8(np, "max-functions", &epc->max_functions);
         if (ret < 0)
                 epc->max_functions = 1;
@@ -612,9 +587,9 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
                 dev_err(dev, "Failed to reserve memory for MSI/MSI-X\n");
                 return -ENOMEM;
         }
-        ep->msi_cap = dw_pcie_ep_find_capability(pci, PCI_CAP_ID_MSI);
+        ep->msi_cap = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
 
-        ep->msix_cap = dw_pcie_ep_find_capability(pci, PCI_CAP_ID_MSIX);
+        ep->msix_cap = dw_pcie_find_capability(pci, PCI_CAP_ID_MSIX);
 
         offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
         if (offset) {
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index f93252d0da5b..0f36a926059a 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -323,6 +323,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
         struct pci_bus *child;
         struct pci_host_bridge *bridge;
         struct resource *cfg_res;
+        u32 hdr_type;
         int ret;
 
         raw_spin_lock_init(&pci->pp.lock);
@@ -464,6 +465,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
                         goto err_free_msi;
         }
 
+        ret = dw_pcie_rd_own_conf(pp, PCI_HEADER_TYPE, 1, &hdr_type);
+        if (ret != PCIBIOS_SUCCESSFUL) {
+                dev_err(pci->dev, "Failed reading PCI_HEADER_TYPE cfg space reg (ret: 0x%x)\n",
+                        ret);
+                ret = pcibios_err_to_errno(ret);
+                goto err_free_msi;
+        }
+        if (hdr_type != PCI_HEADER_TYPE_BRIDGE) {
+                dev_err(pci->dev,
+                        "PCIe controller is not set to bridge type (hdr_type: 0x%x)!\n",
+                        hdr_type);
+                ret = -EIO;
+                goto err_free_msi;
+        }
+
         pp->root_bus_nr = pp->busn->start;
 
         bridge->dev.parent = dev;
@@ -628,6 +644,12 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
         u32 val, ctrl, num_ctrls;
         struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 
+        /*
+         * Enable DBI read-only registers for writing/updating configuration.
+         * Write permission gets disabled towards the end of this function.
+         */
+        dw_pcie_dbi_ro_wr_en(pci);
+
         dw_pcie_setup(pci);
 
         if (!pp->ops->msi_host_init) {
@@ -650,12 +672,10 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
         dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_1, 0x00000000);
 
         /* Setup interrupt pins */
-        dw_pcie_dbi_ro_wr_en(pci);
         val = dw_pcie_readl_dbi(pci, PCI_INTERRUPT_LINE);
         val &= 0xffff00ff;
         val |= 0x00000100;
         dw_pcie_writel_dbi(pci, PCI_INTERRUPT_LINE, val);
-        dw_pcie_dbi_ro_wr_dis(pci);
 
         /* Setup bus numbers */
         val = dw_pcie_readl_dbi(pci, PCI_PRIMARY_BUS);
@@ -687,15 +707,13 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
 
         dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0);
 
-        /* Enable write permission for the DBI read-only register */
-        dw_pcie_dbi_ro_wr_en(pci);
         /* Program correct class for RC */
         dw_pcie_wr_own_conf(pp, PCI_CLASS_DEVICE, 2, PCI_CLASS_BRIDGE_PCI);
-        /* Better disable write permission right after the update */
-        dw_pcie_dbi_ro_wr_dis(pci);
 
         dw_pcie_rd_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, &val);
         val |= PORT_LOGIC_SPEED_CHANGE;
         dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val);
+
+        dw_pcie_dbi_ro_wr_dis(pci);
 }
 EXPORT_SYMBOL_GPL(dw_pcie_setup_rc);
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 7d25102c304c..820488dfeaed 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -14,6 +14,86 @@
 
 #include "pcie-designware.h"
 
+/*
+ * These interfaces resemble the pci_find_*capability() interfaces, but these
+ * are for configuring host controllers, which are bridges *to* PCI devices but
+ * are not PCI devices themselves.
+ */
+static u8 __dw_pcie_find_next_cap(struct dw_pcie *pci, u8 cap_ptr,
+                                  u8 cap)
+{
+        u8 cap_id, next_cap_ptr;
+        u16 reg;
+
+        if (!cap_ptr)
+                return 0;
+
+        reg = dw_pcie_readw_dbi(pci, cap_ptr);
+        cap_id = (reg & 0x00ff);
+
+        if (cap_id > PCI_CAP_ID_MAX)
+                return 0;
+
+        if (cap_id == cap)
+                return cap_ptr;
+
+        next_cap_ptr = (reg & 0xff00) >> 8;
+        return __dw_pcie_find_next_cap(pci, next_cap_ptr, cap);
+}
+
+u8 dw_pcie_find_capability(struct dw_pcie *pci, u8 cap)
+{
+        u8 next_cap_ptr;
+        u16 reg;
+
+        reg = dw_pcie_readw_dbi(pci, PCI_CAPABILITY_LIST);
+        next_cap_ptr = (reg & 0x00ff);
+
+        return __dw_pcie_find_next_cap(pci, next_cap_ptr, cap);
+}
+EXPORT_SYMBOL_GPL(dw_pcie_find_capability);
+
+static u16 dw_pcie_find_next_ext_capability(struct dw_pcie *pci, u16 start,
+                                            u8 cap)
+{
+        u32 header;
+        int ttl;
+        int pos = PCI_CFG_SPACE_SIZE;
+
+        /* minimum 8 bytes per capability */
+        ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
+
+        if (start)
+                pos = start;
+
+        header = dw_pcie_readl_dbi(pci, pos);
+        /*
+         * If we have no capabilities, this is indicated by cap ID,
+         * cap version and next pointer all being 0.
+         */
+        if (header == 0)
+                return 0;
+
+        while (ttl-- > 0) {
+                if (PCI_EXT_CAP_ID(header) == cap && pos != start)
+                        return pos;
+
+                pos = PCI_EXT_CAP_NEXT(header);
+                if (pos < PCI_CFG_SPACE_SIZE)
+                        break;
+
+                header = dw_pcie_readl_dbi(pci, pos);
+        }
+
+        return 0;
+}
+
+u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap)
+{
+        return dw_pcie_find_next_ext_capability(pci, 0, cap);
+}
+EXPORT_SYMBOL_GPL(dw_pcie_find_ext_capability);
+
 int dw_pcie_read(void __iomem *addr, int size, u32 *val)
 {
         if (!IS_ALIGNED((uintptr_t)addr, size)) {
@@ -376,10 +456,11 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci)
                 usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX);
         }
 
-        dev_err(pci->dev, "Phy link never came up\n");
+        dev_info(pci->dev, "Phy link never came up\n");
 
         return -ETIMEDOUT;
 }
+EXPORT_SYMBOL_GPL(dw_pcie_wait_for_link);
 
 int dw_pcie_link_up(struct dw_pcie *pci)
 {
@@ -423,8 +504,10 @@ void dw_pcie_setup(struct dw_pcie *pci)
 
 
         ret = of_property_read_u32(np, "num-lanes", &lanes);
-        if (ret)
-                lanes = 0;
+        if (ret) {
+                dev_dbg(pci->dev, "property num-lanes isn't found\n");
+                return;
+        }
 
         /* Set the number of lanes */
         val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
@@ -466,4 +549,11 @@ void dw_pcie_setup(struct dw_pcie *pci)
                 break;
         }
         dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
+
+        if (of_property_read_bool(np, "snps,enable-cdm-check")) {
+                val = dw_pcie_readl_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS);
+                val |= PCIE_PL_CHK_REG_CHK_REG_CONTINUOUS |
+                       PCIE_PL_CHK_REG_CHK_REG_START;
+                dw_pcie_writel_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS, val);
+        }
 }
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index ffed084a0b4f..5a18e94e52c8 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -86,6 +86,15 @@
 #define PCIE_MISC_CONTROL_1_OFF         0x8BC
 #define PCIE_DBI_RO_WR_EN               BIT(0)
 
+#define PCIE_PL_CHK_REG_CONTROL_STATUS                  0xB20
+#define PCIE_PL_CHK_REG_CHK_REG_START                   BIT(0)
+#define PCIE_PL_CHK_REG_CHK_REG_CONTINUOUS              BIT(1)
+#define PCIE_PL_CHK_REG_CHK_REG_COMPARISON_ERROR        BIT(16)
+#define PCIE_PL_CHK_REG_CHK_REG_LOGIC_ERROR             BIT(17)
+#define PCIE_PL_CHK_REG_CHK_REG_COMPLETE                BIT(18)
+
+#define PCIE_PL_CHK_REG_ERR_ADDR                        0xB28
+
 /*
  * iATU Unroll-specific register definitions
  * From 4.80 core version the address translation will be made by unroll
@@ -251,6 +260,9 @@ struct dw_pcie {
 #define to_dw_pcie_from_ep(endpoint)   \
                 container_of((endpoint), struct dw_pcie, ep)
 
+u8 dw_pcie_find_capability(struct dw_pcie *pci, u8 cap);
+u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap);
+
 int dw_pcie_read(void __iomem *addr, int size, u32 *val);
 int dw_pcie_write(void __iomem *addr, int size, u32 val);
 
diff --git a/drivers/pci/controller/dwc/pcie-histb.c b/drivers/pci/controller/dwc/pcie-histb.c
index 954bc2b74bbc..811b5c6d62ea 100644
--- a/drivers/pci/controller/dwc/pcie-histb.c
+++ b/drivers/pci/controller/dwc/pcie-histb.c
@@ -340,8 +340,8 @@ static int histb_pcie_probe(struct platform_device *pdev)
 
         hipcie->vpcie = devm_regulator_get_optional(dev, "vpcie");
         if (IS_ERR(hipcie->vpcie)) {
-                if (PTR_ERR(hipcie->vpcie) == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
+                if (PTR_ERR(hipcie->vpcie) != -ENODEV)
+                        return PTR_ERR(hipcie->vpcie);
                 hipcie->vpcie = NULL;
         }
 
diff --git a/drivers/pci/controller/dwc/pcie-kirin.c b/drivers/pci/controller/dwc/pcie-kirin.c
index 8df1914226be..c19617a912bd 100644
--- a/drivers/pci/controller/dwc/pcie-kirin.c
+++ b/drivers/pci/controller/dwc/pcie-kirin.c
@@ -436,7 +436,7 @@ static int kirin_pcie_host_init(struct pcie_port *pp)
         return 0;
 }
 
-static struct dw_pcie_ops kirin_dw_pcie_ops = {
+static const struct dw_pcie_ops kirin_dw_pcie_ops = {
         .read_dbi = kirin_pcie_read_dbi,
         .write_dbi = kirin_pcie_write_dbi,
         .link_up = kirin_pcie_link_up,
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
new file mode 100644
index 000000000000..f89f5acee72d
--- /dev/null
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -0,0 +1,1732 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * PCIe host controller driver for Tegra194 SoC
+ *
+ * Copyright (C) 2019 NVIDIA Corporation.
+ *
+ * Author: Vidya Sagar <vidyas@nvidia.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/iopoll.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
+#include <linux/pci.h>
+#include <linux/phy/phy.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/random.h>
+#include <linux/reset.h>
+#include <linux/resource.h>
+#include <linux/types.h>
+#include "pcie-designware.h"
+#include <soc/tegra/bpmp.h>
+#include <soc/tegra/bpmp-abi.h>
+#include "../../pci.h"
+
+#define APPL_PINMUX                             0x0
+#define APPL_PINMUX_PEX_RST                     BIT(0)
+#define APPL_PINMUX_CLKREQ_OVERRIDE_EN          BIT(2)
+#define APPL_PINMUX_CLKREQ_OVERRIDE             BIT(3)
+#define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN   BIT(4)
+#define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE      BIT(5)
+#define APPL_PINMUX_CLKREQ_OUT_OVRD_EN          BIT(9)
+#define APPL_PINMUX_CLKREQ_OUT_OVRD             BIT(10)
+
+#define APPL_CTRL                               0x4
+#define APPL_CTRL_SYS_PRE_DET_STATE             BIT(6)
+#define APPL_CTRL_LTSSM_EN                      BIT(7)
+#define APPL_CTRL_HW_HOT_RST_EN                 BIT(20)
+#define APPL_CTRL_HW_HOT_RST_MODE_MASK          GENMASK(1, 0)
+#define APPL_CTRL_HW_HOT_RST_MODE_SHIFT         22
+#define APPL_CTRL_HW_HOT_RST_MODE_IMDT_RST      0x1
+
+#define APPL_INTR_EN_L0_0                       0x8
+#define APPL_INTR_EN_L0_0_LINK_STATE_INT_EN     BIT(0)
+#define APPL_INTR_EN_L0_0_MSI_RCV_INT_EN        BIT(4)
+#define APPL_INTR_EN_L0_0_INT_INT_EN            BIT(8)
+#define APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN    BIT(19)
+#define APPL_INTR_EN_L0_0_SYS_INTR_EN           BIT(30)
+#define APPL_INTR_EN_L0_0_SYS_MSI_INTR_EN       BIT(31)
+
+#define APPL_INTR_STATUS_L0                     0xC
+#define APPL_INTR_STATUS_L0_LINK_STATE_INT      BIT(0)
+#define APPL_INTR_STATUS_L0_INT_INT             BIT(8)
+#define APPL_INTR_STATUS_L0_CDM_REG_CHK_INT     BIT(18)
+
+#define APPL_INTR_EN_L1_0_0                             0x1C
+#define APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN     BIT(1)
+
+#define APPL_INTR_STATUS_L1_0_0                         0x20
+#define APPL_INTR_STATUS_L1_0_0_LINK_REQ_RST_NOT_CHGED  BIT(1)
+
+#define APPL_INTR_STATUS_L1_1                   0x2C
+#define APPL_INTR_STATUS_L1_2                   0x30
+#define APPL_INTR_STATUS_L1_3                   0x34
+#define APPL_INTR_STATUS_L1_6                   0x3C
+#define APPL_INTR_STATUS_L1_7                   0x40
+
+#define APPL_INTR_EN_L1_8_0                     0x44
+#define APPL_INTR_EN_L1_8_BW_MGT_INT_EN         BIT(2)
+#define APPL_INTR_EN_L1_8_AUTO_BW_INT_EN        BIT(3)
+#define APPL_INTR_EN_L1_8_INTX_EN               BIT(11)
+#define APPL_INTR_EN_L1_8_AER_INT_EN            BIT(15)
+
+#define APPL_INTR_STATUS_L1_8_0                 0x4C
+#define APPL_INTR_STATUS_L1_8_0_EDMA_INT_MASK   GENMASK(11, 6)
+#define APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS  BIT(2)
+#define APPL_INTR_STATUS_L1_8_0_AUTO_BW_INT_STS BIT(3)
+
+#define APPL_INTR_STATUS_L1_9                   0x54
+#define APPL_INTR_STATUS_L1_10                  0x58
+#define APPL_INTR_STATUS_L1_11                  0x64
+#define APPL_INTR_STATUS_L1_13                  0x74
+#define APPL_INTR_STATUS_L1_14                  0x78
+#define APPL_INTR_STATUS_L1_15                  0x7C
+#define APPL_INTR_STATUS_L1_17                  0x88
+
+#define APPL_INTR_EN_L1_18                              0x90
+#define APPL_INTR_EN_L1_18_CDM_REG_CHK_CMPLT            BIT(2)
+#define APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR          BIT(1)
+#define APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR        BIT(0)
+
+#define APPL_INTR_STATUS_L1_18                          0x94
+#define APPL_INTR_STATUS_L1_18_CDM_REG_CHK_CMPLT        BIT(2)
+#define APPL_INTR_STATUS_L1_18_CDM_REG_CHK_CMP_ERR      BIT(1)
+#define APPL_INTR_STATUS_L1_18_CDM_REG_CHK_LOGIC_ERR    BIT(0)
+
+#define APPL_MSI_CTRL_2                         0xB0
+
+#define APPL_LTR_MSG_1                          0xC4
+#define LTR_MSG_REQ                             BIT(15)
+#define LTR_MST_NO_SNOOP_SHIFT                  16
+
+#define APPL_LTR_MSG_2                          0xC8
+#define APPL_LTR_MSG_2_LTR_MSG_REQ_STATE        BIT(3)
+
+#define APPL_LINK_STATUS                        0xCC
+#define APPL_LINK_STATUS_RDLH_LINK_UP           BIT(0)
+
+#define APPL_DEBUG                              0xD0
+#define APPL_DEBUG_PM_LINKST_IN_L2_LAT          BIT(21)
+#define APPL_DEBUG_PM_LINKST_IN_L0              0x11
+#define APPL_DEBUG_LTSSM_STATE_MASK             GENMASK(8, 3)
+#define APPL_DEBUG_LTSSM_STATE_SHIFT            3
+#define LTSSM_STATE_PRE_DETECT                  5
+
+#define APPL_RADM_STATUS                        0xE4
+#define APPL_PM_XMT_TURNOFF_STATE               BIT(0)
+
+#define APPL_DM_TYPE                            0x100
+#define APPL_DM_TYPE_MASK                       GENMASK(3, 0)
+#define APPL_DM_TYPE_RP                         0x4
+#define APPL_DM_TYPE_EP                         0x0
+
+#define APPL_CFG_BASE_ADDR                      0x104
+#define APPL_CFG_BASE_ADDR_MASK                 GENMASK(31, 12)
+
+#define APPL_CFG_IATU_DMA_BASE_ADDR             0x108
+#define APPL_CFG_IATU_DMA_BASE_ADDR_MASK        GENMASK(31, 18)
+
+#define APPL_CFG_MISC                           0x110
+#define APPL_CFG_MISC_SLV_EP_MODE               BIT(14)
+#define APPL_CFG_MISC_ARCACHE_MASK              GENMASK(13, 10)
+#define APPL_CFG_MISC_ARCACHE_SHIFT             10
+#define APPL_CFG_MISC_ARCACHE_VAL               3
+
+#define APPL_CFG_SLCG_OVERRIDE                  0x114
+#define APPL_CFG_SLCG_OVERRIDE_SLCG_EN_MASTER   BIT(0)
+
+#define APPL_CAR_RESET_OVRD                             0x12C
+#define APPL_CAR_RESET_OVRD_CYA_OVERRIDE_CORE_RST_N     BIT(0)
+
+#define IO_BASE_IO_DECODE                               BIT(0)
+#define IO_BASE_IO_DECODE_BIT8                          BIT(8)
+
+#define CFG_PREF_MEM_LIMIT_BASE_MEM_DECODE              BIT(0)
+#define CFG_PREF_MEM_LIMIT_BASE_MEM_LIMIT_DECODE        BIT(16)
+
+#define CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF 0x718
+#define CFG_TIMER_CTRL_ACK_NAK_SHIFT    (19)
+
+#define EVENT_COUNTER_ALL_CLEAR         0x3
+#define EVENT_COUNTER_ENABLE_ALL        0x7
+#define EVENT_COUNTER_ENABLE_SHIFT      2
+#define EVENT_COUNTER_EVENT_SEL_MASK    GENMASK(7, 0)
+#define EVENT_COUNTER_EVENT_SEL_SHIFT   16
+#define EVENT_COUNTER_EVENT_Tx_L0S      0x2
+#define EVENT_COUNTER_EVENT_Rx_L0S      0x3
+#define EVENT_COUNTER_EVENT_L1          0x5
+#define EVENT_COUNTER_EVENT_L1_1        0x7
+#define EVENT_COUNTER_EVENT_L1_2        0x8
+#define EVENT_COUNTER_GROUP_SEL_SHIFT   24
+#define EVENT_COUNTER_GROUP_5           0x5
+
+#define PORT_LOGIC_ACK_F_ASPM_CTRL                      0x70C
+#define ENTER_ASPM                                      BIT(30)
+#define L0S_ENTRANCE_LAT_SHIFT                          24
+#define L0S_ENTRANCE_LAT_MASK                           GENMASK(26, 24)
+#define L1_ENTRANCE_LAT_SHIFT                           27
+#define L1_ENTRANCE_LAT_MASK                            GENMASK(29, 27)
+#define N_FTS_SHIFT                                     8
+#define N_FTS_MASK                                      GENMASK(7, 0)
+#define N_FTS_VAL                                       52
+
+#define PORT_LOGIC_GEN2_CTRL                            0x80C
+#define PORT_LOGIC_GEN2_CTRL_DIRECT_SPEED_CHANGE        BIT(17)
+#define FTS_MASK                                        GENMASK(7, 0)
+#define FTS_VAL                                         52
+
+#define PORT_LOGIC_MSI_CTRL_INT_0_EN            0x828
+
+#define GEN3_EQ_CONTROL_OFF                     0x8a8
+#define GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_SHIFT  8
+#define GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_MASK   GENMASK(23, 8)
+#define GEN3_EQ_CONTROL_OFF_FB_MODE_MASK        GENMASK(3, 0)
+
+#define GEN3_RELATED_OFF                        0x890
+#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL    BIT(0)
+#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE        BIT(16)
+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT  24
+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK   GENMASK(25, 24)
+
+#define PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT  0x8D0
+#define AMBA_ERROR_RESPONSE_CRS_SHIFT           3
+#define AMBA_ERROR_RESPONSE_CRS_MASK            GENMASK(1, 0)
+#define AMBA_ERROR_RESPONSE_CRS_OKAY            0
+#define AMBA_ERROR_RESPONSE_CRS_OKAY_FFFFFFFF   1
+#define AMBA_ERROR_RESPONSE_CRS_OKAY_FFFF0001   2
+
+#define PORT_LOGIC_MSIX_DOORBELL                        0x948
+
+#define CAP_SPCIE_CAP_OFF                       0x154
+#define CAP_SPCIE_CAP_OFF_DSP_TX_PRESET0_MASK   GENMASK(3, 0)
+#define CAP_SPCIE_CAP_OFF_USP_TX_PRESET0_MASK   GENMASK(11, 8)
+#define CAP_SPCIE_CAP_OFF_USP_TX_PRESET0_SHIFT  8
+
+#define PME_ACK_TIMEOUT 10000
+
+#define LTSSM_TIMEOUT 50000     /* 50ms */
+
+#define GEN3_GEN4_EQ_PRESET_INIT        5
+
+#define GEN1_CORE_CLK_FREQ      62500000
+#define GEN2_CORE_CLK_FREQ      125000000
+#define GEN3_CORE_CLK_FREQ      250000000
+#define GEN4_CORE_CLK_FREQ      500000000
+
+static const unsigned int pcie_gen_freq[] = {
+        GEN1_CORE_CLK_FREQ,
+        GEN2_CORE_CLK_FREQ,
+        GEN3_CORE_CLK_FREQ,
+        GEN4_CORE_CLK_FREQ
+};
+
+static const u32 event_cntr_ctrl_offset[] = {
+        0x1d8,
+        0x1a8,
+        0x1a8,
+        0x1a8,
+        0x1c4,
+        0x1d8
+};
+
+static const u32 event_cntr_data_offset[] = {
+        0x1dc,
+        0x1ac,
+        0x1ac,
+        0x1ac,
+        0x1c8,
+        0x1dc
+};
+
+struct tegra_pcie_dw {
+        struct device *dev;
+        struct resource *appl_res;
+        struct resource *dbi_res;
+        struct resource *atu_dma_res;
+        void __iomem *appl_base;
+        struct clk *core_clk;
+        struct reset_control *core_apb_rst;
+        struct reset_control *core_rst;
+        struct dw_pcie pci;
+        struct tegra_bpmp *bpmp;
+
+        bool supports_clkreq;
+        bool enable_cdm_check;
+        bool link_state;
+        bool update_fc_fixup;
+        u8 init_link_width;
+        u32 msi_ctrl_int;
+        u32 num_lanes;
+        u32 max_speed;
+        u32 cid;
+        u32 cfg_link_cap_l1sub;
+        u32 pcie_cap_base;
+        u32 aspm_cmrt;
+        u32 aspm_pwr_on_t;
+        u32 aspm_l0s_enter_lat;
+
+        struct regulator *pex_ctl_supply;
+        struct regulator *slot_ctl_3v3;
+        struct regulator *slot_ctl_12v;
+
+        unsigned int phy_count;
+        struct phy **phys;
+
+        struct dentry *debugfs;
+};
+
+static inline struct tegra_pcie_dw *to_tegra_pcie(struct dw_pcie *pci)
+{
+        return container_of(pci, struct tegra_pcie_dw, pci);
+}
+
+static inline void appl_writel(struct tegra_pcie_dw *pcie, const u32 value,
+                               const u32 reg)
+{
+        writel_relaxed(value, pcie->appl_base + reg);
+}
+
+static inline u32 appl_readl(struct tegra_pcie_dw *pcie, const u32 reg)
+{
+        return readl_relaxed(pcie->appl_base + reg);
+}
+
+struct tegra_pcie_soc {
+        enum dw_pcie_device_mode mode;
+};
+
+static void apply_bad_link_workaround(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+        u32 current_link_width;
+        u16 val;
+
+        /*
+         * NOTE:- Since this scenario is uncommon and link as such is not
+         * stable anyway, not waiting to confirm if link is really
+         * transitioning to Gen-2 speed
+         */
+        val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA);
+        if (val & PCI_EXP_LNKSTA_LBMS) {
+                current_link_width = (val & PCI_EXP_LNKSTA_NLW) >>
+                                     PCI_EXP_LNKSTA_NLW_SHIFT;
+                if (pcie->init_link_width > current_link_width) {
+                        dev_warn(pci->dev, "PCIe link is bad, width reduced\n");
+                        val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
+                                                PCI_EXP_LNKCTL2);
+                        val &= ~PCI_EXP_LNKCTL2_TLS;
+                        val |= PCI_EXP_LNKCTL2_TLS_2_5GT;
+                        dw_pcie_writew_dbi(pci, pcie->pcie_cap_base +
+                                           PCI_EXP_LNKCTL2, val);
+
+                        val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
+                                                PCI_EXP_LNKCTL);
+                        val |= PCI_EXP_LNKCTL_RL;
+                        dw_pcie_writew_dbi(pci, pcie->pcie_cap_base +
+                                           PCI_EXP_LNKCTL, val);
+                }
+        }
+}
+
+static irqreturn_t tegra_pcie_rp_irq_handler(struct tegra_pcie_dw *pcie)
+{
+        struct dw_pcie *pci = &pcie->pci;
+        struct pcie_port *pp = &pci->pp;
+        u32 val, tmp;
+        u16 val_w;
+
+        val = appl_readl(pcie, APPL_INTR_STATUS_L0);
+        if (val & APPL_INTR_STATUS_L0_LINK_STATE_INT) {
+                val = appl_readl(pcie, APPL_INTR_STATUS_L1_0_0);
+                if (val & APPL_INTR_STATUS_L1_0_0_LINK_REQ_RST_NOT_CHGED) {
+                        appl_writel(pcie, val, APPL_INTR_STATUS_L1_0_0);
+
+                        /* SBR & Surprise Link Down WAR */
+                        val = appl_readl(pcie, APPL_CAR_RESET_OVRD);
+                        val &= ~APPL_CAR_RESET_OVRD_CYA_OVERRIDE_CORE_RST_N;
+                        appl_writel(pcie, val, APPL_CAR_RESET_OVRD);
+                        udelay(1);
+                        val = appl_readl(pcie, APPL_CAR_RESET_OVRD);
+                        val |= APPL_CAR_RESET_OVRD_CYA_OVERRIDE_CORE_RST_N;
+                        appl_writel(pcie, val, APPL_CAR_RESET_OVRD);
+
+                        val = dw_pcie_readl_dbi(pci, PORT_LOGIC_GEN2_CTRL);
+                        val |= PORT_LOGIC_GEN2_CTRL_DIRECT_SPEED_CHANGE;
+                        dw_pcie_writel_dbi(pci, PORT_LOGIC_GEN2_CTRL, val);
+                }
+        }
+
+        if (val & APPL_INTR_STATUS_L0_INT_INT) {
+                val = appl_readl(pcie, APPL_INTR_STATUS_L1_8_0);
+                if (val & APPL_INTR_STATUS_L1_8_0_AUTO_BW_INT_STS) {
+                        appl_writel(pcie,
+                                    APPL_INTR_STATUS_L1_8_0_AUTO_BW_INT_STS,
+                                    APPL_INTR_STATUS_L1_8_0);
+                        apply_bad_link_workaround(pp);
+                }
+                if (val & APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS) {
+                        appl_writel(pcie,
+                                    APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS,
+                                    APPL_INTR_STATUS_L1_8_0);
+
+                        val_w = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
+                                                  PCI_EXP_LNKSTA);
+                        dev_dbg(pci->dev, "Link Speed : Gen-%u\n", val_w &
+                                PCI_EXP_LNKSTA_CLS);
+                }
+        }
+
+        val = appl_readl(pcie, APPL_INTR_STATUS_L0);
+        if (val & APPL_INTR_STATUS_L0_CDM_REG_CHK_INT) {
+                val = appl_readl(pcie, APPL_INTR_STATUS_L1_18);
+                tmp = dw_pcie_readl_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS);
+                if (val & APPL_INTR_STATUS_L1_18_CDM_REG_CHK_CMPLT) {
+                        dev_info(pci->dev, "CDM check complete\n");
+                        tmp |= PCIE_PL_CHK_REG_CHK_REG_COMPLETE;
+                }
+                if (val & APPL_INTR_STATUS_L1_18_CDM_REG_CHK_CMP_ERR) {
+                        dev_err(pci->dev, "CDM comparison mismatch\n");
+                        tmp |= PCIE_PL_CHK_REG_CHK_REG_COMPARISON_ERROR;
+                }
+                if (val & APPL_INTR_STATUS_L1_18_CDM_REG_CHK_LOGIC_ERR) {
+                        dev_err(pci->dev, "CDM Logic error\n");
+                        tmp |= PCIE_PL_CHK_REG_CHK_REG_LOGIC_ERROR;
+                }
+                dw_pcie_writel_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS, tmp);
+                tmp = dw_pcie_readl_dbi(pci, PCIE_PL_CHK_REG_ERR_ADDR);
+                dev_err(pci->dev, "CDM Error Address Offset = 0x%08X\n", tmp);
+        }
+
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t tegra_pcie_irq_handler(int irq, void *arg)
+{
+        struct tegra_pcie_dw *pcie = arg;
+
+        return tegra_pcie_rp_irq_handler(pcie);
+}
+
+static int tegra_pcie_dw_rd_own_conf(struct pcie_port *pp, int where, int size,
+                                     u32 *val)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+
+        /*
+         * This is an endpoint mode specific register happen to appear even
+         * when controller is operating in root port mode and system hangs
+         * when it is accessed with link being in ASPM-L1 state.
+         * So skip accessing it altogether
+         */
+        if (where == PORT_LOGIC_MSIX_DOORBELL) {
+                *val = 0x00000000;
+                return PCIBIOS_SUCCESSFUL;
+        }
+
+        return dw_pcie_read(pci->dbi_base + where, size, val);
+}
+
+static int tegra_pcie_dw_wr_own_conf(struct pcie_port *pp, int where, int size,
+                                     u32 val)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+
+        /*
+         * This is an endpoint mode specific register happen to appear even
+         * when controller is operating in root port mode and system hangs
+         * when it is accessed with link being in ASPM-L1 state.
+         * So skip accessing it altogether
+         */
+        if (where == PORT_LOGIC_MSIX_DOORBELL)
+                return PCIBIOS_SUCCESSFUL;
+
+        return dw_pcie_write(pci->dbi_base + where, size, val);
+}
+
+#if defined(CONFIG_PCIEASPM)
+static void disable_aspm_l11(struct tegra_pcie_dw *pcie)
+{
+        u32 val;
+
+        val = dw_pcie_readl_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub);
+        val &= ~PCI_L1SS_CAP_ASPM_L1_1;
+        dw_pcie_writel_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub, val);
+}
+
+static void disable_aspm_l12(struct tegra_pcie_dw *pcie)
+{
+        u32 val;
+
+        val = dw_pcie_readl_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub);
+        val &= ~PCI_L1SS_CAP_ASPM_L1_2;
+        dw_pcie_writel_dbi(&pcie->pci, pcie->cfg_link_cap_l1sub, val);
+}
+
+static inline u32 event_counter_prog(struct tegra_pcie_dw *pcie, u32 event)
+{
+        u32 val;
+
+        val = dw_pcie_readl_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid]);
+        val &= ~(EVENT_COUNTER_EVENT_SEL_MASK << EVENT_COUNTER_EVENT_SEL_SHIFT);
+        val |= EVENT_COUNTER_GROUP_5 << EVENT_COUNTER_GROUP_SEL_SHIFT;
+        val |= event << EVENT_COUNTER_EVENT_SEL_SHIFT;
+        val |= EVENT_COUNTER_ENABLE_ALL << EVENT_COUNTER_ENABLE_SHIFT;
+        dw_pcie_writel_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid], val);
+        val = dw_pcie_readl_dbi(&pcie->pci, event_cntr_data_offset[pcie->cid]);
+
+        return val;
+}
+
+static int aspm_state_cnt(struct seq_file *s, void *data)
+{
+        struct tegra_pcie_dw *pcie = (struct tegra_pcie_dw *)
+                                     dev_get_drvdata(s->private);
+        u32 val;
+
+        seq_printf(s, "Tx L0s entry count : %u\n",
+                   event_counter_prog(pcie, EVENT_COUNTER_EVENT_Tx_L0S));
+
+        seq_printf(s, "Rx L0s entry count : %u\n",
+                   event_counter_prog(pcie, EVENT_COUNTER_EVENT_Rx_L0S));
+
+        seq_printf(s, "Link L1 entry count : %u\n",
+                   event_counter_prog(pcie, EVENT_COUNTER_EVENT_L1));
+
+        seq_printf(s, "Link L1.1 entry count : %u\n",
+                   event_counter_prog(pcie, EVENT_COUNTER_EVENT_L1_1));
+
+        seq_printf(s, "Link L1.2 entry count : %u\n",
+                   event_counter_prog(pcie, EVENT_COUNTER_EVENT_L1_2));
+
+        /* Clear all counters */
+        dw_pcie_writel_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid],
+                           EVENT_COUNTER_ALL_CLEAR);
+
+        /* Re-enable counting */
+        val = EVENT_COUNTER_ENABLE_ALL << EVENT_COUNTER_ENABLE_SHIFT;
+        val |= EVENT_COUNTER_GROUP_5 << EVENT_COUNTER_GROUP_SEL_SHIFT;
+        dw_pcie_writel_dbi(&pcie->pci, event_cntr_ctrl_offset[pcie->cid], val);
+
+        return 0;
+}
+
+static void init_host_aspm(struct tegra_pcie_dw *pcie)
+{
+        struct dw_pcie *pci = &pcie->pci;
+        u32 val;
+
+        val = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
+        pcie->cfg_link_cap_l1sub = val + PCI_L1SS_CAP;
+
+        /* Enable ASPM counters */
+        val = EVENT_COUNTER_ENABLE_ALL << EVENT_COUNTER_ENABLE_SHIFT;
+        val |= EVENT_COUNTER_GROUP_5 << EVENT_COUNTER_GROUP_SEL_SHIFT;
+        dw_pcie_writel_dbi(pci, event_cntr_ctrl_offset[pcie->cid], val);
+
+        /* Program T_cmrt and T_pwr_on values */
+        val = dw_pcie_readl_dbi(pci, pcie->cfg_link_cap_l1sub);
+        val &= ~(PCI_L1SS_CAP_CM_RESTORE_TIME | PCI_L1SS_CAP_P_PWR_ON_VALUE);
+        val |= (pcie->aspm_cmrt << 8);
+        val |= (pcie->aspm_pwr_on_t << 19);
+        dw_pcie_writel_dbi(pci, pcie->cfg_link_cap_l1sub, val);
+
+        /* Program L0s and L1 entrance latencies */
+        val = dw_pcie_readl_dbi(pci, PORT_LOGIC_ACK_F_ASPM_CTRL);
+        val &= ~L0S_ENTRANCE_LAT_MASK;
+        val |= (pcie->aspm_l0s_enter_lat << L0S_ENTRANCE_LAT_SHIFT);
+        val |= ENTER_ASPM;
+        dw_pcie_writel_dbi(pci, PORT_LOGIC_ACK_F_ASPM_CTRL, val);
+}
+
+static int init_debugfs(struct tegra_pcie_dw *pcie)
+{
+        struct dentry *d;
+
+        d = debugfs_create_devm_seqfile(pcie->dev, "aspm_state_cnt",
+                                        pcie->debugfs, aspm_state_cnt);
+        if (IS_ERR_OR_NULL(d))
+                dev_err(pcie->dev,
+                        "Failed to create debugfs file \"aspm_state_cnt\"\n");
+
+        return 0;
+}
+#else
+static inline void disable_aspm_l12(struct tegra_pcie_dw *pcie) { return; }
+static inline void disable_aspm_l11(struct tegra_pcie_dw *pcie) { return; }
+static inline void init_host_aspm(struct tegra_pcie_dw *pcie) { return; }
+static inline int init_debugfs(struct tegra_pcie_dw *pcie) { return 0; }
+#endif
+
+static void tegra_pcie_enable_system_interrupts(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+        u32 val;
+        u16 val_w;
+
+        val = appl_readl(pcie, APPL_INTR_EN_L0_0);
+        val |= APPL_INTR_EN_L0_0_LINK_STATE_INT_EN;
+        appl_writel(pcie, val, APPL_INTR_EN_L0_0);
+
+        val = appl_readl(pcie, APPL_INTR_EN_L1_0_0);
+        val |= APPL_INTR_EN_L1_0_0_LINK_REQ_RST_NOT_INT_EN;
+        appl_writel(pcie, val, APPL_INTR_EN_L1_0_0);
+
+        if (pcie->enable_cdm_check) {
+                val = appl_readl(pcie, APPL_INTR_EN_L0_0);
+                val |= APPL_INTR_EN_L0_0_CDM_REG_CHK_INT_EN;
+                appl_writel(pcie, val, APPL_INTR_EN_L0_0);
+
+                val = appl_readl(pcie, APPL_INTR_EN_L1_18);
+                val |= APPL_INTR_EN_L1_18_CDM_REG_CHK_CMP_ERR;
+                val |= APPL_INTR_EN_L1_18_CDM_REG_CHK_LOGIC_ERR;
+                appl_writel(pcie, val, APPL_INTR_EN_L1_18);
+        }
+
+        val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base +
+                                  PCI_EXP_LNKSTA);
+        pcie->init_link_width = (val_w & PCI_EXP_LNKSTA_NLW) >>
+                                PCI_EXP_LNKSTA_NLW_SHIFT;
+
+        val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base +
+                                  PCI_EXP_LNKCTL);
+        val_w |= PCI_EXP_LNKCTL_LBMIE;
+        dw_pcie_writew_dbi(&pcie->pci, pcie->pcie_cap_base + PCI_EXP_LNKCTL,
+                           val_w);
+}
+
+static void tegra_pcie_enable_legacy_interrupts(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+        u32 val;
+
+        /* Enable legacy interrupt generation */
+        val = appl_readl(pcie, APPL_INTR_EN_L0_0);
+        val |= APPL_INTR_EN_L0_0_SYS_INTR_EN;
+        val |= APPL_INTR_EN_L0_0_INT_INT_EN;
+        appl_writel(pcie, val, APPL_INTR_EN_L0_0);
+
+        val = appl_readl(pcie, APPL_INTR_EN_L1_8_0);
+        val |= APPL_INTR_EN_L1_8_INTX_EN;
+        val |= APPL_INTR_EN_L1_8_AUTO_BW_INT_EN;
+        val |= APPL_INTR_EN_L1_8_BW_MGT_INT_EN;
+        if (IS_ENABLED(CONFIG_PCIEAER))
+                val |= APPL_INTR_EN_L1_8_AER_INT_EN;
+        appl_writel(pcie, val, APPL_INTR_EN_L1_8_0);
+}
+
+static void tegra_pcie_enable_msi_interrupts(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+        u32 val;
+
+        dw_pcie_msi_init(pp);
+
+        /* Enable MSI interrupt generation */
+        val = appl_readl(pcie, APPL_INTR_EN_L0_0);
+        val |= APPL_INTR_EN_L0_0_SYS_MSI_INTR_EN;
+        val |= APPL_INTR_EN_L0_0_MSI_RCV_INT_EN;
+        appl_writel(pcie, val, APPL_INTR_EN_L0_0);
+}
+
+static void tegra_pcie_enable_interrupts(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+
+        /* Clear interrupt statuses before enabling interrupts */
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L0);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_0_0);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_1);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_2);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_3);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_6);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_7);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_8_0);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_9);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_10);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_11);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_13);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_14);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_15);
+        appl_writel(pcie, 0xFFFFFFFF, APPL_INTR_STATUS_L1_17);
+
+        tegra_pcie_enable_system_interrupts(pp);
+        tegra_pcie_enable_legacy_interrupts(pp);
+        if (IS_ENABLED(CONFIG_PCI_MSI))
+                tegra_pcie_enable_msi_interrupts(pp);
+}
+
+static void config_gen3_gen4_eq_presets(struct tegra_pcie_dw *pcie)
+{
+        struct dw_pcie *pci = &pcie->pci;
+        u32 val, offset, i;
+
+        /* Program init preset */
+        for (i = 0; i < pcie->num_lanes; i++) {
+                dw_pcie_read(pci->dbi_base + CAP_SPCIE_CAP_OFF
+                                 + (i * 2), 2, &val);
+                val &= ~CAP_SPCIE_CAP_OFF_DSP_TX_PRESET0_MASK;
+                val |= GEN3_GEN4_EQ_PRESET_INIT;
+                val &= ~CAP_SPCIE_CAP_OFF_USP_TX_PRESET0_MASK;
+                val |= (GEN3_GEN4_EQ_PRESET_INIT <<
+                           CAP_SPCIE_CAP_OFF_USP_TX_PRESET0_SHIFT);
+                dw_pcie_write(pci->dbi_base + CAP_SPCIE_CAP_OFF
+                                 + (i * 2), 2, val);
+
+                offset = dw_pcie_find_ext_capability(pci,
+                                                     PCI_EXT_CAP_ID_PL_16GT) +
+                                PCI_PL_16GT_LE_CTRL;
+                dw_pcie_read(pci->dbi_base + offset + i, 1, &val);
+                val &= ~PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK;
+                val |= GEN3_GEN4_EQ_PRESET_INIT;
+                val &= ~PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK;
+                val |= (GEN3_GEN4_EQ_PRESET_INIT <<
+                        PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT);
+                dw_pcie_write(pci->dbi_base + offset + i, 1, val);
+        }
+
+        val = dw_pcie_readl_dbi(pci, GEN3_RELATED_OFF);
+        val &= ~GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK;
+        dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val);
+
+        val = dw_pcie_readl_dbi(pci, GEN3_EQ_CONTROL_OFF);
+        val &= ~GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_MASK;
+        val |= (0x3ff << GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_SHIFT);
+        val &= ~GEN3_EQ_CONTROL_OFF_FB_MODE_MASK;
+        dw_pcie_writel_dbi(pci, GEN3_EQ_CONTROL_OFF, val);
+
+        val = dw_pcie_readl_dbi(pci, GEN3_RELATED_OFF);
+        val &= ~GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK;
+        val |= (0x1 << GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT);
+        dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val);
+
+        val = dw_pcie_readl_dbi(pci, GEN3_EQ_CONTROL_OFF);
+        val &= ~GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_MASK;
+        val |= (0x360 << GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_SHIFT);
+        val &= ~GEN3_EQ_CONTROL_OFF_FB_MODE_MASK;
+        dw_pcie_writel_dbi(pci, GEN3_EQ_CONTROL_OFF, val);
+
+        val = dw_pcie_readl_dbi(pci, GEN3_RELATED_OFF);
+        val &= ~GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK;
+        dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val);
+}
+
+static void tegra_pcie_prepare_host(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+        u32 val;
+
+        val = dw_pcie_readl_dbi(pci, PCI_IO_BASE);
+        val &= ~(IO_BASE_IO_DECODE | IO_BASE_IO_DECODE_BIT8);
+        dw_pcie_writel_dbi(pci, PCI_IO_BASE, val);
+
+        val = dw_pcie_readl_dbi(pci, PCI_PREF_MEMORY_BASE);
+        val |= CFG_PREF_MEM_LIMIT_BASE_MEM_DECODE;
+        val |= CFG_PREF_MEM_LIMIT_BASE_MEM_LIMIT_DECODE;
+        dw_pcie_writel_dbi(pci, PCI_PREF_MEMORY_BASE, val);
+
+        dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 0);
+
+        /* Configure FTS */
+        val = dw_pcie_readl_dbi(pci, PORT_LOGIC_ACK_F_ASPM_CTRL);
+        val &= ~(N_FTS_MASK << N_FTS_SHIFT);
+        val |= N_FTS_VAL << N_FTS_SHIFT;
+        dw_pcie_writel_dbi(pci, PORT_LOGIC_ACK_F_ASPM_CTRL, val);
+
+        val = dw_pcie_readl_dbi(pci, PORT_LOGIC_GEN2_CTRL);
+        val &= ~FTS_MASK;
+        val |= FTS_VAL;
+        dw_pcie_writel_dbi(pci, PORT_LOGIC_GEN2_CTRL, val);
+
+        /* Enable as 0xFFFF0001 response for CRS */
+        val = dw_pcie_readl_dbi(pci, PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT);
+        val &= ~(AMBA_ERROR_RESPONSE_CRS_MASK << AMBA_ERROR_RESPONSE_CRS_SHIFT);
+        val |= (AMBA_ERROR_RESPONSE_CRS_OKAY_FFFF0001 <<
+                AMBA_ERROR_RESPONSE_CRS_SHIFT);
+        dw_pcie_writel_dbi(pci, PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT, val);
+
+        /* Configure Max Speed from DT */
+        if (pcie->max_speed && pcie->max_speed != -EINVAL) {
+                val = dw_pcie_readl_dbi(pci, pcie->pcie_cap_base +
+                                        PCI_EXP_LNKCAP);
+                val &= ~PCI_EXP_LNKCAP_SLS;
+                val |= pcie->max_speed;
+                dw_pcie_writel_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP,
+                                   val);
+        }
+
+        /* Configure Max lane width from DT */
+        val = dw_pcie_readl_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP);
+        val &= ~PCI_EXP_LNKCAP_MLW;
+        val |= (pcie->num_lanes << PCI_EXP_LNKSTA_NLW_SHIFT);
+        dw_pcie_writel_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKCAP, val);
+
+        config_gen3_gen4_eq_presets(pcie);
+
+        init_host_aspm(pcie);
+
+        val = dw_pcie_readl_dbi(pci, GEN3_RELATED_OFF);
+        val &= ~GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL;
+        dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val);
+
+        if (pcie->update_fc_fixup) {
+                val = dw_pcie_readl_dbi(pci, CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF);
+                val |= 0x1 << CFG_TIMER_CTRL_ACK_NAK_SHIFT;
+                dw_pcie_writel_dbi(pci, CFG_TIMER_CTRL_MAX_FUNC_NUM_OFF, val);
+        }
+
+        dw_pcie_setup_rc(pp);
+
+        clk_set_rate(pcie->core_clk, GEN4_CORE_CLK_FREQ);
+
+        /* Assert RST */
+        val = appl_readl(pcie, APPL_PINMUX);
+        val &= ~APPL_PINMUX_PEX_RST;
+        appl_writel(pcie, val, APPL_PINMUX);
+
+        usleep_range(100, 200);
+
+        /* Enable LTSSM */
+        val = appl_readl(pcie, APPL_CTRL);
+        val |= APPL_CTRL_LTSSM_EN;
+        appl_writel(pcie, val, APPL_CTRL);
+
+        /* De-assert RST */
+        val = appl_readl(pcie, APPL_PINMUX);
+        val |= APPL_PINMUX_PEX_RST;
+        appl_writel(pcie, val, APPL_PINMUX);
+
+        msleep(100);
+}
+
+static int tegra_pcie_dw_host_init(struct pcie_port *pp)
+{
+        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+        u32 val, tmp, offset, speed;
+
+        tegra_pcie_prepare_host(pp);
+
+        if (dw_pcie_wait_for_link(pci)) {
+                /*
+                 * There are some endpoints which can't get the link up if
+                 * root port has Data Link Feature (DLF) enabled.
+                 * Refer Spec rev 4.0 ver 1.0 sec 3.4.2 & 7.7.4 for more info
+                 * on Scaled Flow Control and DLF.
+                 * So, need to confirm that is indeed the case here and attempt
+                 * link up once again with DLF disabled.
+                 */
+                val = appl_readl(pcie, APPL_DEBUG);
+                val &= APPL_DEBUG_LTSSM_STATE_MASK;
+                val >>= APPL_DEBUG_LTSSM_STATE_SHIFT;
+                tmp = appl_readl(pcie, APPL_LINK_STATUS);
+                tmp &= APPL_LINK_STATUS_RDLH_LINK_UP;
+                if (!(val == 0x11 && !tmp)) {
+                        /* Link is down for all good reasons */
+                        return 0;
+                }
+
+                dev_info(pci->dev, "Link is down in DLL");
+                dev_info(pci->dev, "Trying again with DLFE disabled\n");
+                /* Disable LTSSM */
+                val = appl_readl(pcie, APPL_CTRL);
+                val &= ~APPL_CTRL_LTSSM_EN;
+                appl_writel(pcie, val, APPL_CTRL);
+
+                reset_control_assert(pcie->core_rst);
+                reset_control_deassert(pcie->core_rst);
+
+                offset = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_DLF);
+                val = dw_pcie_readl_dbi(pci, offset + PCI_DLF_CAP);
+                val &= ~PCI_DLF_EXCHANGE_ENABLE;
+                dw_pcie_writel_dbi(pci, offset, val);
+
+                tegra_pcie_prepare_host(pp);
+
+                if (dw_pcie_wait_for_link(pci))
+                        return 0;
+        }
+
+        speed = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA) &
+                PCI_EXP_LNKSTA_CLS;
+        clk_set_rate(pcie->core_clk, pcie_gen_freq[speed - 1]);
+
+        tegra_pcie_enable_interrupts(pp);
+
+        return 0;
+}
+
+static int tegra_pcie_dw_link_up(struct dw_pcie *pci)
+{
+        struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
+        u32 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA);
+
+        return !!(val & PCI_EXP_LNKSTA_DLLLA);
+}
+
+static void tegra_pcie_set_msi_vec_num(struct pcie_port *pp)
+{
+        pp->num_vectors = MAX_MSI_IRQS;
+}
+
+static const struct dw_pcie_ops tegra_dw_pcie_ops = {
+        .link_up = tegra_pcie_dw_link_up,
+};
+
+static struct dw_pcie_host_ops tegra_pcie_dw_host_ops = {
+        .rd_own_conf = tegra_pcie_dw_rd_own_conf,
+        .wr_own_conf = tegra_pcie_dw_wr_own_conf,
+        .host_init = tegra_pcie_dw_host_init,
+        .set_num_vectors = tegra_pcie_set_msi_vec_num,
+};
+
+static void tegra_pcie_disable_phy(struct tegra_pcie_dw *pcie)
+{
+        unsigned int phy_count = pcie->phy_count;
+
+        while (phy_count--) {
+                phy_power_off(pcie->phys[phy_count]);
+                phy_exit(pcie->phys[phy_count]);
+        }
+}
+
+static int tegra_pcie_enable_phy(struct tegra_pcie_dw *pcie)
+{
+        unsigned int i;
+        int ret;
+
+        for (i = 0; i < pcie->phy_count; i++) {
+                ret = phy_init(pcie->phys[i]);
+                if (ret < 0)
+                        goto phy_power_off;
+
+                ret = phy_power_on(pcie->phys[i]);
+                if (ret < 0)
+                        goto phy_exit;
+        }
+
+        return 0;
+
+phy_power_off:
+        while (i--) {
+                phy_power_off(pcie->phys[i]);
+phy_exit:
+                phy_exit(pcie->phys[i]);
+        }
+
+        return ret;
+}
+
+static int tegra_pcie_dw_parse_dt(struct tegra_pcie_dw *pcie)
+{
+        struct device_node *np = pcie->dev->of_node;
+        int ret;
+
+        ret = of_property_read_u32(np, "nvidia,aspm-cmrt-us", &pcie->aspm_cmrt);
+        if (ret < 0) {
+                dev_info(pcie->dev, "Failed to read ASPM T_cmrt: %d\n", ret);
+                return ret;
+        }
+
+        ret = of_property_read_u32(np, "nvidia,aspm-pwr-on-t-us",
+                                   &pcie->aspm_pwr_on_t);
+        if (ret < 0)
+                dev_info(pcie->dev, "Failed to read ASPM Power On time: %d\n",
+                         ret);
+
+        ret = of_property_read_u32(np, "nvidia,aspm-l0s-entrance-latency-us",
+                                   &pcie->aspm_l0s_enter_lat);
+        if (ret < 0)
+                dev_info(pcie->dev,
+                         "Failed to read ASPM L0s Entrance latency: %d\n", ret);
+
+        ret = of_property_read_u32(np, "num-lanes", &pcie->num_lanes);
+        if (ret < 0) {
+                dev_err(pcie->dev, "Failed to read num-lanes: %d\n", ret);
+                return ret;
+        }
+
+        pcie->max_speed = of_pci_get_max_link_speed(np);
+
+        ret = of_property_read_u32_index(np, "nvidia,bpmp", 1, &pcie->cid);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to read Controller-ID: %d\n", ret);
+                return ret;
+        }
+
+        ret = of_property_count_strings(np, "phy-names");
+        if (ret < 0) {
+                dev_err(pcie->dev, "Failed to find PHY entries: %d\n",
+                        ret);
+                return ret;
+        }
+        pcie->phy_count = ret;
+
+        if (of_property_read_bool(np, "nvidia,update-fc-fixup"))
+                pcie->update_fc_fixup = true;
+
+        pcie->supports_clkreq =
+                of_property_read_bool(pcie->dev->of_node, "supports-clkreq");
+
+        pcie->enable_cdm_check =
+                of_property_read_bool(np, "snps,enable-cdm-check");
+
+        return 0;
+}
+
+static int tegra_pcie_bpmp_set_ctrl_state(struct tegra_pcie_dw *pcie,
+                                          bool enable)
+{
+        struct mrq_uphy_response resp;
+        struct tegra_bpmp_message msg;
+        struct mrq_uphy_request req;
+
+        /* Controller-5 doesn't need to have its state set by BPMP-FW */
+        if (pcie->cid == 5)
+                return 0;
+
+        memset(&req, 0, sizeof(req));
+        memset(&resp, 0, sizeof(resp));
+
+        req.cmd = CMD_UPHY_PCIE_CONTROLLER_STATE;
+        req.controller_state.pcie_controller = pcie->cid;
+        req.controller_state.enable = enable;
+
+        memset(&msg, 0, sizeof(msg));
+        msg.mrq = MRQ_UPHY;
+        msg.tx.data = &req;
+        msg.tx.size = sizeof(req);
+        msg.rx.data = &resp;
+        msg.rx.size = sizeof(resp);
+
+        return tegra_bpmp_transfer(pcie->bpmp, &msg);
+}
+
+static void tegra_pcie_downstream_dev_to_D0(struct tegra_pcie_dw *pcie)
+{
+        struct pcie_port *pp = &pcie->pci.pp;
+        struct pci_bus *child, *root_bus = NULL;
+        struct pci_dev *pdev;
+
+        /*
+         * link doesn't go into L2 state with some of the endpoints with Tegra
+         * if they are not in D0 state. So, need to make sure that immediate
+         * downstream devices are in D0 state before sending PME_TurnOff to put
+         * link into L2 state.
+         * This is as per PCI Express Base r4.0 v1.0 September 27-2017,
+         * 5.2 Link State Power Management (Page #428).
+         */
+
+        list_for_each_entry(child, &pp->root_bus->children, node) {
+                /* Bring downstream devices to D0 if they are not already in */
+                if (child->parent == pp->root_bus) {
+                        root_bus = child;
+                        break;
+                }
+        }
+
+        if (!root_bus) {
+                dev_err(pcie->dev, "Failed to find downstream devices\n");
+                return;
+        }
+
+        list_for_each_entry(pdev, &root_bus->devices, bus_list) {
+                if (PCI_SLOT(pdev->devfn) == 0) {
+                        if (pci_set_power_state(pdev, PCI_D0))
+                                dev_err(pcie->dev,
+                                        "Failed to transition %s to D0 state\n",
+                                        dev_name(&pdev->dev));
+                }
+        }
+}
+
+static int tegra_pcie_get_slot_regulators(struct tegra_pcie_dw *pcie)
+{
+        pcie->slot_ctl_3v3 = devm_regulator_get_optional(pcie->dev, "vpcie3v3");
+        if (IS_ERR(pcie->slot_ctl_3v3)) {
+                if (PTR_ERR(pcie->slot_ctl_3v3) != -ENODEV)
+                        return PTR_ERR(pcie->slot_ctl_3v3);
+
+                pcie->slot_ctl_3v3 = NULL;
+        }
+
+        pcie->slot_ctl_12v = devm_regulator_get_optional(pcie->dev, "vpcie12v");
+        if (IS_ERR(pcie->slot_ctl_12v)) {
+                if (PTR_ERR(pcie->slot_ctl_12v) != -ENODEV)
+                        return PTR_ERR(pcie->slot_ctl_12v);
+
+                pcie->slot_ctl_12v = NULL;
+        }
+
+        return 0;
+}
+
+static int tegra_pcie_enable_slot_regulators(struct tegra_pcie_dw *pcie)
+{
+        int ret;
+
+        if (pcie->slot_ctl_3v3) {
+                ret = regulator_enable(pcie->slot_ctl_3v3);
+                if (ret < 0) {
+                        dev_err(pcie->dev,
+                                "Failed to enable 3.3V slot supply: %d\n", ret);
+                        return ret;
+                }
+        }
+
+        if (pcie->slot_ctl_12v) {
+                ret = regulator_enable(pcie->slot_ctl_12v);
+                if (ret < 0) {
+                        dev_err(pcie->dev,
+                                "Failed to enable 12V slot supply: %d\n", ret);
+                        goto fail_12v_enable;
+                }
+        }
+
+        /*
+         * According to PCI Express Card Electromechanical Specification
+         * Revision 1.1, Table-2.4, T_PVPERL (Power stable to PERST# inactive)
+         * should be a minimum of 100ms.
+         */
+        if (pcie->slot_ctl_3v3 || pcie->slot_ctl_12v)
+                msleep(100);
+
+        return 0;
+
+fail_12v_enable:
+        if (pcie->slot_ctl_3v3)
+                regulator_disable(pcie->slot_ctl_3v3);
+        return ret;
+}
+
+static void tegra_pcie_disable_slot_regulators(struct tegra_pcie_dw *pcie)
+{
+        if (pcie->slot_ctl_12v)
+                regulator_disable(pcie->slot_ctl_12v);
+        if (pcie->slot_ctl_3v3)
+                regulator_disable(pcie->slot_ctl_3v3);
+}
+
+static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
+                                        bool en_hw_hot_rst)
+{
+        int ret;
+        u32 val;
+
+        ret = tegra_pcie_bpmp_set_ctrl_state(pcie, true);
+        if (ret) {
+                dev_err(pcie->dev,
+                        "Failed to enable controller %u: %d\n", pcie->cid, ret);
+                return ret;
+        }
+
+        ret = tegra_pcie_enable_slot_regulators(pcie);
+        if (ret < 0)
+                goto fail_slot_reg_en;
+
+        ret = regulator_enable(pcie->pex_ctl_supply);
+        if (ret < 0) {
+                dev_err(pcie->dev, "Failed to enable regulator: %d\n", ret);
+                goto fail_reg_en;
+        }
+
+        ret = clk_prepare_enable(pcie->core_clk);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to enable core clock: %d\n", ret);
+                goto fail_core_clk;
+        }
+
+        ret = reset_control_deassert(pcie->core_apb_rst);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to deassert core APB reset: %d\n",
+                        ret);
+                goto fail_core_apb_rst;
+        }
+
+        if (en_hw_hot_rst) {
+                /* Enable HW_HOT_RST mode */
+                val = appl_readl(pcie, APPL_CTRL);
+                val &= ~(APPL_CTRL_HW_HOT_RST_MODE_MASK <<
+                         APPL_CTRL_HW_HOT_RST_MODE_SHIFT);
+                val |= APPL_CTRL_HW_HOT_RST_EN;
+                appl_writel(pcie, val, APPL_CTRL);
+        }
+
+        ret = tegra_pcie_enable_phy(pcie);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to enable PHY: %d\n", ret);
+                goto fail_phy;
+        }
+
+        /* Update CFG base address */
+        appl_writel(pcie, pcie->dbi_res->start & APPL_CFG_BASE_ADDR_MASK,
+                    APPL_CFG_BASE_ADDR);
+
+        /* Configure this core for RP mode operation */
+        appl_writel(pcie, APPL_DM_TYPE_RP, APPL_DM_TYPE);
+
+        appl_writel(pcie, 0x0, APPL_CFG_SLCG_OVERRIDE);
+
+        val = appl_readl(pcie, APPL_CTRL);
+        appl_writel(pcie, val | APPL_CTRL_SYS_PRE_DET_STATE, APPL_CTRL);
+
+        val = appl_readl(pcie, APPL_CFG_MISC);
+        val |= (APPL_CFG_MISC_ARCACHE_VAL << APPL_CFG_MISC_ARCACHE_SHIFT);
+        appl_writel(pcie, val, APPL_CFG_MISC);
+
+        if (!pcie->supports_clkreq) {
+                val = appl_readl(pcie, APPL_PINMUX);
+                val |= APPL_PINMUX_CLKREQ_OUT_OVRD_EN;
+                val |= APPL_PINMUX_CLKREQ_OUT_OVRD;
+                appl_writel(pcie, val, APPL_PINMUX);
+        }
+
+        /* Update iATU_DMA base address */
+        appl_writel(pcie,
+                    pcie->atu_dma_res->start & APPL_CFG_IATU_DMA_BASE_ADDR_MASK,
+                    APPL_CFG_IATU_DMA_BASE_ADDR);
+
+        reset_control_deassert(pcie->core_rst);
+
+        pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci,
+                                                      PCI_CAP_ID_EXP);
+
+        /* Disable ASPM-L1SS advertisement as there is no CLKREQ routing */
+        if (!pcie->supports_clkreq) {
+                disable_aspm_l11(pcie);
+                disable_aspm_l12(pcie);
+        }
+
+        return ret;
+
+fail_phy:
+        reset_control_assert(pcie->core_apb_rst);
+fail_core_apb_rst:
+        clk_disable_unprepare(pcie->core_clk);
+fail_core_clk:
+        regulator_disable(pcie->pex_ctl_supply);
+fail_reg_en:
+        tegra_pcie_disable_slot_regulators(pcie);
+fail_slot_reg_en:
+        tegra_pcie_bpmp_set_ctrl_state(pcie, false);
+
+        return ret;
+}
+
+static int __deinit_controller(struct tegra_pcie_dw *pcie)
+{
+        int ret;
+
+        ret = reset_control_assert(pcie->core_rst);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to assert \"core\" reset: %d\n",
+                        ret);
+                return ret;
+        }
+
+        tegra_pcie_disable_phy(pcie);
+
+        ret = reset_control_assert(pcie->core_apb_rst);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to assert APB reset: %d\n", ret);
+                return ret;
+        }
+
+        clk_disable_unprepare(pcie->core_clk);
+
+        ret = regulator_disable(pcie->pex_ctl_supply);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to disable regulator: %d\n", ret);
+                return ret;
+        }
+
+        tegra_pcie_disable_slot_regulators(pcie);
+
+        ret = tegra_pcie_bpmp_set_ctrl_state(pcie, false);
+        if (ret) {
+                dev_err(pcie->dev, "Failed to disable controller %d: %d\n",
+                        pcie->cid, ret);
+                return ret;
+        }
+
+        return ret;
+}
+
+static int tegra_pcie_init_controller(struct tegra_pcie_dw *pcie)
+{
+        struct dw_pcie *pci = &pcie->pci;
+        struct pcie_port *pp = &pci->pp;
+        int ret;
+
+        ret = tegra_pcie_config_controller(pcie, false);
+        if (ret < 0)
+                return ret;
+
+        pp->ops = &tegra_pcie_dw_host_ops;
+
+        ret = dw_pcie_host_init(pp);
+        if (ret < 0) {
+                dev_err(pcie->dev, "Failed to add PCIe port: %d\n", ret);
+                goto fail_host_init;
+        }
+
+        return 0;
+
+fail_host_init:
+        return __deinit_controller(pcie);
+}
+
+static int tegra_pcie_try_link_l2(struct tegra_pcie_dw *pcie)
+{
+        u32 val;
+
+        if (!tegra_pcie_dw_link_up(&pcie->pci))
+                return 0;
+
+        val = appl_readl(pcie, APPL_RADM_STATUS);
+        val |= APPL_PM_XMT_TURNOFF_STATE;
+        appl_writel(pcie, val, APPL_RADM_STATUS);
+
+        return readl_poll_timeout_atomic(pcie->appl_base + APPL_DEBUG, val,
+                                 val & APPL_DEBUG_PM_LINKST_IN_L2_LAT,
+                                 1, PME_ACK_TIMEOUT);
+}
+
+static void tegra_pcie_dw_pme_turnoff(struct tegra_pcie_dw *pcie)
+{
+        u32 data;
+        int err;
+
+        if (!tegra_pcie_dw_link_up(&pcie->pci)) {
+                dev_dbg(pcie->dev, "PCIe link is not up...!\n");
+                return;
+        }
+
+        if (tegra_pcie_try_link_l2(pcie)) {
+                dev_info(pcie->dev, "Link didn't transition to L2 state\n");
+                /*
+                 * TX lane clock freq will reset to Gen1 only if link is in L2
+                 * or detect state.
+                 * So apply pex_rst to end point to force RP to go into detect
+                 * state
+                 */
+                data = appl_readl(pcie, APPL_PINMUX);
+                data &= ~APPL_PINMUX_PEX_RST;
+                appl_writel(pcie, data, APPL_PINMUX);
+
+                err = readl_poll_timeout_atomic(pcie->appl_base + APPL_DEBUG,
+                                                data,
+                                                ((data &
+                                                APPL_DEBUG_LTSSM_STATE_MASK) >>
+                                                APPL_DEBUG_LTSSM_STATE_SHIFT) ==
+                                                LTSSM_STATE_PRE_DETECT,
+                                                1, LTSSM_TIMEOUT);
+                if (err) {
+                        dev_info(pcie->dev, "Link didn't go to detect state\n");
+                } else {
+                        /* Disable LTSSM after link is in detect state */
+                        data = appl_readl(pcie, APPL_CTRL);
+                        data &= ~APPL_CTRL_LTSSM_EN;
+                        appl_writel(pcie, data, APPL_CTRL);
+                }
+        }
+        /*
+         * DBI registers may not be accessible after this as PLL-E would be
+         * down depending on how CLKREQ is pulled by end point
+         */
+        data = appl_readl(pcie, APPL_PINMUX);
+        data |= (APPL_PINMUX_CLKREQ_OVERRIDE_EN | APPL_PINMUX_CLKREQ_OVERRIDE);
+        /* Cut REFCLK to slot */
+        data |= APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN;
+        data &= ~APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE;
+        appl_writel(pcie, data, APPL_PINMUX);
+}
+
+static int tegra_pcie_deinit_controller(struct tegra_pcie_dw *pcie)
+{
+        tegra_pcie_downstream_dev_to_D0(pcie);
+        dw_pcie_host_deinit(&pcie->pci.pp);
+        tegra_pcie_dw_pme_turnoff(pcie);
+
+        return __deinit_controller(pcie);
+}
+
+static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
+{
+        struct pcie_port *pp = &pcie->pci.pp;
+        struct device *dev = pcie->dev;
+        char *name;
+        int ret;
+
+        if (IS_ENABLED(CONFIG_PCI_MSI)) {
+                pp->msi_irq = of_irq_get_byname(dev->of_node, "msi");
+                if (!pp->msi_irq) {
+                        dev_err(dev, "Failed to get MSI interrupt\n");
+                        return -ENODEV;
+                }
+        }
+
+        pm_runtime_enable(dev);
+
+        ret = pm_runtime_get_sync(dev);
+        if (ret < 0) {
+                dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n",
+                        ret);
+                goto fail_pm_get_sync;
+        }
+
+        ret = pinctrl_pm_select_default_state(dev);
+        if (ret < 0) {
+                dev_err(dev, "Failed to configure sideband pins: %d\n", ret);
+                goto fail_pinctrl;
+        }
+
+        tegra_pcie_init_controller(pcie);
+
+        pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci);
+        if (!pcie->link_state) {
+                ret = -ENOMEDIUM;
+                goto fail_host_init;
+        }
+
+        name = devm_kasprintf(dev, GFP_KERNEL, "%pOFP", dev->of_node);
+        if (!name) {
+                ret = -ENOMEM;
+                goto fail_host_init;
+        }
+
+        pcie->debugfs = debugfs_create_dir(name, NULL);
+        if (!pcie->debugfs)
+                dev_err(dev, "Failed to create debugfs\n");
+        else
+                init_debugfs(pcie);
+
+        return ret;
+
+fail_host_init:
+        tegra_pcie_deinit_controller(pcie);
+fail_pinctrl:
+        pm_runtime_put_sync(dev);
+fail_pm_get_sync:
+        pm_runtime_disable(dev);
+        return ret;
+}
+
+static int tegra_pcie_dw_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct resource *atu_dma_res;
+        struct tegra_pcie_dw *pcie;
+        struct resource *dbi_res;
+        struct pcie_port *pp;
+        struct dw_pcie *pci;
+        struct phy **phys;
+        char *name;
+        int ret;
+        u32 i;
+
+        pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
+        if (!pcie)
+                return -ENOMEM;
+
+        pci = &pcie->pci;
+        pci->dev = &pdev->dev;
+        pci->ops = &tegra_dw_pcie_ops;
+        pp = &pci->pp;
+        pcie->dev = &pdev->dev;
+
+        ret = tegra_pcie_dw_parse_dt(pcie);
+        if (ret < 0) {
+                dev_err(dev, "Failed to parse device tree: %d\n", ret);
+                return ret;
+        }
+
+        ret = tegra_pcie_get_slot_regulators(pcie);
+        if (ret < 0) {
+                dev_err(dev, "Failed to get slot regulators: %d\n", ret);
+                return ret;
+        }
+
+        pcie->pex_ctl_supply = devm_regulator_get(dev, "vddio-pex-ctl");
+        if (IS_ERR(pcie->pex_ctl_supply)) {
+                ret = PTR_ERR(pcie->pex_ctl_supply);
+                if (ret != -EPROBE_DEFER)
+                        dev_err(dev, "Failed to get regulator: %ld\n",
+                                PTR_ERR(pcie->pex_ctl_supply));
+                return ret;
+        }
+
+        pcie->core_clk = devm_clk_get(dev, "core");
+        if (IS_ERR(pcie->core_clk)) {
+                dev_err(dev, "Failed to get core clock: %ld\n",
+                        PTR_ERR(pcie->core_clk));
+                return PTR_ERR(pcie->core_clk);
+        }
+
+        pcie->appl_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+                                                      "appl");
+        if (!pcie->appl_res) {
+                dev_err(dev, "Failed to find \"appl\" region\n");
+                return -ENODEV;
+        }
+
+        pcie->appl_base = devm_ioremap_resource(dev, pcie->appl_res);
+        if (IS_ERR(pcie->appl_base))
+                return PTR_ERR(pcie->appl_base);
+
+        pcie->core_apb_rst = devm_reset_control_get(dev, "apb");
+        if (IS_ERR(pcie->core_apb_rst)) {
+                dev_err(dev, "Failed to get APB reset: %ld\n",
+                        PTR_ERR(pcie->core_apb_rst));
+                return PTR_ERR(pcie->core_apb_rst);
+        }
+
+        phys = devm_kcalloc(dev, pcie->phy_count, sizeof(*phys), GFP_KERNEL);
+        if (!phys)
+                return -ENOMEM;
+
+        for (i = 0; i < pcie->phy_count; i++) {
+                name = kasprintf(GFP_KERNEL, "p2u-%u", i);
+                if (!name) {
+                        dev_err(dev, "Failed to create P2U string\n");
+                        return -ENOMEM;
+                }
+                phys[i] = devm_phy_get(dev, name);
+                kfree(name);
+                if (IS_ERR(phys[i])) {
+                        ret = PTR_ERR(phys[i]);
+                        if (ret != -EPROBE_DEFER)
+                                dev_err(dev, "Failed to get PHY: %d\n", ret);
+                        return ret;
+                }
+        }
+
+        pcie->phys = phys;
+
+        dbi_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+        if (!dbi_res) {
+                dev_err(dev, "Failed to find \"dbi\" region\n");
+                return -ENODEV;
+        }
+        pcie->dbi_res = dbi_res;
+
+        pci->dbi_base = devm_ioremap_resource(dev, dbi_res);
+        if (IS_ERR(pci->dbi_base))
+                return PTR_ERR(pci->dbi_base);
+
+        /* Tegra HW locates DBI2 at a fixed offset from DBI */
+        pci->dbi_base2 = pci->dbi_base + 0x1000;
+
+        atu_dma_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+                                                   "atu_dma");
+        if (!atu_dma_res) {
+                dev_err(dev, "Failed to find \"atu_dma\" region\n");
+                return -ENODEV;
+        }
+        pcie->atu_dma_res = atu_dma_res;
+
+        pci->atu_base = devm_ioremap_resource(dev, atu_dma_res);
+        if (IS_ERR(pci->atu_base))
+                return PTR_ERR(pci->atu_base);
+
+        pcie->core_rst = devm_reset_control_get(dev, "core");
+        if (IS_ERR(pcie->core_rst)) {
+                dev_err(dev, "Failed to get core reset: %ld\n",
+                        PTR_ERR(pcie->core_rst));
+                return PTR_ERR(pcie->core_rst);
+        }
+
+        pp->irq = platform_get_irq_byname(pdev, "intr");
+        if (!pp->irq) {
+                dev_err(dev, "Failed to get \"intr\" interrupt\n");
+                return -ENODEV;
+        }
+
+        ret = devm_request_irq(dev, pp->irq, tegra_pcie_irq_handler,
+                               IRQF_SHARED, "tegra-pcie-intr", pcie);
+        if (ret) {
+                dev_err(dev, "Failed to request IRQ %d: %d\n", pp->irq, ret);
+                return ret;
+        }
+
+        pcie->bpmp = tegra_bpmp_get(dev);
+        if (IS_ERR(pcie->bpmp))
+                return PTR_ERR(pcie->bpmp);
+
+        platform_set_drvdata(pdev, pcie);
+
+        ret = tegra_pcie_config_rp(pcie);
+        if (ret && ret != -ENOMEDIUM)
+                goto fail;
+        else
+                return 0;
+
+fail:
+        tegra_bpmp_put(pcie->bpmp);
+        return ret;
+}
+
+static int tegra_pcie_dw_remove(struct platform_device *pdev)
+{
+        struct tegra_pcie_dw *pcie = platform_get_drvdata(pdev);
+
+        if (!pcie->link_state)
+                return 0;
+
+        debugfs_remove_recursive(pcie->debugfs);
+        tegra_pcie_deinit_controller(pcie);
+        pm_runtime_put_sync(pcie->dev);
+        pm_runtime_disable(pcie->dev);
+        tegra_bpmp_put(pcie->bpmp);
+
+        return 0;
+}
+
+static int tegra_pcie_dw_suspend_late(struct device *dev)
+{
+        struct tegra_pcie_dw *pcie = dev_get_drvdata(dev);
+        u32 val;
+
+        if (!pcie->link_state)
+                return 0;
+
+        /* Enable HW_HOT_RST mode */
+        val = appl_readl(pcie, APPL_CTRL);
+        val &= ~(APPL_CTRL_HW_HOT_RST_MODE_MASK <<
+                 APPL_CTRL_HW_HOT_RST_MODE_SHIFT);
+        val |= APPL_CTRL_HW_HOT_RST_EN;
+        appl_writel(pcie, val, APPL_CTRL);
+
+        return 0;
+}
+
+static int tegra_pcie_dw_suspend_noirq(struct device *dev)
+{
+        struct tegra_pcie_dw *pcie = dev_get_drvdata(dev);
+
+        if (!pcie->link_state)
+                return 0;
+
+        /* Save MSI interrupt vector */
+        pcie->msi_ctrl_int = dw_pcie_readl_dbi(&pcie->pci,
+                                               PORT_LOGIC_MSI_CTRL_INT_0_EN);
+        tegra_pcie_downstream_dev_to_D0(pcie);
+        tegra_pcie_dw_pme_turnoff(pcie);
+
+        return __deinit_controller(pcie);
+}
+
+static int tegra_pcie_dw_resume_noirq(struct device *dev)
+{
+        struct tegra_pcie_dw *pcie = dev_get_drvdata(dev);
+        int ret;
+
+        if (!pcie->link_state)
+                return 0;
+
+        ret = tegra_pcie_config_controller(pcie, true);
+        if (ret < 0)
+                return ret;
+
+        ret = tegra_pcie_dw_host_init(&pcie->pci.pp);
+        if (ret < 0) {
+                dev_err(dev, "Failed to init host: %d\n", ret);
+                goto fail_host_init;
+        }
+
+        /* Restore MSI interrupt vector */
+        dw_pcie_writel_dbi(&pcie->pci, PORT_LOGIC_MSI_CTRL_INT_0_EN,
+                           pcie->msi_ctrl_int);
+
+        return 0;
+
+fail_host_init:
+        return __deinit_controller(pcie);
+}
+
+static int tegra_pcie_dw_resume_early(struct device *dev)
+{
+        struct tegra_pcie_dw *pcie = dev_get_drvdata(dev);
+        u32 val;
+
+        if (!pcie->link_state)
+                return 0;
+
+        /* Disable HW_HOT_RST mode */
+        val = appl_readl(pcie, APPL_CTRL);
+        val &= ~(APPL_CTRL_HW_HOT_RST_MODE_MASK <<
+                 APPL_CTRL_HW_HOT_RST_MODE_SHIFT);
+        val |= APPL_CTRL_HW_HOT_RST_MODE_IMDT_RST <<
+               APPL_CTRL_HW_HOT_RST_MODE_SHIFT;
+        val &= ~APPL_CTRL_HW_HOT_RST_EN;
+        appl_writel(pcie, val, APPL_CTRL);
+
+        return 0;
+}
+
+static void tegra_pcie_dw_shutdown(struct platform_device *pdev)
+{
+        struct tegra_pcie_dw *pcie = platform_get_drvdata(pdev);
+
+        if (!pcie->link_state)
+                return;
+
+        debugfs_remove_recursive(pcie->debugfs);
+        tegra_pcie_downstream_dev_to_D0(pcie);
+
+        disable_irq(pcie->pci.pp.irq);
+        if (IS_ENABLED(CONFIG_PCI_MSI))
+                disable_irq(pcie->pci.pp.msi_irq);
+
+        tegra_pcie_dw_pme_turnoff(pcie);
+        __deinit_controller(pcie);
+}
+
+static const struct of_device_id tegra_pcie_dw_of_match[] = {
+        {
+                .compatible = "nvidia,tegra194-pcie",
+        },
+        {},
+};
+
+static const struct dev_pm_ops tegra_pcie_dw_pm_ops = {
+        .suspend_late = tegra_pcie_dw_suspend_late,
+        .suspend_noirq = tegra_pcie_dw_suspend_noirq,
+        .resume_noirq = tegra_pcie_dw_resume_noirq,
+        .resume_early = tegra_pcie_dw_resume_early,
+};
+
+static struct platform_driver tegra_pcie_dw_driver = {
+        .probe = tegra_pcie_dw_probe,
+        .remove = tegra_pcie_dw_remove,
+        .shutdown = tegra_pcie_dw_shutdown,
+        .driver = {
+                .name   = "tegra194-pcie",
+                .pm = &tegra_pcie_dw_pm_ops,
+                .of_match_table = tegra_pcie_dw_of_match,
+        },
+};
+module_platform_driver(tegra_pcie_dw_driver);
+
+MODULE_DEVICE_TABLE(of, tegra_pcie_dw_of_match);
+
+MODULE_AUTHOR("Vidya Sagar <vidyas@nvidia.com>");
+MODULE_DESCRIPTION("NVIDIA PCIe host controller driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c
index c742881b5061..c8cb9c5188a4 100644
--- a/drivers/pci/controller/pci-host-common.c
+++ b/drivers/pci/controller/pci-host-common.c
@@ -43,9 +43,8 @@ static struct pci_config_window *gen_pci_init(struct device *dev,
                 goto err_out;
         }
 
-        err = devm_add_action(dev, gen_pci_unmap_cfg, cfg);
+        err = devm_add_action_or_reset(dev, gen_pci_unmap_cfg, cfg);
         if (err) {
-                gen_pci_unmap_cfg(cfg);
                 goto err_out;
         }
         return cfg;
diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index 0ca73c851e0f..f1f300218fab 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -2809,6 +2809,48 @@ static void put_hvpcibus(struct hv_pcibus_device *hbus)
                 complete(&hbus->remove_event);
 }
 
+#define HVPCI_DOM_MAP_SIZE (64 * 1024)
+static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE);
+
+/*
+ * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0
+ * as invalid for passthrough PCI devices of this driver.
+ */
+#define HVPCI_DOM_INVALID 0
+
+/**
+ * hv_get_dom_num() - Get a valid PCI domain number
+ * Check if the PCI domain number is in use, and return another number if
+ * it is in use.
+ *
+ * @dom: Requested domain number
+ *
+ * return: domain number on success, HVPCI_DOM_INVALID on failure
+ */
+static u16 hv_get_dom_num(u16 dom)
+{
+        unsigned int i;
+
+        if (test_and_set_bit(dom, hvpci_dom_map) == 0)
+                return dom;
+
+        for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) {
+                if (test_and_set_bit(i, hvpci_dom_map) == 0)
+                        return i;
+        }
+
+        return HVPCI_DOM_INVALID;
+}
+
+/**
+ * hv_put_dom_num() - Mark the PCI domain number as free
+ * @dom: Domain number to be freed
+ */
+static void hv_put_dom_num(u16 dom)
+{
+        clear_bit(dom, hvpci_dom_map);
+}
+
 /**
  * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
  * @hdev:       VMBus's tracking struct for this root PCI bus
@@ -2820,6 +2862,7 @@ static int hv_pci_probe(struct hv_device *hdev,
                         const struct hv_vmbus_device_id *dev_id)
 {
         struct hv_pcibus_device *hbus;
+        u16 dom_req, dom;
         char *name;
         int ret;
 
@@ -2835,19 +2878,34 @@ static int hv_pci_probe(struct hv_device *hdev,
         hbus->state = hv_pcibus_init;
 
         /*
-         * The PCI bus "domain" is what is called "segment" in ACPI and
-         * other specs.  Pull it from the instance ID, to get something
-         * unique.  Bytes 8 and 9 are what is used in Windows guests, so
-         * do the same thing for consistency.  Note that, since this code
-         * only runs in a Hyper-V VM, Hyper-V can (and does) guarantee
-         * that (1) the only domain in use for something that looks like
-         * a physical PCI bus (which is actually emulated by the
-         * hypervisor) is domain 0 and (2) there will be no overlap
-         * between domains derived from these instance IDs in the same
-         * VM.
+         * The PCI bus "domain" is what is called "segment" in ACPI and other
+         * specs. Pull it from the instance ID, to get something usually
+         * unique. In rare cases of collision, we will find out another number
+         * not in use.
+         *
+         * Note that, since this code only runs in a Hyper-V VM, Hyper-V
+         * together with this guest driver can guarantee that (1) The only
+         * domain used by Gen1 VMs for something that looks like a physical
+         * PCI bus (which is actually emulated by the hypervisor) is domain 0.
+         * (2) There will be no overlap between domains (after fixing possible
+         * collisions) in the same VM.
          */
-        hbus->sysdata.domain = hdev->dev_instance.b[9] |
-                               hdev->dev_instance.b[8] << 8;
+        dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4];
+        dom = hv_get_dom_num(dom_req);
+
+        if (dom == HVPCI_DOM_INVALID) {
+                dev_err(&hdev->device,
+                        "Unable to use dom# 0x%hx or other numbers", dom_req);
+                ret = -EINVAL;
+                goto free_bus;
+        }
+
+        if (dom != dom_req)
+                dev_info(&hdev->device,
+                         "PCI dom# 0x%hx has collision, using 0x%hx",
+                         dom_req, dom);
+
+        hbus->sysdata.domain = dom;
 
         hbus->hdev = hdev;
         refcount_set(&hbus->remove_lock, 1);
@@ -2862,7 +2920,7 @@ static int hv_pci_probe(struct hv_device *hdev,
                                            hbus->sysdata.domain);
         if (!hbus->wq) {
                 ret = -ENOMEM;
-                goto free_bus;
+                goto free_dom;
         }
 
         ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
@@ -2946,6 +3004,8 @@ close:
         vmbus_close(hdev->channel);
 destroy_wq:
         destroy_workqueue(hbus->wq);
+free_dom:
+        hv_put_dom_num(hbus->sysdata.domain);
 free_bus:
         free_page((unsigned long)hbus);
         return ret;
@@ -3008,8 +3068,8 @@ static int hv_pci_remove(struct hv_device *hdev)
                 /* Remove the bus from PCI's point of view. */
                 pci_lock_rescan_remove();
                 pci_stop_root_bus(hbus->pci_bus);
-                pci_remove_root_bus(hbus->pci_bus);
                 hv_pci_remove_slots(hbus);
+                pci_remove_root_bus(hbus->pci_bus);
                 pci_unlock_rescan_remove();
                 hbus->state = hv_pcibus_removed;
         }
@@ -3027,6 +3087,9 @@ static int hv_pci_remove(struct hv_device *hdev)
         put_hvpcibus(hbus);
         wait_for_completion(&hbus->remove_event);
         destroy_workqueue(hbus->wq);
+
+        hv_put_dom_num(hbus->sysdata.domain);
+
         free_page((unsigned long)hbus);
         return 0;
 }
@@ -3058,6 +3121,9 @@ static void __exit exit_hv_pci_drv(void)
 
 static int __init init_hv_pci_drv(void)
 {
+        /* Set the invalid domain number's bit, so it will not be used */
+        set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
+
         /* Initialize PCI block r/w interface */
         hvpci_block_ops.read_block = hv_read_config_block;
         hvpci_block_ops.write_block = hv_write_config_block;
diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 9a917b2456f6..673a1725ef38 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -2237,14 +2237,15 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
                 err = of_pci_get_devfn(port);
                 if (err < 0) {
                         dev_err(dev, "failed to parse address: %d\n", err);
-                        return err;
+                        goto err_node_put;
                 }
 
                 index = PCI_SLOT(err);
 
                 if (index < 1 || index > soc->num_ports) {
                         dev_err(dev, "invalid port number: %d\n", index);
-                        return -EINVAL;
+                        err = -EINVAL;
+                        goto err_node_put;
                 }
 
                 index--;
@@ -2253,12 +2254,13 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
                 if (err < 0) {
                         dev_err(dev, "failed to parse # of lanes: %d\n",
                                 err);
-                        return err;
+                        goto err_node_put;
                 }
 
                 if (value > 16) {
                         dev_err(dev, "invalid # of lanes: %u\n", value);
-                        return -EINVAL;
+                        err = -EINVAL;
+                        goto err_node_put;
                 }
 
                 lanes |= value << (index << 3);
@@ -2272,13 +2274,15 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
                 lane += value;
 
                 rp = devm_kzalloc(dev, sizeof(*rp), GFP_KERNEL);
-                if (!rp)
-                        return -ENOMEM;
+                if (!rp) {
+                        err = -ENOMEM;
+                        goto err_node_put;
+                }
 
                 err = of_address_to_resource(port, 0, &rp->regs);
                 if (err < 0) {
                         dev_err(dev, "failed to parse address: %d\n", err);
-                        return err;
+                        goto err_node_put;
                 }
 
                 INIT_LIST_HEAD(&rp->list);
@@ -2330,6 +2334,10 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
                 return err;
 
         return 0;
+
+err_node_put:
+        of_node_put(port);
+        return err;
 }
 
 /*
diff --git a/drivers/pci/controller/pcie-iproc-platform.c b/drivers/pci/controller/pcie-iproc-platform.c
index 5a3550b6bb29..9ee6200a66f4 100644
--- a/drivers/pci/controller/pcie-iproc-platform.c
+++ b/drivers/pci/controller/pcie-iproc-platform.c
@@ -93,12 +93,9 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
         pcie->need_ib_cfg = of_property_read_bool(np, "dma-ranges");
 
         /* PHY use is optional */
-        pcie->phy = devm_phy_get(dev, "pcie-phy");
-        if (IS_ERR(pcie->phy)) {
-                if (PTR_ERR(pcie->phy) == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
-                pcie->phy = NULL;
-        }
+        pcie->phy = devm_phy_optional_get(dev, "pcie-phy");
+        if (IS_ERR(pcie->phy))
+                return PTR_ERR(pcie->phy);
 
         ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &resources,
                                                     &iobase);
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index 80601e1b939e..626a7c352dfd 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -73,6 +73,7 @@
 #define PCIE_MSI_VECTOR         0x0c0
 
 #define PCIE_CONF_VEND_ID       0x100
+#define PCIE_CONF_DEVICE_ID     0x102
 #define PCIE_CONF_CLASS_ID      0x106
 
 #define PCIE_INT_MASK           0x420
@@ -141,12 +142,16 @@ struct mtk_pcie_port;
 /**
  * struct mtk_pcie_soc - differentiate between host generations
  * @need_fix_class_id: whether this host's class ID needed to be fixed or not
+ * @need_fix_device_id: whether this host's device ID needed to be fixed or not
+ * @device_id: device ID which this host need to be fixed
  * @ops: pointer to configuration access functions
  * @startup: pointer to controller setting functions
  * @setup_irq: pointer to initialize IRQ functions
  */
 struct mtk_pcie_soc {
         bool need_fix_class_id;
+        bool need_fix_device_id;
+        unsigned int device_id;
         struct pci_ops *ops;
         int (*startup)(struct mtk_pcie_port *port);
         int (*setup_irq)(struct mtk_pcie_port *port, struct device_node *node);
@@ -630,8 +635,6 @@ static void mtk_pcie_intr_handler(struct irq_desc *desc)
         }
 
         chained_irq_exit(irqchip, desc);
-
-        return;
 }
 
 static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
@@ -696,6 +699,9 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
                 writew(val, port->base + PCIE_CONF_CLASS_ID);
         }
 
+        if (soc->need_fix_device_id)
+                writew(soc->device_id, port->base + PCIE_CONF_DEVICE_ID);
+
         /* 100ms timeout value should be enough for Gen1/2 training */
         err = readl_poll_timeout(port->base + PCIE_LINK_STATUS_V2, val,
                                  !!(val & PCIE_PORT_LINKUP_V2), 20,
@@ -1216,11 +1222,21 @@ static const struct mtk_pcie_soc mtk_pcie_soc_mt7622 = {
         .setup_irq = mtk_pcie_setup_irq,
 };
 
+static const struct mtk_pcie_soc mtk_pcie_soc_mt7629 = {
+        .need_fix_class_id = true,
+        .need_fix_device_id = true,
+        .device_id = PCI_DEVICE_ID_MEDIATEK_7629,
+        .ops = &mtk_pcie_ops_v2,
+        .startup = mtk_pcie_startup_port_v2,
+        .setup_irq = mtk_pcie_setup_irq,
+};
+
 static const struct of_device_id mtk_pcie_ids[] = {
         { .compatible = "mediatek,mt2701-pcie", .data = &mtk_pcie_soc_v1 },
         { .compatible = "mediatek,mt7623-pcie", .data = &mtk_pcie_soc_v1 },
         { .compatible = "mediatek,mt2712-pcie", .data = &mtk_pcie_soc_mt2712 },
         { .compatible = "mediatek,mt7622-pcie", .data = &mtk_pcie_soc_mt7622 },
+        { .compatible = "mediatek,mt7629-pcie", .data = &mtk_pcie_soc_mt7629 },
         {},
 };
 
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index 672e633601c7..a45a6447b01d 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -88,6 +88,7 @@
 #define  AMAP_CTRL_TYPE_MASK            3
 
 #define PAB_EXT_PEX_AMAP_SIZEN(win)     PAB_EXT_REG_ADDR(0xbef0, win)
+#define PAB_EXT_PEX_AMAP_AXI_WIN(win)   PAB_EXT_REG_ADDR(0xb4a0, win)
 #define PAB_PEX_AMAP_AXI_WIN(win)       PAB_REG_ADDR(0x4ba4, win)
 #define PAB_PEX_AMAP_PEX_WIN_L(win)     PAB_REG_ADDR(0x4ba8, win)
 #define PAB_PEX_AMAP_PEX_WIN_H(win)     PAB_REG_ADDR(0x4bac, win)
@@ -462,7 +463,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie)
 }
 
 static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
-                               u64 pci_addr, u32 type, u64 size)
+                               u64 cpu_addr, u64 pci_addr, u32 type, u64 size)
 {
         u32 value;
         u64 size64 = ~(size - 1);
@@ -482,7 +483,10 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
         csr_writel(pcie, upper_32_bits(size64),
                    PAB_EXT_PEX_AMAP_SIZEN(win_num));
 
-        csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num));
+        csr_writel(pcie, lower_32_bits(cpu_addr),
+                   PAB_PEX_AMAP_AXI_WIN(win_num));
+        csr_writel(pcie, upper_32_bits(cpu_addr),
+                   PAB_EXT_PEX_AMAP_AXI_WIN(win_num));
 
         csr_writel(pcie, lower_32_bits(pci_addr),
                    PAB_PEX_AMAP_PEX_WIN_L(win_num));
@@ -624,7 +628,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
                            CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res));
 
         /* memory inbound translation window */
-        program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
+        program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
 
         /* Get the I/O and memory ranges from DT */
         resource_list_for_each_entry(win, &pcie->resources) {
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index 8d20f1793a61..ef8e677ce9d1 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -608,29 +608,29 @@ static int rockchip_pcie_parse_host_dt(struct rockchip_pcie *rockchip)
 
         rockchip->vpcie12v = devm_regulator_get_optional(dev, "vpcie12v");
         if (IS_ERR(rockchip->vpcie12v)) {
-                if (PTR_ERR(rockchip->vpcie12v) == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
+                if (PTR_ERR(rockchip->vpcie12v) != -ENODEV)
+                        return PTR_ERR(rockchip->vpcie12v);
                 dev_info(dev, "no vpcie12v regulator found\n");
         }
 
         rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3");
         if (IS_ERR(rockchip->vpcie3v3)) {
-                if (PTR_ERR(rockchip->vpcie3v3) == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
+                if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV)
+                        return PTR_ERR(rockchip->vpcie3v3);
                 dev_info(dev, "no vpcie3v3 regulator found\n");
         }
 
         rockchip->vpcie1v8 = devm_regulator_get_optional(dev, "vpcie1v8");
         if (IS_ERR(rockchip->vpcie1v8)) {
-                if (PTR_ERR(rockchip->vpcie1v8) == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
+                if (PTR_ERR(rockchip->vpcie1v8) != -ENODEV)
+                        return PTR_ERR(rockchip->vpcie1v8);
                 dev_info(dev, "no vpcie1v8 regulator found\n");
         }
 
         rockchip->vpcie0v9 = devm_regulator_get_optional(dev, "vpcie0v9");
         if (IS_ERR(rockchip->vpcie0v9)) {
-                if (PTR_ERR(rockchip->vpcie0v9) == -EPROBE_DEFER)
-                        return -EPROBE_DEFER;
+                if (PTR_ERR(rockchip->vpcie0v9) != -ENODEV)
+                        return PTR_ERR(rockchip->vpcie0v9);
                 dev_info(dev, "no vpcie0v9 regulator found\n");
         }
 
diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c
index 4575e0c6dc4b..a35d3f3996d7 100644
--- a/drivers/pci/controller/vmd.c
+++ b/drivers/pci/controller/vmd.c
@@ -31,6 +31,9 @@
 #define PCI_REG_VMLOCK          0x70
 #define MB2_SHADOW_EN(vmlock)   (vmlock & 0x2)
 
+#define MB2_SHADOW_OFFSET       0x2000
+#define MB2_SHADOW_SIZE         16
+
 enum vmd_features {
         /*
          * Device may contain registers which hint the physical location of the
@@ -94,6 +97,7 @@ struct vmd_dev {
         struct resource         resources[3];
         struct irq_domain       *irq_domain;
         struct pci_bus          *bus;
+        u8                      busn_start;
 
         struct dma_map_ops      dma_ops;
         struct dma_domain       dma_domain;
@@ -440,7 +444,8 @@ static char __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
                                   unsigned int devfn, int reg, int len)
 {
         char __iomem *addr = vmd->cfgbar +
-                             (bus->number << 20) + (devfn << 12) + reg;
+                             ((bus->number - vmd->busn_start) << 20) +
+                             (devfn << 12) + reg;
 
         if ((addr - vmd->cfgbar) + len >=
             resource_size(&vmd->dev->resource[VMD_CFGBAR]))
@@ -563,7 +568,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
         unsigned long flags;
         LIST_HEAD(resources);
         resource_size_t offset[2] = {0};
-        resource_size_t membar2_offset = 0x2000, busn_start = 0;
+        resource_size_t membar2_offset = 0x2000;
         struct pci_bus *child;
 
         /*
@@ -576,7 +581,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
                 u32 vmlock;
                 int ret;
 
-                membar2_offset = 0x2018;
+                membar2_offset = MB2_SHADOW_OFFSET + MB2_SHADOW_SIZE;
                 ret = pci_read_config_dword(vmd->dev, PCI_REG_VMLOCK, &vmlock);
                 if (ret || vmlock == ~0)
                         return -ENODEV;
@@ -588,9 +593,9 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
                         if (!membar2)
                                 return -ENOMEM;
                         offset[0] = vmd->dev->resource[VMD_MEMBAR1].start -
-                                                readq(membar2 + 0x2008);
+                                        readq(membar2 + MB2_SHADOW_OFFSET);
                         offset[1] = vmd->dev->resource[VMD_MEMBAR2].start -
-                                                readq(membar2 + 0x2010);
+                                        readq(membar2 + MB2_SHADOW_OFFSET + 8);
                         pci_iounmap(vmd->dev, membar2);
                 }
         }
@@ -606,14 +611,14 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
                 pci_read_config_dword(vmd->dev, PCI_REG_VMCONFIG, &vmconfig);
                 if (BUS_RESTRICT_CAP(vmcap) &&
                     (BUS_RESTRICT_CFG(vmconfig) == 0x1))
-                        busn_start = 128;
+                        vmd->busn_start = 128;
         }
 
         res = &vmd->dev->resource[VMD_CFGBAR];
         vmd->resources[0] = (struct resource) {
                 .name  = "VMD CFGBAR",
-                .start = busn_start,
-                .end   = busn_start + (resource_size(res) >> 20) - 1,
+                .start = vmd->busn_start,
+                .end   = vmd->busn_start + (resource_size(res) >> 20) - 1,
                 .flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
         };
 
@@ -681,8 +686,8 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
         pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
         pci_add_resource_offset(&resources, &vmd->resources[2], offset[1]);
 
-        vmd->bus = pci_create_root_bus(&vmd->dev->dev, busn_start, &vmd_ops,
-                                       sd, &resources);
+        vmd->bus = pci_create_root_bus(&vmd->dev->dev, vmd->busn_start,
+                                       &vmd_ops, sd, &resources);
         if (!vmd->bus) {
                 pci_free_resource_list(&resources);
                 irq_domain_remove(vmd->irq_domain);
diff --git a/drivers/pci/hotplug/cpci_hotplug_core.c b/drivers/pci/hotplug/cpci_hotplug_core.c
index 603eadf3d965..d0559d2faf50 100644
--- a/drivers/pci/hotplug/cpci_hotplug_core.c
+++ b/drivers/pci/hotplug/cpci_hotplug_core.c
@@ -563,7 +563,6 @@ cleanup_slots(void)
         }
 cleanup_null:
         up_write(&list_rwsem);
-        return;
 }
 
 int
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index 16bbb183695a..b8aacb41a83c 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -173,7 +173,6 @@ static void pci_print_IRQ_route(void)
                 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
 
         }
-        return;
 }
 
 
diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c
index b7f4e1f099d9..68de958a9be8 100644
--- a/drivers/pci/hotplug/cpqphp_ctrl.c
+++ b/drivers/pci/hotplug/cpqphp_ctrl.c
@@ -1872,8 +1872,6 @@ static void interrupt_event_handler(struct controller *ctrl)
                         }
                 }               /* End of FOR loop */
         }
-
-        return;
 }
 
 
@@ -1943,8 +1941,6 @@ void cpqhp_pushbutton_thread(struct timer_list *t)
 
                 p_slot->state = STATIC_STATE;
         }
-
-        return;
 }
 
 
diff --git a/drivers/pci/hotplug/cpqphp_nvram.h b/drivers/pci/hotplug/cpqphp_nvram.h
index 918ff8dbfe62..70e879b6a23f 100644
--- a/drivers/pci/hotplug/cpqphp_nvram.h
+++ b/drivers/pci/hotplug/cpqphp_nvram.h
@@ -16,10 +16,7 @@
 
 #ifndef CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM
 
-static inline void compaq_nvram_init(void __iomem *rom_start)
-{
-        return;
-}
+static inline void compaq_nvram_init(void __iomem *rom_start) { }
 
 static inline int compaq_nvram_load(void __iomem *rom_start, struct controller *ctrl)
 {
diff --git a/drivers/pci/hotplug/ibmphp_res.c b/drivers/pci/hotplug/ibmphp_res.c
index 5e8caf7a4452..5c93aa14f0de 100644
--- a/drivers/pci/hotplug/ibmphp_res.c
+++ b/drivers/pci/hotplug/ibmphp_res.c
@@ -1941,6 +1941,7 @@ static int __init update_bridge_ranges(struct bus_node **bus)
                                                 break;
                                         case PCI_HEADER_TYPE_BRIDGE:
                                                 function = 0x8;
+                                                /* fall through */
                                         case PCI_HEADER_TYPE_MULTIBRIDGE:
                                                 /* We assume here that only 1 bus behind the bridge
                                                    TO DO: add functionality for several:
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 8c51a04b8083..654c972b8ea0 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -110,9 +110,9 @@ struct controller {
  *
  * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
  * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
- *      green led is blinking
+ *      Power Indicator is blinking
  * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
- *      green led is blinking
+ *      Power Indicator is blinking
  * @POWERON_STATE: slot is currently powering on
  * @POWEROFF_STATE: slot is currently powering off
  * @ON_STATE: slot is powered on, subordinate devices have been enumerated
@@ -167,12 +167,11 @@ int pciehp_power_on_slot(struct controller *ctrl);
 void pciehp_power_off_slot(struct controller *ctrl);
 void pciehp_get_power_status(struct controller *ctrl, u8 *status);
 
-void pciehp_set_attention_status(struct controller *ctrl, u8 status);
+#define INDICATOR_NOOP -1       /* Leave indicator unchanged */
+void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
+
 void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
 int pciehp_query_power_fault(struct controller *ctrl);
-void pciehp_green_led_on(struct controller *ctrl);
-void pciehp_green_led_off(struct controller *ctrl);
-void pciehp_green_led_blink(struct controller *ctrl);
 bool pciehp_card_present(struct controller *ctrl);
 bool pciehp_card_present_or_link_active(struct controller *ctrl);
 int pciehp_check_link_status(struct controller *ctrl);
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 6ad0d86762cb..b3122c151b80 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -95,15 +95,20 @@ static void cleanup_slot(struct controller *ctrl)
 }
 
 /*
- * set_attention_status - Turns the Amber LED for a slot on, off or blink
+ * set_attention_status - Turns the Attention Indicator on, off or blinking
  */
 static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
 {
         struct controller *ctrl = to_ctrl(hotplug_slot);
         struct pci_dev *pdev = ctrl->pcie->port;
 
+        if (status)
+                status <<= PCI_EXP_SLTCTL_ATTN_IND_SHIFT;
+        else
+                status = PCI_EXP_SLTCTL_ATTN_IND_OFF;
+
         pci_config_pm_runtime_get(pdev);
-        pciehp_set_attention_status(ctrl, status);
+        pciehp_set_indicators(ctrl, INDICATOR_NOOP, status);
         pci_config_pm_runtime_put(pdev);
         return 0;
 }
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
index 631ced0ab28a..21af7b16d7a4 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -30,7 +30,10 @@
 
 static void set_slot_off(struct controller *ctrl)
 {
-        /* turn off slot, turn on Amber LED, turn off Green LED if supported*/
+        /*
+         * Turn off slot, turn on attention indicator, turn off power
+         * indicator
+         */
         if (POWER_CTRL(ctrl)) {
                 pciehp_power_off_slot(ctrl);
 
@@ -42,8 +45,8 @@ static void set_slot_off(struct controller *ctrl)
                 msleep(1000);
         }
 
-        pciehp_green_led_off(ctrl);
-        pciehp_set_attention_status(ctrl, 1);
+        pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
+                              PCI_EXP_SLTCTL_ATTN_IND_ON);
 }
 
 /**
@@ -65,7 +68,8 @@ static int board_added(struct controller *ctrl)
                         return retval;
         }
 
-        pciehp_green_led_blink(ctrl);
+        pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK,
+                              INDICATOR_NOOP);
 
         /* Check link training status */
         retval = pciehp_check_link_status(ctrl);
@@ -90,8 +94,8 @@ static int board_added(struct controller *ctrl)
                 }
         }
 
-        pciehp_green_led_on(ctrl);
-        pciehp_set_attention_status(ctrl, 0);
+        pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON,
+                              PCI_EXP_SLTCTL_ATTN_IND_OFF);
         return 0;
 
 err_exit:
@@ -100,7 +104,7 @@ err_exit:
 }
 
 /**
- * remove_board - Turns off slot and LEDs
+ * remove_board - Turn off slot and Power Indicator
  * @ctrl: PCIe hotplug controller where board is being removed
  * @safe_removal: whether the board is safely removed (versus surprise removed)
  */
@@ -123,8 +127,8 @@ static void remove_board(struct controller *ctrl, bool safe_removal)
                            &ctrl->pending_events);
         }
 
-        /* turn off Green LED */
-        pciehp_green_led_off(ctrl);
+        pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
+                              INDICATOR_NOOP);
 }
 
 static int pciehp_enable_slot(struct controller *ctrl);
@@ -171,9 +175,9 @@ void pciehp_handle_button_press(struct controller *ctrl)
                         ctrl_info(ctrl, "Slot(%s) Powering on due to button press\n",
                                   slot_name(ctrl));
                 }
-                /* blink green LED and turn off amber */
-                pciehp_green_led_blink(ctrl);
-                pciehp_set_attention_status(ctrl, 0);
+                /* blink power indicator and turn off attention */
+                pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK,
+                                      PCI_EXP_SLTCTL_ATTN_IND_OFF);
                 schedule_delayed_work(&ctrl->button_work, 5 * HZ);
                 break;
         case BLINKINGOFF_STATE:
@@ -187,12 +191,13 @@ void pciehp_handle_button_press(struct controller *ctrl)
                 cancel_delayed_work(&ctrl->button_work);
                 if (ctrl->state == BLINKINGOFF_STATE) {
                         ctrl->state = ON_STATE;
-                        pciehp_green_led_on(ctrl);
+                        pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON,
+                                              PCI_EXP_SLTCTL_ATTN_IND_OFF);
                 } else {
                         ctrl->state = OFF_STATE;
-                        pciehp_green_led_off(ctrl);
+                        pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
+                                              PCI_EXP_SLTCTL_ATTN_IND_OFF);
                 }
-                pciehp_set_attention_status(ctrl, 0);
                 ctrl_info(ctrl, "Slot(%s): Action canceled due to button press\n",
                           slot_name(ctrl));
                 break;
@@ -310,7 +315,9 @@ static int pciehp_enable_slot(struct controller *ctrl)
         pm_runtime_get_sync(&ctrl->pcie->port->dev);
         ret = __pciehp_enable_slot(ctrl);
         if (ret && ATTN_BUTTN(ctrl))
-                pciehp_green_led_off(ctrl); /* may be blinking */
+                /* may be blinking */
+                pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
+                                      INDICATOR_NOOP);
         pm_runtime_put(&ctrl->pcie->port->dev);
 
         mutex_lock(&ctrl->state_lock);
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index bd990e3371e3..1a522c1c4177 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -418,65 +418,40 @@ int pciehp_set_raw_indicator_status(struct hotplug_slot *hotplug_slot,
         return 0;
 }
 
-void pciehp_set_attention_status(struct controller *ctrl, u8 value)
+/**
+ * pciehp_set_indicators() - set attention indicator, power indicator, or both
+ * @ctrl: PCIe hotplug controller
+ * @pwr: one of:
+ *      PCI_EXP_SLTCTL_PWR_IND_ON
+ *      PCI_EXP_SLTCTL_PWR_IND_BLINK
+ *      PCI_EXP_SLTCTL_PWR_IND_OFF
+ * @attn: one of:
+ *      PCI_EXP_SLTCTL_ATTN_IND_ON
+ *      PCI_EXP_SLTCTL_ATTN_IND_BLINK
+ *      PCI_EXP_SLTCTL_ATTN_IND_OFF
+ *
+ * Either @pwr or @attn can also be INDICATOR_NOOP to leave that indicator
+ * unchanged.
+ */
+void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn)
 {
-        u16 slot_cmd;
+        u16 cmd = 0, mask = 0;
 
-        if (!ATTN_LED(ctrl))
-                return;
-
-        switch (value) {
-        case 0:         /* turn off */
-                slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_OFF;
-                break;
-        case 1:         /* turn on */
-                slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_ON;
-                break;
-        case 2:         /* turn blink */
-                slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_BLINK;
-                break;
-        default:
-                return;
+        if (PWR_LED(ctrl) && pwr != INDICATOR_NOOP) {
+                cmd |= (pwr & PCI_EXP_SLTCTL_PIC);
+                mask |= PCI_EXP_SLTCTL_PIC;
         }
-        pcie_write_cmd_nowait(ctrl, slot_cmd, PCI_EXP_SLTCTL_AIC);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
-                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
-}
 
-void pciehp_green_led_on(struct controller *ctrl)
-{
-        if (!PWR_LED(ctrl))
-                return;
-
-        pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON,
-                              PCI_EXP_SLTCTL_PIC);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
-                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
-                 PCI_EXP_SLTCTL_PWR_IND_ON);
-}
-
-void pciehp_green_led_off(struct controller *ctrl)
-{
-        if (!PWR_LED(ctrl))
-                return;
-
-        pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
-                              PCI_EXP_SLTCTL_PIC);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
-                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
-                 PCI_EXP_SLTCTL_PWR_IND_OFF);
-}
-
-void pciehp_green_led_blink(struct controller *ctrl)
-{
-        if (!PWR_LED(ctrl))
-                return;
+        if (ATTN_LED(ctrl) && attn != INDICATOR_NOOP) {
+                cmd |= (attn & PCI_EXP_SLTCTL_AIC);
+                mask |= PCI_EXP_SLTCTL_AIC;
+        }
 
-        pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK,
-                              PCI_EXP_SLTCTL_PIC);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
-                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
-                 PCI_EXP_SLTCTL_PWR_IND_BLINK);
+        if (cmd) {
+                pcie_write_cmd_nowait(ctrl, cmd, mask);
+                ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+                         pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd);
+        }
 }
 
 int pciehp_power_on_slot(struct controller *ctrl)
@@ -638,8 +613,8 @@ static irqreturn_t pciehp_ist(int irq, void *dev_id)
         if ((events & PCI_EXP_SLTSTA_PFD) && !ctrl->power_fault_detected) {
                 ctrl->power_fault_detected = 1;
                 ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(ctrl));
-                pciehp_set_attention_status(ctrl, 1);
-                pciehp_green_led_off(ctrl);
+                pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
+                                      PCI_EXP_SLTCTL_ATTN_IND_ON);
         }
 
         /*
diff --git a/drivers/pci/hotplug/rpadlpar_core.c b/drivers/pci/hotplug/rpadlpar_core.c
index 182f9e3443ee..977946e4e613 100644
--- a/drivers/pci/hotplug/rpadlpar_core.c
+++ b/drivers/pci/hotplug/rpadlpar_core.c
@@ -473,7 +473,6 @@ int __init rpadlpar_io_init(void)
 void rpadlpar_io_exit(void)
 {
         dlpar_sysfs_exit();
-        return;
 }
 
 module_init(rpadlpar_io_init);
diff --git a/drivers/pci/hotplug/rpaphp_core.c b/drivers/pci/hotplug/rpaphp_core.c
index c3899ee1db99..18627bb21e9e 100644
--- a/drivers/pci/hotplug/rpaphp_core.c
+++ b/drivers/pci/hotplug/rpaphp_core.c
@@ -408,7 +408,6 @@ static void __exit cleanup_slots(void)
                 pci_hp_deregister(&slot->hotplug_slot);
                 dealloc_slot_struct(slot);
         }
-        return;
 }
 
 static int __init rpaphp_init(void)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 525fd3f272b3..b3f972e8cfed 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -240,6 +240,173 @@ void pci_iov_remove_virtfn(struct pci_dev *dev, int id)
         pci_dev_put(dev);
 }
 
+static ssize_t sriov_totalvfs_show(struct device *dev,
+                                   struct device_attribute *attr,
+                                   char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
+}
+
+static ssize_t sriov_numvfs_show(struct device *dev,
+                                 struct device_attribute *attr,
+                                 char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
+}
+
+/*
+ * num_vfs > 0; number of VFs to enable
+ * num_vfs = 0; disable all VFs
+ *
+ * Note: SRIOV spec does not allow partial VF
+ *       disable, so it's all or none.
+ */
+static ssize_t sriov_numvfs_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+        int ret;
+        u16 num_vfs;
+
+        ret = kstrtou16(buf, 0, &num_vfs);
+        if (ret < 0)
+                return ret;
+
+        if (num_vfs > pci_sriov_get_totalvfs(pdev))
+                return -ERANGE;
+
+        device_lock(&pdev->dev);
+
+        if (num_vfs == pdev->sriov->num_VFs)
+                goto exit;
+
+        /* is PF driver loaded w/callback */
+        if (!pdev->driver || !pdev->driver->sriov_configure) {
+                pci_info(pdev, "Driver does not support SRIOV configuration via sysfs\n");
+                ret = -ENOENT;
+                goto exit;
+        }
+
+        if (num_vfs == 0) {
+                /* disable VFs */
+                ret = pdev->driver->sriov_configure(pdev, 0);
+                goto exit;
+        }
+
+        /* enable VFs */
+        if (pdev->sriov->num_VFs) {
+                pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
+                         pdev->sriov->num_VFs, num_vfs);
+                ret = -EBUSY;
+                goto exit;
+        }
+
+        ret = pdev->driver->sriov_configure(pdev, num_vfs);
+        if (ret < 0)
+                goto exit;
+
+        if (ret != num_vfs)
+                pci_warn(pdev, "%d VFs requested; only %d enabled\n",
+                         num_vfs, ret);
+
+exit:
+        device_unlock(&pdev->dev);
+
+        if (ret < 0)
+                return ret;
+
+        return count;
+}
+
+static ssize_t sriov_offset_show(struct device *dev,
+                                 struct device_attribute *attr,
+                                 char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        return sprintf(buf, "%u\n", pdev->sriov->offset);
+}
+
+static ssize_t sriov_stride_show(struct device *dev,
+                                 struct device_attribute *attr,
+                                 char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        return sprintf(buf, "%u\n", pdev->sriov->stride);
+}
+
+static ssize_t sriov_vf_device_show(struct device *dev,
+                                    struct device_attribute *attr,
+                                    char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        return sprintf(buf, "%x\n", pdev->sriov->vf_device);
+}
+
+static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
+                                            struct device_attribute *attr,
+                                            char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
+}
+
+static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
+                                             struct device_attribute *attr,
+                                             const char *buf, size_t count)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+        bool drivers_autoprobe;
+
+        if (kstrtobool(buf, &drivers_autoprobe) < 0)
+                return -EINVAL;
+
+        pdev->sriov->drivers_autoprobe = drivers_autoprobe;
+
+        return count;
+}
+
+static DEVICE_ATTR_RO(sriov_totalvfs);
+static DEVICE_ATTR_RW(sriov_numvfs);
+static DEVICE_ATTR_RO(sriov_offset);
+static DEVICE_ATTR_RO(sriov_stride);
+static DEVICE_ATTR_RO(sriov_vf_device);
+static DEVICE_ATTR_RW(sriov_drivers_autoprobe);
+
+static struct attribute *sriov_dev_attrs[] = {
+        &dev_attr_sriov_totalvfs.attr,
+        &dev_attr_sriov_numvfs.attr,
+        &dev_attr_sriov_offset.attr,
+        &dev_attr_sriov_stride.attr,
+        &dev_attr_sriov_vf_device.attr,
+        &dev_attr_sriov_drivers_autoprobe.attr,
+        NULL,
+};
+
+static umode_t sriov_attrs_are_visible(struct kobject *kobj,
+                                       struct attribute *a, int n)
+{
+        struct device *dev = kobj_to_dev(kobj);
+
+        if (!dev_is_pf(dev))
+                return 0;
+
+        return a->mode;
+}
+
+const struct attribute_group sriov_dev_attr_group = {
+        .attrs = sriov_dev_attrs,
+        .is_visible = sriov_attrs_are_visible,
+};
+
 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
 {
         return 0;
@@ -557,8 +724,8 @@ static void sriov_restore_state(struct pci_dev *dev)
         ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI;
         pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl);
 
-        for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
-                pci_update_resource(dev, i);
+        for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
+                pci_update_resource(dev, i + PCI_IOV_RESOURCES);
 
         pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
         pci_iov_set_numvfs(dev, iov->num_VFs);
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index bc7b27a28795..36891e7deee3 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -353,7 +353,7 @@ EXPORT_SYMBOL_GPL(devm_of_pci_get_host_bridge_resources);
 /**
  * of_irq_parse_pci - Resolve the interrupt for a PCI device
  * @pdev:       the device whose interrupt is to be resolved
- * @out_irq:    structure of_irq filled by this function
+ * @out_irq:    structure of_phandle_args filled by this function
  *
  * This function resolves the PCI interrupt for a given PCI device. If a
  * device-node exists for a given pci_dev, it will use normal OF tree
diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c
index 234476226529..0608aae72ccc 100644
--- a/drivers/pci/p2pdma.c
+++ b/drivers/pci/p2pdma.c
@@ -18,13 +18,32 @@
 #include <linux/percpu-refcount.h>
 #include <linux/random.h>
 #include <linux/seq_buf.h>
-#include <linux/iommu.h>
+#include <linux/xarray.h>
+
+enum pci_p2pdma_map_type {
+        PCI_P2PDMA_MAP_UNKNOWN = 0,
+        PCI_P2PDMA_MAP_NOT_SUPPORTED,
+        PCI_P2PDMA_MAP_BUS_ADDR,
+        PCI_P2PDMA_MAP_THRU_HOST_BRIDGE,
+};
 
 struct pci_p2pdma {
         struct gen_pool *pool;
         bool p2pmem_published;
+        struct xarray map_types;
 };
 
+struct pci_p2pdma_pagemap {
+        struct dev_pagemap pgmap;
+        struct pci_dev *provider;
+        u64 bus_offset;
+};
+
+static struct pci_p2pdma_pagemap *to_p2p_pgmap(struct dev_pagemap *pgmap)
+{
+        return container_of(pgmap, struct pci_p2pdma_pagemap, pgmap);
+}
+
 static ssize_t size_show(struct device *dev, struct device_attribute *attr,
                          char *buf)
 {
@@ -87,6 +106,7 @@ static void pci_p2pdma_release(void *data)
 
         gen_pool_destroy(p2pdma->pool);
         sysfs_remove_group(&pdev->dev.kobj, &p2pmem_group);
+        xa_destroy(&p2pdma->map_types);
 }
 
 static int pci_p2pdma_setup(struct pci_dev *pdev)
@@ -98,6 +118,8 @@ static int pci_p2pdma_setup(struct pci_dev *pdev)
         if (!p2p)
                 return -ENOMEM;
 
+        xa_init(&p2p->map_types);
+
         p2p->pool = gen_pool_create(PAGE_SHIFT, dev_to_node(&pdev->dev));
         if (!p2p->pool)
                 goto out;
@@ -135,6 +157,7 @@ out:
 int pci_p2pdma_add_resource(struct pci_dev *pdev, int bar, size_t size,
                             u64 offset)
 {
+        struct pci_p2pdma_pagemap *p2p_pgmap;
         struct dev_pagemap *pgmap;
         void *addr;
         int error;
@@ -157,14 +180,18 @@ int pci_p2pdma_add_resource(struct pci_dev *pdev, int bar, size_t size,
                         return error;
         }
 
-        pgmap = devm_kzalloc(&pdev->dev, sizeof(*pgmap), GFP_KERNEL);
-        if (!pgmap)
+        p2p_pgmap = devm_kzalloc(&pdev->dev, sizeof(*p2p_pgmap), GFP_KERNEL);
+        if (!p2p_pgmap)
                 return -ENOMEM;
+
+        pgmap = &p2p_pgmap->pgmap;
         pgmap->res.start = pci_resource_start(pdev, bar) + offset;
         pgmap->res.end = pgmap->res.start + size - 1;
         pgmap->res.flags = pci_resource_flags(pdev, bar);
         pgmap->type = MEMORY_DEVICE_PCI_P2PDMA;
-        pgmap->pci_p2pdma_bus_offset = pci_bus_address(pdev, bar) -
+
+        p2p_pgmap->provider = pdev;
+        p2p_pgmap->bus_offset = pci_bus_address(pdev, bar) -
                 pci_resource_start(pdev, bar);
 
         addr = devm_memremap_pages(&pdev->dev, pgmap);
@@ -246,19 +273,32 @@ static void seq_buf_print_bus_devfn(struct seq_buf *buf, struct pci_dev *pdev)
         seq_buf_printf(buf, "%s;", pci_name(pdev));
 }
 
-/*
- * If we can't find a common upstream bridge take a look at the root
- * complex and compare it to a whitelist of known good hardware.
- */
-static bool root_complex_whitelist(struct pci_dev *dev)
+static const struct pci_p2pdma_whitelist_entry {
+        unsigned short vendor;
+        unsigned short device;
+        enum {
+                REQ_SAME_HOST_BRIDGE    = 1 << 0,
+        } flags;
+} pci_p2pdma_whitelist[] = {
+        /* AMD ZEN */
+        {PCI_VENDOR_ID_AMD,     0x1450, 0},
+
+        /* Intel Xeon E5/Core i7 */
+        {PCI_VENDOR_ID_INTEL,   0x3c00, REQ_SAME_HOST_BRIDGE},
+        {PCI_VENDOR_ID_INTEL,   0x3c01, REQ_SAME_HOST_BRIDGE},
+        /* Intel Xeon E7 v3/Xeon E5 v3/Core i7 */
+        {PCI_VENDOR_ID_INTEL,   0x2f00, REQ_SAME_HOST_BRIDGE},
+        {PCI_VENDOR_ID_INTEL,   0x2f01, REQ_SAME_HOST_BRIDGE},
+        {}
+};
+
+static bool __host_bridge_whitelist(struct pci_host_bridge *host,
+                                    bool same_host_bridge)
 {
-        struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
         struct pci_dev *root = pci_get_slot(host->bus, PCI_DEVFN(0, 0));
+        const struct pci_p2pdma_whitelist_entry *entry;
         unsigned short vendor, device;
 
-        if (iommu_present(dev->dev.bus))
-                return false;
-
         if (!root)
                 return false;
 
@@ -266,65 +306,49 @@ static bool root_complex_whitelist(struct pci_dev *dev)
         device = root->device;
         pci_dev_put(root);
 
-        /* AMD ZEN host bridges can do peer to peer */
-        if (vendor == PCI_VENDOR_ID_AMD && device == 0x1450)
+        for (entry = pci_p2pdma_whitelist; entry->vendor; entry++) {
+                if (vendor != entry->vendor || device != entry->device)
+                        continue;
+                if (entry->flags & REQ_SAME_HOST_BRIDGE && !same_host_bridge)
+                        return false;
+
                 return true;
+        }
 
         return false;
 }
 
 /*
- * Find the distance through the nearest common upstream bridge between
- * two PCI devices.
- *
- * If the two devices are the same device then 0 will be returned.
- *
- * If there are two virtual functions of the same device behind the same
- * bridge port then 2 will be returned (one step down to the PCIe switch,
- * then one step back to the same device).
- *
- * In the case where two devices are connected to the same PCIe switch, the
- * value 4 will be returned. This corresponds to the following PCI tree:
- *
- *     -+  Root Port
- *      \+ Switch Upstream Port
- *       +-+ Switch Downstream Port
- *       + \- Device A
- *       \-+ Switch Downstream Port
- *         \- Device B
- *
- * The distance is 4 because we traverse from Device A through the downstream
- * port of the switch, to the common upstream port, back up to the second
- * downstream port and then to Device B.
- *
- * Any two devices that don't have a common upstream bridge will return -1.
- * In this way devices on separate PCIe root ports will be rejected, which
- * is what we want for peer-to-peer seeing each PCIe root port defines a
- * separate hierarchy domain and there's no way to determine whether the root
- * complex supports forwarding between them.
- *
- * In the case where two devices are connected to different PCIe switches,
- * this function will still return a positive distance as long as both
- * switches eventually have a common upstream bridge. Note this covers
- * the case of using multiple PCIe switches to achieve a desired level of
- * fan-out from a root port. The exact distance will be a function of the
- * number of switches between Device A and Device B.
- *
- * If a bridge which has any ACS redirection bits set is in the path
- * then this functions will return -2. This is so we reject any
- * cases where the TLPs are forwarded up into the root complex.
- * In this case, a list of all infringing bridge addresses will be
- * populated in acs_list (assuming it's non-null) for printk purposes.
+ * If we can't find a common upstream bridge take a look at the root
+ * complex and compare it to a whitelist of known good hardware.
  */
-static int upstream_bridge_distance(struct pci_dev *provider,
-                                    struct pci_dev *client,
-                                    struct seq_buf *acs_list)
+static bool host_bridge_whitelist(struct pci_dev *a, struct pci_dev *b)
+{
+        struct pci_host_bridge *host_a = pci_find_host_bridge(a->bus);
+        struct pci_host_bridge *host_b = pci_find_host_bridge(b->bus);
+
+        if (host_a == host_b)
+                return __host_bridge_whitelist(host_a, true);
+
+        if (__host_bridge_whitelist(host_a, false) &&
+            __host_bridge_whitelist(host_b, false))
+                return true;
+
+        return false;
+}
+
+static enum pci_p2pdma_map_type
+__upstream_bridge_distance(struct pci_dev *provider, struct pci_dev *client,
+                int *dist, bool *acs_redirects, struct seq_buf *acs_list)
 {
         struct pci_dev *a = provider, *b = client, *bb;
         int dist_a = 0;
         int dist_b = 0;
         int acs_cnt = 0;
 
+        if (acs_redirects)
+                *acs_redirects = false;
+
         /*
          * Note, we don't need to take references to devices returned by
          * pci_upstream_bridge() seeing we hold a reference to a child
@@ -353,15 +377,10 @@ static int upstream_bridge_distance(struct pci_dev *provider,
                 dist_a++;
         }
 
-        /*
-         * Allow the connection if both devices are on a whitelisted root
-         * complex, but add an arbitrary large value to the distance.
-         */
-        if (root_complex_whitelist(provider) &&
-            root_complex_whitelist(client))
-                return 0x1000 + dist_a + dist_b;
+        if (dist)
+                *dist = dist_a + dist_b;
 
-        return -1;
+        return PCI_P2PDMA_MAP_THRU_HOST_BRIDGE;
 
 check_b_path_acs:
         bb = b;
@@ -378,33 +397,110 @@ check_b_path_acs:
                 bb = pci_upstream_bridge(bb);
         }
 
-        if (acs_cnt)
-                return -2;
+        if (dist)
+                *dist = dist_a + dist_b;
+
+        if (acs_cnt) {
+                if (acs_redirects)
+                        *acs_redirects = true;
+
+                return PCI_P2PDMA_MAP_THRU_HOST_BRIDGE;
+        }
+
+        return PCI_P2PDMA_MAP_BUS_ADDR;
+}
+
+static unsigned long map_types_idx(struct pci_dev *client)
+{
+        return (pci_domain_nr(client->bus) << 16) |
+                (client->bus->number << 8) | client->devfn;
+}
+
+/*
+ * Find the distance through the nearest common upstream bridge between
+ * two PCI devices.
+ *
+ * If the two devices are the same device then 0 will be returned.
+ *
+ * If there are two virtual functions of the same device behind the same
+ * bridge port then 2 will be returned (one step down to the PCIe switch,
+ * then one step back to the same device).
+ *
+ * In the case where two devices are connected to the same PCIe switch, the
+ * value 4 will be returned. This corresponds to the following PCI tree:
+ *
+ *     -+  Root Port
+ *      \+ Switch Upstream Port
+ *       +-+ Switch Downstream Port
+ *       + \- Device A
+ *       \-+ Switch Downstream Port
+ *         \- Device B
+ *
+ * The distance is 4 because we traverse from Device A through the downstream
+ * port of the switch, to the common upstream port, back up to the second
+ * downstream port and then to Device B.
+ *
+ * Any two devices that cannot communicate using p2pdma will return
+ * PCI_P2PDMA_MAP_NOT_SUPPORTED.
+ *
+ * Any two devices that have a data path that goes through the host bridge
+ * will consult a whitelist. If the host bridges are on the whitelist,
+ * this function will return PCI_P2PDMA_MAP_THRU_HOST_BRIDGE.
+ *
+ * If either bridge is not on the whitelist this function returns
+ * PCI_P2PDMA_MAP_NOT_SUPPORTED.
+ *
+ * If a bridge which has any ACS redirection bits set is in the path,
+ * acs_redirects will be set to true. In this case, a list of all infringing
+ * bridge addresses will be populated in acs_list (assuming it's non-null)
+ * for printk purposes.
+ */
+static enum pci_p2pdma_map_type
+upstream_bridge_distance(struct pci_dev *provider, struct pci_dev *client,
+                int *dist, bool *acs_redirects, struct seq_buf *acs_list)
+{
+        enum pci_p2pdma_map_type map_type;
+
+        map_type = __upstream_bridge_distance(provider, client, dist,
+                                              acs_redirects, acs_list);
+
+        if (map_type == PCI_P2PDMA_MAP_THRU_HOST_BRIDGE) {
+                if (!host_bridge_whitelist(provider, client))
+                        map_type = PCI_P2PDMA_MAP_NOT_SUPPORTED;
+        }
+
+        if (provider->p2pdma)
+                xa_store(&provider->p2pdma->map_types, map_types_idx(client),
+                         xa_mk_value(map_type), GFP_KERNEL);
 
-        return dist_a + dist_b;
+        return map_type;
 }
 
-static int upstream_bridge_distance_warn(struct pci_dev *provider,
-                                         struct pci_dev *client)
+static enum pci_p2pdma_map_type
+upstream_bridge_distance_warn(struct pci_dev *provider, struct pci_dev *client,
+                              int *dist)
 {
         struct seq_buf acs_list;
+        bool acs_redirects;
         int ret;
 
         seq_buf_init(&acs_list, kmalloc(PAGE_SIZE, GFP_KERNEL), PAGE_SIZE);
         if (!acs_list.buffer)
                 return -ENOMEM;
 
-        ret = upstream_bridge_distance(provider, client, &acs_list);
-        if (ret == -2) {
-                pci_warn(client, "cannot be used for peer-to-peer DMA as ACS redirect is set between the client and provider (%s)\n",
+        ret = upstream_bridge_distance(provider, client, dist, &acs_redirects,
+                                       &acs_list);
+        if (acs_redirects) {
+                pci_warn(client, "ACS redirect is set between the client and provider (%s)\n",
                          pci_name(provider));
                 /* Drop final semicolon */
                 acs_list.buffer[acs_list.len-1] = 0;
                 pci_warn(client, "to disable ACS redirect for this path, add the kernel parameter: pci=disable_acs_redir=%s\n",
                          acs_list.buffer);
+        }
 
-        } else if (ret < 0) {
-                pci_warn(client, "cannot be used for peer-to-peer DMA as the client and provider (%s) do not share an upstream bridge\n",
+        if (ret == PCI_P2PDMA_MAP_NOT_SUPPORTED) {
+                pci_warn(client, "cannot be used for peer-to-peer DMA as the client and provider (%s) do not share an upstream bridge or whitelisted host bridge\n",
                          pci_name(provider));
         }
 
@@ -421,22 +517,22 @@ static int upstream_bridge_distance_warn(struct pci_dev *provider,
  * @num_clients: number of clients in the array
  * @verbose: if true, print warnings for devices when we return -1
  *
- * Returns -1 if any of the clients are not compatible (behind the same
- * root port as the provider), otherwise returns a positive number where
- * a lower number is the preferable choice. (If there's one client
- * that's the same as the provider it will return 0, which is best choice).
+ * Returns -1 if any of the clients are not compatible, otherwise returns a
+ * positive number where a lower number is the preferable choice. (If there's
+ * one client that's the same as the provider it will return 0, which is best
+ * choice).
  *
- * For now, "compatible" means the provider and the clients are all behind
- * the same PCI root port. This cuts out cases that may work but is safest
- * for the user. Future work can expand this to white-list root complexes that
- * can safely forward between each ports.
+ * "compatible" means the provider and the clients are either all behind
+ * the same PCI root port or the host bridges connected to each of the devices
+ * are listed in the 'pci_p2pdma_whitelist'.
  */
 int pci_p2pdma_distance_many(struct pci_dev *provider, struct device **clients,
                              int num_clients, bool verbose)
 {
         bool not_supported = false;
         struct pci_dev *pci_client;
-        int distance = 0;
+        int total_dist = 0;
+        int distance;
         int i, ret;
 
         if (num_clients == 0)
@@ -461,26 +557,26 @@ int pci_p2pdma_distance_many(struct pci_dev *provider, struct device **clients,
 
                 if (verbose)
                         ret = upstream_bridge_distance_warn(provider,
-                                                            pci_client);
+                                        pci_client, &distance);
                 else
                         ret = upstream_bridge_distance(provider, pci_client,
-                                                       NULL);
+                                                       &distance, NULL, NULL);
 
                 pci_dev_put(pci_client);
 
-                if (ret < 0)
+                if (ret == PCI_P2PDMA_MAP_NOT_SUPPORTED)
                         not_supported = true;
 
                 if (not_supported && !verbose)
                         break;
 
-                distance += ret;
+                total_dist += distance;
         }
 
         if (not_supported)
                 return -1;
 
-        return distance;
+        return total_dist;
 }
 EXPORT_SYMBOL_GPL(pci_p2pdma_distance_many);
 
@@ -706,21 +802,19 @@ void pci_p2pmem_publish(struct pci_dev *pdev, bool publish)
 }
 EXPORT_SYMBOL_GPL(pci_p2pmem_publish);
 
-/**
- * pci_p2pdma_map_sg - map a PCI peer-to-peer scatterlist for DMA
- * @dev: device doing the DMA request
- * @sg: scatter list to map
- * @nents: elements in the scatterlist
- * @dir: DMA direction
- *
- * Scatterlists mapped with this function should not be unmapped in any way.
- *
- * Returns the number of SG entries mapped or 0 on error.
- */
-int pci_p2pdma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-                      enum dma_data_direction dir)
+static enum pci_p2pdma_map_type pci_p2pdma_map_type(struct pci_dev *provider,
+                                                    struct pci_dev *client)
+{
+        if (!provider->p2pdma)
+                return PCI_P2PDMA_MAP_NOT_SUPPORTED;
+
+        return xa_to_value(xa_load(&provider->p2pdma->map_types,
+                                   map_types_idx(client)));
+}
+
+static int __pci_p2pdma_map_sg(struct pci_p2pdma_pagemap *p2p_pgmap,
+                struct device *dev, struct scatterlist *sg, int nents)
 {
-        struct dev_pagemap *pgmap;
         struct scatterlist *s;
         phys_addr_t paddr;
         int i;
@@ -736,16 +830,80 @@ int pci_p2pdma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                 return 0;
 
         for_each_sg(sg, s, nents, i) {
-                pgmap = sg_page(s)->pgmap;
                 paddr = sg_phys(s);
 
-                s->dma_address = paddr - pgmap->pci_p2pdma_bus_offset;
+                s->dma_address = paddr - p2p_pgmap->bus_offset;
                 sg_dma_len(s) = s->length;
         }
 
         return nents;
 }
-EXPORT_SYMBOL_GPL(pci_p2pdma_map_sg);
+
+/**
+ * pci_p2pdma_map_sg - map a PCI peer-to-peer scatterlist for DMA
+ * @dev: device doing the DMA request
+ * @sg: scatter list to map
+ * @nents: elements in the scatterlist
+ * @dir: DMA direction
+ * @attrs: DMA attributes passed to dma_map_sg() (if called)
+ *
+ * Scatterlists mapped with this function should be unmapped using
+ * pci_p2pdma_unmap_sg_attrs().
+ *
+ * Returns the number of SG entries mapped or 0 on error.
+ */
+int pci_p2pdma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
+                int nents, enum dma_data_direction dir, unsigned long attrs)
+{
+        struct pci_p2pdma_pagemap *p2p_pgmap =
+                to_p2p_pgmap(sg_page(sg)->pgmap);
+        struct pci_dev *client;
+
+        if (WARN_ON_ONCE(!dev_is_pci(dev)))
+                return 0;
+
+        client = to_pci_dev(dev);
+
+        switch (pci_p2pdma_map_type(p2p_pgmap->provider, client)) {
+        case PCI_P2PDMA_MAP_THRU_HOST_BRIDGE:
+                return dma_map_sg_attrs(dev, sg, nents, dir, attrs);
+        case PCI_P2PDMA_MAP_BUS_ADDR:
+                return __pci_p2pdma_map_sg(p2p_pgmap, dev, sg, nents);
+        default:
+                WARN_ON_ONCE(1);
+                return 0;
+        }
+}
+EXPORT_SYMBOL_GPL(pci_p2pdma_map_sg_attrs);
+
+/**
+ * pci_p2pdma_unmap_sg - unmap a PCI peer-to-peer scatterlist that was
+ *      mapped with pci_p2pdma_map_sg()
+ * @dev: device doing the DMA request
+ * @sg: scatter list to map
+ * @nents: number of elements returned by pci_p2pdma_map_sg()
+ * @dir: DMA direction
+ * @attrs: DMA attributes passed to dma_unmap_sg() (if called)
+ */
+void pci_p2pdma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
+                int nents, enum dma_data_direction dir, unsigned long attrs)
+{
+        struct pci_p2pdma_pagemap *p2p_pgmap =
+                to_p2p_pgmap(sg_page(sg)->pgmap);
+        enum pci_p2pdma_map_type map_type;
+        struct pci_dev *client;
+
+        if (WARN_ON_ONCE(!dev_is_pci(dev)))
+                return;
+
+        client = to_pci_dev(dev);
+
+        map_type = pci_p2pdma_map_type(p2p_pgmap->provider, client);
+
+        if (map_type == PCI_P2PDMA_MAP_THRU_HOST_BRIDGE)
+                dma_unmap_sg_attrs(dev, sg, nents, dir, attrs);
+}
+EXPORT_SYMBOL_GPL(pci_p2pdma_unmap_sg_attrs);
 
 /**
  * pci_p2pdma_enable_store - parse a configfs/sysfs attribute store
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 45049f558860..0c02d500158f 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -14,7 +14,6 @@
 #include <linux/msi.h>
 #include <linux/pci_hotplug.h>
 #include <linux/module.h>
-#include <linux/pci-aspm.h>
 #include <linux/pci-acpi.h>
 #include <linux/pm_runtime.h>
 #include <linux/pm_qos.h>
@@ -118,8 +117,58 @@ phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
         return (phys_addr_t)mcfg_addr;
 }
 
+/* _HPX PCI Setting Record (Type 0); same as _HPP */
+struct hpx_type0 {
+        u32 revision;           /* Not present in _HPP */
+        u8  cache_line_size;    /* Not applicable to PCIe */
+        u8  latency_timer;      /* Not applicable to PCIe */
+        u8  enable_serr;
+        u8  enable_perr;
+};
+
+static struct hpx_type0 pci_default_type0 = {
+        .revision = 1,
+        .cache_line_size = 8,
+        .latency_timer = 0x40,
+        .enable_serr = 0,
+        .enable_perr = 0,
+};
+
+static void program_hpx_type0(struct pci_dev *dev, struct hpx_type0 *hpx)
+{
+        u16 pci_cmd, pci_bctl;
+
+        if (!hpx)
+                hpx = &pci_default_type0;
+
+        if (hpx->revision > 1) {
+                pci_warn(dev, "PCI settings rev %d not supported; using defaults\n",
+                         hpx->revision);
+                hpx = &pci_default_type0;
+        }
+
+        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpx->cache_line_size);
+        pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpx->latency_timer);
+        pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
+        if (hpx->enable_serr)
+                pci_cmd |= PCI_COMMAND_SERR;
+        if (hpx->enable_perr)
+                pci_cmd |= PCI_COMMAND_PARITY;
+        pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
+
+        /* Program bridge control value */
+        if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
+                pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
+                                      hpx->latency_timer);
+                pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
+                if (hpx->enable_perr)
+                        pci_bctl |= PCI_BRIDGE_CTL_PARITY;
+                pci_write_config_word(dev, PCI_BRIDGE_CONTROL, pci_bctl);
+        }
+}
+
 static acpi_status decode_type0_hpx_record(union acpi_object *record,
-                                           struct hpp_type0 *hpx0)
+                                           struct hpx_type0 *hpx0)
 {
         int i;
         union acpi_object *fields = record->package.elements;
@@ -146,8 +195,30 @@ static acpi_status decode_type0_hpx_record(union acpi_object *record,
         return AE_OK;
 }
 
+/* _HPX PCI-X Setting Record (Type 1) */
+struct hpx_type1 {
+        u32 revision;
+        u8  max_mem_read;
+        u8  avg_max_split;
+        u16 tot_max_split;
+};
+
+static void program_hpx_type1(struct pci_dev *dev, struct hpx_type1 *hpx)
+{
+        int pos;
+
+        if (!hpx)
+                return;
+
+        pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
+        if (!pos)
+                return;
+
+        pci_warn(dev, "PCI-X settings not supported\n");
+}
+
 static acpi_status decode_type1_hpx_record(union acpi_object *record,
-                                           struct hpp_type1 *hpx1)
+                                           struct hpx_type1 *hpx1)
 {
         int i;
         union acpi_object *fields = record->package.elements;
@@ -173,8 +244,130 @@ static acpi_status decode_type1_hpx_record(union acpi_object *record,
         return AE_OK;
 }
 
+static bool pcie_root_rcb_set(struct pci_dev *dev)
+{
+        struct pci_dev *rp = pcie_find_root_port(dev);
+        u16 lnkctl;
+
+        if (!rp)
+                return false;
+
+        pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl);
+        if (lnkctl & PCI_EXP_LNKCTL_RCB)
+                return true;
+
+        return false;
+}
+
+/* _HPX PCI Express Setting Record (Type 2) */
+struct hpx_type2 {
+        u32 revision;
+        u32 unc_err_mask_and;
+        u32 unc_err_mask_or;
+        u32 unc_err_sever_and;
+        u32 unc_err_sever_or;
+        u32 cor_err_mask_and;
+        u32 cor_err_mask_or;
+        u32 adv_err_cap_and;
+        u32 adv_err_cap_or;
+        u16 pci_exp_devctl_and;
+        u16 pci_exp_devctl_or;
+        u16 pci_exp_lnkctl_and;
+        u16 pci_exp_lnkctl_or;
+        u32 sec_unc_err_sever_and;
+        u32 sec_unc_err_sever_or;
+        u32 sec_unc_err_mask_and;
+        u32 sec_unc_err_mask_or;
+};
+
+static void program_hpx_type2(struct pci_dev *dev, struct hpx_type2 *hpx)
+{
+        int pos;
+        u32 reg32;
+
+        if (!hpx)
+                return;
+
+        if (!pci_is_pcie(dev))
+                return;
+
+        if (hpx->revision > 1) {
+                pci_warn(dev, "PCIe settings rev %d not supported\n",
+                         hpx->revision);
+                return;
+        }
+
+        /*
+         * Don't allow _HPX to change MPS or MRRS settings.  We manage
+         * those to make sure they're consistent with the rest of the
+         * platform.
+         */
+        hpx->pci_exp_devctl_and |= PCI_EXP_DEVCTL_PAYLOAD |
+                                    PCI_EXP_DEVCTL_READRQ;
+        hpx->pci_exp_devctl_or &= ~(PCI_EXP_DEVCTL_PAYLOAD |
+                                    PCI_EXP_DEVCTL_READRQ);
+
+        /* Initialize Device Control Register */
+        pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
+                        ~hpx->pci_exp_devctl_and, hpx->pci_exp_devctl_or);
+
+        /* Initialize Link Control Register */
+        if (pcie_cap_has_lnkctl(dev)) {
+
+                /*
+                 * If the Root Port supports Read Completion Boundary of
+                 * 128, set RCB to 128.  Otherwise, clear it.
+                 */
+                hpx->pci_exp_lnkctl_and |= PCI_EXP_LNKCTL_RCB;
+                hpx->pci_exp_lnkctl_or &= ~PCI_EXP_LNKCTL_RCB;
+                if (pcie_root_rcb_set(dev))
+                        hpx->pci_exp_lnkctl_or |= PCI_EXP_LNKCTL_RCB;
+
+                pcie_capability_clear_and_set_word(dev, PCI_EXP_LNKCTL,
+                        ~hpx->pci_exp_lnkctl_and, hpx->pci_exp_lnkctl_or);
+        }
+
+        /* Find Advanced Error Reporting Enhanced Capability */
+        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
+        if (!pos)
+                return;
+
+        /* Initialize Uncorrectable Error Mask Register */
+        pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &reg32);
+        reg32 = (reg32 & hpx->unc_err_mask_and) | hpx->unc_err_mask_or;
+        pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, reg32);
+
+        /* Initialize Uncorrectable Error Severity Register */
+        pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &reg32);
+        reg32 = (reg32 & hpx->unc_err_sever_and) | hpx->unc_err_sever_or;
+        pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, reg32);
+
+        /* Initialize Correctable Error Mask Register */
+        pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &reg32);
+        reg32 = (reg32 & hpx->cor_err_mask_and) | hpx->cor_err_mask_or;
+        pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg32);
+
+        /* Initialize Advanced Error Capabilities and Control Register */
+        pci_read_config_dword(dev, pos + PCI_ERR_CAP, &reg32);
+        reg32 = (reg32 & hpx->adv_err_cap_and) | hpx->adv_err_cap_or;
+
+        /* Don't enable ECRC generation or checking if unsupported */
+        if (!(reg32 & PCI_ERR_CAP_ECRC_GENC))
+                reg32 &= ~PCI_ERR_CAP_ECRC_GENE;
+        if (!(reg32 & PCI_ERR_CAP_ECRC_CHKC))
+                reg32 &= ~PCI_ERR_CAP_ECRC_CHKE;
+        pci_write_config_dword(dev, pos + PCI_ERR_CAP, reg32);
+
+        /*
+         * FIXME: The following two registers are not supported yet.
+         *
+         *   o Secondary Uncorrectable Error Severity Register
+         *   o Secondary Uncorrectable Error Mask Register
+         */
+}
+
 static acpi_status decode_type2_hpx_record(union acpi_object *record,
-                                           struct hpp_type2 *hpx2)
+                                           struct hpx_type2 *hpx2)
 {
         int i;
         union acpi_object *fields = record->package.elements;
@@ -213,6 +406,164 @@ static acpi_status decode_type2_hpx_record(union acpi_object *record,
         return AE_OK;
 }
 
+/* _HPX PCI Express Setting Record (Type 3) */
+struct hpx_type3 {
+        u16 device_type;
+        u16 function_type;
+        u16 config_space_location;
+        u16 pci_exp_cap_id;
+        u16 pci_exp_cap_ver;
+        u16 pci_exp_vendor_id;
+        u16 dvsec_id;
+        u16 dvsec_rev;
+        u16 match_offset;
+        u32 match_mask_and;
+        u32 match_value;
+        u16 reg_offset;
+        u32 reg_mask_and;
+        u32 reg_mask_or;
+};
+
+enum hpx_type3_dev_type {
+        HPX_TYPE_ENDPOINT       = BIT(0),
+        HPX_TYPE_LEG_END        = BIT(1),
+        HPX_TYPE_RC_END         = BIT(2),
+        HPX_TYPE_RC_EC          = BIT(3),
+        HPX_TYPE_ROOT_PORT      = BIT(4),
+        HPX_TYPE_UPSTREAM       = BIT(5),
+        HPX_TYPE_DOWNSTREAM     = BIT(6),
+        HPX_TYPE_PCI_BRIDGE     = BIT(7),
+        HPX_TYPE_PCIE_BRIDGE    = BIT(8),
+};
+
+static u16 hpx3_device_type(struct pci_dev *dev)
+{
+        u16 pcie_type = pci_pcie_type(dev);
+        const int pcie_to_hpx3_type[] = {
+                [PCI_EXP_TYPE_ENDPOINT]    = HPX_TYPE_ENDPOINT,
+                [PCI_EXP_TYPE_LEG_END]     = HPX_TYPE_LEG_END,
+                [PCI_EXP_TYPE_RC_END]      = HPX_TYPE_RC_END,
+                [PCI_EXP_TYPE_RC_EC]       = HPX_TYPE_RC_EC,
+                [PCI_EXP_TYPE_ROOT_PORT]   = HPX_TYPE_ROOT_PORT,
+                [PCI_EXP_TYPE_UPSTREAM]    = HPX_TYPE_UPSTREAM,
+                [PCI_EXP_TYPE_DOWNSTREAM]  = HPX_TYPE_DOWNSTREAM,
+                [PCI_EXP_TYPE_PCI_BRIDGE]  = HPX_TYPE_PCI_BRIDGE,
+                [PCI_EXP_TYPE_PCIE_BRIDGE] = HPX_TYPE_PCIE_BRIDGE,
+        };
+
+        if (pcie_type >= ARRAY_SIZE(pcie_to_hpx3_type))
+                return 0;
+
+        return pcie_to_hpx3_type[pcie_type];
+}
+
+enum hpx_type3_fn_type {
+        HPX_FN_NORMAL           = BIT(0),
+        HPX_FN_SRIOV_PHYS       = BIT(1),
+        HPX_FN_SRIOV_VIRT       = BIT(2),
+};
+
+static u8 hpx3_function_type(struct pci_dev *dev)
+{
+        if (dev->is_virtfn)
+                return HPX_FN_SRIOV_VIRT;
+        else if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV) > 0)
+                return HPX_FN_SRIOV_PHYS;
+        else
+                return HPX_FN_NORMAL;
+}
+
+static bool hpx3_cap_ver_matches(u8 pcie_cap_id, u8 hpx3_cap_id)
+{
+        u8 cap_ver = hpx3_cap_id & 0xf;
+
+        if ((hpx3_cap_id & BIT(4)) && cap_ver >= pcie_cap_id)
+                return true;
+        else if (cap_ver == pcie_cap_id)
+                return true;
+
+        return false;
+}
+
+enum hpx_type3_cfg_loc {
+        HPX_CFG_PCICFG          = 0,
+        HPX_CFG_PCIE_CAP        = 1,
+        HPX_CFG_PCIE_CAP_EXT    = 2,
+        HPX_CFG_VEND_CAP        = 3,
+        HPX_CFG_DVSEC           = 4,
+        HPX_CFG_MAX,
+};
+
+static void program_hpx_type3_register(struct pci_dev *dev,
+                                       const struct hpx_type3 *reg)
+{
+        u32 match_reg, write_reg, header, orig_value;
+        u16 pos;
+
+        if (!(hpx3_device_type(dev) & reg->device_type))
+                return;
+
+        if (!(hpx3_function_type(dev) & reg->function_type))
+                return;
+
+        switch (reg->config_space_location) {
+        case HPX_CFG_PCICFG:
+                pos = 0;
+                break;
+        case HPX_CFG_PCIE_CAP:
+                pos = pci_find_capability(dev, reg->pci_exp_cap_id);
+                if (pos == 0)
+                        return;
+
+                break;
+        case HPX_CFG_PCIE_CAP_EXT:
+                pos = pci_find_ext_capability(dev, reg->pci_exp_cap_id);
+                if (pos == 0)
+                        return;
+
+                pci_read_config_dword(dev, pos, &header);
+                if (!hpx3_cap_ver_matches(PCI_EXT_CAP_VER(header),
+                                          reg->pci_exp_cap_ver))
+                        return;
+
+                break;
+        case HPX_CFG_VEND_CAP:  /* Fall through */
+        case HPX_CFG_DVSEC:     /* Fall through */
+        default:
+                pci_warn(dev, "Encountered _HPX type 3 with unsupported config space location");
+                return;
+        }
+
+        pci_read_config_dword(dev, pos + reg->match_offset, &match_reg);
+
+        if ((match_reg & reg->match_mask_and) != reg->match_value)
+                return;
+
+        pci_read_config_dword(dev, pos + reg->reg_offset, &write_reg);
+        orig_value = write_reg;
+        write_reg &= reg->reg_mask_and;
+        write_reg |= reg->reg_mask_or;
+
+        if (orig_value == write_reg)
+                return;
+
+        pci_write_config_dword(dev, pos + reg->reg_offset, write_reg);
+
+        pci_dbg(dev, "Applied _HPX3 at [0x%x]: 0x%08x -> 0x%08x",
+                pos, orig_value, write_reg);
+}
+
+static void program_hpx_type3(struct pci_dev *dev, struct hpx_type3 *hpx)
+{
+        if (!hpx)
+                return;
+
+        if (!pci_is_pcie(dev))
+                return;
+
+        program_hpx_type3_register(dev, hpx);
+}
+
 static void parse_hpx3_register(struct hpx_type3 *hpx3_reg,
                                 union acpi_object *reg_fields)
 {
@@ -233,8 +584,7 @@ static void parse_hpx3_register(struct hpx_type3 *hpx3_reg,
 }
 
 static acpi_status program_type3_hpx_record(struct pci_dev *dev,
-                                           union acpi_object *record,
-                                           const struct hotplug_program_ops *hp_ops)
+                                           union acpi_object *record)
 {
         union acpi_object *fields = record->package.elements;
         u32 desc_count, expected_length, revision;
@@ -258,7 +608,7 @@ static acpi_status program_type3_hpx_record(struct pci_dev *dev,
                 for (i = 0; i < desc_count; i++) {
                         reg_fields = fields + 3 + i * 14;
                         parse_hpx3_register(&hpx3, reg_fields);
-                        hp_ops->program_type3(dev, &hpx3);
+                        program_hpx_type3(dev, &hpx3);
                 }
 
                 break;
@@ -271,15 +621,14 @@ static acpi_status program_type3_hpx_record(struct pci_dev *dev,
         return AE_OK;
 }
 
-static acpi_status acpi_run_hpx(struct pci_dev *dev, acpi_handle handle,
-                                const struct hotplug_program_ops *hp_ops)
+static acpi_status acpi_run_hpx(struct pci_dev *dev, acpi_handle handle)
 {
         acpi_status status;
         struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
         union acpi_object *package, *record, *fields;
-        struct hpp_type0 hpx0;
-        struct hpp_type1 hpx1;
-        struct hpp_type2 hpx2;
+        struct hpx_type0 hpx0;
+        struct hpx_type1 hpx1;
+        struct hpx_type2 hpx2;
         u32 type;
         int i;
 
@@ -314,24 +663,24 @@ static acpi_status acpi_run_hpx(struct pci_dev *dev, acpi_handle handle,
                         status = decode_type0_hpx_record(record, &hpx0);
                         if (ACPI_FAILURE(status))
                                 goto exit;
-                        hp_ops->program_type0(dev, &hpx0);
+                        program_hpx_type0(dev, &hpx0);
                         break;
                 case 1:
                         memset(&hpx1, 0, sizeof(hpx1));
                         status = decode_type1_hpx_record(record, &hpx1);
                         if (ACPI_FAILURE(status))
                                 goto exit;
-                        hp_ops->program_type1(dev, &hpx1);
+                        program_hpx_type1(dev, &hpx1);
                         break;
                 case 2:
                         memset(&hpx2, 0, sizeof(hpx2));
                         status = decode_type2_hpx_record(record, &hpx2);
                         if (ACPI_FAILURE(status))
                                 goto exit;
-                        hp_ops->program_type2(dev, &hpx2);
+                        program_hpx_type2(dev, &hpx2);
                         break;
                 case 3:
-                        status = program_type3_hpx_record(dev, record, hp_ops);
+                        status = program_type3_hpx_record(dev, record);
                         if (ACPI_FAILURE(status))
                                 goto exit;
                         break;
@@ -347,16 +696,15 @@ static acpi_status acpi_run_hpx(struct pci_dev *dev, acpi_handle handle,
         return status;
 }
 
-static acpi_status acpi_run_hpp(struct pci_dev *dev, acpi_handle handle,
-                                const struct hotplug_program_ops *hp_ops)
+static acpi_status acpi_run_hpp(struct pci_dev *dev, acpi_handle handle)
 {
         acpi_status status;
         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
         union acpi_object *package, *fields;
-        struct hpp_type0 hpp0;
+        struct hpx_type0 hpx0;
         int i;
 
-        memset(&hpp0, 0, sizeof(hpp0));
+        memset(&hpx0, 0, sizeof(hpx0));
 
         status = acpi_evaluate_object(handle, "_HPP", NULL, &buffer);
         if (ACPI_FAILURE(status))
@@ -377,26 +725,24 @@ static acpi_status acpi_run_hpp(struct pci_dev *dev, acpi_handle handle,
                 }
         }
 
-        hpp0.revision        = 1;
-        hpp0.cache_line_size = fields[0].integer.value;
-        hpp0.latency_timer   = fields[1].integer.value;
-        hpp0.enable_serr     = fields[2].integer.value;
-        hpp0.enable_perr     = fields[3].integer.value;
+        hpx0.revision        = 1;
+        hpx0.cache_line_size = fields[0].integer.value;
+        hpx0.latency_timer   = fields[1].integer.value;
+        hpx0.enable_serr     = fields[2].integer.value;
+        hpx0.enable_perr     = fields[3].integer.value;
 
-        hp_ops->program_type0(dev, &hpp0);
+        program_hpx_type0(dev, &hpx0);
 
 exit:
         kfree(buffer.pointer);
         return status;
 }
 
-/* pci_get_hp_params
+/* pci_acpi_program_hp_params
  *
  * @dev - the pci_dev for which we want parameters
- * @hpp - allocated by the caller
  */
-int pci_acpi_program_hp_params(struct pci_dev *dev,
-                               const struct hotplug_program_ops *hp_ops)
+int pci_acpi_program_hp_params(struct pci_dev *dev)
 {
         acpi_status status;
         acpi_handle handle, phandle;
@@ -419,10 +765,10 @@ int pci_acpi_program_hp_params(struct pci_dev *dev,
          * this pci dev.
          */
         while (handle) {
-                status = acpi_run_hpx(dev, handle, hp_ops);
+                status = acpi_run_hpx(dev, handle);
                 if (ACPI_SUCCESS(status))
                         return 0;
-                status = acpi_run_hpp(dev, handle, hp_ops);
+                status = acpi_run_hpp(dev, handle);
                 if (ACPI_SUCCESS(status))
                         return 0;
                 if (acpi_is_root_bridge(handle))
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 06083b86d4f4..5fd90105510d 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -38,7 +38,7 @@ struct pci_bridge_reg_behavior {
         u32 rsvd;
 };
 
-const static struct pci_bridge_reg_behavior pci_regs_behavior[] = {
+static const struct pci_bridge_reg_behavior pci_regs_behavior[] = {
         [PCI_VENDOR_ID / 4] = { .ro = ~0 },
         [PCI_COMMAND / 4] = {
                 .rw = (PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
@@ -173,7 +173,7 @@ const static struct pci_bridge_reg_behavior pci_regs_behavior[] = {
         },
 };
 
-const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
+static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
         [PCI_CAP_LIST_ID / 4] = {
                 /*
                  * Capability ID, Next Capability Pointer and
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 965c72104150..868e35109284 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -464,9 +464,7 @@ static ssize_t dev_rescan_store(struct device *dev,
         }
         return count;
 }
-static struct device_attribute dev_rescan_attr = __ATTR(rescan,
-                                                        (S_IWUSR|S_IWGRP),
-                                                        NULL, dev_rescan_store);
+static DEVICE_ATTR_WO(dev_rescan);
 
 static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
                             const char *buf, size_t count)
@@ -480,13 +478,12 @@ static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
                 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
         return count;
 }
-static struct device_attribute dev_remove_attr = __ATTR_IGNORE_LOCKDEP(remove,
-                                                        (S_IWUSR|S_IWGRP),
-                                                        NULL, remove_store);
+static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
+                                  remove_store);
 
-static ssize_t dev_bus_rescan_store(struct device *dev,
-                                    struct device_attribute *attr,
-                                    const char *buf, size_t count)
+static ssize_t bus_rescan_store(struct device *dev,
+                                struct device_attribute *attr,
+                                const char *buf, size_t count)
 {
         unsigned long val;
         struct pci_bus *bus = to_pci_bus(dev);
@@ -504,7 +501,7 @@ static ssize_t dev_bus_rescan_store(struct device *dev,
         }
         return count;
 }
-static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
+static DEVICE_ATTR_WO(bus_rescan);
 
 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
 static ssize_t d3cold_allowed_store(struct device *dev,
@@ -551,154 +548,6 @@ static ssize_t devspec_show(struct device *dev,
 static DEVICE_ATTR_RO(devspec);
 #endif
 
-#ifdef CONFIG_PCI_IOV
-static ssize_t sriov_totalvfs_show(struct device *dev,
-                                   struct device_attribute *attr,
-                                   char *buf)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-
-        return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
-}
-
-
-static ssize_t sriov_numvfs_show(struct device *dev,
-                                 struct device_attribute *attr,
-                                 char *buf)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-
-        return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
-}
-
-/*
- * num_vfs > 0; number of VFs to enable
- * num_vfs = 0; disable all VFs
- *
- * Note: SRIOV spec doesn't allow partial VF
- *       disable, so it's all or none.
- */
-static ssize_t sriov_numvfs_store(struct device *dev,
-                                  struct device_attribute *attr,
-                                  const char *buf, size_t count)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-        int ret;
-        u16 num_vfs;
-
-        ret = kstrtou16(buf, 0, &num_vfs);
-        if (ret < 0)
-                return ret;
-
-        if (num_vfs > pci_sriov_get_totalvfs(pdev))
-                return -ERANGE;
-
-        device_lock(&pdev->dev);
-
-        if (num_vfs == pdev->sriov->num_VFs)
-                goto exit;
-
-        /* is PF driver loaded w/callback */
-        if (!pdev->driver || !pdev->driver->sriov_configure) {
-                pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n");
-                ret = -ENOENT;
-                goto exit;
-        }
-
-        if (num_vfs == 0) {
-                /* disable VFs */
-                ret = pdev->driver->sriov_configure(pdev, 0);
-                goto exit;
-        }
-
-        /* enable VFs */
-        if (pdev->sriov->num_VFs) {
-                pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
-                         pdev->sriov->num_VFs, num_vfs);
-                ret = -EBUSY;
-                goto exit;
-        }
-
-        ret = pdev->driver->sriov_configure(pdev, num_vfs);
-        if (ret < 0)
-                goto exit;
-
-        if (ret != num_vfs)
-                pci_warn(pdev, "%d VFs requested; only %d enabled\n",
-                         num_vfs, ret);
-
-exit:
-        device_unlock(&pdev->dev);
-
-        if (ret < 0)
-                return ret;
-
-        return count;
-}
-
-static ssize_t sriov_offset_show(struct device *dev,
-                                 struct device_attribute *attr,
-                                 char *buf)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-
-        return sprintf(buf, "%u\n", pdev->sriov->offset);
-}
-
-static ssize_t sriov_stride_show(struct device *dev,
-                                 struct device_attribute *attr,
-                                 char *buf)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-
-        return sprintf(buf, "%u\n", pdev->sriov->stride);
-}
-
-static ssize_t sriov_vf_device_show(struct device *dev,
-                                    struct device_attribute *attr,
-                                    char *buf)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-
-        return sprintf(buf, "%x\n", pdev->sriov->vf_device);
-}
-
-static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
-                                            struct device_attribute *attr,
-                                            char *buf)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-
-        return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
-}
-
-static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
-                                             struct device_attribute *attr,
-                                             const char *buf, size_t count)
-{
-        struct pci_dev *pdev = to_pci_dev(dev);
-        bool drivers_autoprobe;
-
-        if (kstrtobool(buf, &drivers_autoprobe) < 0)
-                return -EINVAL;
-
-        pdev->sriov->drivers_autoprobe = drivers_autoprobe;
-
-        return count;
-}
-
-static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
-static struct device_attribute sriov_numvfs_attr =
-                __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
-                       sriov_numvfs_show, sriov_numvfs_store);
-static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
-static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
-static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
-static struct device_attribute sriov_drivers_autoprobe_attr =
-                __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
-                       sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
-#endif /* CONFIG_PCI_IOV */
-
 static ssize_t driver_override_store(struct device *dev,
                                      struct device_attribute *attr,
                                      const char *buf, size_t count)
@@ -792,7 +641,7 @@ static struct attribute *pcie_dev_attrs[] = {
 };
 
 static struct attribute *pcibus_attrs[] = {
-        &dev_attr_rescan.attr,
+        &dev_attr_bus_rescan.attr,
         &dev_attr_cpuaffinity.attr,
         &dev_attr_cpulistaffinity.attr,
         NULL,
@@ -820,7 +669,7 @@ static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
                 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
                    IORESOURCE_ROM_SHADOW));
 }
-static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
+static DEVICE_ATTR_RO(boot_vga);
 
 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
                                struct bin_attribute *bin_attr, char *buf,
@@ -1085,7 +934,7 @@ void pci_create_legacy_files(struct pci_bus *b)
         sysfs_bin_attr_init(b->legacy_io);
         b->legacy_io->attr.name = "legacy_io";
         b->legacy_io->size = 0xffff;
-        b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
+        b->legacy_io->attr.mode = 0600;
         b->legacy_io->read = pci_read_legacy_io;
         b->legacy_io->write = pci_write_legacy_io;
         b->legacy_io->mmap = pci_mmap_legacy_io;
@@ -1099,7 +948,7 @@ void pci_create_legacy_files(struct pci_bus *b)
         sysfs_bin_attr_init(b->legacy_mem);
         b->legacy_mem->attr.name = "legacy_mem";
         b->legacy_mem->size = 1024*1024;
-        b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
+        b->legacy_mem->attr.mode = 0600;
         b->legacy_mem->mmap = pci_mmap_legacy_mem;
         pci_adjust_legacy_attr(b, pci_mmap_mem);
         error = device_create_bin_file(&b->dev, b->legacy_mem);
@@ -1306,7 +1155,7 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
                 }
         }
         res_attr->attr.name = res_attr_name;
-        res_attr->attr.mode = S_IRUSR | S_IWUSR;
+        res_attr->attr.mode = 0600;
         res_attr->size = pci_resource_len(pdev, num);
         res_attr->private = (void *)(unsigned long)num;
         retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
@@ -1419,7 +1268,7 @@ static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
 static const struct bin_attribute pci_config_attr = {
         .attr = {
                 .name = "config",
-                .mode = S_IRUGO | S_IWUSR,
+                .mode = 0644,
         },
         .size = PCI_CFG_SPACE_SIZE,
         .read = pci_read_config,
@@ -1429,7 +1278,7 @@ static const struct bin_attribute pci_config_attr = {
 static const struct bin_attribute pcie_config_attr = {
         .attr = {
                 .name = "config",
-                .mode = S_IRUGO | S_IWUSR,
+                .mode = 0644,
         },
         .size = PCI_CFG_SPACE_EXP_SIZE,
         .read = pci_read_config,
@@ -1458,7 +1307,7 @@ static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
         return count;
 }
 
-static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
+static DEVICE_ATTR(reset, 0200, NULL, reset_store);
 
 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
 {
@@ -1468,7 +1317,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev)
         pcie_aspm_create_sysfs_dev_files(dev);
 
         if (dev->reset_fn) {
-                retval = device_create_file(&dev->dev, &reset_attr);
+                retval = device_create_file(&dev->dev, &dev_attr_reset);
                 if (retval)
                         goto error;
         }
@@ -1511,7 +1360,7 @@ int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
                 sysfs_bin_attr_init(attr);
                 attr->size = rom_size;
                 attr->attr.name = "rom";
-                attr->attr.mode = S_IRUSR | S_IWUSR;
+                attr->attr.mode = 0600;
                 attr->read = pci_read_rom;
                 attr->write = pci_write_rom;
                 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
@@ -1553,7 +1402,7 @@ static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
         pcie_vpd_remove_sysfs_dev_files(dev);
         pcie_aspm_remove_sysfs_dev_files(dev);
         if (dev->reset_fn) {
-                device_remove_file(&dev->dev, &reset_attr);
+                device_remove_file(&dev->dev, &dev_attr_reset);
                 dev->reset_fn = 0;
         }
 }
@@ -1606,7 +1455,7 @@ static int __init pci_sysfs_init(void)
 late_initcall(pci_sysfs_init);
 
 static struct attribute *pci_dev_dev_attrs[] = {
-        &vga_attr.attr,
+        &dev_attr_boot_vga.attr,
         NULL,
 };
 
@@ -1616,7 +1465,7 @@ static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
         struct device *dev = kobj_to_dev(kobj);
         struct pci_dev *pdev = to_pci_dev(dev);
 
-        if (a == &vga_attr.attr)
+        if (a == &dev_attr_boot_vga.attr)
                 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
                         return 0;
 
@@ -1624,8 +1473,8 @@ static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
 }
 
 static struct attribute *pci_dev_hp_attrs[] = {
-        &dev_remove_attr.attr,
-        &dev_rescan_attr.attr,
+        &dev_attr_remove.attr,
+        &dev_attr_dev_rescan.attr,
         NULL,
 };
 
@@ -1697,34 +1546,6 @@ static const struct attribute_group pci_dev_hp_attr_group = {
         .is_visible = pci_dev_hp_attrs_are_visible,
 };
 
-#ifdef CONFIG_PCI_IOV
-static struct attribute *sriov_dev_attrs[] = {
-        &sriov_totalvfs_attr.attr,
-        &sriov_numvfs_attr.attr,
-        &sriov_offset_attr.attr,
-        &sriov_stride_attr.attr,
-        &sriov_vf_device_attr.attr,
-        &sriov_drivers_autoprobe_attr.attr,
-        NULL,
-};
-
-static umode_t sriov_attrs_are_visible(struct kobject *kobj,
-                                       struct attribute *a, int n)
-{
-        struct device *dev = kobj_to_dev(kobj);
-
-        if (!dev_is_pf(dev))
-                return 0;
-
-        return a->mode;
-}
-
-static const struct attribute_group sriov_dev_attr_group = {
-        .attrs = sriov_dev_attrs,
-        .is_visible = sriov_attrs_are_visible,
-};
-#endif /* CONFIG_PCI_IOV */
-
 static const struct attribute_group pci_dev_attr_group = {
         .attrs = pci_dev_dev_attrs,
         .is_visible = pci_dev_attrs_are_visible,
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1b27b5af3d55..e7982af9a5d8 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -890,8 +890,8 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
 
         pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
         dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
-        if (dev->current_state != state && printk_ratelimit())
-                pci_info(dev, "Refused to change power state, currently in D%d\n",
+        if (dev->current_state != state)
+                pci_info_ratelimited(dev, "Refused to change power state, currently in D%d\n",
                          dev->current_state);
 
         /*
@@ -1443,7 +1443,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev)
                 pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
                 bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX;
                 res = pdev->resource + bar_idx;
-                size = order_base_2((resource_size(res) >> 20) | 1) - 1;
+                size = ilog2(resource_size(res)) - 20;
                 ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
                 ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT;
                 pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
@@ -3581,7 +3581,7 @@ int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask)
                 }
 
                 /* Ensure upstream ports don't block AtomicOps on egress */
-                if (!bridge->has_secondary_link) {
+                if (pci_pcie_type(bridge) == PCI_EXP_TYPE_UPSTREAM) {
                         pcie_capability_read_dword(bridge, PCI_EXP_DEVCTL2,
                                                    &ctl2);
                         if (ctl2 & PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK)
@@ -5923,8 +5923,19 @@ resource_size_t __weak pcibios_default_alignment(void)
         return 0;
 }
 
-#define RESOURCE_ALIGNMENT_PARAM_SIZE COMMAND_LINE_SIZE
-static char resource_alignment_param[RESOURCE_ALIGNMENT_PARAM_SIZE] = {0};
+/*
+ * Arches that don't want to expose struct resource to userland as-is in
+ * sysfs and /proc can implement their own pci_resource_to_user().
+ */
+void __weak pci_resource_to_user(const struct pci_dev *dev, int bar,
+                                 const struct resource *rsrc,
+                                 resource_size_t *start, resource_size_t *end)
+{
+        *start = rsrc->start;
+        *end = rsrc->end;
+}
+
+static char *resource_alignment_param;
 static DEFINE_SPINLOCK(resource_alignment_lock);
 
 /**
@@ -5945,7 +5956,7 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev,
 
         spin_lock(&resource_alignment_lock);
         p = resource_alignment_param;
-        if (!*p && !align)
+        if (!p || !*p)
                 goto out;
         if (pci_has_flag(PCI_PROBE_ONLY)) {
                 align = 0;
@@ -6109,35 +6120,41 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev)
         }
 }
 
-static ssize_t pci_set_resource_alignment_param(const char *buf, size_t count)
+static ssize_t resource_alignment_show(struct bus_type *bus, char *buf)
 {
-        if (count > RESOURCE_ALIGNMENT_PARAM_SIZE - 1)
-                count = RESOURCE_ALIGNMENT_PARAM_SIZE - 1;
-        spin_lock(&resource_alignment_lock);
-        strncpy(resource_alignment_param, buf, count);
-        resource_alignment_param[count] = '\0';
-        spin_unlock(&resource_alignment_lock);
-        return count;
-}
+        size_t count = 0;
 
-static ssize_t pci_get_resource_alignment_param(char *buf, size_t size)
-{
-        size_t count;
         spin_lock(&resource_alignment_lock);
-        count = snprintf(buf, size, "%s", resource_alignment_param);
+        if (resource_alignment_param)
+                count = snprintf(buf, PAGE_SIZE, "%s", resource_alignment_param);
         spin_unlock(&resource_alignment_lock);
-        return count;
-}
 
-static ssize_t resource_alignment_show(struct bus_type *bus, char *buf)
-{
-        return pci_get_resource_alignment_param(buf, PAGE_SIZE);
+        /*
+         * When set by the command line, resource_alignment_param will not
+         * have a trailing line feed, which is ugly. So conditionally add
+         * it here.
+         */
+        if (count >= 2 && buf[count - 2] != '\n' && count < PAGE_SIZE - 1) {
+                buf[count - 1] = '\n';
+                buf[count++] = 0;
+        }
+
+        return count;
 }
 
 static ssize_t resource_alignment_store(struct bus_type *bus,
                                         const char *buf, size_t count)
 {
-        return pci_set_resource_alignment_param(buf, count);
+        char *param = kstrndup(buf, count, GFP_KERNEL);
+
+        if (!param)
+                return -ENOMEM;
+
+        spin_lock(&resource_alignment_lock);
+        kfree(resource_alignment_param);
+        resource_alignment_param = param;
+        spin_unlock(&resource_alignment_lock);
+        return count;
 }
 
 static BUS_ATTR_RW(resource_alignment);
@@ -6266,8 +6283,7 @@ static int __init pci_setup(char *str)
                         } else if (!strncmp(str, "cbmemsize=", 10)) {
                                 pci_cardbus_mem_size = memparse(str + 10, &str);
                         } else if (!strncmp(str, "resource_alignment=", 19)) {
-                                pci_set_resource_alignment_param(str + 19,
-                                                        strlen(str + 19));
+                                resource_alignment_param = str + 19;
                         } else if (!strncmp(str, "ecrc=", 5)) {
                                 pcie_ecrc_get_policy(str + 5);
                         } else if (!strncmp(str, "hpiosize=", 9)) {
@@ -6302,15 +6318,18 @@ static int __init pci_setup(char *str)
 early_param("pci", pci_setup);
 
 /*
- * 'disable_acs_redir_param' is initialized in pci_setup(), above, to point
- * to data in the __initdata section which will be freed after the init
- * sequence is complete. We can't allocate memory in pci_setup() because some
- * architectures do not have any memory allocation service available during
- * an early_param() call. So we allocate memory and copy the variable here
- * before the init section is freed.
+ * 'resource_alignment_param' and 'disable_acs_redir_param' are initialized
+ * in pci_setup(), above, to point to data in the __initdata section which
+ * will be freed after the init sequence is complete. We can't allocate memory
+ * in pci_setup() because some architectures do not have any memory allocation
+ * service available during an early_param() call. So we allocate memory and
+ * copy the variable here before the init section is freed.
+ *
  */
 static int __init pci_realloc_setup_params(void)
 {
+        resource_alignment_param = kstrdup(resource_alignment_param,
+                                           GFP_KERNEL);
         disable_acs_redir_param = kstrdup(disable_acs_redir_param, GFP_KERNEL);
 
         return 0;
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index d22d1b807701..3f6947ee3324 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -39,6 +39,11 @@ int pci_probe_reset_function(struct pci_dev *dev);
 int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
 int pci_bus_error_reset(struct pci_dev *dev);
 
+#define PCI_PM_D2_DELAY         200
+#define PCI_PM_D3_WAIT          10
+#define PCI_PM_D3COLD_WAIT      100
+#define PCI_PM_BUS_WAIT         50
+
 /**
  * struct pci_platform_pm_ops - Firmware PM callbacks
  *
@@ -84,6 +89,8 @@ void pci_power_up(struct pci_dev *dev);
 void pci_disable_enabled_device(struct pci_dev *dev);
 int pci_finish_runtime_suspend(struct pci_dev *dev);
 void pcie_clear_root_pme_status(struct pci_dev *dev);
+bool pci_check_pme_status(struct pci_dev *dev);
+void pci_pme_wakeup_bus(struct pci_bus *bus);
 int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
 void pci_pme_restore(struct pci_dev *dev);
 bool pci_dev_need_resume(struct pci_dev *dev);
@@ -118,11 +125,25 @@ static inline bool pci_power_manageable(struct pci_dev *pci_dev)
         return !pci_has_subordinate(pci_dev) || pci_dev->bridge_d3;
 }
 
+static inline bool pcie_downstream_port(const struct pci_dev *dev)
+{
+        int type = pci_pcie_type(dev);
+
+        return type == PCI_EXP_TYPE_ROOT_PORT ||
+               type == PCI_EXP_TYPE_DOWNSTREAM ||
+               type == PCI_EXP_TYPE_PCIE_BRIDGE;
+}
+
 int pci_vpd_init(struct pci_dev *dev);
 void pci_vpd_release(struct pci_dev *dev);
 void pcie_vpd_create_sysfs_dev_files(struct pci_dev *dev);
 void pcie_vpd_remove_sysfs_dev_files(struct pci_dev *dev);
 
+/* PCI Virtual Channel */
+int pci_save_vc_state(struct pci_dev *dev);
+void pci_restore_vc_state(struct pci_dev *dev);
+void pci_allocate_vc_save_buffers(struct pci_dev *dev);
+
 /* PCI /proc functions */
 #ifdef CONFIG_PROC_FS
 int pci_proc_attach_device(struct pci_dev *dev);
@@ -196,6 +217,9 @@ extern const struct attribute_group *pcibus_groups[];
 extern const struct device_type pci_dev_type;
 extern const struct attribute_group *pci_bus_groups[];
 
+extern unsigned long pci_hotplug_io_size;
+extern unsigned long pci_hotplug_mem_size;
+extern unsigned long pci_hotplug_bus_size;
 
 /**
  * pci_match_one_device - Tell if a PCI device structure has a matching
@@ -236,6 +260,9 @@ enum pci_bar_type {
         pci_bar_mem64,          /* A 64-bit memory BAR */
 };
 
+struct device *pci_get_host_bridge_device(struct pci_dev *dev);
+void pci_put_host_bridge_device(struct device *dev);
+
 int pci_configure_extended_tags(struct pci_dev *dev, void *ign);
 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
                                 int crs_timeout);
@@ -256,6 +283,8 @@ bool pci_bus_clip_resource(struct pci_dev *dev, int idx);
 
 void pci_reassigndev_resource_alignment(struct pci_dev *dev);
 void pci_disable_bridge_window(struct pci_dev *dev);
+struct pci_bus *pci_bus_get(struct pci_bus *bus);
+void pci_bus_put(struct pci_bus *bus);
 
 /* PCIe link information */
 #define PCIE_SPEED2STR(speed) \
@@ -279,6 +308,7 @@ u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed,
                            enum pcie_link_width *width);
 void __pcie_print_link_status(struct pci_dev *dev, bool verbose);
 void pcie_report_downtraining(struct pci_dev *dev);
+void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
 
 /* Single Root I/O Virtualization */
 struct pci_sriov {
@@ -418,11 +448,12 @@ static inline void pci_restore_dpc_state(struct pci_dev *dev) {}
 #endif
 
 #ifdef CONFIG_PCI_ATS
+/* Address Translation Service */
+void pci_ats_init(struct pci_dev *dev);
 void pci_restore_ats_state(struct pci_dev *dev);
 #else
-static inline void pci_restore_ats_state(struct pci_dev *dev)
-{
-}
+static inline void pci_ats_init(struct pci_dev *d) { }
+static inline void pci_restore_ats_state(struct pci_dev *dev) { }
 #endif /* CONFIG_PCI_ATS */
 
 #ifdef CONFIG_PCI_IOV
@@ -433,7 +464,7 @@ void pci_iov_update_resource(struct pci_dev *dev, int resno);
 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
 void pci_restore_iov_state(struct pci_dev *dev);
 int pci_iov_bus_range(struct pci_bus *bus);
-
+extern const struct attribute_group sriov_dev_attr_group;
 #else
 static inline int pci_iov_init(struct pci_dev *dev)
 {
@@ -518,10 +549,21 @@ static inline void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev) { }
 static inline void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev) { }
 #endif
 
+#ifdef CONFIG_PCIE_ECRC
+void pcie_set_ecrc_checking(struct pci_dev *dev);
+void pcie_ecrc_get_policy(char *str);
+#else
+static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
+static inline void pcie_ecrc_get_policy(char *str) { }
+#endif
+
 #ifdef CONFIG_PCIE_PTM
 void pci_ptm_init(struct pci_dev *dev);
+int pci_enable_ptm(struct pci_dev *dev, u8 *granularity);
 #else
 static inline void pci_ptm_init(struct pci_dev *dev) { }
+static inline int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
+{ return -EINVAL; }
 #endif
 
 struct pci_dev_reset_methods {
@@ -558,6 +600,10 @@ struct device_node;
 int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
 int of_get_pci_domain_nr(struct device_node *node);
 int of_pci_get_max_link_speed(struct device_node *node);
+void pci_set_of_node(struct pci_dev *dev);
+void pci_release_of_node(struct pci_dev *dev);
+void pci_set_bus_of_node(struct pci_bus *bus);
+void pci_release_bus_of_node(struct pci_bus *bus);
 
 #else
 static inline int
@@ -577,6 +623,11 @@ of_pci_get_max_link_speed(struct device_node *node)
 {
         return -EINVAL;
 }
+
+static inline void pci_set_of_node(struct pci_dev *dev) { }
+static inline void pci_release_of_node(struct pci_dev *dev) { }
+static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
+static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
 #endif /* CONFIG_OF */
 
 #if defined(CONFIG_OF_ADDRESS)
@@ -607,4 +658,13 @@ static inline void pci_aer_clear_fatal_status(struct pci_dev *dev) { }
 static inline void pci_aer_clear_device_status(struct pci_dev *dev) { }
 #endif
 
+#ifdef CONFIG_ACPI
+int pci_acpi_program_hp_params(struct pci_dev *dev);
+#else
+static inline int pci_acpi_program_hp_params(struct pci_dev *dev)
+{
+        return -ENODEV;
+}
+#endif
+
 #endif /* DRIVERS_PCI_H */
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 464f8f92653f..652ef23bba35 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -18,7 +18,6 @@
 #include <linux/slab.h>
 #include <linux/jiffies.h>
 #include <linux/delay.h>
-#include <linux/pci-aspm.h>
 #include "../pci.h"
 
 #ifdef MODULE_PARAM_PREFIX
@@ -913,10 +912,10 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
 
         /*
          * We allocate pcie_link_state for the component on the upstream
-         * end of a Link, so there's nothing to do unless this device has a
-         * Link on its secondary side.
+         * end of a Link, so there's nothing to do unless this device is
+         * downstream port.
          */
-        if (!pdev->has_secondary_link)
+        if (!pcie_downstream_port(pdev))
                 return;
 
         /* VIA has a strange chipset, root port is under a bridge */
@@ -1070,7 +1069,7 @@ static int __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem)
         if (!pci_is_pcie(pdev))
                 return 0;
 
-        if (pdev->has_secondary_link)
+        if (pcie_downstream_port(pdev))
                 parent = pdev;
         if (!parent || !parent->link_state)
                 return -EINVAL;
diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c
index 773197a12568..b0e6048a9208 100644
--- a/drivers/pci/pcie/err.c
+++ b/drivers/pci/pcie/err.c
@@ -166,7 +166,7 @@ static pci_ers_result_t reset_link(struct pci_dev *dev, u32 service)
         driver = pcie_port_find_service(dev, service);
         if (driver && driver->reset_link) {
                 status = driver->reset_link(dev);
-        } else if (dev->has_secondary_link) {
+        } else if (pcie_downstream_port(dev)) {
                 status = default_reset_link(dev);
         } else {
                 pci_printk(KERN_DEBUG, dev, "no link-reset support at upstream device %s\n",
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index dbeeb385fb9f..3d5271a7a849 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1426,26 +1426,38 @@ void set_pcie_port_type(struct pci_dev *pdev)
         pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, &reg16);
         pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
 
+        parent = pci_upstream_bridge(pdev);
+        if (!parent)
+                return;
+
         /*
-         * A Root Port or a PCI-to-PCIe bridge is always the upstream end
-         * of a Link.  No PCIe component has two Links.  Two Links are
-         * connected by a Switch that has a Port on each Link and internal
-         * logic to connect the two Ports.
+         * Some systems do not identify their upstream/downstream ports
+         * correctly so detect impossible configurations here and correct
+         * the port type accordingly.
          */
         type = pci_pcie_type(pdev);
-        if (type == PCI_EXP_TYPE_ROOT_PORT ||
-            type == PCI_EXP_TYPE_PCIE_BRIDGE)
-                pdev->has_secondary_link = 1;
-        else if (type == PCI_EXP_TYPE_UPSTREAM ||
-                 type == PCI_EXP_TYPE_DOWNSTREAM) {
-                parent = pci_upstream_bridge(pdev);
-
+        if (type == PCI_EXP_TYPE_DOWNSTREAM) {
                 /*
-                 * Usually there's an upstream device (Root Port or Switch
-                 * Downstream Port), but we can't assume one exists.
+                 * If pdev claims to be downstream port but the parent
+                 * device is also downstream port assume pdev is actually
+                 * upstream port.
                  */
-                if (parent && !parent->has_secondary_link)
-                        pdev->has_secondary_link = 1;
+                if (pcie_downstream_port(parent)) {
+                        pci_info(pdev, "claims to be downstream port but is acting as upstream port, correcting type\n");
+                        pdev->pcie_flags_reg &= ~PCI_EXP_FLAGS_TYPE;
+                        pdev->pcie_flags_reg |= PCI_EXP_TYPE_UPSTREAM;
+                }
+        } else if (type == PCI_EXP_TYPE_UPSTREAM) {
+                /*
+                 * If pdev claims to be upstream port but the parent
+                 * device is also upstream port assume pdev is actually
+                 * downstream port.
+                 */
+                if (pci_pcie_type(parent) == PCI_EXP_TYPE_UPSTREAM) {
+                        pci_info(pdev, "claims to be upstream port but is acting as downstream port, correcting type\n");
+                        pdev->pcie_flags_reg &= ~PCI_EXP_FLAGS_TYPE;
+                        pdev->pcie_flags_reg |= PCI_EXP_TYPE_DOWNSTREAM;
+                }
         }
 }
 
@@ -1915,275 +1927,6 @@ static void pci_configure_mps(struct pci_dev *dev)
                  p_mps, mps, mpss);
 }
 
-static struct hpp_type0 pci_default_type0 = {
-        .revision = 1,
-        .cache_line_size = 8,
-        .latency_timer = 0x40,
-        .enable_serr = 0,
-        .enable_perr = 0,
-};
-
-static void program_hpp_type0(struct pci_dev *dev, struct hpp_type0 *hpp)
-{
-        u16 pci_cmd, pci_bctl;
-
-        if (!hpp)
-                hpp = &pci_default_type0;
-
-        if (hpp->revision > 1) {
-                pci_warn(dev, "PCI settings rev %d not supported; using defaults\n",
-                         hpp->revision);
-                hpp = &pci_default_type0;
-        }
-
-        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp->cache_line_size);
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp->latency_timer);
-        pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
-        if (hpp->enable_serr)
-                pci_cmd |= PCI_COMMAND_SERR;
-        if (hpp->enable_perr)
-                pci_cmd |= PCI_COMMAND_PARITY;
-        pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
-
-        /* Program bridge control value */
-        if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
-                pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
-                                      hpp->latency_timer);
-                pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
-                if (hpp->enable_perr)
-                        pci_bctl |= PCI_BRIDGE_CTL_PARITY;
-                pci_write_config_word(dev, PCI_BRIDGE_CONTROL, pci_bctl);
-        }
-}
-
-static void program_hpp_type1(struct pci_dev *dev, struct hpp_type1 *hpp)
-{
-        int pos;
-
-        if (!hpp)
-                return;
-
-        pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
-        if (!pos)
-                return;
-
-        pci_warn(dev, "PCI-X settings not supported\n");
-}
-
-static bool pcie_root_rcb_set(struct pci_dev *dev)
-{
-        struct pci_dev *rp = pcie_find_root_port(dev);
-        u16 lnkctl;
-
-        if (!rp)
-                return false;
-
-        pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl);
-        if (lnkctl & PCI_EXP_LNKCTL_RCB)
-                return true;
-
-        return false;
-}
-
-static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
-{
-        int pos;
-        u32 reg32;
-
-        if (!hpp)
-                return;
-
-        if (!pci_is_pcie(dev))
-                return;
-
-        if (hpp->revision > 1) {
-                pci_warn(dev, "PCIe settings rev %d not supported\n",
-                         hpp->revision);
-                return;
-        }
-
-        /*
-         * Don't allow _HPX to change MPS or MRRS settings.  We manage
-         * those to make sure they're consistent with the rest of the
-         * platform.
-         */
-        hpp->pci_exp_devctl_and |= PCI_EXP_DEVCTL_PAYLOAD |
-                                    PCI_EXP_DEVCTL_READRQ;
-        hpp->pci_exp_devctl_or &= ~(PCI_EXP_DEVCTL_PAYLOAD |
-                                    PCI_EXP_DEVCTL_READRQ);
-
-        /* Initialize Device Control Register */
-        pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
-                        ~hpp->pci_exp_devctl_and, hpp->pci_exp_devctl_or);
-
-        /* Initialize Link Control Register */
-        if (pcie_cap_has_lnkctl(dev)) {
-
-                /*
-                 * If the Root Port supports Read Completion Boundary of
-                 * 128, set RCB to 128.  Otherwise, clear it.
-                 */
-                hpp->pci_exp_lnkctl_and |= PCI_EXP_LNKCTL_RCB;
-                hpp->pci_exp_lnkctl_or &= ~PCI_EXP_LNKCTL_RCB;
-                if (pcie_root_rcb_set(dev))
-                        hpp->pci_exp_lnkctl_or |= PCI_EXP_LNKCTL_RCB;
-
-                pcie_capability_clear_and_set_word(dev, PCI_EXP_LNKCTL,
-                        ~hpp->pci_exp_lnkctl_and, hpp->pci_exp_lnkctl_or);
-        }
-
-        /* Find Advanced Error Reporting Enhanced Capability */
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-        if (!pos)
-                return;
-
-        /* Initialize Uncorrectable Error Mask Register */
-        pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &reg32);
-        reg32 = (reg32 & hpp->unc_err_mask_and) | hpp->unc_err_mask_or;
-        pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, reg32);
-
-        /* Initialize Uncorrectable Error Severity Register */
-        pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &reg32);
-        reg32 = (reg32 & hpp->unc_err_sever_and) | hpp->unc_err_sever_or;
-        pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, reg32);
-
-        /* Initialize Correctable Error Mask Register */
-        pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &reg32);
-        reg32 = (reg32 & hpp->cor_err_mask_and) | hpp->cor_err_mask_or;
-        pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg32);
-
-        /* Initialize Advanced Error Capabilities and Control Register */
-        pci_read_config_dword(dev, pos + PCI_ERR_CAP, &reg32);
-        reg32 = (reg32 & hpp->adv_err_cap_and) | hpp->adv_err_cap_or;
-
-        /* Don't enable ECRC generation or checking if unsupported */
-        if (!(reg32 & PCI_ERR_CAP_ECRC_GENC))
-                reg32 &= ~PCI_ERR_CAP_ECRC_GENE;
-        if (!(reg32 & PCI_ERR_CAP_ECRC_CHKC))
-                reg32 &= ~PCI_ERR_CAP_ECRC_CHKE;
-        pci_write_config_dword(dev, pos + PCI_ERR_CAP, reg32);
-
-        /*
-         * FIXME: The following two registers are not supported yet.
-         *
-         *   o Secondary Uncorrectable Error Severity Register
-         *   o Secondary Uncorrectable Error Mask Register
-         */
-}
-
-static u16 hpx3_device_type(struct pci_dev *dev)
-{
-        u16 pcie_type = pci_pcie_type(dev);
-        const int pcie_to_hpx3_type[] = {
-                [PCI_EXP_TYPE_ENDPOINT]    = HPX_TYPE_ENDPOINT,
-                [PCI_EXP_TYPE_LEG_END]     = HPX_TYPE_LEG_END,
-                [PCI_EXP_TYPE_RC_END]      = HPX_TYPE_RC_END,
-                [PCI_EXP_TYPE_RC_EC]       = HPX_TYPE_RC_EC,
-                [PCI_EXP_TYPE_ROOT_PORT]   = HPX_TYPE_ROOT_PORT,
-                [PCI_EXP_TYPE_UPSTREAM]    = HPX_TYPE_UPSTREAM,
-                [PCI_EXP_TYPE_DOWNSTREAM]  = HPX_TYPE_DOWNSTREAM,
-                [PCI_EXP_TYPE_PCI_BRIDGE]  = HPX_TYPE_PCI_BRIDGE,
-                [PCI_EXP_TYPE_PCIE_BRIDGE] = HPX_TYPE_PCIE_BRIDGE,
-        };
-
-        if (pcie_type >= ARRAY_SIZE(pcie_to_hpx3_type))
-                return 0;
-
-        return pcie_to_hpx3_type[pcie_type];
-}
-
-static u8 hpx3_function_type(struct pci_dev *dev)
-{
-        if (dev->is_virtfn)
-                return HPX_FN_SRIOV_VIRT;
-        else if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV) > 0)
-                return HPX_FN_SRIOV_PHYS;
-        else
-                return HPX_FN_NORMAL;
-}
-
-static bool hpx3_cap_ver_matches(u8 pcie_cap_id, u8 hpx3_cap_id)
-{
-        u8 cap_ver = hpx3_cap_id & 0xf;
-
-        if ((hpx3_cap_id & BIT(4)) && cap_ver >= pcie_cap_id)
-                return true;
-        else if (cap_ver == pcie_cap_id)
-                return true;
-
-        return false;
-}
-
-static void program_hpx_type3_register(struct pci_dev *dev,
-                                       const struct hpx_type3 *reg)
-{
-        u32 match_reg, write_reg, header, orig_value;
-        u16 pos;
-
-        if (!(hpx3_device_type(dev) & reg->device_type))
-                return;
-
-        if (!(hpx3_function_type(dev) & reg->function_type))
-                return;
-
-        switch (reg->config_space_location) {
-        case HPX_CFG_PCICFG:
-                pos = 0;
-                break;
-        case HPX_CFG_PCIE_CAP:
-                pos = pci_find_capability(dev, reg->pci_exp_cap_id);
-                if (pos == 0)
-                        return;
-
-                break;
-        case HPX_CFG_PCIE_CAP_EXT:
-                pos = pci_find_ext_capability(dev, reg->pci_exp_cap_id);
-                if (pos == 0)
-                        return;
-
-                pci_read_config_dword(dev, pos, &header);
-                if (!hpx3_cap_ver_matches(PCI_EXT_CAP_VER(header),
-                                          reg->pci_exp_cap_ver))
-                        return;
-
-                break;
-        case HPX_CFG_VEND_CAP:  /* Fall through */
-        case HPX_CFG_DVSEC:     /* Fall through */
-        default:
-                pci_warn(dev, "Encountered _HPX type 3 with unsupported config space location");
-                return;
-        }
-
-        pci_read_config_dword(dev, pos + reg->match_offset, &match_reg);
-
-        if ((match_reg & reg->match_mask_and) != reg->match_value)
-                return;
-
-        pci_read_config_dword(dev, pos + reg->reg_offset, &write_reg);
-        orig_value = write_reg;
-        write_reg &= reg->reg_mask_and;
-        write_reg |= reg->reg_mask_or;
-
-        if (orig_value == write_reg)
-                return;
-
-        pci_write_config_dword(dev, pos + reg->reg_offset, write_reg);
-
-        pci_dbg(dev, "Applied _HPX3 at [0x%x]: 0x%08x -> 0x%08x",
-                pos, orig_value, write_reg);
-}
-
-static void program_hpx_type3(struct pci_dev *dev, struct hpx_type3 *hpx3)
-{
-        if (!hpx3)
-                return;
-
-        if (!pci_is_pcie(dev))
-                return;
-
-        program_hpx_type3_register(dev, hpx3);
-}
-
 int pci_configure_extended_tags(struct pci_dev *dev, void *ign)
 {
         struct pci_host_bridge *host;
@@ -2364,13 +2107,6 @@ static void pci_configure_serr(struct pci_dev *dev)
 
 static void pci_configure_device(struct pci_dev *dev)
 {
-        static const struct hotplug_program_ops hp_ops = {
-                .program_type0 = program_hpp_type0,
-                .program_type1 = program_hpp_type1,
-                .program_type2 = program_hpp_type2,
-                .program_type3 = program_hpx_type3,
-        };
-
         pci_configure_mps(dev);
         pci_configure_extended_tags(dev, NULL);
         pci_configure_relaxed_ordering(dev);
@@ -2378,7 +2114,7 @@ static void pci_configure_device(struct pci_dev *dev)
         pci_configure_eetlp_prefix(dev);
         pci_configure_serr(dev);
 
-        pci_acpi_program_hp_params(dev, &hp_ops);
+        pci_acpi_program_hp_params(dev);
 }
 
 static void pci_release_capabilities(struct pci_dev *dev)
@@ -2759,12 +2495,8 @@ static int only_one_child(struct pci_bus *bus)
          * A PCIe Downstream Port normally leads to a Link with only Device
          * 0 on it (PCIe spec r3.1, sec 7.3.1).  As an optimization, scan
          * only for Device 0 in that situation.
-         *
-         * Checking has_secondary_link is a hack to identify Downstream
-         * Ports because sometimes Switches are configured such that the
-         * PCIe Port Type labels are backwards.
          */
-        if (bridge && pci_is_pcie(bridge) && bridge->has_secondary_link)
+        if (bridge && pci_is_pcie(bridge) && pcie_downstream_port(bridge))
                 return 1;
 
         return 0;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 44c4ae1abd00..320255e5e8f8 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -20,7 +20,6 @@
 #include <linux/delay.h>
 #include <linux/acpi.h>
 #include <linux/dmi.h>
-#include <linux/pci-aspm.h>
 #include <linux/ioport.h>
 #include <linux/sched.h>
 #include <linux/ktime.h>
@@ -2593,6 +2592,59 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
                         nvenet_msi_disable);
 
 /*
+ * PCIe spec r4.0 sec 7.7.1.2 and sec 7.7.2.2 say that if MSI/MSI-X is enabled,
+ * then the device can't use INTx interrupts. Tegra's PCIe root ports don't
+ * generate MSI interrupts for PME and AER events instead only INTx interrupts
+ * are generated. Though Tegra's PCIe root ports can generate MSI interrupts
+ * for other events, since PCIe specificiation doesn't support using a mix of
+ * INTx and MSI/MSI-X, it is required to disable MSI interrupts to avoid port
+ * service drivers registering their respective ISRs for MSIs.
+ */
+static void pci_quirk_nvidia_tegra_disable_rp_msi(struct pci_dev *dev)
+{
+        dev->no_msi = 1;
+}
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x1ad0,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x1ad1,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x1ad2,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf0,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e1c,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e1d,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e12,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e13,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0fae,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0faf,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x10e5,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_NVIDIA, 0x10e6,
+                              PCI_CLASS_BRIDGE_PCI, 8,
+                              pci_quirk_nvidia_tegra_disable_rp_msi);
+
+/*
  * Some versions of the MCP55 bridge from Nvidia have a legacy IRQ routing
  * config register.  This register controls the routing of legacy
  * interrupts from devices that route through the MCP55.  If this register
@@ -2925,6 +2977,24 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x10a1,
                         quirk_msi_intx_disable_qca_bug);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0xe091,
                         quirk_msi_intx_disable_qca_bug);
+
+/*
+ * Amazon's Annapurna Labs 1c36:0031 Root Ports don't support MSI-X, so it
+ * should be disabled on platforms where the device (mistakenly) advertises it.
+ *
+ * Notice that this quirk also disables MSI (which may work, but hasn't been
+ * tested), since currently there is no standard way to disable only MSI-X.
+ *
+ * The 0031 device id is reused for other non Root Port device types,
+ * therefore the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
+ */
+static void quirk_al_msi_disable(struct pci_dev *dev)
+{
+        dev->no_msi = 1;
+        pci_warn(dev, "Disabling MSI/MSI-X\n");
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
+                              PCI_CLASS_BRIDGE_PCI, 8, quirk_al_msi_disable);
 #endif /* CONFIG_PCI_MSI */
 
 /*
@@ -4366,6 +4436,24 @@ static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags)
         return ret;
 }
 
+static int pci_quirk_al_acs(struct pci_dev *dev, u16 acs_flags)
+{
+        if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
+                return -ENOTTY;
+
+        /*
+         * Amazon's Annapurna Labs root ports don't include an ACS capability,
+         * but do include ACS-like functionality. The hardware doesn't support
+         * peer-to-peer transactions via the root port and each has a unique
+         * segment number.
+         *
+         * Additionally, the root ports cannot send traffic to each other.
+         */
+        acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
+
+        return acs_flags ? 0 : 1;
+}
+
 /*
  * Sunrise Point PCH root ports implement ACS, but unfortunately as shown in
  * the datasheet (Intel 100 Series Chipset Family PCH Datasheet, Vol. 2,
@@ -4466,6 +4554,19 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
         return acs_flags ? 0 : 1;
 }
 
+static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
+{
+        /*
+         * iProc PAXB Root Ports don't advertise an ACS capability, but
+         * they do not allow peer-to-peer transactions between Root Ports.
+         * Allow each Root Port to be in a separate IOMMU group by masking
+         * SV/RR/CR/UF bits.
+         */
+        acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
+
+        return acs_flags ? 0 : 1;
+}
+
 static const struct pci_dev_acs_enabled {
         u16 vendor;
         u16 device;
@@ -4559,6 +4660,9 @@ static const struct pci_dev_acs_enabled {
         { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
         { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
         { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
+        { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
+        /* Amazon Annapurna Labs */
+        { PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs },
         { 0 }
 };
 
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index 7f4e65872b8d..bade14002fd8 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -15,7 +15,6 @@
 #include "pci.h"
 
 DECLARE_RWSEM(pci_bus_sem);
-EXPORT_SYMBOL_GPL(pci_bus_sem);
 
 /*
  * pci_for_each_dma_alias - Iterate over DMA aliases for a device
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 79b1fa6519be..e7dbe21705ba 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1662,8 +1662,8 @@ static int iov_resources_unassigned(struct pci_dev *dev, void *data)
         int i;
         bool *unassigned = data;
 
-        for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
-                struct resource *r = &dev->resource[i];
+        for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
+                struct resource *r = &dev->resource[i + PCI_IOV_RESOURCES];
                 struct pci_bus_region region;
 
                 /* Not assigned or rejected by kernel? */
diff --git a/drivers/pci/vc.c b/drivers/pci/vc.c
index 5acd9c02683a..5486f8768c86 100644
--- a/drivers/pci/vc.c
+++ b/drivers/pci/vc.c
@@ -13,6 +13,8 @@
 #include <linux/pci_regs.h>
 #include <linux/types.h>
 
+#include "pci.h"
+
 /**
  * pci_vc_save_restore_dwords - Save or restore a series of dwords
  * @dev: device
@@ -105,7 +107,7 @@ static void pci_vc_enable(struct pci_dev *dev, int pos, int res)
         struct pci_dev *link = NULL;
 
         /* Enable VCs from the downstream device */
-        if (!dev->has_secondary_link)
+        if (!pci_is_pcie(dev) || !pcie_downstream_port(dev))
                 return;
 
         ctrl_pos = pos + PCI_VC_RES_CTRL + (res * PCI_CAP_VC_PER_VC_SIZEOF);
@@ -409,7 +411,6 @@ void pci_restore_vc_state(struct pci_dev *dev)
  * For each type of VC capability, VC/VC9/MFVC, find the capability, size
  * it, and allocate a buffer for save/restore.
  */
-
 void pci_allocate_vc_save_buffers(struct pci_dev *dev)
 {
         int i;
diff --git a/drivers/pci/vpd.c b/drivers/pci/vpd.c
index 4963c2e2bd4c..7915d10f9aa1 100644
--- a/drivers/pci/vpd.c
+++ b/drivers/pci/vpd.c
@@ -571,6 +571,12 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID,
                 quirk_blacklist_vpd);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_QLOGIC, 0x2261, quirk_blacklist_vpd);
+/*
+ * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port
+ * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
+ */
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
+                              PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd);
 
 /*
  * For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the
diff --git a/drivers/phy/tegra/Kconfig b/drivers/phy/tegra/Kconfig
index e516967d695b..f9817c3ae85f 100644
--- a/drivers/phy/tegra/Kconfig
+++ b/drivers/phy/tegra/Kconfig
@@ -7,3 +7,10 @@ config PHY_TEGRA_XUSB
 
           To compile this driver as a module, choose M here: the module will
           be called phy-tegra-xusb.
+
+config PHY_TEGRA194_P2U
+        tristate "NVIDIA Tegra194 PIPE2UPHY PHY driver"
+        depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
+        select GENERIC_PHY
+        help
+          Enable this to support the P2U (PIPE to UPHY) that is part of Tegra 19x SOCs.
diff --git a/drivers/phy/tegra/Makefile b/drivers/phy/tegra/Makefile
index 64ccaeacb631..320dd389f34d 100644
--- a/drivers/phy/tegra/Makefile
+++ b/drivers/phy/tegra/Makefile
@@ -6,3 +6,4 @@ phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_124_SOC) += xusb-tegra124.o
 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_132_SOC) += xusb-tegra124.o
 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_210_SOC) += xusb-tegra210.o
 phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_186_SOC) += xusb-tegra186.o
+obj-$(CONFIG_PHY_TEGRA194_P2U) += phy-tegra194-p2u.o
diff --git a/drivers/phy/tegra/phy-tegra194-p2u.c b/drivers/phy/tegra/phy-tegra194-p2u.c
new file mode 100644
index 000000000000..7042bed9feaa
--- /dev/null
+++ b/drivers/phy/tegra/phy-tegra194-p2u.c
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * P2U (PIPE to UPHY) driver for Tegra T194 SoC
+ *
+ * Copyright (C) 2019 NVIDIA Corporation.
+ *
+ * Author: Vidya Sagar <vidyas@nvidia.com>
+ */
+
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/phy/phy.h>
+
+#define P2U_PERIODIC_EQ_CTRL_GEN3       0xc0
+#define P2U_PERIODIC_EQ_CTRL_GEN3_PERIODIC_EQ_EN                BIT(0)
+#define P2U_PERIODIC_EQ_CTRL_GEN3_INIT_PRESET_EQ_TRAIN_EN       BIT(1)
+#define P2U_PERIODIC_EQ_CTRL_GEN4       0xc4
+#define P2U_PERIODIC_EQ_CTRL_GEN4_INIT_PRESET_EQ_TRAIN_EN       BIT(1)
+
+#define P2U_RX_DEBOUNCE_TIME                            0xa4
+#define P2U_RX_DEBOUNCE_TIME_DEBOUNCE_TIMER_MASK        0xffff
+#define P2U_RX_DEBOUNCE_TIME_DEBOUNCE_TIMER_VAL         160
+
+struct tegra_p2u {
+        void __iomem *base;
+};
+
+static inline void p2u_writel(struct tegra_p2u *phy, const u32 value,
+                              const u32 reg)
+{
+        writel_relaxed(value, phy->base + reg);
+}
+
+static inline u32 p2u_readl(struct tegra_p2u *phy, const u32 reg)
+{
+        return readl_relaxed(phy->base + reg);
+}
+
+static int tegra_p2u_power_on(struct phy *x)
+{
+        struct tegra_p2u *phy = phy_get_drvdata(x);
+        u32 val;
+
+        val = p2u_readl(phy, P2U_PERIODIC_EQ_CTRL_GEN3);
+        val &= ~P2U_PERIODIC_EQ_CTRL_GEN3_PERIODIC_EQ_EN;
+        val |= P2U_PERIODIC_EQ_CTRL_GEN3_INIT_PRESET_EQ_TRAIN_EN;
+        p2u_writel(phy, val, P2U_PERIODIC_EQ_CTRL_GEN3);
+
+        val = p2u_readl(phy, P2U_PERIODIC_EQ_CTRL_GEN4);
+        val |= P2U_PERIODIC_EQ_CTRL_GEN4_INIT_PRESET_EQ_TRAIN_EN;
+        p2u_writel(phy, val, P2U_PERIODIC_EQ_CTRL_GEN4);
+
+        val = p2u_readl(phy, P2U_RX_DEBOUNCE_TIME);
+        val &= ~P2U_RX_DEBOUNCE_TIME_DEBOUNCE_TIMER_MASK;
+        val |= P2U_RX_DEBOUNCE_TIME_DEBOUNCE_TIMER_VAL;
+        p2u_writel(phy, val, P2U_RX_DEBOUNCE_TIME);
+
+        return 0;
+}
+
+static const struct phy_ops ops = {
+        .power_on = tegra_p2u_power_on,
+        .owner = THIS_MODULE,
+};
+
+static int tegra_p2u_probe(struct platform_device *pdev)
+{
+        struct phy_provider *phy_provider;
+        struct device *dev = &pdev->dev;
+        struct phy *generic_phy;
+        struct tegra_p2u *phy;
+        struct resource *res;
+
+        phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+        if (!phy)
+                return -ENOMEM;
+
+        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctl");
+        phy->base = devm_ioremap_resource(dev, res);
+        if (IS_ERR(phy->base))
+                return PTR_ERR(phy->base);
+
+        platform_set_drvdata(pdev, phy);
+
+        generic_phy = devm_phy_create(dev, NULL, &ops);
+        if (IS_ERR(generic_phy))
+                return PTR_ERR(generic_phy);
+
+        phy_set_drvdata(generic_phy, phy);
+
+        phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+        if (IS_ERR(phy_provider))
+                return PTR_ERR(phy_provider);
+
+        return 0;
+}
+
+static const struct of_device_id tegra_p2u_id_table[] = {
+        {
+                .compatible = "nvidia,tegra194-p2u",
+        },
+        {}
+};
+MODULE_DEVICE_TABLE(of, tegra_p2u_id_table);
+
+static struct platform_driver tegra_p2u_driver = {
+        .probe = tegra_p2u_probe,
+        .driver = {
+                .name = "tegra194-p2u",
+                .of_match_table = tegra_p2u_id_table,
+        },
+};
+module_platform_driver(tegra_p2u_driver);
+
+MODULE_AUTHOR("Vidya Sagar <vidyas@nvidia.com>");
+MODULE_DESCRIPTION("NVIDIA Tegra194 PIPE2UPHY PHY driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 1b67bb578f9f..ae21d08c65e8 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -674,6 +674,7 @@ config EEEPC_LAPTOP
 config ASUS_WMI
         tristate "ASUS WMI Driver"
         depends on ACPI_WMI
+        depends on ACPI_BATTERY
         depends on INPUT
         depends on HWMON
         depends on BACKLIGHT_CLASS_DEVICE
diff --git a/drivers/platform/x86/i2c-multi-instantiate.c b/drivers/platform/x86/i2c-multi-instantiate.c
index 61fe341a85aa..ea68f6ed66ae 100644
--- a/drivers/platform/x86/i2c-multi-instantiate.c
+++ b/drivers/platform/x86/i2c-multi-instantiate.c
@@ -90,7 +90,7 @@ static int i2c_multi_inst_probe(struct platform_device *pdev)
         for (i = 0; i < multi->num_clients && inst_data[i].type; i++) {
                 memset(&board_info, 0, sizeof(board_info));
                 strlcpy(board_info.type, inst_data[i].type, I2C_NAME_SIZE);
-                snprintf(name, sizeof(name), "%s-%s.%d", match->id,
+                snprintf(name, sizeof(name), "%s-%s.%d", dev_name(dev),
                          inst_data[i].type, i);
                 board_info.dev_name = name;
                 switch (inst_data[i].flags & IRQ_RESOURCE_TYPE) {
diff --git a/drivers/platform/x86/pmc_atom.c b/drivers/platform/x86/pmc_atom.c
index 9aca5e7ce6d0..07d1b911e72f 100644
--- a/drivers/platform/x86/pmc_atom.c
+++ b/drivers/platform/x86/pmc_atom.c
@@ -422,6 +422,13 @@ static const struct dmi_system_id critclk_systems[] = {
                         DMI_MATCH(DMI_PRODUCT_VERSION, "6ES7647-8B"),
                 },
         },
+        {
+                .ident = "SIMATIC IPC277E",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "SIEMENS AG"),
+                        DMI_MATCH(DMI_PRODUCT_VERSION, "6AV7882-0"),
+                },
+        },
         { /*sentinel*/ }
 };
 
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index 644f7f5c61a2..4a858789e6c5 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -27,7 +27,6 @@
 #include <linux/moduleparam.h>
 #include <linux/pci.h>
 #include <linux/aer.h>
-#include <linux/pci-aspm.h>
 #include <linux/slab.h>
 #include <linux/mutex.h>
 #include <linux/spinlock.h>
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
index 1bb6aada93fa..ac39ed79ccaa 100644
--- a/drivers/scsi/hpsa.c
+++ b/drivers/scsi/hpsa.c
@@ -21,7 +21,6 @@
 #include <linux/interrupt.h>
 #include <linux/types.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
 #include <linux/delay.h>
diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
index d0c2f8d6f2a2..c8e512ba6d39 100644
--- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c
+++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c
@@ -51,7 +51,6 @@
 #include <linux/workqueue.h>
 #include <linux/delay.h>
 #include <linux/pci.h>
-#include <linux/pci-aspm.h>
 #include <linux/interrupt.h>
 #include <linux/aer.h>
 #include <linux/raid_class.h>
diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index 213ff03c8a9f..59d9d512dcda 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -17,6 +17,7 @@
 #include <linux/blkdev.h>
 #include <linux/pagemap.h>
 #include <linux/export.h>
+#include <linux/fs_parser.h>
 #include <linux/hid.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -1451,9 +1452,9 @@ struct ffs_sb_fill_data {
         struct ffs_data *ffs_data;
 };
 
-static int ffs_sb_fill(struct super_block *sb, void *_data, int silent)
+static int ffs_sb_fill(struct super_block *sb, struct fs_context *fc)
 {
-        struct ffs_sb_fill_data *data = _data;
+        struct ffs_sb_fill_data *data = fc->fs_private;
         struct inode    *inode;
         struct ffs_data *ffs = data->ffs_data;
 
@@ -1486,147 +1487,152 @@ static int ffs_sb_fill(struct super_block *sb, void *_data, int silent)
         return 0;
 }
 
-static int ffs_fs_parse_opts(struct ffs_sb_fill_data *data, char *opts)
-{
-        ENTER();
+enum {
+        Opt_no_disconnect,
+        Opt_rmode,
+        Opt_fmode,
+        Opt_mode,
+        Opt_uid,
+        Opt_gid,
+};
 
-        if (!opts || !*opts)
-                return 0;
+static const struct fs_parameter_spec ffs_fs_param_specs[] = {
+        fsparam_bool    ("no_disconnect",       Opt_no_disconnect),
+        fsparam_u32     ("rmode",               Opt_rmode),
+        fsparam_u32     ("fmode",               Opt_fmode),
+        fsparam_u32     ("mode",                Opt_mode),
+        fsparam_u32     ("uid",                 Opt_uid),
+        fsparam_u32     ("gid",                 Opt_gid),
+        {}
+};
 
-        for (;;) {
-                unsigned long value;
-                char *eq, *comma;
-
-                /* Option limit */
-                comma = strchr(opts, ',');
-                if (comma)
-                        *comma = 0;
-
-                /* Value limit */
-                eq = strchr(opts, '=');
-                if (unlikely(!eq)) {
-                        pr_err("'=' missing in %s\n", opts);
-                        return -EINVAL;
-                }
-                *eq = 0;
+static const struct fs_parameter_description ffs_fs_fs_parameters = {
+        .name           = "kAFS",
+        .specs          = ffs_fs_param_specs,
+};
 
-                /* Parse value */
-                if (kstrtoul(eq + 1, 0, &value)) {
-                        pr_err("%s: invalid value: %s\n", opts, eq + 1);
-                        return -EINVAL;
-                }
+static int ffs_fs_parse_param(struct fs_context *fc, struct fs_parameter *param)
+{
+        struct ffs_sb_fill_data *data = fc->fs_private;
+        struct fs_parse_result result;
+        int opt;
 
-                /* Interpret option */
-                switch (eq - opts) {
-                case 13:
-                        if (!memcmp(opts, "no_disconnect", 13))
-                                data->no_disconnect = !!value;
-                        else
-                                goto invalid;
-                        break;
-                case 5:
-                        if (!memcmp(opts, "rmode", 5))
-                                data->root_mode  = (value & 0555) | S_IFDIR;
-                        else if (!memcmp(opts, "fmode", 5))
-                                data->perms.mode = (value & 0666) | S_IFREG;
-                        else
-                                goto invalid;
-                        break;
+        ENTER();
 
-                case 4:
-                        if (!memcmp(opts, "mode", 4)) {
-                                data->root_mode  = (value & 0555) | S_IFDIR;
-                                data->perms.mode = (value & 0666) | S_IFREG;
-                        } else {
-                                goto invalid;
-                        }
-                        break;
+        opt = fs_parse(fc, &ffs_fs_fs_parameters, param, &result);
+        if (opt < 0)
+                return opt;
 
-                case 3:
-                        if (!memcmp(opts, "uid", 3)) {
-                                data->perms.uid = make_kuid(current_user_ns(), value);
-                                if (!uid_valid(data->perms.uid)) {
-                                        pr_err("%s: unmapped value: %lu\n", opts, value);
-                                        return -EINVAL;
-                                }
-                        } else if (!memcmp(opts, "gid", 3)) {
-                                data->perms.gid = make_kgid(current_user_ns(), value);
-                                if (!gid_valid(data->perms.gid)) {
-                                        pr_err("%s: unmapped value: %lu\n", opts, value);
-                                        return -EINVAL;
-                                }
-                        } else {
-                                goto invalid;
-                        }
-                        break;
+        switch (opt) {
+        case Opt_no_disconnect:
+                data->no_disconnect = result.boolean;
+                break;
+        case Opt_rmode:
+                data->root_mode  = (result.uint_32 & 0555) | S_IFDIR;
+                break;
+        case Opt_fmode:
+                data->perms.mode = (result.uint_32 & 0666) | S_IFREG;
+                break;
+        case Opt_mode:
+                data->root_mode  = (result.uint_32 & 0555) | S_IFDIR;
+                data->perms.mode = (result.uint_32 & 0666) | S_IFREG;
+                break;
 
-                default:
-invalid:
-                        pr_err("%s: invalid option\n", opts);
-                        return -EINVAL;
-                }
+        case Opt_uid:
+                data->perms.uid = make_kuid(current_user_ns(), result.uint_32);
+                if (!uid_valid(data->perms.uid))
+                        goto unmapped_value;
+                break;
+        case Opt_gid:
+                data->perms.gid = make_kgid(current_user_ns(), result.uint_32);
+                if (!gid_valid(data->perms.gid))
+                        goto unmapped_value;
+                break;
 
-                /* Next iteration */
-                if (!comma)
-                        break;
-                opts = comma + 1;
+        default:
+                return -ENOPARAM;
         }
 
         return 0;
-}
 
-/* "mount -t functionfs dev_name /dev/function" ends up here */
+unmapped_value:
+        return invalf(fc, "%s: unmapped value: %u", param->key, result.uint_32);
+}
 
-static struct dentry *
-ffs_fs_mount(struct file_system_type *t, int flags,
-              const char *dev_name, void *opts)
-{
-        struct ffs_sb_fill_data data = {
-                .perms = {
-                        .mode = S_IFREG | 0600,
-                        .uid = GLOBAL_ROOT_UID,
-                        .gid = GLOBAL_ROOT_GID,
-                },
-                .root_mode = S_IFDIR | 0500,
-                .no_disconnect = false,
-        };
-        struct dentry *rv;
-        int ret;
+/*
+ * Set up the superblock for a mount.
+ */
+static int ffs_fs_get_tree(struct fs_context *fc)
+{
+        struct ffs_sb_fill_data *ctx = fc->fs_private;
         void *ffs_dev;
         struct ffs_data *ffs;
 
         ENTER();
 
-        ret = ffs_fs_parse_opts(&data, opts);
-        if (unlikely(ret < 0))
-                return ERR_PTR(ret);
+        if (!fc->source)
+                return invalf(fc, "No source specified");
 
-        ffs = ffs_data_new(dev_name);
+        ffs = ffs_data_new(fc->source);
         if (unlikely(!ffs))
-                return ERR_PTR(-ENOMEM);
-        ffs->file_perms = data.perms;
-        ffs->no_disconnect = data.no_disconnect;
+                return -ENOMEM;
+        ffs->file_perms = ctx->perms;
+        ffs->no_disconnect = ctx->no_disconnect;
 
-        ffs->dev_name = kstrdup(dev_name, GFP_KERNEL);
+        ffs->dev_name = kstrdup(fc->source, GFP_KERNEL);
         if (unlikely(!ffs->dev_name)) {
                 ffs_data_put(ffs);
-                return ERR_PTR(-ENOMEM);
+                return -ENOMEM;
         }
 
-        ffs_dev = ffs_acquire_dev(dev_name);
+        ffs_dev = ffs_acquire_dev(ffs->dev_name);
         if (IS_ERR(ffs_dev)) {
                 ffs_data_put(ffs);
-                return ERR_CAST(ffs_dev);
+                return PTR_ERR(ffs_dev);
         }
+
         ffs->private_data = ffs_dev;
-        data.ffs_data = ffs;
+        ctx->ffs_data = ffs;
+        return get_tree_nodev(fc, ffs_sb_fill);
+}
+
+static void ffs_fs_free_fc(struct fs_context *fc)
+{
+        struct ffs_sb_fill_data *ctx = fc->fs_private;
+
+        if (ctx) {
+                if (ctx->ffs_data) {
+                        ffs_release_dev(ctx->ffs_data);
+                        ffs_data_put(ctx->ffs_data);
+                }
 
-        rv = mount_nodev(t, flags, &data, ffs_sb_fill);
-        if (IS_ERR(rv) && data.ffs_data) {
-                ffs_release_dev(data.ffs_data);
-                ffs_data_put(data.ffs_data);
+                kfree(ctx);
         }
-        return rv;
+}
+
+static const struct fs_context_operations ffs_fs_context_ops = {
+        .free           = ffs_fs_free_fc,
+        .parse_param    = ffs_fs_parse_param,
+        .get_tree       = ffs_fs_get_tree,
+};
+
+static int ffs_fs_init_fs_context(struct fs_context *fc)
+{
+        struct ffs_sb_fill_data *ctx;
+
+        ctx = kzalloc(sizeof(struct ffs_sb_fill_data), GFP_KERNEL);
+        if (!ctx)
+                return -ENOMEM;
+
+        ctx->perms.mode = S_IFREG | 0600;
+        ctx->perms.uid = GLOBAL_ROOT_UID;
+        ctx->perms.gid = GLOBAL_ROOT_GID;
+        ctx->root_mode = S_IFDIR | 0500;
+        ctx->no_disconnect = false;
+
+        fc->fs_private = ctx;
+        fc->ops = &ffs_fs_context_ops;
+        return 0;
 }
 
 static void
@@ -1644,7 +1650,8 @@ ffs_fs_kill_sb(struct super_block *sb)
 static struct file_system_type ffs_fs_type = {
         .owner          = THIS_MODULE,
         .name           = "functionfs",
-        .mount          = ffs_fs_mount,
+        .init_fs_context = ffs_fs_init_fs_context,
+        .parameters     = &ffs_fs_fs_parameters,
         .kill_sb        = ffs_fs_kill_sb,
 };
 MODULE_ALIAS_FS("functionfs");
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 8b081d61773e..40676be2e46a 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -10,7 +10,6 @@ menu "Backlight & LCD device support"
 #
 config LCD_CLASS_DEVICE
         tristate "Lowlevel LCD controls"
-        default m
         help
           This framework adds support for low-level control of LCD.
           Some framebuffer devices connect to platform-specific LCD modules
@@ -143,7 +142,6 @@ endif # LCD_CLASS_DEVICE
 #
 config BACKLIGHT_CLASS_DEVICE
         tristate "Lowlevel Backlight controls"
-        default m
         help
           This framework adds support for low-level control of the LCD
           backlight. This includes support for brightness and power.
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c
index 5dc07106a59e..cac3e35d7630 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -32,6 +32,12 @@ static const char *const backlight_types[] = {
         [BACKLIGHT_FIRMWARE] = "firmware",
 };
 
+static const char *const backlight_scale_types[] = {
+        [BACKLIGHT_SCALE_UNKNOWN]       = "unknown",
+        [BACKLIGHT_SCALE_LINEAR]        = "linear",
+        [BACKLIGHT_SCALE_NON_LINEAR]    = "non-linear",
+};
+
 #if defined(CONFIG_FB) || (defined(CONFIG_FB_MODULE) && \
                            defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE))
 /* This callback gets called when something important happens inside a
@@ -246,6 +252,18 @@ static ssize_t actual_brightness_show(struct device *dev,
 }
 static DEVICE_ATTR_RO(actual_brightness);
 
+static ssize_t scale_show(struct device *dev,
+                struct device_attribute *attr, char *buf)
+{
+        struct backlight_device *bd = to_backlight_device(dev);
+
+        if (WARN_ON(bd->props.scale > BACKLIGHT_SCALE_NON_LINEAR))
+                return sprintf(buf, "unknown\n");
+
+        return sprintf(buf, "%s\n", backlight_scale_types[bd->props.scale]);
+}
+static DEVICE_ATTR_RO(scale);
+
 static struct class *backlight_class;
 
 #ifdef CONFIG_PM_SLEEP
@@ -292,6 +310,7 @@ static struct attribute *bl_device_attrs[] = {
         &dev_attr_brightness.attr,
         &dev_attr_actual_brightness.attr,
         &dev_attr_max_brightness.attr,
+        &dev_attr_scale.attr,
         &dev_attr_type.attr,
         NULL,
 };
diff --git a/drivers/video/backlight/gpio_backlight.c b/drivers/video/backlight/gpio_backlight.c
index e84f3087e29f..18e053e4716c 100644
--- a/drivers/video/backlight/gpio_backlight.c
+++ b/drivers/video/backlight/gpio_backlight.c
@@ -59,13 +59,11 @@ static int gpio_backlight_probe_dt(struct platform_device *pdev,
                                    struct gpio_backlight *gbl)
 {
         struct device *dev = &pdev->dev;
-        enum gpiod_flags flags;
         int ret;
 
         gbl->def_value = device_property_read_bool(dev, "default-on");
-        flags = gbl->def_value ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
 
-        gbl->gpiod = devm_gpiod_get(dev, NULL, flags);
+        gbl->gpiod = devm_gpiod_get(dev, NULL, GPIOD_ASIS);
         if (IS_ERR(gbl->gpiod)) {
                 ret = PTR_ERR(gbl->gpiod);
 
@@ -79,6 +77,22 @@ static int gpio_backlight_probe_dt(struct platform_device *pdev,
         return 0;
 }
 
+static int gpio_backlight_initial_power_state(struct gpio_backlight *gbl)
+{
+        struct device_node *node = gbl->dev->of_node;
+
+        /* Not booted with device tree or no phandle link to the node */
+        if (!node || !node->phandle)
+                return gbl->def_value ? FB_BLANK_UNBLANK : FB_BLANK_POWERDOWN;
+
+        /* if the enable GPIO is disabled, do not enable the backlight */
+        if (gpiod_get_value_cansleep(gbl->gpiod) == 0)
+                return FB_BLANK_POWERDOWN;
+
+        return FB_BLANK_UNBLANK;
+}
+
+
 static int gpio_backlight_probe(struct platform_device *pdev)
 {
         struct gpio_backlight_platform_data *pdata =
@@ -136,7 +150,9 @@ static int gpio_backlight_probe(struct platform_device *pdev)
                 return PTR_ERR(bl);
         }
 
-        bl->props.brightness = gbl->def_value;
+        bl->props.power = gpio_backlight_initial_power_state(gbl);
+        bl->props.brightness = 1;
+
         backlight_update_status(bl);
 
         platform_set_drvdata(pdev, bl);
diff --git a/drivers/video/backlight/lm3630a_bl.c b/drivers/video/backlight/lm3630a_bl.c
index b04b35d007a2..2d8e8192e4e2 100644
--- a/drivers/video/backlight/lm3630a_bl.c
+++ b/drivers/video/backlight/lm3630a_bl.c
@@ -377,8 +377,7 @@ static int lm3630a_parse_led_sources(struct fwnode_handle *node,
         u32 sources[LM3630A_NUM_SINKS];
         int ret, num_sources, i;
 
-        num_sources = fwnode_property_read_u32_array(node, "led-sources", NULL,
-                                                     0);
+        num_sources = fwnode_property_count_u32(node, "led-sources");
         if (num_sources < 0)
                 return default_led_sources;
         else if (num_sources > ARRAY_SIZE(sources))
diff --git a/drivers/video/backlight/lms283gf05.c b/drivers/video/backlight/lms283gf05.c
index 35bc012b22cc..0e45685bcc1c 100644
--- a/drivers/video/backlight/lms283gf05.c
+++ b/drivers/video/backlight/lms283gf05.c
@@ -158,7 +158,7 @@ static int lms283gf05_probe(struct spi_device *spi)
                 ret = devm_gpio_request_one(&spi->dev, pdata->reset_gpio,
                                 GPIOF_DIR_OUT | (!pdata->reset_inverted ?
                                 GPIOF_INIT_HIGH : GPIOF_INIT_LOW),
-                                "LMS285GF05 RESET");
+                                "LMS283GF05 RESET");
                 if (ret)
                         return ret;
         }
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 2201b8c78641..746eebc411df 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -387,6 +387,31 @@ int pwm_backlight_brightness_default(struct device *dev,
 }
 #endif
 
+static bool pwm_backlight_is_linear(struct platform_pwm_backlight_data *data)
+{
+        unsigned int nlevels = data->max_brightness + 1;
+        unsigned int min_val = data->levels[0];
+        unsigned int max_val = data->levels[nlevels - 1];
+        /*
+         * Multiplying by 128 means that even in pathological cases such
+         * as (max_val - min_val) == nlevels the error at max_val is less
+         * than 1%.
+         */
+        unsigned int slope = (128 * (max_val - min_val)) / nlevels;
+        unsigned int margin = (max_val - min_val) / 20; /* 5% */
+        int i;
+
+        for (i = 1; i < nlevels; i++) {
+                unsigned int linear_value = min_val + ((i * slope) / 128);
+                unsigned int delta = abs(linear_value - data->levels[i]);
+
+                if (delta > margin)
+                        return false;
+        }
+
+        return true;
+}
+
 static int pwm_backlight_initial_power_state(const struct pwm_bl_data *pb)
 {
         struct device_node *node = pb->dev->of_node;
@@ -536,6 +561,8 @@ static int pwm_backlight_probe(struct platform_device *pdev)
                 goto err_alloc;
         }
 
+        memset(&props, 0, sizeof(struct backlight_properties));
+
         if (data->levels) {
                 /*
                  * For the DT case, only when brightness levels is defined
@@ -548,6 +575,11 @@ static int pwm_backlight_probe(struct platform_device *pdev)
 
                         pb->levels = data->levels;
                 }
+
+                if (pwm_backlight_is_linear(data))
+                        props.scale = BACKLIGHT_SCALE_LINEAR;
+                else
+                        props.scale = BACKLIGHT_SCALE_NON_LINEAR;
         } else if (!data->max_brightness) {
                 /*
                  * If no brightness levels are provided and max_brightness is
@@ -574,6 +606,8 @@ static int pwm_backlight_probe(struct platform_device *pdev)
 
                         pb->levels = data->levels;
                 }
+
+                props.scale = BACKLIGHT_SCALE_NON_LINEAR;
         } else {
                 /*
                  * That only happens for the non-DT case, where platform data
@@ -584,7 +618,6 @@ static int pwm_backlight_probe(struct platform_device *pdev)
 
         pb->lth_brightness = data->lth_brightness * (state.period / pb->scale);
 
-        memset(&props, 0, sizeof(struct backlight_properties));
         props.type = BACKLIGHT_RAW;
         props.max_brightness = data->max_brightness;
         bl = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, pb,
diff --git a/drivers/video/backlight/rave-sp-backlight.c b/drivers/video/backlight/rave-sp-backlight.c
index 462f14a1b19d..05b5f003a3d1 100644
--- a/drivers/video/backlight/rave-sp-backlight.c
+++ b/drivers/video/backlight/rave-sp-backlight.c
@@ -48,14 +48,20 @@ static int rave_sp_backlight_probe(struct platform_device *pdev)
         struct device *dev = &pdev->dev;
         struct backlight_device *bd;
 
-        bd = devm_backlight_device_register(dev, pdev->name, dev->parent,
+        bd = devm_backlight_device_register(dev, pdev->name, dev,
                                             dev_get_drvdata(dev->parent),
                                             &rave_sp_backlight_ops,
                                             &rave_sp_backlight_props);
         if (IS_ERR(bd))
                 return PTR_ERR(bd);
 
-        backlight_update_status(bd);
+        /*
+         * If there is a phandle pointing to the device node we can
+         * assume that another device will manage the status changes.
+         * If not we make sure the backlight is in a consistent state.
+         */
+        if (!dev->of_node->phandle)
+                backlight_update_status(bd);
 
         return 0;
 }
diff --git a/drivers/video/backlight/tosa_lcd.c b/drivers/video/backlight/tosa_lcd.c
index 65cb7578776f..29af8e27b6e5 100644
--- a/drivers/video/backlight/tosa_lcd.c
+++ b/drivers/video/backlight/tosa_lcd.c
@@ -222,8 +222,7 @@ static int tosa_lcd_remove(struct spi_device *spi)
 {
         struct tosa_lcd_data *data = spi_get_drvdata(spi);
 
-        if (data->i2c)
-                i2c_unregister_device(data->i2c);
+        i2c_unregister_device(data->i2c);
 
         tosa_lcd_tg_off(data);
 
diff --git a/fs/gfs2/incore.h b/fs/gfs2/incore.h
index 6b450065b9d5..5f89c515f5bb 100644
--- a/fs/gfs2/incore.h
+++ b/fs/gfs2/incore.h
@@ -584,10 +584,10 @@ struct gfs2_args {
         unsigned int ar_rgrplvb:1;              /* use lvbs for rgrp info */
         unsigned int ar_loccookie:1;            /* use location based readdir
                                                    cookies */
-        int ar_commit;                          /* Commit interval */
-        int ar_statfs_quantum;                  /* The fast statfs interval */
-        int ar_quota_quantum;                   /* The quota interval */
-        int ar_statfs_percent;                  /* The % change to force sync */
+        s32 ar_commit;                          /* Commit interval */
+        s32 ar_statfs_quantum;                  /* The fast statfs interval */
+        s32 ar_quota_quantum;                   /* The quota interval */
+        s32 ar_statfs_percent;                  /* The % change to force sync */
 };
 
 struct gfs2_tune {
diff --git a/fs/gfs2/ops_fstype.c b/fs/gfs2/ops_fstype.c
index f3fd5cd9d43f..681b44682b0d 100644
--- a/fs/gfs2/ops_fstype.c
+++ b/fs/gfs2/ops_fstype.c
@@ -21,6 +21,7 @@
 #include <linux/lockdep.h>
 #include <linux/module.h>
 #include <linux/backing-dev.h>
+#include <linux/fs_parser.h>
 
 #include "gfs2.h"
 #include "incore.h"
@@ -1031,16 +1032,17 @@ void gfs2_online_uevent(struct gfs2_sbd *sdp)
 }
 
 /**
- * fill_super - Read in superblock
+ * gfs2_fill_super - Read in superblock
  * @sb: The VFS superblock
- * @data: Mount options
+ * @args: Mount options
  * @silent: Don't complain if it's not a GFS2 filesystem
  *
- * Returns: errno
+ * Returns: -errno
  */
-
-static int fill_super(struct super_block *sb, struct gfs2_args *args, int silent)
+static int gfs2_fill_super(struct super_block *sb, struct fs_context *fc)
 {
+        struct gfs2_args *args = fc->fs_private;
+        int silent = fc->sb_flags & SB_SILENT;
         struct gfs2_sbd *sdp;
         struct gfs2_holder mount_gh;
         int error;
@@ -1205,161 +1207,411 @@ fail_debug:
         return error;
 }
 
-static int set_gfs2_super(struct super_block *s, void *data)
+/**
+ * gfs2_get_tree - Get the GFS2 superblock and root directory
+ * @fc: The filesystem context
+ *
+ * Returns: 0 or -errno on error
+ */
+static int gfs2_get_tree(struct fs_context *fc)
 {
-        s->s_bdev = data;
-        s->s_dev = s->s_bdev->bd_dev;
-        s->s_bdi = bdi_get(s->s_bdev->bd_bdi);
+        struct gfs2_args *args = fc->fs_private;
+        struct gfs2_sbd *sdp;
+        int error;
+
+        error = get_tree_bdev(fc, gfs2_fill_super);
+        if (error)
+                return error;
+
+        sdp = fc->root->d_sb->s_fs_info;
+        dput(fc->root);
+        if (args->ar_meta)
+                fc->root = dget(sdp->sd_master_dir);
+        else
+                fc->root = dget(sdp->sd_root_dir);
         return 0;
 }
 
-static int test_gfs2_super(struct super_block *s, void *ptr)
+static void gfs2_fc_free(struct fs_context *fc)
 {
-        struct block_device *bdev = ptr;
-        return (bdev == s->s_bdev);
+        struct gfs2_args *args = fc->fs_private;
+
+        kfree(args);
 }
 
-/**
- * gfs2_mount - Get the GFS2 superblock
- * @fs_type: The GFS2 filesystem type
- * @flags: Mount flags
- * @dev_name: The name of the device
- * @data: The mount arguments
- *
- * Q. Why not use get_sb_bdev() ?
- * A. We need to select one of two root directories to mount, independent
- *    of whether this is the initial, or subsequent, mount of this sb
- *
- * Returns: 0 or -ve on error
- */
+enum gfs2_param {
+        Opt_lockproto,
+        Opt_locktable,
+        Opt_hostdata,
+        Opt_spectator,
+        Opt_ignore_local_fs,
+        Opt_localflocks,
+        Opt_localcaching,
+        Opt_debug,
+        Opt_upgrade,
+        Opt_acl,
+        Opt_quota,
+        Opt_suiddir,
+        Opt_data,
+        Opt_meta,
+        Opt_discard,
+        Opt_commit,
+        Opt_errors,
+        Opt_statfs_quantum,
+        Opt_statfs_percent,
+        Opt_quota_quantum,
+        Opt_barrier,
+        Opt_rgrplvb,
+        Opt_loccookie,
+};
 
-static struct dentry *gfs2_mount(struct file_system_type *fs_type, int flags,
-                       const char *dev_name, void *data)
-{
-        struct block_device *bdev;
-        struct super_block *s;
-        fmode_t mode = FMODE_READ | FMODE_EXCL;
-        int error;
-        struct gfs2_args args;
-        struct gfs2_sbd *sdp;
+enum opt_quota {
+        Opt_quota_unset = 0,
+        Opt_quota_off,
+        Opt_quota_account,
+        Opt_quota_on,
+};
+
+static const unsigned int opt_quota_values[] = {
+        [Opt_quota_off]     = GFS2_QUOTA_OFF,
+        [Opt_quota_account] = GFS2_QUOTA_ACCOUNT,
+        [Opt_quota_on]      = GFS2_QUOTA_ON,
+};
 
-        if (!(flags & SB_RDONLY))
-                mode |= FMODE_WRITE;
+enum opt_data {
+        Opt_data_writeback = GFS2_DATA_WRITEBACK,
+        Opt_data_ordered   = GFS2_DATA_ORDERED,
+};
 
-        bdev = blkdev_get_by_path(dev_name, mode, fs_type);
-        if (IS_ERR(bdev))
-                return ERR_CAST(bdev);
+enum opt_errors {
+        Opt_errors_withdraw = GFS2_ERRORS_WITHDRAW,
+        Opt_errors_panic    = GFS2_ERRORS_PANIC,
+};
 
-        /*
-         * once the super is inserted into the list by sget, s_umount
-         * will protect the lockfs code from trying to start a snapshot
-         * while we are mounting
-         */
-        mutex_lock(&bdev->bd_fsfreeze_mutex);
-        if (bdev->bd_fsfreeze_count > 0) {
-                mutex_unlock(&bdev->bd_fsfreeze_mutex);
-                error = -EBUSY;
-                goto error_bdev;
-        }
-        s = sget(fs_type, test_gfs2_super, set_gfs2_super, flags, bdev);
-        mutex_unlock(&bdev->bd_fsfreeze_mutex);
-        error = PTR_ERR(s);
-        if (IS_ERR(s))
-                goto error_bdev;
-
-        if (s->s_root) {
-                /*
-                 * s_umount nests inside bd_mutex during
-                 * __invalidate_device().  blkdev_put() acquires
-                 * bd_mutex and can't be called under s_umount.  Drop
-                 * s_umount temporarily.  This is safe as we're
-                 * holding an active reference.
-                 */
-                up_write(&s->s_umount);
-                blkdev_put(bdev, mode);
-                down_write(&s->s_umount);
-        } else {
-                /* s_mode must be set before deactivate_locked_super calls */
-                s->s_mode = mode;
-        }
+static const struct fs_parameter_spec gfs2_param_specs[] = {
+        fsparam_string ("lockproto",          Opt_lockproto),
+        fsparam_string ("locktable",          Opt_locktable),
+        fsparam_string ("hostdata",           Opt_hostdata),
+        fsparam_flag   ("spectator",          Opt_spectator),
+        fsparam_flag   ("norecovery",         Opt_spectator),
+        fsparam_flag   ("ignore_local_fs",    Opt_ignore_local_fs),
+        fsparam_flag   ("localflocks",        Opt_localflocks),
+        fsparam_flag   ("localcaching",       Opt_localcaching),
+        fsparam_flag_no("debug",              Opt_debug),
+        fsparam_flag   ("upgrade",            Opt_upgrade),
+        fsparam_flag_no("acl",                Opt_acl),
+        fsparam_flag_no("suiddir",            Opt_suiddir),
+        fsparam_enum   ("data",               Opt_data),
+        fsparam_flag   ("meta",               Opt_meta),
+        fsparam_flag_no("discard",            Opt_discard),
+        fsparam_s32    ("commit",             Opt_commit),
+        fsparam_enum   ("errors",             Opt_errors),
+        fsparam_s32    ("statfs_quantum",     Opt_statfs_quantum),
+        fsparam_s32    ("statfs_percent",     Opt_statfs_percent),
+        fsparam_s32    ("quota_quantum",      Opt_quota_quantum),
+        fsparam_flag_no("barrier",            Opt_barrier),
+        fsparam_flag_no("rgrplvb",            Opt_rgrplvb),
+        fsparam_flag_no("loccookie",          Opt_loccookie),
+        /* quota can be a flag or an enum so it gets special treatment */
+        __fsparam(fs_param_is_enum, "quota", Opt_quota, fs_param_neg_with_no|fs_param_v_optional),
+        {}
+};
 
-        memset(&args, 0, sizeof(args));
-        args.ar_quota = GFS2_QUOTA_DEFAULT;
-        args.ar_data = GFS2_DATA_DEFAULT;
-        args.ar_commit = 30;
-        args.ar_statfs_quantum = 30;
-        args.ar_quota_quantum = 60;
-        args.ar_errors = GFS2_ERRORS_DEFAULT;
+static const struct fs_parameter_enum gfs2_param_enums[] = {
+        { Opt_quota,    "off",        Opt_quota_off },
+        { Opt_quota,    "account",    Opt_quota_account },
+        { Opt_quota,    "on",         Opt_quota_on },
+        { Opt_data,     "writeback",  Opt_data_writeback },
+        { Opt_data,     "ordered",    Opt_data_ordered },
+        { Opt_errors,   "withdraw",   Opt_errors_withdraw },
+        { Opt_errors,   "panic",      Opt_errors_panic },
+        {}
+};
 
-        error = gfs2_mount_args(&args, data);
-        if (error) {
-                pr_warn("can't parse mount arguments\n");
-                goto error_super;
+const struct fs_parameter_description gfs2_fs_parameters = {
+        .name = "gfs2",
+        .specs = gfs2_param_specs,
+        .enums = gfs2_param_enums,
+};
+
+/* Parse a single mount parameter */
+static int gfs2_parse_param(struct fs_context *fc, struct fs_parameter *param)
+{
+        struct gfs2_args *args = fc->fs_private;
+        struct fs_parse_result result;
+        int o;
+
+        o = fs_parse(fc, &gfs2_fs_parameters, param, &result);
+        if (o < 0)
+                return o;
+
+        switch (o) {
+        case Opt_lockproto:
+                strlcpy(args->ar_lockproto, param->string, GFS2_LOCKNAME_LEN);
+                break;
+        case Opt_locktable:
+                strlcpy(args->ar_locktable, param->string, GFS2_LOCKNAME_LEN);
+                break;
+        case Opt_hostdata:
+                strlcpy(args->ar_hostdata, param->string, GFS2_LOCKNAME_LEN);
+                break;
+        case Opt_spectator:
+                args->ar_spectator = 1;
+                break;
+        case Opt_ignore_local_fs:
+                /* Retained for backwards compat only */
+                break;
+        case Opt_localflocks:
+                args->ar_localflocks = 1;
+                break;
+        case Opt_localcaching:
+                /* Retained for backwards compat only */
+                break;
+        case Opt_debug:
+                if (result.boolean && args->ar_errors == GFS2_ERRORS_PANIC)
+                        return invalf(fc, "gfs2: -o debug and -o errors=panic are mutually exclusive");
+                args->ar_debug = result.boolean;
+                break;
+        case Opt_upgrade:
+                /* Retained for backwards compat only */
+                break;
+        case Opt_acl:
+                args->ar_posix_acl = result.boolean;
+                break;
+        case Opt_quota:
+                /* The quota option can be a flag or an enum. A non-zero int_32
+                   result means that we have an enum index. Otherwise we have
+                   to rely on the 'negated' flag to tell us whether 'quota' or
+                   'noquota' was specified. */
+                if (result.negated)
+                        args->ar_quota = GFS2_QUOTA_OFF;
+                else if (result.int_32 > 0)
+                        args->ar_quota = opt_quota_values[result.int_32];
+                else
+                        args->ar_quota = GFS2_QUOTA_ON;
+                break;
+        case Opt_suiddir:
+                args->ar_suiddir = result.boolean;
+                break;
+        case Opt_data:
+                /* The uint_32 result maps directly to GFS2_DATA_* */
+                args->ar_data = result.uint_32;
+                break;
+        case Opt_meta:
+                args->ar_meta = 1;
+                break;
+        case Opt_discard:
+                args->ar_discard = result.boolean;
+                break;
+        case Opt_commit:
+                if (result.int_32 <= 0)
+                        return invalf(fc, "gfs2: commit mount option requires a positive numeric argument");
+                args->ar_commit = result.int_32;
+                break;
+        case Opt_statfs_quantum:
+                if (result.int_32 < 0)
+                        return invalf(fc, "gfs2: statfs_quantum mount option requires a non-negative numeric argument");
+                args->ar_statfs_quantum = result.int_32;
+                break;
+        case Opt_quota_quantum:
+                if (result.int_32 <= 0)
+                        return invalf(fc, "gfs2: quota_quantum mount option requires a positive numeric argument");
+                args->ar_quota_quantum = result.int_32;
+                break;
+        case Opt_statfs_percent:
+                if (result.int_32 < 0 || result.int_32 > 100)
+                        return invalf(fc, "gfs2: statfs_percent mount option requires a numeric argument between 0 and 100");
+                args->ar_statfs_percent = result.int_32;
+                break;
+        case Opt_errors:
+                if (args->ar_debug && result.uint_32 == GFS2_ERRORS_PANIC)
+                        return invalf(fc, "gfs2: -o debug and -o errors=panic are mutually exclusive");
+                args->ar_errors = result.uint_32;
+                break;
+        case Opt_barrier:
+                args->ar_nobarrier = result.boolean;
+                break;
+        case Opt_rgrplvb:
+                args->ar_rgrplvb = result.boolean;
+                break;
+        case Opt_loccookie:
+                args->ar_loccookie = result.boolean;
+                break;
+        default:
+                return invalf(fc, "gfs2: invalid mount option: %s", param->key);
         }
+        return 0;
+}
 
-        if (s->s_root) {
-                error = -EBUSY;
-                if ((flags ^ s->s_flags) & SB_RDONLY)
-                        goto error_super;
-        } else {
-                snprintf(s->s_id, sizeof(s->s_id), "%pg", bdev);
-                sb_set_blocksize(s, block_size(bdev));
-                error = fill_super(s, &args, flags & SB_SILENT ? 1 : 0);
-                if (error)
-                        goto error_super;
-                s->s_flags |= SB_ACTIVE;
-                bdev->bd_super = s;
+static int gfs2_reconfigure(struct fs_context *fc)
+{
+        struct super_block *sb = fc->root->d_sb;
+        struct gfs2_sbd *sdp = sb->s_fs_info;
+        struct gfs2_args *oldargs = &sdp->sd_args;
+        struct gfs2_args *newargs = fc->fs_private;
+        struct gfs2_tune *gt = &sdp->sd_tune;
+        int error = 0;
+
+        sync_filesystem(sb);
+
+        spin_lock(&gt->gt_spin);
+        oldargs->ar_commit = gt->gt_logd_secs;
+        oldargs->ar_quota_quantum = gt->gt_quota_quantum;
+        if (gt->gt_statfs_slow)
+                oldargs->ar_statfs_quantum = 0;
+        else
+                oldargs->ar_statfs_quantum = gt->gt_statfs_quantum;
+        spin_unlock(&gt->gt_spin);
+
+        if (strcmp(newargs->ar_lockproto, oldargs->ar_lockproto)) {
+                errorf(fc, "gfs2: reconfiguration of locking protocol not allowed");
+                return -EINVAL;
+        }
+        if (strcmp(newargs->ar_locktable, oldargs->ar_locktable)) {
+                errorf(fc, "gfs2: reconfiguration of lock table not allowed");
+                return -EINVAL;
+        }
+        if (strcmp(newargs->ar_hostdata, oldargs->ar_hostdata)) {
+                errorf(fc, "gfs2: reconfiguration of host data not allowed");
+                return -EINVAL;
+        }
+        if (newargs->ar_spectator != oldargs->ar_spectator) {
+                errorf(fc, "gfs2: reconfiguration of spectator mode not allowed");
+                return -EINVAL;
+        }
+        if (newargs->ar_localflocks != oldargs->ar_localflocks) {
+                errorf(fc, "gfs2: reconfiguration of localflocks not allowed");
+                return -EINVAL;
+        }
+        if (newargs->ar_meta != oldargs->ar_meta) {
+                errorf(fc, "gfs2: switching between gfs2 and gfs2meta not allowed");
+                return -EINVAL;
+        }
+        if (oldargs->ar_spectator)
+                fc->sb_flags |= SB_RDONLY;
+
+        if ((sb->s_flags ^ fc->sb_flags) & SB_RDONLY) {
+                if (fc->sb_flags & SB_RDONLY) {
+                        error = gfs2_make_fs_ro(sdp);
+                        if (error)
+                                errorf(fc, "gfs2: unable to remount read-only");
+                } else {
+                        error = gfs2_make_fs_rw(sdp);
+                        if (error)
+                                errorf(fc, "gfs2: unable to remount read-write");
+                }
         }
+        sdp->sd_args = *newargs;
 
-        sdp = s->s_fs_info;
-        if (args.ar_meta)
-                return dget(sdp->sd_master_dir);
+        if (sdp->sd_args.ar_posix_acl)
+                sb->s_flags |= SB_POSIXACL;
+        else
+                sb->s_flags &= ~SB_POSIXACL;
+        if (sdp->sd_args.ar_nobarrier)
+                set_bit(SDF_NOBARRIERS, &sdp->sd_flags);
         else
-                return dget(sdp->sd_root_dir);
-
-error_super:
-        deactivate_locked_super(s);
-        return ERR_PTR(error);
-error_bdev:
-        blkdev_put(bdev, mode);
-        return ERR_PTR(error);
+                clear_bit(SDF_NOBARRIERS, &sdp->sd_flags);
+        spin_lock(&gt->gt_spin);
+        gt->gt_logd_secs = newargs->ar_commit;
+        gt->gt_quota_quantum = newargs->ar_quota_quantum;
+        if (newargs->ar_statfs_quantum) {
+                gt->gt_statfs_slow = 0;
+                gt->gt_statfs_quantum = newargs->ar_statfs_quantum;
+        }
+        else {
+                gt->gt_statfs_slow = 1;
+                gt->gt_statfs_quantum = 30;
+        }
+        spin_unlock(&gt->gt_spin);
+
+        gfs2_online_uevent(sdp);
+        return error;
+}
+
+static const struct fs_context_operations gfs2_context_ops = {
+        .free        = gfs2_fc_free,
+        .parse_param = gfs2_parse_param,
+        .get_tree    = gfs2_get_tree,
+        .reconfigure = gfs2_reconfigure,
+};
+
+/* Set up the filesystem mount context */
+static int gfs2_init_fs_context(struct fs_context *fc)
+{
+        struct gfs2_args *args;
+
+        args = kzalloc(sizeof(*args), GFP_KERNEL);
+        if (args == NULL)
+                return -ENOMEM;
+
+        args->ar_quota = GFS2_QUOTA_DEFAULT;
+        args->ar_data = GFS2_DATA_DEFAULT;
+        args->ar_commit = 30;
+        args->ar_statfs_quantum = 30;
+        args->ar_quota_quantum = 60;
+        args->ar_errors = GFS2_ERRORS_DEFAULT;
+
+        fc->fs_private = args;
+        fc->ops = &gfs2_context_ops;
+        return 0;
 }
 
-static int set_meta_super(struct super_block *s, void *ptr)
+static int set_meta_super(struct super_block *s, struct fs_context *fc)
 {
         return -EINVAL;
 }
 
-static struct dentry *gfs2_mount_meta(struct file_system_type *fs_type,
-                        int flags, const char *dev_name, void *data)
+static int test_meta_super(struct super_block *s, struct fs_context *fc)
+{
+        return (fc->sget_key == s->s_bdev);
+}
+
+static int gfs2_meta_get_tree(struct fs_context *fc)
 {
         struct super_block *s;
         struct gfs2_sbd *sdp;
         struct path path;
         int error;
 
-        if (!dev_name || !*dev_name)
-                return ERR_PTR(-EINVAL);
+        if (!fc->source || !*fc->source)
+                return -EINVAL;
 
-        error = kern_path(dev_name, LOOKUP_FOLLOW, &path);
+        error = kern_path(fc->source, LOOKUP_FOLLOW, &path);
         if (error) {
                 pr_warn("path_lookup on %s returned error %d\n",
-                        dev_name, error);
-                return ERR_PTR(error);
+                        fc->source, error);
+                return error;
         }
-        s = sget(&gfs2_fs_type, test_gfs2_super, set_meta_super, flags,
-                 path.dentry->d_sb->s_bdev);
+        fc->fs_type = &gfs2_fs_type;
+        fc->sget_key = path.dentry->d_sb->s_bdev;
+        s = sget_fc(fc, test_meta_super, set_meta_super);
         path_put(&path);
         if (IS_ERR(s)) {
                 pr_warn("gfs2 mount does not exist\n");
-                return ERR_CAST(s);
+                return PTR_ERR(s);
         }
-        if ((flags ^ s->s_flags) & SB_RDONLY) {
+        if ((fc->sb_flags ^ s->s_flags) & SB_RDONLY) {
                 deactivate_locked_super(s);
-                return ERR_PTR(-EBUSY);
+                return -EBUSY;
         }
         sdp = s->s_fs_info;
-        return dget(sdp->sd_master_dir);
+        fc->root = dget(sdp->sd_master_dir);
+        return 0;
+}
+
+static const struct fs_context_operations gfs2_meta_context_ops = {
+        .get_tree    = gfs2_meta_get_tree,
+};
+
+static int gfs2_meta_init_fs_context(struct fs_context *fc)
+{
+        int ret = gfs2_init_fs_context(fc);
+
+        if (ret)
+                return ret;
+
+        fc->ops = &gfs2_meta_context_ops;
+        return 0;
 }
 
 static void gfs2_kill_sb(struct super_block *sb)
@@ -1383,7 +1635,8 @@ static void gfs2_kill_sb(struct super_block *sb)
 struct file_system_type gfs2_fs_type = {
         .name = "gfs2",
         .fs_flags = FS_REQUIRES_DEV,
-        .mount = gfs2_mount,
+        .init_fs_context = gfs2_init_fs_context,
+        .parameters = &gfs2_fs_parameters,
         .kill_sb = gfs2_kill_sb,
         .owner = THIS_MODULE,
 };
@@ -1392,7 +1645,7 @@ MODULE_ALIAS_FS("gfs2");
 struct file_system_type gfs2meta_fs_type = {
         .name = "gfs2meta",
         .fs_flags = FS_REQUIRES_DEV,
-        .mount = gfs2_mount_meta,
+        .init_fs_context = gfs2_meta_init_fs_context,
         .owner = THIS_MODULE,
 };
 MODULE_ALIAS_FS("gfs2meta");
diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c
index 644c70ae09f7..5fa1eec4fb4f 100644
--- a/fs/gfs2/super.c
+++ b/fs/gfs2/super.c
@@ -44,258 +44,6 @@
 #include "xattr.h"
 #include "lops.h"
 
-#define args_neq(a1, a2, x) ((a1)->ar_##x != (a2)->ar_##x)
-
-enum {
-        Opt_lockproto,
-        Opt_locktable,
-        Opt_hostdata,
-        Opt_spectator,
-        Opt_ignore_local_fs,
-        Opt_localflocks,
-        Opt_localcaching,
-        Opt_debug,
-        Opt_nodebug,
-        Opt_upgrade,
-        Opt_acl,
-        Opt_noacl,
-        Opt_quota_off,
-        Opt_quota_account,
-        Opt_quota_on,
-        Opt_quota,
-        Opt_noquota,
-        Opt_suiddir,
-        Opt_nosuiddir,
-        Opt_data_writeback,
-        Opt_data_ordered,
-        Opt_meta,
-        Opt_discard,
-        Opt_nodiscard,
-        Opt_commit,
-        Opt_err_withdraw,
-        Opt_err_panic,
-        Opt_statfs_quantum,
-        Opt_statfs_percent,
-        Opt_quota_quantum,
-        Opt_barrier,
-        Opt_nobarrier,
-        Opt_rgrplvb,
-        Opt_norgrplvb,
-        Opt_loccookie,
-        Opt_noloccookie,
-        Opt_error,
-};
-
-static const match_table_t tokens = {
-        {Opt_lockproto, "lockproto=%s"},
-        {Opt_locktable, "locktable=%s"},
-        {Opt_hostdata, "hostdata=%s"},
-        {Opt_spectator, "spectator"},
-        {Opt_spectator, "norecovery"},
-        {Opt_ignore_local_fs, "ignore_local_fs"},
-        {Opt_localflocks, "localflocks"},
-        {Opt_localcaching, "localcaching"},
-        {Opt_debug, "debug"},
-        {Opt_nodebug, "nodebug"},
-        {Opt_upgrade, "upgrade"},
-        {Opt_acl, "acl"},
-        {Opt_noacl, "noacl"},
-        {Opt_quota_off, "quota=off"},
-        {Opt_quota_account, "quota=account"},
-        {Opt_quota_on, "quota=on"},
-        {Opt_quota, "quota"},
-        {Opt_noquota, "noquota"},
-        {Opt_suiddir, "suiddir"},
-        {Opt_nosuiddir, "nosuiddir"},
-        {Opt_data_writeback, "data=writeback"},
-        {Opt_data_ordered, "data=ordered"},
-        {Opt_meta, "meta"},
-        {Opt_discard, "discard"},
-        {Opt_nodiscard, "nodiscard"},
-        {Opt_commit, "commit=%d"},
-        {Opt_err_withdraw, "errors=withdraw"},
-        {Opt_err_panic, "errors=panic"},
-        {Opt_statfs_quantum, "statfs_quantum=%d"},
-        {Opt_statfs_percent, "statfs_percent=%d"},
-        {Opt_quota_quantum, "quota_quantum=%d"},
-        {Opt_barrier, "barrier"},
-        {Opt_nobarrier, "nobarrier"},
-        {Opt_rgrplvb, "rgrplvb"},
-        {Opt_norgrplvb, "norgrplvb"},
-        {Opt_loccookie, "loccookie"},
-        {Opt_noloccookie, "noloccookie"},
-        {Opt_error, NULL}
-};
-
-/**
- * gfs2_mount_args - Parse mount options
- * @args: The structure into which the parsed options will be written
- * @options: The options to parse
- *
- * Return: errno
- */
-
-int gfs2_mount_args(struct gfs2_args *args, char *options)
-{
-        char *o;
-        int token;
-        substring_t tmp[MAX_OPT_ARGS];
-        int rv;
-
-        /* Split the options into tokens with the "," character and
-           process them */
-
-        while (1) {
-                o = strsep(&options, ",");
-                if (o == NULL)
-                        break;
-                if (*o == '\0')
-                        continue;
-
-                token = match_token(o, tokens, tmp);
-                switch (token) {
-                case Opt_lockproto:
-                        match_strlcpy(args->ar_lockproto, &tmp[0],
-                                      GFS2_LOCKNAME_LEN);
-                        break;
-                case Opt_locktable:
-                        match_strlcpy(args->ar_locktable, &tmp[0],
-                                      GFS2_LOCKNAME_LEN);
-                        break;
-                case Opt_hostdata:
-                        match_strlcpy(args->ar_hostdata, &tmp[0],
-                                      GFS2_LOCKNAME_LEN);
-                        break;
-                case Opt_spectator:
-                        args->ar_spectator = 1;
-                        break;
-                case Opt_ignore_local_fs:
-                        /* Retained for backwards compat only */
-                        break;
-                case Opt_localflocks:
-                        args->ar_localflocks = 1;
-                        break;
-                case Opt_localcaching:
-                        /* Retained for backwards compat only */
-                        break;
-                case Opt_debug:
-                        if (args->ar_errors == GFS2_ERRORS_PANIC) {
-                                pr_warn("-o debug and -o errors=panic are mutually exclusive\n");
-                                return -EINVAL;
-                        }
-                        args->ar_debug = 1;
-                        break;
-                case Opt_nodebug:
-                        args->ar_debug = 0;
-                        break;
-                case Opt_upgrade:
-                        /* Retained for backwards compat only */
-                        break;
-                case Opt_acl:
-                        args->ar_posix_acl = 1;
-                        break;
-                case Opt_noacl:
-                        args->ar_posix_acl = 0;
-                        break;
-                case Opt_quota_off:
-                case Opt_noquota:
-                        args->ar_quota = GFS2_QUOTA_OFF;
-                        break;
-                case Opt_quota_account:
-                        args->ar_quota = GFS2_QUOTA_ACCOUNT;
-                        break;
-                case Opt_quota_on:
-                case Opt_quota:
-                        args->ar_quota = GFS2_QUOTA_ON;
-                        break;
-                case Opt_suiddir:
-                        args->ar_suiddir = 1;
-                        break;
-                case Opt_nosuiddir:
-                        args->ar_suiddir = 0;
-                        break;
-                case Opt_data_writeback:
-                        args->ar_data = GFS2_DATA_WRITEBACK;
-                        break;
-                case Opt_data_ordered:
-                        args->ar_data = GFS2_DATA_ORDERED;
-                        break;
-                case Opt_meta:
-                        args->ar_meta = 1;
-                        break;
-                case Opt_discard:
-                        args->ar_discard = 1;
-                        break;
-                case Opt_nodiscard:
-                        args->ar_discard = 0;
-                        break;
-                case Opt_commit:
-                        rv = match_int(&tmp[0], &args->ar_commit);
-                        if (rv || args->ar_commit <= 0) {
-                                pr_warn("commit mount option requires a positive numeric argument\n");
-                                return rv ? rv : -EINVAL;
-                        }
-                        break;
-                case Opt_statfs_quantum:
-                        rv = match_int(&tmp[0], &args->ar_statfs_quantum);
-                        if (rv || args->ar_statfs_quantum < 0) {
-                                pr_warn("statfs_quantum mount option requires a non-negative numeric argument\n");
-                                return rv ? rv : -EINVAL;
-                        }
-                        break;
-                case Opt_quota_quantum:
-                        rv = match_int(&tmp[0], &args->ar_quota_quantum);
-                        if (rv || args->ar_quota_quantum <= 0) {
-                                pr_warn("quota_quantum mount option requires a positive numeric argument\n");
-                                return rv ? rv : -EINVAL;
-                        }
-                        break;
-                case Opt_statfs_percent:
-                        rv = match_int(&tmp[0], &args->ar_statfs_percent);
-                        if (rv || args->ar_statfs_percent < 0 ||
-                            args->ar_statfs_percent > 100) {
-                                pr_warn("statfs_percent mount option requires a numeric argument between 0 and 100\n");
-                                return rv ? rv : -EINVAL;
-                        }
-                        break;
-                case Opt_err_withdraw:
-                        args->ar_errors = GFS2_ERRORS_WITHDRAW;
-                        break;
-                case Opt_err_panic:
-                        if (args->ar_debug) {
-                                pr_warn("-o debug and -o errors=panic are mutually exclusive\n");
-                                return -EINVAL;
-                        }
-                        args->ar_errors = GFS2_ERRORS_PANIC;
-                        break;
-                case Opt_barrier:
-                        args->ar_nobarrier = 0;
-                        break;
-                case Opt_nobarrier:
-                        args->ar_nobarrier = 1;
-                        break;
-                case Opt_rgrplvb:
-                        args->ar_rgrplvb = 1;
-                        break;
-                case Opt_norgrplvb:
-                        args->ar_rgrplvb = 0;
-                        break;
-                case Opt_loccookie:
-                        args->ar_loccookie = 1;
-                        break;
-                case Opt_noloccookie:
-                        args->ar_loccookie = 0;
-                        break;
-                case Opt_error:
-                default:
-                        pr_warn("invalid mount option: %s\n", o);
-                        return -EINVAL;
-                }
-        }
-
-        return 0;
-}
-
 /**
  * gfs2_jindex_free - Clear all the journal index information
  * @sdp: The GFS2 superblock
@@ -847,7 +595,7 @@ out:
  * Returns: errno
  */
 
-static int gfs2_make_fs_ro(struct gfs2_sbd *sdp)
+int gfs2_make_fs_ro(struct gfs2_sbd *sdp)
 {
         struct gfs2_holder freeze_gh;
         int error;
@@ -1227,84 +975,6 @@ static int gfs2_statfs(struct dentry *dentry, struct kstatfs *buf)
 }
 
 /**
- * gfs2_remount_fs - called when the FS is remounted
- * @sb:  the filesystem
- * @flags:  the remount flags
- * @data:  extra data passed in (not used right now)
- *
- * Returns: errno
- */
-
-static int gfs2_remount_fs(struct super_block *sb, int *flags, char *data)
-{
-        struct gfs2_sbd *sdp = sb->s_fs_info;
-        struct gfs2_args args = sdp->sd_args; /* Default to current settings */
-        struct gfs2_tune *gt = &sdp->sd_tune;
-        int error;
-
-        sync_filesystem(sb);
-
-        spin_lock(&gt->gt_spin);
-        args.ar_commit = gt->gt_logd_secs;
-        args.ar_quota_quantum = gt->gt_quota_quantum;
-        if (gt->gt_statfs_slow)
-                args.ar_statfs_quantum = 0;
-        else
-                args.ar_statfs_quantum = gt->gt_statfs_quantum;
-        spin_unlock(&gt->gt_spin);
-        error = gfs2_mount_args(&args, data);
-        if (error)
-                return error;
-
-        /* Not allowed to change locking details */
-        if (strcmp(args.ar_lockproto, sdp->sd_args.ar_lockproto) ||
-            strcmp(args.ar_locktable, sdp->sd_args.ar_locktable) ||
-            strcmp(args.ar_hostdata, sdp->sd_args.ar_hostdata))
-                return -EINVAL;
-
-        /* Some flags must not be changed */
-        if (args_neq(&args, &sdp->sd_args, spectator) ||
-            args_neq(&args, &sdp->sd_args, localflocks) ||
-            args_neq(&args, &sdp->sd_args, meta))
-                return -EINVAL;
-
-        if (sdp->sd_args.ar_spectator)
-                *flags |= SB_RDONLY;
-
-        if ((sb->s_flags ^ *flags) & SB_RDONLY) {
-                if (*flags & SB_RDONLY)
-                        error = gfs2_make_fs_ro(sdp);
-                else
-                        error = gfs2_make_fs_rw(sdp);
-        }
-
-        sdp->sd_args = args;
-        if (sdp->sd_args.ar_posix_acl)
-                sb->s_flags |= SB_POSIXACL;
-        else
-                sb->s_flags &= ~SB_POSIXACL;
-        if (sdp->sd_args.ar_nobarrier)
-                set_bit(SDF_NOBARRIERS, &sdp->sd_flags);
-        else
-                clear_bit(SDF_NOBARRIERS, &sdp->sd_flags);
-        spin_lock(&gt->gt_spin);
-        gt->gt_logd_secs = args.ar_commit;
-        gt->gt_quota_quantum = args.ar_quota_quantum;
-        if (args.ar_statfs_quantum) {
-                gt->gt_statfs_slow = 0;
-                gt->gt_statfs_quantum = args.ar_statfs_quantum;
-        }
-        else {
-                gt->gt_statfs_slow = 1;
-                gt->gt_statfs_quantum = 30;
-        }
-        spin_unlock(&gt->gt_spin);
-
-        gfs2_online_uevent(sdp);
-        return error;
-}
-
-/**
  * gfs2_drop_inode - Drop an inode (test for remote unlink)
  * @inode: The inode to drop
  *
@@ -1748,7 +1418,6 @@ const struct super_operations gfs2_super_ops = {
         .freeze_super           = gfs2_freeze,
         .thaw_super             = gfs2_unfreeze,
         .statfs                 = gfs2_statfs,
-        .remount_fs             = gfs2_remount_fs,
         .drop_inode             = gfs2_drop_inode,
         .show_options           = gfs2_show_options,
 };
diff --git a/fs/gfs2/super.h b/fs/gfs2/super.h
index 9d49eaadb9d9..b8bf811a1305 100644
--- a/fs/gfs2/super.h
+++ b/fs/gfs2/super.h
@@ -24,8 +24,6 @@ static inline unsigned int gfs2_jindex_size(struct gfs2_sbd *sdp)
 
 extern void gfs2_jindex_free(struct gfs2_sbd *sdp);
 
-extern int gfs2_mount_args(struct gfs2_args *args, char *data);
-
 extern struct gfs2_jdesc *gfs2_jdesc_find(struct gfs2_sbd *sdp, unsigned int jid);
 extern int gfs2_jdesc_check(struct gfs2_jdesc *jd);
 
@@ -33,6 +31,7 @@ extern int gfs2_lookup_in_master_dir(struct gfs2_sbd *sdp, char *filename,
                                      struct gfs2_inode **ipp);
 
 extern int gfs2_make_fs_rw(struct gfs2_sbd *sdp);
+extern int gfs2_make_fs_ro(struct gfs2_sbd *sdp);
 extern void gfs2_online_uevent(struct gfs2_sbd *sdp);
 extern int gfs2_statfs_init(struct gfs2_sbd *sdp);
 extern void gfs2_statfs_change(struct gfs2_sbd *sdp, s64 total, s64 free,
diff --git a/fs/notify/dnotify/dnotify.c b/fs/notify/dnotify/dnotify.c
index c03758c91481..7a42c2ebe28d 100644
--- a/fs/notify/dnotify/dnotify.c
+++ b/fs/notify/dnotify/dnotify.c
@@ -13,6 +13,7 @@
 #include <linux/sched/signal.h>
 #include <linux/dnotify.h>
 #include <linux/init.h>
+#include <linux/security.h>
 #include <linux/spinlock.h>
 #include <linux/slab.h>
 #include <linux/fdtable.h>
@@ -279,6 +280,17 @@ int fcntl_dirnotify(int fd, struct file *filp, unsigned long arg)
                 goto out_err;
         }
 
+        /*
+         * convert the userspace DN_* "arg" to the internal FS_*
+         * defined in fsnotify
+         */
+        mask = convert_arg(arg);
+
+        error = security_path_notify(&filp->f_path, mask,
+                        FSNOTIFY_OBJ_TYPE_INODE);
+        if (error)
+                goto out_err;
+
         /* expect most fcntl to add new rather than augment old */
         dn = kmem_cache_alloc(dnotify_struct_cache, GFP_KERNEL);
         if (!dn) {
@@ -293,9 +305,6 @@ int fcntl_dirnotify(int fd, struct file *filp, unsigned long arg)
                 goto out_err;
         }
 
-        /* convert the userspace DN_* "arg" to the internal FS_* defines in fsnotify */
-        mask = convert_arg(arg);
-
         /* set up the new_fsn_mark and new_dn_mark */
         new_fsn_mark = &new_dn_mark->fsn_mark;
         fsnotify_init_mark(new_fsn_mark, dnotify_group);
diff --git a/fs/notify/fanotify/fanotify_user.c b/fs/notify/fanotify/fanotify_user.c
index 91006f47e420..8508ab575017 100644
--- a/fs/notify/fanotify/fanotify_user.c
+++ b/fs/notify/fanotify/fanotify_user.c
@@ -528,7 +528,8 @@ static const struct file_operations fanotify_fops = {
 };
 
 static int fanotify_find_path(int dfd, const char __user *filename,
-                              struct path *path, unsigned int flags)
+                              struct path *path, unsigned int flags, __u64 mask,
+                              unsigned int obj_type)
 {
         int ret;
 
@@ -567,8 +568,15 @@ static int fanotify_find_path(int dfd, const char __user *filename,
 
         /* you can only watch an inode if you have read permissions on it */
         ret = inode_permission(path->dentry->d_inode, MAY_READ);
+        if (ret) {
+                path_put(path);
+                goto out;
+        }
+
+        ret = security_path_notify(path, mask, obj_type);
         if (ret)
                 path_put(path);
+
 out:
         return ret;
 }
@@ -947,6 +955,7 @@ static int do_fanotify_mark(int fanotify_fd, unsigned int flags, __u64 mask,
         __kernel_fsid_t __fsid, *fsid = NULL;
         u32 valid_mask = FANOTIFY_EVENTS | FANOTIFY_EVENT_FLAGS;
         unsigned int mark_type = flags & FANOTIFY_MARK_TYPE_BITS;
+        unsigned int obj_type;
         int ret;
 
         pr_debug("%s: fanotify_fd=%d flags=%x dfd=%d pathname=%p mask=%llx\n",
@@ -961,8 +970,13 @@ static int do_fanotify_mark(int fanotify_fd, unsigned int flags, __u64 mask,
 
         switch (mark_type) {
         case FAN_MARK_INODE:
+                obj_type = FSNOTIFY_OBJ_TYPE_INODE;
+                break;
         case FAN_MARK_MOUNT:
+                obj_type = FSNOTIFY_OBJ_TYPE_VFSMOUNT;
+                break;
         case FAN_MARK_FILESYSTEM:
+                obj_type = FSNOTIFY_OBJ_TYPE_SB;
                 break;
         default:
                 return -EINVAL;
@@ -1030,7 +1044,8 @@ static int do_fanotify_mark(int fanotify_fd, unsigned int flags, __u64 mask,
                 goto fput_and_out;
         }
 
-        ret = fanotify_find_path(dfd, pathname, &path, flags);
+        ret = fanotify_find_path(dfd, pathname, &path, flags,
+                        (mask & ALL_FSNOTIFY_EVENTS), obj_type);
         if (ret)
                 goto fput_and_out;
 
diff --git a/fs/notify/inotify/inotify_user.c b/fs/notify/inotify/inotify_user.c
index 0b815178126e..107537a543fd 100644
--- a/fs/notify/inotify/inotify_user.c
+++ b/fs/notify/inotify/inotify_user.c
@@ -30,6 +30,7 @@
 #include <linux/poll.h>
 #include <linux/wait.h>
 #include <linux/memcontrol.h>
+#include <linux/security.h>
 
 #include "inotify.h"
 #include "../fdinfo.h"
@@ -331,7 +332,8 @@ static const struct file_operations inotify_fops = {
 /*
  * find_inode - resolve a user-given path to a specific inode
  */
-static int inotify_find_inode(const char __user *dirname, struct path *path, unsigned flags)
+static int inotify_find_inode(const char __user *dirname, struct path *path,
+                                                unsigned int flags, __u64 mask)
 {
         int error;
 
@@ -340,8 +342,15 @@ static int inotify_find_inode(const char __user *dirname, struct path *path, uns
                 return error;
         /* you can only watch an inode if you have read permissions on it */
         error = inode_permission(path->dentry->d_inode, MAY_READ);
+        if (error) {
+                path_put(path);
+                return error;
+        }
+        error = security_path_notify(path, mask,
+                                FSNOTIFY_OBJ_TYPE_INODE);
         if (error)
                 path_put(path);
+
         return error;
 }
 
@@ -733,7 +742,8 @@ SYSCALL_DEFINE3(inotify_add_watch, int, fd, const char __user *, pathname,
         if (mask & IN_ONLYDIR)
                 flags |= LOOKUP_DIRECTORY;
 
-        ret = inotify_find_inode(pathname, &path, flags);
+        ret = inotify_find_inode(pathname, &path, flags,
+                        (mask & IN_ALL_EVENTS));
         if (ret)
                 goto fput_and_out;
 
diff --git a/include/Kbuild b/include/Kbuild
index 4ae65e13c3f0..ffba79483cc5 100644
--- a/include/Kbuild
+++ b/include/Kbuild
@@ -312,7 +312,6 @@ header-test-			+= linux/mfd/as3711.h
 header-test-                    += linux/mfd/as3722.h
 header-test-                    += linux/mfd/da903x.h
 header-test-                    += linux/mfd/da9055/pdata.h
-header-test-                    += linux/mfd/da9063/pdata.h
 header-test-                    += linux/mfd/db8500-prcmu.h
 header-test-                    += linux/mfd/dbx500-prcmu.h
 header-test-                    += linux/mfd/dln2.h
diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index 0b5897446dca..c7d6b2e8c3b5 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -46,6 +46,12 @@ enum backlight_notification {
         BACKLIGHT_UNREGISTERED,
 };
 
+enum backlight_scale {
+        BACKLIGHT_SCALE_UNKNOWN = 0,
+        BACKLIGHT_SCALE_LINEAR,
+        BACKLIGHT_SCALE_NON_LINEAR,
+};
+
 struct backlight_device;
 struct fb_info;
 
@@ -80,6 +86,8 @@ struct backlight_properties {
         enum backlight_type type;
         /* Flags used to signal drivers of state changes */
         unsigned int state;
+        /* Type of the brightness scale (linear, non-linear, ...) */
+        enum backlight_scale scale;
 
 #define BL_CORE_SUSPENDED       (1 << 0)        /* backlight is suspended */
 #define BL_CORE_FBBLANK         (1 << 1)        /* backlight is under an fb blank event */
diff --git a/include/linux/cred.h b/include/linux/cred.h
index f7a30e0099be..18639c069263 100644
--- a/include/linux/cred.h
+++ b/include/linux/cred.h
@@ -386,7 +386,6 @@ static inline void put_cred(const struct cred *_cred)
 #define current_fsgid()         (current_cred_xxx(fsgid))
 #define current_cap()           (current_cred_xxx(cap_effective))
 #define current_user()          (current_cred_xxx(user))
-#define current_security()      (current_cred_xxx(security))
 
 extern struct user_namespace init_user_ns;
 #ifdef CONFIG_USER_NS
diff --git a/include/linux/hid.h b/include/linux/hid.h
index d770ab1a0479..cd41f209043f 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -1154,29 +1154,32 @@ int hid_pidff_init(struct hid_device *hid);
 #define hid_pidff_init NULL
 #endif
 
-#define dbg_hid(format, arg...)                                         \
+#define dbg_hid(fmt, ...)                                               \
 do {                                                                    \
         if (hid_debug)                                                  \
-                printk(KERN_DEBUG "%s: " format, __FILE__, ##arg);      \
+                printk(KERN_DEBUG "%s: " fmt, __FILE__, ##__VA_ARGS__); \
 } while (0)
 
-#define hid_printk(level, hid, fmt, arg...)             \
-        dev_printk(level, &(hid)->dev, fmt, ##arg)
-#define hid_emerg(hid, fmt, arg...)                     \
-        dev_emerg(&(hid)->dev, fmt, ##arg)
-#define hid_crit(hid, fmt, arg...)                      \
-        dev_crit(&(hid)->dev, fmt, ##arg)
-#define hid_alert(hid, fmt, arg...)                     \
-        dev_alert(&(hid)->dev, fmt, ##arg)
-#define hid_err(hid, fmt, arg...)                       \
-        dev_err(&(hid)->dev, fmt, ##arg)
-#define hid_notice(hid, fmt, arg...)                    \
-        dev_notice(&(hid)->dev, fmt, ##arg)
-#define hid_warn(hid, fmt, arg...)                      \
-        dev_warn(&(hid)->dev, fmt, ##arg)
-#define hid_info(hid, fmt, arg...)                      \
-        dev_info(&(hid)->dev, fmt, ##arg)
-#define hid_dbg(hid, fmt, arg...)                       \
-        dev_dbg(&(hid)->dev, fmt, ##arg)
+#define hid_err(hid, fmt, ...)                          \
+        dev_err(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_notice(hid, fmt, ...)                       \
+        dev_notice(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_warn(hid, fmt, ...)                         \
+        dev_warn(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_info(hid, fmt, ...)                         \
+        dev_info(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_dbg(hid, fmt, ...)                          \
+        dev_dbg(&(hid)->dev, fmt, ##__VA_ARGS__)
+
+#define hid_err_once(hid, fmt, ...)                     \
+        dev_err_once(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_notice_once(hid, fmt, ...)                  \
+        dev_notice_once(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_warn_once(hid, fmt, ...)                    \
+        dev_warn_once(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_info_once(hid, fmt, ...)                    \
+        dev_info_once(&(hid)->dev, fmt, ##__VA_ARGS__)
+#define hid_dbg_once(hid, fmt, ...)                     \
+        dev_dbg_once(&(hid)->dev, fmt, ##__VA_ARGS__)
 
 #endif
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 2afe6fdc1dda..b4a017093b69 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -245,7 +245,10 @@ struct vmbus_channel_offer {
                 } pipe;
         } u;
         /*
-         * The sub_channel_index is defined in win8.
+         * The sub_channel_index is defined in Win8: a value of zero means a
+         * primary channel and a value of non-zero means a sub-channel.
+         *
+         * Before Win8, the field is reserved, meaning it's always zero.
          */
         u16 sub_channel_index;
         u16 reserved3;
@@ -423,6 +426,9 @@ enum vmbus_channel_message_type {
         CHANNELMSG_COUNT
 };
 
+/* Hyper-V supports about 2048 channels, and the RELIDs start with 1. */
+#define INVALID_RELID   U32_MAX
+
 struct vmbus_channel_message_header {
         enum vmbus_channel_message_type msgtype;
         u32 padding;
@@ -934,6 +940,11 @@ static inline bool is_hvsock_channel(const struct vmbus_channel *c)
                   VMBUS_CHANNEL_TLNPI_PROVIDER_OFFER);
 }
 
+static inline bool is_sub_channel(const struct vmbus_channel *c)
+{
+        return c->offermsg.offer.sub_channel_index != 0;
+}
+
 static inline void set_channel_affinity_state(struct vmbus_channel *c,
                                               enum hv_numa_policy policy)
 {
@@ -1149,6 +1160,9 @@ struct hv_driver {
         int (*remove)(struct hv_device *);
         void (*shutdown)(struct hv_device *);
 
+        int (*suspend)(struct hv_device *);
+        int (*resume)(struct hv_device *);
+
 };
 
 /* Base device object */
diff --git a/include/linux/lsm_hooks.h b/include/linux/lsm_hooks.h
index df1318d85f7d..3fced5824aee 100644
--- a/include/linux/lsm_hooks.h
+++ b/include/linux/lsm_hooks.h
@@ -339,6 +339,9 @@
  *      Check for permission to change root directory.
  *      @path contains the path structure.
  *      Return 0 if permission is granted.
+ * @path_notify:
+ *      Check permissions before setting a watch on events as defined by @mask,
+ *      on an object at @path, whose type is defined by @obj_type.
  * @inode_readlink:
  *      Check the permission to read the symbolic link.
  *      @dentry contains the dentry structure for the file link.
@@ -1535,7 +1538,9 @@ union security_list_options {
         int (*path_chown)(const struct path *path, kuid_t uid, kgid_t gid);
         int (*path_chroot)(const struct path *path);
 #endif
-
+        /* Needed for inode based security check */
+        int (*path_notify)(const struct path *path, u64 mask,
+                                unsigned int obj_type);
         int (*inode_alloc_security)(struct inode *inode);
         void (*inode_free_security)(struct inode *inode);
         int (*inode_init_security)(struct inode *inode, struct inode *dir,
@@ -1860,6 +1865,8 @@ struct security_hook_heads {
         struct hlist_head path_chown;
         struct hlist_head path_chroot;
 #endif
+        /* Needed for inode based modules as well */
+        struct hlist_head path_notify;
         struct hlist_head inode_alloc_security;
         struct hlist_head inode_free_security;
         struct hlist_head inode_init_security;
diff --git a/include/linux/memremap.h b/include/linux/memremap.h
index fb2a0bd826b9..bef51e35d8d2 100644
--- a/include/linux/memremap.h
+++ b/include/linux/memremap.h
@@ -111,7 +111,6 @@ struct dev_pagemap {
         struct completion done;
         enum memory_type type;
         unsigned int flags;
-        u64 pci_p2pdma_bus_offset;
         const struct dev_pagemap_ops *ops;
 };
 
diff --git a/include/linux/mfd/da9063/pdata.h b/include/linux/mfd/da9063/pdata.h
deleted file mode 100644
index 085edbf7601b..000000000000
--- a/include/linux/mfd/da9063/pdata.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Platform configuration options for DA9063
- *
- * Copyright 2012 Dialog Semiconductor Ltd.
- *
- * Author: Michal Hajduk, Dialog Semiconductor
- * Author: Krystian Garbaciak, Dialog Semiconductor
- */
-
-#ifndef __MFD_DA9063_PDATA_H__
-#define __MFD_DA9063_PDATA_H__
-
-/*
- * RGB LED configuration
- */
-/* LED IDs for flags in struct led_info. */
-enum {
-        DA9063_GPIO11_LED,
-        DA9063_GPIO14_LED,
-        DA9063_GPIO15_LED,
-
-        DA9063_LED_NUM
-};
-#define DA9063_LED_ID_MASK              0x3
-
-/* LED polarity for flags in struct led_info. */
-#define DA9063_LED_HIGH_LEVEL_ACTIVE    0x0
-#define DA9063_LED_LOW_LEVEL_ACTIVE     0x4
-
-
-/*
- * General PMIC configuration
- */
-/* HWMON ADC channels configuration */
-#define DA9063_FLG_FORCE_IN0_MANUAL_MODE        0x0010
-#define DA9063_FLG_FORCE_IN0_AUTO_MODE          0x0020
-#define DA9063_FLG_FORCE_IN1_MANUAL_MODE        0x0040
-#define DA9063_FLG_FORCE_IN1_AUTO_MODE          0x0080
-#define DA9063_FLG_FORCE_IN2_MANUAL_MODE        0x0100
-#define DA9063_FLG_FORCE_IN2_AUTO_MODE          0x0200
-#define DA9063_FLG_FORCE_IN3_MANUAL_MODE        0x0400
-#define DA9063_FLG_FORCE_IN3_AUTO_MODE          0x0800
-
-/* Disable register caching. */
-#define DA9063_FLG_NO_CACHE                     0x0008
-
-struct da9063;
-
-/* DA9063 platform data */
-struct da9063_pdata {
-        int                             (*init)(struct da9063 *da9063);
-        int                             irq_base;
-        bool                            key_power;
-        unsigned                        flags;
-        struct da9063_regulators_pdata  *regulators_pdata;
-        struct led_platform_data        *leds_pdata;
-};
-
-#endif  /* __MFD_DA9063_PDATA_H__ */
diff --git a/include/linux/mfd/intel_soc_pmic_mrfld.h b/include/linux/mfd/intel_soc_pmic_mrfld.h
new file mode 100644
index 000000000000..4daecd682275
--- /dev/null
+++ b/include/linux/mfd/intel_soc_pmic_mrfld.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Header file for Intel Merrifield Basin Cove PMIC
+ *
+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_SOC_PMIC_MRFLD_H__
+#define __INTEL_SOC_PMIC_MRFLD_H__
+
+#include <linux/bits.h>
+
+#define BCOVE_ID                0x00
+
+#define BCOVE_ID_MINREV0        GENMASK(2, 0)
+#define BCOVE_ID_MAJREV0        GENMASK(5, 3)
+#define BCOVE_ID_VENDID0        GENMASK(7, 6)
+
+#define BCOVE_MINOR(x)          (unsigned int)(((x) & BCOVE_ID_MINREV0) >> 0)
+#define BCOVE_MAJOR(x)          (unsigned int)(((x) & BCOVE_ID_MAJREV0) >> 3)
+#define BCOVE_VENDOR(x)         (unsigned int)(((x) & BCOVE_ID_VENDID0) >> 6)
+
+#define BCOVE_IRQLVL1           0x01
+
+#define BCOVE_PBIRQ             0x02
+#define BCOVE_TMUIRQ            0x03
+#define BCOVE_THRMIRQ           0x04
+#define BCOVE_BCUIRQ            0x05
+#define BCOVE_ADCIRQ            0x06
+#define BCOVE_CHGRIRQ0          0x07
+#define BCOVE_CHGRIRQ1          0x08
+#define BCOVE_GPIOIRQ           0x09
+#define BCOVE_CRITIRQ           0x0B
+
+#define BCOVE_MIRQLVL1          0x0C
+
+#define BCOVE_MPBIRQ            0x0D
+#define BCOVE_MTMUIRQ           0x0E
+#define BCOVE_MTHRMIRQ          0x0F
+#define BCOVE_MBCUIRQ           0x10
+#define BCOVE_MADCIRQ           0x11
+#define BCOVE_MCHGRIRQ0         0x12
+#define BCOVE_MCHGRIRQ1         0x13
+#define BCOVE_MGPIOIRQ          0x14
+#define BCOVE_MCRITIRQ          0x16
+
+#define BCOVE_SCHGRIRQ0         0x4E
+#define BCOVE_SCHGRIRQ1         0x4F
+
+/* Level 1 IRQs */
+#define BCOVE_LVL1_PWRBTN       BIT(0)  /* power button */
+#define BCOVE_LVL1_TMU          BIT(1)  /* time management unit */
+#define BCOVE_LVL1_THRM         BIT(2)  /* thermal */
+#define BCOVE_LVL1_BCU          BIT(3)  /* burst control unit */
+#define BCOVE_LVL1_ADC          BIT(4)  /* ADC */
+#define BCOVE_LVL1_CHGR         BIT(5)  /* charger */
+#define BCOVE_LVL1_GPIO         BIT(6)  /* GPIO */
+#define BCOVE_LVL1_CRIT         BIT(7)  /* critical event */
+
+/* Level 2 IRQs: power button */
+#define BCOVE_PBIRQ_PBTN        BIT(0)
+#define BCOVE_PBIRQ_UBTN        BIT(1)
+
+/* Level 2 IRQs: ADC */
+#define BCOVE_ADCIRQ_BATTEMP    BIT(2)
+#define BCOVE_ADCIRQ_SYSTEMP    BIT(3)
+#define BCOVE_ADCIRQ_BATTID     BIT(4)
+#define BCOVE_ADCIRQ_VIBATT     BIT(5)
+#define BCOVE_ADCIRQ_CCTICK     BIT(7)
+
+/* Level 2 IRQs: charger */
+#define BCOVE_CHGRIRQ_BAT0ALRT  BIT(4)
+#define BCOVE_CHGRIRQ_BAT1ALRT  BIT(5)
+#define BCOVE_CHGRIRQ_BATCRIT   BIT(6)
+
+#define BCOVE_CHGRIRQ_VBUSDET   BIT(0)
+#define BCOVE_CHGRIRQ_DCDET     BIT(1)
+#define BCOVE_CHGRIRQ_BATTDET   BIT(2)
+#define BCOVE_CHGRIRQ_USBIDDET  BIT(3)
+
+#endif  /* __INTEL_SOC_PMIC_MRFLD_H__ */
diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h
index 25a95e72179b..fc88d315bdde 100644
--- a/include/linux/mfd/mt6397/core.h
+++ b/include/linux/mfd/mt6397/core.h
@@ -7,6 +7,14 @@
 #ifndef __MFD_MT6397_CORE_H__
 #define __MFD_MT6397_CORE_H__
 
+#include <linux/mutex.h>
+
+enum chip_id {
+        MT6323_CHIP_ID = 0x23,
+        MT6391_CHIP_ID = 0x91,
+        MT6397_CHIP_ID = 0x97,
+};
+
 enum mt6397_irq_numbers {
         MT6397_IRQ_SPKL_AB = 0,
         MT6397_IRQ_SPKR_AB,
@@ -54,6 +62,9 @@ struct mt6397_chip {
         u16 irq_masks_cache[2];
         u16 int_con[2];
         u16 int_status[2];
+        u16 chip_id;
 };
 
+int mt6397_irq_init(struct mt6397_chip *chip);
+
 #endif /* __MFD_MT6397_CORE_H__ */
diff --git a/include/linux/pci-aspm.h b/include/linux/pci-aspm.h
deleted file mode 100644
index 67064145d76e..000000000000
--- a/include/linux/pci-aspm.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- *      aspm.h
- *
- *      PCI Express ASPM defines and function prototypes
- *
- *      Copyright (C) 2007 Intel Corp.
- *              Zhang Yanmin (yanmin.zhang@intel.com)
- *              Shaohua Li (shaohua.li@intel.com)
- *
- *      For more information, please consult the following manuals (look at
- *      http://www.pcisig.com/ for how to get them):
- *
- *      PCI Express Specification
- */
-
-#ifndef LINUX_ASPM_H
-#define LINUX_ASPM_H
-
-#include <linux/pci.h>
-
-#define PCIE_LINK_STATE_L0S     1
-#define PCIE_LINK_STATE_L1      2
-#define PCIE_LINK_STATE_CLKPM   4
-
-#ifdef CONFIG_PCIEASPM
-int pci_disable_link_state(struct pci_dev *pdev, int state);
-int pci_disable_link_state_locked(struct pci_dev *pdev, int state);
-void pcie_no_aspm(void);
-#else
-static inline int pci_disable_link_state(struct pci_dev *pdev, int state)
-{ return 0; }
-static inline void pcie_no_aspm(void) { }
-#endif
-
-#endif /* LINUX_ASPM_H */
diff --git a/include/linux/pci-p2pdma.h b/include/linux/pci-p2pdma.h
index bca9bc3e5be7..8318a97c9c61 100644
--- a/include/linux/pci-p2pdma.h
+++ b/include/linux/pci-p2pdma.h
@@ -30,8 +30,10 @@ struct scatterlist *pci_p2pmem_alloc_sgl(struct pci_dev *pdev,
                                          unsigned int *nents, u32 length);
 void pci_p2pmem_free_sgl(struct pci_dev *pdev, struct scatterlist *sgl);
 void pci_p2pmem_publish(struct pci_dev *pdev, bool publish);
-int pci_p2pdma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-                      enum dma_data_direction dir);
+int pci_p2pdma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
+                int nents, enum dma_data_direction dir, unsigned long attrs);
+void pci_p2pdma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
+                int nents, enum dma_data_direction dir, unsigned long attrs);
 int pci_p2pdma_enable_store(const char *page, struct pci_dev **p2p_dev,
                             bool *use_p2pdma);
 ssize_t pci_p2pdma_enable_show(char *page, struct pci_dev *p2p_dev,
@@ -81,11 +83,17 @@ static inline void pci_p2pmem_free_sgl(struct pci_dev *pdev,
 static inline void pci_p2pmem_publish(struct pci_dev *pdev, bool publish)
 {
 }
-static inline int pci_p2pdma_map_sg(struct device *dev,
-                struct scatterlist *sg, int nents, enum dma_data_direction dir)
+static inline int pci_p2pdma_map_sg_attrs(struct device *dev,
+                struct scatterlist *sg, int nents, enum dma_data_direction dir,
+                unsigned long attrs)
 {
         return 0;
 }
+static inline void pci_p2pdma_unmap_sg_attrs(struct device *dev,
+                struct scatterlist *sg, int nents, enum dma_data_direction dir,
+                unsigned long attrs)
+{
+}
 static inline int pci_p2pdma_enable_store(const char *page,
                 struct pci_dev **p2p_dev, bool *use_p2pdma)
 {
@@ -111,4 +119,16 @@ static inline struct pci_dev *pci_p2pmem_find(struct device *client)
         return pci_p2pmem_find_many(&client, 1);
 }
 
+static inline int pci_p2pdma_map_sg(struct device *dev, struct scatterlist *sg,
+                                    int nents, enum dma_data_direction dir)
+{
+        return pci_p2pdma_map_sg_attrs(dev, sg, nents, dir, 0);
+}
+
+static inline void pci_p2pdma_unmap_sg(struct device *dev,
+                struct scatterlist *sg, int nents, enum dma_data_direction dir)
+{
+        pci_p2pdma_unmap_sg_attrs(dev, sg, nents, dir, 0);
+}
+
 #endif /* _LINUX_PCI_P2P_H */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 82e4cd1b7ac3..f9088c89a534 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -6,12 +6,18 @@
  *      Copyright 1994, Drew Eckhardt
  *      Copyright 1997--1999 Martin Mares <mj@ucw.cz>
  *
+ *      PCI Express ASPM defines and function prototypes
+ *      Copyright (c) 2007 Intel Corp.
+ *              Zhang Yanmin (yanmin.zhang@intel.com)
+ *              Shaohua Li (shaohua.li@intel.com)
+ *
  *      For more information, please consult the following manuals (look at
  *      http://www.pcisig.com/ for how to get them):
  *
  *      PCI BIOS Specification
  *      PCI Local Bus Specification
  *      PCI to PCI Bridge Specification
+ *      PCI Express Specification
  *      PCI System Design Guide
  */
 #ifndef LINUX_PCI_H
@@ -145,11 +151,6 @@ static inline const char *pci_power_name(pci_power_t state)
         return pci_power_names[1 + (__force int) state];
 }
 
-#define PCI_PM_D2_DELAY         200
-#define PCI_PM_D3_WAIT          10
-#define PCI_PM_D3COLD_WAIT      100
-#define PCI_PM_BUS_WAIT         50
-
 /**
  * typedef pci_channel_state_t
  *
@@ -418,7 +419,6 @@ struct pci_dev {
         unsigned int    broken_intx_masking:1;  /* INTx masking can't be used */
         unsigned int    io_window_1k:1;         /* Intel bridge 1K I/O windows */
         unsigned int    irq_managed:1;
-        unsigned int    has_secondary_link:1;
         unsigned int    non_compliant_bars:1;   /* Broken BARs; ignore them */
         unsigned int    is_probed:1;            /* Device probing in progress */
         unsigned int    link_active_reporting:1;/* Device capable of reporting link active */
@@ -649,9 +649,6 @@ static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
         return dev->bus->self;
 }
 
-struct device *pci_get_host_bridge_device(struct pci_dev *dev);
-void pci_put_host_bridge_device(struct device *dev);
-
 #ifdef CONFIG_PCI_MSI
 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
 {
@@ -925,6 +922,11 @@ enum {
         PCI_SCAN_ALL_PCIE_DEVS  = 0x00000040,   /* Scan all, not just dev 0 */
 };
 
+#define PCI_IRQ_LEGACY          (1 << 0) /* Allow legacy interrupts */
+#define PCI_IRQ_MSI             (1 << 1) /* Allow MSI interrupts */
+#define PCI_IRQ_MSIX            (1 << 2) /* Allow MSI-X interrupts */
+#define PCI_IRQ_AFFINITY        (1 << 3) /* Auto-assign affinity */
+
 /* These external functions are only available when PCI support is enabled */
 #ifdef CONFIG_PCI
 
@@ -969,7 +971,7 @@ resource_size_t pcibios_align_resource(void *, const struct resource *,
                                 resource_size_t,
                                 resource_size_t);
 
-/* Weak but can be overriden by arch */
+/* Weak but can be overridden by arch */
 void pci_fixup_cardbus(struct pci_bus *);
 
 /* Generic PCI functions used internally */
@@ -995,7 +997,6 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
 int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge);
 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
                                 int busnr);
-void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
                                  const char *name,
                                  struct hotplug_slot *hotplug);
@@ -1241,19 +1242,12 @@ int pci_wake_from_d3(struct pci_dev *dev, bool enable);
 int pci_prepare_to_sleep(struct pci_dev *dev);
 int pci_back_from_sleep(struct pci_dev *dev);
 bool pci_dev_run_wake(struct pci_dev *dev);
-bool pci_check_pme_status(struct pci_dev *dev);
-void pci_pme_wakeup_bus(struct pci_bus *bus);
 void pci_d3cold_enable(struct pci_dev *dev);
 void pci_d3cold_disable(struct pci_dev *dev);
 bool pcie_relaxed_ordering_enabled(struct pci_dev *dev);
 void pci_wakeup_bus(struct pci_bus *bus);
 void pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state);
 
-/* PCI Virtual Channel */
-int pci_save_vc_state(struct pci_dev *dev);
-void pci_restore_vc_state(struct pci_dev *dev);
-void pci_allocate_vc_save_buffers(struct pci_dev *dev);
-
 /* For use by arch with custom probe code */
 void set_pcie_port_type(struct pci_dev *pdev);
 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
@@ -1297,8 +1291,6 @@ int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
 void pci_release_selected_regions(struct pci_dev *, int);
 
 /* drivers/pci/bus.c */
-struct pci_bus *pci_bus_get(struct pci_bus *bus);
-void pci_bus_put(struct pci_bus *bus);
 void pci_add_resource(struct list_head *resources, struct resource *res);
 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
                              resource_size_t offset);
@@ -1408,11 +1400,6 @@ resource_size_t pcibios_window_alignment(struct pci_bus *bus,
 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
                       unsigned int command_bits, u32 flags);
 
-#define PCI_IRQ_LEGACY          (1 << 0) /* Allow legacy interrupts */
-#define PCI_IRQ_MSI             (1 << 1) /* Allow MSI interrupts */
-#define PCI_IRQ_MSIX            (1 << 2) /* Allow MSI-X interrupts */
-#define PCI_IRQ_AFFINITY        (1 << 3) /* Auto-assign affinity */
-
 /*
  * Virtual interrupts allow for more interrupts to be allocated
  * than the device has interrupts for. These are not programmed
@@ -1517,14 +1504,6 @@ static inline int pci_irq_get_node(struct pci_dev *pdev, int vec)
 }
 #endif
 
-static inline int
-pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
-                      unsigned int max_vecs, unsigned int flags)
-{
-        return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags,
-                                              NULL);
-}
-
 /**
  * pci_irqd_intx_xlate() - Translate PCI INTx value to an IRQ domain hwirq
  * @d: the INTx IRQ domain
@@ -1565,10 +1544,22 @@ extern bool pcie_ports_native;
 #define pcie_ports_native       false
 #endif
 
+#define PCIE_LINK_STATE_L0S     1
+#define PCIE_LINK_STATE_L1      2
+#define PCIE_LINK_STATE_CLKPM   4
+
 #ifdef CONFIG_PCIEASPM
+int pci_disable_link_state(struct pci_dev *pdev, int state);
+int pci_disable_link_state_locked(struct pci_dev *pdev, int state);
+void pcie_no_aspm(void);
 bool pcie_aspm_support_enabled(void);
 bool pcie_aspm_enabled(struct pci_dev *pdev);
 #else
+static inline int pci_disable_link_state(struct pci_dev *pdev, int state)
+{ return 0; }
+static inline int pci_disable_link_state_locked(struct pci_dev *pdev, int state)
+{ return 0; }
+static inline void pcie_no_aspm(void) { }
 static inline bool pcie_aspm_support_enabled(void) { return false; }
 static inline bool pcie_aspm_enabled(struct pci_dev *pdev) { return false; }
 #endif
@@ -1579,23 +1570,8 @@ bool pci_aer_available(void);
 static inline bool pci_aer_available(void) { return false; }
 #endif
 
-#ifdef CONFIG_PCIE_ECRC
-void pcie_set_ecrc_checking(struct pci_dev *dev);
-void pcie_ecrc_get_policy(char *str);
-#else
-static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
-static inline void pcie_ecrc_get_policy(char *str) { }
-#endif
-
 bool pci_ats_disabled(void);
 
-#ifdef CONFIG_PCIE_PTM
-int pci_enable_ptm(struct pci_dev *dev, u8 *granularity);
-#else
-static inline int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
-{ return -EINVAL; }
-#endif
-
 void pci_cfg_access_lock(struct pci_dev *dev);
 bool pci_cfg_access_trylock(struct pci_dev *dev);
 void pci_cfg_access_unlock(struct pci_dev *dev);
@@ -1749,11 +1725,6 @@ static inline void pci_release_regions(struct pci_dev *dev) { }
 
 static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; }
 
-static inline void pci_block_cfg_access(struct pci_dev *dev) { }
-static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
-{ return 0; }
-static inline void pci_unblock_cfg_access(struct pci_dev *dev) { }
-
 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
 { return NULL; }
 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
@@ -1782,17 +1753,36 @@ static inline const struct pci_device_id *pci_match_id(const struct pci_device_i
                                                          struct pci_dev *dev)
 { return NULL; }
 static inline bool pci_ats_disabled(void) { return true; }
+
+static inline int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
+{
+        return -EINVAL;
+}
+
+static inline int
+pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
+                               unsigned int max_vecs, unsigned int flags,
+                               struct irq_affinity *aff_desc)
+{
+        return -ENOSPC;
+}
 #endif /* CONFIG_PCI */
 
+static inline int
+pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
+                      unsigned int max_vecs, unsigned int flags)
+{
+        return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags,
+                                              NULL);
+}
+
 #ifdef CONFIG_PCI_ATS
 /* Address Translation Service */
-void pci_ats_init(struct pci_dev *dev);
 int pci_enable_ats(struct pci_dev *dev, int ps);
 void pci_disable_ats(struct pci_dev *dev);
 int pci_ats_queue_depth(struct pci_dev *dev);
 int pci_ats_page_aligned(struct pci_dev *dev);
 #else
-static inline void pci_ats_init(struct pci_dev *d) { }
 static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; }
 static inline void pci_disable_ats(struct pci_dev *d) { }
 static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; }
@@ -1803,7 +1793,7 @@ static inline int pci_ats_page_aligned(struct pci_dev *dev) { return 0; }
 
 #include <asm/pci.h>
 
-/* These two functions provide almost identical functionality. Depennding
+/* These two functions provide almost identical functionality. Depending
  * on the architecture, one will be implemented as a wrapper around the
  * other (in drivers/pci/mmap.c).
  *
@@ -1872,25 +1862,9 @@ static inline const char *pci_name(const struct pci_dev *pdev)
         return dev_name(&pdev->dev);
 }
 
-
-/*
- * Some archs don't want to expose struct resource to userland as-is
- * in sysfs and /proc
- */
-#ifdef HAVE_ARCH_PCI_RESOURCE_TO_USER
 void pci_resource_to_user(const struct pci_dev *dev, int bar,
                           const struct resource *rsrc,
                           resource_size_t *start, resource_size_t *end);
-#else
-static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
-                const struct resource *rsrc, resource_size_t *start,
-                resource_size_t *end)
-{
-        *start = rsrc->start;
-        *end = rsrc->end;
-}
-#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
-
 
 /*
  * The world is not perfect and supplies us with broken PCI devices.
@@ -2032,10 +2006,6 @@ extern unsigned long pci_cardbus_mem_size;
 extern u8 pci_dfl_cache_line_size;
 extern u8 pci_cache_line_size;
 
-extern unsigned long pci_hotplug_io_size;
-extern unsigned long pci_hotplug_mem_size;
-extern unsigned long pci_hotplug_bus_size;
-
 /* Architecture-specific versions may override these (weak) */
 void pcibios_disable_device(struct pci_dev *dev);
 void pcibios_set_master(struct pci_dev *dev);
@@ -2305,10 +2275,6 @@ int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
 #ifdef CONFIG_OF
 struct device_node;
 struct irq_domain;
-void pci_set_of_node(struct pci_dev *dev);
-void pci_release_of_node(struct pci_dev *dev);
-void pci_set_bus_of_node(struct pci_bus *bus);
-void pci_release_bus_of_node(struct pci_bus *bus);
 struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus);
 int pci_parse_request_of_pci_ranges(struct device *dev,
                                     struct list_head *resources,
@@ -2318,10 +2284,6 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
 
 #else   /* CONFIG_OF */
-static inline void pci_set_of_node(struct pci_dev *dev) { }
-static inline void pci_release_of_node(struct pci_dev *dev) { }
-static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
-static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
 static inline struct irq_domain *
 pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; }
 static inline int pci_parse_request_of_pci_ranges(struct device *dev,
@@ -2435,4 +2397,7 @@ void pci_uevent_ers(struct pci_dev *pdev, enum  pci_ers_result err_type);
 #define pci_notice_ratelimited(pdev, fmt, arg...) \
         dev_notice_ratelimited(&(pdev)->dev, fmt, ##arg)
 
+#define pci_info_ratelimited(pdev, fmt, arg...) \
+        dev_info_ratelimited(&(pdev)->dev, fmt, ##arg)
+
 #endif /* LINUX_PCI_H */
diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h
index f694eb2ca978..b482e42d7153 100644
--- a/include/linux/pci_hotplug.h
+++ b/include/linux/pci_hotplug.h
@@ -86,114 +86,14 @@ void pci_hp_deregister(struct hotplug_slot *slot);
 #define pci_hp_initialize(slot, bus, nr, name) \
         __pci_hp_initialize(slot, bus, nr, name, THIS_MODULE, KBUILD_MODNAME)
 
-/* PCI Setting Record (Type 0) */
-struct hpp_type0 {
-        u32 revision;
-        u8  cache_line_size;
-        u8  latency_timer;
-        u8  enable_serr;
-        u8  enable_perr;
-};
-
-/* PCI-X Setting Record (Type 1) */
-struct hpp_type1 {
-        u32 revision;
-        u8  max_mem_read;
-        u8  avg_max_split;
-        u16 tot_max_split;
-};
-
-/* PCI Express Setting Record (Type 2) */
-struct hpp_type2 {
-        u32 revision;
-        u32 unc_err_mask_and;
-        u32 unc_err_mask_or;
-        u32 unc_err_sever_and;
-        u32 unc_err_sever_or;
-        u32 cor_err_mask_and;
-        u32 cor_err_mask_or;
-        u32 adv_err_cap_and;
-        u32 adv_err_cap_or;
-        u16 pci_exp_devctl_and;
-        u16 pci_exp_devctl_or;
-        u16 pci_exp_lnkctl_and;
-        u16 pci_exp_lnkctl_or;
-        u32 sec_unc_err_sever_and;
-        u32 sec_unc_err_sever_or;
-        u32 sec_unc_err_mask_and;
-        u32 sec_unc_err_mask_or;
-};
-
-/*
- * _HPX PCI Express Setting Record (Type 3)
- */
-struct hpx_type3 {
-        u16 device_type;
-        u16 function_type;
-        u16 config_space_location;
-        u16 pci_exp_cap_id;
-        u16 pci_exp_cap_ver;
-        u16 pci_exp_vendor_id;
-        u16 dvsec_id;
-        u16 dvsec_rev;
-        u16 match_offset;
-        u32 match_mask_and;
-        u32 match_value;
-        u16 reg_offset;
-        u32 reg_mask_and;
-        u32 reg_mask_or;
-};
-
-struct hotplug_program_ops {
-        void (*program_type0)(struct pci_dev *dev, struct hpp_type0 *hpp);
-        void (*program_type1)(struct pci_dev *dev, struct hpp_type1 *hpp);
-        void (*program_type2)(struct pci_dev *dev, struct hpp_type2 *hpp);
-        void (*program_type3)(struct pci_dev *dev, struct hpx_type3 *hpp);
-};
-
-enum hpx_type3_dev_type {
-        HPX_TYPE_ENDPOINT       = BIT(0),
-        HPX_TYPE_LEG_END        = BIT(1),
-        HPX_TYPE_RC_END         = BIT(2),
-        HPX_TYPE_RC_EC          = BIT(3),
-        HPX_TYPE_ROOT_PORT      = BIT(4),
-        HPX_TYPE_UPSTREAM       = BIT(5),
-        HPX_TYPE_DOWNSTREAM     = BIT(6),
-        HPX_TYPE_PCI_BRIDGE     = BIT(7),
-        HPX_TYPE_PCIE_BRIDGE    = BIT(8),
-};
-
-enum hpx_type3_fn_type {
-        HPX_FN_NORMAL           = BIT(0),
-        HPX_FN_SRIOV_PHYS       = BIT(1),
-        HPX_FN_SRIOV_VIRT       = BIT(2),
-};
-
-enum hpx_type3_cfg_loc {
-        HPX_CFG_PCICFG          = 0,
-        HPX_CFG_PCIE_CAP        = 1,
-        HPX_CFG_PCIE_CAP_EXT    = 2,
-        HPX_CFG_VEND_CAP        = 3,
-        HPX_CFG_DVSEC           = 4,
-        HPX_CFG_MAX,
-};
-
 #ifdef CONFIG_ACPI
 #include <linux/acpi.h>
-int pci_acpi_program_hp_params(struct pci_dev *dev,
-                               const struct hotplug_program_ops *hp_ops);
 bool pciehp_is_native(struct pci_dev *bridge);
 int acpi_get_hp_hw_control_from_firmware(struct pci_dev *bridge);
 bool shpchp_is_native(struct pci_dev *bridge);
 int acpi_pci_check_ejectable(struct pci_bus *pbus, acpi_handle handle);
 int acpi_pci_detect_ejectable(acpi_handle handle);
 #else
-static inline int pci_acpi_program_hp_params(struct pci_dev *dev,
-                                    const struct hotplug_program_ops *hp_ops)
-{
-        return -ENODEV;
-}
-
 static inline int acpi_get_hp_hw_control_from_firmware(struct pci_dev *bridge)
 {
         return 0;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index de1b75e963ef..21a572469a4e 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2134,6 +2134,7 @@
 #define PCI_VENDOR_ID_MYRICOM           0x14c1
 
 #define PCI_VENDOR_ID_MEDIATEK          0x14c3
+#define PCI_DEVICE_ID_MEDIATEK_7629     0x7629
 
 #define PCI_VENDOR_ID_TITAN             0x14D2
 #define PCI_DEVICE_ID_TITAN_010L        0x8001
@@ -2574,6 +2575,8 @@
 
 #define PCI_VENDOR_ID_ASMEDIA           0x1b21
 
+#define PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS     0x1c36
+
 #define PCI_VENDOR_ID_CIRCUITCO         0x1cc8
 #define PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD  0x0001
 
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index 7ccb8757b79d..98415686cbfa 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -5513,6 +5513,18 @@ struct ec_params_fp_seed {
         uint8_t seed[FP_CONTEXT_TPM_BYTES];
 } __ec_align4;
 
+#define EC_CMD_FP_ENC_STATUS 0x0409
+
+/* FP TPM seed has been set or not */
+#define FP_ENC_STATUS_SEED_SET BIT(0)
+
+struct ec_response_fp_encryption_status {
+        /* Used bits in encryption engine status */
+        uint32_t valid_flags;
+        /* Encryption engine status */
+        uint32_t status;
+} __ec_align4;
+
 /*****************************************************************************/
 /* Touchpad MCU commands: range 0x0500-0x05FF */
 
diff --git a/include/linux/security.h b/include/linux/security.h
index 5f7441abbf42..ace6fdb604f9 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -259,7 +259,8 @@ int security_dentry_create_files_as(struct dentry *dentry, int mode,
                                         struct qstr *name,
                                         const struct cred *old,
                                         struct cred *new);
-
+int security_path_notify(const struct path *path, u64 mask,
+                                        unsigned int obj_type);
 int security_inode_alloc(struct inode *inode);
 void security_inode_free(struct inode *inode);
 int security_inode_init_security(struct inode *inode, struct inode *dir,
@@ -387,7 +388,6 @@ int security_ismaclabel(const char *name);
 int security_secid_to_secctx(u32 secid, char **secdata, u32 *seclen);
 int security_secctx_to_secid(const char *secdata, u32 seclen, u32 *secid);
 void security_release_secctx(char *secdata, u32 seclen);
-
 void security_inode_invalidate_secctx(struct inode *inode);
 int security_inode_notifysecctx(struct inode *inode, void *ctx, u32 ctxlen);
 int security_inode_setsecctx(struct dentry *dentry, void *ctx, u32 ctxlen);
@@ -621,6 +621,12 @@ static inline int security_move_mount(const struct path *from_path,
         return 0;
 }
 
+static inline int security_path_notify(const struct path *path, u64 mask,
+                                unsigned int obj_type)
+{
+        return 0;
+}
+
 static inline int security_inode_alloc(struct inode *inode)
 {
         return 0;
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index f28e562d7ca8..29d6e93fd15e 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -591,6 +591,7 @@
 #define  PCI_EXP_SLTCTL_CCIE    0x0010  /* Command Completed Interrupt Enable */
 #define  PCI_EXP_SLTCTL_HPIE    0x0020  /* Hot-Plug Interrupt Enable */
 #define  PCI_EXP_SLTCTL_AIC     0x00c0  /* Attention Indicator Control */
+#define  PCI_EXP_SLTCTL_ATTN_IND_SHIFT 6      /* Attention Indicator shift */
 #define  PCI_EXP_SLTCTL_ATTN_IND_ON    0x0040 /* Attention Indicator on */
 #define  PCI_EXP_SLTCTL_ATTN_IND_BLINK 0x0080 /* Attention Indicator blinking */
 #define  PCI_EXP_SLTCTL_ATTN_IND_OFF   0x00c0 /* Attention Indicator off */
@@ -713,7 +714,9 @@
 #define PCI_EXT_CAP_ID_DPC      0x1D    /* Downstream Port Containment */
 #define PCI_EXT_CAP_ID_L1SS     0x1E    /* L1 PM Substates */
 #define PCI_EXT_CAP_ID_PTM      0x1F    /* Precision Time Measurement */
-#define PCI_EXT_CAP_ID_MAX      PCI_EXT_CAP_ID_PTM
+#define PCI_EXT_CAP_ID_DLF      0x25    /* Data Link Feature */
+#define PCI_EXT_CAP_ID_PL_16GT  0x26    /* Physical Layer 16.0 GT/s */
+#define PCI_EXT_CAP_ID_MAX      PCI_EXT_CAP_ID_PL_16GT
 
 #define PCI_EXT_CAP_DSN_SIZEOF  12
 #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@@ -1053,4 +1056,14 @@
 #define  PCI_L1SS_CTL1_LTR_L12_TH_SCALE 0xe0000000  /* LTR_L1.2_THRESHOLD_Scale */
 #define PCI_L1SS_CTL2           0x0c    /* Control 2 Register */
 
+/* Data Link Feature */
+#define PCI_DLF_CAP             0x04    /* Capabilities Register */
+#define  PCI_DLF_EXCHANGE_ENABLE        0x80000000  /* Data Link Feature Exchange Enable */
+
+/* Physical Layer 16.0 GT/s */
+#define PCI_PL_16GT_LE_CTRL     0x20    /* Lane Equalization Control Register */
+#define  PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK         0x0000000F
+#define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK         0x000000F0
+#define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT        4
+
 #endif /* LINUX_PCI_REGS_H */
diff --git a/kernel/bpf/inode.c b/kernel/bpf/inode.c
index cc0d0cf114e3..a70f7209cda3 100644
--- a/kernel/bpf/inode.c
+++ b/kernel/bpf/inode.c
@@ -14,8 +14,9 @@
 #include <linux/mount.h>
 #include <linux/namei.h>
 #include <linux/fs.h>
+#include <linux/fs_context.h>
+#include <linux/fs_parser.h>
 #include <linux/kdev_t.h>
-#include <linux/parser.h>
 #include <linux/filter.h>
 #include <linux/bpf.h>
 #include <linux/bpf_trace.h>
@@ -583,58 +584,52 @@ static const struct super_operations bpf_super_ops = {
 
 enum {
         OPT_MODE,
-        OPT_ERR,
 };
 
-static const match_table_t bpf_mount_tokens = {
-        { OPT_MODE, "mode=%o" },
-        { OPT_ERR, NULL },
+static const struct fs_parameter_spec bpf_param_specs[] = {
+        fsparam_u32oct  ("mode",                        OPT_MODE),
+        {}
+};
+
+static const struct fs_parameter_description bpf_fs_parameters = {
+        .name           = "bpf",
+        .specs          = bpf_param_specs,
 };
 
 struct bpf_mount_opts {
         umode_t mode;
 };
 
-static int bpf_parse_options(char *data, struct bpf_mount_opts *opts)
+static int bpf_parse_param(struct fs_context *fc, struct fs_parameter *param)
 {
-        substring_t args[MAX_OPT_ARGS];
-        int option, token;
-        char *ptr;
+        struct bpf_mount_opts *opts = fc->fs_private;
+        struct fs_parse_result result;
+        int opt;
 
-        opts->mode = S_IRWXUGO;
-
-        while ((ptr = strsep(&data, ",")) != NULL) {
-                if (!*ptr)
-                        continue;
-
-                token = match_token(ptr, bpf_mount_tokens, args);
-                switch (token) {
-                case OPT_MODE:
-                        if (match_octal(&args[0], &option))
-                                return -EINVAL;
-                        opts->mode = option & S_IALLUGO;
-                        break;
+        opt = fs_parse(fc, &bpf_fs_parameters, param, &result);
+        if (opt < 0)
                 /* We might like to report bad mount options here, but
                  * traditionally we've ignored all mount options, so we'd
                  * better continue to ignore non-existing options for bpf.
                  */
-                }
+                return opt == -ENOPARAM ? 0 : opt;
+
+        switch (opt) {
+        case OPT_MODE:
+                opts->mode = result.uint_32 & S_IALLUGO;
+                break;
         }
 
         return 0;
 }
 
-static int bpf_fill_super(struct super_block *sb, void *data, int silent)
+static int bpf_fill_super(struct super_block *sb, struct fs_context *fc)
 {
         static const struct tree_descr bpf_rfiles[] = { { "" } };
-        struct bpf_mount_opts opts;
+        struct bpf_mount_opts *opts = fc->fs_private;
         struct inode *inode;
         int ret;
 
-        ret = bpf_parse_options(data, &opts);
-        if (ret)
-                return ret;
-
         ret = simple_fill_super(sb, BPF_FS_MAGIC, bpf_rfiles);
         if (ret)
                 return ret;
@@ -644,21 +639,50 @@ static int bpf_fill_super(struct super_block *sb, void *data, int silent)
         inode = sb->s_root->d_inode;
         inode->i_op = &bpf_dir_iops;
         inode->i_mode &= ~S_IALLUGO;
-        inode->i_mode |= S_ISVTX | opts.mode;
+        inode->i_mode |= S_ISVTX | opts->mode;
 
         return 0;
 }
 
-static struct dentry *bpf_mount(struct file_system_type *type, int flags,
-                                const char *dev_name, void *data)
+static int bpf_get_tree(struct fs_context *fc)
+{
+        return get_tree_nodev(fc, bpf_fill_super);
+}
+
+static void bpf_free_fc(struct fs_context *fc)
 {
-        return mount_nodev(type, flags, data, bpf_fill_super);
+        kfree(fc->fs_private);
+}
+
+static const struct fs_context_operations bpf_context_ops = {
+        .free           = bpf_free_fc,
+        .parse_param    = bpf_parse_param,
+        .get_tree       = bpf_get_tree,
+};
+
+/*
+ * Set up the filesystem mount context.
+ */
+static int bpf_init_fs_context(struct fs_context *fc)
+{
+        struct bpf_mount_opts *opts;
+
+        opts = kzalloc(sizeof(struct bpf_mount_opts), GFP_KERNEL);
+        if (!opts)
+                return -ENOMEM;
+
+        opts->mode = S_IRWXUGO;
+
+        fc->fs_private = opts;
+        fc->ops = &bpf_context_ops;
+        return 0;
 }
 
 static struct file_system_type bpf_fs_type = {
         .owner          = THIS_MODULE,
         .name           = "bpf",
-        .mount          = bpf_mount,
+        .init_fs_context = bpf_init_fs_context,
+        .parameters     = &bpf_fs_parameters,
         .kill_sb        = kill_litter_super,
 };
 
diff --git a/kernel/livepatch/core.c b/kernel/livepatch/core.c
index c4ce08f43bd6..ab4a4606d19b 100644
--- a/kernel/livepatch/core.c
+++ b/kernel/livepatch/core.c
@@ -1175,6 +1175,7 @@ err:
         pr_warn("patch '%s' failed for module '%s', refusing to load module '%s'\n",
                 patch->mod->name, obj->mod->name, obj->mod->name);
         mod->klp_alive = false;
+        obj->mod = NULL;
         klp_cleanup_module_patches_limited(mod, patch);
         mutex_unlock(&klp_mutex);
 
diff --git a/security/safesetid/securityfs.c b/security/safesetid/securityfs.c
index d568e17dd773..74a13d432ed8 100644
--- a/security/safesetid/securityfs.c
+++ b/security/safesetid/securityfs.c
@@ -187,7 +187,8 @@ out_free_rule:
 out_free_buf:
         kfree(buf);
 out_free_pol:
-        release_ruleset(pol);
+        if (pol)
+                release_ruleset(pol);
         return err;
 }
 
diff --git a/security/security.c b/security/security.c
index 250ee2d76406..25ee5c75551f 100644
--- a/security/security.c
+++ b/security/security.c
@@ -870,6 +870,12 @@ int security_move_mount(const struct path *from_path, const struct path *to_path
         return call_int_hook(move_mount, 0, from_path, to_path);
 }
 
+int security_path_notify(const struct path *path, u64 mask,
+                                unsigned int obj_type)
+{
+        return call_int_hook(path_notify, 0, path, mask, obj_type);
+}
+
 int security_inode_alloc(struct inode *inode)
 {
         int rc = lsm_inode_alloc(inode);
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index 74dd46de01b6..9625b99e677f 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -89,6 +89,8 @@
 #include <linux/kernfs.h>
 #include <linux/stringhash.h>   /* for hashlen_string() */
 #include <uapi/linux/mount.h>
+#include <linux/fsnotify.h>
+#include <linux/fanotify.h>
 
 #include "avc.h"
 #include "objsec.h"
@@ -3275,6 +3277,50 @@ static int selinux_inode_removexattr(struct dentry *dentry, const char *name)
         return -EACCES;
 }
 
+static int selinux_path_notify(const struct path *path, u64 mask,
+                                                unsigned int obj_type)
+{
+        int ret;
+        u32 perm;
+
+        struct common_audit_data ad;
+
+        ad.type = LSM_AUDIT_DATA_PATH;
+        ad.u.path = *path;
+
+        /*
+         * Set permission needed based on the type of mark being set.
+         * Performs an additional check for sb watches.
+         */
+        switch (obj_type) {
+        case FSNOTIFY_OBJ_TYPE_VFSMOUNT:
+                perm = FILE__WATCH_MOUNT;
+                break;
+        case FSNOTIFY_OBJ_TYPE_SB:
+                perm = FILE__WATCH_SB;
+                ret = superblock_has_perm(current_cred(), path->dentry->d_sb,
+                                                FILESYSTEM__WATCH, &ad);
+                if (ret)
+                        return ret;
+                break;
+        case FSNOTIFY_OBJ_TYPE_INODE:
+                perm = FILE__WATCH;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        /* blocking watches require the file:watch_with_perm permission */
+        if (mask & (ALL_FSNOTIFY_PERM_EVENTS))
+                perm |= FILE__WATCH_WITH_PERM;
+
+        /* watches on read-like events need the file:watch_reads permission */
+        if (mask & (FS_ACCESS | FS_ACCESS_PERM | FS_CLOSE_NOWRITE))
+                perm |= FILE__WATCH_READS;
+
+        return path_has_perm(current_cred(), path, perm);
+}
+
 /*
  * Copy the inode security context value to the user.
  *
@@ -3403,7 +3449,7 @@ static int selinux_inode_copy_up_xattr(const char *name)
 static int selinux_kernfs_init_security(struct kernfs_node *kn_dir,
                                         struct kernfs_node *kn)
 {
-        const struct task_security_struct *tsec = current_security();
+        const struct task_security_struct *tsec = selinux_cred(current_cred());
         u32 parent_sid, newsid, clen;
         int rc;
         char *context;
@@ -6818,6 +6864,7 @@ static struct security_hook_list selinux_hooks[] __lsm_ro_after_init = {
         LSM_HOOK_INIT(inode_getsecid, selinux_inode_getsecid),
         LSM_HOOK_INIT(inode_copy_up, selinux_inode_copy_up),
         LSM_HOOK_INIT(inode_copy_up_xattr, selinux_inode_copy_up_xattr),
+        LSM_HOOK_INIT(path_notify, selinux_path_notify),
 
         LSM_HOOK_INIT(kernfs_init_security, selinux_kernfs_init_security),
 
diff --git a/security/selinux/include/classmap.h b/security/selinux/include/classmap.h
index 201f7e588a29..32e9b03be3dd 100644
--- a/security/selinux/include/classmap.h
+++ b/security/selinux/include/classmap.h
@@ -7,7 +7,8 @@
 
 #define COMMON_FILE_PERMS COMMON_FILE_SOCK_PERMS, "unlink", "link", \
     "rename", "execute", "quotaon", "mounton", "audit_access", \
-    "open", "execmod"
+        "open", "execmod", "watch", "watch_mount", "watch_sb", \
+        "watch_with_perm", "watch_reads"
 
 #define COMMON_SOCK_PERMS COMMON_FILE_SOCK_PERMS, "bind", "connect", \
     "listen", "accept", "getopt", "setopt", "shutdown", "recvfrom",  \
@@ -60,7 +61,7 @@ struct security_class_mapping secclass_map[] = {
         { "filesystem",
           { "mount", "remount", "unmount", "getattr",
             "relabelfrom", "relabelto", "associate", "quotamod",
-            "quotaget", NULL } },
+            "quotaget", "watch", NULL } },
         { "file",
           { COMMON_FILE_PERMS,
             "execute_no_trans", "entrypoint", NULL } },
diff --git a/security/selinux/include/objsec.h b/security/selinux/include/objsec.h
index 91c5395dd20c..586b7abd0aa7 100644
--- a/security/selinux/include/objsec.h
+++ b/security/selinux/include/objsec.h
@@ -37,16 +37,6 @@ struct task_security_struct {
         u32 sockcreate_sid;     /* fscreate SID */
 };
 
-/*
- * get the subjective security ID of the current task
- */
-static inline u32 current_sid(void)
-{
-        const struct task_security_struct *tsec = current_security();
-
-        return tsec->sid;
-}
-
 enum label_initialized {
         LABEL_INVALID,          /* invalid or not initialized */
         LABEL_INITIALIZED,      /* initialized */
@@ -185,4 +175,14 @@ static inline struct ipc_security_struct *selinux_ipc(
         return ipc->security + selinux_blob_sizes.lbs_ipc;
 }
 
+/*
+ * get the subjective security ID of the current task
+ */
+static inline u32 current_sid(void)
+{
+        const struct task_security_struct *tsec = selinux_cred(current_cred());
+
+        return tsec->sid;
+}
+
 #endif /* _SELINUX_OBJSEC_H_ */
diff --git a/security/selinux/netif.c b/security/selinux/netif.c
index 9cb83eeee1d9..e40fecd73752 100644
--- a/security/selinux/netif.c
+++ b/security/selinux/netif.c
@@ -132,9 +132,9 @@ static void sel_netif_destroy(struct sel_netif *netif)
  */
 static int sel_netif_sid_slow(struct net *ns, int ifindex, u32 *sid)
 {
-        int ret;
+        int ret = 0;
         struct sel_netif *netif;
-        struct sel_netif *new = NULL;
+        struct sel_netif *new;
         struct net_device *dev;
 
         /* NOTE: we always use init's network namespace since we don't
@@ -151,32 +151,27 @@ static int sel_netif_sid_slow(struct net *ns, int ifindex, u32 *sid)
         netif = sel_netif_find(ns, ifindex);
         if (netif != NULL) {
                 *sid = netif->nsec.sid;
-                ret = 0;
                 goto out;
         }
-        new = kzalloc(sizeof(*new), GFP_ATOMIC);
-        if (new == NULL) {
-                ret = -ENOMEM;
-                goto out;
-        }
-        ret = security_netif_sid(&selinux_state, dev->name, &new->nsec.sid);
-        if (ret != 0)
-                goto out;
-        new->nsec.ns = ns;
-        new->nsec.ifindex = ifindex;
-        ret = sel_netif_insert(new);
+
+        ret = security_netif_sid(&selinux_state, dev->name, sid);
         if (ret != 0)
                 goto out;
-        *sid = new->nsec.sid;
+        new = kzalloc(sizeof(*new), GFP_ATOMIC);
+        if (new) {
+                new->nsec.ns = ns;
+                new->nsec.ifindex = ifindex;
+                new->nsec.sid = *sid;
+                if (sel_netif_insert(new))
+                        kfree(new);
+        }
 
 out:
         spin_unlock_bh(&sel_netif_lock);
         dev_put(dev);
-        if (unlikely(ret)) {
+        if (unlikely(ret))
                 pr_warn("SELinux: failure in %s(), unable to determine network interface label (%d)\n",
                         __func__, ifindex);
-                kfree(new);
-        }
         return ret;
 }
 
diff --git a/security/selinux/netnode.c b/security/selinux/netnode.c
index cae1fcaffd1a..9ab84efa46c7 100644
--- a/security/selinux/netnode.c
+++ b/security/selinux/netnode.c
@@ -189,9 +189,9 @@ static void sel_netnode_insert(struct sel_netnode *node)
  */
 static int sel_netnode_sid_slow(void *addr, u16 family, u32 *sid)
 {
-        int ret = -ENOMEM;
+        int ret;
         struct sel_netnode *node;
-        struct sel_netnode *new = NULL;
+        struct sel_netnode *new;
 
         spin_lock_bh(&sel_netnode_lock);
         node = sel_netnode_find(addr, family);
@@ -200,38 +200,36 @@ static int sel_netnode_sid_slow(void *addr, u16 family, u32 *sid)
                 spin_unlock_bh(&sel_netnode_lock);
                 return 0;
         }
+
         new = kzalloc(sizeof(*new), GFP_ATOMIC);
-        if (new == NULL)
-                goto out;
         switch (family) {
         case PF_INET:
                 ret = security_node_sid(&selinux_state, PF_INET,
                                         addr, sizeof(struct in_addr), sid);
-                new->nsec.addr.ipv4 = *(__be32 *)addr;
+                if (new)
+                        new->nsec.addr.ipv4 = *(__be32 *)addr;
                 break;
         case PF_INET6:
                 ret = security_node_sid(&selinux_state, PF_INET6,
                                         addr, sizeof(struct in6_addr), sid);
-                new->nsec.addr.ipv6 = *(struct in6_addr *)addr;
+                if (new)
+                        new->nsec.addr.ipv6 = *(struct in6_addr *)addr;
                 break;
         default:
                 BUG();
                 ret = -EINVAL;
         }
-        if (ret != 0)
-                goto out;
-
-        new->nsec.family = family;
-        new->nsec.sid = *sid;
-        sel_netnode_insert(new);
+        if (ret == 0 && new) {
+                new->nsec.family = family;
+                new->nsec.sid = *sid;
+                sel_netnode_insert(new);
+        } else
+                kfree(new);
 
-out:
         spin_unlock_bh(&sel_netnode_lock);
-        if (unlikely(ret)) {
+        if (unlikely(ret))
                 pr_warn("SELinux: failure in %s(), unable to determine network node label\n",
                         __func__);
-                kfree(new);
-        }
         return ret;
 }
 
diff --git a/security/selinux/netport.c b/security/selinux/netport.c
index 364b6d5b8968..3f8b2c0458c8 100644
--- a/security/selinux/netport.c
+++ b/security/selinux/netport.c
@@ -137,9 +137,9 @@ static void sel_netport_insert(struct sel_netport *port)
  */
 static int sel_netport_sid_slow(u8 protocol, u16 pnum, u32 *sid)
 {
-        int ret = -ENOMEM;
+        int ret;
         struct sel_netport *port;
-        struct sel_netport *new = NULL;
+        struct sel_netport *new;
 
         spin_lock_bh(&sel_netport_lock);
         port = sel_netport_find(protocol, pnum);
@@ -148,25 +148,23 @@ static int sel_netport_sid_slow(u8 protocol, u16 pnum, u32 *sid)
                 spin_unlock_bh(&sel_netport_lock);
                 return 0;
         }
-        new = kzalloc(sizeof(*new), GFP_ATOMIC);
-        if (new == NULL)
-                goto out;
+
         ret = security_port_sid(&selinux_state, protocol, pnum, sid);
         if (ret != 0)
                 goto out;
-
-        new->psec.port = pnum;
-        new->psec.protocol = protocol;
-        new->psec.sid = *sid;
-        sel_netport_insert(new);
+        new = kzalloc(sizeof(*new), GFP_ATOMIC);
+        if (new) {
+                new->psec.port = pnum;
+                new->psec.protocol = protocol;
+                new->psec.sid = *sid;
+                sel_netport_insert(new);
+        }
 
 out:
         spin_unlock_bh(&sel_netport_lock);
-        if (unlikely(ret)) {
+        if (unlikely(ret))
                 pr_warn("SELinux: failure in %s(), unable to determine network port label\n",
                         __func__);
-                kfree(new);
-        }
         return ret;
 }
 
diff --git a/security/selinux/ss/policydb.c b/security/selinux/ss/policydb.c
index f8efaa9f647c..1260f5fb766e 100644
--- a/security/selinux/ss/policydb.c
+++ b/security/selinux/ss/policydb.c
@@ -177,6 +177,195 @@ static struct policydb_compat_info *policydb_lookup_compat(int version)
 }
 
 /*
+ * The following *_destroy functions are used to
+ * free any memory allocated for each kind of
+ * symbol data in the policy database.
+ */
+
+static int perm_destroy(void *key, void *datum, void *p)
+{
+        kfree(key);
+        kfree(datum);
+        return 0;
+}
+
+static int common_destroy(void *key, void *datum, void *p)
+{
+        struct common_datum *comdatum;
+
+        kfree(key);
+        if (datum) {
+                comdatum = datum;
+                hashtab_map(comdatum->permissions.table, perm_destroy, NULL);
+                hashtab_destroy(comdatum->permissions.table);
+        }
+        kfree(datum);
+        return 0;
+}
+
+static void constraint_expr_destroy(struct constraint_expr *expr)
+{
+        if (expr) {
+                ebitmap_destroy(&expr->names);
+                if (expr->type_names) {
+                        ebitmap_destroy(&expr->type_names->types);
+                        ebitmap_destroy(&expr->type_names->negset);
+                        kfree(expr->type_names);
+                }
+                kfree(expr);
+        }
+}
+
+static int cls_destroy(void *key, void *datum, void *p)
+{
+        struct class_datum *cladatum;
+        struct constraint_node *constraint, *ctemp;
+        struct constraint_expr *e, *etmp;
+
+        kfree(key);
+        if (datum) {
+                cladatum = datum;
+                hashtab_map(cladatum->permissions.table, perm_destroy, NULL);
+                hashtab_destroy(cladatum->permissions.table);
+                constraint = cladatum->constraints;
+                while (constraint) {
+                        e = constraint->expr;
+                        while (e) {
+                                etmp = e;
+                                e = e->next;
+                                constraint_expr_destroy(etmp);
+                        }
+                        ctemp = constraint;
+                        constraint = constraint->next;
+                        kfree(ctemp);
+                }
+
+                constraint = cladatum->validatetrans;
+                while (constraint) {
+                        e = constraint->expr;
+                        while (e) {
+                                etmp = e;
+                                e = e->next;
+                                constraint_expr_destroy(etmp);
+                        }
+                        ctemp = constraint;
+                        constraint = constraint->next;
+                        kfree(ctemp);
+                }
+                kfree(cladatum->comkey);
+        }
+        kfree(datum);
+        return 0;
+}
+
+static int role_destroy(void *key, void *datum, void *p)
+{
+        struct role_datum *role;
+
+        kfree(key);
+        if (datum) {
+                role = datum;
+                ebitmap_destroy(&role->dominates);
+                ebitmap_destroy(&role->types);
+        }
+        kfree(datum);
+        return 0;
+}
+
+static int type_destroy(void *key, void *datum, void *p)
+{
+        kfree(key);
+        kfree(datum);
+        return 0;
+}
+
+static int user_destroy(void *key, void *datum, void *p)
+{
+        struct user_datum *usrdatum;
+
+        kfree(key);
+        if (datum) {
+                usrdatum = datum;
+                ebitmap_destroy(&usrdatum->roles);
+                ebitmap_destroy(&usrdatum->range.level[0].cat);
+                ebitmap_destroy(&usrdatum->range.level[1].cat);
+                ebitmap_destroy(&usrdatum->dfltlevel.cat);
+        }
+        kfree(datum);
+        return 0;
+}
+
+static int sens_destroy(void *key, void *datum, void *p)
+{
+        struct level_datum *levdatum;
+
+        kfree(key);
+        if (datum) {
+                levdatum = datum;
+                if (levdatum->level)
+                        ebitmap_destroy(&levdatum->level->cat);
+                kfree(levdatum->level);
+        }
+        kfree(datum);
+        return 0;
+}
+
+static int cat_destroy(void *key, void *datum, void *p)
+{
+        kfree(key);
+        kfree(datum);
+        return 0;
+}
+
+static int (*destroy_f[SYM_NUM]) (void *key, void *datum, void *datap) =
+{
+        common_destroy,
+        cls_destroy,
+        role_destroy,
+        type_destroy,
+        user_destroy,
+        cond_destroy_bool,
+        sens_destroy,
+        cat_destroy,
+};
+
+static int filenametr_destroy(void *key, void *datum, void *p)
+{
+        struct filename_trans *ft = key;
+
+        kfree(ft->name);
+        kfree(key);
+        kfree(datum);
+        cond_resched();
+        return 0;
+}
+
+static int range_tr_destroy(void *key, void *datum, void *p)
+{
+        struct mls_range *rt = datum;
+
+        kfree(key);
+        ebitmap_destroy(&rt->level[0].cat);
+        ebitmap_destroy(&rt->level[1].cat);
+        kfree(datum);
+        cond_resched();
+        return 0;
+}
+
+static void ocontext_destroy(struct ocontext *c, int i)
+{
+        if (!c)
+                return;
+
+        context_destroy(&c->context[0]);
+        context_destroy(&c->context[1]);
+        if (i == OCON_ISID || i == OCON_FS ||
+            i == OCON_NETIF || i == OCON_FSUSE)
+                kfree(c->u.name);
+        kfree(c);
+}
+
+/*
  * Initialize the role table.
  */
 static int roles_init(struct policydb *p)
@@ -250,6 +439,7 @@ static int filenametr_cmp(struct hashtab *h, const void *k1, const void *k2)
 static u32 rangetr_hash(struct hashtab *h, const void *k)
 {
         const struct range_trans *key = k;
+
         return (key->source_type + (key->target_type << 3) +
                 (key->target_class << 5)) & (h->size - 1);
 }
@@ -272,8 +462,6 @@ static int rangetr_cmp(struct hashtab *h, const void *k1, const void *k2)
         return v;
 }
 
-static int (*destroy_f[SYM_NUM]) (void *key, void *datum, void *datap);
-
 /*
  * Initialize a policy database structure.
  */
@@ -301,7 +489,8 @@ static int policydb_init(struct policydb *p)
         if (rc)
                 goto out;
 
-        p->filename_trans = hashtab_create(filenametr_hash, filenametr_cmp, (1 << 10));
+        p->filename_trans = hashtab_create(filenametr_hash, filenametr_cmp,
+                                           (1 << 10));
         if (!p->filename_trans) {
                 rc = -ENOMEM;
                 goto out;
@@ -399,7 +588,7 @@ static int type_index(void *key, void *datum, void *datap)
                     || typdatum->bounds > p->p_types.nprim)
                         return -EINVAL;
                 p->sym_val_to_name[SYM_TYPES][typdatum->value - 1] = key;
-                p->type_val_to_struct_array[typdatum->value - 1] = typdatum;
+                p->type_val_to_struct[typdatum->value - 1] = typdatum;
         }
 
         return 0;
@@ -477,9 +666,9 @@ static void hash_eval(struct hashtab *h, const char *hash_name)
         struct hashtab_info info;
 
         hashtab_stat(h, &info);
-        pr_debug("SELinux: %s:  %d entries and %d/%d buckets used, "
-               "longest chain length %d\n", hash_name, h->nel,
-               info.slots_used, h->size, info.max_chain_len);
+        pr_debug("SELinux: %s:  %d entries and %d/%d buckets used, longest chain length %d\n",
+                 hash_name, h->nel, info.slots_used, h->size,
+                 info.max_chain_len);
 }
 
 static void symtab_hash_eval(struct symtab *s)
@@ -541,10 +730,10 @@ static int policydb_index(struct policydb *p)
         if (!p->user_val_to_struct)
                 return -ENOMEM;
 
-        p->type_val_to_struct_array = kvcalloc(p->p_types.nprim,
-                                               sizeof(*p->type_val_to_struct_array),
-                                               GFP_KERNEL);
-        if (!p->type_val_to_struct_array)
+        p->type_val_to_struct = kvcalloc(p->p_types.nprim,
+                                         sizeof(*p->type_val_to_struct),
+                                         GFP_KERNEL);
+        if (!p->type_val_to_struct)
                 return -ENOMEM;
 
         rc = cond_init_bool_indexes(p);
@@ -568,193 +757,6 @@ out:
 }
 
 /*
- * The following *_destroy functions are used to
- * free any memory allocated for each kind of
- * symbol data in the policy database.
- */
-
-static int perm_destroy(void *key, void *datum, void *p)
-{
-        kfree(key);
-        kfree(datum);
-        return 0;
-}
-
-static int common_destroy(void *key, void *datum, void *p)
-{
-        struct common_datum *comdatum;
-
-        kfree(key);
-        if (datum) {
-                comdatum = datum;
-                hashtab_map(comdatum->permissions.table, perm_destroy, NULL);
-                hashtab_destroy(comdatum->permissions.table);
-        }
-        kfree(datum);
-        return 0;
-}
-
-static void constraint_expr_destroy(struct constraint_expr *expr)
-{
-        if (expr) {
-                ebitmap_destroy(&expr->names);
-                if (expr->type_names) {
-                        ebitmap_destroy(&expr->type_names->types);
-                        ebitmap_destroy(&expr->type_names->negset);
-                        kfree(expr->type_names);
-                }
-                kfree(expr);
-        }
-}
-
-static int cls_destroy(void *key, void *datum, void *p)
-{
-        struct class_datum *cladatum;
-        struct constraint_node *constraint, *ctemp;
-        struct constraint_expr *e, *etmp;
-
-        kfree(key);
-        if (datum) {
-                cladatum = datum;
-                hashtab_map(cladatum->permissions.table, perm_destroy, NULL);
-                hashtab_destroy(cladatum->permissions.table);
-                constraint = cladatum->constraints;
-                while (constraint) {
-                        e = constraint->expr;
-                        while (e) {
-                                etmp = e;
-                                e = e->next;
-                                constraint_expr_destroy(etmp);
-                        }
-                        ctemp = constraint;
-                        constraint = constraint->next;
-                        kfree(ctemp);
-                }
-
-                constraint = cladatum->validatetrans;
-                while (constraint) {
-                        e = constraint->expr;
-                        while (e) {
-                                etmp = e;
-                                e = e->next;
-                                constraint_expr_destroy(etmp);
-                        }
-                        ctemp = constraint;
-                        constraint = constraint->next;
-                        kfree(ctemp);
-                }
-                kfree(cladatum->comkey);
-        }
-        kfree(datum);
-        return 0;
-}
-
-static int role_destroy(void *key, void *datum, void *p)
-{
-        struct role_datum *role;
-
-        kfree(key);
-        if (datum) {
-                role = datum;
-                ebitmap_destroy(&role->dominates);
-                ebitmap_destroy(&role->types);
-        }
-        kfree(datum);
-        return 0;
-}
-
-static int type_destroy(void *key, void *datum, void *p)
-{
-        kfree(key);
-        kfree(datum);
-        return 0;
-}
-
-static int user_destroy(void *key, void *datum, void *p)
-{
-        struct user_datum *usrdatum;
-
-        kfree(key);
-        if (datum) {
-                usrdatum = datum;
-                ebitmap_destroy(&usrdatum->roles);
-                ebitmap_destroy(&usrdatum->range.level[0].cat);
-                ebitmap_destroy(&usrdatum->range.level[1].cat);
-                ebitmap_destroy(&usrdatum->dfltlevel.cat);
-        }
-        kfree(datum);
-        return 0;
-}
-
-static int sens_destroy(void *key, void *datum, void *p)
-{
-        struct level_datum *levdatum;
-
-        kfree(key);
-        if (datum) {
-                levdatum = datum;
-                if (levdatum->level)
-                        ebitmap_destroy(&levdatum->level->cat);
-                kfree(levdatum->level);
-        }
-        kfree(datum);
-        return 0;
-}
-
-static int cat_destroy(void *key, void *datum, void *p)
-{
-        kfree(key);
-        kfree(datum);
-        return 0;
-}
-
-static int (*destroy_f[SYM_NUM]) (void *key, void *datum, void *datap) =
-{
-        common_destroy,
-        cls_destroy,
-        role_destroy,
-        type_destroy,
-        user_destroy,
-        cond_destroy_bool,
-        sens_destroy,
-        cat_destroy,
-};
-
-static int filenametr_destroy(void *key, void *datum, void *p)
-{
-        struct filename_trans *ft = key;
-        kfree(ft->name);
-        kfree(key);
-        kfree(datum);
-        cond_resched();
-        return 0;
-}
-
-static int range_tr_destroy(void *key, void *datum, void *p)
-{
-        struct mls_range *rt = datum;
-        kfree(key);
-        ebitmap_destroy(&rt->level[0].cat);
-        ebitmap_destroy(&rt->level[1].cat);
-        kfree(datum);
-        cond_resched();
-        return 0;
-}
-
-static void ocontext_destroy(struct ocontext *c, int i)
-{
-        if (!c)
-                return;
-
-        context_destroy(&c->context[0]);
-        context_destroy(&c->context[1]);
-        if (i == OCON_ISID || i == OCON_FS ||
-            i == OCON_NETIF || i == OCON_FSUSE)
-                kfree(c->u.name);
-        kfree(c);
-}
-
-/*
  * Free any memory allocated by a policy database structure.
  */
 void policydb_destroy(struct policydb *p)
@@ -777,7 +779,7 @@ void policydb_destroy(struct policydb *p)
         kfree(p->class_val_to_struct);
         kfree(p->role_val_to_struct);
         kfree(p->user_val_to_struct);
-        kvfree(p->type_val_to_struct_array);
+        kvfree(p->type_val_to_struct);
 
         avtab_destroy(&p->te_avtab);
 
@@ -1722,7 +1724,7 @@ static int type_bounds_sanity_check(void *key, void *datum, void *datap)
                         return -EINVAL;
                 }
 
-                upper = p->type_val_to_struct_array[upper->bounds - 1];
+                upper = p->type_val_to_struct[upper->bounds - 1];
                 BUG_ON(!upper);
 
                 if (upper->attribute) {
diff --git a/security/selinux/ss/policydb.h b/security/selinux/ss/policydb.h
index fcc6366b447f..162d0e79b85b 100644
--- a/security/selinux/ss/policydb.h
+++ b/security/selinux/ss/policydb.h
@@ -253,7 +253,7 @@ struct policydb {
         struct class_datum **class_val_to_struct;
         struct role_datum **role_val_to_struct;
         struct user_datum **user_val_to_struct;
-        struct type_datum **type_val_to_struct_array;
+        struct type_datum **type_val_to_struct;
 
         /* type enforcement access vectors and transitions */
         struct avtab te_avtab;
diff --git a/security/selinux/ss/services.c b/security/selinux/ss/services.c
index d61563a3695e..3a29e7c24ba9 100644
--- a/security/selinux/ss/services.c
+++ b/security/selinux/ss/services.c
@@ -542,13 +542,13 @@ static void type_attribute_bounds_av(struct policydb *policydb,
         struct type_datum *target;
         u32 masked = 0;
 
-        source = policydb->type_val_to_struct_array[scontext->type - 1];
+        source = policydb->type_val_to_struct[scontext->type - 1];
         BUG_ON(!source);
 
         if (!source->bounds)
                 return;
 
-        target = policydb->type_val_to_struct_array[tcontext->type - 1];
+        target = policydb->type_val_to_struct[tcontext->type - 1];
         BUG_ON(!target);
 
         memset(&lo_avd, 0, sizeof(lo_avd));
@@ -891,7 +891,7 @@ int security_bounded_transition(struct selinux_state *state,
 
         index = new_context->type;
         while (true) {
-                type = policydb->type_val_to_struct_array[index - 1];
+                type = policydb->type_val_to_struct[index - 1];
                 BUG_ON(!type);
 
                 /* not bounded anymore */
diff --git a/security/selinux/ss/sidtab.c b/security/selinux/ss/sidtab.c
index 1f0a6eaa2d6a..7d49994e8d5f 100644
--- a/security/selinux/ss/sidtab.c
+++ b/security/selinux/ss/sidtab.c
@@ -12,7 +12,7 @@
 #include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/spinlock.h>
-#include <linux/atomic.h>
+#include <asm/barrier.h>
 #include "flask.h"
 #include "security.h"
 #include "sidtab.h"
@@ -23,14 +23,14 @@ int sidtab_init(struct sidtab *s)
 
         memset(s->roots, 0, sizeof(s->roots));
 
+        /* max count is SIDTAB_MAX so valid index is always < SIDTAB_MAX */
         for (i = 0; i < SIDTAB_RCACHE_SIZE; i++)
-                atomic_set(&s->rcache[i], -1);
+                s->rcache[i] = SIDTAB_MAX;
 
         for (i = 0; i < SECINITSID_NUM; i++)
                 s->isids[i].set = 0;
 
-        atomic_set(&s->count, 0);
-
+        s->count = 0;
         s->convert = NULL;
 
         spin_lock_init(&s->lock);
@@ -130,14 +130,12 @@ static struct context *sidtab_do_lookup(struct sidtab *s, u32 index, int alloc)
 
 static struct context *sidtab_lookup(struct sidtab *s, u32 index)
 {
-        u32 count = (u32)atomic_read(&s->count);
+        /* read entries only after reading count */
+        u32 count = smp_load_acquire(&s->count);
 
         if (index >= count)
                 return NULL;
 
-        /* read entries after reading count */
-        smp_rmb();
-
         return sidtab_do_lookup(s, index, 0);
 }
 
@@ -210,10 +208,10 @@ static int sidtab_find_context(union sidtab_entry_inner entry,
 static void sidtab_rcache_update(struct sidtab *s, u32 index, u32 pos)
 {
         while (pos > 0) {
-                atomic_set(&s->rcache[pos], atomic_read(&s->rcache[pos - 1]));
+                WRITE_ONCE(s->rcache[pos], READ_ONCE(s->rcache[pos - 1]));
                 --pos;
         }
-        atomic_set(&s->rcache[0], (int)index);
+        WRITE_ONCE(s->rcache[0], index);
 }
 
 static void sidtab_rcache_push(struct sidtab *s, u32 index)
@@ -227,14 +225,14 @@ static int sidtab_rcache_search(struct sidtab *s, struct context *context,
         u32 i;
 
         for (i = 0; i < SIDTAB_RCACHE_SIZE; i++) {
-                int v = atomic_read(&s->rcache[i]);
+                u32 v = READ_ONCE(s->rcache[i]);
 
-                if (v < 0)
+                if (v >= SIDTAB_MAX)
                         continue;
 
-                if (context_cmp(sidtab_do_lookup(s, (u32)v, 0), context)) {
-                        sidtab_rcache_update(s, (u32)v, i);
-                        *index = (u32)v;
+                if (context_cmp(sidtab_do_lookup(s, v, 0), context)) {
+                        sidtab_rcache_update(s, v, i);
+                        *index = v;
                         return 0;
                 }
         }
@@ -245,8 +243,7 @@ static int sidtab_reverse_lookup(struct sidtab *s, struct context *context,
                                  u32 *index)
 {
         unsigned long flags;
-        u32 count = (u32)atomic_read(&s->count);
-        u32 count_locked, level, pos;
+        u32 count, count_locked, level, pos;
         struct sidtab_convert_params *convert;
         struct context *dst, *dst_convert;
         int rc;
@@ -255,11 +252,10 @@ static int sidtab_reverse_lookup(struct sidtab *s, struct context *context,
         if (rc == 0)
                 return 0;
 
+        /* read entries only after reading count */
+        count = smp_load_acquire(&s->count);
         level = sidtab_level_from_count(count);
 
-        /* read entries after reading count */
-        smp_rmb();
-
         pos = 0;
         rc = sidtab_find_context(s->roots[level], &pos, count, level,
                                  context, index);
@@ -272,7 +268,7 @@ static int sidtab_reverse_lookup(struct sidtab *s, struct context *context,
         spin_lock_irqsave(&s->lock, flags);
 
         convert = s->convert;
-        count_locked = (u32)atomic_read(&s->count);
+        count_locked = s->count;
         level = sidtab_level_from_count(count_locked);
 
         /* if count has changed before we acquired the lock, then catch up */
@@ -320,7 +316,7 @@ static int sidtab_reverse_lookup(struct sidtab *s, struct context *context,
                 }
 
                 /* at this point we know the insert won't fail */
-                atomic_set(&convert->target->count, count + 1);
+                convert->target->count = count + 1;
         }
 
         if (context->len)
@@ -331,9 +327,7 @@ static int sidtab_reverse_lookup(struct sidtab *s, struct context *context,
         *index = count;
 
         /* write entries before writing new count */
-        smp_wmb();
-
-        atomic_set(&s->count, count + 1);
+        smp_store_release(&s->count, count + 1);
 
         rc = 0;
 out_unlock:
@@ -423,7 +417,7 @@ int sidtab_convert(struct sidtab *s, struct sidtab_convert_params *params)
                 return -EBUSY;
         }
 
-        count = (u32)atomic_read(&s->count);
+        count = s->count;
         level = sidtab_level_from_count(count);
 
         /* allocate last leaf in the new sidtab (to avoid race with
@@ -436,7 +430,7 @@ int sidtab_convert(struct sidtab *s, struct sidtab_convert_params *params)
         }
 
         /* set count in case no new entries are added during conversion */
-        atomic_set(&params->target->count, count);
+        params->target->count = count;
 
         /* enable live convert of new entries */
         s->convert = params;
diff --git a/security/selinux/ss/sidtab.h b/security/selinux/ss/sidtab.h
index bbd5c0d1f3bd..1f4763141aa1 100644
--- a/security/selinux/ss/sidtab.h
+++ b/security/selinux/ss/sidtab.h
@@ -40,8 +40,8 @@ union sidtab_entry_inner {
 #define SIDTAB_LEAF_ENTRIES \
         (SIDTAB_NODE_ALLOC_SIZE / sizeof(struct sidtab_entry_leaf))
 
-#define SIDTAB_MAX_BITS 31 /* limited to INT_MAX due to atomic_t range */
-#define SIDTAB_MAX (((u32)1 << SIDTAB_MAX_BITS) - 1)
+#define SIDTAB_MAX_BITS 32
+#define SIDTAB_MAX U32_MAX
 /* ensure enough tree levels for SIDTAB_MAX entries */
 #define SIDTAB_MAX_LEVEL \
         DIV_ROUND_UP(SIDTAB_MAX_BITS - size_to_shift(SIDTAB_LEAF_ENTRIES), \
@@ -69,13 +69,22 @@ struct sidtab_convert_params {
 #define SIDTAB_RCACHE_SIZE 3
 
 struct sidtab {
+        /*
+         * lock-free read access only for as many items as a prior read of
+         * 'count'
+         */
         union sidtab_entry_inner roots[SIDTAB_MAX_LEVEL + 1];
-        atomic_t count;
+        /*
+         * access atomically via {READ|WRITE}_ONCE(); only increment under
+         * spinlock
+         */
+        u32 count;
+        /* access only under spinlock */
         struct sidtab_convert_params *convert;
         spinlock_t lock;
 
-        /* reverse lookup cache */
-        atomic_t rcache[SIDTAB_RCACHE_SIZE];
+        /* reverse lookup cache - access atomically via {READ|WRITE}_ONCE() */
+        u32 rcache[SIDTAB_RCACHE_SIZE];
 
         /* index == SID - 1 (no entry for SECSID_NULL) */
         struct sidtab_isid_entry isids[SECINITSID_NUM];
diff --git a/security/smack/smack_access.c b/security/smack/smack_access.c
index f1c93a7be9ec..38ac3da4e791 100644
--- a/security/smack/smack_access.c
+++ b/security/smack/smack_access.c
@@ -465,7 +465,7 @@ char *smk_parse_smack(const char *string, int len)
         if (i == 0 || i >= SMK_LONGLABEL)
                 return ERR_PTR(-EINVAL);
 
-        smack = kzalloc(i + 1, GFP_KERNEL);
+        smack = kzalloc(i + 1, GFP_NOFS);
         if (smack == NULL)
                 return ERR_PTR(-ENOMEM);
 
@@ -500,7 +500,7 @@ int smk_netlbl_mls(int level, char *catset, struct netlbl_lsm_secattr *sap,
                         if ((m & *cp) == 0)
                                 continue;
                         rc = netlbl_catmap_setbit(&sap->attr.mls.cat,
-                                                  cat, GFP_KERNEL);
+                                                  cat, GFP_NOFS);
                         if (rc < 0) {
                                 netlbl_catmap_free(sap->attr.mls.cat);
                                 return rc;
@@ -536,7 +536,7 @@ struct smack_known *smk_import_entry(const char *string, int len)
         if (skp != NULL)
                 goto freeout;
 
-        skp = kzalloc(sizeof(*skp), GFP_KERNEL);
+        skp = kzalloc(sizeof(*skp), GFP_NOFS);
         if (skp == NULL) {
                 skp = ERR_PTR(-ENOMEM);
                 goto freeout;
diff --git a/security/smack/smack_lsm.c b/security/smack/smack_lsm.c
index 4c5e5a438f8b..abeb09c30633 100644
--- a/security/smack/smack_lsm.c
+++ b/security/smack/smack_lsm.c
@@ -288,7 +288,7 @@ static struct smack_known *smk_fetch(const char *name, struct inode *ip,
         if (!(ip->i_opflags & IOP_XATTR))
                 return ERR_PTR(-EOPNOTSUPP);
 
-        buffer = kzalloc(SMK_LONGLABEL, GFP_KERNEL);
+        buffer = kzalloc(SMK_LONGLABEL, GFP_NOFS);
         if (buffer == NULL)
                 return ERR_PTR(-ENOMEM);
 
@@ -307,7 +307,7 @@ static struct smack_known *smk_fetch(const char *name, struct inode *ip,
 
 /**
  * init_inode_smack - initialize an inode security blob
- * @isp: the blob to initialize
+ * @inode: inode to extract the info from
  * @skp: a pointer to the Smack label entry to use in the blob
  *
  */
@@ -509,7 +509,7 @@ static int smack_ptrace_traceme(struct task_struct *ptp)
 
 /**
  * smack_syslog - Smack approval on syslog
- * @type: message type
+ * @typefrom_file: unused
  *
  * Returns 0 on success, error code otherwise.
  */
@@ -765,7 +765,7 @@ static int smack_sb_eat_lsm_opts(char *options, void **mnt_opts)
 /**
  * smack_set_mnt_opts - set Smack specific mount options
  * @sb: the file system superblock
- * @opts: Smack mount options
+ * @mnt_opts: Smack mount options
  * @kern_flags: mount option from kernel space or user space
  * @set_kern_flags: where to store converted mount opts
  *
@@ -937,7 +937,8 @@ static int smack_bprm_set_creds(struct linux_binprm *bprm)
 
                 if (rc != 0)
                         return rc;
-        } else if (bprm->unsafe)
+        }
+        if (bprm->unsafe & ~LSM_UNSAFE_PTRACE)
                 return -EPERM;
 
         bsp->smk_task = isp->smk_task;
@@ -958,7 +959,7 @@ static int smack_bprm_set_creds(struct linux_binprm *bprm)
  * smack_inode_alloc_security - allocate an inode blob
  * @inode: the inode in need of a blob
  *
- * Returns 0 if it gets a blob, -ENOMEM otherwise
+ * Returns 0
  */
 static int smack_inode_alloc_security(struct inode *inode)
 {
@@ -1164,7 +1165,7 @@ static int smack_inode_rename(struct inode *old_inode,
  *
  * This is the important Smack hook.
  *
- * Returns 0 if access is permitted, -EACCES otherwise
+ * Returns 0 if access is permitted, an error code otherwise
  */
 static int smack_inode_permission(struct inode *inode, int mask)
 {
@@ -1222,8 +1223,7 @@ static int smack_inode_setattr(struct dentry *dentry, struct iattr *iattr)
 
 /**
  * smack_inode_getattr - Smack check for getting attributes
- * @mnt: vfsmount of the object
- * @dentry: the object
+ * @path: path to extract the info from
  *
  * Returns 0 if access is permitted, an error code otherwise
  */
@@ -1870,14 +1870,13 @@ static int smack_file_receive(struct file *file)
 /**
  * smack_file_open - Smack dentry open processing
  * @file: the object
- * @cred: task credential
  *
  * Set the security blob in the file structure.
  * Allow the open only if the task has read access. There are
  * many read operations (e.g. fstat) that you can do with an
  * fd even if you have the file open write-only.
  *
- * Returns 0
+ * Returns 0 if current has access, error code otherwise
  */
 static int smack_file_open(struct file *file)
 {
@@ -1900,7 +1899,7 @@ static int smack_file_open(struct file *file)
 
 /**
  * smack_cred_alloc_blank - "allocate" blank task-level security credentials
- * @new: the new credentials
+ * @cred: the new credentials
  * @gfp: the atomicity of any memory allocations
  *
  * Prepare a blank set of credentials for modification.  This must allocate all
@@ -1983,7 +1982,7 @@ static void smack_cred_transfer(struct cred *new, const struct cred *old)
 
 /**
  * smack_cred_getsecid - get the secid corresponding to a creds structure
- * @c: the object creds
+ * @cred: the object creds
  * @secid: where to put the result
  *
  * Sets the secid to contain a u32 version of the smack label.
@@ -2140,8 +2139,6 @@ static int smack_task_getioprio(struct task_struct *p)
 /**
  * smack_task_setscheduler - Smack check on setting scheduler
  * @p: the task object
- * @policy: unused
- * @lp: unused
  *
  * Return 0 if read access is permitted
  */
@@ -2611,8 +2608,9 @@ static void smk_ipv6_port_label(struct socket *sock, struct sockaddr *address)
 
 /**
  * smk_ipv6_port_check - check Smack port access
- * @sock: socket
+ * @sk: socket
  * @address: address
+ * @act: the action being taken
  *
  * Create or update the port list entry
  */
@@ -2782,7 +2780,7 @@ static int smack_socket_post_create(struct socket *sock, int family,
  *
  * Cross reference the peer labels for SO_PEERSEC
  *
- * Returns 0 on success, and error code otherwise
+ * Returns 0
  */
 static int smack_socket_socketpair(struct socket *socka,
                                    struct socket *sockb)
@@ -3014,13 +3012,13 @@ static int smack_shm_shmctl(struct kern_ipc_perm *isp, int cmd)
  *
  * Returns 0 if current has the requested access, error code otherwise
  */
-static int smack_shm_shmat(struct kern_ipc_perm *ipc, char __user *shmaddr,
+static int smack_shm_shmat(struct kern_ipc_perm *isp, char __user *shmaddr,
                            int shmflg)
 {
         int may;
 
         may = smack_flags_to_may(shmflg);
-        return smk_curacc_shm(ipc, may);
+        return smk_curacc_shm(isp, may);
 }
 
 /**
@@ -3925,6 +3923,8 @@ access_check:
                         skp = smack_ipv6host_label(&sadd);
                 if (skp == NULL)
                         skp = smack_net_ambient;
+                if (skb == NULL)
+                        break;
 #ifdef CONFIG_AUDIT
                 smk_ad_init_net(&ad, __func__, LSM_AUDIT_DATA_NET, &net);
                 ad.a.u.net->family = family;
@@ -4762,7 +4762,7 @@ static __init void init_smack_known_list(void)
 /**
  * smack_init - initialize the smack system
  *
- * Returns 0
+ * Returns 0 on success, -ENOMEM is there's no memory
  */
 static __init int smack_init(void)
 {
diff --git a/tools/hv/Build b/tools/hv/Build
new file mode 100644
index 000000000000..6cf51fa4b306
--- /dev/null
+++ b/tools/hv/Build
@@ -0,0 +1,3 @@
+hv_kvp_daemon-y += hv_kvp_daemon.o
+hv_vss_daemon-y += hv_vss_daemon.o
+hv_fcopy_daemon-y += hv_fcopy_daemon.o
diff --git a/tools/hv/Makefile b/tools/hv/Makefile
index 5db5e62cebda..b57143d9459c 100644
--- a/tools/hv/Makefile
+++ b/tools/hv/Makefile
@@ -1,28 +1,55 @@
 # SPDX-License-Identifier: GPL-2.0
 # Makefile for Hyper-V tools
-
-WARNINGS = -Wall -Wextra
-CFLAGS = $(WARNINGS) -g $(shell getconf LFS_CFLAGS)
-
-CFLAGS += -D__EXPORTED_HEADERS__ -I../../include/uapi -I../../include
+include ../scripts/Makefile.include
 
 sbindir ?= /usr/sbin
 libexecdir ?= /usr/libexec
 sharedstatedir ?= /var/lib
 
-ALL_PROGRAMS := hv_kvp_daemon hv_vss_daemon hv_fcopy_daemon
+ifeq ($(srctree),)
+srctree := $(patsubst %/,%,$(dir $(CURDIR)))
+srctree := $(patsubst %/,%,$(dir $(srctree)))
+endif
+
+# Do not use make's built-in rules
+# (this improves performance and avoids hard-to-debug behaviour);
+MAKEFLAGS += -r
+
+override CFLAGS += -O2 -Wall -g -D_GNU_SOURCE -I$(OUTPUT)include
+
+ALL_TARGETS := hv_kvp_daemon hv_vss_daemon hv_fcopy_daemon
+ALL_PROGRAMS := $(patsubst %,$(OUTPUT)%,$(ALL_TARGETS))
 
 ALL_SCRIPTS := hv_get_dhcp_info.sh hv_get_dns_info.sh hv_set_ifconfig.sh
 
 all: $(ALL_PROGRAMS)
 
-%: %.c
-        $(CC) $(CFLAGS) -o $@ $^
+export srctree OUTPUT CC LD CFLAGS
+include $(srctree)/tools/build/Makefile.include
+
+HV_KVP_DAEMON_IN := $(OUTPUT)hv_kvp_daemon-in.o
+$(HV_KVP_DAEMON_IN): FORCE
+        $(Q)$(MAKE) $(build)=hv_kvp_daemon
+$(OUTPUT)hv_kvp_daemon: $(HV_KVP_DAEMON_IN)
+        $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $< -o $@
+
+HV_VSS_DAEMON_IN := $(OUTPUT)hv_vss_daemon-in.o
+$(HV_VSS_DAEMON_IN): FORCE
+        $(Q)$(MAKE) $(build)=hv_vss_daemon
+$(OUTPUT)hv_vss_daemon: $(HV_VSS_DAEMON_IN)
+        $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $< -o $@
+
+HV_FCOPY_DAEMON_IN := $(OUTPUT)hv_fcopy_daemon-in.o
+$(HV_FCOPY_DAEMON_IN): FORCE
+        $(Q)$(MAKE) $(build)=hv_fcopy_daemon
+$(OUTPUT)hv_fcopy_daemon: $(HV_FCOPY_DAEMON_IN)
+        $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $< -o $@
 
 clean:
-        $(RM) hv_kvp_daemon hv_vss_daemon hv_fcopy_daemon
+        rm -f $(ALL_PROGRAMS)
+        find $(if $(OUTPUT),$(OUTPUT),.) -name '*.o' -delete -o -name '\.*.d' -delete
 
-install: all
+install: $(ALL_PROGRAMS)
         install -d -m 755 $(DESTDIR)$(sbindir); \
         install -d -m 755 $(DESTDIR)$(libexecdir)/hypervkvpd; \
         install -d -m 755 $(DESTDIR)$(sharedstatedir); \
@@ -33,3 +60,7 @@ install: all
         for script in $(ALL_SCRIPTS); do \
                 install $$script -m 755 $(DESTDIR)$(libexecdir)/hypervkvpd/$${script%.sh}; \
         done
+
+FORCE:
+
+.PHONY: all install clean FORCE prepare
diff --git a/tools/power/x86/intel-speed-select/isst-config.c b/tools/power/x86/intel-speed-select/isst-config.c
index 59753b3917bb..2a9890c8395a 100644
--- a/tools/power/x86/intel-speed-select/isst-config.c
+++ b/tools/power/x86/intel-speed-select/isst-config.c
@@ -38,6 +38,7 @@ static int fact_avx = 0xFF;
 static unsigned long long fact_trl;
 static int out_format_json;
 static int cmd_help;
+static int force_online_offline;
 
 /* clos related */
 static int current_clos = -1;
@@ -138,14 +139,14 @@ int out_format_is_json(void)
 int get_physical_package_id(int cpu)
 {
         return parse_int_file(
-                1, "/sys/devices/system/cpu/cpu%d/topology/physical_package_id",
+                0, "/sys/devices/system/cpu/cpu%d/topology/physical_package_id",
                 cpu);
 }
 
 int get_physical_core_id(int cpu)
 {
         return parse_int_file(
-                1, "/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
+                0, "/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
 }
 
 int get_physical_die_id(int cpu)
@@ -165,6 +166,26 @@ int get_topo_max_cpus(void)
         return topo_max_cpus;
 }
 
+static void set_cpu_online_offline(int cpu, int state)
+{
+        char buffer[128];
+        int fd;
+
+        snprintf(buffer, sizeof(buffer),
+                 "/sys/devices/system/cpu/cpu%d/online", cpu);
+
+        fd = open(buffer, O_WRONLY);
+        if (fd < 0)
+                err(-1, "%s open failed", buffer);
+
+        if (state)
+                write(fd, "1\n", 2);
+        else
+                write(fd, "0\n", 2);
+
+        close(fd);
+}
+
 #define MAX_PACKAGE_COUNT 8
 #define MAX_DIE_PER_PACKAGE 2
 static void for_each_online_package_in_set(void (*callback)(int, void *, void *,
@@ -402,6 +423,9 @@ void set_cpu_mask_from_punit_coremask(int cpu, unsigned long long core_mask,
                         int j;
 
                         for (j = 0; j < topo_max_cpus; ++j) {
+                                if (!CPU_ISSET_S(j, present_cpumask_size, present_cpumask))
+                                        continue;
+
                                 if (cpu_map[j].pkg_id == pkg_id &&
                                     cpu_map[j].die_id == die_id &&
                                     cpu_map[j].punit_cpu_core == i) {
@@ -484,7 +508,7 @@ int isst_send_mbox_command(unsigned int cpu, unsigned char command,
                 int write = 0;
                 int clos_id, core_id, ret = 0;
 
-                debug_printf("CLOS %d\n", cpu);
+                debug_printf("CPU %d\n", cpu);
 
                 if (parameter & BIT(MBOX_CMD_WRITE_BIT)) {
                         value = req_data;
@@ -649,8 +673,8 @@ static void exec_on_get_ctdp_cpu(int cpu, void *arg1, void *arg2, void *arg3,
         if (ret)
                 perror("get_tdp_*");
         else
-                isst_display_result(cpu, outf, "perf-profile", (char *)arg3,
-                                    *(unsigned int *)arg4);
+                isst_ctdp_display_core_info(cpu, outf, arg3,
+                                            *(unsigned int *)arg4);
 }
 
 #define _get_tdp_level(desc, suffix, object, help)                                \
@@ -733,9 +757,34 @@ static void set_tdp_level_for_cpu(int cpu, void *arg1, void *arg2, void *arg3,
         ret = isst_set_tdp_level(cpu, tdp_level);
         if (ret)
                 perror("set_tdp_level_for_cpu");
-        else
+        else {
                 isst_display_result(cpu, outf, "perf-profile", "set_tdp_level",
                                     ret);
+                if (force_online_offline) {
+                        struct isst_pkg_ctdp_level_info ctdp_level;
+                        int pkg_id = get_physical_package_id(cpu);
+                        int die_id = get_physical_die_id(cpu);
+
+                        fprintf(stderr, "Option is set to online/offline\n");
+                        ctdp_level.core_cpumask_size =
+                                alloc_cpu_set(&ctdp_level.core_cpumask);
+                        isst_get_coremask_info(cpu, tdp_level, &ctdp_level);
+                        if (ctdp_level.cpu_count) {
+                                int i, max_cpus = get_topo_max_cpus();
+                                for (i = 0; i < max_cpus; ++i) {
+                                        if (pkg_id != get_physical_package_id(i) || die_id != get_physical_die_id(i))
+                                                continue;
+                                        if (CPU_ISSET_S(i, ctdp_level.core_cpumask_size, ctdp_level.core_cpumask)) {
+                                                fprintf(stderr, "online cpu %d\n", i);
+                                                set_cpu_online_offline(i, 1);
+                                        } else {
+                                                fprintf(stderr, "offline cpu %d\n", i);
+                                                set_cpu_online_offline(i, 0);
+                                        }
+                                }
+                        }
+                }
+        }
 }
 
 static void set_tdp_level(void)
@@ -744,6 +793,8 @@ static void set_tdp_level(void)
                 fprintf(stderr, "Set Config TDP level\n");
                 fprintf(stderr,
                         "\t Arguments: -l|--level : Specify tdp level\n");
+                fprintf(stderr,
+                        "\t Optional Arguments: -o | online : online/offline for the tdp level\n");
                 exit(0);
         }
 
@@ -1082,6 +1133,40 @@ static void dump_clos_config(void)
         isst_ctdp_display_information_end(outf);
 }
 
+static void get_clos_info_for_cpu(int cpu, void *arg1, void *arg2, void *arg3,
+                                  void *arg4)
+{
+        int enable, ret, prio_type;
+
+        ret = isst_clos_get_clos_information(cpu, &enable, &prio_type);
+        if (ret)
+                perror("isst_clos_get_info");
+        else
+                isst_clos_display_clos_information(cpu, outf, enable, prio_type);
+}
+
+static void dump_clos_info(void)
+{
+        if (cmd_help) {
+                fprintf(stderr,
+                        "Print Intel Speed Select Technology core power information\n");
+                fprintf(stderr, "\tSpecify targeted cpu id with [--cpu|-c]\n");
+                exit(0);
+        }
+
+        if (!max_target_cpus) {
+                fprintf(stderr,
+                        "Invalid target cpu. Specify with [-c|--cpu]\n");
+                exit(0);
+        }
+
+        isst_ctdp_display_information_start(outf);
+        for_each_online_target_cpu_in_set(get_clos_info_for_cpu, NULL,
+                                          NULL, NULL, NULL);
+        isst_ctdp_display_information_end(outf);
+
+}
+
 static void set_clos_config_for_cpu(int cpu, void *arg1, void *arg2, void *arg3,
                                     void *arg4)
 {
@@ -1198,7 +1283,7 @@ static void get_clos_assoc_for_cpu(int cpu, void *arg1, void *arg2, void *arg3,
         if (ret)
                 perror("isst_clos_get_assoc_status");
         else
-                isst_display_result(cpu, outf, "core-power", "get-assoc", clos);
+                isst_clos_display_assoc_information(cpu, outf, clos);
 }
 
 static void get_clos_assoc(void)
@@ -1208,13 +1293,17 @@ static void get_clos_assoc(void)
                 fprintf(stderr, "\tSpecify targeted cpu id with [--cpu|-c]\n");
                 exit(0);
         }
-        if (max_target_cpus)
-                for_each_online_target_cpu_in_set(get_clos_assoc_for_cpu, NULL,
-                                                  NULL, NULL, NULL);
-        else {
+
+        if (!max_target_cpus) {
                 fprintf(stderr,
                         "Invalid target cpu. Specify with [-c|--cpu]\n");
+                exit(0);
         }
+
+        isst_ctdp_display_information_start(outf);
+        for_each_online_target_cpu_in_set(get_clos_assoc_for_cpu, NULL,
+                                          NULL, NULL, NULL);
+        isst_ctdp_display_information_end(outf);
 }
 
 static struct process_cmd_struct isst_cmds[] = {
@@ -1231,10 +1320,11 @@ static struct process_cmd_struct isst_cmds[] = {
         { "turbo-freq", "info", dump_fact_config },
         { "turbo-freq", "enable", set_fact_enable },
         { "turbo-freq", "disable", set_fact_disable },
-        { "core-power", "info", dump_clos_config },
+        { "core-power", "info", dump_clos_info },
         { "core-power", "enable", set_clos_enable },
         { "core-power", "disable", set_clos_disable },
         { "core-power", "config", set_clos_config },
+        { "core-power", "get-config", dump_clos_config },
         { "core-power", "assoc", set_clos_assoc },
         { "core-power", "get-assoc", get_clos_assoc },
         { NULL, NULL, NULL }
@@ -1316,6 +1406,7 @@ static void parse_cmd_args(int argc, int start, char **argv)
         static struct option long_options[] = {
                 { "bucket", required_argument, 0, 'b' },
                 { "level", required_argument, 0, 'l' },
+                { "online", required_argument, 0, 'o' },
                 { "trl-type", required_argument, 0, 'r' },
                 { "trl", required_argument, 0, 't' },
                 { "help", no_argument, 0, 'h' },
@@ -1332,7 +1423,7 @@ static void parse_cmd_args(int argc, int start, char **argv)
         option_index = start;
 
         optind = start + 1;
-        while ((opt = getopt_long(argc, argv, "b:l:t:c:d:e:n:m:p:w:h",
+        while ((opt = getopt_long(argc, argv, "b:l:t:c:d:e:n:m:p:w:ho",
                                   long_options, &option_index)) != -1) {
                 switch (opt) {
                 case 'b':
@@ -1344,6 +1435,9 @@ static void parse_cmd_args(int argc, int start, char **argv)
                 case 'l':
                         tdp_level = atoi(optarg);
                         break;
+                case 'o':
+                        force_online_offline = 1;
+                        break;
                 case 't':
                         sscanf(optarg, "0x%llx", &fact_trl);
                         break;
@@ -1362,7 +1456,6 @@ static void parse_cmd_args(int argc, int start, char **argv)
                 /* CLOS related */
                 case 'c':
                         current_clos = atoi(optarg);
-                        printf("clos %d\n", current_clos);
                         break;
                 case 'd':
                         clos_desired = atoi(optarg);
@@ -1433,6 +1526,7 @@ static void core_power_help(void)
         printf("\tenable\n");
         printf("\tdisable\n");
         printf("\tconfig\n");
+        printf("\tget-config\n");
         printf("\tassoc\n");
         printf("\tget-assoc\n");
 }
diff --git a/tools/power/x86/intel-speed-select/isst-core.c b/tools/power/x86/intel-speed-select/isst-core.c
index 0bf341ad9697..6dee5332c9d3 100644
--- a/tools/power/x86/intel-speed-select/isst-core.c
+++ b/tools/power/x86/intel-speed-select/isst-core.c
@@ -619,6 +619,31 @@ int isst_get_process_ctdp(int cpu, int tdp_level, struct isst_pkg_ctdp *pkg_dev)
         return 0;
 }
 
+int isst_clos_get_clos_information(int cpu, int *enable, int *type)
+{
+        unsigned int resp;
+        int ret;
+
+        ret = isst_send_mbox_command(cpu, CONFIG_CLOS, CLOS_PM_QOS_CONFIG, 0, 0,
+                                     &resp);
+        if (ret)
+                return ret;
+
+        debug_printf("cpu:%d CLOS_PM_QOS_CONFIG resp:%x\n", cpu, resp);
+
+        if (resp & BIT(1))
+                *enable = 1;
+        else
+                *enable = 0;
+
+        if (resp & BIT(2))
+                *type = 1;
+        else
+                *type = 0;
+
+        return 0;
+}
+
 int isst_pm_qos_config(int cpu, int enable_clos, int priority_type)
 {
         unsigned int req, resp;
diff --git a/tools/power/x86/intel-speed-select/isst-display.c b/tools/power/x86/intel-speed-select/isst-display.c
index df4aa99c4e92..40346d534f78 100644
--- a/tools/power/x86/intel-speed-select/isst-display.c
+++ b/tools/power/x86/intel-speed-select/isst-display.c
@@ -287,6 +287,26 @@ static void _isst_fact_display_information(int cpu, FILE *outf, int level,
         format_and_print(outf, base_level + 2, header, value);
 }
 
+void isst_ctdp_display_core_info(int cpu, FILE *outf, char *prefix,
+                                 unsigned int val)
+{
+        char header[256];
+        char value[256];
+
+        snprintf(header, sizeof(header), "package-%d",
+                 get_physical_package_id(cpu));
+        format_and_print(outf, 1, header, NULL);
+        snprintf(header, sizeof(header), "die-%d", get_physical_die_id(cpu));
+        format_and_print(outf, 2, header, NULL);
+        snprintf(header, sizeof(header), "cpu-%d", cpu);
+        format_and_print(outf, 3, header, NULL);
+
+        snprintf(value, sizeof(value), "%u", val);
+        format_and_print(outf, 4, prefix, value);
+
+        format_and_print(outf, 1, NULL, NULL);
+}
+
 void isst_ctdp_display_information(int cpu, FILE *outf, int tdp_level,
                                    struct isst_pkg_ctdp *pkg_dev)
 {
@@ -503,6 +523,57 @@ void isst_clos_display_information(int cpu, FILE *outf, int clos,
         format_and_print(outf, 1, NULL, NULL);
 }
 
+void isst_clos_display_clos_information(int cpu, FILE *outf,
+                                        int clos_enable, int type)
+{
+        char header[256];
+        char value[256];
+
+        snprintf(header, sizeof(header), "package-%d",
+                 get_physical_package_id(cpu));
+        format_and_print(outf, 1, header, NULL);
+        snprintf(header, sizeof(header), "die-%d", get_physical_die_id(cpu));
+        format_and_print(outf, 2, header, NULL);
+        snprintf(header, sizeof(header), "cpu-%d", cpu);
+        format_and_print(outf, 3, header, NULL);
+
+        snprintf(header, sizeof(header), "core-power");
+        format_and_print(outf, 4, header, NULL);
+
+        snprintf(header, sizeof(header), "enable-status");
+        snprintf(value, sizeof(value), "%d", clos_enable);
+        format_and_print(outf, 5, header, value);
+
+        snprintf(header, sizeof(header), "priority-type");
+        snprintf(value, sizeof(value), "%d", type);
+        format_and_print(outf, 5, header, value);
+
+        format_and_print(outf, 1, NULL, NULL);
+}
+
+void isst_clos_display_assoc_information(int cpu, FILE *outf, int clos)
+{
+        char header[256];
+        char value[256];
+
+        snprintf(header, sizeof(header), "package-%d",
+                 get_physical_package_id(cpu));
+        format_and_print(outf, 1, header, NULL);
+        snprintf(header, sizeof(header), "die-%d", get_physical_die_id(cpu));
+        format_and_print(outf, 2, header, NULL);
+        snprintf(header, sizeof(header), "cpu-%d", cpu);
+        format_and_print(outf, 3, header, NULL);
+
+        snprintf(header, sizeof(header), "get-assoc");
+        format_and_print(outf, 4, header, NULL);
+
+        snprintf(header, sizeof(header), "clos");
+        snprintf(value, sizeof(value), "%d", clos);
+        format_and_print(outf, 5, header, value);
+
+        format_and_print(outf, 1, NULL, NULL);
+}
+
 void isst_display_result(int cpu, FILE *outf, char *feature, char *cmd,
                          int result)
 {
diff --git a/tools/power/x86/intel-speed-select/isst.h b/tools/power/x86/intel-speed-select/isst.h
index 2f7f62765eb6..d280b27d600d 100644
--- a/tools/power/x86/intel-speed-select/isst.h
+++ b/tools/power/x86/intel-speed-select/isst.h
@@ -187,12 +187,16 @@ extern int isst_send_msr_command(unsigned int cpu, unsigned int command,
                                  int write, unsigned long long *req_resp);
 
 extern int isst_get_ctdp_levels(int cpu, struct isst_pkg_ctdp *pkg_dev);
+extern int isst_get_coremask_info(int cpu, int config_index,
+                           struct isst_pkg_ctdp_level_info *ctdp_level);
 extern int isst_get_process_ctdp(int cpu, int tdp_level,
                                  struct isst_pkg_ctdp *pkg_dev);
 extern void isst_get_process_ctdp_complete(int cpu,
                                            struct isst_pkg_ctdp *pkg_dev);
 extern void isst_ctdp_display_information(int cpu, FILE *outf, int tdp_level,
                                           struct isst_pkg_ctdp *pkg_dev);
+extern void isst_ctdp_display_core_info(int cpu, FILE *outf, char *prefix,
+                                        unsigned int val);
 extern void isst_ctdp_display_information_start(FILE *outf);
 extern void isst_ctdp_display_information_end(FILE *outf);
 extern void isst_pbf_display_information(int cpu, FILE *outf, int level,
@@ -223,10 +227,14 @@ extern int isst_clos_associate(int cpu, int clos);
 extern int isst_clos_get_assoc_status(int cpu, int *clos_id);
 extern void isst_clos_display_information(int cpu, FILE *outf, int clos,
                                           struct isst_clos_config *clos_config);
-
+extern void isst_clos_display_assoc_information(int cpu, FILE *outf, int clos);
 extern int isst_read_reg(unsigned short reg, unsigned int *val);
 extern int isst_write_reg(int reg, unsigned int val);
 
 extern void isst_display_result(int cpu, FILE *outf, char *feature, char *cmd,
                                 int result);
+
+extern int isst_clos_get_clos_information(int cpu, int *enable, int *type);
+extern void isst_clos_display_clos_information(int cpu, FILE *outf,
+                                               int clos_enable, int type);
 #endif