diff options
-rw-r--r-- | sound/firewire/Kconfig | 1 | ||||
-rw-r--r-- | sound/firewire/oxfw/oxfw.c | 8 | ||||
-rw-r--r-- | sound/pci/asihpi/asihpi.c | 2 | ||||
-rw-r--r-- | sound/pci/hda/patch_ca0132.c | 205 | ||||
-rw-r--r-- | sound/usb/quirks.c | 129 |
5 files changed, 257 insertions, 88 deletions
diff --git a/sound/firewire/Kconfig b/sound/firewire/Kconfig index 8a146b039276..44cedb65bb88 100644 --- a/sound/firewire/Kconfig +++ b/sound/firewire/Kconfig | |||
@@ -41,6 +41,7 @@ config SND_OXFW | |||
41 | * Mackie(Loud) U.420/U.420d | 41 | * Mackie(Loud) U.420/U.420d |
42 | * TASCAM FireOne | 42 | * TASCAM FireOne |
43 | * Stanton Controllers & Systems 1 Deck/Mixer | 43 | * Stanton Controllers & Systems 1 Deck/Mixer |
44 | * APOGEE duet FireWire | ||
44 | 45 | ||
45 | To compile this driver as a module, choose M here: the module | 46 | To compile this driver as a module, choose M here: the module |
46 | will be called snd-oxfw. | 47 | will be called snd-oxfw. |
diff --git a/sound/firewire/oxfw/oxfw.c b/sound/firewire/oxfw/oxfw.c index afb78d90384b..3d27f3378d5d 100644 --- a/sound/firewire/oxfw/oxfw.c +++ b/sound/firewire/oxfw/oxfw.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #define VENDOR_LACIE 0x00d04b | 20 | #define VENDOR_LACIE 0x00d04b |
21 | #define VENDOR_TASCAM 0x00022e | 21 | #define VENDOR_TASCAM 0x00022e |
22 | #define OUI_STANTON 0x001260 | 22 | #define OUI_STANTON 0x001260 |
23 | #define OUI_APOGEE 0x0003db | ||
23 | 24 | ||
24 | #define MODEL_SATELLITE 0x00200f | 25 | #define MODEL_SATELLITE 0x00200f |
25 | 26 | ||
@@ -397,6 +398,13 @@ static const struct ieee1394_device_id oxfw_id_table[] = { | |||
397 | .vendor_id = OUI_STANTON, | 398 | .vendor_id = OUI_STANTON, |
398 | .model_id = 0x002000, | 399 | .model_id = 0x002000, |
399 | }, | 400 | }, |
401 | // APOGEE, duet FireWire | ||
402 | { | ||
403 | .match_flags = IEEE1394_MATCH_VENDOR_ID | | ||
404 | IEEE1394_MATCH_MODEL_ID, | ||
405 | .vendor_id = OUI_APOGEE, | ||
406 | .model_id = 0x01dddd, | ||
407 | }, | ||
400 | { } | 408 | { } |
401 | }; | 409 | }; |
402 | MODULE_DEVICE_TABLE(ieee1394, oxfw_id_table); | 410 | MODULE_DEVICE_TABLE(ieee1394, oxfw_id_table); |
diff --git a/sound/pci/asihpi/asihpi.c b/sound/pci/asihpi/asihpi.c index a31fe1550903..aad74e809797 100644 --- a/sound/pci/asihpi/asihpi.c +++ b/sound/pci/asihpi/asihpi.c | |||
@@ -1183,7 +1183,7 @@ static int snd_card_asihpi_capture_prepare(struct snd_pcm_substream *substream) | |||
1183 | static u64 snd_card_asihpi_capture_formats(struct snd_card_asihpi *asihpi, | 1183 | static u64 snd_card_asihpi_capture_formats(struct snd_card_asihpi *asihpi, |
1184 | u32 h_stream) | 1184 | u32 h_stream) |
1185 | { | 1185 | { |
1186 | struct hpi_format hpi_format; | 1186 | struct hpi_format hpi_format; |
1187 | u16 format; | 1187 | u16 format; |
1188 | u16 err; | 1188 | u16 err; |
1189 | u32 h_control; | 1189 | u32 h_control; |
diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c index 0a567634e5fa..c40cb6336017 100644 --- a/sound/pci/hda/patch_ca0132.c +++ b/sound/pci/hda/patch_ca0132.c | |||
@@ -1081,6 +1081,18 @@ enum { | |||
1081 | QUIRK_AE5, | 1081 | QUIRK_AE5, |
1082 | }; | 1082 | }; |
1083 | 1083 | ||
1084 | #ifdef CONFIG_PCI | ||
1085 | #define ca0132_quirk(spec) ((spec)->quirk) | ||
1086 | #define ca0132_use_pci_mmio(spec) ((spec)->use_pci_mmio) | ||
1087 | #define ca0132_use_alt_functions(spec) ((spec)->use_alt_functions) | ||
1088 | #define ca0132_use_alt_controls(spec) ((spec)->use_alt_controls) | ||
1089 | #else | ||
1090 | #define ca0132_quirk(spec) ({ (void)(spec); QUIRK_NONE; }) | ||
1091 | #define ca0132_use_alt_functions(spec) ({ (void)(spec); false; }) | ||
1092 | #define ca0132_use_pci_mmio(spec) ({ (void)(spec); false; }) | ||
1093 | #define ca0132_use_alt_controls(spec) ({ (void)(spec); false; }) | ||
1094 | #endif | ||
1095 | |||
1084 | static const struct hda_pintbl alienware_pincfgs[] = { | 1096 | static const struct hda_pintbl alienware_pincfgs[] = { |
1085 | { 0x0b, 0x90170110 }, /* Builtin Speaker */ | 1097 | { 0x0b, 0x90170110 }, /* Builtin Speaker */ |
1086 | { 0x0c, 0x411111f0 }, /* N/A */ | 1098 | { 0x0c, 0x411111f0 }, /* N/A */ |
@@ -3101,7 +3113,7 @@ static void dspload_post_setup(struct hda_codec *codec) | |||
3101 | { | 3113 | { |
3102 | struct ca0132_spec *spec = codec->spec; | 3114 | struct ca0132_spec *spec = codec->spec; |
3103 | codec_dbg(codec, "---- dspload_post_setup ------\n"); | 3115 | codec_dbg(codec, "---- dspload_post_setup ------\n"); |
3104 | if (!spec->use_alt_functions) { | 3116 | if (!ca0132_use_alt_functions(spec)) { |
3105 | /*set DSP speaker to 2.0 configuration*/ | 3117 | /*set DSP speaker to 2.0 configuration*/ |
3106 | chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); | 3118 | chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); |
3107 | chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); | 3119 | chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); |
@@ -3333,7 +3345,7 @@ static void ca0132_gpio_init(struct hda_codec *codec) | |||
3333 | { | 3345 | { |
3334 | struct ca0132_spec *spec = codec->spec; | 3346 | struct ca0132_spec *spec = codec->spec; |
3335 | 3347 | ||
3336 | switch (spec->quirk) { | 3348 | switch (ca0132_quirk(spec)) { |
3337 | case QUIRK_SBZ: | 3349 | case QUIRK_SBZ: |
3338 | case QUIRK_AE5: | 3350 | case QUIRK_AE5: |
3339 | snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); | 3351 | snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); |
@@ -3344,6 +3356,8 @@ static void ca0132_gpio_init(struct hda_codec *codec) | |||
3344 | snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); | 3356 | snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00); |
3345 | snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); | 3357 | snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B); |
3346 | break; | 3358 | break; |
3359 | default: | ||
3360 | break; | ||
3347 | } | 3361 | } |
3348 | 3362 | ||
3349 | } | 3363 | } |
@@ -3353,7 +3367,7 @@ static void ca0132_gpio_setup(struct hda_codec *codec) | |||
3353 | { | 3367 | { |
3354 | struct ca0132_spec *spec = codec->spec; | 3368 | struct ca0132_spec *spec = codec->spec; |
3355 | 3369 | ||
3356 | switch (spec->quirk) { | 3370 | switch (ca0132_quirk(spec)) { |
3357 | case QUIRK_SBZ: | 3371 | case QUIRK_SBZ: |
3358 | snd_hda_codec_write(codec, 0x01, 0, | 3372 | snd_hda_codec_write(codec, 0x01, 0, |
3359 | AC_VERB_SET_GPIO_DIRECTION, 0x07); | 3373 | AC_VERB_SET_GPIO_DIRECTION, 0x07); |
@@ -3372,6 +3386,8 @@ static void ca0132_gpio_setup(struct hda_codec *codec) | |||
3372 | snd_hda_codec_write(codec, 0x01, 0, | 3386 | snd_hda_codec_write(codec, 0x01, 0, |
3373 | AC_VERB_SET_GPIO_DATA, 0x0C); | 3387 | AC_VERB_SET_GPIO_DATA, 0x0C); |
3374 | break; | 3388 | break; |
3389 | default: | ||
3390 | break; | ||
3375 | } | 3391 | } |
3376 | } | 3392 | } |
3377 | 3393 | ||
@@ -4172,7 +4188,7 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) | |||
4172 | 4188 | ||
4173 | switch (spec->cur_out_type) { | 4189 | switch (spec->cur_out_type) { |
4174 | case SPEAKER_OUT: | 4190 | case SPEAKER_OUT: |
4175 | switch (spec->quirk) { | 4191 | switch (ca0132_quirk(spec)) { |
4176 | case QUIRK_SBZ: | 4192 | case QUIRK_SBZ: |
4177 | ca0113_mmio_gpio_set(codec, 7, false); | 4193 | ca0113_mmio_gpio_set(codec, 7, false); |
4178 | ca0113_mmio_gpio_set(codec, 4, true); | 4194 | ca0113_mmio_gpio_set(codec, 4, true); |
@@ -4203,10 +4219,12 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) | |||
4203 | chipio_set_control_param(codec, 0x0d, 0xa4); | 4219 | chipio_set_control_param(codec, 0x0d, 0xa4); |
4204 | chipio_write(codec, 0x18b03c, 0x00000012); | 4220 | chipio_write(codec, 0x18b03c, 0x00000012); |
4205 | break; | 4221 | break; |
4222 | default: | ||
4223 | break; | ||
4206 | } | 4224 | } |
4207 | break; | 4225 | break; |
4208 | case HEADPHONE_OUT: | 4226 | case HEADPHONE_OUT: |
4209 | switch (spec->quirk) { | 4227 | switch (ca0132_quirk(spec)) { |
4210 | case QUIRK_SBZ: | 4228 | case QUIRK_SBZ: |
4211 | ca0113_mmio_gpio_set(codec, 7, true); | 4229 | ca0113_mmio_gpio_set(codec, 7, true); |
4212 | ca0113_mmio_gpio_set(codec, 4, true); | 4230 | ca0113_mmio_gpio_set(codec, 4, true); |
@@ -4238,10 +4256,12 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) | |||
4238 | chipio_set_control_param(codec, 0x0d, 0xa1); | 4256 | chipio_set_control_param(codec, 0x0d, 0xa1); |
4239 | chipio_write(codec, 0x18b03c, 0x00000012); | 4257 | chipio_write(codec, 0x18b03c, 0x00000012); |
4240 | break; | 4258 | break; |
4259 | default: | ||
4260 | break; | ||
4241 | } | 4261 | } |
4242 | break; | 4262 | break; |
4243 | case SURROUND_OUT: | 4263 | case SURROUND_OUT: |
4244 | switch (spec->quirk) { | 4264 | switch (ca0132_quirk(spec)) { |
4245 | case QUIRK_SBZ: | 4265 | case QUIRK_SBZ: |
4246 | ca0113_mmio_gpio_set(codec, 7, false); | 4266 | ca0113_mmio_gpio_set(codec, 7, false); |
4247 | ca0113_mmio_gpio_set(codec, 4, true); | 4267 | ca0113_mmio_gpio_set(codec, 4, true); |
@@ -4272,6 +4292,8 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) | |||
4272 | chipio_set_control_param(codec, 0x0d, 0xa4); | 4292 | chipio_set_control_param(codec, 0x0d, 0xa4); |
4273 | chipio_write(codec, 0x18b03c, 0x00000012); | 4293 | chipio_write(codec, 0x18b03c, 0x00000012); |
4274 | break; | 4294 | break; |
4295 | default: | ||
4296 | break; | ||
4275 | } | 4297 | } |
4276 | break; | 4298 | break; |
4277 | } | 4299 | } |
@@ -4446,7 +4468,7 @@ static void ca0132_unsol_hp_delayed(struct work_struct *work) | |||
4446 | to_delayed_work(work), struct ca0132_spec, unsol_hp_work); | 4468 | to_delayed_work(work), struct ca0132_spec, unsol_hp_work); |
4447 | struct hda_jack_tbl *jack; | 4469 | struct hda_jack_tbl *jack; |
4448 | 4470 | ||
4449 | if (spec->use_alt_functions) | 4471 | if (ca0132_use_alt_functions(spec)) |
4450 | ca0132_alt_select_out(spec->codec); | 4472 | ca0132_alt_select_out(spec->codec); |
4451 | else | 4473 | else |
4452 | ca0132_select_out(spec->codec); | 4474 | ca0132_select_out(spec->codec); |
@@ -4530,14 +4552,14 @@ static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val) | |||
4530 | 4552 | ||
4531 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); | 4553 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); |
4532 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); | 4554 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); |
4533 | if (spec->quirk == QUIRK_R3DI) | 4555 | if (ca0132_quirk(spec) == QUIRK_R3DI) |
4534 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); | 4556 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); |
4535 | 4557 | ||
4536 | 4558 | ||
4537 | if (spec->in_enum_val == REAR_LINE_IN) | 4559 | if (spec->in_enum_val == REAR_LINE_IN) |
4538 | tmp = FLOAT_ZERO; | 4560 | tmp = FLOAT_ZERO; |
4539 | else { | 4561 | else { |
4540 | if (spec->quirk == QUIRK_SBZ) | 4562 | if (ca0132_quirk(spec) == QUIRK_SBZ) |
4541 | tmp = FLOAT_THREE; | 4563 | tmp = FLOAT_THREE; |
4542 | else | 4564 | else |
4543 | tmp = FLOAT_ONE; | 4565 | tmp = FLOAT_ONE; |
@@ -4549,7 +4571,7 @@ static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val) | |||
4549 | codec_dbg(codec, "%s: on.", __func__); | 4571 | codec_dbg(codec, "%s: on.", __func__); |
4550 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); | 4572 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); |
4551 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); | 4573 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); |
4552 | if (spec->quirk == QUIRK_R3DI) | 4574 | if (ca0132_quirk(spec) == QUIRK_R3DI) |
4553 | chipio_set_conn_rate(codec, 0x0F, SR_16_000); | 4575 | chipio_set_conn_rate(codec, 0x0F, SR_16_000); |
4554 | 4576 | ||
4555 | if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]) | 4577 | if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]) |
@@ -4645,7 +4667,7 @@ static int ca0132_alt_select_in(struct hda_codec *codec) | |||
4645 | 4667 | ||
4646 | switch (spec->cur_mic_type) { | 4668 | switch (spec->cur_mic_type) { |
4647 | case REAR_MIC: | 4669 | case REAR_MIC: |
4648 | switch (spec->quirk) { | 4670 | switch (ca0132_quirk(spec)) { |
4649 | case QUIRK_SBZ: | 4671 | case QUIRK_SBZ: |
4650 | case QUIRK_R3D: | 4672 | case QUIRK_R3D: |
4651 | ca0113_mmio_gpio_set(codec, 0, false); | 4673 | ca0113_mmio_gpio_set(codec, 0, false); |
@@ -4669,14 +4691,14 @@ static int ca0132_alt_select_in(struct hda_codec *codec) | |||
4669 | 4691 | ||
4670 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); | 4692 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); |
4671 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); | 4693 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); |
4672 | if (spec->quirk == QUIRK_R3DI) | 4694 | if (ca0132_quirk(spec) == QUIRK_R3DI) |
4673 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); | 4695 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); |
4674 | 4696 | ||
4675 | dspio_set_uint_param(codec, 0x80, 0x00, tmp); | 4697 | dspio_set_uint_param(codec, 0x80, 0x00, tmp); |
4676 | 4698 | ||
4677 | chipio_set_stream_control(codec, 0x03, 1); | 4699 | chipio_set_stream_control(codec, 0x03, 1); |
4678 | chipio_set_stream_control(codec, 0x04, 1); | 4700 | chipio_set_stream_control(codec, 0x04, 1); |
4679 | switch (spec->quirk) { | 4701 | switch (ca0132_quirk(spec)) { |
4680 | case QUIRK_SBZ: | 4702 | case QUIRK_SBZ: |
4681 | chipio_write(codec, 0x18B098, 0x0000000C); | 4703 | chipio_write(codec, 0x18B098, 0x0000000C); |
4682 | chipio_write(codec, 0x18B09C, 0x0000000C); | 4704 | chipio_write(codec, 0x18B09C, 0x0000000C); |
@@ -4689,12 +4711,14 @@ static int ca0132_alt_select_in(struct hda_codec *codec) | |||
4689 | chipio_write(codec, 0x18B098, 0x0000000C); | 4711 | chipio_write(codec, 0x18B098, 0x0000000C); |
4690 | chipio_write(codec, 0x18B09C, 0x0000004C); | 4712 | chipio_write(codec, 0x18B09C, 0x0000004C); |
4691 | break; | 4713 | break; |
4714 | default: | ||
4715 | break; | ||
4692 | } | 4716 | } |
4693 | ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); | 4717 | ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); |
4694 | break; | 4718 | break; |
4695 | case REAR_LINE_IN: | 4719 | case REAR_LINE_IN: |
4696 | ca0132_mic_boost_set(codec, 0); | 4720 | ca0132_mic_boost_set(codec, 0); |
4697 | switch (spec->quirk) { | 4721 | switch (ca0132_quirk(spec)) { |
4698 | case QUIRK_SBZ: | 4722 | case QUIRK_SBZ: |
4699 | case QUIRK_R3D: | 4723 | case QUIRK_R3D: |
4700 | ca0113_mmio_gpio_set(codec, 0, false); | 4724 | ca0113_mmio_gpio_set(codec, 0, false); |
@@ -4705,28 +4729,32 @@ static int ca0132_alt_select_in(struct hda_codec *codec) | |||
4705 | case QUIRK_AE5: | 4729 | case QUIRK_AE5: |
4706 | ca0113_mmio_command_set(codec, 0x48, 0x28, 0x00); | 4730 | ca0113_mmio_command_set(codec, 0x48, 0x28, 0x00); |
4707 | break; | 4731 | break; |
4732 | default: | ||
4733 | break; | ||
4708 | } | 4734 | } |
4709 | 4735 | ||
4710 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); | 4736 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); |
4711 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); | 4737 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); |
4712 | if (spec->quirk == QUIRK_R3DI) | 4738 | if (ca0132_quirk(spec) == QUIRK_R3DI) |
4713 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); | 4739 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); |
4714 | 4740 | ||
4715 | tmp = FLOAT_ZERO; | 4741 | tmp = FLOAT_ZERO; |
4716 | dspio_set_uint_param(codec, 0x80, 0x00, tmp); | 4742 | dspio_set_uint_param(codec, 0x80, 0x00, tmp); |
4717 | 4743 | ||
4718 | switch (spec->quirk) { | 4744 | switch (ca0132_quirk(spec)) { |
4719 | case QUIRK_SBZ: | 4745 | case QUIRK_SBZ: |
4720 | case QUIRK_AE5: | 4746 | case QUIRK_AE5: |
4721 | chipio_write(codec, 0x18B098, 0x00000000); | 4747 | chipio_write(codec, 0x18B098, 0x00000000); |
4722 | chipio_write(codec, 0x18B09C, 0x00000000); | 4748 | chipio_write(codec, 0x18B09C, 0x00000000); |
4723 | break; | 4749 | break; |
4750 | default: | ||
4751 | break; | ||
4724 | } | 4752 | } |
4725 | chipio_set_stream_control(codec, 0x03, 1); | 4753 | chipio_set_stream_control(codec, 0x03, 1); |
4726 | chipio_set_stream_control(codec, 0x04, 1); | 4754 | chipio_set_stream_control(codec, 0x04, 1); |
4727 | break; | 4755 | break; |
4728 | case FRONT_MIC: | 4756 | case FRONT_MIC: |
4729 | switch (spec->quirk) { | 4757 | switch (ca0132_quirk(spec)) { |
4730 | case QUIRK_SBZ: | 4758 | case QUIRK_SBZ: |
4731 | case QUIRK_R3D: | 4759 | case QUIRK_R3D: |
4732 | ca0113_mmio_gpio_set(codec, 0, true); | 4760 | ca0113_mmio_gpio_set(codec, 0, true); |
@@ -4748,7 +4776,7 @@ static int ca0132_alt_select_in(struct hda_codec *codec) | |||
4748 | 4776 | ||
4749 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); | 4777 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); |
4750 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); | 4778 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); |
4751 | if (spec->quirk == QUIRK_R3DI) | 4779 | if (ca0132_quirk(spec) == QUIRK_R3DI) |
4752 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); | 4780 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); |
4753 | 4781 | ||
4754 | dspio_set_uint_param(codec, 0x80, 0x00, tmp); | 4782 | dspio_set_uint_param(codec, 0x80, 0x00, tmp); |
@@ -4756,7 +4784,7 @@ static int ca0132_alt_select_in(struct hda_codec *codec) | |||
4756 | chipio_set_stream_control(codec, 0x03, 1); | 4784 | chipio_set_stream_control(codec, 0x03, 1); |
4757 | chipio_set_stream_control(codec, 0x04, 1); | 4785 | chipio_set_stream_control(codec, 0x04, 1); |
4758 | 4786 | ||
4759 | switch (spec->quirk) { | 4787 | switch (ca0132_quirk(spec)) { |
4760 | case QUIRK_SBZ: | 4788 | case QUIRK_SBZ: |
4761 | chipio_write(codec, 0x18B098, 0x0000000C); | 4789 | chipio_write(codec, 0x18B098, 0x0000000C); |
4762 | chipio_write(codec, 0x18B09C, 0x000000CC); | 4790 | chipio_write(codec, 0x18B09C, 0x000000CC); |
@@ -4765,6 +4793,8 @@ static int ca0132_alt_select_in(struct hda_codec *codec) | |||
4765 | chipio_write(codec, 0x18B098, 0x0000000C); | 4793 | chipio_write(codec, 0x18B098, 0x0000000C); |
4766 | chipio_write(codec, 0x18B09C, 0x0000004C); | 4794 | chipio_write(codec, 0x18B09C, 0x0000004C); |
4767 | break; | 4795 | break; |
4796 | default: | ||
4797 | break; | ||
4768 | } | 4798 | } |
4769 | ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); | 4799 | ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val); |
4770 | break; | 4800 | break; |
@@ -4859,7 +4889,7 @@ static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) | |||
4859 | val = 0; | 4889 | val = 0; |
4860 | 4890 | ||
4861 | /* If Voice Focus on SBZ, set to two channel. */ | 4891 | /* If Voice Focus on SBZ, set to two channel. */ |
4862 | if ((nid == VOICE_FOCUS) && (spec->use_pci_mmio) | 4892 | if ((nid == VOICE_FOCUS) && ca0132_use_pci_mmio(spec) |
4863 | && (spec->cur_mic_type != REAR_LINE_IN)) { | 4893 | && (spec->cur_mic_type != REAR_LINE_IN)) { |
4864 | if (spec->effects_switch[CRYSTAL_VOICE - | 4894 | if (spec->effects_switch[CRYSTAL_VOICE - |
4865 | EFFECT_START_NID]) { | 4895 | EFFECT_START_NID]) { |
@@ -4878,7 +4908,7 @@ static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) | |||
4878 | * For SBZ noise reduction, there's an extra command | 4908 | * For SBZ noise reduction, there's an extra command |
4879 | * to module ID 0x47. No clue why. | 4909 | * to module ID 0x47. No clue why. |
4880 | */ | 4910 | */ |
4881 | if ((nid == NOISE_REDUCTION) && (spec->use_pci_mmio) | 4911 | if ((nid == NOISE_REDUCTION) && ca0132_use_pci_mmio(spec) |
4882 | && (spec->cur_mic_type != REAR_LINE_IN)) { | 4912 | && (spec->cur_mic_type != REAR_LINE_IN)) { |
4883 | if (spec->effects_switch[CRYSTAL_VOICE - | 4913 | if (spec->effects_switch[CRYSTAL_VOICE - |
4884 | EFFECT_START_NID]) { | 4914 | EFFECT_START_NID]) { |
@@ -4894,7 +4924,7 @@ static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) | |||
4894 | } | 4924 | } |
4895 | 4925 | ||
4896 | /* If rear line in disable effects. */ | 4926 | /* If rear line in disable effects. */ |
4897 | if (spec->use_alt_functions && | 4927 | if (ca0132_use_alt_functions(spec) && |
4898 | spec->in_enum_val == REAR_LINE_IN) | 4928 | spec->in_enum_val == REAR_LINE_IN) |
4899 | val = 0; | 4929 | val = 0; |
4900 | } | 4930 | } |
@@ -4924,7 +4954,7 @@ static int ca0132_pe_switch_set(struct hda_codec *codec) | |||
4924 | codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", | 4954 | codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", |
4925 | spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); | 4955 | spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); |
4926 | 4956 | ||
4927 | if (spec->use_alt_functions) | 4957 | if (ca0132_use_alt_functions(spec)) |
4928 | ca0132_alt_select_out(codec); | 4958 | ca0132_alt_select_out(codec); |
4929 | 4959 | ||
4930 | i = OUT_EFFECT_START_NID - EFFECT_START_NID; | 4960 | i = OUT_EFFECT_START_NID - EFFECT_START_NID; |
@@ -4984,7 +5014,7 @@ static int ca0132_cvoice_switch_set(struct hda_codec *codec) | |||
4984 | 5014 | ||
4985 | /* set correct vipsource */ | 5015 | /* set correct vipsource */ |
4986 | oldval = stop_mic1(codec); | 5016 | oldval = stop_mic1(codec); |
4987 | if (spec->use_alt_functions) | 5017 | if (ca0132_use_alt_functions(spec)) |
4988 | ret |= ca0132_alt_set_vipsource(codec, 1); | 5018 | ret |= ca0132_alt_set_vipsource(codec, 1); |
4989 | else | 5019 | else |
4990 | ret |= ca0132_set_vipsource(codec, 1); | 5020 | ret |= ca0132_set_vipsource(codec, 1); |
@@ -5053,7 +5083,7 @@ static int ca0132_vnode_switch_set(struct snd_kcontrol *kcontrol, | |||
5053 | auto_jack = | 5083 | auto_jack = |
5054 | spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; | 5084 | spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID]; |
5055 | if (!auto_jack) { | 5085 | if (!auto_jack) { |
5056 | if (spec->use_alt_functions) | 5086 | if (ca0132_use_alt_functions(spec)) |
5057 | ca0132_alt_select_out(codec); | 5087 | ca0132_alt_select_out(codec); |
5058 | else | 5088 | else |
5059 | ca0132_select_out(codec); | 5089 | ca0132_select_out(codec); |
@@ -5070,7 +5100,7 @@ static int ca0132_vnode_switch_set(struct snd_kcontrol *kcontrol, | |||
5070 | } | 5100 | } |
5071 | 5101 | ||
5072 | if (nid == VNID_HP_ASEL) { | 5102 | if (nid == VNID_HP_ASEL) { |
5073 | if (spec->use_alt_functions) | 5103 | if (ca0132_use_alt_functions(spec)) |
5074 | ca0132_alt_select_out(codec); | 5104 | ca0132_alt_select_out(codec); |
5075 | else | 5105 | else |
5076 | ca0132_select_out(codec); | 5106 | ca0132_select_out(codec); |
@@ -5784,7 +5814,7 @@ static int ca0132_switch_put(struct snd_kcontrol *kcontrol, | |||
5784 | /* mic boost */ | 5814 | /* mic boost */ |
5785 | if (nid == spec->input_pins[0]) { | 5815 | if (nid == spec->input_pins[0]) { |
5786 | spec->cur_mic_boost = *valp; | 5816 | spec->cur_mic_boost = *valp; |
5787 | if (spec->use_alt_functions) { | 5817 | if (ca0132_use_alt_functions(spec)) { |
5788 | if (spec->in_enum_val != REAR_LINE_IN) | 5818 | if (spec->in_enum_val != REAR_LINE_IN) |
5789 | changed = ca0132_mic_boost_set(codec, *valp); | 5819 | changed = ca0132_mic_boost_set(codec, *valp); |
5790 | } else { | 5820 | } else { |
@@ -6080,7 +6110,7 @@ static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid, | |||
6080 | /* If using alt_controls, add FX: prefix. But, don't add FX: | 6110 | /* If using alt_controls, add FX: prefix. But, don't add FX: |
6081 | * prefix to OutFX or InFX enable controls. | 6111 | * prefix to OutFX or InFX enable controls. |
6082 | */ | 6112 | */ |
6083 | if ((spec->use_alt_controls) && (nid <= IN_EFFECT_END_NID)) | 6113 | if (ca0132_use_alt_controls(spec) && (nid <= IN_EFFECT_END_NID)) |
6084 | sprintf(namestr, "FX: %s %s Switch", pfx, dirstr[dir]); | 6114 | sprintf(namestr, "FX: %s %s Switch", pfx, dirstr[dir]); |
6085 | else | 6115 | else |
6086 | sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]); | 6116 | sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]); |
@@ -6357,7 +6387,7 @@ static int ca0132_build_controls(struct hda_codec *codec) | |||
6357 | return err; | 6387 | return err; |
6358 | } | 6388 | } |
6359 | /* Setup vmaster with surround slaves for desktop ca0132 devices */ | 6389 | /* Setup vmaster with surround slaves for desktop ca0132 devices */ |
6360 | if (spec->use_alt_functions) { | 6390 | if (ca0132_use_alt_functions(spec)) { |
6361 | snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, | 6391 | snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT, |
6362 | spec->tlv); | 6392 | spec->tlv); |
6363 | snd_hda_add_vmaster(codec, "Master Playback Volume", | 6393 | snd_hda_add_vmaster(codec, "Master Playback Volume", |
@@ -6377,7 +6407,7 @@ static int ca0132_build_controls(struct hda_codec *codec) | |||
6377 | num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT; | 6407 | num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT; |
6378 | for (i = 0; i < num_fx; i++) { | 6408 | for (i = 0; i < num_fx; i++) { |
6379 | /* Desktop cards break if Echo Cancellation is used. */ | 6409 | /* Desktop cards break if Echo Cancellation is used. */ |
6380 | if (spec->use_pci_mmio) { | 6410 | if (ca0132_use_pci_mmio(spec)) { |
6381 | if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID + | 6411 | if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID + |
6382 | OUT_EFFECTS_COUNT)) | 6412 | OUT_EFFECTS_COUNT)) |
6383 | continue; | 6413 | continue; |
@@ -6394,7 +6424,7 @@ static int ca0132_build_controls(struct hda_codec *codec) | |||
6394 | * EQ presets, and Smart Volume presets. Also, change names to add FX | 6424 | * EQ presets, and Smart Volume presets. Also, change names to add FX |
6395 | * prefix, and change PlayEnhancement and CrystalVoice to match. | 6425 | * prefix, and change PlayEnhancement and CrystalVoice to match. |
6396 | */ | 6426 | */ |
6397 | if (spec->use_alt_controls) { | 6427 | if (ca0132_use_alt_controls(spec)) { |
6398 | err = ca0132_alt_add_svm_enum(codec); | 6428 | err = ca0132_alt_add_svm_enum(codec); |
6399 | if (err < 0) | 6429 | if (err < 0) |
6400 | return err; | 6430 | return err; |
@@ -6448,7 +6478,7 @@ static int ca0132_build_controls(struct hda_codec *codec) | |||
6448 | * to select the new outputs and inputs, plus add the new mic boost | 6478 | * to select the new outputs and inputs, plus add the new mic boost |
6449 | * setting control. | 6479 | * setting control. |
6450 | */ | 6480 | */ |
6451 | if (spec->use_alt_functions) { | 6481 | if (ca0132_use_alt_functions(spec)) { |
6452 | err = ca0132_alt_add_output_enum(codec); | 6482 | err = ca0132_alt_add_output_enum(codec); |
6453 | if (err < 0) | 6483 | if (err < 0) |
6454 | return err; | 6484 | return err; |
@@ -6459,14 +6489,14 @@ static int ca0132_build_controls(struct hda_codec *codec) | |||
6459 | * ZxR only has microphone input, there is no front panel | 6489 | * ZxR only has microphone input, there is no front panel |
6460 | * header on the card, and aux-in is handled by the DBPro board. | 6490 | * header on the card, and aux-in is handled by the DBPro board. |
6461 | */ | 6491 | */ |
6462 | if (spec->quirk != QUIRK_ZXR) { | 6492 | if (ca0132_quirk(spec) != QUIRK_ZXR) { |
6463 | err = ca0132_alt_add_input_enum(codec); | 6493 | err = ca0132_alt_add_input_enum(codec); |
6464 | if (err < 0) | 6494 | if (err < 0) |
6465 | return err; | 6495 | return err; |
6466 | } | 6496 | } |
6467 | } | 6497 | } |
6468 | 6498 | ||
6469 | if (spec->quirk == QUIRK_AE5) { | 6499 | if (ca0132_quirk(spec) == QUIRK_AE5) { |
6470 | err = ae5_add_headphone_gain_enum(codec); | 6500 | err = ae5_add_headphone_gain_enum(codec); |
6471 | if (err < 0) | 6501 | if (err < 0) |
6472 | return err; | 6502 | return err; |
@@ -6475,7 +6505,7 @@ static int ca0132_build_controls(struct hda_codec *codec) | |||
6475 | return err; | 6505 | return err; |
6476 | } | 6506 | } |
6477 | 6507 | ||
6478 | if (spec->quirk == QUIRK_ZXR) { | 6508 | if (ca0132_quirk(spec) == QUIRK_ZXR) { |
6479 | err = zxr_add_headphone_gain_switch(codec); | 6509 | err = zxr_add_headphone_gain_switch(codec); |
6480 | if (err < 0) | 6510 | if (err < 0) |
6481 | return err; | 6511 | return err; |
@@ -6505,7 +6535,7 @@ static int ca0132_build_controls(struct hda_codec *codec) | |||
6505 | return err; | 6535 | return err; |
6506 | } | 6536 | } |
6507 | 6537 | ||
6508 | if (spec->use_alt_functions) | 6538 | if (ca0132_use_alt_functions(spec)) |
6509 | ca0132_alt_add_chmap_ctls(codec); | 6539 | ca0132_alt_add_chmap_ctls(codec); |
6510 | 6540 | ||
6511 | return 0; | 6541 | return 0; |
@@ -6583,7 +6613,7 @@ static int ca0132_build_pcms(struct hda_codec *codec) | |||
6583 | info = snd_hda_codec_pcm_new(codec, "CA0132 Analog"); | 6613 | info = snd_hda_codec_pcm_new(codec, "CA0132 Analog"); |
6584 | if (!info) | 6614 | if (!info) |
6585 | return -ENOMEM; | 6615 | return -ENOMEM; |
6586 | if (spec->use_alt_functions) { | 6616 | if (ca0132_use_alt_functions(spec)) { |
6587 | info->own_chmap = true; | 6617 | info->own_chmap = true; |
6588 | info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap | 6618 | info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap |
6589 | = ca0132_alt_chmaps; | 6619 | = ca0132_alt_chmaps; |
@@ -6597,7 +6627,7 @@ static int ca0132_build_pcms(struct hda_codec *codec) | |||
6597 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; | 6627 | info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; |
6598 | 6628 | ||
6599 | /* With the DSP enabled, desktops don't use this ADC. */ | 6629 | /* With the DSP enabled, desktops don't use this ADC. */ |
6600 | if (!spec->use_alt_functions) { | 6630 | if (!ca0132_use_alt_functions(spec)) { |
6601 | info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2"); | 6631 | info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2"); |
6602 | if (!info) | 6632 | if (!info) |
6603 | return -ENOMEM; | 6633 | return -ENOMEM; |
@@ -6795,7 +6825,7 @@ static void ca0132_init_dmic(struct hda_codec *codec) | |||
6795 | * Bit 6: set to select Data2, clear for Data1 | 6825 | * Bit 6: set to select Data2, clear for Data1 |
6796 | * Bit 7: set to enable DMic, clear for AMic | 6826 | * Bit 7: set to enable DMic, clear for AMic |
6797 | */ | 6827 | */ |
6798 | if (spec->quirk == QUIRK_ALIENWARE_M17XR4) | 6828 | if (ca0132_quirk(spec) == QUIRK_ALIENWARE_M17XR4) |
6799 | val = 0x33; | 6829 | val = 0x33; |
6800 | else | 6830 | else |
6801 | val = 0x23; | 6831 | val = 0x23; |
@@ -6877,7 +6907,7 @@ static void ca0132_alt_init_analog_mics(struct hda_codec *codec) | |||
6877 | /* Mic 1 Setup */ | 6907 | /* Mic 1 Setup */ |
6878 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); | 6908 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000); |
6879 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); | 6909 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000); |
6880 | if (spec->quirk == QUIRK_R3DI) { | 6910 | if (ca0132_quirk(spec) == QUIRK_R3DI) { |
6881 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); | 6911 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); |
6882 | tmp = FLOAT_ONE; | 6912 | tmp = FLOAT_ONE; |
6883 | } else | 6913 | } else |
@@ -6887,7 +6917,7 @@ static void ca0132_alt_init_analog_mics(struct hda_codec *codec) | |||
6887 | /* Mic 2 setup (not present on desktop cards) */ | 6917 | /* Mic 2 setup (not present on desktop cards) */ |
6888 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000); | 6918 | chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000); |
6889 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000); | 6919 | chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000); |
6890 | if (spec->quirk == QUIRK_R3DI) | 6920 | if (ca0132_quirk(spec) == QUIRK_R3DI) |
6891 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); | 6921 | chipio_set_conn_rate(codec, 0x0F, SR_96_000); |
6892 | tmp = FLOAT_ZERO; | 6922 | tmp = FLOAT_ZERO; |
6893 | dspio_set_uint_param(codec, 0x80, 0x01, tmp); | 6923 | dspio_set_uint_param(codec, 0x80, 0x01, tmp); |
@@ -6949,7 +6979,7 @@ static void sbz_chipio_startup_data(struct hda_codec *codec) | |||
6949 | chipio_set_stream_channels(codec, 0x0C, 6); | 6979 | chipio_set_stream_channels(codec, 0x0C, 6); |
6950 | chipio_set_stream_control(codec, 0x0C, 1); | 6980 | chipio_set_stream_control(codec, 0x0C, 1); |
6951 | /* No clue what these control */ | 6981 | /* No clue what these control */ |
6952 | if (spec->quirk == QUIRK_SBZ) { | 6982 | if (ca0132_quirk(spec) == QUIRK_SBZ) { |
6953 | chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0); | 6983 | chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0); |
6954 | chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1); | 6984 | chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1); |
6955 | chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2); | 6985 | chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2); |
@@ -6962,7 +6992,7 @@ static void sbz_chipio_startup_data(struct hda_codec *codec) | |||
6962 | chipio_write_no_mutex(codec, 0x190054, 0x0001edc9); | 6992 | chipio_write_no_mutex(codec, 0x190054, 0x0001edc9); |
6963 | chipio_write_no_mutex(codec, 0x190058, 0x0001eaca); | 6993 | chipio_write_no_mutex(codec, 0x190058, 0x0001eaca); |
6964 | chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb); | 6994 | chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb); |
6965 | } else if (spec->quirk == QUIRK_ZXR) { | 6995 | } else if (ca0132_quirk(spec) == QUIRK_ZXR) { |
6966 | chipio_write_no_mutex(codec, 0x190038, 0x000140c2); | 6996 | chipio_write_no_mutex(codec, 0x190038, 0x000140c2); |
6967 | chipio_write_no_mutex(codec, 0x19003c, 0x000141c3); | 6997 | chipio_write_no_mutex(codec, 0x19003c, 0x000141c3); |
6968 | chipio_write_no_mutex(codec, 0x190040, 0x000150c4); | 6998 | chipio_write_no_mutex(codec, 0x190040, 0x000150c4); |
@@ -6992,7 +7022,7 @@ static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec) | |||
6992 | * why this is, but multiple tests have confirmed it. | 7022 | * why this is, but multiple tests have confirmed it. |
6993 | */ | 7023 | */ |
6994 | for (i = 0; i < 2; i++) { | 7024 | for (i = 0; i < 2; i++) { |
6995 | switch (spec->quirk) { | 7025 | switch (ca0132_quirk(spec)) { |
6996 | case QUIRK_SBZ: | 7026 | case QUIRK_SBZ: |
6997 | case QUIRK_AE5: | 7027 | case QUIRK_AE5: |
6998 | tmp = 0x00000003; | 7028 | tmp = 0x00000003; |
@@ -7021,6 +7051,8 @@ static void ca0132_alt_dsp_scp_startup(struct hda_codec *codec) | |||
7021 | tmp = 0x00000000; | 7051 | tmp = 0x00000000; |
7022 | dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); | 7052 | dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp); |
7023 | break; | 7053 | break; |
7054 | default: | ||
7055 | break; | ||
7024 | } | 7056 | } |
7025 | msleep(100); | 7057 | msleep(100); |
7026 | } | 7058 | } |
@@ -7043,7 +7075,7 @@ static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec) | |||
7043 | chipio_set_stream_control(codec, 0x03, 1); | 7075 | chipio_set_stream_control(codec, 0x03, 1); |
7044 | chipio_set_stream_control(codec, 0x04, 1); | 7076 | chipio_set_stream_control(codec, 0x04, 1); |
7045 | 7077 | ||
7046 | switch (spec->quirk) { | 7078 | switch (ca0132_quirk(spec)) { |
7047 | case QUIRK_SBZ: | 7079 | case QUIRK_SBZ: |
7048 | chipio_write(codec, 0x18b098, 0x0000000c); | 7080 | chipio_write(codec, 0x18b098, 0x0000000c); |
7049 | chipio_write(codec, 0x18b09C, 0x0000000c); | 7081 | chipio_write(codec, 0x18b09C, 0x0000000c); |
@@ -7052,6 +7084,8 @@ static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec) | |||
7052 | chipio_write(codec, 0x18b098, 0x0000000c); | 7084 | chipio_write(codec, 0x18b098, 0x0000000c); |
7053 | chipio_write(codec, 0x18b09c, 0x0000004c); | 7085 | chipio_write(codec, 0x18b09c, 0x0000004c); |
7054 | break; | 7086 | break; |
7087 | default: | ||
7088 | break; | ||
7055 | } | 7089 | } |
7056 | } | 7090 | } |
7057 | 7091 | ||
@@ -7273,7 +7307,7 @@ static void r3d_setup_defaults(struct hda_codec *codec) | |||
7273 | /* Set speaker source? */ | 7307 | /* Set speaker source? */ |
7274 | dspio_set_uint_param(codec, 0x32, 0x00, tmp); | 7308 | dspio_set_uint_param(codec, 0x32, 0x00, tmp); |
7275 | 7309 | ||
7276 | if (spec->quirk == QUIRK_R3DI) | 7310 | if (ca0132_quirk(spec) == QUIRK_R3DI) |
7277 | r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED); | 7311 | r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED); |
7278 | 7312 | ||
7279 | /* Setup effect defaults */ | 7313 | /* Setup effect defaults */ |
@@ -7420,7 +7454,7 @@ static void ca0132_init_flags(struct hda_codec *codec) | |||
7420 | { | 7454 | { |
7421 | struct ca0132_spec *spec = codec->spec; | 7455 | struct ca0132_spec *spec = codec->spec; |
7422 | 7456 | ||
7423 | if (spec->use_alt_functions) { | 7457 | if (ca0132_use_alt_functions(spec)) { |
7424 | chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1); | 7458 | chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1); |
7425 | chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1); | 7459 | chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1); |
7426 | chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1); | 7460 | chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1); |
@@ -7453,7 +7487,7 @@ static void ca0132_init_params(struct hda_codec *codec) | |||
7453 | { | 7487 | { |
7454 | struct ca0132_spec *spec = codec->spec; | 7488 | struct ca0132_spec *spec = codec->spec; |
7455 | 7489 | ||
7456 | if (spec->use_alt_functions) { | 7490 | if (ca0132_use_alt_functions(spec)) { |
7457 | chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); | 7491 | chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); |
7458 | chipio_set_conn_rate(codec, 0x0B, SR_48_000); | 7492 | chipio_set_conn_rate(codec, 0x0B, SR_48_000); |
7459 | chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); | 7493 | chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0); |
@@ -7490,7 +7524,7 @@ static bool ca0132_download_dsp_images(struct hda_codec *codec) | |||
7490 | * can use the default firmware, but I'll leave the option in case | 7524 | * can use the default firmware, but I'll leave the option in case |
7491 | * it needs it again. | 7525 | * it needs it again. |
7492 | */ | 7526 | */ |
7493 | switch (spec->quirk) { | 7527 | switch (ca0132_quirk(spec)) { |
7494 | case QUIRK_SBZ: | 7528 | case QUIRK_SBZ: |
7495 | case QUIRK_R3D: | 7529 | case QUIRK_R3D: |
7496 | case QUIRK_AE5: | 7530 | case QUIRK_AE5: |
@@ -7564,7 +7598,7 @@ static void ca0132_download_dsp(struct hda_codec *codec) | |||
7564 | } | 7598 | } |
7565 | 7599 | ||
7566 | /* For codecs using alt functions, this is already done earlier */ | 7600 | /* For codecs using alt functions, this is already done earlier */ |
7567 | if (spec->dsp_state == DSP_DOWNLOADED && (!spec->use_alt_functions)) | 7601 | if (spec->dsp_state == DSP_DOWNLOADED && !ca0132_use_alt_functions(spec)) |
7568 | ca0132_set_dsp_msr(codec, true); | 7602 | ca0132_set_dsp_msr(codec, true); |
7569 | } | 7603 | } |
7570 | 7604 | ||
@@ -7601,7 +7635,7 @@ static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb) | |||
7601 | { | 7635 | { |
7602 | struct ca0132_spec *spec = codec->spec; | 7636 | struct ca0132_spec *spec = codec->spec; |
7603 | 7637 | ||
7604 | if (spec->use_alt_functions) | 7638 | if (ca0132_use_alt_functions(spec)) |
7605 | ca0132_alt_select_in(codec); | 7639 | ca0132_alt_select_in(codec); |
7606 | else | 7640 | else |
7607 | ca0132_select_mic(codec); | 7641 | ca0132_select_mic(codec); |
@@ -7616,7 +7650,7 @@ static void ca0132_init_unsol(struct hda_codec *codec) | |||
7616 | snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP, | 7650 | snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP, |
7617 | ca0132_process_dsp_response); | 7651 | ca0132_process_dsp_response); |
7618 | /* Front headphone jack detection */ | 7652 | /* Front headphone jack detection */ |
7619 | if (spec->use_alt_functions) | 7653 | if (ca0132_use_alt_functions(spec)) |
7620 | snd_hda_jack_detect_enable_callback(codec, | 7654 | snd_hda_jack_detect_enable_callback(codec, |
7621 | spec->unsol_tag_front_hp, hp_callback); | 7655 | spec->unsol_tag_front_hp, hp_callback); |
7622 | } | 7656 | } |
@@ -7706,7 +7740,7 @@ static void ca0132_init_chip(struct hda_codec *codec) | |||
7706 | mutex_init(&spec->chipio_mutex); | 7740 | mutex_init(&spec->chipio_mutex); |
7707 | 7741 | ||
7708 | spec->cur_out_type = SPEAKER_OUT; | 7742 | spec->cur_out_type = SPEAKER_OUT; |
7709 | if (!spec->use_alt_functions) | 7743 | if (!ca0132_use_alt_functions(spec)) |
7710 | spec->cur_mic_type = DIGITAL_MIC; | 7744 | spec->cur_mic_type = DIGITAL_MIC; |
7711 | else | 7745 | else |
7712 | spec->cur_mic_type = REAR_MIC; | 7746 | spec->cur_mic_type = REAR_MIC; |
@@ -7732,7 +7766,7 @@ static void ca0132_init_chip(struct hda_codec *codec) | |||
7732 | * Sets defaults for the effect slider controls, only for alternative | 7766 | * Sets defaults for the effect slider controls, only for alternative |
7733 | * ca0132 codecs. Also sets x-bass crossover frequency to 80hz. | 7767 | * ca0132 codecs. Also sets x-bass crossover frequency to 80hz. |
7734 | */ | 7768 | */ |
7735 | if (spec->use_alt_controls) { | 7769 | if (ca0132_use_alt_controls(spec)) { |
7736 | spec->xbass_xover_freq = 8; | 7770 | spec->xbass_xover_freq = 8; |
7737 | for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) | 7771 | for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++) |
7738 | spec->fx_ctl_val[i] = effect_slider_defaults[i]; | 7772 | spec->fx_ctl_val[i] = effect_slider_defaults[i]; |
@@ -7747,7 +7781,7 @@ static void ca0132_init_chip(struct hda_codec *codec) | |||
7747 | * the daughter board. So, there is no input enum control, and we need | 7781 | * the daughter board. So, there is no input enum control, and we need |
7748 | * to make sure that spec->in_enum_val is set properly. | 7782 | * to make sure that spec->in_enum_val is set properly. |
7749 | */ | 7783 | */ |
7750 | if (spec->quirk == QUIRK_ZXR) | 7784 | if (ca0132_quirk(spec) == QUIRK_ZXR) |
7751 | spec->in_enum_val = REAR_MIC; | 7785 | spec->in_enum_val = REAR_MIC; |
7752 | 7786 | ||
7753 | #ifdef ENABLE_TUNING_CONTROLS | 7787 | #ifdef ENABLE_TUNING_CONTROLS |
@@ -8088,27 +8122,27 @@ static void ca0132_mmio_init(struct hda_codec *codec) | |||
8088 | { | 8122 | { |
8089 | struct ca0132_spec *spec = codec->spec; | 8123 | struct ca0132_spec *spec = codec->spec; |
8090 | 8124 | ||
8091 | if (spec->quirk == QUIRK_AE5) | 8125 | if (ca0132_quirk(spec) == QUIRK_AE5) |
8092 | writel(0x00000001, spec->mem_base + 0x400); | 8126 | writel(0x00000001, spec->mem_base + 0x400); |
8093 | else | 8127 | else |
8094 | writel(0x00000000, spec->mem_base + 0x400); | 8128 | writel(0x00000000, spec->mem_base + 0x400); |
8095 | 8129 | ||
8096 | if (spec->quirk == QUIRK_AE5) | 8130 | if (ca0132_quirk(spec) == QUIRK_AE5) |
8097 | writel(0x00000001, spec->mem_base + 0x408); | 8131 | writel(0x00000001, spec->mem_base + 0x408); |
8098 | else | 8132 | else |
8099 | writel(0x00000000, spec->mem_base + 0x408); | 8133 | writel(0x00000000, spec->mem_base + 0x408); |
8100 | 8134 | ||
8101 | if (spec->quirk == QUIRK_AE5) | 8135 | if (ca0132_quirk(spec) == QUIRK_AE5) |
8102 | writel(0x00000001, spec->mem_base + 0x40c); | 8136 | writel(0x00000001, spec->mem_base + 0x40c); |
8103 | else | 8137 | else |
8104 | writel(0x00000000, spec->mem_base + 0x40C); | 8138 | writel(0x00000000, spec->mem_base + 0x40C); |
8105 | 8139 | ||
8106 | if (spec->quirk == QUIRK_ZXR) | 8140 | if (ca0132_quirk(spec) == QUIRK_ZXR) |
8107 | writel(0x00880640, spec->mem_base + 0x01C); | 8141 | writel(0x00880640, spec->mem_base + 0x01C); |
8108 | else | 8142 | else |
8109 | writel(0x00880680, spec->mem_base + 0x01C); | 8143 | writel(0x00880680, spec->mem_base + 0x01C); |
8110 | 8144 | ||
8111 | if (spec->quirk == QUIRK_AE5) | 8145 | if (ca0132_quirk(spec) == QUIRK_AE5) |
8112 | writel(0x00000080, spec->mem_base + 0xC0C); | 8146 | writel(0x00000080, spec->mem_base + 0xC0C); |
8113 | else | 8147 | else |
8114 | writel(0x00000083, spec->mem_base + 0xC0C); | 8148 | writel(0x00000083, spec->mem_base + 0xC0C); |
@@ -8116,7 +8150,7 @@ static void ca0132_mmio_init(struct hda_codec *codec) | |||
8116 | writel(0x00000030, spec->mem_base + 0xC00); | 8150 | writel(0x00000030, spec->mem_base + 0xC00); |
8117 | writel(0x00000000, spec->mem_base + 0xC04); | 8151 | writel(0x00000000, spec->mem_base + 0xC04); |
8118 | 8152 | ||
8119 | if (spec->quirk == QUIRK_AE5) | 8153 | if (ca0132_quirk(spec) == QUIRK_AE5) |
8120 | writel(0x00000000, spec->mem_base + 0xC0C); | 8154 | writel(0x00000000, spec->mem_base + 0xC0C); |
8121 | else | 8155 | else |
8122 | writel(0x00000003, spec->mem_base + 0xC0C); | 8156 | writel(0x00000003, spec->mem_base + 0xC0C); |
@@ -8125,7 +8159,7 @@ static void ca0132_mmio_init(struct hda_codec *codec) | |||
8125 | writel(0x00000003, spec->mem_base + 0xC0C); | 8159 | writel(0x00000003, spec->mem_base + 0xC0C); |
8126 | writel(0x00000003, spec->mem_base + 0xC0C); | 8160 | writel(0x00000003, spec->mem_base + 0xC0C); |
8127 | 8161 | ||
8128 | if (spec->quirk == QUIRK_AE5) | 8162 | if (ca0132_quirk(spec) == QUIRK_AE5) |
8129 | writel(0x00000001, spec->mem_base + 0xC08); | 8163 | writel(0x00000001, spec->mem_base + 0xC08); |
8130 | else | 8164 | else |
8131 | writel(0x000000C1, spec->mem_base + 0xC08); | 8165 | writel(0x000000C1, spec->mem_base + 0xC08); |
@@ -8136,7 +8170,7 @@ static void ca0132_mmio_init(struct hda_codec *codec) | |||
8136 | writel(0x000000C1, spec->mem_base + 0xC08); | 8170 | writel(0x000000C1, spec->mem_base + 0xC08); |
8137 | writel(0x00000080, spec->mem_base + 0xC04); | 8171 | writel(0x00000080, spec->mem_base + 0xC04); |
8138 | 8172 | ||
8139 | if (spec->quirk == QUIRK_AE5) { | 8173 | if (ca0132_quirk(spec) == QUIRK_AE5) { |
8140 | writel(0x00000000, spec->mem_base + 0x42c); | 8174 | writel(0x00000000, spec->mem_base + 0x42c); |
8141 | writel(0x00000000, spec->mem_base + 0x46c); | 8175 | writel(0x00000000, spec->mem_base + 0x46c); |
8142 | writel(0x00000000, spec->mem_base + 0x4ac); | 8176 | writel(0x00000000, spec->mem_base + 0x4ac); |
@@ -8211,7 +8245,7 @@ static void ca0132_alt_init(struct hda_codec *codec) | |||
8211 | 8245 | ||
8212 | ca0132_alt_vol_setup(codec); | 8246 | ca0132_alt_vol_setup(codec); |
8213 | 8247 | ||
8214 | switch (spec->quirk) { | 8248 | switch (ca0132_quirk(spec)) { |
8215 | case QUIRK_SBZ: | 8249 | case QUIRK_SBZ: |
8216 | codec_dbg(codec, "SBZ alt_init"); | 8250 | codec_dbg(codec, "SBZ alt_init"); |
8217 | ca0132_gpio_init(codec); | 8251 | ca0132_gpio_init(codec); |
@@ -8248,6 +8282,8 @@ static void ca0132_alt_init(struct hda_codec *codec) | |||
8248 | snd_hda_sequence_write(codec, spec->chip_init_verbs); | 8282 | snd_hda_sequence_write(codec, spec->chip_init_verbs); |
8249 | snd_hda_sequence_write(codec, spec->desktop_init_verbs); | 8283 | snd_hda_sequence_write(codec, spec->desktop_init_verbs); |
8250 | break; | 8284 | break; |
8285 | default: | ||
8286 | break; | ||
8251 | } | 8287 | } |
8252 | } | 8288 | } |
8253 | 8289 | ||
@@ -8274,7 +8310,7 @@ static int ca0132_init(struct hda_codec *codec) | |||
8274 | spec->dsp_reload = true; | 8310 | spec->dsp_reload = true; |
8275 | spec->dsp_state = DSP_DOWNLOAD_INIT; | 8311 | spec->dsp_state = DSP_DOWNLOAD_INIT; |
8276 | } else { | 8312 | } else { |
8277 | if (spec->quirk == QUIRK_SBZ) | 8313 | if (ca0132_quirk(spec) == QUIRK_SBZ) |
8278 | sbz_dsp_startup_check(codec); | 8314 | sbz_dsp_startup_check(codec); |
8279 | return 0; | 8315 | return 0; |
8280 | } | 8316 | } |
@@ -8284,12 +8320,12 @@ static int ca0132_init(struct hda_codec *codec) | |||
8284 | spec->dsp_state = DSP_DOWNLOAD_INIT; | 8320 | spec->dsp_state = DSP_DOWNLOAD_INIT; |
8285 | spec->curr_chip_addx = INVALID_CHIP_ADDRESS; | 8321 | spec->curr_chip_addx = INVALID_CHIP_ADDRESS; |
8286 | 8322 | ||
8287 | if (spec->use_pci_mmio) | 8323 | if (ca0132_use_pci_mmio(spec)) |
8288 | ca0132_mmio_init(codec); | 8324 | ca0132_mmio_init(codec); |
8289 | 8325 | ||
8290 | snd_hda_power_up_pm(codec); | 8326 | snd_hda_power_up_pm(codec); |
8291 | 8327 | ||
8292 | if (spec->quirk == QUIRK_AE5) | 8328 | if (ca0132_quirk(spec) == QUIRK_AE5) |
8293 | ae5_register_set(codec); | 8329 | ae5_register_set(codec); |
8294 | 8330 | ||
8295 | ca0132_init_unsol(codec); | 8331 | ca0132_init_unsol(codec); |
@@ -8298,14 +8334,14 @@ static int ca0132_init(struct hda_codec *codec) | |||
8298 | 8334 | ||
8299 | snd_hda_sequence_write(codec, spec->base_init_verbs); | 8335 | snd_hda_sequence_write(codec, spec->base_init_verbs); |
8300 | 8336 | ||
8301 | if (spec->use_alt_functions) | 8337 | if (ca0132_use_alt_functions(spec)) |
8302 | ca0132_alt_init(codec); | 8338 | ca0132_alt_init(codec); |
8303 | 8339 | ||
8304 | ca0132_download_dsp(codec); | 8340 | ca0132_download_dsp(codec); |
8305 | 8341 | ||
8306 | ca0132_refresh_widget_caps(codec); | 8342 | ca0132_refresh_widget_caps(codec); |
8307 | 8343 | ||
8308 | switch (spec->quirk) { | 8344 | switch (ca0132_quirk(spec)) { |
8309 | case QUIRK_R3DI: | 8345 | case QUIRK_R3DI: |
8310 | case QUIRK_R3D: | 8346 | case QUIRK_R3D: |
8311 | r3d_setup_defaults(codec); | 8347 | r3d_setup_defaults(codec); |
@@ -8334,7 +8370,7 @@ static int ca0132_init(struct hda_codec *codec) | |||
8334 | 8370 | ||
8335 | init_input(codec, cfg->dig_in_pin, spec->dig_in); | 8371 | init_input(codec, cfg->dig_in_pin, spec->dig_in); |
8336 | 8372 | ||
8337 | if (!spec->use_alt_functions) { | 8373 | if (!ca0132_use_alt_functions(spec)) { |
8338 | snd_hda_sequence_write(codec, spec->chip_init_verbs); | 8374 | snd_hda_sequence_write(codec, spec->chip_init_verbs); |
8339 | snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, | 8375 | snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, |
8340 | VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); | 8376 | VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D); |
@@ -8342,11 +8378,11 @@ static int ca0132_init(struct hda_codec *codec) | |||
8342 | VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); | 8378 | VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20); |
8343 | } | 8379 | } |
8344 | 8380 | ||
8345 | if (spec->quirk == QUIRK_SBZ) | 8381 | if (ca0132_quirk(spec) == QUIRK_SBZ) |
8346 | ca0132_gpio_setup(codec); | 8382 | ca0132_gpio_setup(codec); |
8347 | 8383 | ||
8348 | snd_hda_sequence_write(codec, spec->spec_init_verbs); | 8384 | snd_hda_sequence_write(codec, spec->spec_init_verbs); |
8349 | if (spec->use_alt_functions) { | 8385 | if (ca0132_use_alt_functions(spec)) { |
8350 | ca0132_alt_select_out(codec); | 8386 | ca0132_alt_select_out(codec); |
8351 | ca0132_alt_select_in(codec); | 8387 | ca0132_alt_select_in(codec); |
8352 | } else { | 8388 | } else { |
@@ -8391,7 +8427,7 @@ static void ca0132_free(struct hda_codec *codec) | |||
8391 | 8427 | ||
8392 | cancel_delayed_work_sync(&spec->unsol_hp_work); | 8428 | cancel_delayed_work_sync(&spec->unsol_hp_work); |
8393 | snd_hda_power_up(codec); | 8429 | snd_hda_power_up(codec); |
8394 | switch (spec->quirk) { | 8430 | switch (ca0132_quirk(spec)) { |
8395 | case QUIRK_SBZ: | 8431 | case QUIRK_SBZ: |
8396 | sbz_exit_chip(codec); | 8432 | sbz_exit_chip(codec); |
8397 | break; | 8433 | break; |
@@ -8407,6 +8443,8 @@ static void ca0132_free(struct hda_codec *codec) | |||
8407 | case QUIRK_R3DI: | 8443 | case QUIRK_R3DI: |
8408 | r3di_gpio_shutdown(codec); | 8444 | r3di_gpio_shutdown(codec); |
8409 | break; | 8445 | break; |
8446 | default: | ||
8447 | break; | ||
8410 | } | 8448 | } |
8411 | 8449 | ||
8412 | snd_hda_sequence_write(codec, spec->base_exit_verbs); | 8450 | snd_hda_sequence_write(codec, spec->base_exit_verbs); |
@@ -8461,12 +8499,12 @@ static void ca0132_config(struct hda_codec *codec) | |||
8461 | spec->multiout.dac_nids = spec->dacs; | 8499 | spec->multiout.dac_nids = spec->dacs; |
8462 | spec->multiout.num_dacs = 3; | 8500 | spec->multiout.num_dacs = 3; |
8463 | 8501 | ||
8464 | if (!spec->use_alt_functions) | 8502 | if (!ca0132_use_alt_functions(spec)) |
8465 | spec->multiout.max_channels = 2; | 8503 | spec->multiout.max_channels = 2; |
8466 | else | 8504 | else |
8467 | spec->multiout.max_channels = 6; | 8505 | spec->multiout.max_channels = 6; |
8468 | 8506 | ||
8469 | switch (spec->quirk) { | 8507 | switch (ca0132_quirk(spec)) { |
8470 | case QUIRK_ALIENWARE: | 8508 | case QUIRK_ALIENWARE: |
8471 | codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__); | 8509 | codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__); |
8472 | snd_hda_apply_pincfgs(codec, alienware_pincfgs); | 8510 | snd_hda_apply_pincfgs(codec, alienware_pincfgs); |
@@ -8491,9 +8529,11 @@ static void ca0132_config(struct hda_codec *codec) | |||
8491 | codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__); | 8529 | codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__); |
8492 | snd_hda_apply_pincfgs(codec, ae5_pincfgs); | 8530 | snd_hda_apply_pincfgs(codec, ae5_pincfgs); |
8493 | break; | 8531 | break; |
8532 | default: | ||
8533 | break; | ||
8494 | } | 8534 | } |
8495 | 8535 | ||
8496 | switch (spec->quirk) { | 8536 | switch (ca0132_quirk(spec)) { |
8497 | case QUIRK_ALIENWARE: | 8537 | case QUIRK_ALIENWARE: |
8498 | spec->num_outputs = 2; | 8538 | spec->num_outputs = 2; |
8499 | spec->out_pins[0] = 0x0b; /* speaker out */ | 8539 | spec->out_pins[0] = 0x0b; /* speaker out */ |
@@ -8654,7 +8694,7 @@ static int ca0132_prepare_verbs(struct hda_codec *codec) | |||
8654 | * Since desktop cards use pci_mmio, this can be used to determine | 8694 | * Since desktop cards use pci_mmio, this can be used to determine |
8655 | * whether or not to use these verbs instead of a separate bool. | 8695 | * whether or not to use these verbs instead of a separate bool. |
8656 | */ | 8696 | */ |
8657 | if (spec->use_pci_mmio) | 8697 | if (ca0132_use_pci_mmio(spec)) |
8658 | spec->desktop_init_verbs = ca0132_init_verbs1; | 8698 | spec->desktop_init_verbs = ca0132_init_verbs1; |
8659 | spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS, | 8699 | spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS, |
8660 | sizeof(struct hda_verb), | 8700 | sizeof(struct hda_verb), |
@@ -8729,11 +8769,10 @@ static int patch_ca0132(struct hda_codec *codec) | |||
8729 | spec->quirk = quirk->value; | 8769 | spec->quirk = quirk->value; |
8730 | else | 8770 | else |
8731 | spec->quirk = QUIRK_NONE; | 8771 | spec->quirk = QUIRK_NONE; |
8732 | 8772 | if (ca0132_quirk(spec) == QUIRK_SBZ) | |
8733 | if (spec->quirk == QUIRK_SBZ) | ||
8734 | sbz_detect_quirk(codec); | 8773 | sbz_detect_quirk(codec); |
8735 | 8774 | ||
8736 | if (spec->quirk == QUIRK_ZXR_DBPRO) | 8775 | if (ca0132_quirk(spec) == QUIRK_ZXR_DBPRO) |
8737 | codec->patch_ops = dbpro_patch_ops; | 8776 | codec->patch_ops = dbpro_patch_ops; |
8738 | else | 8777 | else |
8739 | codec->patch_ops = ca0132_patch_ops; | 8778 | codec->patch_ops = ca0132_patch_ops; |
@@ -8746,7 +8785,7 @@ static int patch_ca0132(struct hda_codec *codec) | |||
8746 | spec->num_mixers = 1; | 8785 | spec->num_mixers = 1; |
8747 | 8786 | ||
8748 | /* Set which mixers each quirk uses. */ | 8787 | /* Set which mixers each quirk uses. */ |
8749 | switch (spec->quirk) { | 8788 | switch (ca0132_quirk(spec)) { |
8750 | case QUIRK_SBZ: | 8789 | case QUIRK_SBZ: |
8751 | spec->mixers[0] = desktop_mixer; | 8790 | spec->mixers[0] = desktop_mixer; |
8752 | snd_hda_codec_set_name(codec, "Sound Blaster Z"); | 8791 | snd_hda_codec_set_name(codec, "Sound Blaster Z"); |
@@ -8775,7 +8814,7 @@ static int patch_ca0132(struct hda_codec *codec) | |||
8775 | } | 8814 | } |
8776 | 8815 | ||
8777 | /* Setup whether or not to use alt functions/controls/pci_mmio */ | 8816 | /* Setup whether or not to use alt functions/controls/pci_mmio */ |
8778 | switch (spec->quirk) { | 8817 | switch (ca0132_quirk(spec)) { |
8779 | case QUIRK_SBZ: | 8818 | case QUIRK_SBZ: |
8780 | case QUIRK_R3D: | 8819 | case QUIRK_R3D: |
8781 | case QUIRK_AE5: | 8820 | case QUIRK_AE5: |
@@ -8796,6 +8835,7 @@ static int patch_ca0132(struct hda_codec *codec) | |||
8796 | break; | 8835 | break; |
8797 | } | 8836 | } |
8798 | 8837 | ||
8838 | #ifdef CONFIG_PCI | ||
8799 | if (spec->use_pci_mmio) { | 8839 | if (spec->use_pci_mmio) { |
8800 | spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); | 8840 | spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); |
8801 | if (spec->mem_base == NULL) { | 8841 | if (spec->mem_base == NULL) { |
@@ -8803,6 +8843,7 @@ static int patch_ca0132(struct hda_codec *codec) | |||
8803 | spec->quirk = QUIRK_NONE; | 8843 | spec->quirk = QUIRK_NONE; |
8804 | } | 8844 | } |
8805 | } | 8845 | } |
8846 | #endif | ||
8806 | 8847 | ||
8807 | spec->base_init_verbs = ca0132_base_init_verbs; | 8848 | spec->base_init_verbs = ca0132_base_init_verbs; |
8808 | spec->base_exit_verbs = ca0132_base_exit_verbs; | 8849 | spec->base_exit_verbs = ca0132_base_exit_verbs; |
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c index 8a945ece9869..3d0f09108c98 100644 --- a/sound/usb/quirks.c +++ b/sound/usb/quirks.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/usb.h> | 19 | #include <linux/usb.h> |
20 | #include <linux/usb/audio.h> | 20 | #include <linux/usb/audio.h> |
21 | #include <linux/usb/midi.h> | 21 | #include <linux/usb/midi.h> |
22 | #include <linux/bits.h> | ||
22 | 23 | ||
23 | #include <sound/control.h> | 24 | #include <sound/control.h> |
24 | #include <sound/core.h> | 25 | #include <sound/core.h> |
@@ -668,15 +669,133 @@ static int snd_usb_cm106_boot_quirk(struct usb_device *dev) | |||
668 | } | 669 | } |
669 | 670 | ||
670 | /* | 671 | /* |
671 | * C-Media CM6206 is based on CM106 with two additional | 672 | * CM6206 registers from the CM6206 datasheet rev 2.1 |
672 | * registers that are not documented in the data sheet. | ||
673 | * Values here are chosen based on sniffing USB traffic | ||
674 | * under Windows. | ||
675 | */ | 673 | */ |
674 | #define CM6206_REG0_DMA_MASTER BIT(15) | ||
675 | #define CM6206_REG0_SPDIFO_RATE_48K (2 << 12) | ||
676 | #define CM6206_REG0_SPDIFO_RATE_96K (7 << 12) | ||
677 | /* Bit 4 thru 11 is the S/PDIF category code */ | ||
678 | #define CM6206_REG0_SPDIFO_CAT_CODE_GENERAL (0 << 4) | ||
679 | #define CM6206_REG0_SPDIFO_EMPHASIS_CD BIT(3) | ||
680 | #define CM6206_REG0_SPDIFO_COPYRIGHT_NA BIT(2) | ||
681 | #define CM6206_REG0_SPDIFO_NON_AUDIO BIT(1) | ||
682 | #define CM6206_REG0_SPDIFO_PRO_FORMAT BIT(0) | ||
683 | |||
684 | #define CM6206_REG1_TEST_SEL_CLK BIT(14) | ||
685 | #define CM6206_REG1_PLLBIN_EN BIT(13) | ||
686 | #define CM6206_REG1_SOFT_MUTE_EN BIT(12) | ||
687 | #define CM6206_REG1_GPIO4_OUT BIT(11) | ||
688 | #define CM6206_REG1_GPIO4_OE BIT(10) | ||
689 | #define CM6206_REG1_GPIO3_OUT BIT(9) | ||
690 | #define CM6206_REG1_GPIO3_OE BIT(8) | ||
691 | #define CM6206_REG1_GPIO2_OUT BIT(7) | ||
692 | #define CM6206_REG1_GPIO2_OE BIT(6) | ||
693 | #define CM6206_REG1_GPIO1_OUT BIT(5) | ||
694 | #define CM6206_REG1_GPIO1_OE BIT(4) | ||
695 | #define CM6206_REG1_SPDIFO_INVALID BIT(3) | ||
696 | #define CM6206_REG1_SPDIF_LOOP_EN BIT(2) | ||
697 | #define CM6206_REG1_SPDIFO_DIS BIT(1) | ||
698 | #define CM6206_REG1_SPDIFI_MIX BIT(0) | ||
699 | |||
700 | #define CM6206_REG2_DRIVER_ON BIT(15) | ||
701 | #define CM6206_REG2_HEADP_SEL_SIDE_CHANNELS (0 << 13) | ||
702 | #define CM6206_REG2_HEADP_SEL_SURROUND_CHANNELS (1 << 13) | ||
703 | #define CM6206_REG2_HEADP_SEL_CENTER_SUBW (2 << 13) | ||
704 | #define CM6206_REG2_HEADP_SEL_FRONT_CHANNELS (3 << 13) | ||
705 | #define CM6206_REG2_MUTE_HEADPHONE_RIGHT BIT(12) | ||
706 | #define CM6206_REG2_MUTE_HEADPHONE_LEFT BIT(11) | ||
707 | #define CM6206_REG2_MUTE_REAR_SURROUND_RIGHT BIT(10) | ||
708 | #define CM6206_REG2_MUTE_REAR_SURROUND_LEFT BIT(9) | ||
709 | #define CM6206_REG2_MUTE_SIDE_SURROUND_RIGHT BIT(8) | ||
710 | #define CM6206_REG2_MUTE_SIDE_SURROUND_LEFT BIT(7) | ||
711 | #define CM6206_REG2_MUTE_SUBWOOFER BIT(6) | ||
712 | #define CM6206_REG2_MUTE_CENTER BIT(5) | ||
713 | #define CM6206_REG2_MUTE_RIGHT_FRONT BIT(3) | ||
714 | #define CM6206_REG2_MUTE_LEFT_FRONT BIT(3) | ||
715 | #define CM6206_REG2_EN_BTL BIT(2) | ||
716 | #define CM6206_REG2_MCUCLKSEL_1_5_MHZ (0) | ||
717 | #define CM6206_REG2_MCUCLKSEL_3_MHZ (1) | ||
718 | #define CM6206_REG2_MCUCLKSEL_6_MHZ (2) | ||
719 | #define CM6206_REG2_MCUCLKSEL_12_MHZ (3) | ||
720 | |||
721 | /* Bit 11..13 sets the sensitivity to FLY tuner volume control VP/VD signal */ | ||
722 | #define CM6206_REG3_FLYSPEED_DEFAULT (2 << 11) | ||
723 | #define CM6206_REG3_VRAP25EN BIT(10) | ||
724 | #define CM6206_REG3_MSEL1 BIT(9) | ||
725 | #define CM6206_REG3_SPDIFI_RATE_44_1K BIT(0 << 7) | ||
726 | #define CM6206_REG3_SPDIFI_RATE_48K BIT(2 << 7) | ||
727 | #define CM6206_REG3_SPDIFI_RATE_32K BIT(3 << 7) | ||
728 | #define CM6206_REG3_PINSEL BIT(6) | ||
729 | #define CM6206_REG3_FOE BIT(5) | ||
730 | #define CM6206_REG3_ROE BIT(4) | ||
731 | #define CM6206_REG3_CBOE BIT(3) | ||
732 | #define CM6206_REG3_LOSE BIT(2) | ||
733 | #define CM6206_REG3_HPOE BIT(1) | ||
734 | #define CM6206_REG3_SPDIFI_CANREC BIT(0) | ||
735 | |||
736 | #define CM6206_REG5_DA_RSTN BIT(13) | ||
737 | #define CM6206_REG5_AD_RSTN BIT(12) | ||
738 | #define CM6206_REG5_SPDIFO_AD2SPDO BIT(12) | ||
739 | #define CM6206_REG5_SPDIFO_SEL_FRONT (0 << 9) | ||
740 | #define CM6206_REG5_SPDIFO_SEL_SIDE_SUR (1 << 9) | ||
741 | #define CM6206_REG5_SPDIFO_SEL_CEN_LFE (2 << 9) | ||
742 | #define CM6206_REG5_SPDIFO_SEL_REAR_SUR (3 << 9) | ||
743 | #define CM6206_REG5_CODECM BIT(8) | ||
744 | #define CM6206_REG5_EN_HPF BIT(7) | ||
745 | #define CM6206_REG5_T_SEL_DSDA4 BIT(6) | ||
746 | #define CM6206_REG5_T_SEL_DSDA3 BIT(5) | ||
747 | #define CM6206_REG5_T_SEL_DSDA2 BIT(4) | ||
748 | #define CM6206_REG5_T_SEL_DSDA1 BIT(3) | ||
749 | #define CM6206_REG5_T_SEL_DSDAD_NORMAL 0 | ||
750 | #define CM6206_REG5_T_SEL_DSDAD_FRONT 4 | ||
751 | #define CM6206_REG5_T_SEL_DSDAD_S_SURROUND 5 | ||
752 | #define CM6206_REG5_T_SEL_DSDAD_CEN_LFE 6 | ||
753 | #define CM6206_REG5_T_SEL_DSDAD_R_SURROUND 7 | ||
754 | |||
676 | static int snd_usb_cm6206_boot_quirk(struct usb_device *dev) | 755 | static int snd_usb_cm6206_boot_quirk(struct usb_device *dev) |
677 | { | 756 | { |
678 | int err = 0, reg; | 757 | int err = 0, reg; |
679 | int val[] = {0x2004, 0x3000, 0xf800, 0x143f, 0x0000, 0x3000}; | 758 | int val[] = { |
759 | /* | ||
760 | * Values here are chosen based on sniffing USB traffic | ||
761 | * under Windows. | ||
762 | * | ||
763 | * REG0: DAC is master, sample rate 48kHz, no copyright | ||
764 | */ | ||
765 | CM6206_REG0_SPDIFO_RATE_48K | | ||
766 | CM6206_REG0_SPDIFO_COPYRIGHT_NA, | ||
767 | /* | ||
768 | * REG1: PLL binary search enable, soft mute enable. | ||
769 | */ | ||
770 | CM6206_REG1_PLLBIN_EN | | ||
771 | CM6206_REG1_SOFT_MUTE_EN | | ||
772 | /* | ||
773 | * REG2: enable output drivers, | ||
774 | * select front channels to the headphone output, | ||
775 | * then mute the headphone channels, run the MCU | ||
776 | * at 1.5 MHz. | ||
777 | */ | ||
778 | CM6206_REG2_DRIVER_ON | | ||
779 | CM6206_REG2_HEADP_SEL_FRONT_CHANNELS | | ||
780 | CM6206_REG2_MUTE_HEADPHONE_RIGHT | | ||
781 | CM6206_REG2_MUTE_HEADPHONE_LEFT, | ||
782 | /* | ||
783 | * REG3: default flyspeed, set 2.5V mic bias | ||
784 | * enable all line out ports and enable SPDIF | ||
785 | */ | ||
786 | CM6206_REG3_FLYSPEED_DEFAULT | | ||
787 | CM6206_REG3_VRAP25EN | | ||
788 | CM6206_REG3_FOE | | ||
789 | CM6206_REG3_ROE | | ||
790 | CM6206_REG3_CBOE | | ||
791 | CM6206_REG3_LOSE | | ||
792 | CM6206_REG3_HPOE | | ||
793 | CM6206_REG3_SPDIFI_CANREC, | ||
794 | /* REG4 is just a bunch of GPIO lines */ | ||
795 | 0x0000, | ||
796 | /* REG5: de-assert AD/DA reset signals */ | ||
797 | CM6206_REG5_DA_RSTN | | ||
798 | CM6206_REG5_AD_RSTN }; | ||
680 | 799 | ||
681 | for (reg = 0; reg < ARRAY_SIZE(val); reg++) { | 800 | for (reg = 0; reg < ARRAY_SIZE(val); reg++) { |
682 | err = snd_usb_cm106_write_int_reg(dev, reg, val[reg]); | 801 | err = snd_usb_cm106_write_int_reg(dev, reg, val[reg]); |