diff options
536 files changed, 15295 insertions, 15371 deletions
diff --git a/Documentation/devicetree/bindings/media/i2c/adv748x.txt b/Documentation/devicetree/bindings/media/i2c/adv748x.txt index 5dddc95f9cc4..4f91686e54a6 100644 --- a/Documentation/devicetree/bindings/media/i2c/adv748x.txt +++ b/Documentation/devicetree/bindings/media/i2c/adv748x.txt | |||
| @@ -48,7 +48,16 @@ are numbered as follows. | |||
| 48 | TXA source 10 | 48 | TXA source 10 |
| 49 | TXB source 11 | 49 | TXB source 11 |
| 50 | 50 | ||
| 51 | The digital output port nodes must contain at least one endpoint. | 51 | The digital output port nodes, when present, shall contain at least one |
| 52 | endpoint. Each of those endpoints shall contain the data-lanes property as | ||
| 53 | described in video-interfaces.txt. | ||
| 54 | |||
| 55 | Required source endpoint properties: | ||
| 56 | - data-lanes: an array of physical data lane indexes | ||
| 57 | The accepted value(s) for this property depends on which of the two | ||
| 58 | sources are described. For TXA 1, 2 or 4 data lanes can be described | ||
| 59 | while for TXB only 1 data lane is valid. See video-interfaces.txt | ||
| 60 | for detailed description. | ||
| 52 | 61 | ||
| 53 | Ports are optional if they are not connected to anything at the hardware level. | 62 | Ports are optional if they are not connected to anything at the hardware level. |
| 54 | 63 | ||
diff --git a/Documentation/devicetree/bindings/media/i2c/melexis,mlx90640.txt b/Documentation/devicetree/bindings/media/i2c/melexis,mlx90640.txt new file mode 100644 index 000000000000..060d2b7a5893 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/melexis,mlx90640.txt | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | * Melexis MLX90640 FIR Sensor | ||
| 2 | |||
| 3 | Melexis MLX90640 FIR sensor support which allows recording of thermal data | ||
| 4 | with 32x24 resolution excluding 2 lines of coefficient data that is used by | ||
| 5 | userspace to render processed frames. | ||
| 6 | |||
| 7 | Required Properties: | ||
| 8 | - compatible : Must be "melexis,mlx90640" | ||
| 9 | - reg : i2c address of the device | ||
| 10 | |||
| 11 | Example: | ||
| 12 | |||
| 13 | i2c0@1c22000 { | ||
| 14 | ... | ||
| 15 | mlx90640@33 { | ||
| 16 | compatible = "melexis,mlx90640"; | ||
| 17 | reg = <0x33>; | ||
| 18 | }; | ||
| 19 | ... | ||
| 20 | }; | ||
diff --git a/Documentation/devicetree/bindings/media/i2c/mt9m001.txt b/Documentation/devicetree/bindings/media/i2c/mt9m001.txt new file mode 100644 index 000000000000..c920552b03ef --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/mt9m001.txt | |||
| @@ -0,0 +1,38 @@ | |||
| 1 | MT9M001: 1/2-Inch Megapixel Digital Image Sensor | ||
| 2 | |||
| 3 | The MT9M001 is an SXGA-format with a 1/2-inch CMOS active-pixel digital | ||
| 4 | image sensor. It is programmable through I2C interface. | ||
| 5 | |||
| 6 | Required Properties: | ||
| 7 | |||
| 8 | - compatible: shall be "onnn,mt9m001". | ||
| 9 | - clocks: reference to the master clock into sensor | ||
| 10 | |||
| 11 | Optional Properties: | ||
| 12 | |||
| 13 | - reset-gpios: GPIO handle which is connected to the reset pin of the chip. | ||
| 14 | Active low. | ||
| 15 | - standby-gpios: GPIO handle which is connected to the standby pin of the chip. | ||
| 16 | Active high. | ||
| 17 | |||
| 18 | The device node must contain one 'port' child node with one 'endpoint' child | ||
| 19 | sub-node for its digital output video port, in accordance with the video | ||
| 20 | interface bindings defined in: | ||
| 21 | Documentation/devicetree/bindings/media/video-interfaces.txt | ||
| 22 | |||
| 23 | Example: | ||
| 24 | |||
| 25 | &i2c1 { | ||
| 26 | camera-sensor@5d { | ||
| 27 | compatible = "onnn,mt9m001"; | ||
| 28 | reg = <0x5d>; | ||
| 29 | reset-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; | ||
| 30 | standby-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; | ||
| 31 | clocks = <&camera_clk>; | ||
| 32 | port { | ||
| 33 | mt9m001_out: endpoint { | ||
| 34 | remote-endpoint = <&vcap_in>; | ||
| 35 | }; | ||
| 36 | }; | ||
| 37 | }; | ||
| 38 | }; | ||
diff --git a/Documentation/devicetree/bindings/media/i2c/ov5645.txt b/Documentation/devicetree/bindings/media/i2c/ov5645.txt index fd7aec9f8e24..72ad992f77be 100644 --- a/Documentation/devicetree/bindings/media/i2c/ov5645.txt +++ b/Documentation/devicetree/bindings/media/i2c/ov5645.txt | |||
| @@ -26,9 +26,9 @@ Example: | |||
| 26 | &i2c1 { | 26 | &i2c1 { |
| 27 | ... | 27 | ... |
| 28 | 28 | ||
| 29 | ov5645: ov5645@78 { | 29 | ov5645: ov5645@3c { |
| 30 | compatible = "ovti,ov5645"; | 30 | compatible = "ovti,ov5645"; |
| 31 | reg = <0x78>; | 31 | reg = <0x3c>; |
| 32 | 32 | ||
| 33 | enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; | 33 | enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
| 34 | reset-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; | 34 | reset-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; |
| @@ -37,7 +37,7 @@ Example: | |||
| 37 | 37 | ||
| 38 | clocks = <&clks 200>; | 38 | clocks = <&clks 200>; |
| 39 | clock-names = "xclk"; | 39 | clock-names = "xclk"; |
| 40 | clock-frequency = <23880000>; | 40 | clock-frequency = <24000000>; |
| 41 | 41 | ||
| 42 | vdddo-supply = <&camera_dovdd_1v8>; | 42 | vdddo-supply = <&camera_dovdd_1v8>; |
| 43 | vdda-supply = <&camera_avdd_2v8>; | 43 | vdda-supply = <&camera_avdd_2v8>; |
diff --git a/Documentation/devicetree/bindings/media/imx7-csi.txt b/Documentation/devicetree/bindings/media/imx7-csi.txt new file mode 100644 index 000000000000..3c07bc676bc3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/imx7-csi.txt | |||
| @@ -0,0 +1,45 @@ | |||
| 1 | Freescale i.MX7 CMOS Sensor Interface | ||
| 2 | ===================================== | ||
| 3 | |||
| 4 | csi node | ||
| 5 | -------- | ||
| 6 | |||
| 7 | This is device node for the CMOS Sensor Interface (CSI) which enables the chip | ||
| 8 | to connect directly to external CMOS image sensors. | ||
| 9 | |||
| 10 | Required properties: | ||
| 11 | |||
| 12 | - compatible : "fsl,imx7-csi"; | ||
| 13 | - reg : base address and length of the register set for the device; | ||
| 14 | - interrupts : should contain CSI interrupt; | ||
| 15 | - clocks : list of clock specifiers, see | ||
| 16 | Documentation/devicetree/bindings/clock/clock-bindings.txt for details; | ||
| 17 | - clock-names : must contain "axi", "mclk" and "dcic" entries, matching | ||
| 18 | entries in the clock property; | ||
| 19 | |||
| 20 | The device node shall contain one 'port' child node with one child 'endpoint' | ||
| 21 | node, according to the bindings defined in: | ||
| 22 | Documentation/devicetree/bindings/media/video-interfaces.txt. | ||
| 23 | |||
| 24 | In the following example a remote endpoint is a video multiplexer. | ||
| 25 | |||
| 26 | example: | ||
| 27 | |||
| 28 | csi: csi@30710000 { | ||
| 29 | #address-cells = <1>; | ||
| 30 | #size-cells = <0>; | ||
| 31 | |||
| 32 | compatible = "fsl,imx7-csi"; | ||
| 33 | reg = <0x30710000 0x10000>; | ||
| 34 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | ||
| 35 | clocks = <&clks IMX7D_CLK_DUMMY>, | ||
| 36 | <&clks IMX7D_CSI_MCLK_ROOT_CLK>, | ||
| 37 | <&clks IMX7D_CLK_DUMMY>; | ||
| 38 | clock-names = "axi", "mclk", "dcic"; | ||
| 39 | |||
| 40 | port { | ||
| 41 | csi_from_csi_mux: endpoint { | ||
| 42 | remote-endpoint = <&csi_mux_to_csi>; | ||
| 43 | }; | ||
| 44 | }; | ||
| 45 | }; | ||
diff --git a/Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt b/Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt new file mode 100644 index 000000000000..71fd74ed3ec8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt | |||
| @@ -0,0 +1,90 @@ | |||
| 1 | Freescale i.MX7 Mipi CSI2 | ||
| 2 | ========================= | ||
| 3 | |||
| 4 | mipi_csi2 node | ||
| 5 | -------------- | ||
| 6 | |||
| 7 | This is the device node for the MIPI CSI-2 receiver core in i.MX7 SoC. It is | ||
| 8 | compatible with previous version of Samsung D-phy. | ||
| 9 | |||
| 10 | Required properties: | ||
| 11 | |||
| 12 | - compatible : "fsl,imx7-mipi-csi2"; | ||
| 13 | - reg : base address and length of the register set for the device; | ||
| 14 | - interrupts : should contain MIPI CSIS interrupt; | ||
| 15 | - clocks : list of clock specifiers, see | ||
| 16 | Documentation/devicetree/bindings/clock/clock-bindings.txt for details; | ||
| 17 | - clock-names : must contain "pclk", "wrap" and "phy" entries, matching | ||
| 18 | entries in the clock property; | ||
| 19 | - power-domains : a phandle to the power domain, see | ||
| 20 | Documentation/devicetree/bindings/power/power_domain.txt for details. | ||
| 21 | - reset-names : should include following entry "mrst"; | ||
| 22 | - resets : a list of phandle, should contain reset entry of | ||
| 23 | reset-names; | ||
| 24 | - phy-supply : from the generic phy bindings, a phandle to a regulator that | ||
| 25 | provides power to MIPI CSIS core; | ||
| 26 | |||
| 27 | Optional properties: | ||
| 28 | |||
| 29 | - clock-frequency : The IP's main (system bus) clock frequency in Hz, default | ||
| 30 | value when this property is not specified is 166 MHz; | ||
| 31 | - fsl,csis-hs-settle : differential receiver (HS-RX) settle time; | ||
| 32 | |||
| 33 | The device node should contain two 'port' child nodes with one child 'endpoint' | ||
| 34 | node, according to the bindings defined in: | ||
| 35 | Documentation/devicetree/bindings/ media/video-interfaces.txt. | ||
| 36 | The following are properties specific to those nodes. | ||
| 37 | |||
| 38 | port node | ||
| 39 | --------- | ||
| 40 | |||
| 41 | - reg : (required) can take the values 0 or 1, where 0 shall be | ||
| 42 | related to the sink port and port 1 shall be the source | ||
| 43 | one; | ||
| 44 | |||
| 45 | endpoint node | ||
| 46 | ------------- | ||
| 47 | |||
| 48 | - data-lanes : (required) an array specifying active physical MIPI-CSI2 | ||
| 49 | data input lanes and their mapping to logical lanes; this | ||
| 50 | shall only be applied to port 0 (sink port), the array's | ||
| 51 | content is unused only its length is meaningful, | ||
| 52 | in this case the maximum length supported is 2; | ||
| 53 | |||
| 54 | example: | ||
| 55 | |||
| 56 | mipi_csi: mipi-csi@30750000 { | ||
| 57 | #address-cells = <1>; | ||
| 58 | #size-cells = <0>; | ||
| 59 | |||
| 60 | compatible = "fsl,imx7-mipi-csi2"; | ||
| 61 | reg = <0x30750000 0x10000>; | ||
| 62 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | ||
| 63 | clocks = <&clks IMX7D_IPG_ROOT_CLK>, | ||
| 64 | <&clks IMX7D_MIPI_CSI_ROOT_CLK>, | ||
| 65 | <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; | ||
| 66 | clock-names = "pclk", "wrap", "phy"; | ||
| 67 | clock-frequency = <166000000>; | ||
| 68 | power-domains = <&pgc_mipi_phy>; | ||
| 69 | phy-supply = <®_1p0d>; | ||
| 70 | resets = <&src IMX7_RESET_MIPI_PHY_MRST>; | ||
| 71 | reset-names = "mrst"; | ||
| 72 | fsl,csis-hs-settle = <3>; | ||
| 73 | |||
| 74 | port@0 { | ||
| 75 | reg = <0>; | ||
| 76 | |||
| 77 | mipi_from_sensor: endpoint { | ||
| 78 | remote-endpoint = <&ov2680_to_mipi>; | ||
| 79 | data-lanes = <1>; | ||
| 80 | }; | ||
| 81 | }; | ||
| 82 | |||
| 83 | port@1 { | ||
| 84 | reg = <1>; | ||
| 85 | |||
| 86 | mipi_vc0_to_csi_mux: endpoint { | ||
| 87 | remote-endpoint = <&csi_mux_from_mipi_vc0>; | ||
| 88 | }; | ||
| 89 | }; | ||
| 90 | }; | ||
diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt index 2a615d84a682..b6b5dde6abd8 100644 --- a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt | |||
| @@ -66,6 +66,15 @@ vcodec_dec: vcodec@16000000 { | |||
| 66 | "vencpll", | 66 | "vencpll", |
| 67 | "venc_lt_sel", | 67 | "venc_lt_sel", |
| 68 | "vdec_bus_clk_src"; | 68 | "vdec_bus_clk_src"; |
| 69 | assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>, | ||
| 70 | <&topckgen CLK_TOP_CCI400_SEL>, | ||
| 71 | <&topckgen CLK_TOP_VDEC_SEL>, | ||
| 72 | <&apmixedsys CLK_APMIXED_VCODECPLL>, | ||
| 73 | <&apmixedsys CLK_APMIXED_VENCPLL>; | ||
| 74 | assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>, | ||
| 75 | <&topckgen CLK_TOP_UNIVPLL_D2>, | ||
| 76 | <&topckgen CLK_TOP_VCODECPLL>; | ||
| 77 | assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>; | ||
| 69 | }; | 78 | }; |
| 70 | 79 | ||
| 71 | vcodec_enc: vcodec@18002000 { | 80 | vcodec_enc: vcodec@18002000 { |
| @@ -105,4 +114,8 @@ vcodec_dec: vcodec@16000000 { | |||
| 105 | "venc_sel", | 114 | "venc_sel", |
| 106 | "venc_lt_sel_src", | 115 | "venc_lt_sel_src", |
| 107 | "venc_lt_sel"; | 116 | "venc_lt_sel"; |
| 117 | assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>, | ||
| 118 | <&topckgen CLK_TOP_VENC_LT_SEL>; | ||
| 119 | assigned-clock-parents = <&topckgen CLK_TOP_VENCPLL_D2>, | ||
| 120 | <&topckgen CLK_TOP_UNIVPLL1_D2>; | ||
| 108 | }; | 121 | }; |
diff --git a/Documentation/devicetree/bindings/media/rcar_vin.txt b/Documentation/devicetree/bindings/media/rcar_vin.txt index 0dd84a183ca7..224a4615b418 100644 --- a/Documentation/devicetree/bindings/media/rcar_vin.txt +++ b/Documentation/devicetree/bindings/media/rcar_vin.txt | |||
| @@ -7,12 +7,13 @@ family of devices. | |||
| 7 | Each VIN instance has a single parallel input that supports RGB and YUV video, | 7 | Each VIN instance has a single parallel input that supports RGB and YUV video, |
| 8 | with both external synchronization and BT.656 synchronization for the latter. | 8 | with both external synchronization and BT.656 synchronization for the latter. |
| 9 | Depending on the instance the VIN input is connected to external SoC pins, or | 9 | Depending on the instance the VIN input is connected to external SoC pins, or |
| 10 | on Gen3 platforms to a CSI-2 receiver. | 10 | on Gen3 and RZ/G2 platforms to a CSI-2 receiver. |
| 11 | 11 | ||
| 12 | - compatible: Must be one or more of the following | 12 | - compatible: Must be one or more of the following |
| 13 | - "renesas,vin-r8a7743" for the R8A7743 device | 13 | - "renesas,vin-r8a7743" for the R8A7743 device |
| 14 | - "renesas,vin-r8a7744" for the R8A7744 device | 14 | - "renesas,vin-r8a7744" for the R8A7744 device |
| 15 | - "renesas,vin-r8a7745" for the R8A7745 device | 15 | - "renesas,vin-r8a7745" for the R8A7745 device |
| 16 | - "renesas,vin-r8a774c0" for the R8A774C0 device | ||
| 16 | - "renesas,vin-r8a7778" for the R8A7778 device | 17 | - "renesas,vin-r8a7778" for the R8A7778 device |
| 17 | - "renesas,vin-r8a7779" for the R8A7779 device | 18 | - "renesas,vin-r8a7779" for the R8A7779 device |
| 18 | - "renesas,vin-r8a7790" for the R8A7790 device | 19 | - "renesas,vin-r8a7790" for the R8A7790 device |
| @@ -61,10 +62,10 @@ The per-board settings Gen2 platforms: | |||
| 61 | - data-enable-active: polarity of CLKENB signal, see [1] for | 62 | - data-enable-active: polarity of CLKENB signal, see [1] for |
| 62 | description. Default is active high. | 63 | description. Default is active high. |
| 63 | 64 | ||
| 64 | The per-board settings Gen3 platforms: | 65 | The per-board settings Gen3 and RZ/G2 platforms: |
| 65 | 66 | ||
| 66 | Gen3 platforms can support both a single connected parallel input source | 67 | Gen3 and RZ/G2 platforms can support both a single connected parallel input |
| 67 | from external SoC pins (port@0) and/or multiple parallel input sources | 68 | source from external SoC pins (port@0) and/or multiple parallel input sources |
| 68 | from local SoC CSI-2 receivers (port@1) depending on SoC. | 69 | from local SoC CSI-2 receivers (port@1) depending on SoC. |
| 69 | 70 | ||
| 70 | - renesas,id - ID number of the VIN, VINx in the documentation. | 71 | - renesas,id - ID number of the VIN, VINx in the documentation. |
diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.txt b/Documentation/devicetree/bindings/media/renesas,fcp.txt index 3ec91803ba58..79c37395b396 100644 --- a/Documentation/devicetree/bindings/media/renesas,fcp.txt +++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt | |||
| @@ -2,8 +2,9 @@ Renesas R-Car Frame Compression Processor (FCP) | |||
| 2 | ----------------------------------------------- | 2 | ----------------------------------------------- |
| 3 | 3 | ||
| 4 | The FCP is a companion module of video processing modules in the Renesas R-Car | 4 | The FCP is a companion module of video processing modules in the Renesas R-Car |
| 5 | Gen3 SoCs. It provides data compression and decompression, data caching, and | 5 | Gen3 and RZ/G2 SoCs. It provides data compression and decompression, data |
| 6 | conversion of AXI transactions in order to reduce the memory bandwidth. | 6 | caching, and conversion of AXI transactions in order to reduce the memory |
| 7 | bandwidth. | ||
| 7 | 8 | ||
| 8 | There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and FCP | 9 | There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and FCP |
| 9 | for FDP (FCPF). Their configuration and behaviour depend on the module they | 10 | for FDP (FCPF). Their configuration and behaviour depend on the module they |
diff --git a/Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt b/Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt index 541d936b62e8..d63275e17afd 100644 --- a/Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt +++ b/Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt | |||
| @@ -2,12 +2,13 @@ Renesas R-Car MIPI CSI-2 | |||
| 2 | ------------------------ | 2 | ------------------------ |
| 3 | 3 | ||
| 4 | The R-Car CSI-2 receiver device provides MIPI CSI-2 capabilities for the | 4 | The R-Car CSI-2 receiver device provides MIPI CSI-2 capabilities for the |
| 5 | Renesas R-Car family of devices. It is used in conjunction with the | 5 | Renesas R-Car and RZ/G2 family of devices. It is used in conjunction with the |
| 6 | R-Car VIN module, which provides the video capture capabilities. | 6 | R-Car VIN module, which provides the video capture capabilities. |
| 7 | 7 | ||
| 8 | Mandatory properties | 8 | Mandatory properties |
| 9 | -------------------- | 9 | -------------------- |
| 10 | - compatible: Must be one or more of the following | 10 | - compatible: Must be one or more of the following |
| 11 | - "renesas,r8a774c0-csi2" for the R8A774C0 device. | ||
| 11 | - "renesas,r8a7795-csi2" for the R8A7795 device. | 12 | - "renesas,r8a7795-csi2" for the R8A7795 device. |
| 12 | - "renesas,r8a7796-csi2" for the R8A7796 device. | 13 | - "renesas,r8a7796-csi2" for the R8A7796 device. |
| 13 | - "renesas,r8a77965-csi2" for the R8A77965 device. | 14 | - "renesas,r8a77965-csi2" for the R8A77965 device. |
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.txt b/Documentation/devicetree/bindings/media/renesas,vsp1.txt index 16427017cb45..cd5a955b2ea0 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.txt +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.txt | |||
| @@ -2,13 +2,13 @@ | |||
| 2 | 2 | ||
| 3 | The VSP is a video processing engine that supports up-/down-scaling, alpha | 3 | The VSP is a video processing engine that supports up-/down-scaling, alpha |
| 4 | blending, color space conversion and various other image processing features. | 4 | blending, color space conversion and various other image processing features. |
| 5 | It can be found in the Renesas R-Car second generation SoCs. | 5 | It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs. |
| 6 | 6 | ||
| 7 | Required properties: | 7 | Required properties: |
| 8 | 8 | ||
| 9 | - compatible: Must contain one of the following values | 9 | - compatible: Must contain one of the following values |
| 10 | - "renesas,vsp1" for the R-Car Gen2 VSP1 | 10 | - "renesas,vsp1" for the R-Car Gen2 and RZ/G1 VSP1 |
| 11 | - "renesas,vsp2" for the R-Car Gen3 VSP2 | 11 | - "renesas,vsp2" for the R-Car Gen3 and RZ/G2 VSP2 |
| 12 | 12 | ||
| 13 | - reg: Base address and length of the registers block for the VSP. | 13 | - reg: Base address and length of the registers block for the VSP. |
| 14 | - interrupts: VSP interrupt specifier. | 14 | - interrupts: VSP interrupt specifier. |
diff --git a/Documentation/devicetree/bindings/media/si470x.txt b/Documentation/devicetree/bindings/media/si470x.txt new file mode 100644 index 000000000000..a9403558362e --- /dev/null +++ b/Documentation/devicetree/bindings/media/si470x.txt | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | * Silicon Labs FM Radio receiver | ||
| 2 | |||
| 3 | The Silicon Labs Si470x is family of FM radio receivers with receive power scan | ||
| 4 | supporting 76-108 MHz, programmable through an I2C interface. | ||
| 5 | Some of them includes an RDS encoder. | ||
| 6 | |||
| 7 | Required Properties: | ||
| 8 | - compatible: Should contain "silabs,si470x" | ||
| 9 | - reg: the I2C address of the device | ||
| 10 | |||
| 11 | Optional Properties: | ||
| 12 | - interrupts : The interrupt number | ||
| 13 | - reset-gpios: GPIO specifier for the chips reset line | ||
| 14 | |||
| 15 | Example: | ||
| 16 | |||
| 17 | &i2c2 { | ||
| 18 | si470x@63 { | ||
| 19 | compatible = "silabs,si470x"; | ||
| 20 | reg = <0x63>; | ||
| 21 | |||
| 22 | interrupt-parent = <&gpj2>; | ||
| 23 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; | ||
| 24 | reset-gpios = <&gpj2 5 GPIO_ACTIVE_HIGH>; | ||
| 25 | }; | ||
| 26 | }; | ||
diff --git a/Documentation/devicetree/bindings/media/sun6i-csi.txt b/Documentation/devicetree/bindings/media/sun6i-csi.txt index d4ab34f2240c..0dd540bb03db 100644 --- a/Documentation/devicetree/bindings/media/sun6i-csi.txt +++ b/Documentation/devicetree/bindings/media/sun6i-csi.txt | |||
| @@ -6,8 +6,9 @@ Allwinner V3s SoC features a CSI module(CSI1) with parallel interface. | |||
| 6 | Required properties: | 6 | Required properties: |
| 7 | - compatible: value must be one of: | 7 | - compatible: value must be one of: |
| 8 | * "allwinner,sun6i-a31-csi" | 8 | * "allwinner,sun6i-a31-csi" |
| 9 | * "allwinner,sun8i-h3-csi", "allwinner,sun6i-a31-csi" | 9 | * "allwinner,sun8i-h3-csi" |
| 10 | * "allwinner,sun8i-v3s-csi" | 10 | * "allwinner,sun8i-v3s-csi" |
| 11 | * "allwinner,sun50i-a64-csi" | ||
| 11 | - reg: base address and size of the memory-mapped region. | 12 | - reg: base address and size of the memory-mapped region. |
| 12 | - interrupts: interrupt associated to this IP | 13 | - interrupts: interrupt associated to this IP |
| 13 | - clocks: phandles to the clocks feeding the CSI | 14 | - clocks: phandles to the clocks feeding the CSI |
diff --git a/Documentation/media/dvb-drivers/dvb-usb.rst b/Documentation/media/dvb-drivers/dvb-usb.rst index 6679191819aa..b2d5d9e62b30 100644 --- a/Documentation/media/dvb-drivers/dvb-usb.rst +++ b/Documentation/media/dvb-drivers/dvb-usb.rst | |||
| @@ -125,7 +125,7 @@ https://linuxtv.org/wiki/index.php/DVB_USB | |||
| 125 | 125 | ||
| 126 | 2004-12-26 | 126 | 2004-12-26 |
| 127 | 127 | ||
| 128 | - refactored the dibusb-driver, splitted into separate files | 128 | - refactored the dibusb-driver, split into separate files |
| 129 | - i2c-probing enabled | 129 | - i2c-probing enabled |
| 130 | 130 | ||
| 131 | 2004-12-06 | 131 | 2004-12-06 |
diff --git a/Documentation/media/kapi/dtv-core.rst b/Documentation/media/kapi/dtv-core.rst index 17454a2cf6b0..ac005b46f23e 100644 --- a/Documentation/media/kapi/dtv-core.rst +++ b/Documentation/media/kapi/dtv-core.rst | |||
| @@ -12,7 +12,7 @@ Digital TV devices are implemented by several different drivers: | |||
| 12 | - Frontend drivers that are usually implemented as two separate drivers: | 12 | - Frontend drivers that are usually implemented as two separate drivers: |
| 13 | 13 | ||
| 14 | - A tuner driver that implements the logic with commands the part of the | 14 | - A tuner driver that implements the logic with commands the part of the |
| 15 | hardware with is reponsible to tune into a digital TV transponder or | 15 | hardware with is responsible to tune into a digital TV transponder or |
| 16 | physical channel. The output of a tuner is usually a baseband or | 16 | physical channel. The output of a tuner is usually a baseband or |
| 17 | Intermediate Frequency (IF) signal; | 17 | Intermediate Frequency (IF) signal; |
| 18 | 18 | ||
diff --git a/Documentation/media/kapi/dtv-frontend.rst b/Documentation/media/kapi/dtv-frontend.rst index 8ea64742c7ba..fbc5517c8d5a 100644 --- a/Documentation/media/kapi/dtv-frontend.rst +++ b/Documentation/media/kapi/dtv-frontend.rst | |||
| @@ -328,7 +328,7 @@ Statistics collect | |||
| 328 | 328 | ||
| 329 | On almost all frontend hardware, the bit and byte counts are stored by | 329 | On almost all frontend hardware, the bit and byte counts are stored by |
| 330 | the hardware after a certain amount of time or after the total bit/block | 330 | the hardware after a certain amount of time or after the total bit/block |
| 331 | counter reaches a certain value (usually programable), for example, on | 331 | counter reaches a certain value (usually programmable), for example, on |
| 332 | every 1000 ms or after receiving 1,000,000 bits. | 332 | every 1000 ms or after receiving 1,000,000 bits. |
| 333 | 333 | ||
| 334 | So, if you read the registers too soon, you'll end by reading the same | 334 | So, if you read the registers too soon, you'll end by reading the same |
diff --git a/Documentation/media/kapi/mc-core.rst b/Documentation/media/kapi/mc-core.rst index 0bcfeadbc52d..f930725e0d6b 100644 --- a/Documentation/media/kapi/mc-core.rst +++ b/Documentation/media/kapi/mc-core.rst | |||
| @@ -60,7 +60,7 @@ Drivers initialize entity pads by calling | |||
| 60 | 60 | ||
| 61 | Drivers register entities with a media device by calling | 61 | Drivers register entities with a media device by calling |
| 62 | :c:func:`media_device_register_entity()` | 62 | :c:func:`media_device_register_entity()` |
| 63 | and unregistred by calling | 63 | and unregistered by calling |
| 64 | :c:func:`media_device_unregister_entity()`. | 64 | :c:func:`media_device_unregister_entity()`. |
| 65 | 65 | ||
| 66 | Interfaces | 66 | Interfaces |
diff --git a/Documentation/media/kapi/v4l2-device.rst b/Documentation/media/kapi/v4l2-device.rst index c4311f0421be..5e25bf182c18 100644 --- a/Documentation/media/kapi/v4l2-device.rst +++ b/Documentation/media/kapi/v4l2-device.rst | |||
| @@ -93,7 +93,7 @@ You can iterate over all registered devices as follows: | |||
| 93 | int err; | 93 | int err; |
| 94 | 94 | ||
| 95 | /* Find driver 'ivtv' on the PCI bus. | 95 | /* Find driver 'ivtv' on the PCI bus. |
| 96 | pci_bus_type is a global. For USB busses use usb_bus_type. */ | 96 | pci_bus_type is a global. For USB buses use usb_bus_type. */ |
| 97 | drv = driver_find("ivtv", &pci_bus_type); | 97 | drv = driver_find("ivtv", &pci_bus_type); |
| 98 | /* iterate over all ivtv device instances */ | 98 | /* iterate over all ivtv device instances */ |
| 99 | err = driver_for_each_device(drv, NULL, p, callback); | 99 | err = driver_for_each_device(drv, NULL, p, callback); |
diff --git a/Documentation/media/kapi/v4l2-intro.rst b/Documentation/media/kapi/v4l2-intro.rst index cea3e263e48b..4d54fa9d7a12 100644 --- a/Documentation/media/kapi/v4l2-intro.rst +++ b/Documentation/media/kapi/v4l2-intro.rst | |||
| @@ -11,7 +11,7 @@ hardware: most devices have multiple ICs, export multiple device nodes in | |||
| 11 | Especially the fact that V4L2 drivers have to setup supporting ICs to | 11 | Especially the fact that V4L2 drivers have to setup supporting ICs to |
| 12 | do audio/video muxing/encoding/decoding makes it more complex than most. | 12 | do audio/video muxing/encoding/decoding makes it more complex than most. |
| 13 | Usually these ICs are connected to the main bridge driver through one or | 13 | Usually these ICs are connected to the main bridge driver through one or |
| 14 | more I2C busses, but other busses can also be used. Such devices are | 14 | more I2C buses, but other buses can also be used. Such devices are |
| 15 | called 'sub-devices'. | 15 | called 'sub-devices'. |
| 16 | 16 | ||
| 17 | For a long time the framework was limited to the video_device struct for | 17 | For a long time the framework was limited to the video_device struct for |
diff --git a/Documentation/media/kapi/v4l2-subdev.rst b/Documentation/media/kapi/v4l2-subdev.rst index be4970909f40..29e07e23f888 100644 --- a/Documentation/media/kapi/v4l2-subdev.rst +++ b/Documentation/media/kapi/v4l2-subdev.rst | |||
| @@ -23,7 +23,7 @@ device data. | |||
| 23 | 23 | ||
| 24 | You also need a way to go from the low-level struct to :c:type:`v4l2_subdev`. | 24 | You also need a way to go from the low-level struct to :c:type:`v4l2_subdev`. |
| 25 | For the common i2c_client struct the i2c_set_clientdata() call is used to store | 25 | For the common i2c_client struct the i2c_set_clientdata() call is used to store |
| 26 | a :c:type:`v4l2_subdev` pointer, for other busses you may have to use other | 26 | a :c:type:`v4l2_subdev` pointer, for other buses you may have to use other |
| 27 | methods. | 27 | methods. |
| 28 | 28 | ||
| 29 | Bridges might also need to store per-subdev private data, such as a pointer to | 29 | Bridges might also need to store per-subdev private data, such as a pointer to |
| @@ -33,7 +33,7 @@ provides host private data for that purpose that can be accessed with | |||
| 33 | 33 | ||
| 34 | From the bridge driver perspective, you load the sub-device module and somehow | 34 | From the bridge driver perspective, you load the sub-device module and somehow |
| 35 | obtain the :c:type:`v4l2_subdev` pointer. For i2c devices this is easy: you call | 35 | obtain the :c:type:`v4l2_subdev` pointer. For i2c devices this is easy: you call |
| 36 | ``i2c_get_clientdata()``. For other busses something similar needs to be done. | 36 | ``i2c_get_clientdata()``. For other buses something similar needs to be done. |
| 37 | Helper functions exists for sub-devices on an I2C bus that do most of this | 37 | Helper functions exists for sub-devices on an I2C bus that do most of this |
| 38 | tricky work for you. | 38 | tricky work for you. |
| 39 | 39 | ||
diff --git a/Documentation/media/lirc.h.rst.exceptions b/Documentation/media/lirc.h.rst.exceptions index 379b9e7df5d0..7a8b8ff4f076 100644 --- a/Documentation/media/lirc.h.rst.exceptions +++ b/Documentation/media/lirc.h.rst.exceptions | |||
| @@ -60,6 +60,9 @@ ignore symbol RC_PROTO_SHARP | |||
| 60 | ignore symbol RC_PROTO_XMP | 60 | ignore symbol RC_PROTO_XMP |
| 61 | ignore symbol RC_PROTO_CEC | 61 | ignore symbol RC_PROTO_CEC |
| 62 | ignore symbol RC_PROTO_IMON | 62 | ignore symbol RC_PROTO_IMON |
| 63 | ignore symbol RC_PROTO_RCMM12 | ||
| 64 | ignore symbol RC_PROTO_RCMM24 | ||
| 65 | ignore symbol RC_PROTO_RCMM32 | ||
| 63 | 66 | ||
| 64 | # Undocumented macros | 67 | # Undocumented macros |
| 65 | 68 | ||
diff --git a/Documentation/media/uapi/dvb/audio-set-bypass-mode.rst b/Documentation/media/uapi/dvb/audio-set-bypass-mode.rst index d537da90acf5..d68f05d48d12 100644 --- a/Documentation/media/uapi/dvb/audio-set-bypass-mode.rst +++ b/Documentation/media/uapi/dvb/audio-set-bypass-mode.rst | |||
| @@ -57,7 +57,7 @@ Description | |||
| 57 | 57 | ||
| 58 | This ioctl call asks the Audio Device to bypass the Audio decoder and | 58 | This ioctl call asks the Audio Device to bypass the Audio decoder and |
| 59 | forward the stream without decoding. This mode shall be used if streams | 59 | forward the stream without decoding. This mode shall be used if streams |
| 60 | that can’t be handled by the Digial TV system shall be decoded. Dolby | 60 | that can’t be handled by the Digital TV system shall be decoded. Dolby |
| 61 | DigitalTM streams are automatically forwarded by the Digital TV subsystem if | 61 | DigitalTM streams are automatically forwarded by the Digital TV subsystem if |
| 62 | the hardware can handle it. | 62 | the hardware can handle it. |
| 63 | 63 | ||
diff --git a/Documentation/media/uapi/dvb/ca-set-descr.rst b/Documentation/media/uapi/dvb/ca-set-descr.rst index 22c8b8f94c7e..d36464ba2317 100644 --- a/Documentation/media/uapi/dvb/ca-set-descr.rst +++ b/Documentation/media/uapi/dvb/ca-set-descr.rst | |||
| @@ -39,7 +39,7 @@ Description | |||
| 39 | ----------- | 39 | ----------- |
| 40 | 40 | ||
| 41 | CA_SET_DESCR is used for feeding descrambler CA slots with descrambling | 41 | CA_SET_DESCR is used for feeding descrambler CA slots with descrambling |
| 42 | keys (refered as control words). | 42 | keys (referred as control words). |
| 43 | 43 | ||
| 44 | Return Value | 44 | Return Value |
| 45 | ------------ | 45 | ------------ |
diff --git a/Documentation/media/uapi/dvb/dmx-qbuf.rst b/Documentation/media/uapi/dvb/dmx-qbuf.rst index 9a1d85147c25..9dc845daa59d 100644 --- a/Documentation/media/uapi/dvb/dmx-qbuf.rst +++ b/Documentation/media/uapi/dvb/dmx-qbuf.rst | |||
| @@ -61,7 +61,7 @@ the device is closed. | |||
| 61 | 61 | ||
| 62 | Applications call the ``DMX_DQBUF`` ioctl to dequeue a filled | 62 | Applications call the ``DMX_DQBUF`` ioctl to dequeue a filled |
| 63 | (capturing) buffer from the driver's outgoing queue. | 63 | (capturing) buffer from the driver's outgoing queue. |
| 64 | They just set the ``index`` field withe the buffer ID to be queued. | 64 | They just set the ``index`` field with the buffer ID to be queued. |
| 65 | When ``DMX_DQBUF`` is called with a pointer to struct :c:type:`dmx_buffer`, | 65 | When ``DMX_DQBUF`` is called with a pointer to struct :c:type:`dmx_buffer`, |
| 66 | the driver fills the remaining fields or returns an error code. | 66 | the driver fills the remaining fields or returns an error code. |
| 67 | 67 | ||
diff --git a/Documentation/media/uapi/dvb/dvbproperty.rst b/Documentation/media/uapi/dvb/dvbproperty.rst index 371c72bb9419..0c4f5598f2be 100644 --- a/Documentation/media/uapi/dvb/dvbproperty.rst +++ b/Documentation/media/uapi/dvb/dvbproperty.rst | |||
| @@ -44,7 +44,7 @@ with supports all digital TV delivery systems. | |||
| 44 | struct :c:type:`dvb_frontend_parameters`. | 44 | struct :c:type:`dvb_frontend_parameters`. |
| 45 | 45 | ||
| 46 | 2. Don't use DVB API version 3 calls on hardware with supports | 46 | 2. Don't use DVB API version 3 calls on hardware with supports |
| 47 | newer standards. Such API provides no suport or a very limited | 47 | newer standards. Such API provides no support or a very limited |
| 48 | support to new standards and/or new hardware. | 48 | support to new standards and/or new hardware. |
| 49 | 49 | ||
| 50 | 3. Nowadays, most frontends support multiple delivery systems. | 50 | 3. Nowadays, most frontends support multiple delivery systems. |
diff --git a/Documentation/media/uapi/dvb/video_types.rst b/Documentation/media/uapi/dvb/video_types.rst index 2ed8aad84003..479942ce6fb8 100644 --- a/Documentation/media/uapi/dvb/video_types.rst +++ b/Documentation/media/uapi/dvb/video_types.rst | |||
| @@ -202,7 +202,7 @@ If video_blank is set video will be blanked out if the channel is | |||
| 202 | changed or if playback is stopped. Otherwise, the last picture will be | 202 | changed or if playback is stopped. Otherwise, the last picture will be |
| 203 | displayed. play_state indicates if the video is currently frozen, | 203 | displayed. play_state indicates if the video is currently frozen, |
| 204 | stopped, or being played back. The stream_source corresponds to the | 204 | stopped, or being played back. The stream_source corresponds to the |
| 205 | seleted source for the video stream. It can come either from the | 205 | selected source for the video stream. It can come either from the |
| 206 | demultiplexer or from memory. The video_format indicates the aspect | 206 | demultiplexer or from memory. The video_format indicates the aspect |
| 207 | ratio (one of 4:3 or 16:9) of the currently played video stream. | 207 | ratio (one of 4:3 or 16:9) of the currently played video stream. |
| 208 | Finally, display_format corresponds to the selected cropping mode in | 208 | Finally, display_format corresponds to the selected cropping mode in |
diff --git a/Documentation/media/uapi/fdl-appendix.rst b/Documentation/media/uapi/fdl-appendix.rst index f8dc85d3939c..9316b8617502 100644 --- a/Documentation/media/uapi/fdl-appendix.rst +++ b/Documentation/media/uapi/fdl-appendix.rst | |||
| @@ -363,7 +363,7 @@ various documents with a single copy that is included in the collection, | |||
| 363 | provided that you follow the rules of this License for verbatim copying | 363 | provided that you follow the rules of this License for verbatim copying |
| 364 | of each of the documents in all other respects. | 364 | of each of the documents in all other respects. |
| 365 | 365 | ||
| 366 | You may extract a single document from such a collection, and dispbibute | 366 | You may extract a single document from such a collection, and distribute |
| 367 | it individually under this License, provided you insert a copy of this | 367 | it individually under this License, provided you insert a copy of this |
| 368 | License into the extracted document, and follow this License in all | 368 | License into the extracted document, and follow this License in all |
| 369 | other respects regarding verbatim copying of that document. | 369 | other respects regarding verbatim copying of that document. |
diff --git a/Documentation/media/uapi/mediactl/media-types.rst b/Documentation/media/uapi/mediactl/media-types.rst index 8627587b7075..3af6a414b501 100644 --- a/Documentation/media/uapi/mediactl/media-types.rst +++ b/Documentation/media/uapi/mediactl/media-types.rst | |||
| @@ -164,7 +164,7 @@ Types and flags used to represent the media graph elements | |||
| 164 | 164 | ||
| 165 | * - ``MEDIA_ENT_F_PROC_VIDEO_PIXEL_ENC_CONV`` | 165 | * - ``MEDIA_ENT_F_PROC_VIDEO_PIXEL_ENC_CONV`` |
| 166 | - Video pixel encoding converter. An entity capable of pixel | 166 | - Video pixel encoding converter. An entity capable of pixel |
| 167 | enconding conversion must have at least one sink pad and one | 167 | encoding conversion must have at least one sink pad and one |
| 168 | source pad, and convert the encoding of pixels received on | 168 | source pad, and convert the encoding of pixels received on |
| 169 | its sink pad(s) to a different encoding output on its source | 169 | its sink pad(s) to a different encoding output on its source |
| 170 | pad(s). Pixel encoding conversion includes but isn't limited | 170 | pad(s). Pixel encoding conversion includes but isn't limited |
diff --git a/Documentation/media/uapi/mediactl/request-api.rst b/Documentation/media/uapi/mediactl/request-api.rst index 4b25ad03f45a..1ad631e549fe 100644 --- a/Documentation/media/uapi/mediactl/request-api.rst +++ b/Documentation/media/uapi/mediactl/request-api.rst | |||
| @@ -91,7 +91,7 @@ A request must contain at least one buffer, otherwise ``ENOENT`` is returned. | |||
| 91 | A queued request cannot be modified anymore. | 91 | A queued request cannot be modified anymore. |
| 92 | 92 | ||
| 93 | .. caution:: | 93 | .. caution:: |
| 94 | For :ref:`memory-to-memory devices <codec>` you can use requests only for | 94 | For :ref:`memory-to-memory devices <mem2mem>` you can use requests only for |
| 95 | output buffers, not for capture buffers. Attempting to add a capture buffer | 95 | output buffers, not for capture buffers. Attempting to add a capture buffer |
| 96 | to a request will result in an ``EACCES`` error. | 96 | to a request will result in an ``EACCES`` error. |
| 97 | 97 | ||
| @@ -152,7 +152,7 @@ if it had just been allocated. | |||
| 152 | Example for a Codec Device | 152 | Example for a Codec Device |
| 153 | -------------------------- | 153 | -------------------------- |
| 154 | 154 | ||
| 155 | For use-cases such as :ref:`codecs <codec>`, the request API can be used | 155 | For use-cases such as :ref:`codecs <mem2mem>`, the request API can be used |
| 156 | to associate specific controls to | 156 | to associate specific controls to |
| 157 | be applied by the driver for the OUTPUT buffer, allowing user-space | 157 | be applied by the driver for the OUTPUT buffer, allowing user-space |
| 158 | to queue many such buffers in advance. It can also take advantage of requests' | 158 | to queue many such buffers in advance. It can also take advantage of requests' |
diff --git a/Documentation/media/uapi/rc/rc-tables.rst b/Documentation/media/uapi/rc/rc-tables.rst index cb670d10998b..f460031d8531 100644 --- a/Documentation/media/uapi/rc/rc-tables.rst +++ b/Documentation/media/uapi/rc/rc-tables.rst | |||
| @@ -385,7 +385,7 @@ the remote via /dev/input/event devices. | |||
| 385 | 385 | ||
| 386 | - ``KEY_CHANNELDOWN`` | 386 | - ``KEY_CHANNELDOWN`` |
| 387 | 387 | ||
| 388 | - Decrease channel sequencially | 388 | - Decrease channel sequentially |
| 389 | 389 | ||
| 390 | - CHANNEL - / CHANNEL DOWN / DOWN | 390 | - CHANNEL - / CHANNEL DOWN / DOWN |
| 391 | 391 | ||
| @@ -393,7 +393,7 @@ the remote via /dev/input/event devices. | |||
| 393 | 393 | ||
| 394 | - ``KEY_CHANNELUP`` | 394 | - ``KEY_CHANNELUP`` |
| 395 | 395 | ||
| 396 | - Increase channel sequencially | 396 | - Increase channel sequentially |
| 397 | 397 | ||
| 398 | - CHANNEL + / CHANNEL UP / UP | 398 | - CHANNEL + / CHANNEL UP / UP |
| 399 | 399 | ||
diff --git a/Documentation/media/uapi/v4l/buffer.rst b/Documentation/media/uapi/v4l/buffer.rst index 86878bb0087f..81ffdcb89057 100644 --- a/Documentation/media/uapi/v4l/buffer.rst +++ b/Documentation/media/uapi/v4l/buffer.rst | |||
| @@ -230,8 +230,7 @@ struct v4l2_buffer | |||
| 230 | * - struct :c:type:`v4l2_timecode` | 230 | * - struct :c:type:`v4l2_timecode` |
| 231 | - ``timecode`` | 231 | - ``timecode`` |
| 232 | - | 232 | - |
| 233 | - When ``type`` is ``V4L2_BUF_TYPE_VIDEO_CAPTURE`` and the | 233 | - When the ``V4L2_BUF_FLAG_TIMECODE`` flag is set in ``flags``, this |
| 234 | ``V4L2_BUF_FLAG_TIMECODE`` flag is set in ``flags``, this | ||
| 235 | structure contains a frame timecode. In | 234 | structure contains a frame timecode. In |
| 236 | :c:type:`V4L2_FIELD_ALTERNATE <v4l2_field>` mode the top and | 235 | :c:type:`V4L2_FIELD_ALTERNATE <v4l2_field>` mode the top and |
| 237 | bottom field contain the same timecode. Timecodes are intended to | 236 | bottom field contain the same timecode. Timecodes are intended to |
| @@ -714,10 +713,10 @@ enum v4l2_memory | |||
| 714 | Timecodes | 713 | Timecodes |
| 715 | ========= | 714 | ========= |
| 716 | 715 | ||
| 717 | The struct :c:type:`v4l2_timecode` structure is designed to hold a | 716 | The :c:type:`v4l2_buffer_timecode` structure is designed to hold a |
| 718 | :ref:`smpte12m` or similar timecode. (struct | 717 | :ref:`smpte12m` or similar timecode. |
| 719 | struct :c:type:`timeval` timestamps are stored in struct | 718 | (struct :c:type:`timeval` timestamps are stored in the struct |
| 720 | :c:type:`v4l2_buffer` field ``timestamp``.) | 719 | :c:type:`v4l2_buffer` ``timestamp`` field.) |
| 721 | 720 | ||
| 722 | 721 | ||
| 723 | .. c:type:: v4l2_timecode | 722 | .. c:type:: v4l2_timecode |
diff --git a/Documentation/media/uapi/v4l/common.rst b/Documentation/media/uapi/v4l/common.rst index 889f2f2632a1..5e87ae24e4b4 100644 --- a/Documentation/media/uapi/v4l/common.rst +++ b/Documentation/media/uapi/v4l/common.rst | |||
| @@ -46,6 +46,17 @@ applicable to all devices. | |||
| 46 | dv-timings | 46 | dv-timings |
| 47 | control | 47 | control |
| 48 | extended-controls | 48 | extended-controls |
| 49 | ext-ctrls-camera | ||
| 50 | ext-ctrls-flash | ||
| 51 | ext-ctrls-image-source | ||
| 52 | ext-ctrls-image-process | ||
| 53 | ext-ctrls-codec | ||
| 54 | ext-ctrls-jpeg | ||
| 55 | ext-ctrls-dv | ||
| 56 | ext-ctrls-rf-tuner | ||
| 57 | ext-ctrls-fm-tx | ||
| 58 | ext-ctrls-fm-rx | ||
| 59 | ext-ctrls-detect | ||
| 49 | format | 60 | format |
| 50 | planar-apis | 61 | planar-apis |
| 51 | selection-api | 62 | selection-api |
diff --git a/Documentation/media/uapi/v4l/control.rst b/Documentation/media/uapi/v4l/control.rst index 0d46526b5935..71417bba028c 100644 --- a/Documentation/media/uapi/v4l/control.rst +++ b/Documentation/media/uapi/v4l/control.rst | |||
| @@ -499,7 +499,7 @@ Example: Changing controls | |||
| 499 | .. [#f1] | 499 | .. [#f1] |
| 500 | The use of ``V4L2_CID_PRIVATE_BASE`` is problematic because different | 500 | The use of ``V4L2_CID_PRIVATE_BASE`` is problematic because different |
| 501 | drivers may use the same ``V4L2_CID_PRIVATE_BASE`` ID for different | 501 | drivers may use the same ``V4L2_CID_PRIVATE_BASE`` ID for different |
| 502 | controls. This makes it hard to programatically set such controls | 502 | controls. This makes it hard to programmatically set such controls |
| 503 | since the meaning of the control with that ID is driver dependent. In | 503 | since the meaning of the control with that ID is driver dependent. In |
| 504 | order to resolve this drivers use unique IDs and the | 504 | order to resolve this drivers use unique IDs and the |
| 505 | ``V4L2_CID_PRIVATE_BASE`` IDs are mapped to those unique IDs by the | 505 | ``V4L2_CID_PRIVATE_BASE`` IDs are mapped to those unique IDs by the |
diff --git a/Documentation/media/uapi/v4l/dev-effect.rst b/Documentation/media/uapi/v4l/dev-effect.rst deleted file mode 100644 index b165e2c20910..000000000000 --- a/Documentation/media/uapi/v4l/dev-effect.rst +++ /dev/null | |||
| @@ -1,28 +0,0 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _effect: | ||
| 11 | |||
| 12 | ************************ | ||
| 13 | Effect Devices Interface | ||
| 14 | ************************ | ||
| 15 | |||
| 16 | .. note:: | ||
| 17 | This interface has been be suspended from the V4L2 API. | ||
| 18 | The implementation for such effects should be done | ||
| 19 | via mem2mem devices. | ||
| 20 | |||
| 21 | A V4L2 video effect device can do image effects, filtering, or combine | ||
| 22 | two or more images or image streams. For example video transitions or | ||
| 23 | wipes. Applications send data to be processed and receive the result | ||
| 24 | data either with :ref:`read() <func-read>` and | ||
| 25 | :ref:`write() <func-write>` functions, or through the streaming I/O | ||
| 26 | mechanism. | ||
| 27 | |||
| 28 | [to do] | ||
diff --git a/Documentation/media/uapi/v4l/dev-codec.rst b/Documentation/media/uapi/v4l/dev-mem2mem.rst index b5e017c17834..67a980818dc8 100644 --- a/Documentation/media/uapi/v4l/dev-codec.rst +++ b/Documentation/media/uapi/v4l/dev-mem2mem.rst | |||
| @@ -7,37 +7,36 @@ | |||
| 7 | .. | 7 | .. |
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections |
| 9 | 9 | ||
| 10 | .. _codec: | 10 | .. _mem2mem: |
| 11 | 11 | ||
| 12 | *************** | 12 | ******************************** |
| 13 | Codec Interface | 13 | Video Memory-To-Memory Interface |
| 14 | *************** | 14 | ******************************** |
| 15 | 15 | ||
| 16 | A V4L2 codec can compress, decompress, transform, or otherwise convert | 16 | A V4L2 memory-to-memory device can compress, decompress, transform, or |
| 17 | video data from one format into another format, in memory. Typically | 17 | otherwise convert video data from one format into another format, in memory. |
| 18 | such devices are memory-to-memory devices (i.e. devices with the | 18 | Such memory-to-memory devices set the ``V4L2_CAP_VIDEO_M2M`` or |
| 19 | ``V4L2_CAP_VIDEO_M2M`` or ``V4L2_CAP_VIDEO_M2M_MPLANE`` capability set). | 19 | ``V4L2_CAP_VIDEO_M2M_MPLANE`` capability. Examples of memory-to-memory |
| 20 | devices are codecs, scalers, deinterlacers or format converters (i.e. | ||
| 21 | converting from YUV to RGB). | ||
| 20 | 22 | ||
| 21 | A memory-to-memory video node acts just like a normal video node, but it | 23 | A memory-to-memory video node acts just like a normal video node, but it |
| 22 | supports both output (sending frames from memory to the codec hardware) | 24 | supports both output (sending frames from memory to the hardware) |
| 23 | and capture (receiving the processed frames from the codec hardware into | 25 | and capture (receiving the processed frames from the hardware into |
| 24 | memory) stream I/O. An application will have to setup the stream I/O for | 26 | memory) stream I/O. An application will have to setup the stream I/O for |
| 25 | both sides and finally call :ref:`VIDIOC_STREAMON <VIDIOC_STREAMON>` | 27 | both sides and finally call :ref:`VIDIOC_STREAMON <VIDIOC_STREAMON>` |
| 26 | for both capture and output to start the codec. | 28 | for both capture and output to start the hardware. |
| 27 | |||
| 28 | Video compression codecs use the MPEG controls to setup their codec | ||
| 29 | parameters | ||
| 30 | |||
| 31 | .. note:: | ||
| 32 | |||
| 33 | The MPEG controls actually support many more codecs than | ||
| 34 | just MPEG. See :ref:`mpeg-controls`. | ||
| 35 | 29 | ||
| 36 | Memory-to-memory devices function as a shared resource: you can | 30 | Memory-to-memory devices function as a shared resource: you can |
| 37 | open the video node multiple times, each application setting up their | 31 | open the video node multiple times, each application setting up their |
| 38 | own codec properties that are local to the file handle, and each can use | 32 | own properties that are local to the file handle, and each can use |
| 39 | it independently from the others. The driver will arbitrate access to | 33 | it independently from the others. The driver will arbitrate access to |
| 40 | the codec and reprogram it whenever another file handler gets access. | 34 | the hardware and reprogram it whenever another file handler gets access. |
| 41 | This is different from the usual video node behavior where the video | 35 | This is different from the usual video node behavior where the video |
| 42 | properties are global to the device (i.e. changing something through one | 36 | properties are global to the device (i.e. changing something through one |
| 43 | file handle is visible through another file handle). | 37 | file handle is visible through another file handle). |
| 38 | |||
| 39 | One of the most common memory-to-memory device is the codec. Codecs | ||
| 40 | are more complicated than most and require additional setup for | ||
| 41 | their codec parameters. This is done through codec controls. | ||
| 42 | See :ref:`mpeg-controls`. | ||
diff --git a/Documentation/media/uapi/v4l/dev-teletext.rst b/Documentation/media/uapi/v4l/dev-teletext.rst deleted file mode 100644 index 35e8c4b35458..000000000000 --- a/Documentation/media/uapi/v4l/dev-teletext.rst +++ /dev/null | |||
| @@ -1,41 +0,0 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _ttx: | ||
| 11 | |||
| 12 | ****************** | ||
| 13 | Teletext Interface | ||
| 14 | ****************** | ||
| 15 | |||
| 16 | This interface was aimed at devices receiving and demodulating Teletext | ||
| 17 | data [:ref:`ets300706`, :ref:`itu653`], evaluating the Teletext | ||
| 18 | packages and storing formatted pages in cache memory. Such devices are | ||
| 19 | usually implemented as microcontrollers with serial interface | ||
| 20 | (I\ :sup:`2`\ C) and could be found on old TV cards, dedicated Teletext | ||
| 21 | decoding cards and home-brew devices connected to the PC parallel port. | ||
| 22 | |||
| 23 | The Teletext API was designed by Martin Buck. It was defined in the | ||
| 24 | kernel header file ``linux/videotext.h``, the specification is available | ||
| 25 | from | ||
| 26 | `ftp://ftp.gwdg.de/pub/linux/misc/videotext/ <ftp://ftp.gwdg.de/pub/linux/misc/videotext/>`__. | ||
| 27 | (Videotext is the name of the German public television Teletext | ||
| 28 | service.) | ||
| 29 | |||
| 30 | Eventually the Teletext API was integrated into the V4L API with | ||
| 31 | character device file names ``/dev/vtx0`` to ``/dev/vtx31``, device | ||
| 32 | major number 81, minor numbers 192 to 223. | ||
| 33 | |||
| 34 | However, teletext decoders were quickly replaced by more generic VBI | ||
| 35 | demodulators and those dedicated teletext decoders no longer exist. For | ||
| 36 | many years the vtx devices were still around, even though nobody used | ||
| 37 | them. So the decision was made to finally remove support for the | ||
| 38 | Teletext API in kernel 2.6.37. | ||
| 39 | |||
| 40 | Modern devices all use the :ref:`raw <raw-vbi>` or | ||
| 41 | :ref:`sliced` VBI API. | ||
diff --git a/Documentation/media/uapi/v4l/devices.rst b/Documentation/media/uapi/v4l/devices.rst index 5dbe9d13b6e6..07f8d047662b 100644 --- a/Documentation/media/uapi/v4l/devices.rst +++ b/Documentation/media/uapi/v4l/devices.rst | |||
| @@ -21,11 +21,9 @@ Interfaces | |||
| 21 | dev-overlay | 21 | dev-overlay |
| 22 | dev-output | 22 | dev-output |
| 23 | dev-osd | 23 | dev-osd |
| 24 | dev-codec | 24 | dev-mem2mem |
| 25 | dev-effect | ||
| 26 | dev-raw-vbi | 25 | dev-raw-vbi |
| 27 | dev-sliced-vbi | 26 | dev-sliced-vbi |
| 28 | dev-teletext | ||
| 29 | dev-radio | 27 | dev-radio |
| 30 | dev-rds | 28 | dev-rds |
| 31 | dev-sdr | 29 | dev-sdr |
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-camera.rst b/Documentation/media/uapi/v4l/ext-ctrls-camera.rst new file mode 100644 index 000000000000..d3a553cd86c9 --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-camera.rst | |||
| @@ -0,0 +1,508 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _camera-controls: | ||
| 11 | |||
| 12 | ************************ | ||
| 13 | Camera Control Reference | ||
| 14 | ************************ | ||
| 15 | |||
| 16 | The Camera class includes controls for mechanical (or equivalent | ||
| 17 | digital) features of a device such as controllable lenses or sensors. | ||
| 18 | |||
| 19 | |||
| 20 | .. _camera-control-id: | ||
| 21 | |||
| 22 | Camera Control IDs | ||
| 23 | ================== | ||
| 24 | |||
| 25 | ``V4L2_CID_CAMERA_CLASS (class)`` | ||
| 26 | The Camera class descriptor. Calling | ||
| 27 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 28 | return a description of this control class. | ||
| 29 | |||
| 30 | .. _v4l2-exposure-auto-type: | ||
| 31 | |||
| 32 | ``V4L2_CID_EXPOSURE_AUTO`` | ||
| 33 | (enum) | ||
| 34 | |||
| 35 | enum v4l2_exposure_auto_type - | ||
| 36 | Enables automatic adjustments of the exposure time and/or iris | ||
| 37 | aperture. The effect of manual changes of the exposure time or iris | ||
| 38 | aperture while these features are enabled is undefined, drivers | ||
| 39 | should ignore such requests. Possible values are: | ||
| 40 | |||
| 41 | |||
| 42 | |||
| 43 | .. flat-table:: | ||
| 44 | :header-rows: 0 | ||
| 45 | :stub-columns: 0 | ||
| 46 | |||
| 47 | * - ``V4L2_EXPOSURE_AUTO`` | ||
| 48 | - Automatic exposure time, automatic iris aperture. | ||
| 49 | * - ``V4L2_EXPOSURE_MANUAL`` | ||
| 50 | - Manual exposure time, manual iris. | ||
| 51 | * - ``V4L2_EXPOSURE_SHUTTER_PRIORITY`` | ||
| 52 | - Manual exposure time, auto iris. | ||
| 53 | * - ``V4L2_EXPOSURE_APERTURE_PRIORITY`` | ||
| 54 | - Auto exposure time, manual iris. | ||
| 55 | |||
| 56 | |||
| 57 | |||
| 58 | ``V4L2_CID_EXPOSURE_ABSOLUTE (integer)`` | ||
| 59 | Determines the exposure time of the camera sensor. The exposure time | ||
| 60 | is limited by the frame interval. Drivers should interpret the | ||
| 61 | values as 100 µs units, where the value 1 stands for 1/10000th of a | ||
| 62 | second, 10000 for 1 second and 100000 for 10 seconds. | ||
| 63 | |||
| 64 | ``V4L2_CID_EXPOSURE_AUTO_PRIORITY (boolean)`` | ||
| 65 | When ``V4L2_CID_EXPOSURE_AUTO`` is set to ``AUTO`` or | ||
| 66 | ``APERTURE_PRIORITY``, this control determines if the device may | ||
| 67 | dynamically vary the frame rate. By default this feature is disabled | ||
| 68 | (0) and the frame rate must remain constant. | ||
| 69 | |||
| 70 | ``V4L2_CID_AUTO_EXPOSURE_BIAS (integer menu)`` | ||
| 71 | Determines the automatic exposure compensation, it is effective only | ||
| 72 | when ``V4L2_CID_EXPOSURE_AUTO`` control is set to ``AUTO``, | ||
| 73 | ``SHUTTER_PRIORITY`` or ``APERTURE_PRIORITY``. It is expressed in | ||
| 74 | terms of EV, drivers should interpret the values as 0.001 EV units, | ||
| 75 | where the value 1000 stands for +1 EV. | ||
| 76 | |||
| 77 | Increasing the exposure compensation value is equivalent to | ||
| 78 | decreasing the exposure value (EV) and will increase the amount of | ||
| 79 | light at the image sensor. The camera performs the exposure | ||
| 80 | compensation by adjusting absolute exposure time and/or aperture. | ||
| 81 | |||
| 82 | .. _v4l2-exposure-metering: | ||
| 83 | |||
| 84 | ``V4L2_CID_EXPOSURE_METERING`` | ||
| 85 | (enum) | ||
| 86 | |||
| 87 | enum v4l2_exposure_metering - | ||
| 88 | Determines how the camera measures the amount of light available for | ||
| 89 | the frame exposure. Possible values are: | ||
| 90 | |||
| 91 | .. tabularcolumns:: |p{8.5cm}|p{9.0cm}| | ||
| 92 | |||
| 93 | .. flat-table:: | ||
| 94 | :header-rows: 0 | ||
| 95 | :stub-columns: 0 | ||
| 96 | |||
| 97 | * - ``V4L2_EXPOSURE_METERING_AVERAGE`` | ||
| 98 | - Use the light information coming from the entire frame and average | ||
| 99 | giving no weighting to any particular portion of the metered area. | ||
| 100 | * - ``V4L2_EXPOSURE_METERING_CENTER_WEIGHTED`` | ||
| 101 | - Average the light information coming from the entire frame giving | ||
| 102 | priority to the center of the metered area. | ||
| 103 | * - ``V4L2_EXPOSURE_METERING_SPOT`` | ||
| 104 | - Measure only very small area at the center of the frame. | ||
| 105 | * - ``V4L2_EXPOSURE_METERING_MATRIX`` | ||
| 106 | - A multi-zone metering. The light intensity is measured in several | ||
| 107 | points of the frame and the results are combined. The algorithm of | ||
| 108 | the zones selection and their significance in calculating the | ||
| 109 | final value is device dependent. | ||
| 110 | |||
| 111 | |||
| 112 | |||
| 113 | ``V4L2_CID_PAN_RELATIVE (integer)`` | ||
| 114 | This control turns the camera horizontally by the specified amount. | ||
| 115 | The unit is undefined. A positive value moves the camera to the | ||
| 116 | right (clockwise when viewed from above), a negative value to the | ||
| 117 | left. A value of zero does not cause motion. This is a write-only | ||
| 118 | control. | ||
| 119 | |||
| 120 | ``V4L2_CID_TILT_RELATIVE (integer)`` | ||
| 121 | This control turns the camera vertically by the specified amount. | ||
| 122 | The unit is undefined. A positive value moves the camera up, a | ||
| 123 | negative value down. A value of zero does not cause motion. This is | ||
| 124 | a write-only control. | ||
| 125 | |||
| 126 | ``V4L2_CID_PAN_RESET (button)`` | ||
| 127 | When this control is set, the camera moves horizontally to the | ||
| 128 | default position. | ||
| 129 | |||
| 130 | ``V4L2_CID_TILT_RESET (button)`` | ||
| 131 | When this control is set, the camera moves vertically to the default | ||
| 132 | position. | ||
| 133 | |||
| 134 | ``V4L2_CID_PAN_ABSOLUTE (integer)`` | ||
| 135 | This control turns the camera horizontally to the specified | ||
| 136 | position. Positive values move the camera to the right (clockwise | ||
| 137 | when viewed from above), negative values to the left. Drivers should | ||
| 138 | interpret the values as arc seconds, with valid values between -180 | ||
| 139 | * 3600 and +180 * 3600 inclusive. | ||
| 140 | |||
| 141 | ``V4L2_CID_TILT_ABSOLUTE (integer)`` | ||
| 142 | This control turns the camera vertically to the specified position. | ||
| 143 | Positive values move the camera up, negative values down. Drivers | ||
| 144 | should interpret the values as arc seconds, with valid values | ||
| 145 | between -180 * 3600 and +180 * 3600 inclusive. | ||
| 146 | |||
| 147 | ``V4L2_CID_FOCUS_ABSOLUTE (integer)`` | ||
| 148 | This control sets the focal point of the camera to the specified | ||
| 149 | position. The unit is undefined. Positive values set the focus | ||
| 150 | closer to the camera, negative values towards infinity. | ||
| 151 | |||
| 152 | ``V4L2_CID_FOCUS_RELATIVE (integer)`` | ||
| 153 | This control moves the focal point of the camera by the specified | ||
| 154 | amount. The unit is undefined. Positive values move the focus closer | ||
| 155 | to the camera, negative values towards infinity. This is a | ||
| 156 | write-only control. | ||
| 157 | |||
| 158 | ``V4L2_CID_FOCUS_AUTO (boolean)`` | ||
| 159 | Enables continuous automatic focus adjustments. The effect of manual | ||
| 160 | focus adjustments while this feature is enabled is undefined, | ||
| 161 | drivers should ignore such requests. | ||
| 162 | |||
| 163 | ``V4L2_CID_AUTO_FOCUS_START (button)`` | ||
| 164 | Starts single auto focus process. The effect of setting this control | ||
| 165 | when ``V4L2_CID_FOCUS_AUTO`` is set to ``TRUE`` (1) is undefined, | ||
| 166 | drivers should ignore such requests. | ||
| 167 | |||
| 168 | ``V4L2_CID_AUTO_FOCUS_STOP (button)`` | ||
| 169 | Aborts automatic focusing started with ``V4L2_CID_AUTO_FOCUS_START`` | ||
| 170 | control. It is effective only when the continuous autofocus is | ||
| 171 | disabled, that is when ``V4L2_CID_FOCUS_AUTO`` control is set to | ||
| 172 | ``FALSE`` (0). | ||
| 173 | |||
| 174 | .. _v4l2-auto-focus-status: | ||
| 175 | |||
| 176 | ``V4L2_CID_AUTO_FOCUS_STATUS (bitmask)`` | ||
| 177 | The automatic focus status. This is a read-only control. | ||
| 178 | |||
| 179 | Setting ``V4L2_LOCK_FOCUS`` lock bit of the ``V4L2_CID_3A_LOCK`` | ||
| 180 | control may stop updates of the ``V4L2_CID_AUTO_FOCUS_STATUS`` | ||
| 181 | control value. | ||
| 182 | |||
| 183 | .. tabularcolumns:: |p{6.5cm}|p{11.0cm}| | ||
| 184 | |||
| 185 | .. flat-table:: | ||
| 186 | :header-rows: 0 | ||
| 187 | :stub-columns: 0 | ||
| 188 | |||
| 189 | * - ``V4L2_AUTO_FOCUS_STATUS_IDLE`` | ||
| 190 | - Automatic focus is not active. | ||
| 191 | * - ``V4L2_AUTO_FOCUS_STATUS_BUSY`` | ||
| 192 | - Automatic focusing is in progress. | ||
| 193 | * - ``V4L2_AUTO_FOCUS_STATUS_REACHED`` | ||
| 194 | - Focus has been reached. | ||
| 195 | * - ``V4L2_AUTO_FOCUS_STATUS_FAILED`` | ||
| 196 | - Automatic focus has failed, the driver will not transition from | ||
| 197 | this state until another action is performed by an application. | ||
| 198 | |||
| 199 | |||
| 200 | |||
| 201 | .. _v4l2-auto-focus-range: | ||
| 202 | |||
| 203 | ``V4L2_CID_AUTO_FOCUS_RANGE`` | ||
| 204 | (enum) | ||
| 205 | |||
| 206 | enum v4l2_auto_focus_range - | ||
| 207 | Determines auto focus distance range for which lens may be adjusted. | ||
| 208 | |||
| 209 | .. tabularcolumns:: |p{6.5cm}|p{11.0cm}| | ||
| 210 | |||
| 211 | .. flat-table:: | ||
| 212 | :header-rows: 0 | ||
| 213 | :stub-columns: 0 | ||
| 214 | |||
| 215 | * - ``V4L2_AUTO_FOCUS_RANGE_AUTO`` | ||
| 216 | - The camera automatically selects the focus range. | ||
| 217 | * - ``V4L2_AUTO_FOCUS_RANGE_NORMAL`` | ||
| 218 | - Normal distance range, limited for best automatic focus | ||
| 219 | performance. | ||
| 220 | * - ``V4L2_AUTO_FOCUS_RANGE_MACRO`` | ||
| 221 | - Macro (close-up) auto focus. The camera will use its minimum | ||
| 222 | possible distance for auto focus. | ||
| 223 | * - ``V4L2_AUTO_FOCUS_RANGE_INFINITY`` | ||
| 224 | - The lens is set to focus on an object at infinite distance. | ||
| 225 | |||
| 226 | |||
| 227 | |||
| 228 | ``V4L2_CID_ZOOM_ABSOLUTE (integer)`` | ||
| 229 | Specify the objective lens focal length as an absolute value. The | ||
| 230 | zoom unit is driver-specific and its value should be a positive | ||
| 231 | integer. | ||
| 232 | |||
| 233 | ``V4L2_CID_ZOOM_RELATIVE (integer)`` | ||
| 234 | Specify the objective lens focal length relatively to the current | ||
| 235 | value. Positive values move the zoom lens group towards the | ||
| 236 | telephoto direction, negative values towards the wide-angle | ||
| 237 | direction. The zoom unit is driver-specific. This is a write-only | ||
| 238 | control. | ||
| 239 | |||
| 240 | ``V4L2_CID_ZOOM_CONTINUOUS (integer)`` | ||
| 241 | Move the objective lens group at the specified speed until it | ||
| 242 | reaches physical device limits or until an explicit request to stop | ||
| 243 | the movement. A positive value moves the zoom lens group towards the | ||
| 244 | telephoto direction. A value of zero stops the zoom lens group | ||
| 245 | movement. A negative value moves the zoom lens group towards the | ||
| 246 | wide-angle direction. The zoom speed unit is driver-specific. | ||
| 247 | |||
| 248 | ``V4L2_CID_IRIS_ABSOLUTE (integer)`` | ||
| 249 | This control sets the camera's aperture to the specified value. The | ||
| 250 | unit is undefined. Larger values open the iris wider, smaller values | ||
| 251 | close it. | ||
| 252 | |||
| 253 | ``V4L2_CID_IRIS_RELATIVE (integer)`` | ||
| 254 | This control modifies the camera's aperture by the specified amount. | ||
| 255 | The unit is undefined. Positive values open the iris one step | ||
| 256 | further, negative values close it one step further. This is a | ||
| 257 | write-only control. | ||
| 258 | |||
| 259 | ``V4L2_CID_PRIVACY (boolean)`` | ||
| 260 | Prevent video from being acquired by the camera. When this control | ||
| 261 | is set to ``TRUE`` (1), no image can be captured by the camera. | ||
| 262 | Common means to enforce privacy are mechanical obturation of the | ||
| 263 | sensor and firmware image processing, but the device is not | ||
| 264 | restricted to these methods. Devices that implement the privacy | ||
| 265 | control must support read access and may support write access. | ||
| 266 | |||
| 267 | ``V4L2_CID_BAND_STOP_FILTER (integer)`` | ||
| 268 | Switch the band-stop filter of a camera sensor on or off, or specify | ||
| 269 | its strength. Such band-stop filters can be used, for example, to | ||
| 270 | filter out the fluorescent light component. | ||
| 271 | |||
| 272 | .. _v4l2-auto-n-preset-white-balance: | ||
| 273 | |||
| 274 | ``V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE`` | ||
| 275 | (enum) | ||
| 276 | |||
| 277 | enum v4l2_auto_n_preset_white_balance - | ||
| 278 | Sets white balance to automatic, manual or a preset. The presets | ||
| 279 | determine color temperature of the light as a hint to the camera for | ||
| 280 | white balance adjustments resulting in most accurate color | ||
| 281 | representation. The following white balance presets are listed in | ||
| 282 | order of increasing color temperature. | ||
| 283 | |||
| 284 | .. tabularcolumns:: |p{7.0 cm}|p{10.5cm}| | ||
| 285 | |||
| 286 | .. flat-table:: | ||
| 287 | :header-rows: 0 | ||
| 288 | :stub-columns: 0 | ||
| 289 | |||
| 290 | * - ``V4L2_WHITE_BALANCE_MANUAL`` | ||
| 291 | - Manual white balance. | ||
| 292 | * - ``V4L2_WHITE_BALANCE_AUTO`` | ||
| 293 | - Automatic white balance adjustments. | ||
| 294 | * - ``V4L2_WHITE_BALANCE_INCANDESCENT`` | ||
| 295 | - White balance setting for incandescent (tungsten) lighting. It | ||
| 296 | generally cools down the colors and corresponds approximately to | ||
| 297 | 2500...3500 K color temperature range. | ||
| 298 | * - ``V4L2_WHITE_BALANCE_FLUORESCENT`` | ||
| 299 | - White balance preset for fluorescent lighting. It corresponds | ||
| 300 | approximately to 4000...5000 K color temperature. | ||
| 301 | * - ``V4L2_WHITE_BALANCE_FLUORESCENT_H`` | ||
| 302 | - With this setting the camera will compensate for fluorescent H | ||
| 303 | lighting. | ||
| 304 | * - ``V4L2_WHITE_BALANCE_HORIZON`` | ||
| 305 | - White balance setting for horizon daylight. It corresponds | ||
| 306 | approximately to 5000 K color temperature. | ||
| 307 | * - ``V4L2_WHITE_BALANCE_DAYLIGHT`` | ||
| 308 | - White balance preset for daylight (with clear sky). It corresponds | ||
| 309 | approximately to 5000...6500 K color temperature. | ||
| 310 | * - ``V4L2_WHITE_BALANCE_FLASH`` | ||
| 311 | - With this setting the camera will compensate for the flash light. | ||
| 312 | It slightly warms up the colors and corresponds roughly to | ||
| 313 | 5000...5500 K color temperature. | ||
| 314 | * - ``V4L2_WHITE_BALANCE_CLOUDY`` | ||
| 315 | - White balance preset for moderately overcast sky. This option | ||
| 316 | corresponds approximately to 6500...8000 K color temperature | ||
| 317 | range. | ||
| 318 | * - ``V4L2_WHITE_BALANCE_SHADE`` | ||
| 319 | - White balance preset for shade or heavily overcast sky. It | ||
| 320 | corresponds approximately to 9000...10000 K color temperature. | ||
| 321 | |||
| 322 | |||
| 323 | |||
| 324 | .. _v4l2-wide-dynamic-range: | ||
| 325 | |||
| 326 | ``V4L2_CID_WIDE_DYNAMIC_RANGE (boolean)`` | ||
| 327 | Enables or disables the camera's wide dynamic range feature. This | ||
| 328 | feature allows to obtain clear images in situations where intensity | ||
| 329 | of the illumination varies significantly throughout the scene, i.e. | ||
| 330 | there are simultaneously very dark and very bright areas. It is most | ||
| 331 | commonly realized in cameras by combining two subsequent frames with | ||
| 332 | different exposure times. [#f1]_ | ||
| 333 | |||
| 334 | .. _v4l2-image-stabilization: | ||
| 335 | |||
| 336 | ``V4L2_CID_IMAGE_STABILIZATION (boolean)`` | ||
| 337 | Enables or disables image stabilization. | ||
| 338 | |||
| 339 | ``V4L2_CID_ISO_SENSITIVITY (integer menu)`` | ||
| 340 | Determines ISO equivalent of an image sensor indicating the sensor's | ||
| 341 | sensitivity to light. The numbers are expressed in arithmetic scale, | ||
| 342 | as per :ref:`iso12232` standard, where doubling the sensor | ||
| 343 | sensitivity is represented by doubling the numerical ISO value. | ||
| 344 | Applications should interpret the values as standard ISO values | ||
| 345 | multiplied by 1000, e.g. control value 800 stands for ISO 0.8. | ||
| 346 | Drivers will usually support only a subset of standard ISO values. | ||
| 347 | The effect of setting this control while the | ||
| 348 | ``V4L2_CID_ISO_SENSITIVITY_AUTO`` control is set to a value other | ||
| 349 | than ``V4L2_CID_ISO_SENSITIVITY_MANUAL`` is undefined, drivers | ||
| 350 | should ignore such requests. | ||
| 351 | |||
| 352 | .. _v4l2-iso-sensitivity-auto-type: | ||
| 353 | |||
| 354 | ``V4L2_CID_ISO_SENSITIVITY_AUTO`` | ||
| 355 | (enum) | ||
| 356 | |||
| 357 | enum v4l2_iso_sensitivity_type - | ||
| 358 | Enables or disables automatic ISO sensitivity adjustments. | ||
| 359 | |||
| 360 | |||
| 361 | |||
| 362 | .. flat-table:: | ||
| 363 | :header-rows: 0 | ||
| 364 | :stub-columns: 0 | ||
| 365 | |||
| 366 | * - ``V4L2_CID_ISO_SENSITIVITY_MANUAL`` | ||
| 367 | - Manual ISO sensitivity. | ||
| 368 | * - ``V4L2_CID_ISO_SENSITIVITY_AUTO`` | ||
| 369 | - Automatic ISO sensitivity adjustments. | ||
| 370 | |||
| 371 | |||
| 372 | |||
| 373 | .. _v4l2-scene-mode: | ||
| 374 | |||
| 375 | ``V4L2_CID_SCENE_MODE`` | ||
| 376 | (enum) | ||
| 377 | |||
| 378 | enum v4l2_scene_mode - | ||
| 379 | This control allows to select scene programs as the camera automatic | ||
| 380 | modes optimized for common shooting scenes. Within these modes the | ||
| 381 | camera determines best exposure, aperture, focusing, light metering, | ||
| 382 | white balance and equivalent sensitivity. The controls of those | ||
| 383 | parameters are influenced by the scene mode control. An exact | ||
| 384 | behavior in each mode is subject to the camera specification. | ||
| 385 | |||
| 386 | When the scene mode feature is not used, this control should be set | ||
| 387 | to ``V4L2_SCENE_MODE_NONE`` to make sure the other possibly related | ||
| 388 | controls are accessible. The following scene programs are defined: | ||
| 389 | |||
| 390 | .. tabularcolumns:: |p{6.0cm}|p{11.5cm}| | ||
| 391 | |||
| 392 | .. flat-table:: | ||
| 393 | :header-rows: 0 | ||
| 394 | :stub-columns: 0 | ||
| 395 | |||
| 396 | * - ``V4L2_SCENE_MODE_NONE`` | ||
| 397 | - The scene mode feature is disabled. | ||
| 398 | * - ``V4L2_SCENE_MODE_BACKLIGHT`` | ||
| 399 | - Backlight. Compensates for dark shadows when light is coming from | ||
| 400 | behind a subject, also by automatically turning on the flash. | ||
| 401 | * - ``V4L2_SCENE_MODE_BEACH_SNOW`` | ||
| 402 | - Beach and snow. This mode compensates for all-white or bright | ||
| 403 | scenes, which tend to look gray and low contrast, when camera's | ||
| 404 | automatic exposure is based on an average scene brightness. To | ||
| 405 | compensate, this mode automatically slightly overexposes the | ||
| 406 | frames. The white balance may also be adjusted to compensate for | ||
| 407 | the fact that reflected snow looks bluish rather than white. | ||
| 408 | * - ``V4L2_SCENE_MODE_CANDLELIGHT`` | ||
| 409 | - Candle light. The camera generally raises the ISO sensitivity and | ||
| 410 | lowers the shutter speed. This mode compensates for relatively | ||
| 411 | close subject in the scene. The flash is disabled in order to | ||
| 412 | preserve the ambiance of the light. | ||
| 413 | * - ``V4L2_SCENE_MODE_DAWN_DUSK`` | ||
| 414 | - Dawn and dusk. Preserves the colors seen in low natural light | ||
| 415 | before dusk and after down. The camera may turn off the flash, and | ||
| 416 | automatically focus at infinity. It will usually boost saturation | ||
| 417 | and lower the shutter speed. | ||
| 418 | * - ``V4L2_SCENE_MODE_FALL_COLORS`` | ||
| 419 | - Fall colors. Increases saturation and adjusts white balance for | ||
| 420 | color enhancement. Pictures of autumn leaves get saturated reds | ||
| 421 | and yellows. | ||
| 422 | * - ``V4L2_SCENE_MODE_FIREWORKS`` | ||
| 423 | - Fireworks. Long exposure times are used to capture the expanding | ||
| 424 | burst of light from a firework. The camera may invoke image | ||
| 425 | stabilization. | ||
| 426 | * - ``V4L2_SCENE_MODE_LANDSCAPE`` | ||
| 427 | - Landscape. The camera may choose a small aperture to provide deep | ||
| 428 | depth of field and long exposure duration to help capture detail | ||
| 429 | in dim light conditions. The focus is fixed at infinity. Suitable | ||
| 430 | for distant and wide scenery. | ||
| 431 | * - ``V4L2_SCENE_MODE_NIGHT`` | ||
| 432 | - Night, also known as Night Landscape. Designed for low light | ||
| 433 | conditions, it preserves detail in the dark areas without blowing | ||
| 434 | out bright objects. The camera generally sets itself to a | ||
| 435 | medium-to-high ISO sensitivity, with a relatively long exposure | ||
| 436 | time, and turns flash off. As such, there will be increased image | ||
| 437 | noise and the possibility of blurred image. | ||
| 438 | * - ``V4L2_SCENE_MODE_PARTY_INDOOR`` | ||
| 439 | - Party and indoor. Designed to capture indoor scenes that are lit | ||
| 440 | by indoor background lighting as well as the flash. The camera | ||
| 441 | usually increases ISO sensitivity, and adjusts exposure for the | ||
| 442 | low light conditions. | ||
| 443 | * - ``V4L2_SCENE_MODE_PORTRAIT`` | ||
| 444 | - Portrait. The camera adjusts the aperture so that the depth of | ||
| 445 | field is reduced, which helps to isolate the subject against a | ||
| 446 | smooth background. Most cameras recognize the presence of faces in | ||
| 447 | the scene and focus on them. The color hue is adjusted to enhance | ||
| 448 | skin tones. The intensity of the flash is often reduced. | ||
| 449 | * - ``V4L2_SCENE_MODE_SPORTS`` | ||
| 450 | - Sports. Significantly increases ISO and uses a fast shutter speed | ||
| 451 | to freeze motion of rapidly-moving subjects. Increased image noise | ||
| 452 | may be seen in this mode. | ||
| 453 | * - ``V4L2_SCENE_MODE_SUNSET`` | ||
| 454 | - Sunset. Preserves deep hues seen in sunsets and sunrises. It bumps | ||
| 455 | up the saturation. | ||
| 456 | * - ``V4L2_SCENE_MODE_TEXT`` | ||
| 457 | - Text. It applies extra contrast and sharpness, it is typically a | ||
| 458 | black-and-white mode optimized for readability. Automatic focus | ||
| 459 | may be switched to close-up mode and this setting may also involve | ||
| 460 | some lens-distortion correction. | ||
| 461 | |||
| 462 | |||
| 463 | |||
| 464 | ``V4L2_CID_3A_LOCK (bitmask)`` | ||
| 465 | This control locks or unlocks the automatic focus, exposure and | ||
| 466 | white balance. The automatic adjustments can be paused independently | ||
| 467 | by setting the corresponding lock bit to 1. The camera then retains | ||
| 468 | the settings until the lock bit is cleared. The following lock bits | ||
| 469 | are defined: | ||
| 470 | |||
| 471 | When a given algorithm is not enabled, drivers should ignore | ||
| 472 | requests to lock it and should return no error. An example might be | ||
| 473 | an application setting bit ``V4L2_LOCK_WHITE_BALANCE`` when the | ||
| 474 | ``V4L2_CID_AUTO_WHITE_BALANCE`` control is set to ``FALSE``. The | ||
| 475 | value of this control may be changed by exposure, white balance or | ||
| 476 | focus controls. | ||
| 477 | |||
| 478 | |||
| 479 | |||
| 480 | .. flat-table:: | ||
| 481 | :header-rows: 0 | ||
| 482 | :stub-columns: 0 | ||
| 483 | |||
| 484 | * - ``V4L2_LOCK_EXPOSURE`` | ||
| 485 | - Automatic exposure adjustments lock. | ||
| 486 | * - ``V4L2_LOCK_WHITE_BALANCE`` | ||
| 487 | - Automatic white balance adjustments lock. | ||
| 488 | * - ``V4L2_LOCK_FOCUS`` | ||
| 489 | - Automatic focus lock. | ||
| 490 | |||
| 491 | |||
| 492 | |||
| 493 | ``V4L2_CID_PAN_SPEED (integer)`` | ||
| 494 | This control turns the camera horizontally at the specific speed. | ||
| 495 | The unit is undefined. A positive value moves the camera to the | ||
| 496 | right (clockwise when viewed from above), a negative value to the | ||
| 497 | left. A value of zero stops the motion if one is in progress and has | ||
| 498 | no effect otherwise. | ||
| 499 | |||
| 500 | ``V4L2_CID_TILT_SPEED (integer)`` | ||
| 501 | This control turns the camera vertically at the specified speed. The | ||
| 502 | unit is undefined. A positive value moves the camera up, a negative | ||
| 503 | value down. A value of zero stops the motion if one is in progress | ||
| 504 | and has no effect otherwise. | ||
| 505 | |||
| 506 | .. [#f1] | ||
| 507 | This control may be changed to a menu control in the future, if more | ||
| 508 | options are required. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst new file mode 100644 index 000000000000..c97fb7923be5 --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst | |||
| @@ -0,0 +1,2451 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _mpeg-controls: | ||
| 11 | |||
| 12 | *********************** | ||
| 13 | Codec Control Reference | ||
| 14 | *********************** | ||
| 15 | |||
| 16 | Below all controls within the Codec control class are described. First | ||
| 17 | the generic controls, then controls specific for certain hardware. | ||
| 18 | |||
| 19 | .. note:: | ||
| 20 | |||
| 21 | These controls are applicable to all codecs and not just MPEG. The | ||
| 22 | defines are prefixed with V4L2_CID_MPEG/V4L2_MPEG as the controls | ||
| 23 | were originally made for MPEG codecs and later extended to cover all | ||
| 24 | encoding formats. | ||
| 25 | |||
| 26 | |||
| 27 | Generic Codec Controls | ||
| 28 | ====================== | ||
| 29 | |||
| 30 | |||
| 31 | .. _mpeg-control-id: | ||
| 32 | |||
| 33 | Codec Control IDs | ||
| 34 | ----------------- | ||
| 35 | |||
| 36 | ``V4L2_CID_MPEG_CLASS (class)`` | ||
| 37 | The Codec class descriptor. Calling | ||
| 38 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 39 | return a description of this control class. This description can be | ||
| 40 | used as the caption of a Tab page in a GUI, for example. | ||
| 41 | |||
| 42 | .. _v4l2-mpeg-stream-type: | ||
| 43 | |||
| 44 | ``V4L2_CID_MPEG_STREAM_TYPE`` | ||
| 45 | (enum) | ||
| 46 | |||
| 47 | enum v4l2_mpeg_stream_type - | ||
| 48 | The MPEG-1, -2 or -4 output stream type. One cannot assume anything | ||
| 49 | here. Each hardware MPEG encoder tends to support different subsets | ||
| 50 | of the available MPEG stream types. This control is specific to | ||
| 51 | multiplexed MPEG streams. The currently defined stream types are: | ||
| 52 | |||
| 53 | |||
| 54 | |||
| 55 | .. flat-table:: | ||
| 56 | :header-rows: 0 | ||
| 57 | :stub-columns: 0 | ||
| 58 | |||
| 59 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_PS`` | ||
| 60 | - MPEG-2 program stream | ||
| 61 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_TS`` | ||
| 62 | - MPEG-2 transport stream | ||
| 63 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG1_SS`` | ||
| 64 | - MPEG-1 system stream | ||
| 65 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_DVD`` | ||
| 66 | - MPEG-2 DVD-compatible stream | ||
| 67 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG1_VCD`` | ||
| 68 | - MPEG-1 VCD-compatible stream | ||
| 69 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD`` | ||
| 70 | - MPEG-2 SVCD-compatible stream | ||
| 71 | |||
| 72 | |||
| 73 | |||
| 74 | ``V4L2_CID_MPEG_STREAM_PID_PMT (integer)`` | ||
| 75 | Program Map Table Packet ID for the MPEG transport stream (default | ||
| 76 | 16) | ||
| 77 | |||
| 78 | ``V4L2_CID_MPEG_STREAM_PID_AUDIO (integer)`` | ||
| 79 | Audio Packet ID for the MPEG transport stream (default 256) | ||
| 80 | |||
| 81 | ``V4L2_CID_MPEG_STREAM_PID_VIDEO (integer)`` | ||
| 82 | Video Packet ID for the MPEG transport stream (default 260) | ||
| 83 | |||
| 84 | ``V4L2_CID_MPEG_STREAM_PID_PCR (integer)`` | ||
| 85 | Packet ID for the MPEG transport stream carrying PCR fields (default | ||
| 86 | 259) | ||
| 87 | |||
| 88 | ``V4L2_CID_MPEG_STREAM_PES_ID_AUDIO (integer)`` | ||
| 89 | Audio ID for MPEG PES | ||
| 90 | |||
| 91 | ``V4L2_CID_MPEG_STREAM_PES_ID_VIDEO (integer)`` | ||
| 92 | Video ID for MPEG PES | ||
| 93 | |||
| 94 | .. _v4l2-mpeg-stream-vbi-fmt: | ||
| 95 | |||
| 96 | ``V4L2_CID_MPEG_STREAM_VBI_FMT`` | ||
| 97 | (enum) | ||
| 98 | |||
| 99 | enum v4l2_mpeg_stream_vbi_fmt - | ||
| 100 | Some cards can embed VBI data (e. g. Closed Caption, Teletext) into | ||
| 101 | the MPEG stream. This control selects whether VBI data should be | ||
| 102 | embedded, and if so, what embedding method should be used. The list | ||
| 103 | of possible VBI formats depends on the driver. The currently defined | ||
| 104 | VBI format types are: | ||
| 105 | |||
| 106 | |||
| 107 | |||
| 108 | .. tabularcolumns:: |p{6 cm}|p{11.5cm}| | ||
| 109 | |||
| 110 | .. flat-table:: | ||
| 111 | :header-rows: 0 | ||
| 112 | :stub-columns: 0 | ||
| 113 | |||
| 114 | * - ``V4L2_MPEG_STREAM_VBI_FMT_NONE`` | ||
| 115 | - No VBI in the MPEG stream | ||
| 116 | * - ``V4L2_MPEG_STREAM_VBI_FMT_IVTV`` | ||
| 117 | - VBI in private packets, IVTV format (documented in the kernel | ||
| 118 | sources in the file | ||
| 119 | ``Documentation/media/v4l-drivers/cx2341x.rst``) | ||
| 120 | |||
| 121 | |||
| 122 | |||
| 123 | .. _v4l2-mpeg-audio-sampling-freq: | ||
| 124 | |||
| 125 | ``V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ`` | ||
| 126 | (enum) | ||
| 127 | |||
| 128 | enum v4l2_mpeg_audio_sampling_freq - | ||
| 129 | MPEG Audio sampling frequency. Possible values are: | ||
| 130 | |||
| 131 | |||
| 132 | |||
| 133 | .. flat-table:: | ||
| 134 | :header-rows: 0 | ||
| 135 | :stub-columns: 0 | ||
| 136 | |||
| 137 | * - ``V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100`` | ||
| 138 | - 44.1 kHz | ||
| 139 | * - ``V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000`` | ||
| 140 | - 48 kHz | ||
| 141 | * - ``V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000`` | ||
| 142 | - 32 kHz | ||
| 143 | |||
| 144 | |||
| 145 | |||
| 146 | .. _v4l2-mpeg-audio-encoding: | ||
| 147 | |||
| 148 | ``V4L2_CID_MPEG_AUDIO_ENCODING`` | ||
| 149 | (enum) | ||
| 150 | |||
| 151 | enum v4l2_mpeg_audio_encoding - | ||
| 152 | MPEG Audio encoding. This control is specific to multiplexed MPEG | ||
| 153 | streams. Possible values are: | ||
| 154 | |||
| 155 | |||
| 156 | |||
| 157 | .. flat-table:: | ||
| 158 | :header-rows: 0 | ||
| 159 | :stub-columns: 0 | ||
| 160 | |||
| 161 | * - ``V4L2_MPEG_AUDIO_ENCODING_LAYER_1`` | ||
| 162 | - MPEG-1/2 Layer I encoding | ||
| 163 | * - ``V4L2_MPEG_AUDIO_ENCODING_LAYER_2`` | ||
| 164 | - MPEG-1/2 Layer II encoding | ||
| 165 | * - ``V4L2_MPEG_AUDIO_ENCODING_LAYER_3`` | ||
| 166 | - MPEG-1/2 Layer III encoding | ||
| 167 | * - ``V4L2_MPEG_AUDIO_ENCODING_AAC`` | ||
| 168 | - MPEG-2/4 AAC (Advanced Audio Coding) | ||
| 169 | * - ``V4L2_MPEG_AUDIO_ENCODING_AC3`` | ||
| 170 | - AC-3 aka ATSC A/52 encoding | ||
| 171 | |||
| 172 | |||
| 173 | |||
| 174 | .. _v4l2-mpeg-audio-l1-bitrate: | ||
| 175 | |||
| 176 | ``V4L2_CID_MPEG_AUDIO_L1_BITRATE`` | ||
| 177 | (enum) | ||
| 178 | |||
| 179 | enum v4l2_mpeg_audio_l1_bitrate - | ||
| 180 | MPEG-1/2 Layer I bitrate. Possible values are: | ||
| 181 | |||
| 182 | |||
| 183 | |||
| 184 | .. flat-table:: | ||
| 185 | :header-rows: 0 | ||
| 186 | :stub-columns: 0 | ||
| 187 | |||
| 188 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_32K`` | ||
| 189 | - 32 kbit/s | ||
| 190 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_64K`` | ||
| 191 | - 64 kbit/s | ||
| 192 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_96K`` | ||
| 193 | - 96 kbit/s | ||
| 194 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_128K`` | ||
| 195 | - 128 kbit/s | ||
| 196 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_160K`` | ||
| 197 | - 160 kbit/s | ||
| 198 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_192K`` | ||
| 199 | - 192 kbit/s | ||
| 200 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_224K`` | ||
| 201 | - 224 kbit/s | ||
| 202 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_256K`` | ||
| 203 | - 256 kbit/s | ||
| 204 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_288K`` | ||
| 205 | - 288 kbit/s | ||
| 206 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_320K`` | ||
| 207 | - 320 kbit/s | ||
| 208 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_352K`` | ||
| 209 | - 352 kbit/s | ||
| 210 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_384K`` | ||
| 211 | - 384 kbit/s | ||
| 212 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_416K`` | ||
| 213 | - 416 kbit/s | ||
| 214 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_448K`` | ||
| 215 | - 448 kbit/s | ||
| 216 | |||
| 217 | |||
| 218 | |||
| 219 | .. _v4l2-mpeg-audio-l2-bitrate: | ||
| 220 | |||
| 221 | ``V4L2_CID_MPEG_AUDIO_L2_BITRATE`` | ||
| 222 | (enum) | ||
| 223 | |||
| 224 | enum v4l2_mpeg_audio_l2_bitrate - | ||
| 225 | MPEG-1/2 Layer II bitrate. Possible values are: | ||
| 226 | |||
| 227 | |||
| 228 | |||
| 229 | .. flat-table:: | ||
| 230 | :header-rows: 0 | ||
| 231 | :stub-columns: 0 | ||
| 232 | |||
| 233 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_32K`` | ||
| 234 | - 32 kbit/s | ||
| 235 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_48K`` | ||
| 236 | - 48 kbit/s | ||
| 237 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_56K`` | ||
| 238 | - 56 kbit/s | ||
| 239 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_64K`` | ||
| 240 | - 64 kbit/s | ||
| 241 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_80K`` | ||
| 242 | - 80 kbit/s | ||
| 243 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_96K`` | ||
| 244 | - 96 kbit/s | ||
| 245 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_112K`` | ||
| 246 | - 112 kbit/s | ||
| 247 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_128K`` | ||
| 248 | - 128 kbit/s | ||
| 249 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_160K`` | ||
| 250 | - 160 kbit/s | ||
| 251 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_192K`` | ||
| 252 | - 192 kbit/s | ||
| 253 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_224K`` | ||
| 254 | - 224 kbit/s | ||
| 255 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_256K`` | ||
| 256 | - 256 kbit/s | ||
| 257 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_320K`` | ||
| 258 | - 320 kbit/s | ||
| 259 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_384K`` | ||
| 260 | - 384 kbit/s | ||
| 261 | |||
| 262 | |||
| 263 | |||
| 264 | .. _v4l2-mpeg-audio-l3-bitrate: | ||
| 265 | |||
| 266 | ``V4L2_CID_MPEG_AUDIO_L3_BITRATE`` | ||
| 267 | (enum) | ||
| 268 | |||
| 269 | enum v4l2_mpeg_audio_l3_bitrate - | ||
| 270 | MPEG-1/2 Layer III bitrate. Possible values are: | ||
| 271 | |||
| 272 | |||
| 273 | |||
| 274 | .. flat-table:: | ||
| 275 | :header-rows: 0 | ||
| 276 | :stub-columns: 0 | ||
| 277 | |||
| 278 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_32K`` | ||
| 279 | - 32 kbit/s | ||
| 280 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_40K`` | ||
| 281 | - 40 kbit/s | ||
| 282 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_48K`` | ||
| 283 | - 48 kbit/s | ||
| 284 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_56K`` | ||
| 285 | - 56 kbit/s | ||
| 286 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_64K`` | ||
| 287 | - 64 kbit/s | ||
| 288 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_80K`` | ||
| 289 | - 80 kbit/s | ||
| 290 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_96K`` | ||
| 291 | - 96 kbit/s | ||
| 292 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_112K`` | ||
| 293 | - 112 kbit/s | ||
| 294 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_128K`` | ||
| 295 | - 128 kbit/s | ||
| 296 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_160K`` | ||
| 297 | - 160 kbit/s | ||
| 298 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_192K`` | ||
| 299 | - 192 kbit/s | ||
| 300 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_224K`` | ||
| 301 | - 224 kbit/s | ||
| 302 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_256K`` | ||
| 303 | - 256 kbit/s | ||
| 304 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_320K`` | ||
| 305 | - 320 kbit/s | ||
| 306 | |||
| 307 | |||
| 308 | |||
| 309 | ``V4L2_CID_MPEG_AUDIO_AAC_BITRATE (integer)`` | ||
| 310 | AAC bitrate in bits per second. | ||
| 311 | |||
| 312 | .. _v4l2-mpeg-audio-ac3-bitrate: | ||
| 313 | |||
| 314 | ``V4L2_CID_MPEG_AUDIO_AC3_BITRATE`` | ||
| 315 | (enum) | ||
| 316 | |||
| 317 | enum v4l2_mpeg_audio_ac3_bitrate - | ||
| 318 | AC-3 bitrate. Possible values are: | ||
| 319 | |||
| 320 | |||
| 321 | |||
| 322 | .. flat-table:: | ||
| 323 | :header-rows: 0 | ||
| 324 | :stub-columns: 0 | ||
| 325 | |||
| 326 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_32K`` | ||
| 327 | - 32 kbit/s | ||
| 328 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_40K`` | ||
| 329 | - 40 kbit/s | ||
| 330 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_48K`` | ||
| 331 | - 48 kbit/s | ||
| 332 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_56K`` | ||
| 333 | - 56 kbit/s | ||
| 334 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_64K`` | ||
| 335 | - 64 kbit/s | ||
| 336 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_80K`` | ||
| 337 | - 80 kbit/s | ||
| 338 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_96K`` | ||
| 339 | - 96 kbit/s | ||
| 340 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_112K`` | ||
| 341 | - 112 kbit/s | ||
| 342 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_128K`` | ||
| 343 | - 128 kbit/s | ||
| 344 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_160K`` | ||
| 345 | - 160 kbit/s | ||
| 346 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_192K`` | ||
| 347 | - 192 kbit/s | ||
| 348 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_224K`` | ||
| 349 | - 224 kbit/s | ||
| 350 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_256K`` | ||
| 351 | - 256 kbit/s | ||
| 352 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_320K`` | ||
| 353 | - 320 kbit/s | ||
| 354 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_384K`` | ||
| 355 | - 384 kbit/s | ||
| 356 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_448K`` | ||
| 357 | - 448 kbit/s | ||
| 358 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_512K`` | ||
| 359 | - 512 kbit/s | ||
| 360 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_576K`` | ||
| 361 | - 576 kbit/s | ||
| 362 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_640K`` | ||
| 363 | - 640 kbit/s | ||
| 364 | |||
| 365 | |||
| 366 | |||
| 367 | .. _v4l2-mpeg-audio-mode: | ||
| 368 | |||
| 369 | ``V4L2_CID_MPEG_AUDIO_MODE`` | ||
| 370 | (enum) | ||
| 371 | |||
| 372 | enum v4l2_mpeg_audio_mode - | ||
| 373 | MPEG Audio mode. Possible values are: | ||
| 374 | |||
| 375 | |||
| 376 | |||
| 377 | .. flat-table:: | ||
| 378 | :header-rows: 0 | ||
| 379 | :stub-columns: 0 | ||
| 380 | |||
| 381 | * - ``V4L2_MPEG_AUDIO_MODE_STEREO`` | ||
| 382 | - Stereo | ||
| 383 | * - ``V4L2_MPEG_AUDIO_MODE_JOINT_STEREO`` | ||
| 384 | - Joint Stereo | ||
| 385 | * - ``V4L2_MPEG_AUDIO_MODE_DUAL`` | ||
| 386 | - Bilingual | ||
| 387 | * - ``V4L2_MPEG_AUDIO_MODE_MONO`` | ||
| 388 | - Mono | ||
| 389 | |||
| 390 | |||
| 391 | |||
| 392 | .. _v4l2-mpeg-audio-mode-extension: | ||
| 393 | |||
| 394 | ``V4L2_CID_MPEG_AUDIO_MODE_EXTENSION`` | ||
| 395 | (enum) | ||
| 396 | |||
| 397 | enum v4l2_mpeg_audio_mode_extension - | ||
| 398 | Joint Stereo audio mode extension. In Layer I and II they indicate | ||
| 399 | which subbands are in intensity stereo. All other subbands are coded | ||
| 400 | in stereo. Layer III is not (yet) supported. Possible values are: | ||
| 401 | |||
| 402 | |||
| 403 | |||
| 404 | .. flat-table:: | ||
| 405 | :header-rows: 0 | ||
| 406 | :stub-columns: 0 | ||
| 407 | |||
| 408 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4`` | ||
| 409 | - Subbands 4-31 in intensity stereo | ||
| 410 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8`` | ||
| 411 | - Subbands 8-31 in intensity stereo | ||
| 412 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12`` | ||
| 413 | - Subbands 12-31 in intensity stereo | ||
| 414 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16`` | ||
| 415 | - Subbands 16-31 in intensity stereo | ||
| 416 | |||
| 417 | |||
| 418 | |||
| 419 | .. _v4l2-mpeg-audio-emphasis: | ||
| 420 | |||
| 421 | ``V4L2_CID_MPEG_AUDIO_EMPHASIS`` | ||
| 422 | (enum) | ||
| 423 | |||
| 424 | enum v4l2_mpeg_audio_emphasis - | ||
| 425 | Audio Emphasis. Possible values are: | ||
| 426 | |||
| 427 | |||
| 428 | |||
| 429 | .. flat-table:: | ||
| 430 | :header-rows: 0 | ||
| 431 | :stub-columns: 0 | ||
| 432 | |||
| 433 | * - ``V4L2_MPEG_AUDIO_EMPHASIS_NONE`` | ||
| 434 | - None | ||
| 435 | * - ``V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS`` | ||
| 436 | - 50/15 microsecond emphasis | ||
| 437 | * - ``V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17`` | ||
| 438 | - CCITT J.17 | ||
| 439 | |||
| 440 | |||
| 441 | |||
| 442 | .. _v4l2-mpeg-audio-crc: | ||
| 443 | |||
| 444 | ``V4L2_CID_MPEG_AUDIO_CRC`` | ||
| 445 | (enum) | ||
| 446 | |||
| 447 | enum v4l2_mpeg_audio_crc - | ||
| 448 | CRC method. Possible values are: | ||
| 449 | |||
| 450 | |||
| 451 | |||
| 452 | .. flat-table:: | ||
| 453 | :header-rows: 0 | ||
| 454 | :stub-columns: 0 | ||
| 455 | |||
| 456 | * - ``V4L2_MPEG_AUDIO_CRC_NONE`` | ||
| 457 | - None | ||
| 458 | * - ``V4L2_MPEG_AUDIO_CRC_CRC16`` | ||
| 459 | - 16 bit parity check | ||
| 460 | |||
| 461 | |||
| 462 | |||
| 463 | ``V4L2_CID_MPEG_AUDIO_MUTE (boolean)`` | ||
| 464 | Mutes the audio when capturing. This is not done by muting audio | ||
| 465 | hardware, which can still produce a slight hiss, but in the encoder | ||
| 466 | itself, guaranteeing a fixed and reproducible audio bitstream. 0 = | ||
| 467 | unmuted, 1 = muted. | ||
| 468 | |||
| 469 | .. _v4l2-mpeg-audio-dec-playback: | ||
| 470 | |||
| 471 | ``V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK`` | ||
| 472 | (enum) | ||
| 473 | |||
| 474 | enum v4l2_mpeg_audio_dec_playback - | ||
| 475 | Determines how monolingual audio should be played back. Possible | ||
| 476 | values are: | ||
| 477 | |||
| 478 | |||
| 479 | |||
| 480 | .. tabularcolumns:: |p{9.0cm}|p{8.5cm}| | ||
| 481 | |||
| 482 | .. flat-table:: | ||
| 483 | :header-rows: 0 | ||
| 484 | :stub-columns: 0 | ||
| 485 | |||
| 486 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_AUTO`` | ||
| 487 | - Automatically determines the best playback mode. | ||
| 488 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_STEREO`` | ||
| 489 | - Stereo playback. | ||
| 490 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_LEFT`` | ||
| 491 | - Left channel playback. | ||
| 492 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_RIGHT`` | ||
| 493 | - Right channel playback. | ||
| 494 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_MONO`` | ||
| 495 | - Mono playback. | ||
| 496 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_SWAPPED_STEREO`` | ||
| 497 | - Stereo playback with swapped left and right channels. | ||
| 498 | |||
| 499 | |||
| 500 | |||
| 501 | .. _v4l2-mpeg-audio-dec-multilingual-playback: | ||
| 502 | |||
| 503 | ``V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK`` | ||
| 504 | (enum) | ||
| 505 | |||
| 506 | enum v4l2_mpeg_audio_dec_playback - | ||
| 507 | Determines how multilingual audio should be played back. | ||
| 508 | |||
| 509 | .. _v4l2-mpeg-video-encoding: | ||
| 510 | |||
| 511 | ``V4L2_CID_MPEG_VIDEO_ENCODING`` | ||
| 512 | (enum) | ||
| 513 | |||
| 514 | enum v4l2_mpeg_video_encoding - | ||
| 515 | MPEG Video encoding method. This control is specific to multiplexed | ||
| 516 | MPEG streams. Possible values are: | ||
| 517 | |||
| 518 | |||
| 519 | |||
| 520 | .. flat-table:: | ||
| 521 | :header-rows: 0 | ||
| 522 | :stub-columns: 0 | ||
| 523 | |||
| 524 | * - ``V4L2_MPEG_VIDEO_ENCODING_MPEG_1`` | ||
| 525 | - MPEG-1 Video encoding | ||
| 526 | * - ``V4L2_MPEG_VIDEO_ENCODING_MPEG_2`` | ||
| 527 | - MPEG-2 Video encoding | ||
| 528 | * - ``V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC`` | ||
| 529 | - MPEG-4 AVC (H.264) Video encoding | ||
| 530 | |||
| 531 | |||
| 532 | |||
| 533 | .. _v4l2-mpeg-video-aspect: | ||
| 534 | |||
| 535 | ``V4L2_CID_MPEG_VIDEO_ASPECT`` | ||
| 536 | (enum) | ||
| 537 | |||
| 538 | enum v4l2_mpeg_video_aspect - | ||
| 539 | Video aspect. Possible values are: | ||
| 540 | |||
| 541 | |||
| 542 | |||
| 543 | .. flat-table:: | ||
| 544 | :header-rows: 0 | ||
| 545 | :stub-columns: 0 | ||
| 546 | |||
| 547 | * - ``V4L2_MPEG_VIDEO_ASPECT_1x1`` | ||
| 548 | * - ``V4L2_MPEG_VIDEO_ASPECT_4x3`` | ||
| 549 | * - ``V4L2_MPEG_VIDEO_ASPECT_16x9`` | ||
| 550 | * - ``V4L2_MPEG_VIDEO_ASPECT_221x100`` | ||
| 551 | |||
| 552 | |||
| 553 | |||
| 554 | ``V4L2_CID_MPEG_VIDEO_B_FRAMES (integer)`` | ||
| 555 | Number of B-Frames (default 2) | ||
| 556 | |||
| 557 | ``V4L2_CID_MPEG_VIDEO_GOP_SIZE (integer)`` | ||
| 558 | GOP size (default 12) | ||
| 559 | |||
| 560 | ``V4L2_CID_MPEG_VIDEO_GOP_CLOSURE (boolean)`` | ||
| 561 | GOP closure (default 1) | ||
| 562 | |||
| 563 | ``V4L2_CID_MPEG_VIDEO_PULLDOWN (boolean)`` | ||
| 564 | Enable 3:2 pulldown (default 0) | ||
| 565 | |||
| 566 | .. _v4l2-mpeg-video-bitrate-mode: | ||
| 567 | |||
| 568 | ``V4L2_CID_MPEG_VIDEO_BITRATE_MODE`` | ||
| 569 | (enum) | ||
| 570 | |||
| 571 | enum v4l2_mpeg_video_bitrate_mode - | ||
| 572 | Video bitrate mode. Possible values are: | ||
| 573 | |||
| 574 | |||
| 575 | |||
| 576 | .. flat-table:: | ||
| 577 | :header-rows: 0 | ||
| 578 | :stub-columns: 0 | ||
| 579 | |||
| 580 | * - ``V4L2_MPEG_VIDEO_BITRATE_MODE_VBR`` | ||
| 581 | - Variable bitrate | ||
| 582 | * - ``V4L2_MPEG_VIDEO_BITRATE_MODE_CBR`` | ||
| 583 | - Constant bitrate | ||
| 584 | |||
| 585 | |||
| 586 | |||
| 587 | ``V4L2_CID_MPEG_VIDEO_BITRATE (integer)`` | ||
| 588 | Video bitrate in bits per second. | ||
| 589 | |||
| 590 | ``V4L2_CID_MPEG_VIDEO_BITRATE_PEAK (integer)`` | ||
| 591 | Peak video bitrate in bits per second. Must be larger or equal to | ||
| 592 | the average video bitrate. It is ignored if the video bitrate mode | ||
| 593 | is set to constant bitrate. | ||
| 594 | |||
| 595 | ``V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (integer)`` | ||
| 596 | For every captured frame, skip this many subsequent frames (default | ||
| 597 | 0). | ||
| 598 | |||
| 599 | ``V4L2_CID_MPEG_VIDEO_MUTE (boolean)`` | ||
| 600 | "Mutes" the video to a fixed color when capturing. This is useful | ||
| 601 | for testing, to produce a fixed video bitstream. 0 = unmuted, 1 = | ||
| 602 | muted. | ||
| 603 | |||
| 604 | ``V4L2_CID_MPEG_VIDEO_MUTE_YUV (integer)`` | ||
| 605 | Sets the "mute" color of the video. The supplied 32-bit integer is | ||
| 606 | interpreted as follows (bit 0 = least significant bit): | ||
| 607 | |||
| 608 | |||
| 609 | |||
| 610 | .. flat-table:: | ||
| 611 | :header-rows: 0 | ||
| 612 | :stub-columns: 0 | ||
| 613 | |||
| 614 | * - Bit 0:7 | ||
| 615 | - V chrominance information | ||
| 616 | * - Bit 8:15 | ||
| 617 | - U chrominance information | ||
| 618 | * - Bit 16:23 | ||
| 619 | - Y luminance information | ||
| 620 | * - Bit 24:31 | ||
| 621 | - Must be zero. | ||
| 622 | |||
| 623 | |||
| 624 | |||
| 625 | .. _v4l2-mpeg-video-dec-pts: | ||
| 626 | |||
| 627 | ``V4L2_CID_MPEG_VIDEO_DEC_PTS (integer64)`` | ||
| 628 | This read-only control returns the 33-bit video Presentation Time | ||
| 629 | Stamp as defined in ITU T-REC-H.222.0 and ISO/IEC 13818-1 of the | ||
| 630 | currently displayed frame. This is the same PTS as is used in | ||
| 631 | :ref:`VIDIOC_DECODER_CMD`. | ||
| 632 | |||
| 633 | .. _v4l2-mpeg-video-dec-frame: | ||
| 634 | |||
| 635 | ``V4L2_CID_MPEG_VIDEO_DEC_FRAME (integer64)`` | ||
| 636 | This read-only control returns the frame counter of the frame that | ||
| 637 | is currently displayed (decoded). This value is reset to 0 whenever | ||
| 638 | the decoder is started. | ||
| 639 | |||
| 640 | ``V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE (boolean)`` | ||
| 641 | If enabled the decoder expects to receive a single slice per buffer, | ||
| 642 | otherwise the decoder expects a single frame in per buffer. | ||
| 643 | Applicable to the decoder, all codecs. | ||
| 644 | |||
| 645 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE (boolean)`` | ||
| 646 | Enable writing sample aspect ratio in the Video Usability | ||
| 647 | Information. Applicable to the H264 encoder. | ||
| 648 | |||
| 649 | .. _v4l2-mpeg-video-h264-vui-sar-idc: | ||
| 650 | |||
| 651 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC`` | ||
| 652 | (enum) | ||
| 653 | |||
| 654 | enum v4l2_mpeg_video_h264_vui_sar_idc - | ||
| 655 | VUI sample aspect ratio indicator for H.264 encoding. The value is | ||
| 656 | defined in the table E-1 in the standard. Applicable to the H264 | ||
| 657 | encoder. | ||
| 658 | |||
| 659 | |||
| 660 | |||
| 661 | .. flat-table:: | ||
| 662 | :header-rows: 0 | ||
| 663 | :stub-columns: 0 | ||
| 664 | |||
| 665 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED`` | ||
| 666 | - Unspecified | ||
| 667 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1`` | ||
| 668 | - 1x1 | ||
| 669 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11`` | ||
| 670 | - 12x11 | ||
| 671 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11`` | ||
| 672 | - 10x11 | ||
| 673 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11`` | ||
| 674 | - 16x11 | ||
| 675 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33`` | ||
| 676 | - 40x33 | ||
| 677 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11`` | ||
| 678 | - 24x11 | ||
| 679 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11`` | ||
| 680 | - 20x11 | ||
| 681 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11`` | ||
| 682 | - 32x11 | ||
| 683 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33`` | ||
| 684 | - 80x33 | ||
| 685 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11`` | ||
| 686 | - 18x11 | ||
| 687 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11`` | ||
| 688 | - 15x11 | ||
| 689 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33`` | ||
| 690 | - 64x33 | ||
| 691 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99`` | ||
| 692 | - 160x99 | ||
| 693 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3`` | ||
| 694 | - 4x3 | ||
| 695 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2`` | ||
| 696 | - 3x2 | ||
| 697 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1`` | ||
| 698 | - 2x1 | ||
| 699 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED`` | ||
| 700 | - Extended SAR | ||
| 701 | |||
| 702 | |||
| 703 | |||
| 704 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (integer)`` | ||
| 705 | Extended sample aspect ratio width for H.264 VUI encoding. | ||
| 706 | Applicable to the H264 encoder. | ||
| 707 | |||
| 708 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (integer)`` | ||
| 709 | Extended sample aspect ratio height for H.264 VUI encoding. | ||
| 710 | Applicable to the H264 encoder. | ||
| 711 | |||
| 712 | .. _v4l2-mpeg-video-h264-level: | ||
| 713 | |||
| 714 | ``V4L2_CID_MPEG_VIDEO_H264_LEVEL`` | ||
| 715 | (enum) | ||
| 716 | |||
| 717 | enum v4l2_mpeg_video_h264_level - | ||
| 718 | The level information for the H264 video elementary stream. | ||
| 719 | Applicable to the H264 encoder. Possible values are: | ||
| 720 | |||
| 721 | |||
| 722 | |||
| 723 | .. flat-table:: | ||
| 724 | :header-rows: 0 | ||
| 725 | :stub-columns: 0 | ||
| 726 | |||
| 727 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_0`` | ||
| 728 | - Level 1.0 | ||
| 729 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1B`` | ||
| 730 | - Level 1B | ||
| 731 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_1`` | ||
| 732 | - Level 1.1 | ||
| 733 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_2`` | ||
| 734 | - Level 1.2 | ||
| 735 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_3`` | ||
| 736 | - Level 1.3 | ||
| 737 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_2_0`` | ||
| 738 | - Level 2.0 | ||
| 739 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_2_1`` | ||
| 740 | - Level 2.1 | ||
| 741 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_2_2`` | ||
| 742 | - Level 2.2 | ||
| 743 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_3_0`` | ||
| 744 | - Level 3.0 | ||
| 745 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_3_1`` | ||
| 746 | - Level 3.1 | ||
| 747 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_3_2`` | ||
| 748 | - Level 3.2 | ||
| 749 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_4_0`` | ||
| 750 | - Level 4.0 | ||
| 751 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_4_1`` | ||
| 752 | - Level 4.1 | ||
| 753 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_4_2`` | ||
| 754 | - Level 4.2 | ||
| 755 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_5_0`` | ||
| 756 | - Level 5.0 | ||
| 757 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_5_1`` | ||
| 758 | - Level 5.1 | ||
| 759 | |||
| 760 | |||
| 761 | |||
| 762 | .. _v4l2-mpeg-video-mpeg4-level: | ||
| 763 | |||
| 764 | ``V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL`` | ||
| 765 | (enum) | ||
| 766 | |||
| 767 | enum v4l2_mpeg_video_mpeg4_level - | ||
| 768 | The level information for the MPEG4 elementary stream. Applicable to | ||
| 769 | the MPEG4 encoder. Possible values are: | ||
| 770 | |||
| 771 | |||
| 772 | |||
| 773 | .. flat-table:: | ||
| 774 | :header-rows: 0 | ||
| 775 | :stub-columns: 0 | ||
| 776 | |||
| 777 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_0`` | ||
| 778 | - Level 0 | ||
| 779 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B`` | ||
| 780 | - Level 0b | ||
| 781 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_1`` | ||
| 782 | - Level 1 | ||
| 783 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_2`` | ||
| 784 | - Level 2 | ||
| 785 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_3`` | ||
| 786 | - Level 3 | ||
| 787 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B`` | ||
| 788 | - Level 3b | ||
| 789 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_4`` | ||
| 790 | - Level 4 | ||
| 791 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_5`` | ||
| 792 | - Level 5 | ||
| 793 | |||
| 794 | |||
| 795 | |||
| 796 | .. _v4l2-mpeg-video-h264-profile: | ||
| 797 | |||
| 798 | ``V4L2_CID_MPEG_VIDEO_H264_PROFILE`` | ||
| 799 | (enum) | ||
| 800 | |||
| 801 | enum v4l2_mpeg_video_h264_profile - | ||
| 802 | The profile information for H264. Applicable to the H264 encoder. | ||
| 803 | Possible values are: | ||
| 804 | |||
| 805 | |||
| 806 | |||
| 807 | .. flat-table:: | ||
| 808 | :header-rows: 0 | ||
| 809 | :stub-columns: 0 | ||
| 810 | |||
| 811 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE`` | ||
| 812 | - Baseline profile | ||
| 813 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE`` | ||
| 814 | - Constrained Baseline profile | ||
| 815 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_MAIN`` | ||
| 816 | - Main profile | ||
| 817 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED`` | ||
| 818 | - Extended profile | ||
| 819 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH`` | ||
| 820 | - High profile | ||
| 821 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10`` | ||
| 822 | - High 10 profile | ||
| 823 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422`` | ||
| 824 | - High 422 profile | ||
| 825 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE`` | ||
| 826 | - High 444 Predictive profile | ||
| 827 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA`` | ||
| 828 | - High 10 Intra profile | ||
| 829 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA`` | ||
| 830 | - High 422 Intra profile | ||
| 831 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA`` | ||
| 832 | - High 444 Intra profile | ||
| 833 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA`` | ||
| 834 | - CAVLC 444 Intra profile | ||
| 835 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE`` | ||
| 836 | - Scalable Baseline profile | ||
| 837 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH`` | ||
| 838 | - Scalable High profile | ||
| 839 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA`` | ||
| 840 | - Scalable High Intra profile | ||
| 841 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH`` | ||
| 842 | - Stereo High profile | ||
| 843 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH`` | ||
| 844 | - Multiview High profile | ||
| 845 | |||
| 846 | |||
| 847 | |||
| 848 | .. _v4l2-mpeg-video-mpeg4-profile: | ||
| 849 | |||
| 850 | ``V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE`` | ||
| 851 | (enum) | ||
| 852 | |||
| 853 | enum v4l2_mpeg_video_mpeg4_profile - | ||
| 854 | The profile information for MPEG4. Applicable to the MPEG4 encoder. | ||
| 855 | Possible values are: | ||
| 856 | |||
| 857 | |||
| 858 | |||
| 859 | .. flat-table:: | ||
| 860 | :header-rows: 0 | ||
| 861 | :stub-columns: 0 | ||
| 862 | |||
| 863 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE`` | ||
| 864 | - Simple profile | ||
| 865 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE`` | ||
| 866 | - Advanced Simple profile | ||
| 867 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE`` | ||
| 868 | - Core profile | ||
| 869 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE`` | ||
| 870 | - Simple Scalable profile | ||
| 871 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY`` | ||
| 872 | - | ||
| 873 | |||
| 874 | |||
| 875 | |||
| 876 | ``V4L2_CID_MPEG_VIDEO_MAX_REF_PIC (integer)`` | ||
| 877 | The maximum number of reference pictures used for encoding. | ||
| 878 | Applicable to the encoder. | ||
| 879 | |||
| 880 | .. _v4l2-mpeg-video-multi-slice-mode: | ||
| 881 | |||
| 882 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE`` | ||
| 883 | (enum) | ||
| 884 | |||
| 885 | enum v4l2_mpeg_video_multi_slice_mode - | ||
| 886 | Determines how the encoder should handle division of frame into | ||
| 887 | slices. Applicable to the encoder. Possible values are: | ||
| 888 | |||
| 889 | |||
| 890 | |||
| 891 | .. tabularcolumns:: |p{8.7cm}|p{8.8cm}| | ||
| 892 | |||
| 893 | .. flat-table:: | ||
| 894 | :header-rows: 0 | ||
| 895 | :stub-columns: 0 | ||
| 896 | |||
| 897 | * - ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE`` | ||
| 898 | - Single slice per frame. | ||
| 899 | * - ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB`` | ||
| 900 | - Multiple slices with set maximum number of macroblocks per slice. | ||
| 901 | * - ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES`` | ||
| 902 | - Multiple slice with set maximum size in bytes per slice. | ||
| 903 | |||
| 904 | |||
| 905 | |||
| 906 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB (integer)`` | ||
| 907 | The maximum number of macroblocks in a slice. Used when | ||
| 908 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE`` is set to | ||
| 909 | ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB``. Applicable to the | ||
| 910 | encoder. | ||
| 911 | |||
| 912 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES (integer)`` | ||
| 913 | The maximum size of a slice in bytes. Used when | ||
| 914 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE`` is set to | ||
| 915 | ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES``. Applicable to the | ||
| 916 | encoder. | ||
| 917 | |||
| 918 | .. _v4l2-mpeg-video-h264-loop-filter-mode: | ||
| 919 | |||
| 920 | ``V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE`` | ||
| 921 | (enum) | ||
| 922 | |||
| 923 | enum v4l2_mpeg_video_h264_loop_filter_mode - | ||
| 924 | Loop filter mode for H264 encoder. Possible values are: | ||
| 925 | |||
| 926 | |||
| 927 | |||
| 928 | .. tabularcolumns:: |p{14.0cm}|p{3.5cm}| | ||
| 929 | |||
| 930 | .. flat-table:: | ||
| 931 | :header-rows: 0 | ||
| 932 | :stub-columns: 0 | ||
| 933 | |||
| 934 | * - ``V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED`` | ||
| 935 | - Loop filter is enabled. | ||
| 936 | * - ``V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED`` | ||
| 937 | - Loop filter is disabled. | ||
| 938 | * - ``V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY`` | ||
| 939 | - Loop filter is disabled at the slice boundary. | ||
| 940 | |||
| 941 | |||
| 942 | |||
| 943 | ``V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (integer)`` | ||
| 944 | Loop filter alpha coefficient, defined in the H264 standard. | ||
| 945 | This value corresponds to the slice_alpha_c0_offset_div2 slice header | ||
| 946 | field, and should be in the range of -6 to +6, inclusive. The actual alpha | ||
| 947 | offset FilterOffsetA is twice this value. | ||
| 948 | Applicable to the H264 encoder. | ||
| 949 | |||
| 950 | ``V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (integer)`` | ||
| 951 | Loop filter beta coefficient, defined in the H264 standard. | ||
| 952 | This corresponds to the slice_beta_offset_div2 slice header field, and | ||
| 953 | should be in the range of -6 to +6, inclusive. The actual beta offset | ||
| 954 | FilterOffsetB is twice this value. | ||
| 955 | Applicable to the H264 encoder. | ||
| 956 | |||
| 957 | .. _v4l2-mpeg-video-h264-entropy-mode: | ||
| 958 | |||
| 959 | ``V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE`` | ||
| 960 | (enum) | ||
| 961 | |||
| 962 | enum v4l2_mpeg_video_h264_entropy_mode - | ||
| 963 | Entropy coding mode for H264 - CABAC/CAVALC. Applicable to the H264 | ||
| 964 | encoder. Possible values are: | ||
| 965 | |||
| 966 | |||
| 967 | |||
| 968 | .. flat-table:: | ||
| 969 | :header-rows: 0 | ||
| 970 | :stub-columns: 0 | ||
| 971 | |||
| 972 | * - ``V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC`` | ||
| 973 | - Use CAVLC entropy coding. | ||
| 974 | * - ``V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC`` | ||
| 975 | - Use CABAC entropy coding. | ||
| 976 | |||
| 977 | |||
| 978 | |||
| 979 | ``V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM (boolean)`` | ||
| 980 | Enable 8X8 transform for H264. Applicable to the H264 encoder. | ||
| 981 | |||
| 982 | ``V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION (boolean)`` | ||
| 983 | Enable constrained intra prediction for H264. Applicable to the H264 | ||
| 984 | encoder. | ||
| 985 | |||
| 986 | ``V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET (integer)`` | ||
| 987 | Specify the offset that should be added to the luma quantization | ||
| 988 | parameter to determine the chroma quantization parameter. Applicable | ||
| 989 | to the H264 encoder. | ||
| 990 | |||
| 991 | ``V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB (integer)`` | ||
| 992 | Cyclic intra macroblock refresh. This is the number of continuous | ||
| 993 | macroblocks refreshed every frame. Each frame a successive set of | ||
| 994 | macroblocks is refreshed until the cycle completes and starts from | ||
| 995 | the top of the frame. Applicable to H264, H263 and MPEG4 encoder. | ||
| 996 | |||
| 997 | ``V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE (boolean)`` | ||
| 998 | Frame level rate control enable. If this control is disabled then | ||
| 999 | the quantization parameter for each frame type is constant and set | ||
| 1000 | with appropriate controls (e.g. | ||
| 1001 | ``V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP``). If frame rate control is | ||
| 1002 | enabled then quantization parameter is adjusted to meet the chosen | ||
| 1003 | bitrate. Minimum and maximum value for the quantization parameter | ||
| 1004 | can be set with appropriate controls (e.g. | ||
| 1005 | ``V4L2_CID_MPEG_VIDEO_H263_MIN_QP``). Applicable to encoders. | ||
| 1006 | |||
| 1007 | ``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE (boolean)`` | ||
| 1008 | Macroblock level rate control enable. Applicable to the MPEG4 and | ||
| 1009 | H264 encoders. | ||
| 1010 | |||
| 1011 | ``V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (boolean)`` | ||
| 1012 | Quarter pixel motion estimation for MPEG4. Applicable to the MPEG4 | ||
| 1013 | encoder. | ||
| 1014 | |||
| 1015 | ``V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (integer)`` | ||
| 1016 | Quantization parameter for an I frame for H263. Valid range: from 1 | ||
| 1017 | to 31. | ||
| 1018 | |||
| 1019 | ``V4L2_CID_MPEG_VIDEO_H263_MIN_QP (integer)`` | ||
| 1020 | Minimum quantization parameter for H263. Valid range: from 1 to 31. | ||
| 1021 | |||
| 1022 | ``V4L2_CID_MPEG_VIDEO_H263_MAX_QP (integer)`` | ||
| 1023 | Maximum quantization parameter for H263. Valid range: from 1 to 31. | ||
| 1024 | |||
| 1025 | ``V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (integer)`` | ||
| 1026 | Quantization parameter for an P frame for H263. Valid range: from 1 | ||
| 1027 | to 31. | ||
| 1028 | |||
| 1029 | ``V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP (integer)`` | ||
| 1030 | Quantization parameter for an B frame for H263. Valid range: from 1 | ||
| 1031 | to 31. | ||
| 1032 | |||
| 1033 | ``V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP (integer)`` | ||
| 1034 | Quantization parameter for an I frame for H264. Valid range: from 0 | ||
| 1035 | to 51. | ||
| 1036 | |||
| 1037 | ``V4L2_CID_MPEG_VIDEO_H264_MIN_QP (integer)`` | ||
| 1038 | Minimum quantization parameter for H264. Valid range: from 0 to 51. | ||
| 1039 | |||
| 1040 | ``V4L2_CID_MPEG_VIDEO_H264_MAX_QP (integer)`` | ||
| 1041 | Maximum quantization parameter for H264. Valid range: from 0 to 51. | ||
| 1042 | |||
| 1043 | ``V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP (integer)`` | ||
| 1044 | Quantization parameter for an P frame for H264. Valid range: from 0 | ||
| 1045 | to 51. | ||
| 1046 | |||
| 1047 | ``V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP (integer)`` | ||
| 1048 | Quantization parameter for an B frame for H264. Valid range: from 0 | ||
| 1049 | to 51. | ||
| 1050 | |||
| 1051 | ``V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (integer)`` | ||
| 1052 | Quantization parameter for an I frame for MPEG4. Valid range: from 1 | ||
| 1053 | to 31. | ||
| 1054 | |||
| 1055 | ``V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP (integer)`` | ||
| 1056 | Minimum quantization parameter for MPEG4. Valid range: from 1 to 31. | ||
| 1057 | |||
| 1058 | ``V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP (integer)`` | ||
| 1059 | Maximum quantization parameter for MPEG4. Valid range: from 1 to 31. | ||
| 1060 | |||
| 1061 | ``V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (integer)`` | ||
| 1062 | Quantization parameter for an P frame for MPEG4. Valid range: from 1 | ||
| 1063 | to 31. | ||
| 1064 | |||
| 1065 | ``V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (integer)`` | ||
| 1066 | Quantization parameter for an B frame for MPEG4. Valid range: from 1 | ||
| 1067 | to 31. | ||
| 1068 | |||
| 1069 | ``V4L2_CID_MPEG_VIDEO_VBV_SIZE (integer)`` | ||
| 1070 | The Video Buffer Verifier size in kilobytes, it is used as a | ||
| 1071 | limitation of frame skip. The VBV is defined in the standard as a | ||
| 1072 | mean to verify that the produced stream will be successfully | ||
| 1073 | decoded. The standard describes it as "Part of a hypothetical | ||
| 1074 | decoder that is conceptually connected to the output of the encoder. | ||
| 1075 | Its purpose is to provide a constraint on the variability of the | ||
| 1076 | data rate that an encoder or editing process may produce.". | ||
| 1077 | Applicable to the MPEG1, MPEG2, MPEG4 encoders. | ||
| 1078 | |||
| 1079 | .. _v4l2-mpeg-video-vbv-delay: | ||
| 1080 | |||
| 1081 | ``V4L2_CID_MPEG_VIDEO_VBV_DELAY (integer)`` | ||
| 1082 | Sets the initial delay in milliseconds for VBV buffer control. | ||
| 1083 | |||
| 1084 | .. _v4l2-mpeg-video-hor-search-range: | ||
| 1085 | |||
| 1086 | ``V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE (integer)`` | ||
| 1087 | Horizontal search range defines maximum horizontal search area in | ||
| 1088 | pixels to search and match for the present Macroblock (MB) in the | ||
| 1089 | reference picture. This V4L2 control macro is used to set horizontal | ||
| 1090 | search range for motion estimation module in video encoder. | ||
| 1091 | |||
| 1092 | .. _v4l2-mpeg-video-vert-search-range: | ||
| 1093 | |||
| 1094 | ``V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE (integer)`` | ||
| 1095 | Vertical search range defines maximum vertical search area in pixels | ||
| 1096 | to search and match for the present Macroblock (MB) in the reference | ||
| 1097 | picture. This V4L2 control macro is used to set vertical search | ||
| 1098 | range for motion estimation module in video encoder. | ||
| 1099 | |||
| 1100 | .. _v4l2-mpeg-video-force-key-frame: | ||
| 1101 | |||
| 1102 | ``V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME (button)`` | ||
| 1103 | Force a key frame for the next queued buffer. Applicable to | ||
| 1104 | encoders. This is a general, codec-agnostic keyframe control. | ||
| 1105 | |||
| 1106 | ``V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE (integer)`` | ||
| 1107 | The Coded Picture Buffer size in kilobytes, it is used as a | ||
| 1108 | limitation of frame skip. The CPB is defined in the H264 standard as | ||
| 1109 | a mean to verify that the produced stream will be successfully | ||
| 1110 | decoded. Applicable to the H264 encoder. | ||
| 1111 | |||
| 1112 | ``V4L2_CID_MPEG_VIDEO_H264_I_PERIOD (integer)`` | ||
| 1113 | Period between I-frames in the open GOP for H264. In case of an open | ||
| 1114 | GOP this is the period between two I-frames. The period between IDR | ||
| 1115 | (Instantaneous Decoding Refresh) frames is taken from the GOP_SIZE | ||
| 1116 | control. An IDR frame, which stands for Instantaneous Decoding | ||
| 1117 | Refresh is an I-frame after which no prior frames are referenced. | ||
| 1118 | This means that a stream can be restarted from an IDR frame without | ||
| 1119 | the need to store or decode any previous frames. Applicable to the | ||
| 1120 | H264 encoder. | ||
| 1121 | |||
| 1122 | .. _v4l2-mpeg-video-header-mode: | ||
| 1123 | |||
| 1124 | ``V4L2_CID_MPEG_VIDEO_HEADER_MODE`` | ||
| 1125 | (enum) | ||
| 1126 | |||
| 1127 | enum v4l2_mpeg_video_header_mode - | ||
| 1128 | Determines whether the header is returned as the first buffer or is | ||
| 1129 | it returned together with the first frame. Applicable to encoders. | ||
| 1130 | Possible values are: | ||
| 1131 | |||
| 1132 | |||
| 1133 | |||
| 1134 | .. tabularcolumns:: |p{10.3cm}|p{7.2cm}| | ||
| 1135 | |||
| 1136 | .. flat-table:: | ||
| 1137 | :header-rows: 0 | ||
| 1138 | :stub-columns: 0 | ||
| 1139 | |||
| 1140 | * - ``V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE`` | ||
| 1141 | - The stream header is returned separately in the first buffer. | ||
| 1142 | * - ``V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME`` | ||
| 1143 | - The stream header is returned together with the first encoded | ||
| 1144 | frame. | ||
| 1145 | |||
| 1146 | |||
| 1147 | |||
| 1148 | ``V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER (boolean)`` | ||
| 1149 | Repeat the video sequence headers. Repeating these headers makes | ||
| 1150 | random access to the video stream easier. Applicable to the MPEG1, 2 | ||
| 1151 | and 4 encoder. | ||
| 1152 | |||
| 1153 | ``V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER (boolean)`` | ||
| 1154 | Enabled the deblocking post processing filter for MPEG4 decoder. | ||
| 1155 | Applicable to the MPEG4 decoder. | ||
| 1156 | |||
| 1157 | ``V4L2_CID_MPEG_VIDEO_MPEG4_VOP_TIME_RES (integer)`` | ||
| 1158 | vop_time_increment_resolution value for MPEG4. Applicable to the | ||
| 1159 | MPEG4 encoder. | ||
| 1160 | |||
| 1161 | ``V4L2_CID_MPEG_VIDEO_MPEG4_VOP_TIME_INC (integer)`` | ||
| 1162 | vop_time_increment value for MPEG4. Applicable to the MPEG4 | ||
| 1163 | encoder. | ||
| 1164 | |||
| 1165 | ``V4L2_CID_MPEG_VIDEO_H264_SEI_FRAME_PACKING (boolean)`` | ||
| 1166 | Enable generation of frame packing supplemental enhancement | ||
| 1167 | information in the encoded bitstream. The frame packing SEI message | ||
| 1168 | contains the arrangement of L and R planes for 3D viewing. | ||
| 1169 | Applicable to the H264 encoder. | ||
| 1170 | |||
| 1171 | ``V4L2_CID_MPEG_VIDEO_H264_SEI_FP_CURRENT_FRAME_0 (boolean)`` | ||
| 1172 | Sets current frame as frame0 in frame packing SEI. Applicable to the | ||
| 1173 | H264 encoder. | ||
| 1174 | |||
| 1175 | .. _v4l2-mpeg-video-h264-sei-fp-arrangement-type: | ||
| 1176 | |||
| 1177 | ``V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE`` | ||
| 1178 | (enum) | ||
| 1179 | |||
| 1180 | enum v4l2_mpeg_video_h264_sei_fp_arrangement_type - | ||
| 1181 | Frame packing arrangement type for H264 SEI. Applicable to the H264 | ||
| 1182 | encoder. Possible values are: | ||
| 1183 | |||
| 1184 | .. tabularcolumns:: |p{12cm}|p{5.5cm}| | ||
| 1185 | |||
| 1186 | .. flat-table:: | ||
| 1187 | :header-rows: 0 | ||
| 1188 | :stub-columns: 0 | ||
| 1189 | |||
| 1190 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_CHEKERBOARD`` | ||
| 1191 | - Pixels are alternatively from L and R. | ||
| 1192 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_COLUMN`` | ||
| 1193 | - L and R are interlaced by column. | ||
| 1194 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_ROW`` | ||
| 1195 | - L and R are interlaced by row. | ||
| 1196 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_SIDE_BY_SIDE`` | ||
| 1197 | - L is on the left, R on the right. | ||
| 1198 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TOP_BOTTOM`` | ||
| 1199 | - L is on top, R on bottom. | ||
| 1200 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TEMPORAL`` | ||
| 1201 | - One view per frame. | ||
| 1202 | |||
| 1203 | |||
| 1204 | |||
| 1205 | ``V4L2_CID_MPEG_VIDEO_H264_FMO (boolean)`` | ||
| 1206 | Enables flexible macroblock ordering in the encoded bitstream. It is | ||
| 1207 | a technique used for restructuring the ordering of macroblocks in | ||
| 1208 | pictures. Applicable to the H264 encoder. | ||
| 1209 | |||
| 1210 | .. _v4l2-mpeg-video-h264-fmo-map-type: | ||
| 1211 | |||
| 1212 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE`` | ||
| 1213 | (enum) | ||
| 1214 | |||
| 1215 | enum v4l2_mpeg_video_h264_fmo_map_type - | ||
| 1216 | When using FMO, the map type divides the image in different scan | ||
| 1217 | patterns of macroblocks. Applicable to the H264 encoder. Possible | ||
| 1218 | values are: | ||
| 1219 | |||
| 1220 | .. tabularcolumns:: |p{12.5cm}|p{5.0cm}| | ||
| 1221 | |||
| 1222 | .. flat-table:: | ||
| 1223 | :header-rows: 0 | ||
| 1224 | :stub-columns: 0 | ||
| 1225 | |||
| 1226 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_INTERLEAVED_SLICES`` | ||
| 1227 | - Slices are interleaved one after other with macroblocks in run | ||
| 1228 | length order. | ||
| 1229 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_SCATTERED_SLICES`` | ||
| 1230 | - Scatters the macroblocks based on a mathematical function known to | ||
| 1231 | both encoder and decoder. | ||
| 1232 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_FOREGROUND_WITH_LEFT_OVER`` | ||
| 1233 | - Macroblocks arranged in rectangular areas or regions of interest. | ||
| 1234 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_BOX_OUT`` | ||
| 1235 | - Slice groups grow in a cyclic way from centre to outwards. | ||
| 1236 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_RASTER_SCAN`` | ||
| 1237 | - Slice groups grow in raster scan pattern from left to right. | ||
| 1238 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN`` | ||
| 1239 | - Slice groups grow in wipe scan pattern from top to bottom. | ||
| 1240 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_EXPLICIT`` | ||
| 1241 | - User defined map type. | ||
| 1242 | |||
| 1243 | |||
| 1244 | |||
| 1245 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_SLICE_GROUP (integer)`` | ||
| 1246 | Number of slice groups in FMO. Applicable to the H264 encoder. | ||
| 1247 | |||
| 1248 | .. _v4l2-mpeg-video-h264-fmo-change-direction: | ||
| 1249 | |||
| 1250 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_DIRECTION`` | ||
| 1251 | (enum) | ||
| 1252 | |||
| 1253 | enum v4l2_mpeg_video_h264_fmo_change_dir - | ||
| 1254 | Specifies a direction of the slice group change for raster and wipe | ||
| 1255 | maps. Applicable to the H264 encoder. Possible values are: | ||
| 1256 | |||
| 1257 | |||
| 1258 | |||
| 1259 | .. flat-table:: | ||
| 1260 | :header-rows: 0 | ||
| 1261 | :stub-columns: 0 | ||
| 1262 | |||
| 1263 | * - ``V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_RIGHT`` | ||
| 1264 | - Raster scan or wipe right. | ||
| 1265 | * - ``V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_LEFT`` | ||
| 1266 | - Reverse raster scan or wipe left. | ||
| 1267 | |||
| 1268 | |||
| 1269 | |||
| 1270 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_RATE (integer)`` | ||
| 1271 | Specifies the size of the first slice group for raster and wipe map. | ||
| 1272 | Applicable to the H264 encoder. | ||
| 1273 | |||
| 1274 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_RUN_LENGTH (integer)`` | ||
| 1275 | Specifies the number of consecutive macroblocks for the interleaved | ||
| 1276 | map. Applicable to the H264 encoder. | ||
| 1277 | |||
| 1278 | ``V4L2_CID_MPEG_VIDEO_H264_ASO (boolean)`` | ||
| 1279 | Enables arbitrary slice ordering in encoded bitstream. Applicable to | ||
| 1280 | the H264 encoder. | ||
| 1281 | |||
| 1282 | ``V4L2_CID_MPEG_VIDEO_H264_ASO_SLICE_ORDER (integer)`` | ||
| 1283 | Specifies the slice order in ASO. Applicable to the H264 encoder. | ||
| 1284 | The supplied 32-bit integer is interpreted as follows (bit 0 = least | ||
| 1285 | significant bit): | ||
| 1286 | |||
| 1287 | |||
| 1288 | |||
| 1289 | .. flat-table:: | ||
| 1290 | :header-rows: 0 | ||
| 1291 | :stub-columns: 0 | ||
| 1292 | |||
| 1293 | * - Bit 0:15 | ||
| 1294 | - Slice ID | ||
| 1295 | * - Bit 16:32 | ||
| 1296 | - Slice position or order | ||
| 1297 | |||
| 1298 | |||
| 1299 | |||
| 1300 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING (boolean)`` | ||
| 1301 | Enables H264 hierarchical coding. Applicable to the H264 encoder. | ||
| 1302 | |||
| 1303 | .. _v4l2-mpeg-video-h264-hierarchical-coding-type: | ||
| 1304 | |||
| 1305 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE`` | ||
| 1306 | (enum) | ||
| 1307 | |||
| 1308 | enum v4l2_mpeg_video_h264_hierarchical_coding_type - | ||
| 1309 | Specifies the hierarchical coding type. Applicable to the H264 | ||
| 1310 | encoder. Possible values are: | ||
| 1311 | |||
| 1312 | |||
| 1313 | |||
| 1314 | .. flat-table:: | ||
| 1315 | :header-rows: 0 | ||
| 1316 | :stub-columns: 0 | ||
| 1317 | |||
| 1318 | * - ``V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B`` | ||
| 1319 | - Hierarchical B coding. | ||
| 1320 | * - ``V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P`` | ||
| 1321 | - Hierarchical P coding. | ||
| 1322 | |||
| 1323 | |||
| 1324 | |||
| 1325 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER (integer)`` | ||
| 1326 | Specifies the number of hierarchical coding layers. Applicable to | ||
| 1327 | the H264 encoder. | ||
| 1328 | |||
| 1329 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP (integer)`` | ||
| 1330 | Specifies a user defined QP for each layer. Applicable to the H264 | ||
| 1331 | encoder. The supplied 32-bit integer is interpreted as follows (bit | ||
| 1332 | 0 = least significant bit): | ||
| 1333 | |||
| 1334 | |||
| 1335 | |||
| 1336 | .. flat-table:: | ||
| 1337 | :header-rows: 0 | ||
| 1338 | :stub-columns: 0 | ||
| 1339 | |||
| 1340 | * - Bit 0:15 | ||
| 1341 | - QP value | ||
| 1342 | * - Bit 16:32 | ||
| 1343 | - Layer number | ||
| 1344 | |||
| 1345 | |||
| 1346 | |||
| 1347 | .. _v4l2-mpeg-mpeg2: | ||
| 1348 | |||
| 1349 | ``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)`` | ||
| 1350 | Specifies the slice parameters (as extracted from the bitstream) for the | ||
| 1351 | associated MPEG-2 slice data. This includes the necessary parameters for | ||
| 1352 | configuring a stateless hardware decoding pipeline for MPEG-2. | ||
| 1353 | The bitstream parameters are defined according to :ref:`mpeg2part2`. | ||
| 1354 | |||
| 1355 | .. note:: | ||
| 1356 | |||
| 1357 | This compound control is not yet part of the public kernel API and | ||
| 1358 | it is expected to change. | ||
| 1359 | |||
| 1360 | .. c:type:: v4l2_ctrl_mpeg2_slice_params | ||
| 1361 | |||
| 1362 | .. cssclass:: longtable | ||
| 1363 | |||
| 1364 | .. flat-table:: struct v4l2_ctrl_mpeg2_slice_params | ||
| 1365 | :header-rows: 0 | ||
| 1366 | :stub-columns: 0 | ||
| 1367 | :widths: 1 1 2 | ||
| 1368 | |||
| 1369 | * - __u32 | ||
| 1370 | - ``bit_size`` | ||
| 1371 | - Size (in bits) of the current slice data. | ||
| 1372 | * - __u32 | ||
| 1373 | - ``data_bit_offset`` | ||
| 1374 | - Offset (in bits) to the video data in the current slice data. | ||
| 1375 | * - struct :c:type:`v4l2_mpeg2_sequence` | ||
| 1376 | - ``sequence`` | ||
| 1377 | - Structure with MPEG-2 sequence metadata, merging relevant fields from | ||
| 1378 | the sequence header and sequence extension parts of the bitstream. | ||
| 1379 | * - struct :c:type:`v4l2_mpeg2_picture` | ||
| 1380 | - ``picture`` | ||
| 1381 | - Structure with MPEG-2 picture metadata, merging relevant fields from | ||
| 1382 | the picture header and picture coding extension parts of the bitstream. | ||
| 1383 | * - __u64 | ||
| 1384 | - ``backward_ref_ts`` | ||
| 1385 | - Timestamp of the V4L2 capture buffer to use as backward reference, used | ||
| 1386 | with B-coded and P-coded frames. The timestamp refers to the | ||
| 1387 | ``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the | ||
| 1388 | :c:func:`v4l2_timeval_to_ns()` function to convert the struct | ||
| 1389 | :c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64. | ||
| 1390 | * - __u64 | ||
| 1391 | - ``forward_ref_ts`` | ||
| 1392 | - Timestamp for the V4L2 capture buffer to use as forward reference, used | ||
| 1393 | with B-coded frames. The timestamp refers to the ``timestamp`` field in | ||
| 1394 | struct :c:type:`v4l2_buffer`. Use the :c:func:`v4l2_timeval_to_ns()` | ||
| 1395 | function to convert the struct :c:type:`timeval` in struct | ||
| 1396 | :c:type:`v4l2_buffer` to a __u64. | ||
| 1397 | * - __u32 | ||
| 1398 | - ``quantiser_scale_code`` | ||
| 1399 | - Code used to determine the quantization scale to use for the IDCT. | ||
| 1400 | |||
| 1401 | .. c:type:: v4l2_mpeg2_sequence | ||
| 1402 | |||
| 1403 | .. cssclass:: longtable | ||
| 1404 | |||
| 1405 | .. flat-table:: struct v4l2_mpeg2_sequence | ||
| 1406 | :header-rows: 0 | ||
| 1407 | :stub-columns: 0 | ||
| 1408 | :widths: 1 1 2 | ||
| 1409 | |||
| 1410 | * - __u16 | ||
| 1411 | - ``horizontal_size`` | ||
| 1412 | - The width of the displayable part of the frame's luminance component. | ||
| 1413 | * - __u16 | ||
| 1414 | - ``vertical_size`` | ||
| 1415 | - The height of the displayable part of the frame's luminance component. | ||
| 1416 | * - __u32 | ||
| 1417 | - ``vbv_buffer_size`` | ||
| 1418 | - Used to calculate the required size of the video buffering verifier, | ||
| 1419 | defined (in bits) as: 16 * 1024 * vbv_buffer_size. | ||
| 1420 | * - __u16 | ||
| 1421 | - ``profile_and_level_indication`` | ||
| 1422 | - The current profile and level indication as extracted from the | ||
| 1423 | bitstream. | ||
| 1424 | * - __u8 | ||
| 1425 | - ``progressive_sequence`` | ||
| 1426 | - Indication that all the frames for the sequence are progressive instead | ||
| 1427 | of interlaced. | ||
| 1428 | * - __u8 | ||
| 1429 | - ``chroma_format`` | ||
| 1430 | - The chrominance sub-sampling format (1: 4:2:0, 2: 4:2:2, 3: 4:4:4). | ||
| 1431 | |||
| 1432 | .. c:type:: v4l2_mpeg2_picture | ||
| 1433 | |||
| 1434 | .. cssclass:: longtable | ||
| 1435 | |||
| 1436 | .. flat-table:: struct v4l2_mpeg2_picture | ||
| 1437 | :header-rows: 0 | ||
| 1438 | :stub-columns: 0 | ||
| 1439 | :widths: 1 1 2 | ||
| 1440 | |||
| 1441 | * - __u8 | ||
| 1442 | - ``picture_coding_type`` | ||
| 1443 | - Picture coding type for the frame covered by the current slice | ||
| 1444 | (V4L2_MPEG2_PICTURE_CODING_TYPE_I, V4L2_MPEG2_PICTURE_CODING_TYPE_P or | ||
| 1445 | V4L2_MPEG2_PICTURE_CODING_TYPE_B). | ||
| 1446 | * - __u8 | ||
| 1447 | - ``f_code[2][2]`` | ||
| 1448 | - Motion vector codes. | ||
| 1449 | * - __u8 | ||
| 1450 | - ``intra_dc_precision`` | ||
| 1451 | - Precision of Discrete Cosine transform (0: 8 bits precision, | ||
| 1452 | 1: 9 bits precision, 2: 10 bits precision, 3: 11 bits precision). | ||
| 1453 | * - __u8 | ||
| 1454 | - ``picture_structure`` | ||
| 1455 | - Picture structure (1: interlaced top field, 2: interlaced bottom field, | ||
| 1456 | 3: progressive frame). | ||
| 1457 | * - __u8 | ||
| 1458 | - ``top_field_first`` | ||
| 1459 | - If set to 1 and interlaced stream, top field is output first. | ||
| 1460 | * - __u8 | ||
| 1461 | - ``frame_pred_frame_dct`` | ||
| 1462 | - If set to 1, only frame-DCT and frame prediction are used. | ||
| 1463 | * - __u8 | ||
| 1464 | - ``concealment_motion_vectors`` | ||
| 1465 | - If set to 1, motion vectors are coded for intra macroblocks. | ||
| 1466 | * - __u8 | ||
| 1467 | - ``q_scale_type`` | ||
| 1468 | - This flag affects the inverse quantization process. | ||
| 1469 | * - __u8 | ||
| 1470 | - ``intra_vlc_format`` | ||
| 1471 | - This flag affects the decoding of transform coefficient data. | ||
| 1472 | * - __u8 | ||
| 1473 | - ``alternate_scan`` | ||
| 1474 | - This flag affects the decoding of transform coefficient data. | ||
| 1475 | * - __u8 | ||
| 1476 | - ``repeat_first_field`` | ||
| 1477 | - This flag affects the decoding process of progressive frames. | ||
| 1478 | * - __u16 | ||
| 1479 | - ``progressive_frame`` | ||
| 1480 | - Indicates whether the current frame is progressive. | ||
| 1481 | |||
| 1482 | ``V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION (struct)`` | ||
| 1483 | Specifies quantization matrices (as extracted from the bitstream) for the | ||
| 1484 | associated MPEG-2 slice data. | ||
| 1485 | |||
| 1486 | .. note:: | ||
| 1487 | |||
| 1488 | This compound control is not yet part of the public kernel API and | ||
| 1489 | it is expected to change. | ||
| 1490 | |||
| 1491 | .. c:type:: v4l2_ctrl_mpeg2_quantization | ||
| 1492 | |||
| 1493 | .. cssclass:: longtable | ||
| 1494 | |||
| 1495 | .. flat-table:: struct v4l2_ctrl_mpeg2_quantization | ||
| 1496 | :header-rows: 0 | ||
| 1497 | :stub-columns: 0 | ||
| 1498 | :widths: 1 1 2 | ||
| 1499 | |||
| 1500 | * - __u8 | ||
| 1501 | - ``load_intra_quantiser_matrix`` | ||
| 1502 | - One bit to indicate whether to load the ``intra_quantiser_matrix`` data. | ||
| 1503 | * - __u8 | ||
| 1504 | - ``load_non_intra_quantiser_matrix`` | ||
| 1505 | - One bit to indicate whether to load the ``non_intra_quantiser_matrix`` | ||
| 1506 | data. | ||
| 1507 | * - __u8 | ||
| 1508 | - ``load_chroma_intra_quantiser_matrix`` | ||
| 1509 | - One bit to indicate whether to load the | ||
| 1510 | ``chroma_intra_quantiser_matrix`` data, only relevant for non-4:2:0 YUV | ||
| 1511 | formats. | ||
| 1512 | * - __u8 | ||
| 1513 | - ``load_chroma_non_intra_quantiser_matrix`` | ||
| 1514 | - One bit to indicate whether to load the | ||
| 1515 | ``chroma_non_intra_quantiser_matrix`` data, only relevant for non-4:2:0 | ||
| 1516 | YUV formats. | ||
| 1517 | * - __u8 | ||
| 1518 | - ``intra_quantiser_matrix[64]`` | ||
| 1519 | - The quantization matrix coefficients for intra-coded frames, in zigzag | ||
| 1520 | scanning order. It is relevant for both luma and chroma components, | ||
| 1521 | although it can be superseded by the chroma-specific matrix for | ||
| 1522 | non-4:2:0 YUV formats. | ||
| 1523 | * - __u8 | ||
| 1524 | - ``non_intra_quantiser_matrix[64]`` | ||
| 1525 | - The quantization matrix coefficients for non-intra-coded frames, in | ||
| 1526 | zigzag scanning order. It is relevant for both luma and chroma | ||
| 1527 | components, although it can be superseded by the chroma-specific matrix | ||
| 1528 | for non-4:2:0 YUV formats. | ||
| 1529 | * - __u8 | ||
| 1530 | - ``chroma_intra_quantiser_matrix[64]`` | ||
| 1531 | - The quantization matrix coefficients for the chominance component of | ||
| 1532 | intra-coded frames, in zigzag scanning order. Only relevant for | ||
| 1533 | non-4:2:0 YUV formats. | ||
| 1534 | * - __u8 | ||
| 1535 | - ``chroma_non_intra_quantiser_matrix[64]`` | ||
| 1536 | - The quantization matrix coefficients for the chrominance component of | ||
| 1537 | non-intra-coded frames, in zigzag scanning order. Only relevant for | ||
| 1538 | non-4:2:0 YUV formats. | ||
| 1539 | |||
| 1540 | MFC 5.1 MPEG Controls | ||
| 1541 | ===================== | ||
| 1542 | |||
| 1543 | The following MPEG class controls deal with MPEG decoding and encoding | ||
| 1544 | settings that are specific to the Multi Format Codec 5.1 device present | ||
| 1545 | in the S5P family of SoCs by Samsung. | ||
| 1546 | |||
| 1547 | |||
| 1548 | .. _mfc51-control-id: | ||
| 1549 | |||
| 1550 | MFC 5.1 Control IDs | ||
| 1551 | ------------------- | ||
| 1552 | |||
| 1553 | ``V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE (boolean)`` | ||
| 1554 | If the display delay is enabled then the decoder is forced to return | ||
| 1555 | a CAPTURE buffer (decoded frame) after processing a certain number | ||
| 1556 | of OUTPUT buffers. The delay can be set through | ||
| 1557 | ``V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY``. This | ||
| 1558 | feature can be used for example for generating thumbnails of videos. | ||
| 1559 | Applicable to the H264 decoder. | ||
| 1560 | |||
| 1561 | ``V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY (integer)`` | ||
| 1562 | Display delay value for H264 decoder. The decoder is forced to | ||
| 1563 | return a decoded frame after the set 'display delay' number of | ||
| 1564 | frames. If this number is low it may result in frames returned out | ||
| 1565 | of display order, in addition the hardware may still be using the | ||
| 1566 | returned buffer as a reference picture for subsequent frames. | ||
| 1567 | |||
| 1568 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (integer)`` | ||
| 1569 | The number of reference pictures used for encoding a P picture. | ||
| 1570 | Applicable to the H264 encoder. | ||
| 1571 | |||
| 1572 | ``V4L2_CID_MPEG_MFC51_VIDEO_PADDING (boolean)`` | ||
| 1573 | Padding enable in the encoder - use a color instead of repeating | ||
| 1574 | border pixels. Applicable to encoders. | ||
| 1575 | |||
| 1576 | ``V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV (integer)`` | ||
| 1577 | Padding color in the encoder. Applicable to encoders. The supplied | ||
| 1578 | 32-bit integer is interpreted as follows (bit 0 = least significant | ||
| 1579 | bit): | ||
| 1580 | |||
| 1581 | |||
| 1582 | |||
| 1583 | .. flat-table:: | ||
| 1584 | :header-rows: 0 | ||
| 1585 | :stub-columns: 0 | ||
| 1586 | |||
| 1587 | * - Bit 0:7 | ||
| 1588 | - V chrominance information | ||
| 1589 | * - Bit 8:15 | ||
| 1590 | - U chrominance information | ||
| 1591 | * - Bit 16:23 | ||
| 1592 | - Y luminance information | ||
| 1593 | * - Bit 24:31 | ||
| 1594 | - Must be zero. | ||
| 1595 | |||
| 1596 | |||
| 1597 | |||
| 1598 | ``V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF (integer)`` | ||
| 1599 | Reaction coefficient for MFC rate control. Applicable to encoders. | ||
| 1600 | |||
| 1601 | .. note:: | ||
| 1602 | |||
| 1603 | #. Valid only when the frame level RC is enabled. | ||
| 1604 | |||
| 1605 | #. For tight CBR, this field must be small (ex. 2 ~ 10). For | ||
| 1606 | VBR, this field must be large (ex. 100 ~ 1000). | ||
| 1607 | |||
| 1608 | #. It is not recommended to use the greater number than | ||
| 1609 | FRAME_RATE * (10^9 / BIT_RATE). | ||
| 1610 | |||
| 1611 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK (boolean)`` | ||
| 1612 | Adaptive rate control for dark region. Valid only when H.264 and | ||
| 1613 | macroblock level RC is enabled | ||
| 1614 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1615 | encoder. | ||
| 1616 | |||
| 1617 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH (boolean)`` | ||
| 1618 | Adaptive rate control for smooth region. Valid only when H.264 and | ||
| 1619 | macroblock level RC is enabled | ||
| 1620 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1621 | encoder. | ||
| 1622 | |||
| 1623 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (boolean)`` | ||
| 1624 | Adaptive rate control for static region. Valid only when H.264 and | ||
| 1625 | macroblock level RC is enabled | ||
| 1626 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1627 | encoder. | ||
| 1628 | |||
| 1629 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY (boolean)`` | ||
| 1630 | Adaptive rate control for activity region. Valid only when H.264 and | ||
| 1631 | macroblock level RC is enabled | ||
| 1632 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1633 | encoder. | ||
| 1634 | |||
| 1635 | .. _v4l2-mpeg-mfc51-video-frame-skip-mode: | ||
| 1636 | |||
| 1637 | ``V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE`` | ||
| 1638 | (enum) | ||
| 1639 | |||
| 1640 | enum v4l2_mpeg_mfc51_video_frame_skip_mode - | ||
| 1641 | Indicates in what conditions the encoder should skip frames. If | ||
| 1642 | encoding a frame would cause the encoded stream to be larger then a | ||
| 1643 | chosen data limit then the frame will be skipped. Possible values | ||
| 1644 | are: | ||
| 1645 | |||
| 1646 | |||
| 1647 | .. tabularcolumns:: |p{9.0cm}|p{8.5cm}| | ||
| 1648 | |||
| 1649 | .. flat-table:: | ||
| 1650 | :header-rows: 0 | ||
| 1651 | :stub-columns: 0 | ||
| 1652 | |||
| 1653 | * - ``V4L2_MPEG_MFC51_FRAME_SKIP_MODE_DISABLED`` | ||
| 1654 | - Frame skip mode is disabled. | ||
| 1655 | * - ``V4L2_MPEG_MFC51_FRAME_SKIP_MODE_LEVEL_LIMIT`` | ||
| 1656 | - Frame skip mode enabled and buffer limit is set by the chosen | ||
| 1657 | level and is defined by the standard. | ||
| 1658 | * - ``V4L2_MPEG_MFC51_FRAME_SKIP_MODE_BUF_LIMIT`` | ||
| 1659 | - Frame skip mode enabled and buffer limit is set by the VBV | ||
| 1660 | (MPEG1/2/4) or CPB (H264) buffer size control. | ||
| 1661 | |||
| 1662 | |||
| 1663 | |||
| 1664 | ``V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT (integer)`` | ||
| 1665 | Enable rate-control with fixed target bit. If this setting is | ||
| 1666 | enabled, then the rate control logic of the encoder will calculate | ||
| 1667 | the average bitrate for a GOP and keep it below or equal the set | ||
| 1668 | bitrate target. Otherwise the rate control logic calculates the | ||
| 1669 | overall average bitrate for the stream and keeps it below or equal | ||
| 1670 | to the set bitrate. In the first case the average bitrate for the | ||
| 1671 | whole stream will be smaller then the set bitrate. This is caused | ||
| 1672 | because the average is calculated for smaller number of frames, on | ||
| 1673 | the other hand enabling this setting will ensure that the stream | ||
| 1674 | will meet tight bandwidth constraints. Applicable to encoders. | ||
| 1675 | |||
| 1676 | .. _v4l2-mpeg-mfc51-video-force-frame-type: | ||
| 1677 | |||
| 1678 | ``V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE`` | ||
| 1679 | (enum) | ||
| 1680 | |||
| 1681 | enum v4l2_mpeg_mfc51_video_force_frame_type - | ||
| 1682 | Force a frame type for the next queued buffer. Applicable to | ||
| 1683 | encoders. Possible values are: | ||
| 1684 | |||
| 1685 | |||
| 1686 | |||
| 1687 | .. flat-table:: | ||
| 1688 | :header-rows: 0 | ||
| 1689 | :stub-columns: 0 | ||
| 1690 | |||
| 1691 | * - ``V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_DISABLED`` | ||
| 1692 | - Forcing a specific frame type disabled. | ||
| 1693 | * - ``V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_I_FRAME`` | ||
| 1694 | - Force an I-frame. | ||
| 1695 | * - ``V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_NOT_CODED`` | ||
| 1696 | - Force a non-coded frame. | ||
| 1697 | |||
| 1698 | |||
| 1699 | |||
| 1700 | |||
| 1701 | CX2341x MPEG Controls | ||
| 1702 | ===================== | ||
| 1703 | |||
| 1704 | The following MPEG class controls deal with MPEG encoding settings that | ||
| 1705 | are specific to the Conexant CX23415 and CX23416 MPEG encoding chips. | ||
| 1706 | |||
| 1707 | |||
| 1708 | .. _cx2341x-control-id: | ||
| 1709 | |||
| 1710 | CX2341x Control IDs | ||
| 1711 | ------------------- | ||
| 1712 | |||
| 1713 | .. _v4l2-mpeg-cx2341x-video-spatial-filter-mode: | ||
| 1714 | |||
| 1715 | ``V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE`` | ||
| 1716 | (enum) | ||
| 1717 | |||
| 1718 | enum v4l2_mpeg_cx2341x_video_spatial_filter_mode - | ||
| 1719 | Sets the Spatial Filter mode (default ``MANUAL``). Possible values | ||
| 1720 | are: | ||
| 1721 | |||
| 1722 | |||
| 1723 | |||
| 1724 | .. flat-table:: | ||
| 1725 | :header-rows: 0 | ||
| 1726 | :stub-columns: 0 | ||
| 1727 | |||
| 1728 | * - ``V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL`` | ||
| 1729 | - Choose the filter manually | ||
| 1730 | * - ``V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO`` | ||
| 1731 | - Choose the filter automatically | ||
| 1732 | |||
| 1733 | |||
| 1734 | |||
| 1735 | ``V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER (integer (0-15))`` | ||
| 1736 | The setting for the Spatial Filter. 0 = off, 15 = maximum. (Default | ||
| 1737 | is 0.) | ||
| 1738 | |||
| 1739 | .. _luma-spatial-filter-type: | ||
| 1740 | |||
| 1741 | ``V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE`` | ||
| 1742 | (enum) | ||
| 1743 | |||
| 1744 | enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type - | ||
| 1745 | Select the algorithm to use for the Luma Spatial Filter (default | ||
| 1746 | ``1D_HOR``). Possible values: | ||
| 1747 | |||
| 1748 | |||
| 1749 | |||
| 1750 | .. tabularcolumns:: |p{14.5cm}|p{3.0cm}| | ||
| 1751 | |||
| 1752 | .. flat-table:: | ||
| 1753 | :header-rows: 0 | ||
| 1754 | :stub-columns: 0 | ||
| 1755 | |||
| 1756 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF`` | ||
| 1757 | - No filter | ||
| 1758 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR`` | ||
| 1759 | - One-dimensional horizontal | ||
| 1760 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT`` | ||
| 1761 | - One-dimensional vertical | ||
| 1762 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE`` | ||
| 1763 | - Two-dimensional separable | ||
| 1764 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE`` | ||
| 1765 | - Two-dimensional symmetrical non-separable | ||
| 1766 | |||
| 1767 | |||
| 1768 | |||
| 1769 | .. _chroma-spatial-filter-type: | ||
| 1770 | |||
| 1771 | ``V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE`` | ||
| 1772 | (enum) | ||
| 1773 | |||
| 1774 | enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type - | ||
| 1775 | Select the algorithm for the Chroma Spatial Filter (default | ||
| 1776 | ``1D_HOR``). Possible values are: | ||
| 1777 | |||
| 1778 | |||
| 1779 | |||
| 1780 | .. flat-table:: | ||
| 1781 | :header-rows: 0 | ||
| 1782 | :stub-columns: 0 | ||
| 1783 | |||
| 1784 | * - ``V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF`` | ||
| 1785 | - No filter | ||
| 1786 | * - ``V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR`` | ||
| 1787 | - One-dimensional horizontal | ||
| 1788 | |||
| 1789 | |||
| 1790 | |||
| 1791 | .. _v4l2-mpeg-cx2341x-video-temporal-filter-mode: | ||
| 1792 | |||
| 1793 | ``V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE`` | ||
| 1794 | (enum) | ||
| 1795 | |||
| 1796 | enum v4l2_mpeg_cx2341x_video_temporal_filter_mode - | ||
| 1797 | Sets the Temporal Filter mode (default ``MANUAL``). Possible values | ||
| 1798 | are: | ||
| 1799 | |||
| 1800 | |||
| 1801 | |||
| 1802 | .. flat-table:: | ||
| 1803 | :header-rows: 0 | ||
| 1804 | :stub-columns: 0 | ||
| 1805 | |||
| 1806 | * - ``V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL`` | ||
| 1807 | - Choose the filter manually | ||
| 1808 | * - ``V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO`` | ||
| 1809 | - Choose the filter automatically | ||
| 1810 | |||
| 1811 | |||
| 1812 | |||
| 1813 | ``V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER (integer (0-31))`` | ||
| 1814 | The setting for the Temporal Filter. 0 = off, 31 = maximum. (Default | ||
| 1815 | is 8 for full-scale capturing and 0 for scaled capturing.) | ||
| 1816 | |||
| 1817 | .. _v4l2-mpeg-cx2341x-video-median-filter-type: | ||
| 1818 | |||
| 1819 | ``V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE`` | ||
| 1820 | (enum) | ||
| 1821 | |||
| 1822 | enum v4l2_mpeg_cx2341x_video_median_filter_type - | ||
| 1823 | Median Filter Type (default ``OFF``). Possible values are: | ||
| 1824 | |||
| 1825 | |||
| 1826 | |||
| 1827 | .. flat-table:: | ||
| 1828 | :header-rows: 0 | ||
| 1829 | :stub-columns: 0 | ||
| 1830 | |||
| 1831 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF`` | ||
| 1832 | - No filter | ||
| 1833 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR`` | ||
| 1834 | - Horizontal filter | ||
| 1835 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT`` | ||
| 1836 | - Vertical filter | ||
| 1837 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT`` | ||
| 1838 | - Horizontal and vertical filter | ||
| 1839 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG`` | ||
| 1840 | - Diagonal filter | ||
| 1841 | |||
| 1842 | |||
| 1843 | |||
| 1844 | ``V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM (integer (0-255))`` | ||
| 1845 | Threshold above which the luminance median filter is enabled | ||
| 1846 | (default 0) | ||
| 1847 | |||
| 1848 | ``V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP (integer (0-255))`` | ||
| 1849 | Threshold below which the luminance median filter is enabled | ||
| 1850 | (default 255) | ||
| 1851 | |||
| 1852 | ``V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM (integer (0-255))`` | ||
| 1853 | Threshold above which the chroma median filter is enabled (default | ||
| 1854 | 0) | ||
| 1855 | |||
| 1856 | ``V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (integer (0-255))`` | ||
| 1857 | Threshold below which the chroma median filter is enabled (default | ||
| 1858 | 255) | ||
| 1859 | |||
| 1860 | ``V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (boolean)`` | ||
| 1861 | The CX2341X MPEG encoder can insert one empty MPEG-2 PES packet into | ||
| 1862 | the stream between every four video frames. The packet size is 2048 | ||
| 1863 | bytes, including the packet_start_code_prefix and stream_id | ||
| 1864 | fields. The stream_id is 0xBF (private stream 2). The payload | ||
| 1865 | consists of 0x00 bytes, to be filled in by the application. 0 = do | ||
| 1866 | not insert, 1 = insert packets. | ||
| 1867 | |||
| 1868 | |||
| 1869 | VPX Control Reference | ||
| 1870 | ===================== | ||
| 1871 | |||
| 1872 | The VPX controls include controls for encoding parameters of VPx video | ||
| 1873 | codec. | ||
| 1874 | |||
| 1875 | |||
| 1876 | .. _vpx-control-id: | ||
| 1877 | |||
| 1878 | VPX Control IDs | ||
| 1879 | --------------- | ||
| 1880 | |||
| 1881 | .. _v4l2-vpx-num-partitions: | ||
| 1882 | |||
| 1883 | ``V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS`` | ||
| 1884 | (enum) | ||
| 1885 | |||
| 1886 | enum v4l2_vp8_num_partitions - | ||
| 1887 | The number of token partitions to use in VP8 encoder. Possible | ||
| 1888 | values are: | ||
| 1889 | |||
| 1890 | |||
| 1891 | |||
| 1892 | .. flat-table:: | ||
| 1893 | :header-rows: 0 | ||
| 1894 | :stub-columns: 0 | ||
| 1895 | |||
| 1896 | * - ``V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION`` | ||
| 1897 | - 1 coefficient partition | ||
| 1898 | * - ``V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS`` | ||
| 1899 | - 2 coefficient partitions | ||
| 1900 | * - ``V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS`` | ||
| 1901 | - 4 coefficient partitions | ||
| 1902 | * - ``V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS`` | ||
| 1903 | - 8 coefficient partitions | ||
| 1904 | |||
| 1905 | |||
| 1906 | |||
| 1907 | ``V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4 (boolean)`` | ||
| 1908 | Setting this prevents intra 4x4 mode in the intra mode decision. | ||
| 1909 | |||
| 1910 | .. _v4l2-vpx-num-ref-frames: | ||
| 1911 | |||
| 1912 | ``V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES`` | ||
| 1913 | (enum) | ||
| 1914 | |||
| 1915 | enum v4l2_vp8_num_ref_frames - | ||
| 1916 | The number of reference pictures for encoding P frames. Possible | ||
| 1917 | values are: | ||
| 1918 | |||
| 1919 | .. tabularcolumns:: |p{7.9cm}|p{9.6cm}| | ||
| 1920 | |||
| 1921 | .. flat-table:: | ||
| 1922 | :header-rows: 0 | ||
| 1923 | :stub-columns: 0 | ||
| 1924 | |||
| 1925 | * - ``V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME`` | ||
| 1926 | - Last encoded frame will be searched | ||
| 1927 | * - ``V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME`` | ||
| 1928 | - Two frames will be searched among the last encoded frame, the | ||
| 1929 | golden frame and the alternate reference (altref) frame. The | ||
| 1930 | encoder implementation will decide which two are chosen. | ||
| 1931 | * - ``V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME`` | ||
| 1932 | - The last encoded frame, the golden frame and the altref frame will | ||
| 1933 | be searched. | ||
| 1934 | |||
| 1935 | |||
| 1936 | |||
| 1937 | ``V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL (integer)`` | ||
| 1938 | Indicates the loop filter level. The adjustment of the loop filter | ||
| 1939 | level is done via a delta value against a baseline loop filter | ||
| 1940 | value. | ||
| 1941 | |||
| 1942 | ``V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS (integer)`` | ||
| 1943 | This parameter affects the loop filter. Anything above zero weakens | ||
| 1944 | the deblocking effect on the loop filter. | ||
| 1945 | |||
| 1946 | ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD (integer)`` | ||
| 1947 | Sets the refresh period for the golden frame. The period is defined | ||
| 1948 | in number of frames. For a value of 'n', every nth frame starting | ||
| 1949 | from the first key frame will be taken as a golden frame. For eg. | ||
| 1950 | for encoding sequence of 0, 1, 2, 3, 4, 5, 6, 7 where the golden | ||
| 1951 | frame refresh period is set as 4, the frames 0, 4, 8 etc will be | ||
| 1952 | taken as the golden frames as frame 0 is always a key frame. | ||
| 1953 | |||
| 1954 | .. _v4l2-vpx-golden-frame-sel: | ||
| 1955 | |||
| 1956 | ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL`` | ||
| 1957 | (enum) | ||
| 1958 | |||
| 1959 | enum v4l2_vp8_golden_frame_sel - | ||
| 1960 | Selects the golden frame for encoding. Possible values are: | ||
| 1961 | |||
| 1962 | .. raw:: latex | ||
| 1963 | |||
| 1964 | \footnotesize | ||
| 1965 | |||
| 1966 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 1967 | |||
| 1968 | .. flat-table:: | ||
| 1969 | :header-rows: 0 | ||
| 1970 | :stub-columns: 0 | ||
| 1971 | |||
| 1972 | * - ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV`` | ||
| 1973 | - Use the (n-2)th frame as a golden frame, current frame index being | ||
| 1974 | 'n'. | ||
| 1975 | * - ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD`` | ||
| 1976 | - Use the previous specific frame indicated by | ||
| 1977 | ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD`` as a | ||
| 1978 | golden frame. | ||
| 1979 | |||
| 1980 | .. raw:: latex | ||
| 1981 | |||
| 1982 | \normalsize | ||
| 1983 | |||
| 1984 | |||
| 1985 | ``V4L2_CID_MPEG_VIDEO_VPX_MIN_QP (integer)`` | ||
| 1986 | Minimum quantization parameter for VP8. | ||
| 1987 | |||
| 1988 | ``V4L2_CID_MPEG_VIDEO_VPX_MAX_QP (integer)`` | ||
| 1989 | Maximum quantization parameter for VP8. | ||
| 1990 | |||
| 1991 | ``V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP (integer)`` | ||
| 1992 | Quantization parameter for an I frame for VP8. | ||
| 1993 | |||
| 1994 | ``V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (integer)`` | ||
| 1995 | Quantization parameter for a P frame for VP8. | ||
| 1996 | |||
| 1997 | .. _v4l2-mpeg-video-vp8-profile: | ||
| 1998 | |||
| 1999 | ``V4L2_CID_MPEG_VIDEO_VP8_PROFILE`` | ||
| 2000 | (enum) | ||
| 2001 | |||
| 2002 | enum v4l2_mpeg_video_vp8_profile - | ||
| 2003 | This control allows selecting the profile for VP8 encoder. | ||
| 2004 | This is also used to enumerate supported profiles by VP8 encoder or decoder. | ||
| 2005 | Possible values are: | ||
| 2006 | |||
| 2007 | .. flat-table:: | ||
| 2008 | :header-rows: 0 | ||
| 2009 | :stub-columns: 0 | ||
| 2010 | |||
| 2011 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_0`` | ||
| 2012 | - Profile 0 | ||
| 2013 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_1`` | ||
| 2014 | - Profile 1 | ||
| 2015 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_2`` | ||
| 2016 | - Profile 2 | ||
| 2017 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_3`` | ||
| 2018 | - Profile 3 | ||
| 2019 | |||
| 2020 | .. _v4l2-mpeg-video-vp9-profile: | ||
| 2021 | |||
| 2022 | ``V4L2_CID_MPEG_VIDEO_VP9_PROFILE`` | ||
| 2023 | (enum) | ||
| 2024 | |||
| 2025 | enum v4l2_mpeg_video_vp9_profile - | ||
| 2026 | This control allows selecting the profile for VP9 encoder. | ||
| 2027 | This is also used to enumerate supported profiles by VP9 encoder or decoder. | ||
| 2028 | Possible values are: | ||
| 2029 | |||
| 2030 | .. flat-table:: | ||
| 2031 | :header-rows: 0 | ||
| 2032 | :stub-columns: 0 | ||
| 2033 | |||
| 2034 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_0`` | ||
| 2035 | - Profile 0 | ||
| 2036 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_1`` | ||
| 2037 | - Profile 1 | ||
| 2038 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_2`` | ||
| 2039 | - Profile 2 | ||
| 2040 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_3`` | ||
| 2041 | - Profile 3 | ||
| 2042 | |||
| 2043 | |||
| 2044 | High Efficiency Video Coding (HEVC/H.265) Control Reference | ||
| 2045 | =========================================================== | ||
| 2046 | |||
| 2047 | The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265 | ||
| 2048 | video codec. | ||
| 2049 | |||
| 2050 | |||
| 2051 | .. _hevc-control-id: | ||
| 2052 | |||
| 2053 | HEVC/H.265 Control IDs | ||
| 2054 | ---------------------- | ||
| 2055 | |||
| 2056 | ``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)`` | ||
| 2057 | Minimum quantization parameter for HEVC. | ||
| 2058 | Valid range: from 0 to 51. | ||
| 2059 | |||
| 2060 | ``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)`` | ||
| 2061 | Maximum quantization parameter for HEVC. | ||
| 2062 | Valid range: from 0 to 51. | ||
| 2063 | |||
| 2064 | ``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)`` | ||
| 2065 | Quantization parameter for an I frame for HEVC. | ||
| 2066 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2067 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2068 | |||
| 2069 | ``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)`` | ||
| 2070 | Quantization parameter for a P frame for HEVC. | ||
| 2071 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2072 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2073 | |||
| 2074 | ``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)`` | ||
| 2075 | Quantization parameter for a B frame for HEVC. | ||
| 2076 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2077 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2078 | |||
| 2079 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)`` | ||
| 2080 | HIERARCHICAL_QP allows the host to specify the quantization parameter | ||
| 2081 | values for each temporal layer through HIERARCHICAL_QP_LAYER. This is | ||
| 2082 | valid only if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the | ||
| 2083 | control value to 1 enables setting of the QP values for the layers. | ||
| 2084 | |||
| 2085 | .. _v4l2-hevc-hier-coding-type: | ||
| 2086 | |||
| 2087 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE`` | ||
| 2088 | (enum) | ||
| 2089 | |||
| 2090 | enum v4l2_mpeg_video_hevc_hier_coding_type - | ||
| 2091 | Selects the hierarchical coding type for encoding. Possible values are: | ||
| 2092 | |||
| 2093 | .. raw:: latex | ||
| 2094 | |||
| 2095 | \footnotesize | ||
| 2096 | |||
| 2097 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2098 | |||
| 2099 | .. flat-table:: | ||
| 2100 | :header-rows: 0 | ||
| 2101 | :stub-columns: 0 | ||
| 2102 | |||
| 2103 | * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B`` | ||
| 2104 | - Use the B frame for hierarchical coding. | ||
| 2105 | * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P`` | ||
| 2106 | - Use the P frame for hierarchical coding. | ||
| 2107 | |||
| 2108 | .. raw:: latex | ||
| 2109 | |||
| 2110 | \normalsize | ||
| 2111 | |||
| 2112 | |||
| 2113 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)`` | ||
| 2114 | Selects the hierarchical coding layer. In normal encoding | ||
| 2115 | (non-hierarchial coding), it should be zero. Possible values are [0, 6]. | ||
| 2116 | 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING | ||
| 2117 | LAYER 1 and so on. | ||
| 2118 | |||
| 2119 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP (integer)`` | ||
| 2120 | Indicates quantization parameter for hierarchical coding layer 0. | ||
| 2121 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2122 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2123 | |||
| 2124 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_QP (integer)`` | ||
| 2125 | Indicates quantization parameter for hierarchical coding layer 1. | ||
| 2126 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2127 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2128 | |||
| 2129 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_QP (integer)`` | ||
| 2130 | Indicates quantization parameter for hierarchical coding layer 2. | ||
| 2131 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2132 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2133 | |||
| 2134 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_QP (integer)`` | ||
| 2135 | Indicates quantization parameter for hierarchical coding layer 3. | ||
| 2136 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2137 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2138 | |||
| 2139 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_QP (integer)`` | ||
| 2140 | Indicates quantization parameter for hierarchical coding layer 4. | ||
| 2141 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2142 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2143 | |||
| 2144 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_QP (integer)`` | ||
| 2145 | Indicates quantization parameter for hierarchical coding layer 5. | ||
| 2146 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2147 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2148 | |||
| 2149 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_QP (integer)`` | ||
| 2150 | Indicates quantization parameter for hierarchical coding layer 6. | ||
| 2151 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2152 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2153 | |||
| 2154 | .. _v4l2-hevc-profile: | ||
| 2155 | |||
| 2156 | ``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE`` | ||
| 2157 | (enum) | ||
| 2158 | |||
| 2159 | enum v4l2_mpeg_video_hevc_profile - | ||
| 2160 | Select the desired profile for HEVC encoder. | ||
| 2161 | |||
| 2162 | .. raw:: latex | ||
| 2163 | |||
| 2164 | \footnotesize | ||
| 2165 | |||
| 2166 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2167 | |||
| 2168 | .. flat-table:: | ||
| 2169 | :header-rows: 0 | ||
| 2170 | :stub-columns: 0 | ||
| 2171 | |||
| 2172 | * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN`` | ||
| 2173 | - Main profile. | ||
| 2174 | * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE`` | ||
| 2175 | - Main still picture profile. | ||
| 2176 | * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10`` | ||
| 2177 | - Main 10 profile. | ||
| 2178 | |||
| 2179 | .. raw:: latex | ||
| 2180 | |||
| 2181 | \normalsize | ||
| 2182 | |||
| 2183 | |||
| 2184 | .. _v4l2-hevc-level: | ||
| 2185 | |||
| 2186 | ``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL`` | ||
| 2187 | (enum) | ||
| 2188 | |||
| 2189 | enum v4l2_mpeg_video_hevc_level - | ||
| 2190 | Selects the desired level for HEVC encoder. | ||
| 2191 | |||
| 2192 | .. raw:: latex | ||
| 2193 | |||
| 2194 | \footnotesize | ||
| 2195 | |||
| 2196 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2197 | |||
| 2198 | .. flat-table:: | ||
| 2199 | :header-rows: 0 | ||
| 2200 | :stub-columns: 0 | ||
| 2201 | |||
| 2202 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1`` | ||
| 2203 | - Level 1.0 | ||
| 2204 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2`` | ||
| 2205 | - Level 2.0 | ||
| 2206 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1`` | ||
| 2207 | - Level 2.1 | ||
| 2208 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3`` | ||
| 2209 | - Level 3.0 | ||
| 2210 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1`` | ||
| 2211 | - Level 3.1 | ||
| 2212 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4`` | ||
| 2213 | - Level 4.0 | ||
| 2214 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1`` | ||
| 2215 | - Level 4.1 | ||
| 2216 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5`` | ||
| 2217 | - Level 5.0 | ||
| 2218 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1`` | ||
| 2219 | - Level 5.1 | ||
| 2220 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2`` | ||
| 2221 | - Level 5.2 | ||
| 2222 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6`` | ||
| 2223 | - Level 6.0 | ||
| 2224 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1`` | ||
| 2225 | - Level 6.1 | ||
| 2226 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2`` | ||
| 2227 | - Level 6.2 | ||
| 2228 | |||
| 2229 | .. raw:: latex | ||
| 2230 | |||
| 2231 | \normalsize | ||
| 2232 | |||
| 2233 | |||
| 2234 | ``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)`` | ||
| 2235 | Indicates the number of evenly spaced subintervals, called ticks, within | ||
| 2236 | one second. This is a 16 bit unsigned integer and has a maximum value up to | ||
| 2237 | 0xffff and a minimum value of 1. | ||
| 2238 | |||
| 2239 | .. _v4l2-hevc-tier: | ||
| 2240 | |||
| 2241 | ``V4L2_CID_MPEG_VIDEO_HEVC_TIER`` | ||
| 2242 | (enum) | ||
| 2243 | |||
| 2244 | enum v4l2_mpeg_video_hevc_tier - | ||
| 2245 | TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier | ||
| 2246 | were made to deal with applications that differ in terms of maximum bit | ||
| 2247 | rate. Setting the flag to 0 selects HEVC tier as Main tier and setting | ||
| 2248 | this flag to 1 indicates High tier. High tier is for applications requiring | ||
| 2249 | high bit rates. | ||
| 2250 | |||
| 2251 | .. raw:: latex | ||
| 2252 | |||
| 2253 | \footnotesize | ||
| 2254 | |||
| 2255 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2256 | |||
| 2257 | .. flat-table:: | ||
| 2258 | :header-rows: 0 | ||
| 2259 | :stub-columns: 0 | ||
| 2260 | |||
| 2261 | * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN`` | ||
| 2262 | - Main tier. | ||
| 2263 | * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH`` | ||
| 2264 | - High tier. | ||
| 2265 | |||
| 2266 | .. raw:: latex | ||
| 2267 | |||
| 2268 | \normalsize | ||
| 2269 | |||
| 2270 | |||
| 2271 | ``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)`` | ||
| 2272 | Selects HEVC maximum coding unit depth. | ||
| 2273 | |||
| 2274 | .. _v4l2-hevc-loop-filter-mode: | ||
| 2275 | |||
| 2276 | ``V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE`` | ||
| 2277 | (enum) | ||
| 2278 | |||
| 2279 | enum v4l2_mpeg_video_hevc_loop_filter_mode - | ||
| 2280 | Loop filter mode for HEVC encoder. Possible values are: | ||
| 2281 | |||
| 2282 | .. raw:: latex | ||
| 2283 | |||
| 2284 | \footnotesize | ||
| 2285 | |||
| 2286 | .. tabularcolumns:: |p{10.7cm}|p{6.3cm}| | ||
| 2287 | |||
| 2288 | .. flat-table:: | ||
| 2289 | :header-rows: 0 | ||
| 2290 | :stub-columns: 0 | ||
| 2291 | |||
| 2292 | * - ``V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED`` | ||
| 2293 | - Loop filter is disabled. | ||
| 2294 | * - ``V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED`` | ||
| 2295 | - Loop filter is enabled. | ||
| 2296 | * - ``V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY`` | ||
| 2297 | - Loop filter is disabled at the slice boundary. | ||
| 2298 | |||
| 2299 | .. raw:: latex | ||
| 2300 | |||
| 2301 | \normalsize | ||
| 2302 | |||
| 2303 | |||
| 2304 | ``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)`` | ||
| 2305 | Selects HEVC loop filter beta offset. The valid range is [-6, +6]. | ||
| 2306 | |||
| 2307 | ``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)`` | ||
| 2308 | Selects HEVC loop filter tc offset. The valid range is [-6, +6]. | ||
| 2309 | |||
| 2310 | .. _v4l2-hevc-refresh-type: | ||
| 2311 | |||
| 2312 | ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE`` | ||
| 2313 | (enum) | ||
| 2314 | |||
| 2315 | enum v4l2_mpeg_video_hevc_hier_refresh_type - | ||
| 2316 | Selects refresh type for HEVC encoder. | ||
| 2317 | Host has to specify the period into | ||
| 2318 | V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD. | ||
| 2319 | |||
| 2320 | .. raw:: latex | ||
| 2321 | |||
| 2322 | \footnotesize | ||
| 2323 | |||
| 2324 | .. tabularcolumns:: |p{8.0cm}|p{9.0cm}| | ||
| 2325 | |||
| 2326 | .. flat-table:: | ||
| 2327 | :header-rows: 0 | ||
| 2328 | :stub-columns: 0 | ||
| 2329 | |||
| 2330 | * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE`` | ||
| 2331 | - Use the B frame for hierarchical coding. | ||
| 2332 | * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA`` | ||
| 2333 | - Use CRA (Clean Random Access Unit) picture encoding. | ||
| 2334 | * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR`` | ||
| 2335 | - Use IDR (Instantaneous Decoding Refresh) picture encoding. | ||
| 2336 | |||
| 2337 | .. raw:: latex | ||
| 2338 | |||
| 2339 | \normalsize | ||
| 2340 | |||
| 2341 | |||
| 2342 | ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)`` | ||
| 2343 | Selects the refresh period for HEVC encoder. | ||
| 2344 | This specifies the number of I pictures between two CRA/IDR pictures. | ||
| 2345 | This is valid only if REFRESH_TYPE is not 0. | ||
| 2346 | |||
| 2347 | ``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)`` | ||
| 2348 | Indicates HEVC lossless encoding. Setting it to 0 disables lossless | ||
| 2349 | encoding. Setting it to 1 enables lossless encoding. | ||
| 2350 | |||
| 2351 | ``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)`` | ||
| 2352 | Indicates constant intra prediction for HEVC encoder. Specifies the | ||
| 2353 | constrained intra prediction in which intra largest coding unit (LCU) | ||
| 2354 | prediction is performed by using residual data and decoded samples of | ||
| 2355 | neighboring intra LCU only. Setting the value to 1 enables constant intra | ||
| 2356 | prediction and setting the value to 0 disables constant intra prediction. | ||
| 2357 | |||
| 2358 | ``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)`` | ||
| 2359 | Indicates wavefront parallel processing for HEVC encoder. Setting it to 0 | ||
| 2360 | disables the feature and setting it to 1 enables the wavefront parallel | ||
| 2361 | processing. | ||
| 2362 | |||
| 2363 | ``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)`` | ||
| 2364 | Setting the value to 1 enables combination of P and B frame for HEVC | ||
| 2365 | encoder. | ||
| 2366 | |||
| 2367 | ``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)`` | ||
| 2368 | Indicates temporal identifier for HEVC encoder which is enabled by | ||
| 2369 | setting the value to 1. | ||
| 2370 | |||
| 2371 | ``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)`` | ||
| 2372 | Indicates bi-linear interpolation is conditionally used in the intra | ||
| 2373 | prediction filtering process in the CVS when set to 1. Indicates bi-linear | ||
| 2374 | interpolation is not used in the CVS when set to 0. | ||
| 2375 | |||
| 2376 | ``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)`` | ||
| 2377 | Indicates maximum number of merge candidate motion vectors. | ||
| 2378 | Values are from 0 to 4. | ||
| 2379 | |||
| 2380 | ``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)`` | ||
| 2381 | Indicates temporal motion vector prediction for HEVC encoder. Setting it to | ||
| 2382 | 1 enables the prediction. Setting it to 0 disables the prediction. | ||
| 2383 | |||
| 2384 | ``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)`` | ||
| 2385 | Specifies if HEVC generates a stream with a size of the length field | ||
| 2386 | instead of start code pattern. The size of the length field is configurable | ||
| 2387 | through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting | ||
| 2388 | the value to 0 disables encoding without startcode pattern. Setting the | ||
| 2389 | value to 1 will enables encoding without startcode pattern. | ||
| 2390 | |||
| 2391 | .. _v4l2-hevc-size-of-length-field: | ||
| 2392 | |||
| 2393 | ``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD`` | ||
| 2394 | (enum) | ||
| 2395 | |||
| 2396 | enum v4l2_mpeg_video_hevc_size_of_length_field - | ||
| 2397 | Indicates the size of length field. | ||
| 2398 | This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled. | ||
| 2399 | |||
| 2400 | .. raw:: latex | ||
| 2401 | |||
| 2402 | \footnotesize | ||
| 2403 | |||
| 2404 | .. tabularcolumns:: |p{6.0cm}|p{11.0cm}| | ||
| 2405 | |||
| 2406 | .. flat-table:: | ||
| 2407 | :header-rows: 0 | ||
| 2408 | :stub-columns: 0 | ||
| 2409 | |||
| 2410 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0`` | ||
| 2411 | - Generate start code pattern (Normal). | ||
| 2412 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1`` | ||
| 2413 | - Generate size of length field instead of start code pattern and length is 1. | ||
| 2414 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2`` | ||
| 2415 | - Generate size of length field instead of start code pattern and length is 2. | ||
| 2416 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4`` | ||
| 2417 | - Generate size of length field instead of start code pattern and length is 4. | ||
| 2418 | |||
| 2419 | .. raw:: latex | ||
| 2420 | |||
| 2421 | \normalsize | ||
| 2422 | |||
| 2423 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)`` | ||
| 2424 | Indicates bit rate for hierarchical coding layer 0 for HEVC encoder. | ||
| 2425 | |||
| 2426 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)`` | ||
| 2427 | Indicates bit rate for hierarchical coding layer 1 for HEVC encoder. | ||
| 2428 | |||
| 2429 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)`` | ||
| 2430 | Indicates bit rate for hierarchical coding layer 2 for HEVC encoder. | ||
| 2431 | |||
| 2432 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)`` | ||
| 2433 | Indicates bit rate for hierarchical coding layer 3 for HEVC encoder. | ||
| 2434 | |||
| 2435 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)`` | ||
| 2436 | Indicates bit rate for hierarchical coding layer 4 for HEVC encoder. | ||
| 2437 | |||
| 2438 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)`` | ||
| 2439 | Indicates bit rate for hierarchical coding layer 5 for HEVC encoder. | ||
| 2440 | |||
| 2441 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)`` | ||
| 2442 | Indicates bit rate for hierarchical coding layer 6 for HEVC encoder. | ||
| 2443 | |||
| 2444 | ``V4L2_CID_MPEG_VIDEO_REF_NUMBER_FOR_PFRAMES (integer)`` | ||
| 2445 | Selects number of P reference pictures required for HEVC encoder. | ||
| 2446 | P-Frame can use 1 or 2 frames for reference. | ||
| 2447 | |||
| 2448 | ``V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR (integer)`` | ||
| 2449 | Indicates whether to generate SPS and PPS at every IDR. Setting it to 0 | ||
| 2450 | disables generating SPS and PPS at every IDR. Setting it to one enables | ||
| 2451 | generating SPS and PPS at every IDR. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-detect.rst b/Documentation/media/uapi/v4l/ext-ctrls-detect.rst new file mode 100644 index 000000000000..8a45ce642829 --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-detect.rst | |||
| @@ -0,0 +1,71 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _detect-controls: | ||
| 11 | |||
| 12 | ************************ | ||
| 13 | Detect Control Reference | ||
| 14 | ************************ | ||
| 15 | |||
| 16 | The Detect class includes controls for common features of various motion | ||
| 17 | or object detection capable devices. | ||
| 18 | |||
| 19 | |||
| 20 | .. _detect-control-id: | ||
| 21 | |||
| 22 | Detect Control IDs | ||
| 23 | ================== | ||
| 24 | |||
| 25 | ``V4L2_CID_DETECT_CLASS (class)`` | ||
| 26 | The Detect class descriptor. Calling | ||
| 27 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 28 | return a description of this control class. | ||
| 29 | |||
| 30 | ``V4L2_CID_DETECT_MD_MODE (menu)`` | ||
| 31 | Sets the motion detection mode. | ||
| 32 | |||
| 33 | .. tabularcolumns:: |p{7.5cm}|p{10.0cm}| | ||
| 34 | |||
| 35 | .. flat-table:: | ||
| 36 | :header-rows: 0 | ||
| 37 | :stub-columns: 0 | ||
| 38 | |||
| 39 | * - ``V4L2_DETECT_MD_MODE_DISABLED`` | ||
| 40 | - Disable motion detection. | ||
| 41 | * - ``V4L2_DETECT_MD_MODE_GLOBAL`` | ||
| 42 | - Use a single motion detection threshold. | ||
| 43 | * - ``V4L2_DETECT_MD_MODE_THRESHOLD_GRID`` | ||
| 44 | - The image is divided into a grid, each cell with its own motion | ||
| 45 | detection threshold. These thresholds are set through the | ||
| 46 | ``V4L2_CID_DETECT_MD_THRESHOLD_GRID`` matrix control. | ||
| 47 | * - ``V4L2_DETECT_MD_MODE_REGION_GRID`` | ||
| 48 | - The image is divided into a grid, each cell with its own region | ||
| 49 | value that specifies which per-region motion detection thresholds | ||
| 50 | should be used. Each region has its own thresholds. How these | ||
| 51 | per-region thresholds are set up is driver-specific. The region | ||
| 52 | values for the grid are set through the | ||
| 53 | ``V4L2_CID_DETECT_MD_REGION_GRID`` matrix control. | ||
| 54 | |||
| 55 | |||
| 56 | |||
| 57 | ``V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD (integer)`` | ||
| 58 | Sets the global motion detection threshold to be used with the | ||
| 59 | ``V4L2_DETECT_MD_MODE_GLOBAL`` motion detection mode. | ||
| 60 | |||
| 61 | ``V4L2_CID_DETECT_MD_THRESHOLD_GRID (__u16 matrix)`` | ||
| 62 | Sets the motion detection thresholds for each cell in the grid. To | ||
| 63 | be used with the ``V4L2_DETECT_MD_MODE_THRESHOLD_GRID`` motion | ||
| 64 | detection mode. Matrix element (0, 0) represents the cell at the | ||
| 65 | top-left of the grid. | ||
| 66 | |||
| 67 | ``V4L2_CID_DETECT_MD_REGION_GRID (__u8 matrix)`` | ||
| 68 | Sets the motion detection region value for each cell in the grid. To | ||
| 69 | be used with the ``V4L2_DETECT_MD_MODE_REGION_GRID`` motion | ||
| 70 | detection mode. Matrix element (0, 0) represents the cell at the | ||
| 71 | top-left of the grid. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-dv.rst b/Documentation/media/uapi/v4l/ext-ctrls-dv.rst new file mode 100644 index 000000000000..57edf211875c --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-dv.rst | |||
| @@ -0,0 +1,166 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _dv-controls: | ||
| 11 | |||
| 12 | ******************************* | ||
| 13 | Digital Video Control Reference | ||
| 14 | ******************************* | ||
| 15 | |||
| 16 | The Digital Video control class is intended to control receivers and | ||
| 17 | transmitters for `VGA <http://en.wikipedia.org/wiki/Vga>`__, | ||
| 18 | `DVI <http://en.wikipedia.org/wiki/Digital_Visual_Interface>`__ | ||
| 19 | (Digital Visual Interface), HDMI (:ref:`hdmi`) and DisplayPort | ||
| 20 | (:ref:`dp`). These controls are generally expected to be private to | ||
| 21 | the receiver or transmitter subdevice that implements them, so they are | ||
| 22 | only exposed on the ``/dev/v4l-subdev*`` device node. | ||
| 23 | |||
| 24 | .. note:: | ||
| 25 | |||
| 26 | Note that these devices can have multiple input or output pads which are | ||
| 27 | hooked up to e.g. HDMI connectors. Even though the subdevice will | ||
| 28 | receive or transmit video from/to only one of those pads, the other pads | ||
| 29 | can still be active when it comes to EDID (Extended Display | ||
| 30 | Identification Data, :ref:`vesaedid`) and HDCP (High-bandwidth Digital | ||
| 31 | Content Protection System, :ref:`hdcp`) processing, allowing the | ||
| 32 | device to do the fairly slow EDID/HDCP handling in advance. This allows | ||
| 33 | for quick switching between connectors. | ||
| 34 | |||
| 35 | These pads appear in several of the controls in this section as | ||
| 36 | bitmasks, one bit for each pad. Bit 0 corresponds to pad 0, bit 1 to pad | ||
| 37 | 1, etc. The maximum value of the control is the set of valid pads. | ||
| 38 | |||
| 39 | |||
| 40 | .. _dv-control-id: | ||
| 41 | |||
| 42 | Digital Video Control IDs | ||
| 43 | ========================= | ||
| 44 | |||
| 45 | ``V4L2_CID_DV_CLASS (class)`` | ||
| 46 | The Digital Video class descriptor. | ||
| 47 | |||
| 48 | ``V4L2_CID_DV_TX_HOTPLUG (bitmask)`` | ||
| 49 | Many connectors have a hotplug pin which is high if EDID information | ||
| 50 | is available from the source. This control shows the state of the | ||
| 51 | hotplug pin as seen by the transmitter. Each bit corresponds to an | ||
| 52 | output pad on the transmitter. If an output pad does not have an | ||
| 53 | associated hotplug pin, then the bit for that pad will be 0. This | ||
| 54 | read-only control is applicable to DVI-D, HDMI and DisplayPort | ||
| 55 | connectors. | ||
| 56 | |||
| 57 | ``V4L2_CID_DV_TX_RXSENSE (bitmask)`` | ||
| 58 | Rx Sense is the detection of pull-ups on the TMDS clock lines. This | ||
| 59 | normally means that the sink has left/entered standby (i.e. the | ||
| 60 | transmitter can sense that the receiver is ready to receive video). | ||
| 61 | Each bit corresponds to an output pad on the transmitter. If an | ||
| 62 | output pad does not have an associated Rx Sense, then the bit for | ||
| 63 | that pad will be 0. This read-only control is applicable to DVI-D | ||
| 64 | and HDMI devices. | ||
| 65 | |||
| 66 | ``V4L2_CID_DV_TX_EDID_PRESENT (bitmask)`` | ||
| 67 | When the transmitter sees the hotplug signal from the receiver it | ||
| 68 | will attempt to read the EDID. If set, then the transmitter has read | ||
| 69 | at least the first block (= 128 bytes). Each bit corresponds to an | ||
| 70 | output pad on the transmitter. If an output pad does not support | ||
| 71 | EDIDs, then the bit for that pad will be 0. This read-only control | ||
| 72 | is applicable to VGA, DVI-A/D, HDMI and DisplayPort connectors. | ||
| 73 | |||
| 74 | ``V4L2_CID_DV_TX_MODE`` | ||
| 75 | (enum) | ||
| 76 | |||
| 77 | enum v4l2_dv_tx_mode - | ||
| 78 | HDMI transmitters can transmit in DVI-D mode (just video) or in HDMI | ||
| 79 | mode (video + audio + auxiliary data). This control selects which | ||
| 80 | mode to use: V4L2_DV_TX_MODE_DVI_D or V4L2_DV_TX_MODE_HDMI. | ||
| 81 | This control is applicable to HDMI connectors. | ||
| 82 | |||
| 83 | ``V4L2_CID_DV_TX_RGB_RANGE`` | ||
| 84 | (enum) | ||
| 85 | |||
| 86 | enum v4l2_dv_rgb_range - | ||
| 87 | Select the quantization range for RGB output. V4L2_DV_RANGE_AUTO | ||
| 88 | follows the RGB quantization range specified in the standard for the | ||
| 89 | video interface (ie. :ref:`cea861` for HDMI). | ||
| 90 | V4L2_DV_RANGE_LIMITED and V4L2_DV_RANGE_FULL override the | ||
| 91 | standard to be compatible with sinks that have not implemented the | ||
| 92 | standard correctly (unfortunately quite common for HDMI and DVI-D). | ||
| 93 | Full range allows all possible values to be used whereas limited | ||
| 94 | range sets the range to (16 << (N-8)) - (235 << (N-8)) where N is | ||
| 95 | the number of bits per component. This control is applicable to VGA, | ||
| 96 | DVI-A/D, HDMI and DisplayPort connectors. | ||
| 97 | |||
| 98 | ``V4L2_CID_DV_TX_IT_CONTENT_TYPE`` | ||
| 99 | (enum) | ||
| 100 | |||
| 101 | enum v4l2_dv_it_content_type - | ||
| 102 | Configures the IT Content Type of the transmitted video. This | ||
| 103 | information is sent over HDMI and DisplayPort connectors as part of | ||
| 104 | the AVI InfoFrame. The term 'IT Content' is used for content that | ||
| 105 | originates from a computer as opposed to content from a TV broadcast | ||
| 106 | or an analog source. The enum v4l2_dv_it_content_type defines | ||
| 107 | the possible content types: | ||
| 108 | |||
| 109 | .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| | ||
| 110 | |||
| 111 | .. flat-table:: | ||
| 112 | :header-rows: 0 | ||
| 113 | :stub-columns: 0 | ||
| 114 | |||
| 115 | * - ``V4L2_DV_IT_CONTENT_TYPE_GRAPHICS`` | ||
| 116 | - Graphics content. Pixel data should be passed unfiltered and | ||
| 117 | without analog reconstruction. | ||
| 118 | * - ``V4L2_DV_IT_CONTENT_TYPE_PHOTO`` | ||
| 119 | - Photo content. The content is derived from digital still pictures. | ||
| 120 | The content should be passed through with minimal scaling and | ||
| 121 | picture enhancements. | ||
| 122 | * - ``V4L2_DV_IT_CONTENT_TYPE_CINEMA`` | ||
| 123 | - Cinema content. | ||
| 124 | * - ``V4L2_DV_IT_CONTENT_TYPE_GAME`` | ||
| 125 | - Game content. Audio and video latency should be minimized. | ||
| 126 | * - ``V4L2_DV_IT_CONTENT_TYPE_NO_ITC`` | ||
| 127 | - No IT Content information is available and the ITC bit in the AVI | ||
| 128 | InfoFrame is set to 0. | ||
| 129 | |||
| 130 | |||
| 131 | |||
| 132 | ``V4L2_CID_DV_RX_POWER_PRESENT (bitmask)`` | ||
| 133 | Detects whether the receiver receives power from the source (e.g. | ||
| 134 | HDMI carries 5V on one of the pins). This is often used to power an | ||
| 135 | eeprom which contains EDID information, such that the source can | ||
| 136 | read the EDID even if the sink is in standby/power off. Each bit | ||
| 137 | corresponds to an input pad on the receiver. If an input pad | ||
| 138 | cannot detect whether power is present, then the bit for that pad | ||
| 139 | will be 0. This read-only control is applicable to DVI-D, HDMI and | ||
| 140 | DisplayPort connectors. | ||
| 141 | |||
| 142 | ``V4L2_CID_DV_RX_RGB_RANGE`` | ||
| 143 | (enum) | ||
| 144 | |||
| 145 | enum v4l2_dv_rgb_range - | ||
| 146 | Select the quantization range for RGB input. V4L2_DV_RANGE_AUTO | ||
| 147 | follows the RGB quantization range specified in the standard for the | ||
| 148 | video interface (ie. :ref:`cea861` for HDMI). | ||
| 149 | V4L2_DV_RANGE_LIMITED and V4L2_DV_RANGE_FULL override the | ||
| 150 | standard to be compatible with sources that have not implemented the | ||
| 151 | standard correctly (unfortunately quite common for HDMI and DVI-D). | ||
| 152 | Full range allows all possible values to be used whereas limited | ||
| 153 | range sets the range to (16 << (N-8)) - (235 << (N-8)) where N is | ||
| 154 | the number of bits per component. This control is applicable to VGA, | ||
| 155 | DVI-A/D, HDMI and DisplayPort connectors. | ||
| 156 | |||
| 157 | ``V4L2_CID_DV_RX_IT_CONTENT_TYPE`` | ||
| 158 | (enum) | ||
| 159 | |||
| 160 | enum v4l2_dv_it_content_type - | ||
| 161 | Reads the IT Content Type of the received video. This information is | ||
| 162 | sent over HDMI and DisplayPort connectors as part of the AVI | ||
| 163 | InfoFrame. The term 'IT Content' is used for content that originates | ||
| 164 | from a computer as opposed to content from a TV broadcast or an | ||
| 165 | analog source. See ``V4L2_CID_DV_TX_IT_CONTENT_TYPE`` for the | ||
| 166 | available content types. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-flash.rst b/Documentation/media/uapi/v4l/ext-ctrls-flash.rst new file mode 100644 index 000000000000..5f30791c35b5 --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-flash.rst | |||
| @@ -0,0 +1,192 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _flash-controls: | ||
| 11 | |||
| 12 | *********************** | ||
| 13 | Flash Control Reference | ||
| 14 | *********************** | ||
| 15 | |||
| 16 | The V4L2 flash controls are intended to provide generic access to flash | ||
| 17 | controller devices. Flash controller devices are typically used in | ||
| 18 | digital cameras. | ||
| 19 | |||
| 20 | The interface can support both LED and xenon flash devices. As of | ||
| 21 | writing this, there is no xenon flash driver using this interface. | ||
| 22 | |||
| 23 | |||
| 24 | .. _flash-controls-use-cases: | ||
| 25 | |||
| 26 | Supported use cases | ||
| 27 | =================== | ||
| 28 | |||
| 29 | |||
| 30 | Unsynchronised LED flash (software strobe) | ||
| 31 | ------------------------------------------ | ||
| 32 | |||
| 33 | Unsynchronised LED flash is controlled directly by the host as the | ||
| 34 | sensor. The flash must be enabled by the host before the exposure of the | ||
| 35 | image starts and disabled once it ends. The host is fully responsible | ||
| 36 | for the timing of the flash. | ||
| 37 | |||
| 38 | Example of such device: Nokia N900. | ||
| 39 | |||
| 40 | |||
| 41 | Synchronised LED flash (hardware strobe) | ||
| 42 | ---------------------------------------- | ||
| 43 | |||
| 44 | The synchronised LED flash is pre-programmed by the host (power and | ||
| 45 | timeout) but controlled by the sensor through a strobe signal from the | ||
| 46 | sensor to the flash. | ||
| 47 | |||
| 48 | The sensor controls the flash duration and timing. This information | ||
| 49 | typically must be made available to the sensor. | ||
| 50 | |||
| 51 | |||
| 52 | LED flash as torch | ||
| 53 | ------------------ | ||
| 54 | |||
| 55 | LED flash may be used as torch in conjunction with another use case | ||
| 56 | involving camera or individually. | ||
| 57 | |||
| 58 | |||
| 59 | .. _flash-control-id: | ||
| 60 | |||
| 61 | Flash Control IDs | ||
| 62 | ----------------- | ||
| 63 | |||
| 64 | ``V4L2_CID_FLASH_CLASS (class)`` | ||
| 65 | The FLASH class descriptor. | ||
| 66 | |||
| 67 | ``V4L2_CID_FLASH_LED_MODE (menu)`` | ||
| 68 | Defines the mode of the flash LED, the high-power white LED attached | ||
| 69 | to the flash controller. Setting this control may not be possible in | ||
| 70 | presence of some faults. See V4L2_CID_FLASH_FAULT. | ||
| 71 | |||
| 72 | |||
| 73 | |||
| 74 | .. flat-table:: | ||
| 75 | :header-rows: 0 | ||
| 76 | :stub-columns: 0 | ||
| 77 | |||
| 78 | * - ``V4L2_FLASH_LED_MODE_NONE`` | ||
| 79 | - Off. | ||
| 80 | * - ``V4L2_FLASH_LED_MODE_FLASH`` | ||
| 81 | - Flash mode. | ||
| 82 | * - ``V4L2_FLASH_LED_MODE_TORCH`` | ||
| 83 | - Torch mode. See V4L2_CID_FLASH_TORCH_INTENSITY. | ||
| 84 | |||
| 85 | |||
| 86 | |||
| 87 | ``V4L2_CID_FLASH_STROBE_SOURCE (menu)`` | ||
| 88 | Defines the source of the flash LED strobe. | ||
| 89 | |||
| 90 | .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| | ||
| 91 | |||
| 92 | .. flat-table:: | ||
| 93 | :header-rows: 0 | ||
| 94 | :stub-columns: 0 | ||
| 95 | |||
| 96 | * - ``V4L2_FLASH_STROBE_SOURCE_SOFTWARE`` | ||
| 97 | - The flash strobe is triggered by using the | ||
| 98 | V4L2_CID_FLASH_STROBE control. | ||
| 99 | * - ``V4L2_FLASH_STROBE_SOURCE_EXTERNAL`` | ||
| 100 | - The flash strobe is triggered by an external source. Typically | ||
| 101 | this is a sensor, which makes it possible to synchronises the | ||
| 102 | flash strobe start to exposure start. | ||
| 103 | |||
| 104 | |||
| 105 | |||
| 106 | ``V4L2_CID_FLASH_STROBE (button)`` | ||
| 107 | Strobe flash. Valid when V4L2_CID_FLASH_LED_MODE is set to | ||
| 108 | V4L2_FLASH_LED_MODE_FLASH and V4L2_CID_FLASH_STROBE_SOURCE | ||
| 109 | is set to V4L2_FLASH_STROBE_SOURCE_SOFTWARE. Setting this | ||
| 110 | control may not be possible in presence of some faults. See | ||
| 111 | V4L2_CID_FLASH_FAULT. | ||
| 112 | |||
| 113 | ``V4L2_CID_FLASH_STROBE_STOP (button)`` | ||
| 114 | Stop flash strobe immediately. | ||
| 115 | |||
| 116 | ``V4L2_CID_FLASH_STROBE_STATUS (boolean)`` | ||
| 117 | Strobe status: whether the flash is strobing at the moment or not. | ||
| 118 | This is a read-only control. | ||
| 119 | |||
| 120 | ``V4L2_CID_FLASH_TIMEOUT (integer)`` | ||
| 121 | Hardware timeout for flash. The flash strobe is stopped after this | ||
| 122 | period of time has passed from the start of the strobe. | ||
| 123 | |||
| 124 | ``V4L2_CID_FLASH_INTENSITY (integer)`` | ||
| 125 | Intensity of the flash strobe when the flash LED is in flash mode | ||
| 126 | (V4L2_FLASH_LED_MODE_FLASH). The unit should be milliamps (mA) | ||
| 127 | if possible. | ||
| 128 | |||
| 129 | ``V4L2_CID_FLASH_TORCH_INTENSITY (integer)`` | ||
| 130 | Intensity of the flash LED in torch mode | ||
| 131 | (V4L2_FLASH_LED_MODE_TORCH). The unit should be milliamps (mA) | ||
| 132 | if possible. Setting this control may not be possible in presence of | ||
| 133 | some faults. See V4L2_CID_FLASH_FAULT. | ||
| 134 | |||
| 135 | ``V4L2_CID_FLASH_INDICATOR_INTENSITY (integer)`` | ||
| 136 | Intensity of the indicator LED. The indicator LED may be fully | ||
| 137 | independent of the flash LED. The unit should be microamps (uA) if | ||
| 138 | possible. | ||
| 139 | |||
| 140 | ``V4L2_CID_FLASH_FAULT (bitmask)`` | ||
| 141 | Faults related to the flash. The faults tell about specific problems | ||
| 142 | in the flash chip itself or the LEDs attached to it. Faults may | ||
| 143 | prevent further use of some of the flash controls. In particular, | ||
| 144 | V4L2_CID_FLASH_LED_MODE is set to V4L2_FLASH_LED_MODE_NONE | ||
| 145 | if the fault affects the flash LED. Exactly which faults have such | ||
| 146 | an effect is chip dependent. Reading the faults resets the control | ||
| 147 | and returns the chip to a usable state if possible. | ||
| 148 | |||
| 149 | .. tabularcolumns:: |p{8.0cm}|p{9.5cm}| | ||
| 150 | |||
| 151 | .. flat-table:: | ||
| 152 | :header-rows: 0 | ||
| 153 | :stub-columns: 0 | ||
| 154 | |||
| 155 | * - ``V4L2_FLASH_FAULT_OVER_VOLTAGE`` | ||
| 156 | - Flash controller voltage to the flash LED has exceeded the limit | ||
| 157 | specific to the flash controller. | ||
| 158 | * - ``V4L2_FLASH_FAULT_TIMEOUT`` | ||
| 159 | - The flash strobe was still on when the timeout set by the user --- | ||
| 160 | V4L2_CID_FLASH_TIMEOUT control --- has expired. Not all flash | ||
| 161 | controllers may set this in all such conditions. | ||
| 162 | * - ``V4L2_FLASH_FAULT_OVER_TEMPERATURE`` | ||
| 163 | - The flash controller has overheated. | ||
| 164 | * - ``V4L2_FLASH_FAULT_SHORT_CIRCUIT`` | ||
| 165 | - The short circuit protection of the flash controller has been | ||
| 166 | triggered. | ||
| 167 | * - ``V4L2_FLASH_FAULT_OVER_CURRENT`` | ||
| 168 | - Current in the LED power supply has exceeded the limit specific to | ||
| 169 | the flash controller. | ||
| 170 | * - ``V4L2_FLASH_FAULT_INDICATOR`` | ||
| 171 | - The flash controller has detected a short or open circuit | ||
| 172 | condition on the indicator LED. | ||
| 173 | * - ``V4L2_FLASH_FAULT_UNDER_VOLTAGE`` | ||
| 174 | - Flash controller voltage to the flash LED has been below the | ||
| 175 | minimum limit specific to the flash controller. | ||
| 176 | * - ``V4L2_FLASH_FAULT_INPUT_VOLTAGE`` | ||
| 177 | - The input voltage of the flash controller is below the limit under | ||
| 178 | which strobing the flash at full current will not be possible.The | ||
| 179 | condition persists until this flag is no longer set. | ||
| 180 | * - ``V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE`` | ||
| 181 | - The temperature of the LED has exceeded its allowed upper limit. | ||
| 182 | |||
| 183 | |||
| 184 | |||
| 185 | ``V4L2_CID_FLASH_CHARGE (boolean)`` | ||
| 186 | Enable or disable charging of the xenon flash capacitor. | ||
| 187 | |||
| 188 | ``V4L2_CID_FLASH_READY (boolean)`` | ||
| 189 | Is the flash ready to strobe? Xenon flashes require their capacitors | ||
| 190 | charged before strobing. LED flashes often require a cooldown period | ||
| 191 | after strobe during which another strobe will not be possible. This | ||
| 192 | is a read-only control. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-fm-rx.rst b/Documentation/media/uapi/v4l/ext-ctrls-fm-rx.rst new file mode 100644 index 000000000000..3ed6dd7f586d --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-fm-rx.rst | |||
| @@ -0,0 +1,95 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _fm-rx-controls: | ||
| 11 | |||
| 12 | ***************************** | ||
| 13 | FM Receiver Control Reference | ||
| 14 | ***************************** | ||
| 15 | |||
| 16 | The FM Receiver (FM_RX) class includes controls for common features of | ||
| 17 | FM Reception capable devices. | ||
| 18 | |||
| 19 | |||
| 20 | .. _fm-rx-control-id: | ||
| 21 | |||
| 22 | FM_RX Control IDs | ||
| 23 | ================= | ||
| 24 | |||
| 25 | ``V4L2_CID_FM_RX_CLASS (class)`` | ||
| 26 | The FM_RX class descriptor. Calling | ||
| 27 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 28 | return a description of this control class. | ||
| 29 | |||
| 30 | ``V4L2_CID_RDS_RECEPTION (boolean)`` | ||
| 31 | Enables/disables RDS reception by the radio tuner | ||
| 32 | |||
| 33 | ``V4L2_CID_RDS_RX_PTY (integer)`` | ||
| 34 | Gets RDS Programme Type field. This encodes up to 31 pre-defined | ||
| 35 | programme types. | ||
| 36 | |||
| 37 | ``V4L2_CID_RDS_RX_PS_NAME (string)`` | ||
| 38 | Gets the Programme Service name (PS_NAME). It is intended for | ||
| 39 | static display on a receiver. It is the primary aid to listeners in | ||
| 40 | programme service identification and selection. In Annex E of | ||
| 41 | :ref:`iec62106`, the RDS specification, there is a full | ||
| 42 | description of the correct character encoding for Programme Service | ||
| 43 | name strings. Also from RDS specification, PS is usually a single | ||
| 44 | eight character text. However, it is also possible to find receivers | ||
| 45 | which can scroll strings sized as 8 x N characters. So, this control | ||
| 46 | must be configured with steps of 8 characters. The result is it must | ||
| 47 | always contain a string with size multiple of 8. | ||
| 48 | |||
| 49 | ``V4L2_CID_RDS_RX_RADIO_TEXT (string)`` | ||
| 50 | Gets the Radio Text info. It is a textual description of what is | ||
| 51 | being broadcasted. RDS Radio Text can be applied when broadcaster | ||
| 52 | wishes to transmit longer PS names, programme-related information or | ||
| 53 | any other text. In these cases, RadioText can be used in addition to | ||
| 54 | ``V4L2_CID_RDS_RX_PS_NAME``. The encoding for Radio Text strings is | ||
| 55 | also fully described in Annex E of :ref:`iec62106`. The length of | ||
| 56 | Radio Text strings depends on which RDS Block is being used to | ||
| 57 | transmit it, either 32 (2A block) or 64 (2B block). However, it is | ||
| 58 | also possible to find receivers which can scroll strings sized as 32 | ||
| 59 | x N or 64 x N characters. So, this control must be configured with | ||
| 60 | steps of 32 or 64 characters. The result is it must always contain a | ||
| 61 | string with size multiple of 32 or 64. | ||
| 62 | |||
| 63 | ``V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT (boolean)`` | ||
| 64 | If set, then a traffic announcement is in progress. | ||
| 65 | |||
| 66 | ``V4L2_CID_RDS_RX_TRAFFIC_PROGRAM (boolean)`` | ||
| 67 | If set, then the tuned programme carries traffic announcements. | ||
| 68 | |||
| 69 | ``V4L2_CID_RDS_RX_MUSIC_SPEECH (boolean)`` | ||
| 70 | If set, then this channel broadcasts music. If cleared, then it | ||
| 71 | broadcasts speech. If the transmitter doesn't make this distinction, | ||
| 72 | then it will be set. | ||
| 73 | |||
| 74 | ``V4L2_CID_TUNE_DEEMPHASIS`` | ||
| 75 | (enum) | ||
| 76 | |||
| 77 | enum v4l2_deemphasis - | ||
| 78 | Configures the de-emphasis value for reception. A de-emphasis filter | ||
| 79 | is applied to the broadcast to accentuate the high audio | ||
| 80 | frequencies. Depending on the region, a time constant of either 50 | ||
| 81 | or 75 useconds is used. The enum v4l2_deemphasis defines possible | ||
| 82 | values for de-emphasis. Here they are: | ||
| 83 | |||
| 84 | |||
| 85 | |||
| 86 | .. flat-table:: | ||
| 87 | :header-rows: 0 | ||
| 88 | :stub-columns: 0 | ||
| 89 | |||
| 90 | * - ``V4L2_DEEMPHASIS_DISABLED`` | ||
| 91 | - No de-emphasis is applied. | ||
| 92 | * - ``V4L2_DEEMPHASIS_50_uS`` | ||
| 93 | - A de-emphasis of 50 uS is used. | ||
| 94 | * - ``V4L2_DEEMPHASIS_75_uS`` | ||
| 95 | - A de-emphasis of 75 uS is used. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-fm-tx.rst b/Documentation/media/uapi/v4l/ext-ctrls-fm-tx.rst new file mode 100644 index 000000000000..db88346d99fd --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-fm-tx.rst | |||
| @@ -0,0 +1,188 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _fm-tx-controls: | ||
| 11 | |||
| 12 | ******************************** | ||
| 13 | FM Transmitter Control Reference | ||
| 14 | ******************************** | ||
| 15 | |||
| 16 | The FM Transmitter (FM_TX) class includes controls for common features | ||
| 17 | of FM transmissions capable devices. Currently this class includes | ||
| 18 | parameters for audio compression, pilot tone generation, audio deviation | ||
| 19 | limiter, RDS transmission and tuning power features. | ||
| 20 | |||
| 21 | |||
| 22 | .. _fm-tx-control-id: | ||
| 23 | |||
| 24 | FM_TX Control IDs | ||
| 25 | ================= | ||
| 26 | |||
| 27 | ``V4L2_CID_FM_TX_CLASS (class)`` | ||
| 28 | The FM_TX class descriptor. Calling | ||
| 29 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 30 | return a description of this control class. | ||
| 31 | |||
| 32 | ``V4L2_CID_RDS_TX_DEVIATION (integer)`` | ||
| 33 | Configures RDS signal frequency deviation level in Hz. The range and | ||
| 34 | step are driver-specific. | ||
| 35 | |||
| 36 | ``V4L2_CID_RDS_TX_PI (integer)`` | ||
| 37 | Sets the RDS Programme Identification field for transmission. | ||
| 38 | |||
| 39 | ``V4L2_CID_RDS_TX_PTY (integer)`` | ||
| 40 | Sets the RDS Programme Type field for transmission. This encodes up | ||
| 41 | to 31 pre-defined programme types. | ||
| 42 | |||
| 43 | ``V4L2_CID_RDS_TX_PS_NAME (string)`` | ||
| 44 | Sets the Programme Service name (PS_NAME) for transmission. It is | ||
| 45 | intended for static display on a receiver. It is the primary aid to | ||
| 46 | listeners in programme service identification and selection. In | ||
| 47 | Annex E of :ref:`iec62106`, the RDS specification, there is a full | ||
| 48 | description of the correct character encoding for Programme Service | ||
| 49 | name strings. Also from RDS specification, PS is usually a single | ||
| 50 | eight character text. However, it is also possible to find receivers | ||
| 51 | which can scroll strings sized as 8 x N characters. So, this control | ||
| 52 | must be configured with steps of 8 characters. The result is it must | ||
| 53 | always contain a string with size multiple of 8. | ||
| 54 | |||
| 55 | ``V4L2_CID_RDS_TX_RADIO_TEXT (string)`` | ||
| 56 | Sets the Radio Text info for transmission. It is a textual | ||
| 57 | description of what is being broadcasted. RDS Radio Text can be | ||
| 58 | applied when broadcaster wishes to transmit longer PS names, | ||
| 59 | programme-related information or any other text. In these cases, | ||
| 60 | RadioText should be used in addition to ``V4L2_CID_RDS_TX_PS_NAME``. | ||
| 61 | The encoding for Radio Text strings is also fully described in Annex | ||
| 62 | E of :ref:`iec62106`. The length of Radio Text strings depends on | ||
| 63 | which RDS Block is being used to transmit it, either 32 (2A block) | ||
| 64 | or 64 (2B block). However, it is also possible to find receivers | ||
| 65 | which can scroll strings sized as 32 x N or 64 x N characters. So, | ||
| 66 | this control must be configured with steps of 32 or 64 characters. | ||
| 67 | The result is it must always contain a string with size multiple of | ||
| 68 | 32 or 64. | ||
| 69 | |||
| 70 | ``V4L2_CID_RDS_TX_MONO_STEREO (boolean)`` | ||
| 71 | Sets the Mono/Stereo bit of the Decoder Identification code. If set, | ||
| 72 | then the audio was recorded as stereo. | ||
| 73 | |||
| 74 | ``V4L2_CID_RDS_TX_ARTIFICIAL_HEAD (boolean)`` | ||
| 75 | Sets the | ||
| 76 | `Artificial Head <http://en.wikipedia.org/wiki/Artificial_head>`__ | ||
| 77 | bit of the Decoder Identification code. If set, then the audio was | ||
| 78 | recorded using an artificial head. | ||
| 79 | |||
| 80 | ``V4L2_CID_RDS_TX_COMPRESSED (boolean)`` | ||
| 81 | Sets the Compressed bit of the Decoder Identification code. If set, | ||
| 82 | then the audio is compressed. | ||
| 83 | |||
| 84 | ``V4L2_CID_RDS_TX_DYNAMIC_PTY (boolean)`` | ||
| 85 | Sets the Dynamic PTY bit of the Decoder Identification code. If set, | ||
| 86 | then the PTY code is dynamically switched. | ||
| 87 | |||
| 88 | ``V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT (boolean)`` | ||
| 89 | If set, then a traffic announcement is in progress. | ||
| 90 | |||
| 91 | ``V4L2_CID_RDS_TX_TRAFFIC_PROGRAM (boolean)`` | ||
| 92 | If set, then the tuned programme carries traffic announcements. | ||
| 93 | |||
| 94 | ``V4L2_CID_RDS_TX_MUSIC_SPEECH (boolean)`` | ||
| 95 | If set, then this channel broadcasts music. If cleared, then it | ||
| 96 | broadcasts speech. If the transmitter doesn't make this distinction, | ||
| 97 | then it should be set. | ||
| 98 | |||
| 99 | ``V4L2_CID_RDS_TX_ALT_FREQS_ENABLE (boolean)`` | ||
| 100 | If set, then transmit alternate frequencies. | ||
| 101 | |||
| 102 | ``V4L2_CID_RDS_TX_ALT_FREQS (__u32 array)`` | ||
| 103 | The alternate frequencies in kHz units. The RDS standard allows for | ||
| 104 | up to 25 frequencies to be defined. Drivers may support fewer | ||
| 105 | frequencies so check the array size. | ||
| 106 | |||
| 107 | ``V4L2_CID_AUDIO_LIMITER_ENABLED (boolean)`` | ||
| 108 | Enables or disables the audio deviation limiter feature. The limiter | ||
| 109 | is useful when trying to maximize the audio volume, minimize | ||
| 110 | receiver-generated distortion and prevent overmodulation. | ||
| 111 | |||
| 112 | ``V4L2_CID_AUDIO_LIMITER_RELEASE_TIME (integer)`` | ||
| 113 | Sets the audio deviation limiter feature release time. Unit is in | ||
| 114 | useconds. Step and range are driver-specific. | ||
| 115 | |||
| 116 | ``V4L2_CID_AUDIO_LIMITER_DEVIATION (integer)`` | ||
| 117 | Configures audio frequency deviation level in Hz. The range and step | ||
| 118 | are driver-specific. | ||
| 119 | |||
| 120 | ``V4L2_CID_AUDIO_COMPRESSION_ENABLED (boolean)`` | ||
| 121 | Enables or disables the audio compression feature. This feature | ||
| 122 | amplifies signals below the threshold by a fixed gain and compresses | ||
| 123 | audio signals above the threshold by the ratio of Threshold/(Gain + | ||
| 124 | Threshold). | ||
| 125 | |||
| 126 | ``V4L2_CID_AUDIO_COMPRESSION_GAIN (integer)`` | ||
| 127 | Sets the gain for audio compression feature. It is a dB value. The | ||
| 128 | range and step are driver-specific. | ||
| 129 | |||
| 130 | ``V4L2_CID_AUDIO_COMPRESSION_THRESHOLD (integer)`` | ||
| 131 | Sets the threshold level for audio compression freature. It is a dB | ||
| 132 | value. The range and step are driver-specific. | ||
| 133 | |||
| 134 | ``V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME (integer)`` | ||
| 135 | Sets the attack time for audio compression feature. It is a useconds | ||
| 136 | value. The range and step are driver-specific. | ||
| 137 | |||
| 138 | ``V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME (integer)`` | ||
| 139 | Sets the release time for audio compression feature. It is a | ||
| 140 | useconds value. The range and step are driver-specific. | ||
| 141 | |||
| 142 | ``V4L2_CID_PILOT_TONE_ENABLED (boolean)`` | ||
| 143 | Enables or disables the pilot tone generation feature. | ||
| 144 | |||
| 145 | ``V4L2_CID_PILOT_TONE_DEVIATION (integer)`` | ||
| 146 | Configures pilot tone frequency deviation level. Unit is in Hz. The | ||
| 147 | range and step are driver-specific. | ||
| 148 | |||
| 149 | ``V4L2_CID_PILOT_TONE_FREQUENCY (integer)`` | ||
| 150 | Configures pilot tone frequency value. Unit is in Hz. The range and | ||
| 151 | step are driver-specific. | ||
| 152 | |||
| 153 | ``V4L2_CID_TUNE_PREEMPHASIS`` | ||
| 154 | (enum) | ||
| 155 | |||
| 156 | enum v4l2_preemphasis - | ||
| 157 | Configures the pre-emphasis value for broadcasting. A pre-emphasis | ||
| 158 | filter is applied to the broadcast to accentuate the high audio | ||
| 159 | frequencies. Depending on the region, a time constant of either 50 | ||
| 160 | or 75 useconds is used. The enum v4l2_preemphasis defines possible | ||
| 161 | values for pre-emphasis. Here they are: | ||
| 162 | |||
| 163 | |||
| 164 | |||
| 165 | .. flat-table:: | ||
| 166 | :header-rows: 0 | ||
| 167 | :stub-columns: 0 | ||
| 168 | |||
| 169 | * - ``V4L2_PREEMPHASIS_DISABLED`` | ||
| 170 | - No pre-emphasis is applied. | ||
| 171 | * - ``V4L2_PREEMPHASIS_50_uS`` | ||
| 172 | - A pre-emphasis of 50 uS is used. | ||
| 173 | * - ``V4L2_PREEMPHASIS_75_uS`` | ||
| 174 | - A pre-emphasis of 75 uS is used. | ||
| 175 | |||
| 176 | |||
| 177 | |||
| 178 | ``V4L2_CID_TUNE_POWER_LEVEL (integer)`` | ||
| 179 | Sets the output power level for signal transmission. Unit is in | ||
| 180 | dBuV. Range and step are driver-specific. | ||
| 181 | |||
| 182 | ``V4L2_CID_TUNE_ANTENNA_CAPACITOR (integer)`` | ||
| 183 | This selects the value of antenna tuning capacitor manually or | ||
| 184 | automatically if set to zero. Unit, range and step are | ||
| 185 | driver-specific. | ||
| 186 | |||
| 187 | For more details about RDS specification, refer to :ref:`iec62106` | ||
| 188 | document, from CENELEC. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-image-process.rst b/Documentation/media/uapi/v4l/ext-ctrls-image-process.rst new file mode 100644 index 000000000000..22fc2d3e433d --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-image-process.rst | |||
| @@ -0,0 +1,63 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _image-process-controls: | ||
| 11 | |||
| 12 | ******************************* | ||
| 13 | Image Process Control Reference | ||
| 14 | ******************************* | ||
| 15 | |||
| 16 | The Image Process control class is intended for low-level control of | ||
| 17 | image processing functions. Unlike ``V4L2_CID_IMAGE_SOURCE_CLASS``, the | ||
| 18 | controls in this class affect processing the image, and do not control | ||
| 19 | capturing of it. | ||
| 20 | |||
| 21 | |||
| 22 | .. _image-process-control-id: | ||
| 23 | |||
| 24 | Image Process Control IDs | ||
| 25 | ========================= | ||
| 26 | |||
| 27 | ``V4L2_CID_IMAGE_PROC_CLASS (class)`` | ||
| 28 | The IMAGE_PROC class descriptor. | ||
| 29 | |||
| 30 | ``V4L2_CID_LINK_FREQ (integer menu)`` | ||
| 31 | Data bus frequency. Together with the media bus pixel code, bus type | ||
| 32 | (clock cycles per sample), the data bus frequency defines the pixel | ||
| 33 | rate (``V4L2_CID_PIXEL_RATE``) in the pixel array (or possibly | ||
| 34 | elsewhere, if the device is not an image sensor). The frame rate can | ||
| 35 | be calculated from the pixel clock, image width and height and | ||
| 36 | horizontal and vertical blanking. While the pixel rate control may | ||
| 37 | be defined elsewhere than in the subdev containing the pixel array, | ||
| 38 | the frame rate cannot be obtained from that information. This is | ||
| 39 | because only on the pixel array it can be assumed that the vertical | ||
| 40 | and horizontal blanking information is exact: no other blanking is | ||
| 41 | allowed in the pixel array. The selection of frame rate is performed | ||
| 42 | by selecting the desired horizontal and vertical blanking. The unit | ||
| 43 | of this control is Hz. | ||
| 44 | |||
| 45 | ``V4L2_CID_PIXEL_RATE (64-bit integer)`` | ||
| 46 | Pixel rate in the source pads of the subdev. This control is | ||
| 47 | read-only and its unit is pixels / second. | ||
| 48 | |||
| 49 | ``V4L2_CID_TEST_PATTERN (menu)`` | ||
| 50 | Some capture/display/sensor devices have the capability to generate | ||
| 51 | test pattern images. These hardware specific test patterns can be | ||
| 52 | used to test if a device is working properly. | ||
| 53 | |||
| 54 | ``V4L2_CID_DEINTERLACING_MODE (menu)`` | ||
| 55 | The video deinterlacing mode (such as Bob, Weave, ...). The menu items are | ||
| 56 | driver specific and are documented in :ref:`v4l-drivers`. | ||
| 57 | |||
| 58 | ``V4L2_CID_DIGITAL_GAIN (integer)`` | ||
| 59 | Digital gain is the value by which all colour components | ||
| 60 | are multiplied by. Typically the digital gain applied is the | ||
| 61 | control value divided by e.g. 0x100, meaning that to get no | ||
| 62 | digital gain the control value needs to be 0x100. The no-gain | ||
| 63 | configuration is also typically the default. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-image-source.rst b/Documentation/media/uapi/v4l/ext-ctrls-image-source.rst new file mode 100644 index 000000000000..2c3ab5796d76 --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-image-source.rst | |||
| @@ -0,0 +1,57 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _image-source-controls: | ||
| 11 | |||
| 12 | ****************************** | ||
| 13 | Image Source Control Reference | ||
| 14 | ****************************** | ||
| 15 | |||
| 16 | The Image Source control class is intended for low-level control of | ||
| 17 | image source devices such as image sensors. The devices feature an | ||
| 18 | analogue to digital converter and a bus transmitter to transmit the | ||
| 19 | image data out of the device. | ||
| 20 | |||
| 21 | |||
| 22 | .. _image-source-control-id: | ||
| 23 | |||
| 24 | Image Source Control IDs | ||
| 25 | ======================== | ||
| 26 | |||
| 27 | ``V4L2_CID_IMAGE_SOURCE_CLASS (class)`` | ||
| 28 | The IMAGE_SOURCE class descriptor. | ||
| 29 | |||
| 30 | ``V4L2_CID_VBLANK (integer)`` | ||
| 31 | Vertical blanking. The idle period after every frame during which no | ||
| 32 | image data is produced. The unit of vertical blanking is a line. | ||
| 33 | Every line has length of the image width plus horizontal blanking at | ||
| 34 | the pixel rate defined by ``V4L2_CID_PIXEL_RATE`` control in the | ||
| 35 | same sub-device. | ||
| 36 | |||
| 37 | ``V4L2_CID_HBLANK (integer)`` | ||
| 38 | Horizontal blanking. The idle period after every line of image data | ||
| 39 | during which no image data is produced. The unit of horizontal | ||
| 40 | blanking is pixels. | ||
| 41 | |||
| 42 | ``V4L2_CID_ANALOGUE_GAIN (integer)`` | ||
| 43 | Analogue gain is gain affecting all colour components in the pixel | ||
| 44 | matrix. The gain operation is performed in the analogue domain | ||
| 45 | before A/D conversion. | ||
| 46 | |||
| 47 | ``V4L2_CID_TEST_PATTERN_RED (integer)`` | ||
| 48 | Test pattern red colour component. | ||
| 49 | |||
| 50 | ``V4L2_CID_TEST_PATTERN_GREENR (integer)`` | ||
| 51 | Test pattern green (next to red) colour component. | ||
| 52 | |||
| 53 | ``V4L2_CID_TEST_PATTERN_BLUE (integer)`` | ||
| 54 | Test pattern blue colour component. | ||
| 55 | |||
| 56 | ``V4L2_CID_TEST_PATTERN_GREENB (integer)`` | ||
| 57 | Test pattern green (next to blue) colour component. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-jpeg.rst b/Documentation/media/uapi/v4l/ext-ctrls-jpeg.rst new file mode 100644 index 000000000000..cf9cd8a9f9b4 --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-jpeg.rst | |||
| @@ -0,0 +1,113 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _jpeg-controls: | ||
| 11 | |||
| 12 | ********************** | ||
| 13 | JPEG Control Reference | ||
| 14 | ********************** | ||
| 15 | |||
| 16 | The JPEG class includes controls for common features of JPEG encoders | ||
| 17 | and decoders. Currently it includes features for codecs implementing | ||
| 18 | progressive baseline DCT compression process with Huffman entrophy | ||
| 19 | coding. | ||
| 20 | |||
| 21 | |||
| 22 | .. _jpeg-control-id: | ||
| 23 | |||
| 24 | JPEG Control IDs | ||
| 25 | ================ | ||
| 26 | |||
| 27 | ``V4L2_CID_JPEG_CLASS (class)`` | ||
| 28 | The JPEG class descriptor. Calling | ||
| 29 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 30 | return a description of this control class. | ||
| 31 | |||
| 32 | ``V4L2_CID_JPEG_CHROMA_SUBSAMPLING (menu)`` | ||
| 33 | The chroma subsampling factors describe how each component of an | ||
| 34 | input image is sampled, in respect to maximum sample rate in each | ||
| 35 | spatial dimension. See :ref:`itu-t81`, clause A.1.1. for more | ||
| 36 | details. The ``V4L2_CID_JPEG_CHROMA_SUBSAMPLING`` control determines | ||
| 37 | how Cb and Cr components are downsampled after converting an input | ||
| 38 | image from RGB to Y'CbCr color space. | ||
| 39 | |||
| 40 | .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| | ||
| 41 | |||
| 42 | .. flat-table:: | ||
| 43 | :header-rows: 0 | ||
| 44 | :stub-columns: 0 | ||
| 45 | |||
| 46 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_444`` | ||
| 47 | - No chroma subsampling, each pixel has Y, Cr and Cb values. | ||
| 48 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_422`` | ||
| 49 | - Horizontally subsample Cr, Cb components by a factor of 2. | ||
| 50 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_420`` | ||
| 51 | - Subsample Cr, Cb components horizontally and vertically by 2. | ||
| 52 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_411`` | ||
| 53 | - Horizontally subsample Cr, Cb components by a factor of 4. | ||
| 54 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_410`` | ||
| 55 | - Subsample Cr, Cb components horizontally by 4 and vertically by 2. | ||
| 56 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY`` | ||
| 57 | - Use only luminance component. | ||
| 58 | |||
| 59 | |||
| 60 | |||
| 61 | ``V4L2_CID_JPEG_RESTART_INTERVAL (integer)`` | ||
| 62 | The restart interval determines an interval of inserting RSTm | ||
| 63 | markers (m = 0..7). The purpose of these markers is to additionally | ||
| 64 | reinitialize the encoder process, in order to process blocks of an | ||
| 65 | image independently. For the lossy compression processes the restart | ||
| 66 | interval unit is MCU (Minimum Coded Unit) and its value is contained | ||
| 67 | in DRI (Define Restart Interval) marker. If | ||
| 68 | ``V4L2_CID_JPEG_RESTART_INTERVAL`` control is set to 0, DRI and RSTm | ||
| 69 | markers will not be inserted. | ||
| 70 | |||
| 71 | .. _jpeg-quality-control: | ||
| 72 | |||
| 73 | ``V4L2_CID_JPEG_COMPRESSION_QUALITY (integer)`` | ||
| 74 | ``V4L2_CID_JPEG_COMPRESSION_QUALITY`` control determines trade-off | ||
| 75 | between image quality and size. It provides simpler method for | ||
| 76 | applications to control image quality, without a need for direct | ||
| 77 | reconfiguration of luminance and chrominance quantization tables. In | ||
| 78 | cases where a driver uses quantization tables configured directly by | ||
| 79 | an application, using interfaces defined elsewhere, | ||
| 80 | ``V4L2_CID_JPEG_COMPRESSION_QUALITY`` control should be set by | ||
| 81 | driver to 0. | ||
| 82 | |||
| 83 | The value range of this control is driver-specific. Only positive, | ||
| 84 | non-zero values are meaningful. The recommended range is 1 - 100, | ||
| 85 | where larger values correspond to better image quality. | ||
| 86 | |||
| 87 | .. _jpeg-active-marker-control: | ||
| 88 | |||
| 89 | ``V4L2_CID_JPEG_ACTIVE_MARKER (bitmask)`` | ||
| 90 | Specify which JPEG markers are included in compressed stream. This | ||
| 91 | control is valid only for encoders. | ||
| 92 | |||
| 93 | |||
| 94 | |||
| 95 | .. flat-table:: | ||
| 96 | :header-rows: 0 | ||
| 97 | :stub-columns: 0 | ||
| 98 | |||
| 99 | * - ``V4L2_JPEG_ACTIVE_MARKER_APP0`` | ||
| 100 | - Application data segment APP\ :sub:`0`. | ||
| 101 | * - ``V4L2_JPEG_ACTIVE_MARKER_APP1`` | ||
| 102 | - Application data segment APP\ :sub:`1`. | ||
| 103 | * - ``V4L2_JPEG_ACTIVE_MARKER_COM`` | ||
| 104 | - Comment segment. | ||
| 105 | * - ``V4L2_JPEG_ACTIVE_MARKER_DQT`` | ||
| 106 | - Quantization tables segment. | ||
| 107 | * - ``V4L2_JPEG_ACTIVE_MARKER_DHT`` | ||
| 108 | - Huffman tables segment. | ||
| 109 | |||
| 110 | |||
| 111 | |||
| 112 | For more details about JPEG specification, refer to :ref:`itu-t81`, | ||
| 113 | :ref:`jfif`, :ref:`w3c-jpeg-jfif`. | ||
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-rf-tuner.rst b/Documentation/media/uapi/v4l/ext-ctrls-rf-tuner.rst new file mode 100644 index 000000000000..0fb85ba878dd --- /dev/null +++ b/Documentation/media/uapi/v4l/ext-ctrls-rf-tuner.rst | |||
| @@ -0,0 +1,96 @@ | |||
| 1 | .. Permission is granted to copy, distribute and/or modify this | ||
| 2 | .. document under the terms of the GNU Free Documentation License, | ||
| 3 | .. Version 1.1 or any later version published by the Free Software | ||
| 4 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 5 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 6 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 7 | .. | ||
| 8 | .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections | ||
| 9 | |||
| 10 | .. _rf-tuner-controls: | ||
| 11 | |||
| 12 | ************************** | ||
| 13 | RF Tuner Control Reference | ||
| 14 | ************************** | ||
| 15 | |||
| 16 | The RF Tuner (RF_TUNER) class includes controls for common features of | ||
| 17 | devices having RF tuner. | ||
| 18 | |||
| 19 | In this context, RF tuner is radio receiver circuit between antenna and | ||
| 20 | demodulator. It receives radio frequency (RF) from the antenna and | ||
| 21 | converts that received signal to lower intermediate frequency (IF) or | ||
| 22 | baseband frequency (BB). Tuners that could do baseband output are often | ||
| 23 | called Zero-IF tuners. Older tuners were typically simple PLL tuners | ||
| 24 | inside a metal box, while newer ones are highly integrated chips | ||
| 25 | without a metal box "silicon tuners". These controls are mostly | ||
| 26 | applicable for new feature rich silicon tuners, just because older | ||
| 27 | tuners does not have much adjustable features. | ||
| 28 | |||
| 29 | For more information about RF tuners see | ||
| 30 | `Tuner (radio) <http://en.wikipedia.org/wiki/Tuner_%28radio%29>`__ | ||
| 31 | and `RF front end <http://en.wikipedia.org/wiki/RF_front_end>`__ | ||
| 32 | from Wikipedia. | ||
| 33 | |||
| 34 | |||
| 35 | .. _rf-tuner-control-id: | ||
| 36 | |||
| 37 | RF_TUNER Control IDs | ||
| 38 | ==================== | ||
| 39 | |||
| 40 | ``V4L2_CID_RF_TUNER_CLASS (class)`` | ||
| 41 | The RF_TUNER class descriptor. Calling | ||
| 42 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 43 | return a description of this control class. | ||
| 44 | |||
| 45 | ``V4L2_CID_RF_TUNER_BANDWIDTH_AUTO (boolean)`` | ||
| 46 | Enables/disables tuner radio channel bandwidth configuration. In | ||
| 47 | automatic mode bandwidth configuration is performed by the driver. | ||
| 48 | |||
| 49 | ``V4L2_CID_RF_TUNER_BANDWIDTH (integer)`` | ||
| 50 | Filter(s) on tuner signal path are used to filter signal according | ||
| 51 | to receiving party needs. Driver configures filters to fulfill | ||
| 52 | desired bandwidth requirement. Used when | ||
| 53 | V4L2_CID_RF_TUNER_BANDWIDTH_AUTO is not set. Unit is in Hz. The | ||
| 54 | range and step are driver-specific. | ||
| 55 | |||
| 56 | ``V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (boolean)`` | ||
| 57 | Enables/disables LNA automatic gain control (AGC) | ||
| 58 | |||
| 59 | ``V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (boolean)`` | ||
| 60 | Enables/disables mixer automatic gain control (AGC) | ||
| 61 | |||
| 62 | ``V4L2_CID_RF_TUNER_IF_GAIN_AUTO (boolean)`` | ||
| 63 | Enables/disables IF automatic gain control (AGC) | ||
| 64 | |||
| 65 | ``V4L2_CID_RF_TUNER_RF_GAIN (integer)`` | ||
| 66 | The RF amplifier is the very first amplifier on the receiver signal | ||
| 67 | path, just right after the antenna input. The difference between the | ||
| 68 | LNA gain and the RF gain in this document is that the LNA gain is | ||
| 69 | integrated in the tuner chip while the RF gain is a separate chip. | ||
| 70 | There may be both RF and LNA gain controls in the same device. The | ||
| 71 | range and step are driver-specific. | ||
| 72 | |||
| 73 | ``V4L2_CID_RF_TUNER_LNA_GAIN (integer)`` | ||
| 74 | LNA (low noise amplifier) gain is first gain stage on the RF tuner | ||
| 75 | signal path. It is located very close to tuner antenna input. Used | ||
| 76 | when ``V4L2_CID_RF_TUNER_LNA_GAIN_AUTO`` is not set. See | ||
| 77 | ``V4L2_CID_RF_TUNER_RF_GAIN`` to understand how RF gain and LNA gain | ||
| 78 | differs from the each others. The range and step are | ||
| 79 | driver-specific. | ||
| 80 | |||
| 81 | ``V4L2_CID_RF_TUNER_MIXER_GAIN (integer)`` | ||
| 82 | Mixer gain is second gain stage on the RF tuner signal path. It is | ||
| 83 | located inside mixer block, where RF signal is down-converted by the | ||
| 84 | mixer. Used when ``V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO`` is not set. | ||
| 85 | The range and step are driver-specific. | ||
| 86 | |||
| 87 | ``V4L2_CID_RF_TUNER_IF_GAIN (integer)`` | ||
| 88 | IF gain is last gain stage on the RF tuner signal path. It is | ||
| 89 | located on output of RF tuner. It controls signal level of | ||
| 90 | intermediate frequency output or baseband output. Used when | ||
| 91 | ``V4L2_CID_RF_TUNER_IF_GAIN_AUTO`` is not set. The range and step | ||
| 92 | are driver-specific. | ||
| 93 | |||
| 94 | ``V4L2_CID_RF_TUNER_PLL_LOCK (boolean)`` | ||
| 95 | Is synthesizer PLL locked? RF tuner is receiving given frequency | ||
| 96 | when that control is set. This is a read-only control. | ||
diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst index 286a2dd7ec36..24274b398e63 100644 --- a/Documentation/media/uapi/v4l/extended-controls.rst +++ b/Documentation/media/uapi/v4l/extended-controls.rst | |||
| @@ -9,9 +9,9 @@ | |||
| 9 | 9 | ||
| 10 | .. _extended-controls: | 10 | .. _extended-controls: |
| 11 | 11 | ||
| 12 | ***************** | 12 | ********************* |
| 13 | Extended Controls | 13 | Extended Controls API |
| 14 | ***************** | 14 | ********************* |
| 15 | 15 | ||
| 16 | 16 | ||
| 17 | Introduction | 17 | Introduction |
| @@ -181,3902 +181,3 @@ The flags field of struct :ref:`v4l2_queryctrl <v4l2-queryctrl>` also | |||
| 181 | contains hints on the behavior of the control. See the | 181 | contains hints on the behavior of the control. See the |
| 182 | :ref:`VIDIOC_QUERYCTRL` documentation for more | 182 | :ref:`VIDIOC_QUERYCTRL` documentation for more |
| 183 | details. | 183 | details. |
| 184 | |||
| 185 | |||
| 186 | .. _mpeg-controls: | ||
| 187 | |||
| 188 | Codec Control Reference | ||
| 189 | ======================= | ||
| 190 | |||
| 191 | Below all controls within the Codec control class are described. First | ||
| 192 | the generic controls, then controls specific for certain hardware. | ||
| 193 | |||
| 194 | .. note:: | ||
| 195 | |||
| 196 | These controls are applicable to all codecs and not just MPEG. The | ||
| 197 | defines are prefixed with V4L2_CID_MPEG/V4L2_MPEG as the controls | ||
| 198 | were originally made for MPEG codecs and later extended to cover all | ||
| 199 | encoding formats. | ||
| 200 | |||
| 201 | |||
| 202 | Generic Codec Controls | ||
| 203 | ---------------------- | ||
| 204 | |||
| 205 | |||
| 206 | .. _mpeg-control-id: | ||
| 207 | |||
| 208 | Codec Control IDs | ||
| 209 | ^^^^^^^^^^^^^^^^^ | ||
| 210 | |||
| 211 | ``V4L2_CID_MPEG_CLASS (class)`` | ||
| 212 | The Codec class descriptor. Calling | ||
| 213 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 214 | return a description of this control class. This description can be | ||
| 215 | used as the caption of a Tab page in a GUI, for example. | ||
| 216 | |||
| 217 | .. _v4l2-mpeg-stream-type: | ||
| 218 | |||
| 219 | ``V4L2_CID_MPEG_STREAM_TYPE`` | ||
| 220 | (enum) | ||
| 221 | |||
| 222 | enum v4l2_mpeg_stream_type - | ||
| 223 | The MPEG-1, -2 or -4 output stream type. One cannot assume anything | ||
| 224 | here. Each hardware MPEG encoder tends to support different subsets | ||
| 225 | of the available MPEG stream types. This control is specific to | ||
| 226 | multiplexed MPEG streams. The currently defined stream types are: | ||
| 227 | |||
| 228 | |||
| 229 | |||
| 230 | .. flat-table:: | ||
| 231 | :header-rows: 0 | ||
| 232 | :stub-columns: 0 | ||
| 233 | |||
| 234 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_PS`` | ||
| 235 | - MPEG-2 program stream | ||
| 236 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_TS`` | ||
| 237 | - MPEG-2 transport stream | ||
| 238 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG1_SS`` | ||
| 239 | - MPEG-1 system stream | ||
| 240 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_DVD`` | ||
| 241 | - MPEG-2 DVD-compatible stream | ||
| 242 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG1_VCD`` | ||
| 243 | - MPEG-1 VCD-compatible stream | ||
| 244 | * - ``V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD`` | ||
| 245 | - MPEG-2 SVCD-compatible stream | ||
| 246 | |||
| 247 | |||
| 248 | |||
| 249 | ``V4L2_CID_MPEG_STREAM_PID_PMT (integer)`` | ||
| 250 | Program Map Table Packet ID for the MPEG transport stream (default | ||
| 251 | 16) | ||
| 252 | |||
| 253 | ``V4L2_CID_MPEG_STREAM_PID_AUDIO (integer)`` | ||
| 254 | Audio Packet ID for the MPEG transport stream (default 256) | ||
| 255 | |||
| 256 | ``V4L2_CID_MPEG_STREAM_PID_VIDEO (integer)`` | ||
| 257 | Video Packet ID for the MPEG transport stream (default 260) | ||
| 258 | |||
| 259 | ``V4L2_CID_MPEG_STREAM_PID_PCR (integer)`` | ||
| 260 | Packet ID for the MPEG transport stream carrying PCR fields (default | ||
| 261 | 259) | ||
| 262 | |||
| 263 | ``V4L2_CID_MPEG_STREAM_PES_ID_AUDIO (integer)`` | ||
| 264 | Audio ID for MPEG PES | ||
| 265 | |||
| 266 | ``V4L2_CID_MPEG_STREAM_PES_ID_VIDEO (integer)`` | ||
| 267 | Video ID for MPEG PES | ||
| 268 | |||
| 269 | .. _v4l2-mpeg-stream-vbi-fmt: | ||
| 270 | |||
| 271 | ``V4L2_CID_MPEG_STREAM_VBI_FMT`` | ||
| 272 | (enum) | ||
| 273 | |||
| 274 | enum v4l2_mpeg_stream_vbi_fmt - | ||
| 275 | Some cards can embed VBI data (e. g. Closed Caption, Teletext) into | ||
| 276 | the MPEG stream. This control selects whether VBI data should be | ||
| 277 | embedded, and if so, what embedding method should be used. The list | ||
| 278 | of possible VBI formats depends on the driver. The currently defined | ||
| 279 | VBI format types are: | ||
| 280 | |||
| 281 | |||
| 282 | |||
| 283 | .. tabularcolumns:: |p{6 cm}|p{11.5cm}| | ||
| 284 | |||
| 285 | .. flat-table:: | ||
| 286 | :header-rows: 0 | ||
| 287 | :stub-columns: 0 | ||
| 288 | |||
| 289 | * - ``V4L2_MPEG_STREAM_VBI_FMT_NONE`` | ||
| 290 | - No VBI in the MPEG stream | ||
| 291 | * - ``V4L2_MPEG_STREAM_VBI_FMT_IVTV`` | ||
| 292 | - VBI in private packets, IVTV format (documented in the kernel | ||
| 293 | sources in the file | ||
| 294 | ``Documentation/media/v4l-drivers/cx2341x.rst``) | ||
| 295 | |||
| 296 | |||
| 297 | |||
| 298 | .. _v4l2-mpeg-audio-sampling-freq: | ||
| 299 | |||
| 300 | ``V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ`` | ||
| 301 | (enum) | ||
| 302 | |||
| 303 | enum v4l2_mpeg_audio_sampling_freq - | ||
| 304 | MPEG Audio sampling frequency. Possible values are: | ||
| 305 | |||
| 306 | |||
| 307 | |||
| 308 | .. flat-table:: | ||
| 309 | :header-rows: 0 | ||
| 310 | :stub-columns: 0 | ||
| 311 | |||
| 312 | * - ``V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100`` | ||
| 313 | - 44.1 kHz | ||
| 314 | * - ``V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000`` | ||
| 315 | - 48 kHz | ||
| 316 | * - ``V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000`` | ||
| 317 | - 32 kHz | ||
| 318 | |||
| 319 | |||
| 320 | |||
| 321 | .. _v4l2-mpeg-audio-encoding: | ||
| 322 | |||
| 323 | ``V4L2_CID_MPEG_AUDIO_ENCODING`` | ||
| 324 | (enum) | ||
| 325 | |||
| 326 | enum v4l2_mpeg_audio_encoding - | ||
| 327 | MPEG Audio encoding. This control is specific to multiplexed MPEG | ||
| 328 | streams. Possible values are: | ||
| 329 | |||
| 330 | |||
| 331 | |||
| 332 | .. flat-table:: | ||
| 333 | :header-rows: 0 | ||
| 334 | :stub-columns: 0 | ||
| 335 | |||
| 336 | * - ``V4L2_MPEG_AUDIO_ENCODING_LAYER_1`` | ||
| 337 | - MPEG-1/2 Layer I encoding | ||
| 338 | * - ``V4L2_MPEG_AUDIO_ENCODING_LAYER_2`` | ||
| 339 | - MPEG-1/2 Layer II encoding | ||
| 340 | * - ``V4L2_MPEG_AUDIO_ENCODING_LAYER_3`` | ||
| 341 | - MPEG-1/2 Layer III encoding | ||
| 342 | * - ``V4L2_MPEG_AUDIO_ENCODING_AAC`` | ||
| 343 | - MPEG-2/4 AAC (Advanced Audio Coding) | ||
| 344 | * - ``V4L2_MPEG_AUDIO_ENCODING_AC3`` | ||
| 345 | - AC-3 aka ATSC A/52 encoding | ||
| 346 | |||
| 347 | |||
| 348 | |||
| 349 | .. _v4l2-mpeg-audio-l1-bitrate: | ||
| 350 | |||
| 351 | ``V4L2_CID_MPEG_AUDIO_L1_BITRATE`` | ||
| 352 | (enum) | ||
| 353 | |||
| 354 | enum v4l2_mpeg_audio_l1_bitrate - | ||
| 355 | MPEG-1/2 Layer I bitrate. Possible values are: | ||
| 356 | |||
| 357 | |||
| 358 | |||
| 359 | .. flat-table:: | ||
| 360 | :header-rows: 0 | ||
| 361 | :stub-columns: 0 | ||
| 362 | |||
| 363 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_32K`` | ||
| 364 | - 32 kbit/s | ||
| 365 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_64K`` | ||
| 366 | - 64 kbit/s | ||
| 367 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_96K`` | ||
| 368 | - 96 kbit/s | ||
| 369 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_128K`` | ||
| 370 | - 128 kbit/s | ||
| 371 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_160K`` | ||
| 372 | - 160 kbit/s | ||
| 373 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_192K`` | ||
| 374 | - 192 kbit/s | ||
| 375 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_224K`` | ||
| 376 | - 224 kbit/s | ||
| 377 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_256K`` | ||
| 378 | - 256 kbit/s | ||
| 379 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_288K`` | ||
| 380 | - 288 kbit/s | ||
| 381 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_320K`` | ||
| 382 | - 320 kbit/s | ||
| 383 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_352K`` | ||
| 384 | - 352 kbit/s | ||
| 385 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_384K`` | ||
| 386 | - 384 kbit/s | ||
| 387 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_416K`` | ||
| 388 | - 416 kbit/s | ||
| 389 | * - ``V4L2_MPEG_AUDIO_L1_BITRATE_448K`` | ||
| 390 | - 448 kbit/s | ||
| 391 | |||
| 392 | |||
| 393 | |||
| 394 | .. _v4l2-mpeg-audio-l2-bitrate: | ||
| 395 | |||
| 396 | ``V4L2_CID_MPEG_AUDIO_L2_BITRATE`` | ||
| 397 | (enum) | ||
| 398 | |||
| 399 | enum v4l2_mpeg_audio_l2_bitrate - | ||
| 400 | MPEG-1/2 Layer II bitrate. Possible values are: | ||
| 401 | |||
| 402 | |||
| 403 | |||
| 404 | .. flat-table:: | ||
| 405 | :header-rows: 0 | ||
| 406 | :stub-columns: 0 | ||
| 407 | |||
| 408 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_32K`` | ||
| 409 | - 32 kbit/s | ||
| 410 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_48K`` | ||
| 411 | - 48 kbit/s | ||
| 412 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_56K`` | ||
| 413 | - 56 kbit/s | ||
| 414 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_64K`` | ||
| 415 | - 64 kbit/s | ||
| 416 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_80K`` | ||
| 417 | - 80 kbit/s | ||
| 418 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_96K`` | ||
| 419 | - 96 kbit/s | ||
| 420 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_112K`` | ||
| 421 | - 112 kbit/s | ||
| 422 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_128K`` | ||
| 423 | - 128 kbit/s | ||
| 424 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_160K`` | ||
| 425 | - 160 kbit/s | ||
| 426 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_192K`` | ||
| 427 | - 192 kbit/s | ||
| 428 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_224K`` | ||
| 429 | - 224 kbit/s | ||
| 430 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_256K`` | ||
| 431 | - 256 kbit/s | ||
| 432 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_320K`` | ||
| 433 | - 320 kbit/s | ||
| 434 | * - ``V4L2_MPEG_AUDIO_L2_BITRATE_384K`` | ||
| 435 | - 384 kbit/s | ||
| 436 | |||
| 437 | |||
| 438 | |||
| 439 | .. _v4l2-mpeg-audio-l3-bitrate: | ||
| 440 | |||
| 441 | ``V4L2_CID_MPEG_AUDIO_L3_BITRATE`` | ||
| 442 | (enum) | ||
| 443 | |||
| 444 | enum v4l2_mpeg_audio_l3_bitrate - | ||
| 445 | MPEG-1/2 Layer III bitrate. Possible values are: | ||
| 446 | |||
| 447 | |||
| 448 | |||
| 449 | .. flat-table:: | ||
| 450 | :header-rows: 0 | ||
| 451 | :stub-columns: 0 | ||
| 452 | |||
| 453 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_32K`` | ||
| 454 | - 32 kbit/s | ||
| 455 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_40K`` | ||
| 456 | - 40 kbit/s | ||
| 457 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_48K`` | ||
| 458 | - 48 kbit/s | ||
| 459 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_56K`` | ||
| 460 | - 56 kbit/s | ||
| 461 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_64K`` | ||
| 462 | - 64 kbit/s | ||
| 463 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_80K`` | ||
| 464 | - 80 kbit/s | ||
| 465 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_96K`` | ||
| 466 | - 96 kbit/s | ||
| 467 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_112K`` | ||
| 468 | - 112 kbit/s | ||
| 469 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_128K`` | ||
| 470 | - 128 kbit/s | ||
| 471 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_160K`` | ||
| 472 | - 160 kbit/s | ||
| 473 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_192K`` | ||
| 474 | - 192 kbit/s | ||
| 475 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_224K`` | ||
| 476 | - 224 kbit/s | ||
| 477 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_256K`` | ||
| 478 | - 256 kbit/s | ||
| 479 | * - ``V4L2_MPEG_AUDIO_L3_BITRATE_320K`` | ||
| 480 | - 320 kbit/s | ||
| 481 | |||
| 482 | |||
| 483 | |||
| 484 | ``V4L2_CID_MPEG_AUDIO_AAC_BITRATE (integer)`` | ||
| 485 | AAC bitrate in bits per second. | ||
| 486 | |||
| 487 | .. _v4l2-mpeg-audio-ac3-bitrate: | ||
| 488 | |||
| 489 | ``V4L2_CID_MPEG_AUDIO_AC3_BITRATE`` | ||
| 490 | (enum) | ||
| 491 | |||
| 492 | enum v4l2_mpeg_audio_ac3_bitrate - | ||
| 493 | AC-3 bitrate. Possible values are: | ||
| 494 | |||
| 495 | |||
| 496 | |||
| 497 | .. flat-table:: | ||
| 498 | :header-rows: 0 | ||
| 499 | :stub-columns: 0 | ||
| 500 | |||
| 501 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_32K`` | ||
| 502 | - 32 kbit/s | ||
| 503 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_40K`` | ||
| 504 | - 40 kbit/s | ||
| 505 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_48K`` | ||
| 506 | - 48 kbit/s | ||
| 507 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_56K`` | ||
| 508 | - 56 kbit/s | ||
| 509 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_64K`` | ||
| 510 | - 64 kbit/s | ||
| 511 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_80K`` | ||
| 512 | - 80 kbit/s | ||
| 513 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_96K`` | ||
| 514 | - 96 kbit/s | ||
| 515 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_112K`` | ||
| 516 | - 112 kbit/s | ||
| 517 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_128K`` | ||
| 518 | - 128 kbit/s | ||
| 519 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_160K`` | ||
| 520 | - 160 kbit/s | ||
| 521 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_192K`` | ||
| 522 | - 192 kbit/s | ||
| 523 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_224K`` | ||
| 524 | - 224 kbit/s | ||
| 525 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_256K`` | ||
| 526 | - 256 kbit/s | ||
| 527 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_320K`` | ||
| 528 | - 320 kbit/s | ||
| 529 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_384K`` | ||
| 530 | - 384 kbit/s | ||
| 531 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_448K`` | ||
| 532 | - 448 kbit/s | ||
| 533 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_512K`` | ||
| 534 | - 512 kbit/s | ||
| 535 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_576K`` | ||
| 536 | - 576 kbit/s | ||
| 537 | * - ``V4L2_MPEG_AUDIO_AC3_BITRATE_640K`` | ||
| 538 | - 640 kbit/s | ||
| 539 | |||
| 540 | |||
| 541 | |||
| 542 | .. _v4l2-mpeg-audio-mode: | ||
| 543 | |||
| 544 | ``V4L2_CID_MPEG_AUDIO_MODE`` | ||
| 545 | (enum) | ||
| 546 | |||
| 547 | enum v4l2_mpeg_audio_mode - | ||
| 548 | MPEG Audio mode. Possible values are: | ||
| 549 | |||
| 550 | |||
| 551 | |||
| 552 | .. flat-table:: | ||
| 553 | :header-rows: 0 | ||
| 554 | :stub-columns: 0 | ||
| 555 | |||
| 556 | * - ``V4L2_MPEG_AUDIO_MODE_STEREO`` | ||
| 557 | - Stereo | ||
| 558 | * - ``V4L2_MPEG_AUDIO_MODE_JOINT_STEREO`` | ||
| 559 | - Joint Stereo | ||
| 560 | * - ``V4L2_MPEG_AUDIO_MODE_DUAL`` | ||
| 561 | - Bilingual | ||
| 562 | * - ``V4L2_MPEG_AUDIO_MODE_MONO`` | ||
| 563 | - Mono | ||
| 564 | |||
| 565 | |||
| 566 | |||
| 567 | .. _v4l2-mpeg-audio-mode-extension: | ||
| 568 | |||
| 569 | ``V4L2_CID_MPEG_AUDIO_MODE_EXTENSION`` | ||
| 570 | (enum) | ||
| 571 | |||
| 572 | enum v4l2_mpeg_audio_mode_extension - | ||
| 573 | Joint Stereo audio mode extension. In Layer I and II they indicate | ||
| 574 | which subbands are in intensity stereo. All other subbands are coded | ||
| 575 | in stereo. Layer III is not (yet) supported. Possible values are: | ||
| 576 | |||
| 577 | |||
| 578 | |||
| 579 | .. flat-table:: | ||
| 580 | :header-rows: 0 | ||
| 581 | :stub-columns: 0 | ||
| 582 | |||
| 583 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4`` | ||
| 584 | - Subbands 4-31 in intensity stereo | ||
| 585 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8`` | ||
| 586 | - Subbands 8-31 in intensity stereo | ||
| 587 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12`` | ||
| 588 | - Subbands 12-31 in intensity stereo | ||
| 589 | * - ``V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16`` | ||
| 590 | - Subbands 16-31 in intensity stereo | ||
| 591 | |||
| 592 | |||
| 593 | |||
| 594 | .. _v4l2-mpeg-audio-emphasis: | ||
| 595 | |||
| 596 | ``V4L2_CID_MPEG_AUDIO_EMPHASIS`` | ||
| 597 | (enum) | ||
| 598 | |||
| 599 | enum v4l2_mpeg_audio_emphasis - | ||
| 600 | Audio Emphasis. Possible values are: | ||
| 601 | |||
| 602 | |||
| 603 | |||
| 604 | .. flat-table:: | ||
| 605 | :header-rows: 0 | ||
| 606 | :stub-columns: 0 | ||
| 607 | |||
| 608 | * - ``V4L2_MPEG_AUDIO_EMPHASIS_NONE`` | ||
| 609 | - None | ||
| 610 | * - ``V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS`` | ||
| 611 | - 50/15 microsecond emphasis | ||
| 612 | * - ``V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17`` | ||
| 613 | - CCITT J.17 | ||
| 614 | |||
| 615 | |||
| 616 | |||
| 617 | .. _v4l2-mpeg-audio-crc: | ||
| 618 | |||
| 619 | ``V4L2_CID_MPEG_AUDIO_CRC`` | ||
| 620 | (enum) | ||
| 621 | |||
| 622 | enum v4l2_mpeg_audio_crc - | ||
| 623 | CRC method. Possible values are: | ||
| 624 | |||
| 625 | |||
| 626 | |||
| 627 | .. flat-table:: | ||
| 628 | :header-rows: 0 | ||
| 629 | :stub-columns: 0 | ||
| 630 | |||
| 631 | * - ``V4L2_MPEG_AUDIO_CRC_NONE`` | ||
| 632 | - None | ||
| 633 | * - ``V4L2_MPEG_AUDIO_CRC_CRC16`` | ||
| 634 | - 16 bit parity check | ||
| 635 | |||
| 636 | |||
| 637 | |||
| 638 | ``V4L2_CID_MPEG_AUDIO_MUTE (boolean)`` | ||
| 639 | Mutes the audio when capturing. This is not done by muting audio | ||
| 640 | hardware, which can still produce a slight hiss, but in the encoder | ||
| 641 | itself, guaranteeing a fixed and reproducible audio bitstream. 0 = | ||
| 642 | unmuted, 1 = muted. | ||
| 643 | |||
| 644 | .. _v4l2-mpeg-audio-dec-playback: | ||
| 645 | |||
| 646 | ``V4L2_CID_MPEG_AUDIO_DEC_PLAYBACK`` | ||
| 647 | (enum) | ||
| 648 | |||
| 649 | enum v4l2_mpeg_audio_dec_playback - | ||
| 650 | Determines how monolingual audio should be played back. Possible | ||
| 651 | values are: | ||
| 652 | |||
| 653 | |||
| 654 | |||
| 655 | .. tabularcolumns:: |p{9.0cm}|p{8.5cm}| | ||
| 656 | |||
| 657 | .. flat-table:: | ||
| 658 | :header-rows: 0 | ||
| 659 | :stub-columns: 0 | ||
| 660 | |||
| 661 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_AUTO`` | ||
| 662 | - Automatically determines the best playback mode. | ||
| 663 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_STEREO`` | ||
| 664 | - Stereo playback. | ||
| 665 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_LEFT`` | ||
| 666 | - Left channel playback. | ||
| 667 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_RIGHT`` | ||
| 668 | - Right channel playback. | ||
| 669 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_MONO`` | ||
| 670 | - Mono playback. | ||
| 671 | * - ``V4L2_MPEG_AUDIO_DEC_PLAYBACK_SWAPPED_STEREO`` | ||
| 672 | - Stereo playback with swapped left and right channels. | ||
| 673 | |||
| 674 | |||
| 675 | |||
| 676 | .. _v4l2-mpeg-audio-dec-multilingual-playback: | ||
| 677 | |||
| 678 | ``V4L2_CID_MPEG_AUDIO_DEC_MULTILINGUAL_PLAYBACK`` | ||
| 679 | (enum) | ||
| 680 | |||
| 681 | enum v4l2_mpeg_audio_dec_playback - | ||
| 682 | Determines how multilingual audio should be played back. | ||
| 683 | |||
| 684 | .. _v4l2-mpeg-video-encoding: | ||
| 685 | |||
| 686 | ``V4L2_CID_MPEG_VIDEO_ENCODING`` | ||
| 687 | (enum) | ||
| 688 | |||
| 689 | enum v4l2_mpeg_video_encoding - | ||
| 690 | MPEG Video encoding method. This control is specific to multiplexed | ||
| 691 | MPEG streams. Possible values are: | ||
| 692 | |||
| 693 | |||
| 694 | |||
| 695 | .. flat-table:: | ||
| 696 | :header-rows: 0 | ||
| 697 | :stub-columns: 0 | ||
| 698 | |||
| 699 | * - ``V4L2_MPEG_VIDEO_ENCODING_MPEG_1`` | ||
| 700 | - MPEG-1 Video encoding | ||
| 701 | * - ``V4L2_MPEG_VIDEO_ENCODING_MPEG_2`` | ||
| 702 | - MPEG-2 Video encoding | ||
| 703 | * - ``V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC`` | ||
| 704 | - MPEG-4 AVC (H.264) Video encoding | ||
| 705 | |||
| 706 | |||
| 707 | |||
| 708 | .. _v4l2-mpeg-video-aspect: | ||
| 709 | |||
| 710 | ``V4L2_CID_MPEG_VIDEO_ASPECT`` | ||
| 711 | (enum) | ||
| 712 | |||
| 713 | enum v4l2_mpeg_video_aspect - | ||
| 714 | Video aspect. Possible values are: | ||
| 715 | |||
| 716 | |||
| 717 | |||
| 718 | .. flat-table:: | ||
| 719 | :header-rows: 0 | ||
| 720 | :stub-columns: 0 | ||
| 721 | |||
| 722 | * - ``V4L2_MPEG_VIDEO_ASPECT_1x1`` | ||
| 723 | * - ``V4L2_MPEG_VIDEO_ASPECT_4x3`` | ||
| 724 | * - ``V4L2_MPEG_VIDEO_ASPECT_16x9`` | ||
| 725 | * - ``V4L2_MPEG_VIDEO_ASPECT_221x100`` | ||
| 726 | |||
| 727 | |||
| 728 | |||
| 729 | ``V4L2_CID_MPEG_VIDEO_B_FRAMES (integer)`` | ||
| 730 | Number of B-Frames (default 2) | ||
| 731 | |||
| 732 | ``V4L2_CID_MPEG_VIDEO_GOP_SIZE (integer)`` | ||
| 733 | GOP size (default 12) | ||
| 734 | |||
| 735 | ``V4L2_CID_MPEG_VIDEO_GOP_CLOSURE (boolean)`` | ||
| 736 | GOP closure (default 1) | ||
| 737 | |||
| 738 | ``V4L2_CID_MPEG_VIDEO_PULLDOWN (boolean)`` | ||
| 739 | Enable 3:2 pulldown (default 0) | ||
| 740 | |||
| 741 | .. _v4l2-mpeg-video-bitrate-mode: | ||
| 742 | |||
| 743 | ``V4L2_CID_MPEG_VIDEO_BITRATE_MODE`` | ||
| 744 | (enum) | ||
| 745 | |||
| 746 | enum v4l2_mpeg_video_bitrate_mode - | ||
| 747 | Video bitrate mode. Possible values are: | ||
| 748 | |||
| 749 | |||
| 750 | |||
| 751 | .. flat-table:: | ||
| 752 | :header-rows: 0 | ||
| 753 | :stub-columns: 0 | ||
| 754 | |||
| 755 | * - ``V4L2_MPEG_VIDEO_BITRATE_MODE_VBR`` | ||
| 756 | - Variable bitrate | ||
| 757 | * - ``V4L2_MPEG_VIDEO_BITRATE_MODE_CBR`` | ||
| 758 | - Constant bitrate | ||
| 759 | |||
| 760 | |||
| 761 | |||
| 762 | ``V4L2_CID_MPEG_VIDEO_BITRATE (integer)`` | ||
| 763 | Video bitrate in bits per second. | ||
| 764 | |||
| 765 | ``V4L2_CID_MPEG_VIDEO_BITRATE_PEAK (integer)`` | ||
| 766 | Peak video bitrate in bits per second. Must be larger or equal to | ||
| 767 | the average video bitrate. It is ignored if the video bitrate mode | ||
| 768 | is set to constant bitrate. | ||
| 769 | |||
| 770 | ``V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (integer)`` | ||
| 771 | For every captured frame, skip this many subsequent frames (default | ||
| 772 | 0). | ||
| 773 | |||
| 774 | ``V4L2_CID_MPEG_VIDEO_MUTE (boolean)`` | ||
| 775 | "Mutes" the video to a fixed color when capturing. This is useful | ||
| 776 | for testing, to produce a fixed video bitstream. 0 = unmuted, 1 = | ||
| 777 | muted. | ||
| 778 | |||
| 779 | ``V4L2_CID_MPEG_VIDEO_MUTE_YUV (integer)`` | ||
| 780 | Sets the "mute" color of the video. The supplied 32-bit integer is | ||
| 781 | interpreted as follows (bit 0 = least significant bit): | ||
| 782 | |||
| 783 | |||
| 784 | |||
| 785 | .. flat-table:: | ||
| 786 | :header-rows: 0 | ||
| 787 | :stub-columns: 0 | ||
| 788 | |||
| 789 | * - Bit 0:7 | ||
| 790 | - V chrominance information | ||
| 791 | * - Bit 8:15 | ||
| 792 | - U chrominance information | ||
| 793 | * - Bit 16:23 | ||
| 794 | - Y luminance information | ||
| 795 | * - Bit 24:31 | ||
| 796 | - Must be zero. | ||
| 797 | |||
| 798 | |||
| 799 | |||
| 800 | .. _v4l2-mpeg-video-dec-pts: | ||
| 801 | |||
| 802 | ``V4L2_CID_MPEG_VIDEO_DEC_PTS (integer64)`` | ||
| 803 | This read-only control returns the 33-bit video Presentation Time | ||
| 804 | Stamp as defined in ITU T-REC-H.222.0 and ISO/IEC 13818-1 of the | ||
| 805 | currently displayed frame. This is the same PTS as is used in | ||
| 806 | :ref:`VIDIOC_DECODER_CMD`. | ||
| 807 | |||
| 808 | .. _v4l2-mpeg-video-dec-frame: | ||
| 809 | |||
| 810 | ``V4L2_CID_MPEG_VIDEO_DEC_FRAME (integer64)`` | ||
| 811 | This read-only control returns the frame counter of the frame that | ||
| 812 | is currently displayed (decoded). This value is reset to 0 whenever | ||
| 813 | the decoder is started. | ||
| 814 | |||
| 815 | ``V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE (boolean)`` | ||
| 816 | If enabled the decoder expects to receive a single slice per buffer, | ||
| 817 | otherwise the decoder expects a single frame in per buffer. | ||
| 818 | Applicable to the decoder, all codecs. | ||
| 819 | |||
| 820 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE (boolean)`` | ||
| 821 | Enable writing sample aspect ratio in the Video Usability | ||
| 822 | Information. Applicable to the H264 encoder. | ||
| 823 | |||
| 824 | .. _v4l2-mpeg-video-h264-vui-sar-idc: | ||
| 825 | |||
| 826 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC`` | ||
| 827 | (enum) | ||
| 828 | |||
| 829 | enum v4l2_mpeg_video_h264_vui_sar_idc - | ||
| 830 | VUI sample aspect ratio indicator for H.264 encoding. The value is | ||
| 831 | defined in the table E-1 in the standard. Applicable to the H264 | ||
| 832 | encoder. | ||
| 833 | |||
| 834 | |||
| 835 | |||
| 836 | .. flat-table:: | ||
| 837 | :header-rows: 0 | ||
| 838 | :stub-columns: 0 | ||
| 839 | |||
| 840 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED`` | ||
| 841 | - Unspecified | ||
| 842 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1`` | ||
| 843 | - 1x1 | ||
| 844 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11`` | ||
| 845 | - 12x11 | ||
| 846 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11`` | ||
| 847 | - 10x11 | ||
| 848 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11`` | ||
| 849 | - 16x11 | ||
| 850 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33`` | ||
| 851 | - 40x33 | ||
| 852 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11`` | ||
| 853 | - 24x11 | ||
| 854 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11`` | ||
| 855 | - 20x11 | ||
| 856 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11`` | ||
| 857 | - 32x11 | ||
| 858 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33`` | ||
| 859 | - 80x33 | ||
| 860 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11`` | ||
| 861 | - 18x11 | ||
| 862 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11`` | ||
| 863 | - 15x11 | ||
| 864 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33`` | ||
| 865 | - 64x33 | ||
| 866 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99`` | ||
| 867 | - 160x99 | ||
| 868 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3`` | ||
| 869 | - 4x3 | ||
| 870 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2`` | ||
| 871 | - 3x2 | ||
| 872 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1`` | ||
| 873 | - 2x1 | ||
| 874 | * - ``V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED`` | ||
| 875 | - Extended SAR | ||
| 876 | |||
| 877 | |||
| 878 | |||
| 879 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (integer)`` | ||
| 880 | Extended sample aspect ratio width for H.264 VUI encoding. | ||
| 881 | Applicable to the H264 encoder. | ||
| 882 | |||
| 883 | ``V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (integer)`` | ||
| 884 | Extended sample aspect ratio height for H.264 VUI encoding. | ||
| 885 | Applicable to the H264 encoder. | ||
| 886 | |||
| 887 | .. _v4l2-mpeg-video-h264-level: | ||
| 888 | |||
| 889 | ``V4L2_CID_MPEG_VIDEO_H264_LEVEL`` | ||
| 890 | (enum) | ||
| 891 | |||
| 892 | enum v4l2_mpeg_video_h264_level - | ||
| 893 | The level information for the H264 video elementary stream. | ||
| 894 | Applicable to the H264 encoder. Possible values are: | ||
| 895 | |||
| 896 | |||
| 897 | |||
| 898 | .. flat-table:: | ||
| 899 | :header-rows: 0 | ||
| 900 | :stub-columns: 0 | ||
| 901 | |||
| 902 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_0`` | ||
| 903 | - Level 1.0 | ||
| 904 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1B`` | ||
| 905 | - Level 1B | ||
| 906 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_1`` | ||
| 907 | - Level 1.1 | ||
| 908 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_2`` | ||
| 909 | - Level 1.2 | ||
| 910 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_1_3`` | ||
| 911 | - Level 1.3 | ||
| 912 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_2_0`` | ||
| 913 | - Level 2.0 | ||
| 914 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_2_1`` | ||
| 915 | - Level 2.1 | ||
| 916 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_2_2`` | ||
| 917 | - Level 2.2 | ||
| 918 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_3_0`` | ||
| 919 | - Level 3.0 | ||
| 920 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_3_1`` | ||
| 921 | - Level 3.1 | ||
| 922 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_3_2`` | ||
| 923 | - Level 3.2 | ||
| 924 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_4_0`` | ||
| 925 | - Level 4.0 | ||
| 926 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_4_1`` | ||
| 927 | - Level 4.1 | ||
| 928 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_4_2`` | ||
| 929 | - Level 4.2 | ||
| 930 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_5_0`` | ||
| 931 | - Level 5.0 | ||
| 932 | * - ``V4L2_MPEG_VIDEO_H264_LEVEL_5_1`` | ||
| 933 | - Level 5.1 | ||
| 934 | |||
| 935 | |||
| 936 | |||
| 937 | .. _v4l2-mpeg-video-mpeg4-level: | ||
| 938 | |||
| 939 | ``V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL`` | ||
| 940 | (enum) | ||
| 941 | |||
| 942 | enum v4l2_mpeg_video_mpeg4_level - | ||
| 943 | The level information for the MPEG4 elementary stream. Applicable to | ||
| 944 | the MPEG4 encoder. Possible values are: | ||
| 945 | |||
| 946 | |||
| 947 | |||
| 948 | .. flat-table:: | ||
| 949 | :header-rows: 0 | ||
| 950 | :stub-columns: 0 | ||
| 951 | |||
| 952 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_0`` | ||
| 953 | - Level 0 | ||
| 954 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B`` | ||
| 955 | - Level 0b | ||
| 956 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_1`` | ||
| 957 | - Level 1 | ||
| 958 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_2`` | ||
| 959 | - Level 2 | ||
| 960 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_3`` | ||
| 961 | - Level 3 | ||
| 962 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B`` | ||
| 963 | - Level 3b | ||
| 964 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_4`` | ||
| 965 | - Level 4 | ||
| 966 | * - ``V4L2_MPEG_VIDEO_MPEG4_LEVEL_5`` | ||
| 967 | - Level 5 | ||
| 968 | |||
| 969 | |||
| 970 | |||
| 971 | .. _v4l2-mpeg-video-h264-profile: | ||
| 972 | |||
| 973 | ``V4L2_CID_MPEG_VIDEO_H264_PROFILE`` | ||
| 974 | (enum) | ||
| 975 | |||
| 976 | enum v4l2_mpeg_video_h264_profile - | ||
| 977 | The profile information for H264. Applicable to the H264 encoder. | ||
| 978 | Possible values are: | ||
| 979 | |||
| 980 | |||
| 981 | |||
| 982 | .. flat-table:: | ||
| 983 | :header-rows: 0 | ||
| 984 | :stub-columns: 0 | ||
| 985 | |||
| 986 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE`` | ||
| 987 | - Baseline profile | ||
| 988 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE`` | ||
| 989 | - Constrained Baseline profile | ||
| 990 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_MAIN`` | ||
| 991 | - Main profile | ||
| 992 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED`` | ||
| 993 | - Extended profile | ||
| 994 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH`` | ||
| 995 | - High profile | ||
| 996 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10`` | ||
| 997 | - High 10 profile | ||
| 998 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422`` | ||
| 999 | - High 422 profile | ||
| 1000 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE`` | ||
| 1001 | - High 444 Predictive profile | ||
| 1002 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA`` | ||
| 1003 | - High 10 Intra profile | ||
| 1004 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA`` | ||
| 1005 | - High 422 Intra profile | ||
| 1006 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA`` | ||
| 1007 | - High 444 Intra profile | ||
| 1008 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA`` | ||
| 1009 | - CAVLC 444 Intra profile | ||
| 1010 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE`` | ||
| 1011 | - Scalable Baseline profile | ||
| 1012 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH`` | ||
| 1013 | - Scalable High profile | ||
| 1014 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA`` | ||
| 1015 | - Scalable High Intra profile | ||
| 1016 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH`` | ||
| 1017 | - Stereo High profile | ||
| 1018 | * - ``V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH`` | ||
| 1019 | - Multiview High profile | ||
| 1020 | |||
| 1021 | |||
| 1022 | |||
| 1023 | .. _v4l2-mpeg-video-mpeg4-profile: | ||
| 1024 | |||
| 1025 | ``V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE`` | ||
| 1026 | (enum) | ||
| 1027 | |||
| 1028 | enum v4l2_mpeg_video_mpeg4_profile - | ||
| 1029 | The profile information for MPEG4. Applicable to the MPEG4 encoder. | ||
| 1030 | Possible values are: | ||
| 1031 | |||
| 1032 | |||
| 1033 | |||
| 1034 | .. flat-table:: | ||
| 1035 | :header-rows: 0 | ||
| 1036 | :stub-columns: 0 | ||
| 1037 | |||
| 1038 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE`` | ||
| 1039 | - Simple profile | ||
| 1040 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE`` | ||
| 1041 | - Advanced Simple profile | ||
| 1042 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE`` | ||
| 1043 | - Core profile | ||
| 1044 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE`` | ||
| 1045 | - Simple Scalable profile | ||
| 1046 | * - ``V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY`` | ||
| 1047 | - | ||
| 1048 | |||
| 1049 | |||
| 1050 | |||
| 1051 | ``V4L2_CID_MPEG_VIDEO_MAX_REF_PIC (integer)`` | ||
| 1052 | The maximum number of reference pictures used for encoding. | ||
| 1053 | Applicable to the encoder. | ||
| 1054 | |||
| 1055 | .. _v4l2-mpeg-video-multi-slice-mode: | ||
| 1056 | |||
| 1057 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE`` | ||
| 1058 | (enum) | ||
| 1059 | |||
| 1060 | enum v4l2_mpeg_video_multi_slice_mode - | ||
| 1061 | Determines how the encoder should handle division of frame into | ||
| 1062 | slices. Applicable to the encoder. Possible values are: | ||
| 1063 | |||
| 1064 | |||
| 1065 | |||
| 1066 | .. tabularcolumns:: |p{8.7cm}|p{8.8cm}| | ||
| 1067 | |||
| 1068 | .. flat-table:: | ||
| 1069 | :header-rows: 0 | ||
| 1070 | :stub-columns: 0 | ||
| 1071 | |||
| 1072 | * - ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE`` | ||
| 1073 | - Single slice per frame. | ||
| 1074 | * - ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB`` | ||
| 1075 | - Multiple slices with set maximum number of macroblocks per slice. | ||
| 1076 | * - ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES`` | ||
| 1077 | - Multiple slice with set maximum size in bytes per slice. | ||
| 1078 | |||
| 1079 | |||
| 1080 | |||
| 1081 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB (integer)`` | ||
| 1082 | The maximum number of macroblocks in a slice. Used when | ||
| 1083 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE`` is set to | ||
| 1084 | ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB``. Applicable to the | ||
| 1085 | encoder. | ||
| 1086 | |||
| 1087 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES (integer)`` | ||
| 1088 | The maximum size of a slice in bytes. Used when | ||
| 1089 | ``V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE`` is set to | ||
| 1090 | ``V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES``. Applicable to the | ||
| 1091 | encoder. | ||
| 1092 | |||
| 1093 | .. _v4l2-mpeg-video-h264-loop-filter-mode: | ||
| 1094 | |||
| 1095 | ``V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE`` | ||
| 1096 | (enum) | ||
| 1097 | |||
| 1098 | enum v4l2_mpeg_video_h264_loop_filter_mode - | ||
| 1099 | Loop filter mode for H264 encoder. Possible values are: | ||
| 1100 | |||
| 1101 | |||
| 1102 | |||
| 1103 | .. tabularcolumns:: |p{14.0cm}|p{3.5cm}| | ||
| 1104 | |||
| 1105 | .. flat-table:: | ||
| 1106 | :header-rows: 0 | ||
| 1107 | :stub-columns: 0 | ||
| 1108 | |||
| 1109 | * - ``V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED`` | ||
| 1110 | - Loop filter is enabled. | ||
| 1111 | * - ``V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED`` | ||
| 1112 | - Loop filter is disabled. | ||
| 1113 | * - ``V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY`` | ||
| 1114 | - Loop filter is disabled at the slice boundary. | ||
| 1115 | |||
| 1116 | |||
| 1117 | |||
| 1118 | ``V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (integer)`` | ||
| 1119 | Loop filter alpha coefficient, defined in the H264 standard. | ||
| 1120 | This value corresponds to the slice_alpha_c0_offset_div2 slice header | ||
| 1121 | field, and should be in the range of -6 to +6, inclusive. The actual alpha | ||
| 1122 | offset FilterOffsetA is twice this value. | ||
| 1123 | Applicable to the H264 encoder. | ||
| 1124 | |||
| 1125 | ``V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (integer)`` | ||
| 1126 | Loop filter beta coefficient, defined in the H264 standard. | ||
| 1127 | This corresponds to the slice_beta_offset_div2 slice header field, and | ||
| 1128 | should be in the range of -6 to +6, inclusive. The actual beta offset | ||
| 1129 | FilterOffsetB is twice this value. | ||
| 1130 | Applicable to the H264 encoder. | ||
| 1131 | |||
| 1132 | .. _v4l2-mpeg-video-h264-entropy-mode: | ||
| 1133 | |||
| 1134 | ``V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE`` | ||
| 1135 | (enum) | ||
| 1136 | |||
| 1137 | enum v4l2_mpeg_video_h264_entropy_mode - | ||
| 1138 | Entropy coding mode for H264 - CABAC/CAVALC. Applicable to the H264 | ||
| 1139 | encoder. Possible values are: | ||
| 1140 | |||
| 1141 | |||
| 1142 | |||
| 1143 | .. flat-table:: | ||
| 1144 | :header-rows: 0 | ||
| 1145 | :stub-columns: 0 | ||
| 1146 | |||
| 1147 | * - ``V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC`` | ||
| 1148 | - Use CAVLC entropy coding. | ||
| 1149 | * - ``V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC`` | ||
| 1150 | - Use CABAC entropy coding. | ||
| 1151 | |||
| 1152 | |||
| 1153 | |||
| 1154 | ``V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM (boolean)`` | ||
| 1155 | Enable 8X8 transform for H264. Applicable to the H264 encoder. | ||
| 1156 | |||
| 1157 | ``V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB (integer)`` | ||
| 1158 | Cyclic intra macroblock refresh. This is the number of continuous | ||
| 1159 | macroblocks refreshed every frame. Each frame a successive set of | ||
| 1160 | macroblocks is refreshed until the cycle completes and starts from | ||
| 1161 | the top of the frame. Applicable to H264, H263 and MPEG4 encoder. | ||
| 1162 | |||
| 1163 | ``V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE (boolean)`` | ||
| 1164 | Frame level rate control enable. If this control is disabled then | ||
| 1165 | the quantization parameter for each frame type is constant and set | ||
| 1166 | with appropriate controls (e.g. | ||
| 1167 | ``V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP``). If frame rate control is | ||
| 1168 | enabled then quantization parameter is adjusted to meet the chosen | ||
| 1169 | bitrate. Minimum and maximum value for the quantization parameter | ||
| 1170 | can be set with appropriate controls (e.g. | ||
| 1171 | ``V4L2_CID_MPEG_VIDEO_H263_MIN_QP``). Applicable to encoders. | ||
| 1172 | |||
| 1173 | ``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE (boolean)`` | ||
| 1174 | Macroblock level rate control enable. Applicable to the MPEG4 and | ||
| 1175 | H264 encoders. | ||
| 1176 | |||
| 1177 | ``V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (boolean)`` | ||
| 1178 | Quarter pixel motion estimation for MPEG4. Applicable to the MPEG4 | ||
| 1179 | encoder. | ||
| 1180 | |||
| 1181 | ``V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (integer)`` | ||
| 1182 | Quantization parameter for an I frame for H263. Valid range: from 1 | ||
| 1183 | to 31. | ||
| 1184 | |||
| 1185 | ``V4L2_CID_MPEG_VIDEO_H263_MIN_QP (integer)`` | ||
| 1186 | Minimum quantization parameter for H263. Valid range: from 1 to 31. | ||
| 1187 | |||
| 1188 | ``V4L2_CID_MPEG_VIDEO_H263_MAX_QP (integer)`` | ||
| 1189 | Maximum quantization parameter for H263. Valid range: from 1 to 31. | ||
| 1190 | |||
| 1191 | ``V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (integer)`` | ||
| 1192 | Quantization parameter for an P frame for H263. Valid range: from 1 | ||
| 1193 | to 31. | ||
| 1194 | |||
| 1195 | ``V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP (integer)`` | ||
| 1196 | Quantization parameter for an B frame for H263. Valid range: from 1 | ||
| 1197 | to 31. | ||
| 1198 | |||
| 1199 | ``V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP (integer)`` | ||
| 1200 | Quantization parameter for an I frame for H264. Valid range: from 0 | ||
| 1201 | to 51. | ||
| 1202 | |||
| 1203 | ``V4L2_CID_MPEG_VIDEO_H264_MIN_QP (integer)`` | ||
| 1204 | Minimum quantization parameter for H264. Valid range: from 0 to 51. | ||
| 1205 | |||
| 1206 | ``V4L2_CID_MPEG_VIDEO_H264_MAX_QP (integer)`` | ||
| 1207 | Maximum quantization parameter for H264. Valid range: from 0 to 51. | ||
| 1208 | |||
| 1209 | ``V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP (integer)`` | ||
| 1210 | Quantization parameter for an P frame for H264. Valid range: from 0 | ||
| 1211 | to 51. | ||
| 1212 | |||
| 1213 | ``V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP (integer)`` | ||
| 1214 | Quantization parameter for an B frame for H264. Valid range: from 0 | ||
| 1215 | to 51. | ||
| 1216 | |||
| 1217 | ``V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (integer)`` | ||
| 1218 | Quantization parameter for an I frame for MPEG4. Valid range: from 1 | ||
| 1219 | to 31. | ||
| 1220 | |||
| 1221 | ``V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP (integer)`` | ||
| 1222 | Minimum quantization parameter for MPEG4. Valid range: from 1 to 31. | ||
| 1223 | |||
| 1224 | ``V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP (integer)`` | ||
| 1225 | Maximum quantization parameter for MPEG4. Valid range: from 1 to 31. | ||
| 1226 | |||
| 1227 | ``V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (integer)`` | ||
| 1228 | Quantization parameter for an P frame for MPEG4. Valid range: from 1 | ||
| 1229 | to 31. | ||
| 1230 | |||
| 1231 | ``V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (integer)`` | ||
| 1232 | Quantization parameter for an B frame for MPEG4. Valid range: from 1 | ||
| 1233 | to 31. | ||
| 1234 | |||
| 1235 | ``V4L2_CID_MPEG_VIDEO_VBV_SIZE (integer)`` | ||
| 1236 | The Video Buffer Verifier size in kilobytes, it is used as a | ||
| 1237 | limitation of frame skip. The VBV is defined in the standard as a | ||
| 1238 | mean to verify that the produced stream will be successfully | ||
| 1239 | decoded. The standard describes it as "Part of a hypothetical | ||
| 1240 | decoder that is conceptually connected to the output of the encoder. | ||
| 1241 | Its purpose is to provide a constraint on the variability of the | ||
| 1242 | data rate that an encoder or editing process may produce.". | ||
| 1243 | Applicable to the MPEG1, MPEG2, MPEG4 encoders. | ||
| 1244 | |||
| 1245 | .. _v4l2-mpeg-video-vbv-delay: | ||
| 1246 | |||
| 1247 | ``V4L2_CID_MPEG_VIDEO_VBV_DELAY (integer)`` | ||
| 1248 | Sets the initial delay in milliseconds for VBV buffer control. | ||
| 1249 | |||
| 1250 | .. _v4l2-mpeg-video-hor-search-range: | ||
| 1251 | |||
| 1252 | ``V4L2_CID_MPEG_VIDEO_MV_H_SEARCH_RANGE (integer)`` | ||
| 1253 | Horizontal search range defines maximum horizontal search area in | ||
| 1254 | pixels to search and match for the present Macroblock (MB) in the | ||
| 1255 | reference picture. This V4L2 control macro is used to set horizontal | ||
| 1256 | search range for motion estimation module in video encoder. | ||
| 1257 | |||
| 1258 | .. _v4l2-mpeg-video-vert-search-range: | ||
| 1259 | |||
| 1260 | ``V4L2_CID_MPEG_VIDEO_MV_V_SEARCH_RANGE (integer)`` | ||
| 1261 | Vertical search range defines maximum vertical search area in pixels | ||
| 1262 | to search and match for the present Macroblock (MB) in the reference | ||
| 1263 | picture. This V4L2 control macro is used to set vertical search | ||
| 1264 | range for motion estimation module in video encoder. | ||
| 1265 | |||
| 1266 | .. _v4l2-mpeg-video-force-key-frame: | ||
| 1267 | |||
| 1268 | ``V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME (button)`` | ||
| 1269 | Force a key frame for the next queued buffer. Applicable to | ||
| 1270 | encoders. This is a general, codec-agnostic keyframe control. | ||
| 1271 | |||
| 1272 | ``V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE (integer)`` | ||
| 1273 | The Coded Picture Buffer size in kilobytes, it is used as a | ||
| 1274 | limitation of frame skip. The CPB is defined in the H264 standard as | ||
| 1275 | a mean to verify that the produced stream will be successfully | ||
| 1276 | decoded. Applicable to the H264 encoder. | ||
| 1277 | |||
| 1278 | ``V4L2_CID_MPEG_VIDEO_H264_I_PERIOD (integer)`` | ||
| 1279 | Period between I-frames in the open GOP for H264. In case of an open | ||
| 1280 | GOP this is the period between two I-frames. The period between IDR | ||
| 1281 | (Instantaneous Decoding Refresh) frames is taken from the GOP_SIZE | ||
| 1282 | control. An IDR frame, which stands for Instantaneous Decoding | ||
| 1283 | Refresh is an I-frame after which no prior frames are referenced. | ||
| 1284 | This means that a stream can be restarted from an IDR frame without | ||
| 1285 | the need to store or decode any previous frames. Applicable to the | ||
| 1286 | H264 encoder. | ||
| 1287 | |||
| 1288 | .. _v4l2-mpeg-video-header-mode: | ||
| 1289 | |||
| 1290 | ``V4L2_CID_MPEG_VIDEO_HEADER_MODE`` | ||
| 1291 | (enum) | ||
| 1292 | |||
| 1293 | enum v4l2_mpeg_video_header_mode - | ||
| 1294 | Determines whether the header is returned as the first buffer or is | ||
| 1295 | it returned together with the first frame. Applicable to encoders. | ||
| 1296 | Possible values are: | ||
| 1297 | |||
| 1298 | |||
| 1299 | |||
| 1300 | .. tabularcolumns:: |p{10.3cm}|p{7.2cm}| | ||
| 1301 | |||
| 1302 | .. flat-table:: | ||
| 1303 | :header-rows: 0 | ||
| 1304 | :stub-columns: 0 | ||
| 1305 | |||
| 1306 | * - ``V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE`` | ||
| 1307 | - The stream header is returned separately in the first buffer. | ||
| 1308 | * - ``V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME`` | ||
| 1309 | - The stream header is returned together with the first encoded | ||
| 1310 | frame. | ||
| 1311 | |||
| 1312 | |||
| 1313 | |||
| 1314 | ``V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER (boolean)`` | ||
| 1315 | Repeat the video sequence headers. Repeating these headers makes | ||
| 1316 | random access to the video stream easier. Applicable to the MPEG1, 2 | ||
| 1317 | and 4 encoder. | ||
| 1318 | |||
| 1319 | ``V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER (boolean)`` | ||
| 1320 | Enabled the deblocking post processing filter for MPEG4 decoder. | ||
| 1321 | Applicable to the MPEG4 decoder. | ||
| 1322 | |||
| 1323 | ``V4L2_CID_MPEG_VIDEO_MPEG4_VOP_TIME_RES (integer)`` | ||
| 1324 | vop_time_increment_resolution value for MPEG4. Applicable to the | ||
| 1325 | MPEG4 encoder. | ||
| 1326 | |||
| 1327 | ``V4L2_CID_MPEG_VIDEO_MPEG4_VOP_TIME_INC (integer)`` | ||
| 1328 | vop_time_increment value for MPEG4. Applicable to the MPEG4 | ||
| 1329 | encoder. | ||
| 1330 | |||
| 1331 | ``V4L2_CID_MPEG_VIDEO_H264_SEI_FRAME_PACKING (boolean)`` | ||
| 1332 | Enable generation of frame packing supplemental enhancement | ||
| 1333 | information in the encoded bitstream. The frame packing SEI message | ||
| 1334 | contains the arrangement of L and R planes for 3D viewing. | ||
| 1335 | Applicable to the H264 encoder. | ||
| 1336 | |||
| 1337 | ``V4L2_CID_MPEG_VIDEO_H264_SEI_FP_CURRENT_FRAME_0 (boolean)`` | ||
| 1338 | Sets current frame as frame0 in frame packing SEI. Applicable to the | ||
| 1339 | H264 encoder. | ||
| 1340 | |||
| 1341 | .. _v4l2-mpeg-video-h264-sei-fp-arrangement-type: | ||
| 1342 | |||
| 1343 | ``V4L2_CID_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE`` | ||
| 1344 | (enum) | ||
| 1345 | |||
| 1346 | enum v4l2_mpeg_video_h264_sei_fp_arrangement_type - | ||
| 1347 | Frame packing arrangement type for H264 SEI. Applicable to the H264 | ||
| 1348 | encoder. Possible values are: | ||
| 1349 | |||
| 1350 | .. tabularcolumns:: |p{12cm}|p{5.5cm}| | ||
| 1351 | |||
| 1352 | .. flat-table:: | ||
| 1353 | :header-rows: 0 | ||
| 1354 | :stub-columns: 0 | ||
| 1355 | |||
| 1356 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_CHEKERBOARD`` | ||
| 1357 | - Pixels are alternatively from L and R. | ||
| 1358 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_COLUMN`` | ||
| 1359 | - L and R are interlaced by column. | ||
| 1360 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_ROW`` | ||
| 1361 | - L and R are interlaced by row. | ||
| 1362 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_SIDE_BY_SIDE`` | ||
| 1363 | - L is on the left, R on the right. | ||
| 1364 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TOP_BOTTOM`` | ||
| 1365 | - L is on top, R on bottom. | ||
| 1366 | * - ``V4L2_MPEG_VIDEO_H264_SEI_FP_ARRANGEMENT_TYPE_TEMPORAL`` | ||
| 1367 | - One view per frame. | ||
| 1368 | |||
| 1369 | |||
| 1370 | |||
| 1371 | ``V4L2_CID_MPEG_VIDEO_H264_FMO (boolean)`` | ||
| 1372 | Enables flexible macroblock ordering in the encoded bitstream. It is | ||
| 1373 | a technique used for restructuring the ordering of macroblocks in | ||
| 1374 | pictures. Applicable to the H264 encoder. | ||
| 1375 | |||
| 1376 | .. _v4l2-mpeg-video-h264-fmo-map-type: | ||
| 1377 | |||
| 1378 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_MAP_TYPE`` | ||
| 1379 | (enum) | ||
| 1380 | |||
| 1381 | enum v4l2_mpeg_video_h264_fmo_map_type - | ||
| 1382 | When using FMO, the map type divides the image in different scan | ||
| 1383 | patterns of macroblocks. Applicable to the H264 encoder. Possible | ||
| 1384 | values are: | ||
| 1385 | |||
| 1386 | .. tabularcolumns:: |p{12.5cm}|p{5.0cm}| | ||
| 1387 | |||
| 1388 | .. flat-table:: | ||
| 1389 | :header-rows: 0 | ||
| 1390 | :stub-columns: 0 | ||
| 1391 | |||
| 1392 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_INTERLEAVED_SLICES`` | ||
| 1393 | - Slices are interleaved one after other with macroblocks in run | ||
| 1394 | length order. | ||
| 1395 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_SCATTERED_SLICES`` | ||
| 1396 | - Scatters the macroblocks based on a mathematical function known to | ||
| 1397 | both encoder and decoder. | ||
| 1398 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_FOREGROUND_WITH_LEFT_OVER`` | ||
| 1399 | - Macroblocks arranged in rectangular areas or regions of interest. | ||
| 1400 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_BOX_OUT`` | ||
| 1401 | - Slice groups grow in a cyclic way from centre to outwards. | ||
| 1402 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_RASTER_SCAN`` | ||
| 1403 | - Slice groups grow in raster scan pattern from left to right. | ||
| 1404 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_WIPE_SCAN`` | ||
| 1405 | - Slice groups grow in wipe scan pattern from top to bottom. | ||
| 1406 | * - ``V4L2_MPEG_VIDEO_H264_FMO_MAP_TYPE_EXPLICIT`` | ||
| 1407 | - User defined map type. | ||
| 1408 | |||
| 1409 | |||
| 1410 | |||
| 1411 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_SLICE_GROUP (integer)`` | ||
| 1412 | Number of slice groups in FMO. Applicable to the H264 encoder. | ||
| 1413 | |||
| 1414 | .. _v4l2-mpeg-video-h264-fmo-change-direction: | ||
| 1415 | |||
| 1416 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_DIRECTION`` | ||
| 1417 | (enum) | ||
| 1418 | |||
| 1419 | enum v4l2_mpeg_video_h264_fmo_change_dir - | ||
| 1420 | Specifies a direction of the slice group change for raster and wipe | ||
| 1421 | maps. Applicable to the H264 encoder. Possible values are: | ||
| 1422 | |||
| 1423 | |||
| 1424 | |||
| 1425 | .. flat-table:: | ||
| 1426 | :header-rows: 0 | ||
| 1427 | :stub-columns: 0 | ||
| 1428 | |||
| 1429 | * - ``V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_RIGHT`` | ||
| 1430 | - Raster scan or wipe right. | ||
| 1431 | * - ``V4L2_MPEG_VIDEO_H264_FMO_CHANGE_DIR_LEFT`` | ||
| 1432 | - Reverse raster scan or wipe left. | ||
| 1433 | |||
| 1434 | |||
| 1435 | |||
| 1436 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_CHANGE_RATE (integer)`` | ||
| 1437 | Specifies the size of the first slice group for raster and wipe map. | ||
| 1438 | Applicable to the H264 encoder. | ||
| 1439 | |||
| 1440 | ``V4L2_CID_MPEG_VIDEO_H264_FMO_RUN_LENGTH (integer)`` | ||
| 1441 | Specifies the number of consecutive macroblocks for the interleaved | ||
| 1442 | map. Applicable to the H264 encoder. | ||
| 1443 | |||
| 1444 | ``V4L2_CID_MPEG_VIDEO_H264_ASO (boolean)`` | ||
| 1445 | Enables arbitrary slice ordering in encoded bitstream. Applicable to | ||
| 1446 | the H264 encoder. | ||
| 1447 | |||
| 1448 | ``V4L2_CID_MPEG_VIDEO_H264_ASO_SLICE_ORDER (integer)`` | ||
| 1449 | Specifies the slice order in ASO. Applicable to the H264 encoder. | ||
| 1450 | The supplied 32-bit integer is interpreted as follows (bit 0 = least | ||
| 1451 | significant bit): | ||
| 1452 | |||
| 1453 | |||
| 1454 | |||
| 1455 | .. flat-table:: | ||
| 1456 | :header-rows: 0 | ||
| 1457 | :stub-columns: 0 | ||
| 1458 | |||
| 1459 | * - Bit 0:15 | ||
| 1460 | - Slice ID | ||
| 1461 | * - Bit 16:32 | ||
| 1462 | - Slice position or order | ||
| 1463 | |||
| 1464 | |||
| 1465 | |||
| 1466 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING (boolean)`` | ||
| 1467 | Enables H264 hierarchical coding. Applicable to the H264 encoder. | ||
| 1468 | |||
| 1469 | .. _v4l2-mpeg-video-h264-hierarchical-coding-type: | ||
| 1470 | |||
| 1471 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE`` | ||
| 1472 | (enum) | ||
| 1473 | |||
| 1474 | enum v4l2_mpeg_video_h264_hierarchical_coding_type - | ||
| 1475 | Specifies the hierarchical coding type. Applicable to the H264 | ||
| 1476 | encoder. Possible values are: | ||
| 1477 | |||
| 1478 | |||
| 1479 | |||
| 1480 | .. flat-table:: | ||
| 1481 | :header-rows: 0 | ||
| 1482 | :stub-columns: 0 | ||
| 1483 | |||
| 1484 | * - ``V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B`` | ||
| 1485 | - Hierarchical B coding. | ||
| 1486 | * - ``V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P`` | ||
| 1487 | - Hierarchical P coding. | ||
| 1488 | |||
| 1489 | |||
| 1490 | |||
| 1491 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER (integer)`` | ||
| 1492 | Specifies the number of hierarchical coding layers. Applicable to | ||
| 1493 | the H264 encoder. | ||
| 1494 | |||
| 1495 | ``V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP (integer)`` | ||
| 1496 | Specifies a user defined QP for each layer. Applicable to the H264 | ||
| 1497 | encoder. The supplied 32-bit integer is interpreted as follows (bit | ||
| 1498 | 0 = least significant bit): | ||
| 1499 | |||
| 1500 | |||
| 1501 | |||
| 1502 | .. flat-table:: | ||
| 1503 | :header-rows: 0 | ||
| 1504 | :stub-columns: 0 | ||
| 1505 | |||
| 1506 | * - Bit 0:15 | ||
| 1507 | - QP value | ||
| 1508 | * - Bit 16:32 | ||
| 1509 | - Layer number | ||
| 1510 | |||
| 1511 | |||
| 1512 | |||
| 1513 | .. _v4l2-mpeg-mpeg2: | ||
| 1514 | |||
| 1515 | ``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)`` | ||
| 1516 | Specifies the slice parameters (as extracted from the bitstream) for the | ||
| 1517 | associated MPEG-2 slice data. This includes the necessary parameters for | ||
| 1518 | configuring a stateless hardware decoding pipeline for MPEG-2. | ||
| 1519 | The bitstream parameters are defined according to :ref:`mpeg2part2`. | ||
| 1520 | |||
| 1521 | .. note:: | ||
| 1522 | |||
| 1523 | This compound control is not yet part of the public kernel API and | ||
| 1524 | it is expected to change. | ||
| 1525 | |||
| 1526 | .. c:type:: v4l2_ctrl_mpeg2_slice_params | ||
| 1527 | |||
| 1528 | .. cssclass:: longtable | ||
| 1529 | |||
| 1530 | .. flat-table:: struct v4l2_ctrl_mpeg2_slice_params | ||
| 1531 | :header-rows: 0 | ||
| 1532 | :stub-columns: 0 | ||
| 1533 | :widths: 1 1 2 | ||
| 1534 | |||
| 1535 | * - __u32 | ||
| 1536 | - ``bit_size`` | ||
| 1537 | - Size (in bits) of the current slice data. | ||
| 1538 | * - __u32 | ||
| 1539 | - ``data_bit_offset`` | ||
| 1540 | - Offset (in bits) to the video data in the current slice data. | ||
| 1541 | * - struct :c:type:`v4l2_mpeg2_sequence` | ||
| 1542 | - ``sequence`` | ||
| 1543 | - Structure with MPEG-2 sequence metadata, merging relevant fields from | ||
| 1544 | the sequence header and sequence extension parts of the bitstream. | ||
| 1545 | * - struct :c:type:`v4l2_mpeg2_picture` | ||
| 1546 | - ``picture`` | ||
| 1547 | - Structure with MPEG-2 picture metadata, merging relevant fields from | ||
| 1548 | the picture header and picture coding extension parts of the bitstream. | ||
| 1549 | * - __u8 | ||
| 1550 | - ``quantiser_scale_code`` | ||
| 1551 | - Code used to determine the quantization scale to use for the IDCT. | ||
| 1552 | * - __u8 | ||
| 1553 | - ``backward_ref_index`` | ||
| 1554 | - Index for the V4L2 buffer to use as backward reference, used with | ||
| 1555 | B-coded and P-coded frames. | ||
| 1556 | * - __u8 | ||
| 1557 | - ``forward_ref_index`` | ||
| 1558 | - Index for the V4L2 buffer to use as forward reference, used with | ||
| 1559 | B-coded frames. | ||
| 1560 | |||
| 1561 | .. c:type:: v4l2_mpeg2_sequence | ||
| 1562 | |||
| 1563 | .. cssclass:: longtable | ||
| 1564 | |||
| 1565 | .. flat-table:: struct v4l2_mpeg2_sequence | ||
| 1566 | :header-rows: 0 | ||
| 1567 | :stub-columns: 0 | ||
| 1568 | :widths: 1 1 2 | ||
| 1569 | |||
| 1570 | * - __u16 | ||
| 1571 | - ``horizontal_size`` | ||
| 1572 | - The width of the displayable part of the frame's luminance component. | ||
| 1573 | * - __u16 | ||
| 1574 | - ``vertical_size`` | ||
| 1575 | - The height of the displayable part of the frame's luminance component. | ||
| 1576 | * - __u32 | ||
| 1577 | - ``vbv_buffer_size`` | ||
| 1578 | - Used to calculate the required size of the video buffering verifier, | ||
| 1579 | defined (in bits) as: 16 * 1024 * vbv_buffer_size. | ||
| 1580 | * - __u8 | ||
| 1581 | - ``profile_and_level_indication`` | ||
| 1582 | - The current profile and level indication as extracted from the | ||
| 1583 | bitstream. | ||
| 1584 | * - __u8 | ||
| 1585 | - ``progressive_sequence`` | ||
| 1586 | - Indication that all the frames for the sequence are progressive instead | ||
| 1587 | of interlaced. | ||
| 1588 | * - __u8 | ||
| 1589 | - ``chroma_format`` | ||
| 1590 | - The chrominance sub-sampling format (1: 4:2:0, 2: 4:2:2, 3: 4:4:4). | ||
| 1591 | |||
| 1592 | .. c:type:: v4l2_mpeg2_picture | ||
| 1593 | |||
| 1594 | .. cssclass:: longtable | ||
| 1595 | |||
| 1596 | .. flat-table:: struct v4l2_mpeg2_picture | ||
| 1597 | :header-rows: 0 | ||
| 1598 | :stub-columns: 0 | ||
| 1599 | :widths: 1 1 2 | ||
| 1600 | |||
| 1601 | * - __u8 | ||
| 1602 | - ``picture_coding_type`` | ||
| 1603 | - Picture coding type for the frame covered by the current slice | ||
| 1604 | (V4L2_MPEG2_PICTURE_CODING_TYPE_I, V4L2_MPEG2_PICTURE_CODING_TYPE_P or | ||
| 1605 | V4L2_MPEG2_PICTURE_CODING_TYPE_B). | ||
| 1606 | * - __u8 | ||
| 1607 | - ``f_code[2][2]`` | ||
| 1608 | - Motion vector codes. | ||
| 1609 | * - __u8 | ||
| 1610 | - ``intra_dc_precision`` | ||
| 1611 | - Precision of Discrete Cosine transform (0: 8 bits precision, | ||
| 1612 | 1: 9 bits precision, 2: 10 bits precision, 3: 11 bits precision). | ||
| 1613 | * - __u8 | ||
| 1614 | - ``picture_structure`` | ||
| 1615 | - Picture structure (1: interlaced top field, 2: interlaced bottom field, | ||
| 1616 | 3: progressive frame). | ||
| 1617 | * - __u8 | ||
| 1618 | - ``top_field_first`` | ||
| 1619 | - If set to 1 and interlaced stream, top field is output first. | ||
| 1620 | * - __u8 | ||
| 1621 | - ``frame_pred_frame_dct`` | ||
| 1622 | - If set to 1, only frame-DCT and frame prediction are used. | ||
| 1623 | * - __u8 | ||
| 1624 | - ``concealment_motion_vectors`` | ||
| 1625 | - If set to 1, motion vectors are coded for intra macroblocks. | ||
| 1626 | * - __u8 | ||
| 1627 | - ``q_scale_type`` | ||
| 1628 | - This flag affects the inverse quantization process. | ||
| 1629 | * - __u8 | ||
| 1630 | - ``intra_vlc_format`` | ||
| 1631 | - This flag affects the decoding of transform coefficient data. | ||
| 1632 | * - __u8 | ||
| 1633 | - ``alternate_scan`` | ||
| 1634 | - This flag affects the decoding of transform coefficient data. | ||
| 1635 | * - __u8 | ||
| 1636 | - ``repeat_first_field`` | ||
| 1637 | - This flag affects the decoding process of progressive frames. | ||
| 1638 | * - __u8 | ||
| 1639 | - ``progressive_frame`` | ||
| 1640 | - Indicates whether the current frame is progressive. | ||
| 1641 | |||
| 1642 | ``V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION (struct)`` | ||
| 1643 | Specifies quantization matrices (as extracted from the bitstream) for the | ||
| 1644 | associated MPEG-2 slice data. | ||
| 1645 | |||
| 1646 | .. note:: | ||
| 1647 | |||
| 1648 | This compound control is not yet part of the public kernel API and | ||
| 1649 | it is expected to change. | ||
| 1650 | |||
| 1651 | .. c:type:: v4l2_ctrl_mpeg2_quantization | ||
| 1652 | |||
| 1653 | .. cssclass:: longtable | ||
| 1654 | |||
| 1655 | .. flat-table:: struct v4l2_ctrl_mpeg2_quantization | ||
| 1656 | :header-rows: 0 | ||
| 1657 | :stub-columns: 0 | ||
| 1658 | :widths: 1 1 2 | ||
| 1659 | |||
| 1660 | * - __u8 | ||
| 1661 | - ``load_intra_quantiser_matrix`` | ||
| 1662 | - One bit to indicate whether to load the ``intra_quantiser_matrix`` data. | ||
| 1663 | * - __u8 | ||
| 1664 | - ``load_non_intra_quantiser_matrix`` | ||
| 1665 | - One bit to indicate whether to load the ``non_intra_quantiser_matrix`` | ||
| 1666 | data. | ||
| 1667 | * - __u8 | ||
| 1668 | - ``load_chroma_intra_quantiser_matrix`` | ||
| 1669 | - One bit to indicate whether to load the | ||
| 1670 | ``chroma_intra_quantiser_matrix`` data, only relevant for non-4:2:0 YUV | ||
| 1671 | formats. | ||
| 1672 | * - __u8 | ||
| 1673 | - ``load_chroma_non_intra_quantiser_matrix`` | ||
| 1674 | - One bit to indicate whether to load the | ||
| 1675 | ``chroma_non_intra_quantiser_matrix`` data, only relevant for non-4:2:0 | ||
| 1676 | YUV formats. | ||
| 1677 | * - __u8 | ||
| 1678 | - ``intra_quantiser_matrix[64]`` | ||
| 1679 | - The quantization matrix coefficients for intra-coded frames, in zigzag | ||
| 1680 | scanning order. It is relevant for both luma and chroma components, | ||
| 1681 | although it can be superseded by the chroma-specific matrix for | ||
| 1682 | non-4:2:0 YUV formats. | ||
| 1683 | * - __u8 | ||
| 1684 | - ``non_intra_quantiser_matrix[64]`` | ||
| 1685 | - The quantization matrix coefficients for non-intra-coded frames, in | ||
| 1686 | zigzag scanning order. It is relevant for both luma and chroma | ||
| 1687 | components, although it can be superseded by the chroma-specific matrix | ||
| 1688 | for non-4:2:0 YUV formats. | ||
| 1689 | * - __u8 | ||
| 1690 | - ``chroma_intra_quantiser_matrix[64]`` | ||
| 1691 | - The quantization matrix coefficients for the chominance component of | ||
| 1692 | intra-coded frames, in zigzag scanning order. Only relevant for | ||
| 1693 | non-4:2:0 YUV formats. | ||
| 1694 | * - __u8 | ||
| 1695 | - ``chroma_non_intra_quantiser_matrix[64]`` | ||
| 1696 | - The quantization matrix coefficients for the chrominance component of | ||
| 1697 | non-intra-coded frames, in zigzag scanning order. Only relevant for | ||
| 1698 | non-4:2:0 YUV formats. | ||
| 1699 | |||
| 1700 | MFC 5.1 MPEG Controls | ||
| 1701 | --------------------- | ||
| 1702 | |||
| 1703 | The following MPEG class controls deal with MPEG decoding and encoding | ||
| 1704 | settings that are specific to the Multi Format Codec 5.1 device present | ||
| 1705 | in the S5P family of SoCs by Samsung. | ||
| 1706 | |||
| 1707 | |||
| 1708 | .. _mfc51-control-id: | ||
| 1709 | |||
| 1710 | MFC 5.1 Control IDs | ||
| 1711 | ^^^^^^^^^^^^^^^^^^^ | ||
| 1712 | |||
| 1713 | ``V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE (boolean)`` | ||
| 1714 | If the display delay is enabled then the decoder is forced to return | ||
| 1715 | a CAPTURE buffer (decoded frame) after processing a certain number | ||
| 1716 | of OUTPUT buffers. The delay can be set through | ||
| 1717 | ``V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY``. This | ||
| 1718 | feature can be used for example for generating thumbnails of videos. | ||
| 1719 | Applicable to the H264 decoder. | ||
| 1720 | |||
| 1721 | ``V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY (integer)`` | ||
| 1722 | Display delay value for H264 decoder. The decoder is forced to | ||
| 1723 | return a decoded frame after the set 'display delay' number of | ||
| 1724 | frames. If this number is low it may result in frames returned out | ||
| 1725 | of dispaly order, in addition the hardware may still be using the | ||
| 1726 | returned buffer as a reference picture for subsequent frames. | ||
| 1727 | |||
| 1728 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (integer)`` | ||
| 1729 | The number of reference pictures used for encoding a P picture. | ||
| 1730 | Applicable to the H264 encoder. | ||
| 1731 | |||
| 1732 | ``V4L2_CID_MPEG_MFC51_VIDEO_PADDING (boolean)`` | ||
| 1733 | Padding enable in the encoder - use a color instead of repeating | ||
| 1734 | border pixels. Applicable to encoders. | ||
| 1735 | |||
| 1736 | ``V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV (integer)`` | ||
| 1737 | Padding color in the encoder. Applicable to encoders. The supplied | ||
| 1738 | 32-bit integer is interpreted as follows (bit 0 = least significant | ||
| 1739 | bit): | ||
| 1740 | |||
| 1741 | |||
| 1742 | |||
| 1743 | .. flat-table:: | ||
| 1744 | :header-rows: 0 | ||
| 1745 | :stub-columns: 0 | ||
| 1746 | |||
| 1747 | * - Bit 0:7 | ||
| 1748 | - V chrominance information | ||
| 1749 | * - Bit 8:15 | ||
| 1750 | - U chrominance information | ||
| 1751 | * - Bit 16:23 | ||
| 1752 | - Y luminance information | ||
| 1753 | * - Bit 24:31 | ||
| 1754 | - Must be zero. | ||
| 1755 | |||
| 1756 | |||
| 1757 | |||
| 1758 | ``V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF (integer)`` | ||
| 1759 | Reaction coefficient for MFC rate control. Applicable to encoders. | ||
| 1760 | |||
| 1761 | .. note:: | ||
| 1762 | |||
| 1763 | #. Valid only when the frame level RC is enabled. | ||
| 1764 | |||
| 1765 | #. For tight CBR, this field must be small (ex. 2 ~ 10). For | ||
| 1766 | VBR, this field must be large (ex. 100 ~ 1000). | ||
| 1767 | |||
| 1768 | #. It is not recommended to use the greater number than | ||
| 1769 | FRAME_RATE * (10^9 / BIT_RATE). | ||
| 1770 | |||
| 1771 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK (boolean)`` | ||
| 1772 | Adaptive rate control for dark region. Valid only when H.264 and | ||
| 1773 | macroblock level RC is enabled | ||
| 1774 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1775 | encoder. | ||
| 1776 | |||
| 1777 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH (boolean)`` | ||
| 1778 | Adaptive rate control for smooth region. Valid only when H.264 and | ||
| 1779 | macroblock level RC is enabled | ||
| 1780 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1781 | encoder. | ||
| 1782 | |||
| 1783 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (boolean)`` | ||
| 1784 | Adaptive rate control for static region. Valid only when H.264 and | ||
| 1785 | macroblock level RC is enabled | ||
| 1786 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1787 | encoder. | ||
| 1788 | |||
| 1789 | ``V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY (boolean)`` | ||
| 1790 | Adaptive rate control for activity region. Valid only when H.264 and | ||
| 1791 | macroblock level RC is enabled | ||
| 1792 | (``V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE``). Applicable to the H264 | ||
| 1793 | encoder. | ||
| 1794 | |||
| 1795 | .. _v4l2-mpeg-mfc51-video-frame-skip-mode: | ||
| 1796 | |||
| 1797 | ``V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE`` | ||
| 1798 | (enum) | ||
| 1799 | |||
| 1800 | enum v4l2_mpeg_mfc51_video_frame_skip_mode - | ||
| 1801 | Indicates in what conditions the encoder should skip frames. If | ||
| 1802 | encoding a frame would cause the encoded stream to be larger then a | ||
| 1803 | chosen data limit then the frame will be skipped. Possible values | ||
| 1804 | are: | ||
| 1805 | |||
| 1806 | |||
| 1807 | .. tabularcolumns:: |p{9.0cm}|p{8.5cm}| | ||
| 1808 | |||
| 1809 | .. flat-table:: | ||
| 1810 | :header-rows: 0 | ||
| 1811 | :stub-columns: 0 | ||
| 1812 | |||
| 1813 | * - ``V4L2_MPEG_MFC51_FRAME_SKIP_MODE_DISABLED`` | ||
| 1814 | - Frame skip mode is disabled. | ||
| 1815 | * - ``V4L2_MPEG_MFC51_FRAME_SKIP_MODE_LEVEL_LIMIT`` | ||
| 1816 | - Frame skip mode enabled and buffer limit is set by the chosen | ||
| 1817 | level and is defined by the standard. | ||
| 1818 | * - ``V4L2_MPEG_MFC51_FRAME_SKIP_MODE_BUF_LIMIT`` | ||
| 1819 | - Frame skip mode enabled and buffer limit is set by the VBV | ||
| 1820 | (MPEG1/2/4) or CPB (H264) buffer size control. | ||
| 1821 | |||
| 1822 | |||
| 1823 | |||
| 1824 | ``V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT (integer)`` | ||
| 1825 | Enable rate-control with fixed target bit. If this setting is | ||
| 1826 | enabled, then the rate control logic of the encoder will calculate | ||
| 1827 | the average bitrate for a GOP and keep it below or equal the set | ||
| 1828 | bitrate target. Otherwise the rate control logic calculates the | ||
| 1829 | overall average bitrate for the stream and keeps it below or equal | ||
| 1830 | to the set bitrate. In the first case the average bitrate for the | ||
| 1831 | whole stream will be smaller then the set bitrate. This is caused | ||
| 1832 | because the average is calculated for smaller number of frames, on | ||
| 1833 | the other hand enabling this setting will ensure that the stream | ||
| 1834 | will meet tight bandwidth constraints. Applicable to encoders. | ||
| 1835 | |||
| 1836 | .. _v4l2-mpeg-mfc51-video-force-frame-type: | ||
| 1837 | |||
| 1838 | ``V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE`` | ||
| 1839 | (enum) | ||
| 1840 | |||
| 1841 | enum v4l2_mpeg_mfc51_video_force_frame_type - | ||
| 1842 | Force a frame type for the next queued buffer. Applicable to | ||
| 1843 | encoders. Possible values are: | ||
| 1844 | |||
| 1845 | |||
| 1846 | |||
| 1847 | .. flat-table:: | ||
| 1848 | :header-rows: 0 | ||
| 1849 | :stub-columns: 0 | ||
| 1850 | |||
| 1851 | * - ``V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_DISABLED`` | ||
| 1852 | - Forcing a specific frame type disabled. | ||
| 1853 | * - ``V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_I_FRAME`` | ||
| 1854 | - Force an I-frame. | ||
| 1855 | * - ``V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_NOT_CODED`` | ||
| 1856 | - Force a non-coded frame. | ||
| 1857 | |||
| 1858 | |||
| 1859 | |||
| 1860 | |||
| 1861 | CX2341x MPEG Controls | ||
| 1862 | --------------------- | ||
| 1863 | |||
| 1864 | The following MPEG class controls deal with MPEG encoding settings that | ||
| 1865 | are specific to the Conexant CX23415 and CX23416 MPEG encoding chips. | ||
| 1866 | |||
| 1867 | |||
| 1868 | .. _cx2341x-control-id: | ||
| 1869 | |||
| 1870 | CX2341x Control IDs | ||
| 1871 | ^^^^^^^^^^^^^^^^^^^ | ||
| 1872 | |||
| 1873 | .. _v4l2-mpeg-cx2341x-video-spatial-filter-mode: | ||
| 1874 | |||
| 1875 | ``V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE`` | ||
| 1876 | (enum) | ||
| 1877 | |||
| 1878 | enum v4l2_mpeg_cx2341x_video_spatial_filter_mode - | ||
| 1879 | Sets the Spatial Filter mode (default ``MANUAL``). Possible values | ||
| 1880 | are: | ||
| 1881 | |||
| 1882 | |||
| 1883 | |||
| 1884 | .. flat-table:: | ||
| 1885 | :header-rows: 0 | ||
| 1886 | :stub-columns: 0 | ||
| 1887 | |||
| 1888 | * - ``V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL`` | ||
| 1889 | - Choose the filter manually | ||
| 1890 | * - ``V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO`` | ||
| 1891 | - Choose the filter automatically | ||
| 1892 | |||
| 1893 | |||
| 1894 | |||
| 1895 | ``V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER (integer (0-15))`` | ||
| 1896 | The setting for the Spatial Filter. 0 = off, 15 = maximum. (Default | ||
| 1897 | is 0.) | ||
| 1898 | |||
| 1899 | .. _luma-spatial-filter-type: | ||
| 1900 | |||
| 1901 | ``V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE`` | ||
| 1902 | (enum) | ||
| 1903 | |||
| 1904 | enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type - | ||
| 1905 | Select the algorithm to use for the Luma Spatial Filter (default | ||
| 1906 | ``1D_HOR``). Possible values: | ||
| 1907 | |||
| 1908 | |||
| 1909 | |||
| 1910 | .. tabularcolumns:: |p{14.5cm}|p{3.0cm}| | ||
| 1911 | |||
| 1912 | .. flat-table:: | ||
| 1913 | :header-rows: 0 | ||
| 1914 | :stub-columns: 0 | ||
| 1915 | |||
| 1916 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF`` | ||
| 1917 | - No filter | ||
| 1918 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR`` | ||
| 1919 | - One-dimensional horizontal | ||
| 1920 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT`` | ||
| 1921 | - One-dimensional vertical | ||
| 1922 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE`` | ||
| 1923 | - Two-dimensional separable | ||
| 1924 | * - ``V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE`` | ||
| 1925 | - Two-dimensional symmetrical non-separable | ||
| 1926 | |||
| 1927 | |||
| 1928 | |||
| 1929 | .. _chroma-spatial-filter-type: | ||
| 1930 | |||
| 1931 | ``V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE`` | ||
| 1932 | (enum) | ||
| 1933 | |||
| 1934 | enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type - | ||
| 1935 | Select the algorithm for the Chroma Spatial Filter (default | ||
| 1936 | ``1D_HOR``). Possible values are: | ||
| 1937 | |||
| 1938 | |||
| 1939 | |||
| 1940 | .. flat-table:: | ||
| 1941 | :header-rows: 0 | ||
| 1942 | :stub-columns: 0 | ||
| 1943 | |||
| 1944 | * - ``V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF`` | ||
| 1945 | - No filter | ||
| 1946 | * - ``V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR`` | ||
| 1947 | - One-dimensional horizontal | ||
| 1948 | |||
| 1949 | |||
| 1950 | |||
| 1951 | .. _v4l2-mpeg-cx2341x-video-temporal-filter-mode: | ||
| 1952 | |||
| 1953 | ``V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE`` | ||
| 1954 | (enum) | ||
| 1955 | |||
| 1956 | enum v4l2_mpeg_cx2341x_video_temporal_filter_mode - | ||
| 1957 | Sets the Temporal Filter mode (default ``MANUAL``). Possible values | ||
| 1958 | are: | ||
| 1959 | |||
| 1960 | |||
| 1961 | |||
| 1962 | .. flat-table:: | ||
| 1963 | :header-rows: 0 | ||
| 1964 | :stub-columns: 0 | ||
| 1965 | |||
| 1966 | * - ``V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL`` | ||
| 1967 | - Choose the filter manually | ||
| 1968 | * - ``V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO`` | ||
| 1969 | - Choose the filter automatically | ||
| 1970 | |||
| 1971 | |||
| 1972 | |||
| 1973 | ``V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER (integer (0-31))`` | ||
| 1974 | The setting for the Temporal Filter. 0 = off, 31 = maximum. (Default | ||
| 1975 | is 8 for full-scale capturing and 0 for scaled capturing.) | ||
| 1976 | |||
| 1977 | .. _v4l2-mpeg-cx2341x-video-median-filter-type: | ||
| 1978 | |||
| 1979 | ``V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE`` | ||
| 1980 | (enum) | ||
| 1981 | |||
| 1982 | enum v4l2_mpeg_cx2341x_video_median_filter_type - | ||
| 1983 | Median Filter Type (default ``OFF``). Possible values are: | ||
| 1984 | |||
| 1985 | |||
| 1986 | |||
| 1987 | .. flat-table:: | ||
| 1988 | :header-rows: 0 | ||
| 1989 | :stub-columns: 0 | ||
| 1990 | |||
| 1991 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF`` | ||
| 1992 | - No filter | ||
| 1993 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR`` | ||
| 1994 | - Horizontal filter | ||
| 1995 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT`` | ||
| 1996 | - Vertical filter | ||
| 1997 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT`` | ||
| 1998 | - Horizontal and vertical filter | ||
| 1999 | * - ``V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG`` | ||
| 2000 | - Diagonal filter | ||
| 2001 | |||
| 2002 | |||
| 2003 | |||
| 2004 | ``V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM (integer (0-255))`` | ||
| 2005 | Threshold above which the luminance median filter is enabled | ||
| 2006 | (default 0) | ||
| 2007 | |||
| 2008 | ``V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP (integer (0-255))`` | ||
| 2009 | Threshold below which the luminance median filter is enabled | ||
| 2010 | (default 255) | ||
| 2011 | |||
| 2012 | ``V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM (integer (0-255))`` | ||
| 2013 | Threshold above which the chroma median filter is enabled (default | ||
| 2014 | 0) | ||
| 2015 | |||
| 2016 | ``V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (integer (0-255))`` | ||
| 2017 | Threshold below which the chroma median filter is enabled (default | ||
| 2018 | 255) | ||
| 2019 | |||
| 2020 | ``V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (boolean)`` | ||
| 2021 | The CX2341X MPEG encoder can insert one empty MPEG-2 PES packet into | ||
| 2022 | the stream between every four video frames. The packet size is 2048 | ||
| 2023 | bytes, including the packet_start_code_prefix and stream_id | ||
| 2024 | fields. The stream_id is 0xBF (private stream 2). The payload | ||
| 2025 | consists of 0x00 bytes, to be filled in by the application. 0 = do | ||
| 2026 | not insert, 1 = insert packets. | ||
| 2027 | |||
| 2028 | |||
| 2029 | VPX Control Reference | ||
| 2030 | --------------------- | ||
| 2031 | |||
| 2032 | The VPX controls include controls for encoding parameters of VPx video | ||
| 2033 | codec. | ||
| 2034 | |||
| 2035 | |||
| 2036 | .. _vpx-control-id: | ||
| 2037 | |||
| 2038 | VPX Control IDs | ||
| 2039 | ^^^^^^^^^^^^^^^ | ||
| 2040 | |||
| 2041 | .. _v4l2-vpx-num-partitions: | ||
| 2042 | |||
| 2043 | ``V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS`` | ||
| 2044 | (enum) | ||
| 2045 | |||
| 2046 | enum v4l2_vp8_num_partitions - | ||
| 2047 | The number of token partitions to use in VP8 encoder. Possible | ||
| 2048 | values are: | ||
| 2049 | |||
| 2050 | |||
| 2051 | |||
| 2052 | .. flat-table:: | ||
| 2053 | :header-rows: 0 | ||
| 2054 | :stub-columns: 0 | ||
| 2055 | |||
| 2056 | * - ``V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION`` | ||
| 2057 | - 1 coefficient partition | ||
| 2058 | * - ``V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS`` | ||
| 2059 | - 2 coefficient partitions | ||
| 2060 | * - ``V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS`` | ||
| 2061 | - 4 coefficient partitions | ||
| 2062 | * - ``V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS`` | ||
| 2063 | - 8 coefficient partitions | ||
| 2064 | |||
| 2065 | |||
| 2066 | |||
| 2067 | ``V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4 (boolean)`` | ||
| 2068 | Setting this prevents intra 4x4 mode in the intra mode decision. | ||
| 2069 | |||
| 2070 | .. _v4l2-vpx-num-ref-frames: | ||
| 2071 | |||
| 2072 | ``V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES`` | ||
| 2073 | (enum) | ||
| 2074 | |||
| 2075 | enum v4l2_vp8_num_ref_frames - | ||
| 2076 | The number of reference pictures for encoding P frames. Possible | ||
| 2077 | values are: | ||
| 2078 | |||
| 2079 | .. tabularcolumns:: |p{7.9cm}|p{9.6cm}| | ||
| 2080 | |||
| 2081 | .. flat-table:: | ||
| 2082 | :header-rows: 0 | ||
| 2083 | :stub-columns: 0 | ||
| 2084 | |||
| 2085 | * - ``V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME`` | ||
| 2086 | - Last encoded frame will be searched | ||
| 2087 | * - ``V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME`` | ||
| 2088 | - Two frames will be searched among the last encoded frame, the | ||
| 2089 | golden frame and the alternate reference (altref) frame. The | ||
| 2090 | encoder implementation will decide which two are chosen. | ||
| 2091 | * - ``V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME`` | ||
| 2092 | - The last encoded frame, the golden frame and the altref frame will | ||
| 2093 | be searched. | ||
| 2094 | |||
| 2095 | |||
| 2096 | |||
| 2097 | ``V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL (integer)`` | ||
| 2098 | Indicates the loop filter level. The adjustment of the loop filter | ||
| 2099 | level is done via a delta value against a baseline loop filter | ||
| 2100 | value. | ||
| 2101 | |||
| 2102 | ``V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS (integer)`` | ||
| 2103 | This parameter affects the loop filter. Anything above zero weakens | ||
| 2104 | the deblocking effect on the loop filter. | ||
| 2105 | |||
| 2106 | ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD (integer)`` | ||
| 2107 | Sets the refresh period for the golden frame. The period is defined | ||
| 2108 | in number of frames. For a value of 'n', every nth frame starting | ||
| 2109 | from the first key frame will be taken as a golden frame. For eg. | ||
| 2110 | for encoding sequence of 0, 1, 2, 3, 4, 5, 6, 7 where the golden | ||
| 2111 | frame refresh period is set as 4, the frames 0, 4, 8 etc will be | ||
| 2112 | taken as the golden frames as frame 0 is always a key frame. | ||
| 2113 | |||
| 2114 | .. _v4l2-vpx-golden-frame-sel: | ||
| 2115 | |||
| 2116 | ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL`` | ||
| 2117 | (enum) | ||
| 2118 | |||
| 2119 | enum v4l2_vp8_golden_frame_sel - | ||
| 2120 | Selects the golden frame for encoding. Possible values are: | ||
| 2121 | |||
| 2122 | .. raw:: latex | ||
| 2123 | |||
| 2124 | \footnotesize | ||
| 2125 | |||
| 2126 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2127 | |||
| 2128 | .. flat-table:: | ||
| 2129 | :header-rows: 0 | ||
| 2130 | :stub-columns: 0 | ||
| 2131 | |||
| 2132 | * - ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV`` | ||
| 2133 | - Use the (n-2)th frame as a golden frame, current frame index being | ||
| 2134 | 'n'. | ||
| 2135 | * - ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD`` | ||
| 2136 | - Use the previous specific frame indicated by | ||
| 2137 | ``V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD`` as a | ||
| 2138 | golden frame. | ||
| 2139 | |||
| 2140 | .. raw:: latex | ||
| 2141 | |||
| 2142 | \normalsize | ||
| 2143 | |||
| 2144 | |||
| 2145 | ``V4L2_CID_MPEG_VIDEO_VPX_MIN_QP (integer)`` | ||
| 2146 | Minimum quantization parameter for VP8. | ||
| 2147 | |||
| 2148 | ``V4L2_CID_MPEG_VIDEO_VPX_MAX_QP (integer)`` | ||
| 2149 | Maximum quantization parameter for VP8. | ||
| 2150 | |||
| 2151 | ``V4L2_CID_MPEG_VIDEO_VPX_I_FRAME_QP (integer)`` | ||
| 2152 | Quantization parameter for an I frame for VP8. | ||
| 2153 | |||
| 2154 | ``V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP (integer)`` | ||
| 2155 | Quantization parameter for a P frame for VP8. | ||
| 2156 | |||
| 2157 | .. _v4l2-mpeg-video-vp8-profile: | ||
| 2158 | |||
| 2159 | ``V4L2_CID_MPEG_VIDEO_VP8_PROFILE`` | ||
| 2160 | (enum) | ||
| 2161 | |||
| 2162 | enum v4l2_mpeg_video_vp8_profile - | ||
| 2163 | This control allows selecting the profile for VP8 encoder. | ||
| 2164 | This is also used to enumerate supported profiles by VP8 encoder or decoder. | ||
| 2165 | Possible values are: | ||
| 2166 | |||
| 2167 | .. flat-table:: | ||
| 2168 | :header-rows: 0 | ||
| 2169 | :stub-columns: 0 | ||
| 2170 | |||
| 2171 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_0`` | ||
| 2172 | - Profile 0 | ||
| 2173 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_1`` | ||
| 2174 | - Profile 1 | ||
| 2175 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_2`` | ||
| 2176 | - Profile 2 | ||
| 2177 | * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_3`` | ||
| 2178 | - Profile 3 | ||
| 2179 | |||
| 2180 | .. _v4l2-mpeg-video-vp9-profile: | ||
| 2181 | |||
| 2182 | ``V4L2_CID_MPEG_VIDEO_VP9_PROFILE`` | ||
| 2183 | (enum) | ||
| 2184 | |||
| 2185 | enum v4l2_mpeg_video_vp9_profile - | ||
| 2186 | This control allows selecting the profile for VP9 encoder. | ||
| 2187 | This is also used to enumerate supported profiles by VP9 encoder or decoder. | ||
| 2188 | Possible values are: | ||
| 2189 | |||
| 2190 | .. flat-table:: | ||
| 2191 | :header-rows: 0 | ||
| 2192 | :stub-columns: 0 | ||
| 2193 | |||
| 2194 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_0`` | ||
| 2195 | - Profile 0 | ||
| 2196 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_1`` | ||
| 2197 | - Profile 1 | ||
| 2198 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_2`` | ||
| 2199 | - Profile 2 | ||
| 2200 | * - ``V4L2_MPEG_VIDEO_VP9_PROFILE_3`` | ||
| 2201 | - Profile 3 | ||
| 2202 | |||
| 2203 | |||
| 2204 | High Efficiency Video Coding (HEVC/H.265) Control Reference | ||
| 2205 | ----------------------------------------------------------- | ||
| 2206 | |||
| 2207 | The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265 | ||
| 2208 | video codec. | ||
| 2209 | |||
| 2210 | |||
| 2211 | .. _hevc-control-id: | ||
| 2212 | |||
| 2213 | HEVC/H.265 Control IDs | ||
| 2214 | ^^^^^^^^^^^^^^^^^^^^^^ | ||
| 2215 | |||
| 2216 | ``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)`` | ||
| 2217 | Minimum quantization parameter for HEVC. | ||
| 2218 | Valid range: from 0 to 51. | ||
| 2219 | |||
| 2220 | ``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)`` | ||
| 2221 | Maximum quantization parameter for HEVC. | ||
| 2222 | Valid range: from 0 to 51. | ||
| 2223 | |||
| 2224 | ``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)`` | ||
| 2225 | Quantization parameter for an I frame for HEVC. | ||
| 2226 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2227 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2228 | |||
| 2229 | ``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)`` | ||
| 2230 | Quantization parameter for a P frame for HEVC. | ||
| 2231 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2232 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2233 | |||
| 2234 | ``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)`` | ||
| 2235 | Quantization parameter for a B frame for HEVC. | ||
| 2236 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2237 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2238 | |||
| 2239 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)`` | ||
| 2240 | HIERARCHICAL_QP allows the host to specify the quantization parameter | ||
| 2241 | values for each temporal layer through HIERARCHICAL_QP_LAYER. This is | ||
| 2242 | valid only if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the | ||
| 2243 | control value to 1 enables setting of the QP values for the layers. | ||
| 2244 | |||
| 2245 | .. _v4l2-hevc-hier-coding-type: | ||
| 2246 | |||
| 2247 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE`` | ||
| 2248 | (enum) | ||
| 2249 | |||
| 2250 | enum v4l2_mpeg_video_hevc_hier_coding_type - | ||
| 2251 | Selects the hierarchical coding type for encoding. Possible values are: | ||
| 2252 | |||
| 2253 | .. raw:: latex | ||
| 2254 | |||
| 2255 | \footnotesize | ||
| 2256 | |||
| 2257 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2258 | |||
| 2259 | .. flat-table:: | ||
| 2260 | :header-rows: 0 | ||
| 2261 | :stub-columns: 0 | ||
| 2262 | |||
| 2263 | * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B`` | ||
| 2264 | - Use the B frame for hierarchical coding. | ||
| 2265 | * - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P`` | ||
| 2266 | - Use the P frame for hierarchical coding. | ||
| 2267 | |||
| 2268 | .. raw:: latex | ||
| 2269 | |||
| 2270 | \normalsize | ||
| 2271 | |||
| 2272 | |||
| 2273 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)`` | ||
| 2274 | Selects the hierarchical coding layer. In normal encoding | ||
| 2275 | (non-hierarchial coding), it should be zero. Possible values are [0, 6]. | ||
| 2276 | 0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING | ||
| 2277 | LAYER 1 and so on. | ||
| 2278 | |||
| 2279 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_QP (integer)`` | ||
| 2280 | Indicates quantization parameter for hierarchical coding layer 0. | ||
| 2281 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2282 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2283 | |||
| 2284 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_QP (integer)`` | ||
| 2285 | Indicates quantization parameter for hierarchical coding layer 1. | ||
| 2286 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2287 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2288 | |||
| 2289 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_QP (integer)`` | ||
| 2290 | Indicates quantization parameter for hierarchical coding layer 2. | ||
| 2291 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2292 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2293 | |||
| 2294 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_QP (integer)`` | ||
| 2295 | Indicates quantization parameter for hierarchical coding layer 3. | ||
| 2296 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2297 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2298 | |||
| 2299 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_QP (integer)`` | ||
| 2300 | Indicates quantization parameter for hierarchical coding layer 4. | ||
| 2301 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2302 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2303 | |||
| 2304 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_QP (integer)`` | ||
| 2305 | Indicates quantization parameter for hierarchical coding layer 5. | ||
| 2306 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2307 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2308 | |||
| 2309 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_QP (integer)`` | ||
| 2310 | Indicates quantization parameter for hierarchical coding layer 6. | ||
| 2311 | Valid range: [V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP, | ||
| 2312 | V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP]. | ||
| 2313 | |||
| 2314 | .. _v4l2-hevc-profile: | ||
| 2315 | |||
| 2316 | ``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE`` | ||
| 2317 | (enum) | ||
| 2318 | |||
| 2319 | enum v4l2_mpeg_video_hevc_profile - | ||
| 2320 | Select the desired profile for HEVC encoder. | ||
| 2321 | |||
| 2322 | .. raw:: latex | ||
| 2323 | |||
| 2324 | \footnotesize | ||
| 2325 | |||
| 2326 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2327 | |||
| 2328 | .. flat-table:: | ||
| 2329 | :header-rows: 0 | ||
| 2330 | :stub-columns: 0 | ||
| 2331 | |||
| 2332 | * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN`` | ||
| 2333 | - Main profile. | ||
| 2334 | * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE`` | ||
| 2335 | - Main still picture profile. | ||
| 2336 | * - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10`` | ||
| 2337 | - Main 10 profile. | ||
| 2338 | |||
| 2339 | .. raw:: latex | ||
| 2340 | |||
| 2341 | \normalsize | ||
| 2342 | |||
| 2343 | |||
| 2344 | .. _v4l2-hevc-level: | ||
| 2345 | |||
| 2346 | ``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL`` | ||
| 2347 | (enum) | ||
| 2348 | |||
| 2349 | enum v4l2_mpeg_video_hevc_level - | ||
| 2350 | Selects the desired level for HEVC encoder. | ||
| 2351 | |||
| 2352 | .. raw:: latex | ||
| 2353 | |||
| 2354 | \footnotesize | ||
| 2355 | |||
| 2356 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2357 | |||
| 2358 | .. flat-table:: | ||
| 2359 | :header-rows: 0 | ||
| 2360 | :stub-columns: 0 | ||
| 2361 | |||
| 2362 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1`` | ||
| 2363 | - Level 1.0 | ||
| 2364 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2`` | ||
| 2365 | - Level 2.0 | ||
| 2366 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1`` | ||
| 2367 | - Level 2.1 | ||
| 2368 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3`` | ||
| 2369 | - Level 3.0 | ||
| 2370 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1`` | ||
| 2371 | - Level 3.1 | ||
| 2372 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4`` | ||
| 2373 | - Level 4.0 | ||
| 2374 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1`` | ||
| 2375 | - Level 4.1 | ||
| 2376 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5`` | ||
| 2377 | - Level 5.0 | ||
| 2378 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1`` | ||
| 2379 | - Level 5.1 | ||
| 2380 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2`` | ||
| 2381 | - Level 5.2 | ||
| 2382 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6`` | ||
| 2383 | - Level 6.0 | ||
| 2384 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1`` | ||
| 2385 | - Level 6.1 | ||
| 2386 | * - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2`` | ||
| 2387 | - Level 6.2 | ||
| 2388 | |||
| 2389 | .. raw:: latex | ||
| 2390 | |||
| 2391 | \normalsize | ||
| 2392 | |||
| 2393 | |||
| 2394 | ``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)`` | ||
| 2395 | Indicates the number of evenly spaced subintervals, called ticks, within | ||
| 2396 | one second. This is a 16 bit unsigned integer and has a maximum value up to | ||
| 2397 | 0xffff and a minimum value of 1. | ||
| 2398 | |||
| 2399 | .. _v4l2-hevc-tier: | ||
| 2400 | |||
| 2401 | ``V4L2_CID_MPEG_VIDEO_HEVC_TIER`` | ||
| 2402 | (enum) | ||
| 2403 | |||
| 2404 | enum v4l2_mpeg_video_hevc_tier - | ||
| 2405 | TIER_FLAG specifies tiers information of the HEVC encoded picture. Tier | ||
| 2406 | were made to deal with applications that differ in terms of maximum bit | ||
| 2407 | rate. Setting the flag to 0 selects HEVC tier as Main tier and setting | ||
| 2408 | this flag to 1 indicates High tier. High tier is for applications requiring | ||
| 2409 | high bit rates. | ||
| 2410 | |||
| 2411 | .. raw:: latex | ||
| 2412 | |||
| 2413 | \footnotesize | ||
| 2414 | |||
| 2415 | .. tabularcolumns:: |p{9.0cm}|p{8.0cm}| | ||
| 2416 | |||
| 2417 | .. flat-table:: | ||
| 2418 | :header-rows: 0 | ||
| 2419 | :stub-columns: 0 | ||
| 2420 | |||
| 2421 | * - ``V4L2_MPEG_VIDEO_HEVC_TIER_MAIN`` | ||
| 2422 | - Main tier. | ||
| 2423 | * - ``V4L2_MPEG_VIDEO_HEVC_TIER_HIGH`` | ||
| 2424 | - High tier. | ||
| 2425 | |||
| 2426 | .. raw:: latex | ||
| 2427 | |||
| 2428 | \normalsize | ||
| 2429 | |||
| 2430 | |||
| 2431 | ``V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH (integer)`` | ||
| 2432 | Selects HEVC maximum coding unit depth. | ||
| 2433 | |||
| 2434 | .. _v4l2-hevc-loop-filter-mode: | ||
| 2435 | |||
| 2436 | ``V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE`` | ||
| 2437 | (enum) | ||
| 2438 | |||
| 2439 | enum v4l2_mpeg_video_hevc_loop_filter_mode - | ||
| 2440 | Loop filter mode for HEVC encoder. Possible values are: | ||
| 2441 | |||
| 2442 | .. raw:: latex | ||
| 2443 | |||
| 2444 | \footnotesize | ||
| 2445 | |||
| 2446 | .. tabularcolumns:: |p{10.7cm}|p{6.3cm}| | ||
| 2447 | |||
| 2448 | .. flat-table:: | ||
| 2449 | :header-rows: 0 | ||
| 2450 | :stub-columns: 0 | ||
| 2451 | |||
| 2452 | * - ``V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED`` | ||
| 2453 | - Loop filter is disabled. | ||
| 2454 | * - ``V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_ENABLED`` | ||
| 2455 | - Loop filter is enabled. | ||
| 2456 | * - ``V4L2_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY`` | ||
| 2457 | - Loop filter is disabled at the slice boundary. | ||
| 2458 | |||
| 2459 | .. raw:: latex | ||
| 2460 | |||
| 2461 | \normalsize | ||
| 2462 | |||
| 2463 | |||
| 2464 | ``V4L2_CID_MPEG_VIDEO_HEVC_LF_BETA_OFFSET_DIV2 (integer)`` | ||
| 2465 | Selects HEVC loop filter beta offset. The valid range is [-6, +6]. | ||
| 2466 | |||
| 2467 | ``V4L2_CID_MPEG_VIDEO_HEVC_LF_TC_OFFSET_DIV2 (integer)`` | ||
| 2468 | Selects HEVC loop filter tc offset. The valid range is [-6, +6]. | ||
| 2469 | |||
| 2470 | .. _v4l2-hevc-refresh-type: | ||
| 2471 | |||
| 2472 | ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE`` | ||
| 2473 | (enum) | ||
| 2474 | |||
| 2475 | enum v4l2_mpeg_video_hevc_hier_refresh_type - | ||
| 2476 | Selects refresh type for HEVC encoder. | ||
| 2477 | Host has to specify the period into | ||
| 2478 | V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD. | ||
| 2479 | |||
| 2480 | .. raw:: latex | ||
| 2481 | |||
| 2482 | \footnotesize | ||
| 2483 | |||
| 2484 | .. tabularcolumns:: |p{8.0cm}|p{9.0cm}| | ||
| 2485 | |||
| 2486 | .. flat-table:: | ||
| 2487 | :header-rows: 0 | ||
| 2488 | :stub-columns: 0 | ||
| 2489 | |||
| 2490 | * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_NONE`` | ||
| 2491 | - Use the B frame for hierarchical coding. | ||
| 2492 | * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_CRA`` | ||
| 2493 | - Use CRA (Clean Random Access Unit) picture encoding. | ||
| 2494 | * - ``V4L2_MPEG_VIDEO_HEVC_REFRESH_IDR`` | ||
| 2495 | - Use IDR (Instantaneous Decoding Refresh) picture encoding. | ||
| 2496 | |||
| 2497 | .. raw:: latex | ||
| 2498 | |||
| 2499 | \normalsize | ||
| 2500 | |||
| 2501 | |||
| 2502 | ``V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_PERIOD (integer)`` | ||
| 2503 | Selects the refresh period for HEVC encoder. | ||
| 2504 | This specifies the number of I pictures between two CRA/IDR pictures. | ||
| 2505 | This is valid only if REFRESH_TYPE is not 0. | ||
| 2506 | |||
| 2507 | ``V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU (boolean)`` | ||
| 2508 | Indicates HEVC lossless encoding. Setting it to 0 disables lossless | ||
| 2509 | encoding. Setting it to 1 enables lossless encoding. | ||
| 2510 | |||
| 2511 | ``V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED (boolean)`` | ||
| 2512 | Indicates constant intra prediction for HEVC encoder. Specifies the | ||
| 2513 | constrained intra prediction in which intra largest coding unit (LCU) | ||
| 2514 | prediction is performed by using residual data and decoded samples of | ||
| 2515 | neighboring intra LCU only. Setting the value to 1 enables constant intra | ||
| 2516 | prediction and setting the value to 0 disables constant intra prediction. | ||
| 2517 | |||
| 2518 | ``V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT (boolean)`` | ||
| 2519 | Indicates wavefront parallel processing for HEVC encoder. Setting it to 0 | ||
| 2520 | disables the feature and setting it to 1 enables the wavefront parallel | ||
| 2521 | processing. | ||
| 2522 | |||
| 2523 | ``V4L2_CID_MPEG_VIDEO_HEVC_GENERAL_PB (boolean)`` | ||
| 2524 | Setting the value to 1 enables combination of P and B frame for HEVC | ||
| 2525 | encoder. | ||
| 2526 | |||
| 2527 | ``V4L2_CID_MPEG_VIDEO_HEVC_TEMPORAL_ID (boolean)`` | ||
| 2528 | Indicates temporal identifier for HEVC encoder which is enabled by | ||
| 2529 | setting the value to 1. | ||
| 2530 | |||
| 2531 | ``V4L2_CID_MPEG_VIDEO_HEVC_STRONG_SMOOTHING (boolean)`` | ||
| 2532 | Indicates bi-linear interpolation is conditionally used in the intra | ||
| 2533 | prediction filtering process in the CVS when set to 1. Indicates bi-linear | ||
| 2534 | interpolation is not used in the CVS when set to 0. | ||
| 2535 | |||
| 2536 | ``V4L2_CID_MPEG_VIDEO_HEVC_MAX_NUM_MERGE_MV_MINUS1 (integer)`` | ||
| 2537 | Indicates maximum number of merge candidate motion vectors. | ||
| 2538 | Values are from 0 to 4. | ||
| 2539 | |||
| 2540 | ``V4L2_CID_MPEG_VIDEO_HEVC_TMV_PREDICTION (boolean)`` | ||
| 2541 | Indicates temporal motion vector prediction for HEVC encoder. Setting it to | ||
| 2542 | 1 enables the prediction. Setting it to 0 disables the prediction. | ||
| 2543 | |||
| 2544 | ``V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE (boolean)`` | ||
| 2545 | Specifies if HEVC generates a stream with a size of the length field | ||
| 2546 | instead of start code pattern. The size of the length field is configurable | ||
| 2547 | through the V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD control. Setting | ||
| 2548 | the value to 0 disables encoding without startcode pattern. Setting the | ||
| 2549 | value to 1 will enables encoding without startcode pattern. | ||
| 2550 | |||
| 2551 | .. _v4l2-hevc-size-of-length-field: | ||
| 2552 | |||
| 2553 | ``V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD`` | ||
| 2554 | (enum) | ||
| 2555 | |||
| 2556 | enum v4l2_mpeg_video_hevc_size_of_length_field - | ||
| 2557 | Indicates the size of length field. | ||
| 2558 | This is valid when encoding WITHOUT_STARTCODE_ENABLE is enabled. | ||
| 2559 | |||
| 2560 | .. raw:: latex | ||
| 2561 | |||
| 2562 | \footnotesize | ||
| 2563 | |||
| 2564 | .. tabularcolumns:: |p{6.0cm}|p{11.0cm}| | ||
| 2565 | |||
| 2566 | .. flat-table:: | ||
| 2567 | :header-rows: 0 | ||
| 2568 | :stub-columns: 0 | ||
| 2569 | |||
| 2570 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_0`` | ||
| 2571 | - Generate start code pattern (Normal). | ||
| 2572 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_1`` | ||
| 2573 | - Generate size of length field instead of start code pattern and length is 1. | ||
| 2574 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_2`` | ||
| 2575 | - Generate size of length field instead of start code pattern and length is 2. | ||
| 2576 | * - ``V4L2_MPEG_VIDEO_HEVC_SIZE_4`` | ||
| 2577 | - Generate size of length field instead of start code pattern and length is 4. | ||
| 2578 | |||
| 2579 | .. raw:: latex | ||
| 2580 | |||
| 2581 | \normalsize | ||
| 2582 | |||
| 2583 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR (integer)`` | ||
| 2584 | Indicates bit rate for hierarchical coding layer 0 for HEVC encoder. | ||
| 2585 | |||
| 2586 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR (integer)`` | ||
| 2587 | Indicates bit rate for hierarchical coding layer 1 for HEVC encoder. | ||
| 2588 | |||
| 2589 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR (integer)`` | ||
| 2590 | Indicates bit rate for hierarchical coding layer 2 for HEVC encoder. | ||
| 2591 | |||
| 2592 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR (integer)`` | ||
| 2593 | Indicates bit rate for hierarchical coding layer 3 for HEVC encoder. | ||
| 2594 | |||
| 2595 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR (integer)`` | ||
| 2596 | Indicates bit rate for hierarchical coding layer 4 for HEVC encoder. | ||
| 2597 | |||
| 2598 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR (integer)`` | ||
| 2599 | Indicates bit rate for hierarchical coding layer 5 for HEVC encoder. | ||
| 2600 | |||
| 2601 | ``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L6_BR (integer)`` | ||
| 2602 | Indicates bit rate for hierarchical coding layer 6 for HEVC encoder. | ||
| 2603 | |||
| 2604 | ``V4L2_CID_MPEG_VIDEO_REF_NUMBER_FOR_PFRAMES (integer)`` | ||
| 2605 | Selects number of P reference pictures required for HEVC encoder. | ||
| 2606 | P-Frame can use 1 or 2 frames for reference. | ||
| 2607 | |||
| 2608 | ``V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR (integer)`` | ||
| 2609 | Indicates whether to generate SPS and PPS at every IDR. Setting it to 0 | ||
| 2610 | disables generating SPS and PPS at every IDR. Setting it to one enables | ||
| 2611 | generating SPS and PPS at every IDR. | ||
| 2612 | |||
| 2613 | |||
| 2614 | .. _camera-controls: | ||
| 2615 | |||
| 2616 | Camera Control Reference | ||
| 2617 | ======================== | ||
| 2618 | |||
| 2619 | The Camera class includes controls for mechanical (or equivalent | ||
| 2620 | digital) features of a device such as controllable lenses or sensors. | ||
| 2621 | |||
| 2622 | |||
| 2623 | .. _camera-control-id: | ||
| 2624 | |||
| 2625 | Camera Control IDs | ||
| 2626 | ------------------ | ||
| 2627 | |||
| 2628 | ``V4L2_CID_CAMERA_CLASS (class)`` | ||
| 2629 | The Camera class descriptor. Calling | ||
| 2630 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 2631 | return a description of this control class. | ||
| 2632 | |||
| 2633 | .. _v4l2-exposure-auto-type: | ||
| 2634 | |||
| 2635 | ``V4L2_CID_EXPOSURE_AUTO`` | ||
| 2636 | (enum) | ||
| 2637 | |||
| 2638 | enum v4l2_exposure_auto_type - | ||
| 2639 | Enables automatic adjustments of the exposure time and/or iris | ||
| 2640 | aperture. The effect of manual changes of the exposure time or iris | ||
| 2641 | aperture while these features are enabled is undefined, drivers | ||
| 2642 | should ignore such requests. Possible values are: | ||
| 2643 | |||
| 2644 | |||
| 2645 | |||
| 2646 | .. flat-table:: | ||
| 2647 | :header-rows: 0 | ||
| 2648 | :stub-columns: 0 | ||
| 2649 | |||
| 2650 | * - ``V4L2_EXPOSURE_AUTO`` | ||
| 2651 | - Automatic exposure time, automatic iris aperture. | ||
| 2652 | * - ``V4L2_EXPOSURE_MANUAL`` | ||
| 2653 | - Manual exposure time, manual iris. | ||
| 2654 | * - ``V4L2_EXPOSURE_SHUTTER_PRIORITY`` | ||
| 2655 | - Manual exposure time, auto iris. | ||
| 2656 | * - ``V4L2_EXPOSURE_APERTURE_PRIORITY`` | ||
| 2657 | - Auto exposure time, manual iris. | ||
| 2658 | |||
| 2659 | |||
| 2660 | |||
| 2661 | ``V4L2_CID_EXPOSURE_ABSOLUTE (integer)`` | ||
| 2662 | Determines the exposure time of the camera sensor. The exposure time | ||
| 2663 | is limited by the frame interval. Drivers should interpret the | ||
| 2664 | values as 100 µs units, where the value 1 stands for 1/10000th of a | ||
| 2665 | second, 10000 for 1 second and 100000 for 10 seconds. | ||
| 2666 | |||
| 2667 | ``V4L2_CID_EXPOSURE_AUTO_PRIORITY (boolean)`` | ||
| 2668 | When ``V4L2_CID_EXPOSURE_AUTO`` is set to ``AUTO`` or | ||
| 2669 | ``APERTURE_PRIORITY``, this control determines if the device may | ||
| 2670 | dynamically vary the frame rate. By default this feature is disabled | ||
| 2671 | (0) and the frame rate must remain constant. | ||
| 2672 | |||
| 2673 | ``V4L2_CID_AUTO_EXPOSURE_BIAS (integer menu)`` | ||
| 2674 | Determines the automatic exposure compensation, it is effective only | ||
| 2675 | when ``V4L2_CID_EXPOSURE_AUTO`` control is set to ``AUTO``, | ||
| 2676 | ``SHUTTER_PRIORITY`` or ``APERTURE_PRIORITY``. It is expressed in | ||
| 2677 | terms of EV, drivers should interpret the values as 0.001 EV units, | ||
| 2678 | where the value 1000 stands for +1 EV. | ||
| 2679 | |||
| 2680 | Increasing the exposure compensation value is equivalent to | ||
| 2681 | decreasing the exposure value (EV) and will increase the amount of | ||
| 2682 | light at the image sensor. The camera performs the exposure | ||
| 2683 | compensation by adjusting absolute exposure time and/or aperture. | ||
| 2684 | |||
| 2685 | .. _v4l2-exposure-metering: | ||
| 2686 | |||
| 2687 | ``V4L2_CID_EXPOSURE_METERING`` | ||
| 2688 | (enum) | ||
| 2689 | |||
| 2690 | enum v4l2_exposure_metering - | ||
| 2691 | Determines how the camera measures the amount of light available for | ||
| 2692 | the frame exposure. Possible values are: | ||
| 2693 | |||
| 2694 | .. tabularcolumns:: |p{8.5cm}|p{9.0cm}| | ||
| 2695 | |||
| 2696 | .. flat-table:: | ||
| 2697 | :header-rows: 0 | ||
| 2698 | :stub-columns: 0 | ||
| 2699 | |||
| 2700 | * - ``V4L2_EXPOSURE_METERING_AVERAGE`` | ||
| 2701 | - Use the light information coming from the entire frame and average | ||
| 2702 | giving no weighting to any particular portion of the metered area. | ||
| 2703 | * - ``V4L2_EXPOSURE_METERING_CENTER_WEIGHTED`` | ||
| 2704 | - Average the light information coming from the entire frame giving | ||
| 2705 | priority to the center of the metered area. | ||
| 2706 | * - ``V4L2_EXPOSURE_METERING_SPOT`` | ||
| 2707 | - Measure only very small area at the center of the frame. | ||
| 2708 | * - ``V4L2_EXPOSURE_METERING_MATRIX`` | ||
| 2709 | - A multi-zone metering. The light intensity is measured in several | ||
| 2710 | points of the frame and the results are combined. The algorithm of | ||
| 2711 | the zones selection and their significance in calculating the | ||
| 2712 | final value is device dependent. | ||
| 2713 | |||
| 2714 | |||
| 2715 | |||
| 2716 | ``V4L2_CID_PAN_RELATIVE (integer)`` | ||
| 2717 | This control turns the camera horizontally by the specified amount. | ||
| 2718 | The unit is undefined. A positive value moves the camera to the | ||
| 2719 | right (clockwise when viewed from above), a negative value to the | ||
| 2720 | left. A value of zero does not cause motion. This is a write-only | ||
| 2721 | control. | ||
| 2722 | |||
| 2723 | ``V4L2_CID_TILT_RELATIVE (integer)`` | ||
| 2724 | This control turns the camera vertically by the specified amount. | ||
| 2725 | The unit is undefined. A positive value moves the camera up, a | ||
| 2726 | negative value down. A value of zero does not cause motion. This is | ||
| 2727 | a write-only control. | ||
| 2728 | |||
| 2729 | ``V4L2_CID_PAN_RESET (button)`` | ||
| 2730 | When this control is set, the camera moves horizontally to the | ||
| 2731 | default position. | ||
| 2732 | |||
| 2733 | ``V4L2_CID_TILT_RESET (button)`` | ||
| 2734 | When this control is set, the camera moves vertically to the default | ||
| 2735 | position. | ||
| 2736 | |||
| 2737 | ``V4L2_CID_PAN_ABSOLUTE (integer)`` | ||
| 2738 | This control turns the camera horizontally to the specified | ||
| 2739 | position. Positive values move the camera to the right (clockwise | ||
| 2740 | when viewed from above), negative values to the left. Drivers should | ||
| 2741 | interpret the values as arc seconds, with valid values between -180 | ||
| 2742 | * 3600 and +180 * 3600 inclusive. | ||
| 2743 | |||
| 2744 | ``V4L2_CID_TILT_ABSOLUTE (integer)`` | ||
| 2745 | This control turns the camera vertically to the specified position. | ||
| 2746 | Positive values move the camera up, negative values down. Drivers | ||
| 2747 | should interpret the values as arc seconds, with valid values | ||
| 2748 | between -180 * 3600 and +180 * 3600 inclusive. | ||
| 2749 | |||
| 2750 | ``V4L2_CID_FOCUS_ABSOLUTE (integer)`` | ||
| 2751 | This control sets the focal point of the camera to the specified | ||
| 2752 | position. The unit is undefined. Positive values set the focus | ||
| 2753 | closer to the camera, negative values towards infinity. | ||
| 2754 | |||
| 2755 | ``V4L2_CID_FOCUS_RELATIVE (integer)`` | ||
| 2756 | This control moves the focal point of the camera by the specified | ||
| 2757 | amount. The unit is undefined. Positive values move the focus closer | ||
| 2758 | to the camera, negative values towards infinity. This is a | ||
| 2759 | write-only control. | ||
| 2760 | |||
| 2761 | ``V4L2_CID_FOCUS_AUTO (boolean)`` | ||
| 2762 | Enables continuous automatic focus adjustments. The effect of manual | ||
| 2763 | focus adjustments while this feature is enabled is undefined, | ||
| 2764 | drivers should ignore such requests. | ||
| 2765 | |||
| 2766 | ``V4L2_CID_AUTO_FOCUS_START (button)`` | ||
| 2767 | Starts single auto focus process. The effect of setting this control | ||
| 2768 | when ``V4L2_CID_FOCUS_AUTO`` is set to ``TRUE`` (1) is undefined, | ||
| 2769 | drivers should ignore such requests. | ||
| 2770 | |||
| 2771 | ``V4L2_CID_AUTO_FOCUS_STOP (button)`` | ||
| 2772 | Aborts automatic focusing started with ``V4L2_CID_AUTO_FOCUS_START`` | ||
| 2773 | control. It is effective only when the continuous autofocus is | ||
| 2774 | disabled, that is when ``V4L2_CID_FOCUS_AUTO`` control is set to | ||
| 2775 | ``FALSE`` (0). | ||
| 2776 | |||
| 2777 | .. _v4l2-auto-focus-status: | ||
| 2778 | |||
| 2779 | ``V4L2_CID_AUTO_FOCUS_STATUS (bitmask)`` | ||
| 2780 | The automatic focus status. This is a read-only control. | ||
| 2781 | |||
| 2782 | Setting ``V4L2_LOCK_FOCUS`` lock bit of the ``V4L2_CID_3A_LOCK`` | ||
| 2783 | control may stop updates of the ``V4L2_CID_AUTO_FOCUS_STATUS`` | ||
| 2784 | control value. | ||
| 2785 | |||
| 2786 | .. tabularcolumns:: |p{6.5cm}|p{11.0cm}| | ||
| 2787 | |||
| 2788 | .. flat-table:: | ||
| 2789 | :header-rows: 0 | ||
| 2790 | :stub-columns: 0 | ||
| 2791 | |||
| 2792 | * - ``V4L2_AUTO_FOCUS_STATUS_IDLE`` | ||
| 2793 | - Automatic focus is not active. | ||
| 2794 | * - ``V4L2_AUTO_FOCUS_STATUS_BUSY`` | ||
| 2795 | - Automatic focusing is in progress. | ||
| 2796 | * - ``V4L2_AUTO_FOCUS_STATUS_REACHED`` | ||
| 2797 | - Focus has been reached. | ||
| 2798 | * - ``V4L2_AUTO_FOCUS_STATUS_FAILED`` | ||
| 2799 | - Automatic focus has failed, the driver will not transition from | ||
| 2800 | this state until another action is performed by an application. | ||
| 2801 | |||
| 2802 | |||
| 2803 | |||
| 2804 | .. _v4l2-auto-focus-range: | ||
| 2805 | |||
| 2806 | ``V4L2_CID_AUTO_FOCUS_RANGE`` | ||
| 2807 | (enum) | ||
| 2808 | |||
| 2809 | enum v4l2_auto_focus_range - | ||
| 2810 | Determines auto focus distance range for which lens may be adjusted. | ||
| 2811 | |||
| 2812 | .. tabularcolumns:: |p{6.5cm}|p{11.0cm}| | ||
| 2813 | |||
| 2814 | .. flat-table:: | ||
| 2815 | :header-rows: 0 | ||
| 2816 | :stub-columns: 0 | ||
| 2817 | |||
| 2818 | * - ``V4L2_AUTO_FOCUS_RANGE_AUTO`` | ||
| 2819 | - The camera automatically selects the focus range. | ||
| 2820 | * - ``V4L2_AUTO_FOCUS_RANGE_NORMAL`` | ||
| 2821 | - Normal distance range, limited for best automatic focus | ||
| 2822 | performance. | ||
| 2823 | * - ``V4L2_AUTO_FOCUS_RANGE_MACRO`` | ||
| 2824 | - Macro (close-up) auto focus. The camera will use its minimum | ||
| 2825 | possible distance for auto focus. | ||
| 2826 | * - ``V4L2_AUTO_FOCUS_RANGE_INFINITY`` | ||
| 2827 | - The lens is set to focus on an object at infinite distance. | ||
| 2828 | |||
| 2829 | |||
| 2830 | |||
| 2831 | ``V4L2_CID_ZOOM_ABSOLUTE (integer)`` | ||
| 2832 | Specify the objective lens focal length as an absolute value. The | ||
| 2833 | zoom unit is driver-specific and its value should be a positive | ||
| 2834 | integer. | ||
| 2835 | |||
| 2836 | ``V4L2_CID_ZOOM_RELATIVE (integer)`` | ||
| 2837 | Specify the objective lens focal length relatively to the current | ||
| 2838 | value. Positive values move the zoom lens group towards the | ||
| 2839 | telephoto direction, negative values towards the wide-angle | ||
| 2840 | direction. The zoom unit is driver-specific. This is a write-only | ||
| 2841 | control. | ||
| 2842 | |||
| 2843 | ``V4L2_CID_ZOOM_CONTINUOUS (integer)`` | ||
| 2844 | Move the objective lens group at the specified speed until it | ||
| 2845 | reaches physical device limits or until an explicit request to stop | ||
| 2846 | the movement. A positive value moves the zoom lens group towards the | ||
| 2847 | telephoto direction. A value of zero stops the zoom lens group | ||
| 2848 | movement. A negative value moves the zoom lens group towards the | ||
| 2849 | wide-angle direction. The zoom speed unit is driver-specific. | ||
| 2850 | |||
| 2851 | ``V4L2_CID_IRIS_ABSOLUTE (integer)`` | ||
| 2852 | This control sets the camera's aperture to the specified value. The | ||
| 2853 | unit is undefined. Larger values open the iris wider, smaller values | ||
| 2854 | close it. | ||
| 2855 | |||
| 2856 | ``V4L2_CID_IRIS_RELATIVE (integer)`` | ||
| 2857 | This control modifies the camera's aperture by the specified amount. | ||
| 2858 | The unit is undefined. Positive values open the iris one step | ||
| 2859 | further, negative values close it one step further. This is a | ||
| 2860 | write-only control. | ||
| 2861 | |||
| 2862 | ``V4L2_CID_PRIVACY (boolean)`` | ||
| 2863 | Prevent video from being acquired by the camera. When this control | ||
| 2864 | is set to ``TRUE`` (1), no image can be captured by the camera. | ||
| 2865 | Common means to enforce privacy are mechanical obturation of the | ||
| 2866 | sensor and firmware image processing, but the device is not | ||
| 2867 | restricted to these methods. Devices that implement the privacy | ||
| 2868 | control must support read access and may support write access. | ||
| 2869 | |||
| 2870 | ``V4L2_CID_BAND_STOP_FILTER (integer)`` | ||
| 2871 | Switch the band-stop filter of a camera sensor on or off, or specify | ||
| 2872 | its strength. Such band-stop filters can be used, for example, to | ||
| 2873 | filter out the fluorescent light component. | ||
| 2874 | |||
| 2875 | .. _v4l2-auto-n-preset-white-balance: | ||
| 2876 | |||
| 2877 | ``V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE`` | ||
| 2878 | (enum) | ||
| 2879 | |||
| 2880 | enum v4l2_auto_n_preset_white_balance - | ||
| 2881 | Sets white balance to automatic, manual or a preset. The presets | ||
| 2882 | determine color temperature of the light as a hint to the camera for | ||
| 2883 | white balance adjustments resulting in most accurate color | ||
| 2884 | representation. The following white balance presets are listed in | ||
| 2885 | order of increasing color temperature. | ||
| 2886 | |||
| 2887 | .. tabularcolumns:: |p{7.0 cm}|p{10.5cm}| | ||
| 2888 | |||
| 2889 | .. flat-table:: | ||
| 2890 | :header-rows: 0 | ||
| 2891 | :stub-columns: 0 | ||
| 2892 | |||
| 2893 | * - ``V4L2_WHITE_BALANCE_MANUAL`` | ||
| 2894 | - Manual white balance. | ||
| 2895 | * - ``V4L2_WHITE_BALANCE_AUTO`` | ||
| 2896 | - Automatic white balance adjustments. | ||
| 2897 | * - ``V4L2_WHITE_BALANCE_INCANDESCENT`` | ||
| 2898 | - White balance setting for incandescent (tungsten) lighting. It | ||
| 2899 | generally cools down the colors and corresponds approximately to | ||
| 2900 | 2500...3500 K color temperature range. | ||
| 2901 | * - ``V4L2_WHITE_BALANCE_FLUORESCENT`` | ||
| 2902 | - White balance preset for fluorescent lighting. It corresponds | ||
| 2903 | approximately to 4000...5000 K color temperature. | ||
| 2904 | * - ``V4L2_WHITE_BALANCE_FLUORESCENT_H`` | ||
| 2905 | - With this setting the camera will compensate for fluorescent H | ||
| 2906 | lighting. | ||
| 2907 | * - ``V4L2_WHITE_BALANCE_HORIZON`` | ||
| 2908 | - White balance setting for horizon daylight. It corresponds | ||
| 2909 | approximately to 5000 K color temperature. | ||
| 2910 | * - ``V4L2_WHITE_BALANCE_DAYLIGHT`` | ||
| 2911 | - White balance preset for daylight (with clear sky). It corresponds | ||
| 2912 | approximately to 5000...6500 K color temperature. | ||
| 2913 | * - ``V4L2_WHITE_BALANCE_FLASH`` | ||
| 2914 | - With this setting the camera will compensate for the flash light. | ||
| 2915 | It slightly warms up the colors and corresponds roughly to | ||
| 2916 | 5000...5500 K color temperature. | ||
| 2917 | * - ``V4L2_WHITE_BALANCE_CLOUDY`` | ||
| 2918 | - White balance preset for moderately overcast sky. This option | ||
| 2919 | corresponds approximately to 6500...8000 K color temperature | ||
| 2920 | range. | ||
| 2921 | * - ``V4L2_WHITE_BALANCE_SHADE`` | ||
| 2922 | - White balance preset for shade or heavily overcast sky. It | ||
| 2923 | corresponds approximately to 9000...10000 K color temperature. | ||
| 2924 | |||
| 2925 | |||
| 2926 | |||
| 2927 | .. _v4l2-wide-dynamic-range: | ||
| 2928 | |||
| 2929 | ``V4L2_CID_WIDE_DYNAMIC_RANGE (boolean)`` | ||
| 2930 | Enables or disables the camera's wide dynamic range feature. This | ||
| 2931 | feature allows to obtain clear images in situations where intensity | ||
| 2932 | of the illumination varies significantly throughout the scene, i.e. | ||
| 2933 | there are simultaneously very dark and very bright areas. It is most | ||
| 2934 | commonly realized in cameras by combining two subsequent frames with | ||
| 2935 | different exposure times. [#f1]_ | ||
| 2936 | |||
| 2937 | .. _v4l2-image-stabilization: | ||
| 2938 | |||
| 2939 | ``V4L2_CID_IMAGE_STABILIZATION (boolean)`` | ||
| 2940 | Enables or disables image stabilization. | ||
| 2941 | |||
| 2942 | ``V4L2_CID_ISO_SENSITIVITY (integer menu)`` | ||
| 2943 | Determines ISO equivalent of an image sensor indicating the sensor's | ||
| 2944 | sensitivity to light. The numbers are expressed in arithmetic scale, | ||
| 2945 | as per :ref:`iso12232` standard, where doubling the sensor | ||
| 2946 | sensitivity is represented by doubling the numerical ISO value. | ||
| 2947 | Applications should interpret the values as standard ISO values | ||
| 2948 | multiplied by 1000, e.g. control value 800 stands for ISO 0.8. | ||
| 2949 | Drivers will usually support only a subset of standard ISO values. | ||
| 2950 | The effect of setting this control while the | ||
| 2951 | ``V4L2_CID_ISO_SENSITIVITY_AUTO`` control is set to a value other | ||
| 2952 | than ``V4L2_CID_ISO_SENSITIVITY_MANUAL`` is undefined, drivers | ||
| 2953 | should ignore such requests. | ||
| 2954 | |||
| 2955 | .. _v4l2-iso-sensitivity-auto-type: | ||
| 2956 | |||
| 2957 | ``V4L2_CID_ISO_SENSITIVITY_AUTO`` | ||
| 2958 | (enum) | ||
| 2959 | |||
| 2960 | enum v4l2_iso_sensitivity_type - | ||
| 2961 | Enables or disables automatic ISO sensitivity adjustments. | ||
| 2962 | |||
| 2963 | |||
| 2964 | |||
| 2965 | .. flat-table:: | ||
| 2966 | :header-rows: 0 | ||
| 2967 | :stub-columns: 0 | ||
| 2968 | |||
| 2969 | * - ``V4L2_CID_ISO_SENSITIVITY_MANUAL`` | ||
| 2970 | - Manual ISO sensitivity. | ||
| 2971 | * - ``V4L2_CID_ISO_SENSITIVITY_AUTO`` | ||
| 2972 | - Automatic ISO sensitivity adjustments. | ||
| 2973 | |||
| 2974 | |||
| 2975 | |||
| 2976 | .. _v4l2-scene-mode: | ||
| 2977 | |||
| 2978 | ``V4L2_CID_SCENE_MODE`` | ||
| 2979 | (enum) | ||
| 2980 | |||
| 2981 | enum v4l2_scene_mode - | ||
| 2982 | This control allows to select scene programs as the camera automatic | ||
| 2983 | modes optimized for common shooting scenes. Within these modes the | ||
| 2984 | camera determines best exposure, aperture, focusing, light metering, | ||
| 2985 | white balance and equivalent sensitivity. The controls of those | ||
| 2986 | parameters are influenced by the scene mode control. An exact | ||
| 2987 | behavior in each mode is subject to the camera specification. | ||
| 2988 | |||
| 2989 | When the scene mode feature is not used, this control should be set | ||
| 2990 | to ``V4L2_SCENE_MODE_NONE`` to make sure the other possibly related | ||
| 2991 | controls are accessible. The following scene programs are defined: | ||
| 2992 | |||
| 2993 | .. tabularcolumns:: |p{6.0cm}|p{11.5cm}| | ||
| 2994 | |||
| 2995 | .. flat-table:: | ||
| 2996 | :header-rows: 0 | ||
| 2997 | :stub-columns: 0 | ||
| 2998 | |||
| 2999 | * - ``V4L2_SCENE_MODE_NONE`` | ||
| 3000 | - The scene mode feature is disabled. | ||
| 3001 | * - ``V4L2_SCENE_MODE_BACKLIGHT`` | ||
| 3002 | - Backlight. Compensates for dark shadows when light is coming from | ||
| 3003 | behind a subject, also by automatically turning on the flash. | ||
| 3004 | * - ``V4L2_SCENE_MODE_BEACH_SNOW`` | ||
| 3005 | - Beach and snow. This mode compensates for all-white or bright | ||
| 3006 | scenes, which tend to look gray and low contrast, when camera's | ||
| 3007 | automatic exposure is based on an average scene brightness. To | ||
| 3008 | compensate, this mode automatically slightly overexposes the | ||
| 3009 | frames. The white balance may also be adjusted to compensate for | ||
| 3010 | the fact that reflected snow looks bluish rather than white. | ||
| 3011 | * - ``V4L2_SCENE_MODE_CANDLELIGHT`` | ||
| 3012 | - Candle light. The camera generally raises the ISO sensitivity and | ||
| 3013 | lowers the shutter speed. This mode compensates for relatively | ||
| 3014 | close subject in the scene. The flash is disabled in order to | ||
| 3015 | preserve the ambiance of the light. | ||
| 3016 | * - ``V4L2_SCENE_MODE_DAWN_DUSK`` | ||
| 3017 | - Dawn and dusk. Preserves the colors seen in low natural light | ||
| 3018 | before dusk and after down. The camera may turn off the flash, and | ||
| 3019 | automatically focus at infinity. It will usually boost saturation | ||
| 3020 | and lower the shutter speed. | ||
| 3021 | * - ``V4L2_SCENE_MODE_FALL_COLORS`` | ||
| 3022 | - Fall colors. Increases saturation and adjusts white balance for | ||
| 3023 | color enhancement. Pictures of autumn leaves get saturated reds | ||
| 3024 | and yellows. | ||
| 3025 | * - ``V4L2_SCENE_MODE_FIREWORKS`` | ||
| 3026 | - Fireworks. Long exposure times are used to capture the expanding | ||
| 3027 | burst of light from a firework. The camera may invoke image | ||
| 3028 | stabilization. | ||
| 3029 | * - ``V4L2_SCENE_MODE_LANDSCAPE`` | ||
| 3030 | - Landscape. The camera may choose a small aperture to provide deep | ||
| 3031 | depth of field and long exposure duration to help capture detail | ||
| 3032 | in dim light conditions. The focus is fixed at infinity. Suitable | ||
| 3033 | for distant and wide scenery. | ||
| 3034 | * - ``V4L2_SCENE_MODE_NIGHT`` | ||
| 3035 | - Night, also known as Night Landscape. Designed for low light | ||
| 3036 | conditions, it preserves detail in the dark areas without blowing | ||
| 3037 | out bright objects. The camera generally sets itself to a | ||
| 3038 | medium-to-high ISO sensitivity, with a relatively long exposure | ||
| 3039 | time, and turns flash off. As such, there will be increased image | ||
| 3040 | noise and the possibility of blurred image. | ||
| 3041 | * - ``V4L2_SCENE_MODE_PARTY_INDOOR`` | ||
| 3042 | - Party and indoor. Designed to capture indoor scenes that are lit | ||
| 3043 | by indoor background lighting as well as the flash. The camera | ||
| 3044 | usually increases ISO sensitivity, and adjusts exposure for the | ||
| 3045 | low light conditions. | ||
| 3046 | * - ``V4L2_SCENE_MODE_PORTRAIT`` | ||
| 3047 | - Portrait. The camera adjusts the aperture so that the depth of | ||
| 3048 | field is reduced, which helps to isolate the subject against a | ||
| 3049 | smooth background. Most cameras recognize the presence of faces in | ||
| 3050 | the scene and focus on them. The color hue is adjusted to enhance | ||
| 3051 | skin tones. The intensity of the flash is often reduced. | ||
| 3052 | * - ``V4L2_SCENE_MODE_SPORTS`` | ||
| 3053 | - Sports. Significantly increases ISO and uses a fast shutter speed | ||
| 3054 | to freeze motion of rapidly-moving subjects. Increased image noise | ||
| 3055 | may be seen in this mode. | ||
| 3056 | * - ``V4L2_SCENE_MODE_SUNSET`` | ||
| 3057 | - Sunset. Preserves deep hues seen in sunsets and sunrises. It bumps | ||
| 3058 | up the saturation. | ||
| 3059 | * - ``V4L2_SCENE_MODE_TEXT`` | ||
| 3060 | - Text. It applies extra contrast and sharpness, it is typically a | ||
| 3061 | black-and-white mode optimized for readability. Automatic focus | ||
| 3062 | may be switched to close-up mode and this setting may also involve | ||
| 3063 | some lens-distortion correction. | ||
| 3064 | |||
| 3065 | |||
| 3066 | |||
| 3067 | ``V4L2_CID_3A_LOCK (bitmask)`` | ||
| 3068 | This control locks or unlocks the automatic focus, exposure and | ||
| 3069 | white balance. The automatic adjustments can be paused independently | ||
| 3070 | by setting the corresponding lock bit to 1. The camera then retains | ||
| 3071 | the settings until the lock bit is cleared. The following lock bits | ||
| 3072 | are defined: | ||
| 3073 | |||
| 3074 | When a given algorithm is not enabled, drivers should ignore | ||
| 3075 | requests to lock it and should return no error. An example might be | ||
| 3076 | an application setting bit ``V4L2_LOCK_WHITE_BALANCE`` when the | ||
| 3077 | ``V4L2_CID_AUTO_WHITE_BALANCE`` control is set to ``FALSE``. The | ||
| 3078 | value of this control may be changed by exposure, white balance or | ||
| 3079 | focus controls. | ||
| 3080 | |||
| 3081 | |||
| 3082 | |||
| 3083 | .. flat-table:: | ||
| 3084 | :header-rows: 0 | ||
| 3085 | :stub-columns: 0 | ||
| 3086 | |||
| 3087 | * - ``V4L2_LOCK_EXPOSURE`` | ||
| 3088 | - Automatic exposure adjustments lock. | ||
| 3089 | * - ``V4L2_LOCK_WHITE_BALANCE`` | ||
| 3090 | - Automatic white balance adjustments lock. | ||
| 3091 | * - ``V4L2_LOCK_FOCUS`` | ||
| 3092 | - Automatic focus lock. | ||
| 3093 | |||
| 3094 | |||
| 3095 | |||
| 3096 | ``V4L2_CID_PAN_SPEED (integer)`` | ||
| 3097 | This control turns the camera horizontally at the specific speed. | ||
| 3098 | The unit is undefined. A positive value moves the camera to the | ||
| 3099 | right (clockwise when viewed from above), a negative value to the | ||
| 3100 | left. A value of zero stops the motion if one is in progress and has | ||
| 3101 | no effect otherwise. | ||
| 3102 | |||
| 3103 | ``V4L2_CID_TILT_SPEED (integer)`` | ||
| 3104 | This control turns the camera vertically at the specified speed. The | ||
| 3105 | unit is undefined. A positive value moves the camera up, a negative | ||
| 3106 | value down. A value of zero stops the motion if one is in progress | ||
| 3107 | and has no effect otherwise. | ||
| 3108 | |||
| 3109 | |||
| 3110 | .. _fm-tx-controls: | ||
| 3111 | |||
| 3112 | FM Transmitter Control Reference | ||
| 3113 | ================================ | ||
| 3114 | |||
| 3115 | The FM Transmitter (FM_TX) class includes controls for common features | ||
| 3116 | of FM transmissions capable devices. Currently this class includes | ||
| 3117 | parameters for audio compression, pilot tone generation, audio deviation | ||
| 3118 | limiter, RDS transmission and tuning power features. | ||
| 3119 | |||
| 3120 | |||
| 3121 | .. _fm-tx-control-id: | ||
| 3122 | |||
| 3123 | FM_TX Control IDs | ||
| 3124 | ----------------- | ||
| 3125 | |||
| 3126 | ``V4L2_CID_FM_TX_CLASS (class)`` | ||
| 3127 | The FM_TX class descriptor. Calling | ||
| 3128 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 3129 | return a description of this control class. | ||
| 3130 | |||
| 3131 | ``V4L2_CID_RDS_TX_DEVIATION (integer)`` | ||
| 3132 | Configures RDS signal frequency deviation level in Hz. The range and | ||
| 3133 | step are driver-specific. | ||
| 3134 | |||
| 3135 | ``V4L2_CID_RDS_TX_PI (integer)`` | ||
| 3136 | Sets the RDS Programme Identification field for transmission. | ||
| 3137 | |||
| 3138 | ``V4L2_CID_RDS_TX_PTY (integer)`` | ||
| 3139 | Sets the RDS Programme Type field for transmission. This encodes up | ||
| 3140 | to 31 pre-defined programme types. | ||
| 3141 | |||
| 3142 | ``V4L2_CID_RDS_TX_PS_NAME (string)`` | ||
| 3143 | Sets the Programme Service name (PS_NAME) for transmission. It is | ||
| 3144 | intended for static display on a receiver. It is the primary aid to | ||
| 3145 | listeners in programme service identification and selection. In | ||
| 3146 | Annex E of :ref:`iec62106`, the RDS specification, there is a full | ||
| 3147 | description of the correct character encoding for Programme Service | ||
| 3148 | name strings. Also from RDS specification, PS is usually a single | ||
| 3149 | eight character text. However, it is also possible to find receivers | ||
| 3150 | which can scroll strings sized as 8 x N characters. So, this control | ||
| 3151 | must be configured with steps of 8 characters. The result is it must | ||
| 3152 | always contain a string with size multiple of 8. | ||
| 3153 | |||
| 3154 | ``V4L2_CID_RDS_TX_RADIO_TEXT (string)`` | ||
| 3155 | Sets the Radio Text info for transmission. It is a textual | ||
| 3156 | description of what is being broadcasted. RDS Radio Text can be | ||
| 3157 | applied when broadcaster wishes to transmit longer PS names, | ||
| 3158 | programme-related information or any other text. In these cases, | ||
| 3159 | RadioText should be used in addition to ``V4L2_CID_RDS_TX_PS_NAME``. | ||
| 3160 | The encoding for Radio Text strings is also fully described in Annex | ||
| 3161 | E of :ref:`iec62106`. The length of Radio Text strings depends on | ||
| 3162 | which RDS Block is being used to transmit it, either 32 (2A block) | ||
| 3163 | or 64 (2B block). However, it is also possible to find receivers | ||
| 3164 | which can scroll strings sized as 32 x N or 64 x N characters. So, | ||
| 3165 | this control must be configured with steps of 32 or 64 characters. | ||
| 3166 | The result is it must always contain a string with size multiple of | ||
| 3167 | 32 or 64. | ||
| 3168 | |||
| 3169 | ``V4L2_CID_RDS_TX_MONO_STEREO (boolean)`` | ||
| 3170 | Sets the Mono/Stereo bit of the Decoder Identification code. If set, | ||
| 3171 | then the audio was recorded as stereo. | ||
| 3172 | |||
| 3173 | ``V4L2_CID_RDS_TX_ARTIFICIAL_HEAD (boolean)`` | ||
| 3174 | Sets the | ||
| 3175 | `Artificial Head <http://en.wikipedia.org/wiki/Artificial_head>`__ | ||
| 3176 | bit of the Decoder Identification code. If set, then the audio was | ||
| 3177 | recorded using an artificial head. | ||
| 3178 | |||
| 3179 | ``V4L2_CID_RDS_TX_COMPRESSED (boolean)`` | ||
| 3180 | Sets the Compressed bit of the Decoder Identification code. If set, | ||
| 3181 | then the audio is compressed. | ||
| 3182 | |||
| 3183 | ``V4L2_CID_RDS_TX_DYNAMIC_PTY (boolean)`` | ||
| 3184 | Sets the Dynamic PTY bit of the Decoder Identification code. If set, | ||
| 3185 | then the PTY code is dynamically switched. | ||
| 3186 | |||
| 3187 | ``V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT (boolean)`` | ||
| 3188 | If set, then a traffic announcement is in progress. | ||
| 3189 | |||
| 3190 | ``V4L2_CID_RDS_TX_TRAFFIC_PROGRAM (boolean)`` | ||
| 3191 | If set, then the tuned programme carries traffic announcements. | ||
| 3192 | |||
| 3193 | ``V4L2_CID_RDS_TX_MUSIC_SPEECH (boolean)`` | ||
| 3194 | If set, then this channel broadcasts music. If cleared, then it | ||
| 3195 | broadcasts speech. If the transmitter doesn't make this distinction, | ||
| 3196 | then it should be set. | ||
| 3197 | |||
| 3198 | ``V4L2_CID_RDS_TX_ALT_FREQS_ENABLE (boolean)`` | ||
| 3199 | If set, then transmit alternate frequencies. | ||
| 3200 | |||
| 3201 | ``V4L2_CID_RDS_TX_ALT_FREQS (__u32 array)`` | ||
| 3202 | The alternate frequencies in kHz units. The RDS standard allows for | ||
| 3203 | up to 25 frequencies to be defined. Drivers may support fewer | ||
| 3204 | frequencies so check the array size. | ||
| 3205 | |||
| 3206 | ``V4L2_CID_AUDIO_LIMITER_ENABLED (boolean)`` | ||
| 3207 | Enables or disables the audio deviation limiter feature. The limiter | ||
| 3208 | is useful when trying to maximize the audio volume, minimize | ||
| 3209 | receiver-generated distortion and prevent overmodulation. | ||
| 3210 | |||
| 3211 | ``V4L2_CID_AUDIO_LIMITER_RELEASE_TIME (integer)`` | ||
| 3212 | Sets the audio deviation limiter feature release time. Unit is in | ||
| 3213 | useconds. Step and range are driver-specific. | ||
| 3214 | |||
| 3215 | ``V4L2_CID_AUDIO_LIMITER_DEVIATION (integer)`` | ||
| 3216 | Configures audio frequency deviation level in Hz. The range and step | ||
| 3217 | are driver-specific. | ||
| 3218 | |||
| 3219 | ``V4L2_CID_AUDIO_COMPRESSION_ENABLED (boolean)`` | ||
| 3220 | Enables or disables the audio compression feature. This feature | ||
| 3221 | amplifies signals below the threshold by a fixed gain and compresses | ||
| 3222 | audio signals above the threshold by the ratio of Threshold/(Gain + | ||
| 3223 | Threshold). | ||
| 3224 | |||
| 3225 | ``V4L2_CID_AUDIO_COMPRESSION_GAIN (integer)`` | ||
| 3226 | Sets the gain for audio compression feature. It is a dB value. The | ||
| 3227 | range and step are driver-specific. | ||
| 3228 | |||
| 3229 | ``V4L2_CID_AUDIO_COMPRESSION_THRESHOLD (integer)`` | ||
| 3230 | Sets the threshold level for audio compression freature. It is a dB | ||
| 3231 | value. The range and step are driver-specific. | ||
| 3232 | |||
| 3233 | ``V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME (integer)`` | ||
| 3234 | Sets the attack time for audio compression feature. It is a useconds | ||
| 3235 | value. The range and step are driver-specific. | ||
| 3236 | |||
| 3237 | ``V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME (integer)`` | ||
| 3238 | Sets the release time for audio compression feature. It is a | ||
| 3239 | useconds value. The range and step are driver-specific. | ||
| 3240 | |||
| 3241 | ``V4L2_CID_PILOT_TONE_ENABLED (boolean)`` | ||
| 3242 | Enables or disables the pilot tone generation feature. | ||
| 3243 | |||
| 3244 | ``V4L2_CID_PILOT_TONE_DEVIATION (integer)`` | ||
| 3245 | Configures pilot tone frequency deviation level. Unit is in Hz. The | ||
| 3246 | range and step are driver-specific. | ||
| 3247 | |||
| 3248 | ``V4L2_CID_PILOT_TONE_FREQUENCY (integer)`` | ||
| 3249 | Configures pilot tone frequency value. Unit is in Hz. The range and | ||
| 3250 | step are driver-specific. | ||
| 3251 | |||
| 3252 | ``V4L2_CID_TUNE_PREEMPHASIS`` | ||
| 3253 | (enum) | ||
| 3254 | |||
| 3255 | enum v4l2_preemphasis - | ||
| 3256 | Configures the pre-emphasis value for broadcasting. A pre-emphasis | ||
| 3257 | filter is applied to the broadcast to accentuate the high audio | ||
| 3258 | frequencies. Depending on the region, a time constant of either 50 | ||
| 3259 | or 75 useconds is used. The enum v4l2_preemphasis defines possible | ||
| 3260 | values for pre-emphasis. Here they are: | ||
| 3261 | |||
| 3262 | |||
| 3263 | |||
| 3264 | .. flat-table:: | ||
| 3265 | :header-rows: 0 | ||
| 3266 | :stub-columns: 0 | ||
| 3267 | |||
| 3268 | * - ``V4L2_PREEMPHASIS_DISABLED`` | ||
| 3269 | - No pre-emphasis is applied. | ||
| 3270 | * - ``V4L2_PREEMPHASIS_50_uS`` | ||
| 3271 | - A pre-emphasis of 50 uS is used. | ||
| 3272 | * - ``V4L2_PREEMPHASIS_75_uS`` | ||
| 3273 | - A pre-emphasis of 75 uS is used. | ||
| 3274 | |||
| 3275 | |||
| 3276 | |||
| 3277 | ``V4L2_CID_TUNE_POWER_LEVEL (integer)`` | ||
| 3278 | Sets the output power level for signal transmission. Unit is in | ||
| 3279 | dBuV. Range and step are driver-specific. | ||
| 3280 | |||
| 3281 | ``V4L2_CID_TUNE_ANTENNA_CAPACITOR (integer)`` | ||
| 3282 | This selects the value of antenna tuning capacitor manually or | ||
| 3283 | automatically if set to zero. Unit, range and step are | ||
| 3284 | driver-specific. | ||
| 3285 | |||
| 3286 | For more details about RDS specification, refer to :ref:`iec62106` | ||
| 3287 | document, from CENELEC. | ||
| 3288 | |||
| 3289 | |||
| 3290 | .. _flash-controls: | ||
| 3291 | |||
| 3292 | Flash Control Reference | ||
| 3293 | ======================= | ||
| 3294 | |||
| 3295 | The V4L2 flash controls are intended to provide generic access to flash | ||
| 3296 | controller devices. Flash controller devices are typically used in | ||
| 3297 | digital cameras. | ||
| 3298 | |||
| 3299 | The interface can support both LED and xenon flash devices. As of | ||
| 3300 | writing this, there is no xenon flash driver using this interface. | ||
| 3301 | |||
| 3302 | |||
| 3303 | .. _flash-controls-use-cases: | ||
| 3304 | |||
| 3305 | Supported use cases | ||
| 3306 | ------------------- | ||
| 3307 | |||
| 3308 | |||
| 3309 | Unsynchronised LED flash (software strobe) | ||
| 3310 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 3311 | |||
| 3312 | Unsynchronised LED flash is controlled directly by the host as the | ||
| 3313 | sensor. The flash must be enabled by the host before the exposure of the | ||
| 3314 | image starts and disabled once it ends. The host is fully responsible | ||
| 3315 | for the timing of the flash. | ||
| 3316 | |||
| 3317 | Example of such device: Nokia N900. | ||
| 3318 | |||
| 3319 | |||
| 3320 | Synchronised LED flash (hardware strobe) | ||
| 3321 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 3322 | |||
| 3323 | The synchronised LED flash is pre-programmed by the host (power and | ||
| 3324 | timeout) but controlled by the sensor through a strobe signal from the | ||
| 3325 | sensor to the flash. | ||
| 3326 | |||
| 3327 | The sensor controls the flash duration and timing. This information | ||
| 3328 | typically must be made available to the sensor. | ||
| 3329 | |||
| 3330 | |||
| 3331 | LED flash as torch | ||
| 3332 | ^^^^^^^^^^^^^^^^^^ | ||
| 3333 | |||
| 3334 | LED flash may be used as torch in conjunction with another use case | ||
| 3335 | involving camera or individually. | ||
| 3336 | |||
| 3337 | |||
| 3338 | .. _flash-control-id: | ||
| 3339 | |||
| 3340 | Flash Control IDs | ||
| 3341 | """"""""""""""""" | ||
| 3342 | |||
| 3343 | ``V4L2_CID_FLASH_CLASS (class)`` | ||
| 3344 | The FLASH class descriptor. | ||
| 3345 | |||
| 3346 | ``V4L2_CID_FLASH_LED_MODE (menu)`` | ||
| 3347 | Defines the mode of the flash LED, the high-power white LED attached | ||
| 3348 | to the flash controller. Setting this control may not be possible in | ||
| 3349 | presence of some faults. See V4L2_CID_FLASH_FAULT. | ||
| 3350 | |||
| 3351 | |||
| 3352 | |||
| 3353 | .. flat-table:: | ||
| 3354 | :header-rows: 0 | ||
| 3355 | :stub-columns: 0 | ||
| 3356 | |||
| 3357 | * - ``V4L2_FLASH_LED_MODE_NONE`` | ||
| 3358 | - Off. | ||
| 3359 | * - ``V4L2_FLASH_LED_MODE_FLASH`` | ||
| 3360 | - Flash mode. | ||
| 3361 | * - ``V4L2_FLASH_LED_MODE_TORCH`` | ||
| 3362 | - Torch mode. See V4L2_CID_FLASH_TORCH_INTENSITY. | ||
| 3363 | |||
| 3364 | |||
| 3365 | |||
| 3366 | ``V4L2_CID_FLASH_STROBE_SOURCE (menu)`` | ||
| 3367 | Defines the source of the flash LED strobe. | ||
| 3368 | |||
| 3369 | .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| | ||
| 3370 | |||
| 3371 | .. flat-table:: | ||
| 3372 | :header-rows: 0 | ||
| 3373 | :stub-columns: 0 | ||
| 3374 | |||
| 3375 | * - ``V4L2_FLASH_STROBE_SOURCE_SOFTWARE`` | ||
| 3376 | - The flash strobe is triggered by using the | ||
| 3377 | V4L2_CID_FLASH_STROBE control. | ||
| 3378 | * - ``V4L2_FLASH_STROBE_SOURCE_EXTERNAL`` | ||
| 3379 | - The flash strobe is triggered by an external source. Typically | ||
| 3380 | this is a sensor, which makes it possible to synchronises the | ||
| 3381 | flash strobe start to exposure start. | ||
| 3382 | |||
| 3383 | |||
| 3384 | |||
| 3385 | ``V4L2_CID_FLASH_STROBE (button)`` | ||
| 3386 | Strobe flash. Valid when V4L2_CID_FLASH_LED_MODE is set to | ||
| 3387 | V4L2_FLASH_LED_MODE_FLASH and V4L2_CID_FLASH_STROBE_SOURCE | ||
| 3388 | is set to V4L2_FLASH_STROBE_SOURCE_SOFTWARE. Setting this | ||
| 3389 | control may not be possible in presence of some faults. See | ||
| 3390 | V4L2_CID_FLASH_FAULT. | ||
| 3391 | |||
| 3392 | ``V4L2_CID_FLASH_STROBE_STOP (button)`` | ||
| 3393 | Stop flash strobe immediately. | ||
| 3394 | |||
| 3395 | ``V4L2_CID_FLASH_STROBE_STATUS (boolean)`` | ||
| 3396 | Strobe status: whether the flash is strobing at the moment or not. | ||
| 3397 | This is a read-only control. | ||
| 3398 | |||
| 3399 | ``V4L2_CID_FLASH_TIMEOUT (integer)`` | ||
| 3400 | Hardware timeout for flash. The flash strobe is stopped after this | ||
| 3401 | period of time has passed from the start of the strobe. | ||
| 3402 | |||
| 3403 | ``V4L2_CID_FLASH_INTENSITY (integer)`` | ||
| 3404 | Intensity of the flash strobe when the flash LED is in flash mode | ||
| 3405 | (V4L2_FLASH_LED_MODE_FLASH). The unit should be milliamps (mA) | ||
| 3406 | if possible. | ||
| 3407 | |||
| 3408 | ``V4L2_CID_FLASH_TORCH_INTENSITY (integer)`` | ||
| 3409 | Intensity of the flash LED in torch mode | ||
| 3410 | (V4L2_FLASH_LED_MODE_TORCH). The unit should be milliamps (mA) | ||
| 3411 | if possible. Setting this control may not be possible in presence of | ||
| 3412 | some faults. See V4L2_CID_FLASH_FAULT. | ||
| 3413 | |||
| 3414 | ``V4L2_CID_FLASH_INDICATOR_INTENSITY (integer)`` | ||
| 3415 | Intensity of the indicator LED. The indicator LED may be fully | ||
| 3416 | independent of the flash LED. The unit should be microamps (uA) if | ||
| 3417 | possible. | ||
| 3418 | |||
| 3419 | ``V4L2_CID_FLASH_FAULT (bitmask)`` | ||
| 3420 | Faults related to the flash. The faults tell about specific problems | ||
| 3421 | in the flash chip itself or the LEDs attached to it. Faults may | ||
| 3422 | prevent further use of some of the flash controls. In particular, | ||
| 3423 | V4L2_CID_FLASH_LED_MODE is set to V4L2_FLASH_LED_MODE_NONE | ||
| 3424 | if the fault affects the flash LED. Exactly which faults have such | ||
| 3425 | an effect is chip dependent. Reading the faults resets the control | ||
| 3426 | and returns the chip to a usable state if possible. | ||
| 3427 | |||
| 3428 | .. tabularcolumns:: |p{8.0cm}|p{9.5cm}| | ||
| 3429 | |||
| 3430 | .. flat-table:: | ||
| 3431 | :header-rows: 0 | ||
| 3432 | :stub-columns: 0 | ||
| 3433 | |||
| 3434 | * - ``V4L2_FLASH_FAULT_OVER_VOLTAGE`` | ||
| 3435 | - Flash controller voltage to the flash LED has exceeded the limit | ||
| 3436 | specific to the flash controller. | ||
| 3437 | * - ``V4L2_FLASH_FAULT_TIMEOUT`` | ||
| 3438 | - The flash strobe was still on when the timeout set by the user --- | ||
| 3439 | V4L2_CID_FLASH_TIMEOUT control --- has expired. Not all flash | ||
| 3440 | controllers may set this in all such conditions. | ||
| 3441 | * - ``V4L2_FLASH_FAULT_OVER_TEMPERATURE`` | ||
| 3442 | - The flash controller has overheated. | ||
| 3443 | * - ``V4L2_FLASH_FAULT_SHORT_CIRCUIT`` | ||
| 3444 | - The short circuit protection of the flash controller has been | ||
| 3445 | triggered. | ||
| 3446 | * - ``V4L2_FLASH_FAULT_OVER_CURRENT`` | ||
| 3447 | - Current in the LED power supply has exceeded the limit specific to | ||
| 3448 | the flash controller. | ||
| 3449 | * - ``V4L2_FLASH_FAULT_INDICATOR`` | ||
| 3450 | - The flash controller has detected a short or open circuit | ||
| 3451 | condition on the indicator LED. | ||
| 3452 | * - ``V4L2_FLASH_FAULT_UNDER_VOLTAGE`` | ||
| 3453 | - Flash controller voltage to the flash LED has been below the | ||
| 3454 | minimum limit specific to the flash controller. | ||
| 3455 | * - ``V4L2_FLASH_FAULT_INPUT_VOLTAGE`` | ||
| 3456 | - The input voltage of the flash controller is below the limit under | ||
| 3457 | which strobing the flash at full current will not be possible.The | ||
| 3458 | condition persists until this flag is no longer set. | ||
| 3459 | * - ``V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE`` | ||
| 3460 | - The temperature of the LED has exceeded its allowed upper limit. | ||
| 3461 | |||
| 3462 | |||
| 3463 | |||
| 3464 | ``V4L2_CID_FLASH_CHARGE (boolean)`` | ||
| 3465 | Enable or disable charging of the xenon flash capacitor. | ||
| 3466 | |||
| 3467 | ``V4L2_CID_FLASH_READY (boolean)`` | ||
| 3468 | Is the flash ready to strobe? Xenon flashes require their capacitors | ||
| 3469 | charged before strobing. LED flashes often require a cooldown period | ||
| 3470 | after strobe during which another strobe will not be possible. This | ||
| 3471 | is a read-only control. | ||
| 3472 | |||
| 3473 | |||
| 3474 | .. _jpeg-controls: | ||
| 3475 | |||
| 3476 | JPEG Control Reference | ||
| 3477 | ====================== | ||
| 3478 | |||
| 3479 | The JPEG class includes controls for common features of JPEG encoders | ||
| 3480 | and decoders. Currently it includes features for codecs implementing | ||
| 3481 | progressive baseline DCT compression process with Huffman entrophy | ||
| 3482 | coding. | ||
| 3483 | |||
| 3484 | |||
| 3485 | .. _jpeg-control-id: | ||
| 3486 | |||
| 3487 | JPEG Control IDs | ||
| 3488 | ---------------- | ||
| 3489 | |||
| 3490 | ``V4L2_CID_JPEG_CLASS (class)`` | ||
| 3491 | The JPEG class descriptor. Calling | ||
| 3492 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 3493 | return a description of this control class. | ||
| 3494 | |||
| 3495 | ``V4L2_CID_JPEG_CHROMA_SUBSAMPLING (menu)`` | ||
| 3496 | The chroma subsampling factors describe how each component of an | ||
| 3497 | input image is sampled, in respect to maximum sample rate in each | ||
| 3498 | spatial dimension. See :ref:`itu-t81`, clause A.1.1. for more | ||
| 3499 | details. The ``V4L2_CID_JPEG_CHROMA_SUBSAMPLING`` control determines | ||
| 3500 | how Cb and Cr components are downsampled after converting an input | ||
| 3501 | image from RGB to Y'CbCr color space. | ||
| 3502 | |||
| 3503 | .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| | ||
| 3504 | |||
| 3505 | .. flat-table:: | ||
| 3506 | :header-rows: 0 | ||
| 3507 | :stub-columns: 0 | ||
| 3508 | |||
| 3509 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_444`` | ||
| 3510 | - No chroma subsampling, each pixel has Y, Cr and Cb values. | ||
| 3511 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_422`` | ||
| 3512 | - Horizontally subsample Cr, Cb components by a factor of 2. | ||
| 3513 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_420`` | ||
| 3514 | - Subsample Cr, Cb components horizontally and vertically by 2. | ||
| 3515 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_411`` | ||
| 3516 | - Horizontally subsample Cr, Cb components by a factor of 4. | ||
| 3517 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_410`` | ||
| 3518 | - Subsample Cr, Cb components horizontally by 4 and vertically by 2. | ||
| 3519 | * - ``V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY`` | ||
| 3520 | - Use only luminance component. | ||
| 3521 | |||
| 3522 | |||
| 3523 | |||
| 3524 | ``V4L2_CID_JPEG_RESTART_INTERVAL (integer)`` | ||
| 3525 | The restart interval determines an interval of inserting RSTm | ||
| 3526 | markers (m = 0..7). The purpose of these markers is to additionally | ||
| 3527 | reinitialize the encoder process, in order to process blocks of an | ||
| 3528 | image independently. For the lossy compression processes the restart | ||
| 3529 | interval unit is MCU (Minimum Coded Unit) and its value is contained | ||
| 3530 | in DRI (Define Restart Interval) marker. If | ||
| 3531 | ``V4L2_CID_JPEG_RESTART_INTERVAL`` control is set to 0, DRI and RSTm | ||
| 3532 | markers will not be inserted. | ||
| 3533 | |||
| 3534 | .. _jpeg-quality-control: | ||
| 3535 | |||
| 3536 | ``V4L2_CID_JPEG_COMPRESSION_QUALITY (integer)`` | ||
| 3537 | ``V4L2_CID_JPEG_COMPRESSION_QUALITY`` control determines trade-off | ||
| 3538 | between image quality and size. It provides simpler method for | ||
| 3539 | applications to control image quality, without a need for direct | ||
| 3540 | reconfiguration of luminance and chrominance quantization tables. In | ||
| 3541 | cases where a driver uses quantization tables configured directly by | ||
| 3542 | an application, using interfaces defined elsewhere, | ||
| 3543 | ``V4L2_CID_JPEG_COMPRESSION_QUALITY`` control should be set by | ||
| 3544 | driver to 0. | ||
| 3545 | |||
| 3546 | The value range of this control is driver-specific. Only positive, | ||
| 3547 | non-zero values are meaningful. The recommended range is 1 - 100, | ||
| 3548 | where larger values correspond to better image quality. | ||
| 3549 | |||
| 3550 | .. _jpeg-active-marker-control: | ||
| 3551 | |||
| 3552 | ``V4L2_CID_JPEG_ACTIVE_MARKER (bitmask)`` | ||
| 3553 | Specify which JPEG markers are included in compressed stream. This | ||
| 3554 | control is valid only for encoders. | ||
| 3555 | |||
| 3556 | |||
| 3557 | |||
| 3558 | .. flat-table:: | ||
| 3559 | :header-rows: 0 | ||
| 3560 | :stub-columns: 0 | ||
| 3561 | |||
| 3562 | * - ``V4L2_JPEG_ACTIVE_MARKER_APP0`` | ||
| 3563 | - Application data segment APP\ :sub:`0`. | ||
| 3564 | * - ``V4L2_JPEG_ACTIVE_MARKER_APP1`` | ||
| 3565 | - Application data segment APP\ :sub:`1`. | ||
| 3566 | * - ``V4L2_JPEG_ACTIVE_MARKER_COM`` | ||
| 3567 | - Comment segment. | ||
| 3568 | * - ``V4L2_JPEG_ACTIVE_MARKER_DQT`` | ||
| 3569 | - Quantization tables segment. | ||
| 3570 | * - ``V4L2_JPEG_ACTIVE_MARKER_DHT`` | ||
| 3571 | - Huffman tables segment. | ||
| 3572 | |||
| 3573 | |||
| 3574 | |||
| 3575 | For more details about JPEG specification, refer to :ref:`itu-t81`, | ||
| 3576 | :ref:`jfif`, :ref:`w3c-jpeg-jfif`. | ||
| 3577 | |||
| 3578 | |||
| 3579 | .. _image-source-controls: | ||
| 3580 | |||
| 3581 | Image Source Control Reference | ||
| 3582 | ============================== | ||
| 3583 | |||
| 3584 | The Image Source control class is intended for low-level control of | ||
| 3585 | image source devices such as image sensors. The devices feature an | ||
| 3586 | analogue to digital converter and a bus transmitter to transmit the | ||
| 3587 | image data out of the device. | ||
| 3588 | |||
| 3589 | |||
| 3590 | .. _image-source-control-id: | ||
| 3591 | |||
| 3592 | Image Source Control IDs | ||
| 3593 | ------------------------ | ||
| 3594 | |||
| 3595 | ``V4L2_CID_IMAGE_SOURCE_CLASS (class)`` | ||
| 3596 | The IMAGE_SOURCE class descriptor. | ||
| 3597 | |||
| 3598 | ``V4L2_CID_VBLANK (integer)`` | ||
| 3599 | Vertical blanking. The idle period after every frame during which no | ||
| 3600 | image data is produced. The unit of vertical blanking is a line. | ||
| 3601 | Every line has length of the image width plus horizontal blanking at | ||
| 3602 | the pixel rate defined by ``V4L2_CID_PIXEL_RATE`` control in the | ||
| 3603 | same sub-device. | ||
| 3604 | |||
| 3605 | ``V4L2_CID_HBLANK (integer)`` | ||
| 3606 | Horizontal blanking. The idle period after every line of image data | ||
| 3607 | during which no image data is produced. The unit of horizontal | ||
| 3608 | blanking is pixels. | ||
| 3609 | |||
| 3610 | ``V4L2_CID_ANALOGUE_GAIN (integer)`` | ||
| 3611 | Analogue gain is gain affecting all colour components in the pixel | ||
| 3612 | matrix. The gain operation is performed in the analogue domain | ||
| 3613 | before A/D conversion. | ||
| 3614 | |||
| 3615 | ``V4L2_CID_TEST_PATTERN_RED (integer)`` | ||
| 3616 | Test pattern red colour component. | ||
| 3617 | |||
| 3618 | ``V4L2_CID_TEST_PATTERN_GREENR (integer)`` | ||
| 3619 | Test pattern green (next to red) colour component. | ||
| 3620 | |||
| 3621 | ``V4L2_CID_TEST_PATTERN_BLUE (integer)`` | ||
| 3622 | Test pattern blue colour component. | ||
| 3623 | |||
| 3624 | ``V4L2_CID_TEST_PATTERN_GREENB (integer)`` | ||
| 3625 | Test pattern green (next to blue) colour component. | ||
| 3626 | |||
| 3627 | |||
| 3628 | .. _image-process-controls: | ||
| 3629 | |||
| 3630 | Image Process Control Reference | ||
| 3631 | =============================== | ||
| 3632 | |||
| 3633 | The Image Process control class is intended for low-level control of | ||
| 3634 | image processing functions. Unlike ``V4L2_CID_IMAGE_SOURCE_CLASS``, the | ||
| 3635 | controls in this class affect processing the image, and do not control | ||
| 3636 | capturing of it. | ||
| 3637 | |||
| 3638 | |||
| 3639 | .. _image-process-control-id: | ||
| 3640 | |||
| 3641 | Image Process Control IDs | ||
| 3642 | ------------------------- | ||
| 3643 | |||
| 3644 | ``V4L2_CID_IMAGE_PROC_CLASS (class)`` | ||
| 3645 | The IMAGE_PROC class descriptor. | ||
| 3646 | |||
| 3647 | ``V4L2_CID_LINK_FREQ (integer menu)`` | ||
| 3648 | Data bus frequency. Together with the media bus pixel code, bus type | ||
| 3649 | (clock cycles per sample), the data bus frequency defines the pixel | ||
| 3650 | rate (``V4L2_CID_PIXEL_RATE``) in the pixel array (or possibly | ||
| 3651 | elsewhere, if the device is not an image sensor). The frame rate can | ||
| 3652 | be calculated from the pixel clock, image width and height and | ||
| 3653 | horizontal and vertical blanking. While the pixel rate control may | ||
| 3654 | be defined elsewhere than in the subdev containing the pixel array, | ||
| 3655 | the frame rate cannot be obtained from that information. This is | ||
| 3656 | because only on the pixel array it can be assumed that the vertical | ||
| 3657 | and horizontal blanking information is exact: no other blanking is | ||
| 3658 | allowed in the pixel array. The selection of frame rate is performed | ||
| 3659 | by selecting the desired horizontal and vertical blanking. The unit | ||
| 3660 | of this control is Hz. | ||
| 3661 | |||
| 3662 | ``V4L2_CID_PIXEL_RATE (64-bit integer)`` | ||
| 3663 | Pixel rate in the source pads of the subdev. This control is | ||
| 3664 | read-only and its unit is pixels / second. | ||
| 3665 | |||
| 3666 | ``V4L2_CID_TEST_PATTERN (menu)`` | ||
| 3667 | Some capture/display/sensor devices have the capability to generate | ||
| 3668 | test pattern images. These hardware specific test patterns can be | ||
| 3669 | used to test if a device is working properly. | ||
| 3670 | |||
| 3671 | ``V4L2_CID_DEINTERLACING_MODE (menu)`` | ||
| 3672 | The video deinterlacing mode (such as Bob, Weave, ...). The menu items are | ||
| 3673 | driver specific and are documented in :ref:`v4l-drivers`. | ||
| 3674 | |||
| 3675 | ``V4L2_CID_DIGITAL_GAIN (integer)`` | ||
| 3676 | Digital gain is the value by which all colour components | ||
| 3677 | are multiplied by. Typically the digital gain applied is the | ||
| 3678 | control value divided by e.g. 0x100, meaning that to get no | ||
| 3679 | digital gain the control value needs to be 0x100. The no-gain | ||
| 3680 | configuration is also typically the default. | ||
| 3681 | |||
| 3682 | |||
| 3683 | .. _dv-controls: | ||
| 3684 | |||
| 3685 | Digital Video Control Reference | ||
| 3686 | =============================== | ||
| 3687 | |||
| 3688 | The Digital Video control class is intended to control receivers and | ||
| 3689 | transmitters for `VGA <http://en.wikipedia.org/wiki/Vga>`__, | ||
| 3690 | `DVI <http://en.wikipedia.org/wiki/Digital_Visual_Interface>`__ | ||
| 3691 | (Digital Visual Interface), HDMI (:ref:`hdmi`) and DisplayPort | ||
| 3692 | (:ref:`dp`). These controls are generally expected to be private to | ||
| 3693 | the receiver or transmitter subdevice that implements them, so they are | ||
| 3694 | only exposed on the ``/dev/v4l-subdev*`` device node. | ||
| 3695 | |||
| 3696 | .. note:: | ||
| 3697 | |||
| 3698 | Note that these devices can have multiple input or output pads which are | ||
| 3699 | hooked up to e.g. HDMI connectors. Even though the subdevice will | ||
| 3700 | receive or transmit video from/to only one of those pads, the other pads | ||
| 3701 | can still be active when it comes to EDID (Extended Display | ||
| 3702 | Identification Data, :ref:`vesaedid`) and HDCP (High-bandwidth Digital | ||
| 3703 | Content Protection System, :ref:`hdcp`) processing, allowing the | ||
| 3704 | device to do the fairly slow EDID/HDCP handling in advance. This allows | ||
| 3705 | for quick switching between connectors. | ||
| 3706 | |||
| 3707 | These pads appear in several of the controls in this section as | ||
| 3708 | bitmasks, one bit for each pad. Bit 0 corresponds to pad 0, bit 1 to pad | ||
| 3709 | 1, etc. The maximum value of the control is the set of valid pads. | ||
| 3710 | |||
| 3711 | |||
| 3712 | .. _dv-control-id: | ||
| 3713 | |||
| 3714 | Digital Video Control IDs | ||
| 3715 | ------------------------- | ||
| 3716 | |||
| 3717 | ``V4L2_CID_DV_CLASS (class)`` | ||
| 3718 | The Digital Video class descriptor. | ||
| 3719 | |||
| 3720 | ``V4L2_CID_DV_TX_HOTPLUG (bitmask)`` | ||
| 3721 | Many connectors have a hotplug pin which is high if EDID information | ||
| 3722 | is available from the source. This control shows the state of the | ||
| 3723 | hotplug pin as seen by the transmitter. Each bit corresponds to an | ||
| 3724 | output pad on the transmitter. If an output pad does not have an | ||
| 3725 | associated hotplug pin, then the bit for that pad will be 0. This | ||
| 3726 | read-only control is applicable to DVI-D, HDMI and DisplayPort | ||
| 3727 | connectors. | ||
| 3728 | |||
| 3729 | ``V4L2_CID_DV_TX_RXSENSE (bitmask)`` | ||
| 3730 | Rx Sense is the detection of pull-ups on the TMDS clock lines. This | ||
| 3731 | normally means that the sink has left/entered standby (i.e. the | ||
| 3732 | transmitter can sense that the receiver is ready to receive video). | ||
| 3733 | Each bit corresponds to an output pad on the transmitter. If an | ||
| 3734 | output pad does not have an associated Rx Sense, then the bit for | ||
| 3735 | that pad will be 0. This read-only control is applicable to DVI-D | ||
| 3736 | and HDMI devices. | ||
| 3737 | |||
| 3738 | ``V4L2_CID_DV_TX_EDID_PRESENT (bitmask)`` | ||
| 3739 | When the transmitter sees the hotplug signal from the receiver it | ||
| 3740 | will attempt to read the EDID. If set, then the transmitter has read | ||
| 3741 | at least the first block (= 128 bytes). Each bit corresponds to an | ||
| 3742 | output pad on the transmitter. If an output pad does not support | ||
| 3743 | EDIDs, then the bit for that pad will be 0. This read-only control | ||
| 3744 | is applicable to VGA, DVI-A/D, HDMI and DisplayPort connectors. | ||
| 3745 | |||
| 3746 | ``V4L2_CID_DV_TX_MODE`` | ||
| 3747 | (enum) | ||
| 3748 | |||
| 3749 | enum v4l2_dv_tx_mode - | ||
| 3750 | HDMI transmitters can transmit in DVI-D mode (just video) or in HDMI | ||
| 3751 | mode (video + audio + auxiliary data). This control selects which | ||
| 3752 | mode to use: V4L2_DV_TX_MODE_DVI_D or V4L2_DV_TX_MODE_HDMI. | ||
| 3753 | This control is applicable to HDMI connectors. | ||
| 3754 | |||
| 3755 | ``V4L2_CID_DV_TX_RGB_RANGE`` | ||
| 3756 | (enum) | ||
| 3757 | |||
| 3758 | enum v4l2_dv_rgb_range - | ||
| 3759 | Select the quantization range for RGB output. V4L2_DV_RANGE_AUTO | ||
| 3760 | follows the RGB quantization range specified in the standard for the | ||
| 3761 | video interface (ie. :ref:`cea861` for HDMI). | ||
| 3762 | V4L2_DV_RANGE_LIMITED and V4L2_DV_RANGE_FULL override the | ||
| 3763 | standard to be compatible with sinks that have not implemented the | ||
| 3764 | standard correctly (unfortunately quite common for HDMI and DVI-D). | ||
| 3765 | Full range allows all possible values to be used whereas limited | ||
| 3766 | range sets the range to (16 << (N-8)) - (235 << (N-8)) where N is | ||
| 3767 | the number of bits per component. This control is applicable to VGA, | ||
| 3768 | DVI-A/D, HDMI and DisplayPort connectors. | ||
| 3769 | |||
| 3770 | ``V4L2_CID_DV_TX_IT_CONTENT_TYPE`` | ||
| 3771 | (enum) | ||
| 3772 | |||
| 3773 | enum v4l2_dv_it_content_type - | ||
| 3774 | Configures the IT Content Type of the transmitted video. This | ||
| 3775 | information is sent over HDMI and DisplayPort connectors as part of | ||
| 3776 | the AVI InfoFrame. The term 'IT Content' is used for content that | ||
| 3777 | originates from a computer as opposed to content from a TV broadcast | ||
| 3778 | or an analog source. The enum v4l2_dv_it_content_type defines | ||
| 3779 | the possible content types: | ||
| 3780 | |||
| 3781 | .. tabularcolumns:: |p{7.0cm}|p{10.5cm}| | ||
| 3782 | |||
| 3783 | .. flat-table:: | ||
| 3784 | :header-rows: 0 | ||
| 3785 | :stub-columns: 0 | ||
| 3786 | |||
| 3787 | * - ``V4L2_DV_IT_CONTENT_TYPE_GRAPHICS`` | ||
| 3788 | - Graphics content. Pixel data should be passed unfiltered and | ||
| 3789 | without analog reconstruction. | ||
| 3790 | * - ``V4L2_DV_IT_CONTENT_TYPE_PHOTO`` | ||
| 3791 | - Photo content. The content is derived from digital still pictures. | ||
| 3792 | The content should be passed through with minimal scaling and | ||
| 3793 | picture enhancements. | ||
| 3794 | * - ``V4L2_DV_IT_CONTENT_TYPE_CINEMA`` | ||
| 3795 | - Cinema content. | ||
| 3796 | * - ``V4L2_DV_IT_CONTENT_TYPE_GAME`` | ||
| 3797 | - Game content. Audio and video latency should be minimized. | ||
| 3798 | * - ``V4L2_DV_IT_CONTENT_TYPE_NO_ITC`` | ||
| 3799 | - No IT Content information is available and the ITC bit in the AVI | ||
| 3800 | InfoFrame is set to 0. | ||
| 3801 | |||
| 3802 | |||
| 3803 | |||
| 3804 | ``V4L2_CID_DV_RX_POWER_PRESENT (bitmask)`` | ||
| 3805 | Detects whether the receiver receives power from the source (e.g. | ||
| 3806 | HDMI carries 5V on one of the pins). This is often used to power an | ||
| 3807 | eeprom which contains EDID information, such that the source can | ||
| 3808 | read the EDID even if the sink is in standby/power off. Each bit | ||
| 3809 | corresponds to an input pad on the receiver. If an input pad | ||
| 3810 | cannot detect whether power is present, then the bit for that pad | ||
| 3811 | will be 0. This read-only control is applicable to DVI-D, HDMI and | ||
| 3812 | DisplayPort connectors. | ||
| 3813 | |||
| 3814 | ``V4L2_CID_DV_RX_RGB_RANGE`` | ||
| 3815 | (enum) | ||
| 3816 | |||
| 3817 | enum v4l2_dv_rgb_range - | ||
| 3818 | Select the quantization range for RGB input. V4L2_DV_RANGE_AUTO | ||
| 3819 | follows the RGB quantization range specified in the standard for the | ||
| 3820 | video interface (ie. :ref:`cea861` for HDMI). | ||
| 3821 | V4L2_DV_RANGE_LIMITED and V4L2_DV_RANGE_FULL override the | ||
| 3822 | standard to be compatible with sources that have not implemented the | ||
| 3823 | standard correctly (unfortunately quite common for HDMI and DVI-D). | ||
| 3824 | Full range allows all possible values to be used whereas limited | ||
| 3825 | range sets the range to (16 << (N-8)) - (235 << (N-8)) where N is | ||
| 3826 | the number of bits per component. This control is applicable to VGA, | ||
| 3827 | DVI-A/D, HDMI and DisplayPort connectors. | ||
| 3828 | |||
| 3829 | ``V4L2_CID_DV_RX_IT_CONTENT_TYPE`` | ||
| 3830 | (enum) | ||
| 3831 | |||
| 3832 | enum v4l2_dv_it_content_type - | ||
| 3833 | Reads the IT Content Type of the received video. This information is | ||
| 3834 | sent over HDMI and DisplayPort connectors as part of the AVI | ||
| 3835 | InfoFrame. The term 'IT Content' is used for content that originates | ||
| 3836 | from a computer as opposed to content from a TV broadcast or an | ||
| 3837 | analog source. See ``V4L2_CID_DV_TX_IT_CONTENT_TYPE`` for the | ||
| 3838 | available content types. | ||
| 3839 | |||
| 3840 | |||
| 3841 | .. _fm-rx-controls: | ||
| 3842 | |||
| 3843 | FM Receiver Control Reference | ||
| 3844 | ============================= | ||
| 3845 | |||
| 3846 | The FM Receiver (FM_RX) class includes controls for common features of | ||
| 3847 | FM Reception capable devices. | ||
| 3848 | |||
| 3849 | |||
| 3850 | .. _fm-rx-control-id: | ||
| 3851 | |||
| 3852 | FM_RX Control IDs | ||
| 3853 | ----------------- | ||
| 3854 | |||
| 3855 | ``V4L2_CID_FM_RX_CLASS (class)`` | ||
| 3856 | The FM_RX class descriptor. Calling | ||
| 3857 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 3858 | return a description of this control class. | ||
| 3859 | |||
| 3860 | ``V4L2_CID_RDS_RECEPTION (boolean)`` | ||
| 3861 | Enables/disables RDS reception by the radio tuner | ||
| 3862 | |||
| 3863 | ``V4L2_CID_RDS_RX_PTY (integer)`` | ||
| 3864 | Gets RDS Programme Type field. This encodes up to 31 pre-defined | ||
| 3865 | programme types. | ||
| 3866 | |||
| 3867 | ``V4L2_CID_RDS_RX_PS_NAME (string)`` | ||
| 3868 | Gets the Programme Service name (PS_NAME). It is intended for | ||
| 3869 | static display on a receiver. It is the primary aid to listeners in | ||
| 3870 | programme service identification and selection. In Annex E of | ||
| 3871 | :ref:`iec62106`, the RDS specification, there is a full | ||
| 3872 | description of the correct character encoding for Programme Service | ||
| 3873 | name strings. Also from RDS specification, PS is usually a single | ||
| 3874 | eight character text. However, it is also possible to find receivers | ||
| 3875 | which can scroll strings sized as 8 x N characters. So, this control | ||
| 3876 | must be configured with steps of 8 characters. The result is it must | ||
| 3877 | always contain a string with size multiple of 8. | ||
| 3878 | |||
| 3879 | ``V4L2_CID_RDS_RX_RADIO_TEXT (string)`` | ||
| 3880 | Gets the Radio Text info. It is a textual description of what is | ||
| 3881 | being broadcasted. RDS Radio Text can be applied when broadcaster | ||
| 3882 | wishes to transmit longer PS names, programme-related information or | ||
| 3883 | any other text. In these cases, RadioText can be used in addition to | ||
| 3884 | ``V4L2_CID_RDS_RX_PS_NAME``. The encoding for Radio Text strings is | ||
| 3885 | also fully described in Annex E of :ref:`iec62106`. The length of | ||
| 3886 | Radio Text strings depends on which RDS Block is being used to | ||
| 3887 | transmit it, either 32 (2A block) or 64 (2B block). However, it is | ||
| 3888 | also possible to find receivers which can scroll strings sized as 32 | ||
| 3889 | x N or 64 x N characters. So, this control must be configured with | ||
| 3890 | steps of 32 or 64 characters. The result is it must always contain a | ||
| 3891 | string with size multiple of 32 or 64. | ||
| 3892 | |||
| 3893 | ``V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT (boolean)`` | ||
| 3894 | If set, then a traffic announcement is in progress. | ||
| 3895 | |||
| 3896 | ``V4L2_CID_RDS_RX_TRAFFIC_PROGRAM (boolean)`` | ||
| 3897 | If set, then the tuned programme carries traffic announcements. | ||
| 3898 | |||
| 3899 | ``V4L2_CID_RDS_RX_MUSIC_SPEECH (boolean)`` | ||
| 3900 | If set, then this channel broadcasts music. If cleared, then it | ||
| 3901 | broadcasts speech. If the transmitter doesn't make this distinction, | ||
| 3902 | then it will be set. | ||
| 3903 | |||
| 3904 | ``V4L2_CID_TUNE_DEEMPHASIS`` | ||
| 3905 | (enum) | ||
| 3906 | |||
| 3907 | enum v4l2_deemphasis - | ||
| 3908 | Configures the de-emphasis value for reception. A de-emphasis filter | ||
| 3909 | is applied to the broadcast to accentuate the high audio | ||
| 3910 | frequencies. Depending on the region, a time constant of either 50 | ||
| 3911 | or 75 useconds is used. The enum v4l2_deemphasis defines possible | ||
| 3912 | values for de-emphasis. Here they are: | ||
| 3913 | |||
| 3914 | |||
| 3915 | |||
| 3916 | .. flat-table:: | ||
| 3917 | :header-rows: 0 | ||
| 3918 | :stub-columns: 0 | ||
| 3919 | |||
| 3920 | * - ``V4L2_DEEMPHASIS_DISABLED`` | ||
| 3921 | - No de-emphasis is applied. | ||
| 3922 | * - ``V4L2_DEEMPHASIS_50_uS`` | ||
| 3923 | - A de-emphasis of 50 uS is used. | ||
| 3924 | * - ``V4L2_DEEMPHASIS_75_uS`` | ||
| 3925 | - A de-emphasis of 75 uS is used. | ||
| 3926 | |||
| 3927 | |||
| 3928 | |||
| 3929 | |||
| 3930 | .. _detect-controls: | ||
| 3931 | |||
| 3932 | Detect Control Reference | ||
| 3933 | ======================== | ||
| 3934 | |||
| 3935 | The Detect class includes controls for common features of various motion | ||
| 3936 | or object detection capable devices. | ||
| 3937 | |||
| 3938 | |||
| 3939 | .. _detect-control-id: | ||
| 3940 | |||
| 3941 | Detect Control IDs | ||
| 3942 | ------------------ | ||
| 3943 | |||
| 3944 | ``V4L2_CID_DETECT_CLASS (class)`` | ||
| 3945 | The Detect class descriptor. Calling | ||
| 3946 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 3947 | return a description of this control class. | ||
| 3948 | |||
| 3949 | ``V4L2_CID_DETECT_MD_MODE (menu)`` | ||
| 3950 | Sets the motion detection mode. | ||
| 3951 | |||
| 3952 | .. tabularcolumns:: |p{7.5cm}|p{10.0cm}| | ||
| 3953 | |||
| 3954 | .. flat-table:: | ||
| 3955 | :header-rows: 0 | ||
| 3956 | :stub-columns: 0 | ||
| 3957 | |||
| 3958 | * - ``V4L2_DETECT_MD_MODE_DISABLED`` | ||
| 3959 | - Disable motion detection. | ||
| 3960 | * - ``V4L2_DETECT_MD_MODE_GLOBAL`` | ||
| 3961 | - Use a single motion detection threshold. | ||
| 3962 | * - ``V4L2_DETECT_MD_MODE_THRESHOLD_GRID`` | ||
| 3963 | - The image is divided into a grid, each cell with its own motion | ||
| 3964 | detection threshold. These thresholds are set through the | ||
| 3965 | ``V4L2_CID_DETECT_MD_THRESHOLD_GRID`` matrix control. | ||
| 3966 | * - ``V4L2_DETECT_MD_MODE_REGION_GRID`` | ||
| 3967 | - The image is divided into a grid, each cell with its own region | ||
| 3968 | value that specifies which per-region motion detection thresholds | ||
| 3969 | should be used. Each region has its own thresholds. How these | ||
| 3970 | per-region thresholds are set up is driver-specific. The region | ||
| 3971 | values for the grid are set through the | ||
| 3972 | ``V4L2_CID_DETECT_MD_REGION_GRID`` matrix control. | ||
| 3973 | |||
| 3974 | |||
| 3975 | |||
| 3976 | ``V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD (integer)`` | ||
| 3977 | Sets the global motion detection threshold to be used with the | ||
| 3978 | ``V4L2_DETECT_MD_MODE_GLOBAL`` motion detection mode. | ||
| 3979 | |||
| 3980 | ``V4L2_CID_DETECT_MD_THRESHOLD_GRID (__u16 matrix)`` | ||
| 3981 | Sets the motion detection thresholds for each cell in the grid. To | ||
| 3982 | be used with the ``V4L2_DETECT_MD_MODE_THRESHOLD_GRID`` motion | ||
| 3983 | detection mode. Matrix element (0, 0) represents the cell at the | ||
| 3984 | top-left of the grid. | ||
| 3985 | |||
| 3986 | ``V4L2_CID_DETECT_MD_REGION_GRID (__u8 matrix)`` | ||
| 3987 | Sets the motion detection region value for each cell in the grid. To | ||
| 3988 | be used with the ``V4L2_DETECT_MD_MODE_REGION_GRID`` motion | ||
| 3989 | detection mode. Matrix element (0, 0) represents the cell at the | ||
| 3990 | top-left of the grid. | ||
| 3991 | |||
| 3992 | |||
| 3993 | .. _rf-tuner-controls: | ||
| 3994 | |||
| 3995 | RF Tuner Control Reference | ||
| 3996 | ========================== | ||
| 3997 | |||
| 3998 | The RF Tuner (RF_TUNER) class includes controls for common features of | ||
| 3999 | devices having RF tuner. | ||
| 4000 | |||
| 4001 | In this context, RF tuner is radio receiver circuit between antenna and | ||
| 4002 | demodulator. It receives radio frequency (RF) from the antenna and | ||
| 4003 | converts that received signal to lower intermediate frequency (IF) or | ||
| 4004 | baseband frequency (BB). Tuners that could do baseband output are often | ||
| 4005 | called Zero-IF tuners. Older tuners were typically simple PLL tuners | ||
| 4006 | inside a metal box, while newer ones are highly integrated chips | ||
| 4007 | without a metal box "silicon tuners". These controls are mostly | ||
| 4008 | applicable for new feature rich silicon tuners, just because older | ||
| 4009 | tuners does not have much adjustable features. | ||
| 4010 | |||
| 4011 | For more information about RF tuners see | ||
| 4012 | `Tuner (radio) <http://en.wikipedia.org/wiki/Tuner_%28radio%29>`__ | ||
| 4013 | and `RF front end <http://en.wikipedia.org/wiki/RF_front_end>`__ | ||
| 4014 | from Wikipedia. | ||
| 4015 | |||
| 4016 | |||
| 4017 | .. _rf-tuner-control-id: | ||
| 4018 | |||
| 4019 | RF_TUNER Control IDs | ||
| 4020 | -------------------- | ||
| 4021 | |||
| 4022 | ``V4L2_CID_RF_TUNER_CLASS (class)`` | ||
| 4023 | The RF_TUNER class descriptor. Calling | ||
| 4024 | :ref:`VIDIOC_QUERYCTRL` for this control will | ||
| 4025 | return a description of this control class. | ||
| 4026 | |||
| 4027 | ``V4L2_CID_RF_TUNER_BANDWIDTH_AUTO (boolean)`` | ||
| 4028 | Enables/disables tuner radio channel bandwidth configuration. In | ||
| 4029 | automatic mode bandwidth configuration is performed by the driver. | ||
| 4030 | |||
| 4031 | ``V4L2_CID_RF_TUNER_BANDWIDTH (integer)`` | ||
| 4032 | Filter(s) on tuner signal path are used to filter signal according | ||
| 4033 | to receiving party needs. Driver configures filters to fulfill | ||
| 4034 | desired bandwidth requirement. Used when | ||
| 4035 | V4L2_CID_RF_TUNER_BANDWIDTH_AUTO is not set. Unit is in Hz. The | ||
| 4036 | range and step are driver-specific. | ||
| 4037 | |||
| 4038 | ``V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (boolean)`` | ||
| 4039 | Enables/disables LNA automatic gain control (AGC) | ||
| 4040 | |||
| 4041 | ``V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (boolean)`` | ||
| 4042 | Enables/disables mixer automatic gain control (AGC) | ||
| 4043 | |||
| 4044 | ``V4L2_CID_RF_TUNER_IF_GAIN_AUTO (boolean)`` | ||
| 4045 | Enables/disables IF automatic gain control (AGC) | ||
| 4046 | |||
| 4047 | ``V4L2_CID_RF_TUNER_RF_GAIN (integer)`` | ||
| 4048 | The RF amplifier is the very first amplifier on the receiver signal | ||
| 4049 | path, just right after the antenna input. The difference between the | ||
| 4050 | LNA gain and the RF gain in this document is that the LNA gain is | ||
| 4051 | integrated in the tuner chip while the RF gain is a separate chip. | ||
| 4052 | There may be both RF and LNA gain controls in the same device. The | ||
| 4053 | range and step are driver-specific. | ||
| 4054 | |||
| 4055 | ``V4L2_CID_RF_TUNER_LNA_GAIN (integer)`` | ||
| 4056 | LNA (low noise amplifier) gain is first gain stage on the RF tuner | ||
| 4057 | signal path. It is located very close to tuner antenna input. Used | ||
| 4058 | when ``V4L2_CID_RF_TUNER_LNA_GAIN_AUTO`` is not set. See | ||
| 4059 | ``V4L2_CID_RF_TUNER_RF_GAIN`` to understand how RF gain and LNA gain | ||
| 4060 | differs from the each others. The range and step are | ||
| 4061 | driver-specific. | ||
| 4062 | |||
| 4063 | ``V4L2_CID_RF_TUNER_MIXER_GAIN (integer)`` | ||
| 4064 | Mixer gain is second gain stage on the RF tuner signal path. It is | ||
| 4065 | located inside mixer block, where RF signal is down-converted by the | ||
| 4066 | mixer. Used when ``V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO`` is not set. | ||
| 4067 | The range and step are driver-specific. | ||
| 4068 | |||
| 4069 | ``V4L2_CID_RF_TUNER_IF_GAIN (integer)`` | ||
| 4070 | IF gain is last gain stage on the RF tuner signal path. It is | ||
| 4071 | located on output of RF tuner. It controls signal level of | ||
| 4072 | intermediate frequency output or baseband output. Used when | ||
| 4073 | ``V4L2_CID_RF_TUNER_IF_GAIN_AUTO`` is not set. The range and step | ||
| 4074 | are driver-specific. | ||
| 4075 | |||
| 4076 | ``V4L2_CID_RF_TUNER_PLL_LOCK (boolean)`` | ||
| 4077 | Is synthesizer PLL locked? RF tuner is receiving given frequency | ||
| 4078 | when that control is set. This is a read-only control. | ||
| 4079 | |||
| 4080 | .. [#f1] | ||
| 4081 | This control may be changed to a menu control in the future, if more | ||
| 4082 | options are required. | ||
diff --git a/Documentation/media/uapi/v4l/meta-formats.rst b/Documentation/media/uapi/v4l/meta-formats.rst index 5f956fa784b7..b10ca9ee3968 100644 --- a/Documentation/media/uapi/v4l/meta-formats.rst +++ b/Documentation/media/uapi/v4l/meta-formats.rst | |||
| @@ -19,8 +19,8 @@ These formats are used for the :ref:`metadata` interface only. | |||
| 19 | .. toctree:: | 19 | .. toctree:: |
| 20 | :maxdepth: 1 | 20 | :maxdepth: 1 |
| 21 | 21 | ||
| 22 | pixfmt-meta-intel-ipu3 | ||
| 23 | pixfmt-meta-d4xx | 22 | pixfmt-meta-d4xx |
| 23 | pixfmt-meta-intel-ipu3 | ||
| 24 | pixfmt-meta-uvc | 24 | pixfmt-meta-uvc |
| 25 | pixfmt-meta-vsp1-hgo | 25 | pixfmt-meta-vsp1-hgo |
| 26 | pixfmt-meta-vsp1-hgt | 26 | pixfmt-meta-vsp1-hgt |
diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst index e4c5e456df59..2675bef3eefe 100644 --- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst +++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst | |||
| @@ -73,7 +73,7 @@ Compressed Formats | |||
| 73 | - 'MG2S' | 73 | - 'MG2S' |
| 74 | - MPEG-2 parsed slice data, as extracted from the MPEG-2 bitstream. | 74 | - MPEG-2 parsed slice data, as extracted from the MPEG-2 bitstream. |
| 75 | This format is adapted for stateless video decoders that implement a | 75 | This format is adapted for stateless video decoders that implement a |
| 76 | MPEG-2 pipeline (using the :ref:`codec` and :ref:`media-request-api`). | 76 | MPEG-2 pipeline (using the :ref:`mem2mem` and :ref:`media-request-api`). |
| 77 | Metadata associated with the frame to decode is required to be passed | 77 | Metadata associated with the frame to decode is required to be passed |
| 78 | through the ``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS`` control and | 78 | through the ``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS`` control and |
| 79 | quantization matrices can optionally be specified through the | 79 | quantization matrices can optionally be specified through the |
diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst b/Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst index dc871006b41a..7fb54339f4a7 100644 --- a/Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst +++ b/Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst | |||
| @@ -1,4 +1,27 @@ | |||
| 1 | .. -*- coding: utf-8; mode: rst -*- | 1 | .. This file is dual-licensed: you can use it either under the terms |
| 2 | .. of the GPL 2.0 or the GFDL 1.1+ license, at your option. Note that this | ||
| 3 | .. dual licensing only applies to this file, and not this project as a | ||
| 4 | .. whole. | ||
| 5 | .. | ||
| 6 | .. a) This file is free software; you can redistribute it and/or | ||
| 7 | .. modify it under the terms of the GNU General Public License version | ||
| 8 | .. 2.0 as published by the Free Software Foundation. | ||
| 9 | .. | ||
| 10 | .. This file is distributed in the hope that it will be useful, | ||
| 11 | .. but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | .. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | .. GNU General Public License version 2.0 for more details. | ||
| 14 | .. | ||
| 15 | .. Or, alternatively, | ||
| 16 | .. | ||
| 17 | .. b) Permission is granted to copy, distribute and/or modify this | ||
| 18 | .. document under the terms of the GNU Free Documentation License, | ||
| 19 | .. Version 1.1 or any later version published by the Free Software | ||
| 20 | .. Foundation, with no Invariant Sections, no Front-Cover Texts | ||
| 21 | .. and no Back-Cover Texts. A copy of the license is included at | ||
| 22 | .. Documentation/media/uapi/fdl-appendix.rst. | ||
| 23 | .. | ||
| 24 | .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | ||
| 2 | 25 | ||
| 3 | .. _v4l2-meta-fmt-params: | 26 | .. _v4l2-meta-fmt-params: |
| 4 | .. _v4l2-meta-fmt-stat-3a: | 27 | .. _v4l2-meta-fmt-stat-3a: |
| @@ -7,21 +30,22 @@ | |||
| 7 | V4L2_META_FMT_IPU3_PARAMS ('ip3p'), V4L2_META_FMT_IPU3_3A ('ip3s') | 30 | V4L2_META_FMT_IPU3_PARAMS ('ip3p'), V4L2_META_FMT_IPU3_3A ('ip3s') |
| 8 | ****************************************************************** | 31 | ****************************************************************** |
| 9 | 32 | ||
| 10 | .. c:type:: ipu3_uapi_stats_3a | 33 | .. ipu3_uapi_stats_3a |
| 11 | 34 | ||
| 12 | 3A statistics | 35 | 3A statistics |
| 13 | ============= | 36 | ============= |
| 14 | 37 | ||
| 15 | For IPU3 ImgU, the 3A statistics accelerators collect different statistics over | 38 | The IPU3 ImgU 3A statistics accelerators collect different statistics over |
| 16 | an input bayer frame. Those statistics, defined in data struct :c:type:`ipu3_uapi_stats_3a`, | 39 | an input Bayer frame. Those statistics are obtained from the "ipu3-imgu [01] 3a |
| 17 | are obtained from "ipu3-imgu 3a stat" metadata capture video node, which are then | 40 | stat" metadata capture video nodes, using the :c:type:`v4l2_meta_format` |
| 18 | passed to user space for statistics analysis using :c:type:`v4l2_meta_format` interface. | 41 | interface. They are formatted as described by the :c:type:`ipu3_uapi_stats_3a` |
| 42 | structure. | ||
| 19 | 43 | ||
| 20 | The statistics collected are AWB (Auto-white balance) RGBS (Red, Green, Blue and | 44 | The statistics collected are AWB (Auto-white balance) RGBS (Red, Green, Blue and |
| 21 | Saturation measure) cells, AWB filter response, AF (Auto-focus) filter response, | 45 | Saturation measure) cells, AWB filter response, AF (Auto-focus) filter response, |
| 22 | and AE (Auto-exposure) histogram. | 46 | and AE (Auto-exposure) histogram. |
| 23 | 47 | ||
| 24 | struct :c:type:`ipu3_uapi_4a_config` saves configurable parameters for all above. | 48 | The struct :c:type:`ipu3_uapi_4a_config` saves all configurable parameters. |
| 25 | 49 | ||
| 26 | .. code-block:: c | 50 | .. code-block:: c |
| 27 | 51 | ||
| @@ -37,105 +61,14 @@ struct :c:type:`ipu3_uapi_4a_config` saves configurable parameters for all above | |||
| 37 | struct ipu3_uapi_ff_status stats_3a_status; | 61 | struct ipu3_uapi_ff_status stats_3a_status; |
| 38 | }; | 62 | }; |
| 39 | 63 | ||
| 40 | .. c:type:: ipu3_uapi_params | 64 | .. ipu3_uapi_params |
| 41 | 65 | ||
| 42 | Pipeline parameters | 66 | Pipeline parameters |
| 43 | =================== | 67 | =================== |
| 44 | 68 | ||
| 45 | IPU3 pipeline has a number of image processing stages, each of which takes a | 69 | The pipeline parameters are passed to the "ipu3-imgu [01] parameters" metadata |
| 46 | set of parameters as input. The major stages of pipelines are shown here: | 70 | output video nodes, using the :c:type:`v4l2_meta_format` interface. They are |
| 47 | 71 | formatted as described by the :c:type:`ipu3_uapi_params` structure. | |
| 48 | Raw pixels -> Bayer Downscaling -> Optical Black Correction -> | ||
| 49 | |||
| 50 | Linearization -> Lens Shading Correction -> White Balance / Exposure / | ||
| 51 | |||
| 52 | Focus Apply -> Bayer Noise Reduction -> ANR -> Demosaicing -> Color | ||
| 53 | |||
| 54 | Correction Matrix -> Gamma correction -> Color Space Conversion -> | ||
| 55 | |||
| 56 | Chroma Down Scaling -> Chromatic Noise Reduction -> Total Color | ||
| 57 | |||
| 58 | Correction -> XNR3 -> TNR -> DDR | ||
| 59 | |||
| 60 | The table below presents a description of the above algorithms. | ||
| 61 | |||
| 62 | ======================== ======================================================= | ||
| 63 | Name Description | ||
| 64 | ======================== ======================================================= | ||
| 65 | Optical Black Correction Optical Black Correction block subtracts a pre-defined | ||
| 66 | value from the respective pixel values to obtain better | ||
| 67 | image quality. | ||
| 68 | Defined in :c:type:`ipu3_uapi_obgrid_param`. | ||
| 69 | Linearization This algo block uses linearization parameters to | ||
| 70 | address non-linearity sensor effects. The Lookup table | ||
| 71 | table is defined in | ||
| 72 | :c:type:`ipu3_uapi_isp_lin_vmem_params`. | ||
| 73 | SHD Lens shading correction is used to correct spatial | ||
| 74 | non-uniformity of the pixel response due to optical | ||
| 75 | lens shading. This is done by applying a different gain | ||
| 76 | for each pixel. The gain, black level etc are | ||
| 77 | configured in :c:type:`ipu3_uapi_shd_config_static`. | ||
| 78 | BNR Bayer noise reduction block removes image noise by | ||
| 79 | applying a bilateral filter. | ||
| 80 | See :c:type:`ipu3_uapi_bnr_static_config` for details. | ||
| 81 | ANR Advanced Noise Reduction is a block based algorithm | ||
| 82 | that performs noise reduction in the Bayer domain. The | ||
| 83 | convolution matrix etc can be found in | ||
| 84 | :c:type:`ipu3_uapi_anr_config`. | ||
| 85 | Demosaicing Demosaicing converts raw sensor data in Bayer format | ||
| 86 | into RGB (Red, Green, Blue) presentation. Then add | ||
| 87 | outputs of estimation of Y channel for following stream | ||
| 88 | processing by Firmware. The struct is defined as | ||
| 89 | :c:type:`ipu3_uapi_dm_config`. (TODO) | ||
| 90 | Color Correction Color Correction algo transforms sensor specific color | ||
| 91 | space to the standard "sRGB" color space. This is done | ||
| 92 | by applying 3x3 matrix defined in | ||
| 93 | :c:type:`ipu3_uapi_ccm_mat_config`. | ||
| 94 | Gamma correction Gamma correction :c:type:`ipu3_uapi_gamma_config` is a | ||
| 95 | basic non-linear tone mapping correction that is | ||
| 96 | applied per pixel for each pixel component. | ||
| 97 | CSC Color space conversion transforms each pixel from the | ||
| 98 | RGB primary presentation to YUV (Y: brightness, | ||
| 99 | UV: Luminance) presentation. This is done by applying | ||
| 100 | a 3x3 matrix defined in | ||
| 101 | :c:type:`ipu3_uapi_csc_mat_config` | ||
| 102 | CDS Chroma down sampling | ||
| 103 | After the CSC is performed, the Chroma Down Sampling | ||
| 104 | is applied for a UV plane down sampling by a factor | ||
| 105 | of 2 in each direction for YUV 4:2:0 using a 4x2 | ||
| 106 | configurable filter :c:type:`ipu3_uapi_cds_params`. | ||
| 107 | CHNR Chroma noise reduction | ||
| 108 | This block processes only the chrominance pixels and | ||
| 109 | performs noise reduction by cleaning the high | ||
| 110 | frequency noise. | ||
| 111 | See struct :c:type:`ipu3_uapi_yuvp1_chnr_config`. | ||
| 112 | TCC Total color correction as defined in struct | ||
| 113 | :c:type:`ipu3_uapi_yuvp2_tcc_static_config`. | ||
| 114 | XNR3 eXtreme Noise Reduction V3 is the third revision of | ||
| 115 | noise reduction algorithm used to improve image | ||
| 116 | quality. This removes the low frequency noise in the | ||
| 117 | captured image. Two related structs are being defined, | ||
| 118 | :c:type:`ipu3_uapi_isp_xnr3_params` for ISP data memory | ||
| 119 | and :c:type:`ipu3_uapi_isp_xnr3_vmem_params` for vector | ||
| 120 | memory. | ||
| 121 | TNR Temporal Noise Reduction block compares successive | ||
| 122 | frames in time to remove anomalies / noise in pixel | ||
| 123 | values. :c:type:`ipu3_uapi_isp_tnr3_vmem_params` and | ||
| 124 | :c:type:`ipu3_uapi_isp_tnr3_params` are defined for ISP | ||
| 125 | vector and data memory respectively. | ||
| 126 | ======================== ======================================================= | ||
| 127 | |||
| 128 | A few stages of the pipeline will be executed by firmware running on the ISP | ||
| 129 | processor, while many others will use a set of fixed hardware blocks also | ||
| 130 | called accelerator cluster (ACC) to crunch pixel data and produce statistics. | ||
| 131 | |||
| 132 | ACC parameters of individual algorithms, as defined by | ||
| 133 | :c:type:`ipu3_uapi_acc_param`, can be chosen to be applied by the user | ||
| 134 | space through struct :c:type:`ipu3_uapi_flags` embedded in | ||
| 135 | :c:type:`ipu3_uapi_params` structure. For parameters that are configured as | ||
| 136 | not enabled by the user space, the corresponding structs are ignored by the | ||
| 137 | driver, in which case the existing configuration of the algorithm will be | ||
| 138 | preserved. | ||
| 139 | 72 | ||
| 140 | Both 3A statistics and pipeline parameters described here are closely tied to | 73 | Both 3A statistics and pipeline parameters described here are closely tied to |
| 141 | the underlying camera sub-system (CSS) APIs. They are usually consumed and | 74 | the underlying camera sub-system (CSS) APIs. They are usually consumed and |
| @@ -143,13 +76,6 @@ produced by dedicated user space libraries that comprise the important tuning | |||
| 143 | tools, thus freeing the developers from being bothered with the low level | 76 | tools, thus freeing the developers from being bothered with the low level |
| 144 | hardware and algorithm details. | 77 | hardware and algorithm details. |
| 145 | 78 | ||
| 146 | It should be noted that IPU3 DMA operations require the addresses of all data | ||
| 147 | structures (that includes both input and output) to be aligned on 32 byte | ||
| 148 | boundaries. | ||
| 149 | |||
| 150 | The meta data :c:type:`ipu3_uapi_params` will be sent to "ipu3-imgu parameters" | ||
| 151 | video node in ``V4L2_BUF_TYPE_META_CAPTURE`` format. | ||
| 152 | |||
| 153 | .. code-block:: c | 79 | .. code-block:: c |
| 154 | 80 | ||
| 155 | struct ipu3_uapi_params { | 81 | struct ipu3_uapi_params { |
diff --git a/Documentation/media/uapi/v4l/pixfmt-packed-yuv.rst b/Documentation/media/uapi/v4l/pixfmt-packed-yuv.rst index f53e8f57a003..7fcee1c11ac4 100644 --- a/Documentation/media/uapi/v4l/pixfmt-packed-yuv.rst +++ b/Documentation/media/uapi/v4l/pixfmt-packed-yuv.rst | |||
| @@ -190,6 +190,170 @@ component of each pixel in one 16 or 32 bit word. | |||
| 190 | - Cr\ :sub:`2` | 190 | - Cr\ :sub:`2` |
| 191 | - Cr\ :sub:`1` | 191 | - Cr\ :sub:`1` |
| 192 | - Cr\ :sub:`0` | 192 | - Cr\ :sub:`0` |
| 193 | - | ||
| 194 | * .. _V4L2-PIX-FMT-AYUV32: | ||
| 195 | |||
| 196 | - ``V4L2_PIX_FMT_AYUV32`` | ||
| 197 | - 'AYUV' | ||
| 198 | |||
| 199 | - a\ :sub:`7` | ||
| 200 | - a\ :sub:`6` | ||
| 201 | - a\ :sub:`5` | ||
| 202 | - a\ :sub:`4` | ||
| 203 | - a\ :sub:`3` | ||
| 204 | - a\ :sub:`2` | ||
| 205 | - a\ :sub:`1` | ||
| 206 | - a\ :sub:`0` | ||
| 207 | |||
| 208 | - Y'\ :sub:`7` | ||
| 209 | - Y'\ :sub:`6` | ||
| 210 | - Y'\ :sub:`5` | ||
| 211 | - Y'\ :sub:`4` | ||
| 212 | - Y'\ :sub:`3` | ||
| 213 | - Y'\ :sub:`2` | ||
| 214 | - Y'\ :sub:`1` | ||
| 215 | - Y'\ :sub:`0` | ||
| 216 | |||
| 217 | - Cb\ :sub:`7` | ||
| 218 | - Cb\ :sub:`6` | ||
| 219 | - Cb\ :sub:`5` | ||
| 220 | - Cb\ :sub:`4` | ||
| 221 | - Cb\ :sub:`3` | ||
| 222 | - Cb\ :sub:`2` | ||
| 223 | - Cb\ :sub:`1` | ||
| 224 | - Cb\ :sub:`0` | ||
| 225 | |||
| 226 | - Cr\ :sub:`7` | ||
| 227 | - Cr\ :sub:`6` | ||
| 228 | - Cr\ :sub:`5` | ||
| 229 | - Cr\ :sub:`4` | ||
| 230 | - Cr\ :sub:`3` | ||
| 231 | - Cr\ :sub:`2` | ||
| 232 | - Cr\ :sub:`1` | ||
| 233 | - Cr\ :sub:`0` | ||
| 234 | - | ||
| 235 | * .. _V4L2-PIX-FMT-XYUV32: | ||
| 236 | |||
| 237 | - ``V4L2_PIX_FMT_XYUV32`` | ||
| 238 | - 'XYUV' | ||
| 239 | |||
| 240 | - | ||
| 241 | - | ||
| 242 | - | ||
| 243 | - | ||
| 244 | - | ||
| 245 | - | ||
| 246 | - | ||
| 247 | - | ||
| 248 | |||
| 249 | - Y'\ :sub:`7` | ||
| 250 | - Y'\ :sub:`6` | ||
| 251 | - Y'\ :sub:`5` | ||
| 252 | - Y'\ :sub:`4` | ||
| 253 | - Y'\ :sub:`3` | ||
| 254 | - Y'\ :sub:`2` | ||
| 255 | - Y'\ :sub:`1` | ||
| 256 | - Y'\ :sub:`0` | ||
| 257 | |||
| 258 | - Cb\ :sub:`7` | ||
| 259 | - Cb\ :sub:`6` | ||
| 260 | - Cb\ :sub:`5` | ||
| 261 | - Cb\ :sub:`4` | ||
| 262 | - Cb\ :sub:`3` | ||
| 263 | - Cb\ :sub:`2` | ||
| 264 | - Cb\ :sub:`1` | ||
| 265 | - Cb\ :sub:`0` | ||
| 266 | |||
| 267 | - Cr\ :sub:`7` | ||
| 268 | - Cr\ :sub:`6` | ||
| 269 | - Cr\ :sub:`5` | ||
| 270 | - Cr\ :sub:`4` | ||
| 271 | - Cr\ :sub:`3` | ||
| 272 | - Cr\ :sub:`2` | ||
| 273 | - Cr\ :sub:`1` | ||
| 274 | - Cr\ :sub:`0` | ||
| 275 | - | ||
| 276 | * .. _V4L2-PIX-FMT-VUYA32: | ||
| 277 | |||
| 278 | - ``V4L2_PIX_FMT_VUYA32`` | ||
| 279 | - 'VUYA' | ||
| 280 | |||
| 281 | - Cr\ :sub:`7` | ||
| 282 | - Cr\ :sub:`6` | ||
| 283 | - Cr\ :sub:`5` | ||
| 284 | - Cr\ :sub:`4` | ||
| 285 | - Cr\ :sub:`3` | ||
| 286 | - Cr\ :sub:`2` | ||
| 287 | - Cr\ :sub:`1` | ||
| 288 | - Cr\ :sub:`0` | ||
| 289 | |||
| 290 | - Cb\ :sub:`7` | ||
| 291 | - Cb\ :sub:`6` | ||
| 292 | - Cb\ :sub:`5` | ||
| 293 | - Cb\ :sub:`4` | ||
| 294 | - Cb\ :sub:`3` | ||
| 295 | - Cb\ :sub:`2` | ||
| 296 | - Cb\ :sub:`1` | ||
| 297 | - Cb\ :sub:`0` | ||
| 298 | |||
| 299 | - Y'\ :sub:`7` | ||
| 300 | - Y'\ :sub:`6` | ||
| 301 | - Y'\ :sub:`5` | ||
| 302 | - Y'\ :sub:`4` | ||
| 303 | - Y'\ :sub:`3` | ||
| 304 | - Y'\ :sub:`2` | ||
| 305 | - Y'\ :sub:`1` | ||
| 306 | - Y'\ :sub:`0` | ||
| 307 | |||
| 308 | - a\ :sub:`7` | ||
| 309 | - a\ :sub:`6` | ||
| 310 | - a\ :sub:`5` | ||
| 311 | - a\ :sub:`4` | ||
| 312 | - a\ :sub:`3` | ||
| 313 | - a\ :sub:`2` | ||
| 314 | - a\ :sub:`1` | ||
| 315 | - a\ :sub:`0` | ||
| 316 | - | ||
| 317 | * .. _V4L2-PIX-FMT-VUYX32: | ||
| 318 | |||
| 319 | - ``V4L2_PIX_FMT_VUYX32`` | ||
| 320 | - 'VUYX' | ||
| 321 | |||
| 322 | - Cr\ :sub:`7` | ||
| 323 | - Cr\ :sub:`6` | ||
| 324 | - Cr\ :sub:`5` | ||
| 325 | - Cr\ :sub:`4` | ||
| 326 | - Cr\ :sub:`3` | ||
| 327 | - Cr\ :sub:`2` | ||
| 328 | - Cr\ :sub:`1` | ||
| 329 | - Cr\ :sub:`0` | ||
| 330 | |||
| 331 | - Cb\ :sub:`7` | ||
| 332 | - Cb\ :sub:`6` | ||
| 333 | - Cb\ :sub:`5` | ||
| 334 | - Cb\ :sub:`4` | ||
| 335 | - Cb\ :sub:`3` | ||
| 336 | - Cb\ :sub:`2` | ||
| 337 | - Cb\ :sub:`1` | ||
| 338 | - Cb\ :sub:`0` | ||
| 339 | |||
| 340 | - Y'\ :sub:`7` | ||
| 341 | - Y'\ :sub:`6` | ||
| 342 | - Y'\ :sub:`5` | ||
| 343 | - Y'\ :sub:`4` | ||
| 344 | - Y'\ :sub:`3` | ||
| 345 | - Y'\ :sub:`2` | ||
| 346 | - Y'\ :sub:`1` | ||
| 347 | - Y'\ :sub:`0` | ||
| 348 | |||
| 349 | - | ||
| 350 | - | ||
| 351 | - | ||
| 352 | - | ||
| 353 | - | ||
| 354 | - | ||
| 355 | - | ||
| 356 | - | ||
| 193 | 357 | ||
| 194 | .. raw:: latex | 358 | .. raw:: latex |
| 195 | 359 | ||
| @@ -202,4 +366,8 @@ component of each pixel in one 16 or 32 bit word. | |||
| 202 | #) The value of a = alpha bits is undefined when reading from the driver, | 366 | #) The value of a = alpha bits is undefined when reading from the driver, |
| 203 | ignored when writing to the driver, except when alpha blending has | 367 | ignored when writing to the driver, except when alpha blending has |
| 204 | been negotiated for a :ref:`Video Overlay <overlay>` or | 368 | been negotiated for a :ref:`Video Overlay <overlay>` or |
| 205 | :ref:`Video Output Overlay <osd>`. | 369 | :ref:`Video Output Overlay <osd>` for the formats Y444, YUV555 and |
| 370 | YUV4. However, for formats AYUV32 and VUYA32, the alpha component is | ||
| 371 | expected to contain a meaningful value that can be used by drivers | ||
| 372 | and applications. And, the formats XYUV32 and VUYX32 contain undefined | ||
| 373 | alpha values that must be ignored by all applications and drivers. | ||
diff --git a/Documentation/media/uapi/v4l/subdev-formats.rst b/Documentation/media/uapi/v4l/subdev-formats.rst index ff4b2a972fd2..f5440d55d510 100644 --- a/Documentation/media/uapi/v4l/subdev-formats.rst +++ b/Documentation/media/uapi/v4l/subdev-formats.rst | |||
| @@ -75,15 +75,15 @@ Media Bus Pixel Codes | |||
| 75 | --------------------- | 75 | --------------------- |
| 76 | 76 | ||
| 77 | The media bus pixel codes describe image formats as flowing over | 77 | The media bus pixel codes describe image formats as flowing over |
| 78 | physical busses (both between separate physical components and inside | 78 | physical buses (both between separate physical components and inside |
| 79 | SoC devices). This should not be confused with the V4L2 pixel formats | 79 | SoC devices). This should not be confused with the V4L2 pixel formats |
| 80 | that describe, using four character codes, image formats as stored in | 80 | that describe, using four character codes, image formats as stored in |
| 81 | memory. | 81 | memory. |
| 82 | 82 | ||
| 83 | While there is a relationship between image formats on busses and image | 83 | While there is a relationship between image formats on buses and image |
| 84 | formats in memory (a raw Bayer image won't be magically converted to | 84 | formats in memory (a raw Bayer image won't be magically converted to |
| 85 | JPEG just by storing it to memory), there is no one-to-one | 85 | JPEG just by storing it to memory), there is no one-to-one |
| 86 | correspondance between them. | 86 | correspondence between them. |
| 87 | 87 | ||
| 88 | 88 | ||
| 89 | Packed RGB Formats | 89 | Packed RGB Formats |
diff --git a/Documentation/media/uapi/v4l/vidioc-g-parm.rst b/Documentation/media/uapi/v4l/vidioc-g-parm.rst index 0d2593176c90..d9d5d97848d3 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-parm.rst +++ b/Documentation/media/uapi/v4l/vidioc-g-parm.rst | |||
| @@ -213,7 +213,7 @@ union holding separate parameters for input and output devices. | |||
| 213 | 213 | ||
| 214 | .. _parm-caps: | 214 | .. _parm-caps: |
| 215 | 215 | ||
| 216 | .. flat-table:: Streaming Parameters Capabilites | 216 | .. flat-table:: Streaming Parameters Capabilities |
| 217 | :header-rows: 0 | 217 | :header-rows: 0 |
| 218 | :stub-columns: 0 | 218 | :stub-columns: 0 |
| 219 | :widths: 3 1 4 | 219 | :widths: 3 1 4 |
diff --git a/Documentation/media/uapi/v4l/vidioc-prepare-buf.rst b/Documentation/media/uapi/v4l/vidioc-prepare-buf.rst index 60986710967b..7c6b5f4e1011 100644 --- a/Documentation/media/uapi/v4l/vidioc-prepare-buf.rst +++ b/Documentation/media/uapi/v4l/vidioc-prepare-buf.rst | |||
| @@ -43,10 +43,7 @@ Applications can optionally call the :ref:`VIDIOC_PREPARE_BUF` ioctl to | |||
| 43 | pass ownership of the buffer to the driver before actually enqueuing it, | 43 | pass ownership of the buffer to the driver before actually enqueuing it, |
| 44 | using the :ref:`VIDIOC_QBUF <VIDIOC_QBUF>` ioctl, and to prepare it for future I/O. Such | 44 | using the :ref:`VIDIOC_QBUF <VIDIOC_QBUF>` ioctl, and to prepare it for future I/O. Such |
| 45 | preparations may include cache invalidation or cleaning. Performing them | 45 | preparations may include cache invalidation or cleaning. Performing them |
| 46 | in advance saves time during the actual I/O. In case such cache | 46 | in advance saves time during the actual I/O. |
| 47 | operations are not required, the application can use one of | ||
| 48 | ``V4L2_BUF_FLAG_NO_CACHE_INVALIDATE`` and | ||
| 49 | ``V4L2_BUF_FLAG_NO_CACHE_CLEAN`` flags to skip the respective step. | ||
| 50 | 47 | ||
| 51 | The struct :c:type:`v4l2_buffer` structure is specified in | 48 | The struct :c:type:`v4l2_buffer` structure is specified in |
| 52 | :ref:`buffer`. | 49 | :ref:`buffer`. |
diff --git a/Documentation/media/uapi/v4l/vidioc-qbuf.rst b/Documentation/media/uapi/v4l/vidioc-qbuf.rst index 3259168a7358..c138d149faea 100644 --- a/Documentation/media/uapi/v4l/vidioc-qbuf.rst +++ b/Documentation/media/uapi/v4l/vidioc-qbuf.rst | |||
| @@ -123,7 +123,7 @@ then ``EINVAL`` will be returned. | |||
| 123 | :ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` or calling :ref:`VIDIOC_REQBUFS` | 123 | :ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` or calling :ref:`VIDIOC_REQBUFS` |
| 124 | the check for this will be reset. | 124 | the check for this will be reset. |
| 125 | 125 | ||
| 126 | For :ref:`memory-to-memory devices <codec>` you can specify the | 126 | For :ref:`memory-to-memory devices <mem2mem>` you can specify the |
| 127 | ``request_fd`` only for output buffers, not for capture buffers. Attempting | 127 | ``request_fd`` only for output buffers, not for capture buffers. Attempting |
| 128 | to specify this for a capture buffer will result in an ``EACCES`` error. | 128 | to specify this for a capture buffer will result in an ``EACCES`` error. |
| 129 | 129 | ||
diff --git a/Documentation/media/v4l-drivers/bttv.rst b/Documentation/media/v4l-drivers/bttv.rst index d72a0f8fd267..f956ee264099 100644 --- a/Documentation/media/v4l-drivers/bttv.rst +++ b/Documentation/media/v4l-drivers/bttv.rst | |||
| @@ -85,7 +85,7 @@ same card listens there is much higher... | |||
| 85 | For problems with sound: There are a lot of different systems used | 85 | For problems with sound: There are a lot of different systems used |
| 86 | for TV sound all over the world. And there are also different chips | 86 | for TV sound all over the world. And there are also different chips |
| 87 | which decode the audio signal. Reports about sound problems ("stereo | 87 | which decode the audio signal. Reports about sound problems ("stereo |
| 88 | does'nt work") are pretty useless unless you include some details | 88 | doesn't work") are pretty useless unless you include some details |
| 89 | about your hardware and the TV sound scheme used in your country (or | 89 | about your hardware and the TV sound scheme used in your country (or |
| 90 | at least the country you are living in). | 90 | at least the country you are living in). |
| 91 | 91 | ||
| @@ -771,7 +771,7 @@ Identifying: | |||
| 771 | - Lifeview.com.tw states (Feb. 2002): | 771 | - Lifeview.com.tw states (Feb. 2002): |
| 772 | "The FlyVideo2000 and FlyVideo2000s product name have renamed to FlyVideo98." | 772 | "The FlyVideo2000 and FlyVideo2000s product name have renamed to FlyVideo98." |
| 773 | Their Bt8x8 cards are listed as discontinued. | 773 | Their Bt8x8 cards are listed as discontinued. |
| 774 | - Flyvideo 2000S was probably sold as Flyvideo 3000 in some contries(Europe?). | 774 | - Flyvideo 2000S was probably sold as Flyvideo 3000 in some countries(Europe?). |
| 775 | The new Flyvideo 2000/3000 are SAA7130/SAA7134 based. | 775 | The new Flyvideo 2000/3000 are SAA7130/SAA7134 based. |
| 776 | 776 | ||
| 777 | "Flyvideo II" had been the name for the 848 cards, nowadays (in Germany) | 777 | "Flyvideo II" had been the name for the 848 cards, nowadays (in Germany) |
diff --git a/Documentation/media/v4l-drivers/imx.rst b/Documentation/media/v4l-drivers/imx.rst index 6922dde4a82b..1d7eb8c7bd5c 100644 --- a/Documentation/media/v4l-drivers/imx.rst +++ b/Documentation/media/v4l-drivers/imx.rst | |||
| @@ -24,12 +24,12 @@ memory. Various dedicated DMA channels exist for both video capture and | |||
| 24 | display paths. During transfer, the IDMAC is also capable of vertical | 24 | display paths. During transfer, the IDMAC is also capable of vertical |
| 25 | image flip, 8x8 block transfer (see IRT description), pixel component | 25 | image flip, 8x8 block transfer (see IRT description), pixel component |
| 26 | re-ordering (for example UYVY to YUYV) within the same colorspace, and | 26 | re-ordering (for example UYVY to YUYV) within the same colorspace, and |
| 27 | even packed <--> planar conversion. It can also perform a simple | 27 | packed <--> planar conversion. The IDMAC can also perform a simple |
| 28 | de-interlacing by interleaving even and odd lines during transfer | 28 | de-interlacing by interweaving even and odd lines during transfer |
| 29 | (without motion compensation which requires the VDIC). | 29 | (without motion compensation which requires the VDIC). |
| 30 | 30 | ||
| 31 | The CSI is the backend capture unit that interfaces directly with | 31 | The CSI is the backend capture unit that interfaces directly with |
| 32 | camera sensors over Parallel, BT.656/1120, and MIPI CSI-2 busses. | 32 | camera sensors over Parallel, BT.656/1120, and MIPI CSI-2 buses. |
| 33 | 33 | ||
| 34 | The IC handles color-space conversion, resizing (downscaling and | 34 | The IC handles color-space conversion, resizing (downscaling and |
| 35 | upscaling), horizontal flip, and 90/270 degree rotation operations. | 35 | upscaling), horizontal flip, and 90/270 degree rotation operations. |
| @@ -175,15 +175,21 @@ via the SMFC and an IDMAC channel, bypassing IC pre-processing. This | |||
| 175 | source pad is routed to a capture device node, with a node name of the | 175 | source pad is routed to a capture device node, with a node name of the |
| 176 | format "ipuX_csiY capture". | 176 | format "ipuX_csiY capture". |
| 177 | 177 | ||
| 178 | Note that since the IDMAC source pad makes use of an IDMAC channel, it | 178 | Note that since the IDMAC source pad makes use of an IDMAC channel, |
| 179 | can do pixel reordering within the same colorspace. For example, the | 179 | pixel reordering within the same colorspace can be carried out by the |
| 180 | sink pad can take UYVY2X8, but the IDMAC source pad can output YUYV2X8. | 180 | IDMAC channel. For example, if the CSI sink pad is receiving in UYVY |
| 181 | If the sink pad is receiving YUV, the output at the capture device can | 181 | order, the capture device linked to the IDMAC source pad can capture |
| 182 | also be converted to a planar YUV format such as YUV420. | 182 | in YUYV order. Also, if the CSI sink pad is receiving a packed YUV |
| 183 | 183 | format, the capture device can capture a planar YUV format such as | |
| 184 | It will also perform simple de-interlace without motion compensation, | 184 | YUV420. |
| 185 | which is activated if the sink pad's field type is an interlaced type, | 185 | |
| 186 | and the IDMAC source pad field type is set to none. | 186 | The IDMAC channel at the IDMAC source pad also supports simple |
| 187 | interweave without motion compensation, which is activated if the source | ||
| 188 | pad's field type is sequential top-bottom or bottom-top, and the | ||
| 189 | requested capture interface field type is set to interlaced (t-b, b-t, | ||
| 190 | or unqualified interlaced). The capture interface will enforce the same | ||
| 191 | field order as the source pad field order (interlaced-bt if source pad | ||
| 192 | is seq-bt, interlaced-tb if source pad is seq-tb). | ||
| 187 | 193 | ||
| 188 | This subdev can generate the following event when enabling the second | 194 | This subdev can generate the following event when enabling the second |
| 189 | IDMAC source pad: | 195 | IDMAC source pad: |
| @@ -201,7 +207,7 @@ The CSI supports cropping the incoming raw sensor frames. This is | |||
| 201 | implemented in the ipuX_csiY entities at the sink pad, using the | 207 | implemented in the ipuX_csiY entities at the sink pad, using the |
| 202 | crop selection subdev API. | 208 | crop selection subdev API. |
| 203 | 209 | ||
| 204 | The CSI also supports fixed divide-by-two downscaling indepently in | 210 | The CSI also supports fixed divide-by-two downscaling independently in |
| 205 | width and height. This is implemented in the ipuX_csiY entities at | 211 | width and height. This is implemented in the ipuX_csiY entities at |
| 206 | the sink pad, using the compose selection subdev API. | 212 | the sink pad, using the compose selection subdev API. |
| 207 | 213 | ||
| @@ -325,14 +331,14 @@ ipuX_vdic | |||
| 325 | 331 | ||
| 326 | The VDIC carries out motion compensated de-interlacing, with three | 332 | The VDIC carries out motion compensated de-interlacing, with three |
| 327 | motion compensation modes: low, medium, and high motion. The mode is | 333 | motion compensation modes: low, medium, and high motion. The mode is |
| 328 | specified with the menu control V4L2_CID_DEINTERLACING_MODE. It has | 334 | specified with the menu control V4L2_CID_DEINTERLACING_MODE. The VDIC |
| 329 | two sink pads and a single source pad. | 335 | has two sink pads and a single source pad. |
| 330 | 336 | ||
| 331 | The direct sink pad receives from an ipuX_csiY direct pad. With this | 337 | The direct sink pad receives from an ipuX_csiY direct pad. With this |
| 332 | link the VDIC can only operate in high motion mode. | 338 | link the VDIC can only operate in high motion mode. |
| 333 | 339 | ||
| 334 | When the IDMAC sink pad is activated, it receives from an output | 340 | When the IDMAC sink pad is activated, it receives from an output |
| 335 | or mem2mem device node. With this pipeline, it can also operate | 341 | or mem2mem device node. With this pipeline, the VDIC can also operate |
| 336 | in low and medium modes, because these modes require receiving | 342 | in low and medium modes, because these modes require receiving |
| 337 | frames from memory buffers. Note that an output or mem2mem device | 343 | frames from memory buffers. Note that an output or mem2mem device |
| 338 | is not implemented yet, so this sink pad currently has no links. | 344 | is not implemented yet, so this sink pad currently has no links. |
| @@ -345,8 +351,8 @@ ipuX_ic_prp | |||
| 345 | This is the IC pre-processing entity. It acts as a router, routing | 351 | This is the IC pre-processing entity. It acts as a router, routing |
| 346 | data from its sink pad to one or both of its source pads. | 352 | data from its sink pad to one or both of its source pads. |
| 347 | 353 | ||
| 348 | It has a single sink pad. The sink pad can receive from the ipuX_csiY | 354 | This entity has a single sink pad. The sink pad can receive from the |
| 349 | direct pad, or from ipuX_vdic. | 355 | ipuX_csiY direct pad, or from ipuX_vdic. |
| 350 | 356 | ||
| 351 | This entity has two source pads. One source pad routes to the | 357 | This entity has two source pads. One source pad routes to the |
| 352 | pre-process encode task entity (ipuX_ic_prpenc), the other to the | 358 | pre-process encode task entity (ipuX_ic_prpenc), the other to the |
| @@ -369,8 +375,8 @@ color-space conversion, resizing (downscaling and upscaling), | |||
| 369 | horizontal and vertical flip, and 90/270 degree rotation. Flip | 375 | horizontal and vertical flip, and 90/270 degree rotation. Flip |
| 370 | and rotation are provided via standard V4L2 controls. | 376 | and rotation are provided via standard V4L2 controls. |
| 371 | 377 | ||
| 372 | Like the ipuX_csiY IDMAC source, it can also perform simple de-interlace | 378 | Like the ipuX_csiY IDMAC source, this entity also supports simple |
| 373 | without motion compensation, and pixel reordering. | 379 | de-interlace without motion compensation, and pixel reordering. |
| 374 | 380 | ||
| 375 | ipuX_ic_prpvf | 381 | ipuX_ic_prpvf |
| 376 | ------------- | 382 | ------------- |
| @@ -380,18 +386,18 @@ pad from ipuX_ic_prp, and a single source pad. The source pad is routed | |||
| 380 | to a capture device node, with a node name of the format | 386 | to a capture device node, with a node name of the format |
| 381 | "ipuX_ic_prpvf capture". | 387 | "ipuX_ic_prpvf capture". |
| 382 | 388 | ||
| 383 | It is identical in operation to ipuX_ic_prpenc, with the same resizing | 389 | This entity is identical in operation to ipuX_ic_prpenc, with the same |
| 384 | and CSC operations and flip/rotation controls. It will receive and | 390 | resizing and CSC operations and flip/rotation controls. It will receive |
| 385 | process de-interlaced frames from the ipuX_vdic if ipuX_ic_prp is | 391 | and process de-interlaced frames from the ipuX_vdic if ipuX_ic_prp is |
| 386 | receiving from ipuX_vdic. | 392 | receiving from ipuX_vdic. |
| 387 | 393 | ||
| 388 | Like the ipuX_csiY IDMAC source, it can perform simple de-interlace | 394 | Like the ipuX_csiY IDMAC source, this entity supports simple |
| 389 | without motion compensation. However, note that if the ipuX_vdic is | 395 | interweaving without motion compensation. However, note that if the |
| 390 | included in the pipeline (ipuX_ic_prp is receiving from ipuX_vdic), | 396 | ipuX_vdic is included in the pipeline (ipuX_ic_prp is receiving from |
| 391 | it's not possible to use simple de-interlace in ipuX_ic_prpvf, since | 397 | ipuX_vdic), it's not possible to use interweave in ipuX_ic_prpvf, |
| 392 | the ipuX_vdic has already carried out de-interlacing (with motion | 398 | since the ipuX_vdic has already carried out de-interlacing (with |
| 393 | compensation) and therefore the field type output from ipuX_ic_prp can | 399 | motion compensation) and therefore the field type output from |
| 394 | only be none. | 400 | ipuX_vdic can only be none (progressive). |
| 395 | 401 | ||
| 396 | Capture Pipelines | 402 | Capture Pipelines |
| 397 | ----------------- | 403 | ----------------- |
| @@ -516,10 +522,33 @@ On the SabreAuto, an on-board ADV7180 SD decoder is connected to the | |||
| 516 | parallel bus input on the internal video mux to IPU1 CSI0. | 522 | parallel bus input on the internal video mux to IPU1 CSI0. |
| 517 | 523 | ||
| 518 | The following example configures a pipeline to capture from the ADV7180 | 524 | The following example configures a pipeline to capture from the ADV7180 |
| 519 | video decoder, assuming NTSC 720x480 input signals, with Motion | 525 | video decoder, assuming NTSC 720x480 input signals, using simple |
| 520 | Compensated de-interlacing. Pad field types assume the adv7180 outputs | 526 | interweave (unconverted and without motion compensation). The adv7180 |
| 521 | "interlaced". $outputfmt can be any format supported by the ipu1_ic_prpvf | 527 | must output sequential or alternating fields (field type 'seq-bt' for |
| 522 | entity at its output pad: | 528 | NTSC, or 'alternate'): |
| 529 | |||
| 530 | .. code-block:: none | ||
| 531 | |||
| 532 | # Setup links | ||
| 533 | media-ctl -l "'adv7180 3-0021':0 -> 'ipu1_csi0_mux':1[1]" | ||
| 534 | media-ctl -l "'ipu1_csi0_mux':2 -> 'ipu1_csi0':0[1]" | ||
| 535 | media-ctl -l "'ipu1_csi0':2 -> 'ipu1_csi0 capture':0[1]" | ||
| 536 | # Configure pads | ||
| 537 | media-ctl -V "'adv7180 3-0021':0 [fmt:UYVY2X8/720x480 field:seq-bt]" | ||
| 538 | media-ctl -V "'ipu1_csi0_mux':2 [fmt:UYVY2X8/720x480]" | ||
| 539 | media-ctl -V "'ipu1_csi0':2 [fmt:AYUV32/720x480]" | ||
| 540 | # Configure "ipu1_csi0 capture" interface (assumed at /dev/video4) | ||
| 541 | v4l2-ctl -d4 --set-fmt-video=field=interlaced_bt | ||
| 542 | |||
| 543 | Streaming can then begin on /dev/video4. The v4l2-ctl tool can also be | ||
| 544 | used to select any supported YUV pixelformat on /dev/video4. | ||
| 545 | |||
| 546 | This example configures a pipeline to capture from the ADV7180 | ||
| 547 | video decoder, assuming PAL 720x576 input signals, with Motion | ||
| 548 | Compensated de-interlacing. The adv7180 must output sequential or | ||
| 549 | alternating fields (field type 'seq-tb' for PAL, or 'alternate'). | ||
| 550 | $outputfmt can be any format supported by the ipu1_ic_prpvf entity | ||
| 551 | at its output pad: | ||
| 523 | 552 | ||
| 524 | .. code-block:: none | 553 | .. code-block:: none |
| 525 | 554 | ||
| @@ -531,11 +560,11 @@ entity at its output pad: | |||
| 531 | media-ctl -l "'ipu1_ic_prp':2 -> 'ipu1_ic_prpvf':0[1]" | 560 | media-ctl -l "'ipu1_ic_prp':2 -> 'ipu1_ic_prpvf':0[1]" |
| 532 | media-ctl -l "'ipu1_ic_prpvf':1 -> 'ipu1_ic_prpvf capture':0[1]" | 561 | media-ctl -l "'ipu1_ic_prpvf':1 -> 'ipu1_ic_prpvf capture':0[1]" |
| 533 | # Configure pads | 562 | # Configure pads |
| 534 | media-ctl -V "'adv7180 3-0021':0 [fmt:UYVY2X8/720x480]" | 563 | media-ctl -V "'adv7180 3-0021':0 [fmt:UYVY2X8/720x576 field:seq-tb]" |
| 535 | media-ctl -V "'ipu1_csi0_mux':2 [fmt:UYVY2X8/720x480 field:interlaced]" | 564 | media-ctl -V "'ipu1_csi0_mux':2 [fmt:UYVY2X8/720x576]" |
| 536 | media-ctl -V "'ipu1_csi0':1 [fmt:AYUV32/720x480 field:interlaced]" | 565 | media-ctl -V "'ipu1_csi0':1 [fmt:AYUV32/720x576]" |
| 537 | media-ctl -V "'ipu1_vdic':2 [fmt:AYUV32/720x480 field:none]" | 566 | media-ctl -V "'ipu1_vdic':2 [fmt:AYUV32/720x576 field:none]" |
| 538 | media-ctl -V "'ipu1_ic_prp':2 [fmt:AYUV32/720x480 field:none]" | 567 | media-ctl -V "'ipu1_ic_prp':2 [fmt:AYUV32/720x576 field:none]" |
| 539 | media-ctl -V "'ipu1_ic_prpvf':1 [fmt:$outputfmt field:none]" | 568 | media-ctl -V "'ipu1_ic_prpvf':1 [fmt:$outputfmt field:none]" |
| 540 | 569 | ||
| 541 | Streaming can then begin on the capture device node at | 570 | Streaming can then begin on the capture device node at |
diff --git a/Documentation/media/v4l-drivers/imx7.rst b/Documentation/media/v4l-drivers/imx7.rst new file mode 100644 index 000000000000..fe411f65c01c --- /dev/null +++ b/Documentation/media/v4l-drivers/imx7.rst | |||
| @@ -0,0 +1,162 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | i.MX7 Video Capture Driver | ||
| 4 | ========================== | ||
| 5 | |||
| 6 | Introduction | ||
| 7 | ------------ | ||
| 8 | |||
| 9 | The i.MX7 contrary to the i.MX5/6 family does not contain an Image Processing | ||
| 10 | Unit (IPU); because of that the capabilities to perform operations or | ||
| 11 | manipulation of the capture frames are less feature rich. | ||
| 12 | |||
| 13 | For image capture the i.MX7 has three units: | ||
| 14 | - CMOS Sensor Interface (CSI) | ||
| 15 | - Video Multiplexer | ||
| 16 | - MIPI CSI-2 Receiver | ||
| 17 | |||
| 18 | .. code-block:: none | ||
| 19 | |||
| 20 | MIPI Camera Input ---> MIPI CSI-2 --- > |\ | ||
| 21 | | \ | ||
| 22 | | \ | ||
| 23 | | M | | ||
| 24 | | U | ------> CSI ---> Capture | ||
| 25 | | X | | ||
| 26 | | / | ||
| 27 | Parallel Camera Input ----------------> | / | ||
| 28 | |/ | ||
| 29 | |||
| 30 | For additional information, please refer to the latest versions of the i.MX7 | ||
| 31 | reference manual [#f1]_. | ||
| 32 | |||
| 33 | Entities | ||
| 34 | -------- | ||
| 35 | |||
| 36 | imx7-mipi-csi2 | ||
| 37 | -------------- | ||
| 38 | |||
| 39 | This is the MIPI CSI-2 receiver entity. It has one sink pad to receive the pixel | ||
| 40 | data from MIPI CSI-2 camera sensor. It has one source pad, corresponding to the | ||
| 41 | virtual channel 0. This module is compliant to previous version of Samsung | ||
| 42 | D-phy, and supports two D-PHY Rx Data lanes. | ||
| 43 | |||
| 44 | csi_mux | ||
| 45 | ------- | ||
| 46 | |||
| 47 | This is the video multiplexer. It has two sink pads to select from either camera | ||
| 48 | sensor with a parallel interface or from MIPI CSI-2 virtual channel 0. It has | ||
| 49 | a single source pad that routes to the CSI. | ||
| 50 | |||
| 51 | csi | ||
| 52 | --- | ||
| 53 | |||
| 54 | The CSI enables the chip to connect directly to external CMOS image sensor. CSI | ||
| 55 | can interface directly with Parallel and MIPI CSI-2 buses. It has 256 x 64 FIFO | ||
| 56 | to store received image pixel data and embedded DMA controllers to transfer data | ||
| 57 | from the FIFO through AHB bus. | ||
| 58 | |||
| 59 | This entity has one sink pad that receives from the csi_mux entity and a single | ||
| 60 | source pad that routes video frames directly to memory buffers. This pad is | ||
| 61 | routed to a capture device node. | ||
| 62 | |||
| 63 | Usage Notes | ||
| 64 | ----------- | ||
| 65 | |||
| 66 | To aid in configuration and for backward compatibility with V4L2 applications | ||
| 67 | that access controls only from video device nodes, the capture device interfaces | ||
| 68 | inherit controls from the active entities in the current pipeline, so controls | ||
| 69 | can be accessed either directly from the subdev or from the active capture | ||
| 70 | device interface. For example, the sensor controls are available either from the | ||
| 71 | sensor subdevs or from the active capture device. | ||
| 72 | |||
| 73 | Warp7 with OV2680 | ||
| 74 | ----------------- | ||
| 75 | |||
| 76 | On this platform an OV2680 MIPI CSI-2 module is connected to the internal MIPI | ||
| 77 | CSI-2 receiver. The following example configures a video capture pipeline with | ||
| 78 | an output of 800x600, and BGGR 10 bit bayer format: | ||
| 79 | |||
| 80 | .. code-block:: none | ||
| 81 | |||
| 82 | # Setup links | ||
| 83 | media-ctl -l "'ov2680 1-0036':0 -> 'imx7-mipi-csis.0':0[1]" | ||
| 84 | media-ctl -l "'imx7-mipi-csis.0':1 -> 'csi_mux':1[1]" | ||
| 85 | media-ctl -l "'csi_mux':2 -> 'csi':0[1]" | ||
| 86 | media-ctl -l "'csi':1 -> 'csi capture':0[1]" | ||
| 87 | |||
| 88 | # Configure pads for pipeline | ||
| 89 | media-ctl -V "'ov2680 1-0036':0 [fmt:SBGGR10_1X10/800x600 field:none]" | ||
| 90 | media-ctl -V "'csi_mux':1 [fmt:SBGGR10_1X10/800x600 field:none]" | ||
| 91 | media-ctl -V "'csi_mux':2 [fmt:SBGGR10_1X10/800x600 field:none]" | ||
| 92 | media-ctl -V "'imx7-mipi-csis.0':0 [fmt:SBGGR10_1X10/800x600 field:none]" | ||
| 93 | media-ctl -V "'csi':0 [fmt:SBGGR10_1X10/800x600 field:none]" | ||
| 94 | |||
| 95 | After this streaming can start. The v4l2-ctl tool can be used to select any of | ||
| 96 | the resolutions supported by the sensor. | ||
| 97 | |||
| 98 | .. code-block:: none | ||
| 99 | |||
| 100 | root@imx7s-warp:~# media-ctl -p | ||
| 101 | Media controller API version 4.17.0 | ||
| 102 | |||
| 103 | Media device information | ||
| 104 | ------------------------ | ||
| 105 | driver imx-media | ||
| 106 | model imx-media | ||
| 107 | serial | ||
| 108 | bus info | ||
| 109 | hw revision 0x0 | ||
| 110 | driver version 4.17.0 | ||
| 111 | |||
| 112 | Device topology | ||
| 113 | - entity 1: csi (2 pads, 2 links) | ||
| 114 | type V4L2 subdev subtype Unknown flags 0 | ||
| 115 | device node name /dev/v4l-subdev0 | ||
| 116 | pad0: Sink | ||
| 117 | [fmt:SBGGR10_1X10/800x600 field:none] | ||
| 118 | <- "csi_mux":2 [ENABLED] | ||
| 119 | pad1: Source | ||
| 120 | [fmt:SBGGR10_1X10/800x600 field:none] | ||
| 121 | -> "csi capture":0 [ENABLED] | ||
| 122 | |||
| 123 | - entity 4: csi capture (1 pad, 1 link) | ||
| 124 | type Node subtype V4L flags 0 | ||
| 125 | device node name /dev/video0 | ||
| 126 | pad0: Sink | ||
| 127 | <- "csi":1 [ENABLED] | ||
| 128 | |||
| 129 | - entity 10: csi_mux (3 pads, 2 links) | ||
| 130 | type V4L2 subdev subtype Unknown flags 0 | ||
| 131 | device node name /dev/v4l-subdev1 | ||
| 132 | pad0: Sink | ||
| 133 | [fmt:unknown/0x0] | ||
| 134 | pad1: Sink | ||
| 135 | [fmt:unknown/800x600 field:none] | ||
| 136 | <- "imx7-mipi-csis.0":1 [ENABLED] | ||
| 137 | pad2: Source | ||
| 138 | [fmt:unknown/800x600 field:none] | ||
| 139 | -> "csi":0 [ENABLED] | ||
| 140 | |||
| 141 | - entity 14: imx7-mipi-csis.0 (2 pads, 2 links) | ||
| 142 | type V4L2 subdev subtype Unknown flags 0 | ||
| 143 | device node name /dev/v4l-subdev2 | ||
| 144 | pad0: Sink | ||
| 145 | [fmt:SBGGR10_1X10/800x600 field:none] | ||
| 146 | <- "ov2680 1-0036":0 [ENABLED] | ||
| 147 | pad1: Source | ||
| 148 | [fmt:SBGGR10_1X10/800x600 field:none] | ||
| 149 | -> "csi_mux":1 [ENABLED] | ||
| 150 | |||
| 151 | - entity 17: ov2680 1-0036 (1 pad, 1 link) | ||
| 152 | type V4L2 subdev subtype Sensor flags 0 | ||
| 153 | device node name /dev/v4l-subdev3 | ||
| 154 | pad0: Source | ||
| 155 | [fmt:SBGGR10_1X10/800x600 field:none] | ||
| 156 | -> "imx7-mipi-csis.0":0 [ENABLED] | ||
| 157 | |||
| 158 | |||
| 159 | References | ||
| 160 | ---------- | ||
| 161 | |||
| 162 | .. [#f1] https://www.nxp.com/docs/en/reference-manual/IMX7SRM.pdf | ||
diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index f28570ec9e42..dfd4b205937c 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst | |||
| @@ -44,6 +44,7 @@ For more details see the file COPYING in the source distribution of Linux. | |||
| 44 | davinci-vpbe | 44 | davinci-vpbe |
| 45 | fimc | 45 | fimc |
| 46 | imx | 46 | imx |
| 47 | imx7 | ||
| 47 | ipu3 | 48 | ipu3 |
| 48 | ivtv | 49 | ivtv |
| 49 | max2175 | 50 | max2175 |
diff --git a/Documentation/media/v4l-drivers/ipu3.rst b/Documentation/media/v4l-drivers/ipu3.rst index f89b51dafadd..c9f780404eee 100644 --- a/Documentation/media/v4l-drivers/ipu3.rst +++ b/Documentation/media/v4l-drivers/ipu3.rst | |||
| @@ -1,3 +1,5 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 1 | .. include:: <isonum.txt> | 3 | .. include:: <isonum.txt> |
| 2 | 4 | ||
| 3 | =============================================================== | 5 | =============================================================== |
| @@ -355,10 +357,157 @@ https://chromium.googlesource.com/chromiumos/platform/arc-camera/+/master/ | |||
| 355 | 357 | ||
| 356 | The source can be located under hal/intel directory. | 358 | The source can be located under hal/intel directory. |
| 357 | 359 | ||
| 360 | Overview of IPU3 pipeline | ||
| 361 | ========================= | ||
| 362 | |||
| 363 | IPU3 pipeline has a number of image processing stages, each of which takes a | ||
| 364 | set of parameters as input. The major stages of pipelines are shown here: | ||
| 365 | |||
| 366 | .. kernel-render:: DOT | ||
| 367 | :alt: IPU3 ImgU Pipeline | ||
| 368 | :caption: IPU3 ImgU Pipeline Diagram | ||
| 369 | |||
| 370 | digraph "IPU3 ImgU" { | ||
| 371 | node [shape=box] | ||
| 372 | splines="ortho" | ||
| 373 | rankdir="LR" | ||
| 374 | |||
| 375 | a [label="Raw pixels"] | ||
| 376 | b [label="Bayer Downscaling"] | ||
| 377 | c [label="Optical Black Correction"] | ||
| 378 | d [label="Linearization"] | ||
| 379 | e [label="Lens Shading Correction"] | ||
| 380 | f [label="White Balance / Exposure / Focus Apply"] | ||
| 381 | g [label="Bayer Noise Reduction"] | ||
| 382 | h [label="ANR"] | ||
| 383 | i [label="Demosaicing"] | ||
| 384 | j [label="Color Correction Matrix"] | ||
| 385 | k [label="Gamma correction"] | ||
| 386 | l [label="Color Space Conversion"] | ||
| 387 | m [label="Chroma Down Scaling"] | ||
| 388 | n [label="Chromatic Noise Reduction"] | ||
| 389 | o [label="Total Color Correction"] | ||
| 390 | p [label="XNR3"] | ||
| 391 | q [label="TNR"] | ||
| 392 | r [label="DDR"] | ||
| 393 | |||
| 394 | { rank=same; a -> b -> c -> d -> e -> f } | ||
| 395 | { rank=same; g -> h -> i -> j -> k -> l } | ||
| 396 | { rank=same; m -> n -> o -> p -> q -> r } | ||
| 397 | |||
| 398 | a -> g -> m [style=invis, weight=10] | ||
| 399 | |||
| 400 | f -> g | ||
| 401 | l -> m | ||
| 402 | } | ||
| 403 | |||
| 404 | The table below presents a description of the above algorithms. | ||
| 405 | |||
| 406 | ======================== ======================================================= | ||
| 407 | Name Description | ||
| 408 | ======================== ======================================================= | ||
| 409 | Optical Black Correction Optical Black Correction block subtracts a pre-defined | ||
| 410 | value from the respective pixel values to obtain better | ||
| 411 | image quality. | ||
| 412 | Defined in :c:type:`ipu3_uapi_obgrid_param`. | ||
| 413 | Linearization This algo block uses linearization parameters to | ||
| 414 | address non-linearity sensor effects. The Lookup table | ||
| 415 | table is defined in | ||
| 416 | :c:type:`ipu3_uapi_isp_lin_vmem_params`. | ||
| 417 | SHD Lens shading correction is used to correct spatial | ||
| 418 | non-uniformity of the pixel response due to optical | ||
| 419 | lens shading. This is done by applying a different gain | ||
| 420 | for each pixel. The gain, black level etc are | ||
| 421 | configured in :c:type:`ipu3_uapi_shd_config_static`. | ||
| 422 | BNR Bayer noise reduction block removes image noise by | ||
| 423 | applying a bilateral filter. | ||
| 424 | See :c:type:`ipu3_uapi_bnr_static_config` for details. | ||
| 425 | ANR Advanced Noise Reduction is a block based algorithm | ||
| 426 | that performs noise reduction in the Bayer domain. The | ||
| 427 | convolution matrix etc can be found in | ||
| 428 | :c:type:`ipu3_uapi_anr_config`. | ||
| 429 | DM Demosaicing converts raw sensor data in Bayer format | ||
| 430 | into RGB (Red, Green, Blue) presentation. Then add | ||
| 431 | outputs of estimation of Y channel for following stream | ||
| 432 | processing by Firmware. The struct is defined as | ||
| 433 | :c:type:`ipu3_uapi_dm_config`. | ||
| 434 | Color Correction Color Correction algo transforms sensor specific color | ||
| 435 | space to the standard "sRGB" color space. This is done | ||
| 436 | by applying 3x3 matrix defined in | ||
| 437 | :c:type:`ipu3_uapi_ccm_mat_config`. | ||
| 438 | Gamma correction Gamma correction :c:type:`ipu3_uapi_gamma_config` is a | ||
| 439 | basic non-linear tone mapping correction that is | ||
| 440 | applied per pixel for each pixel component. | ||
| 441 | CSC Color space conversion transforms each pixel from the | ||
| 442 | RGB primary presentation to YUV (Y: brightness, | ||
| 443 | UV: Luminance) presentation. This is done by applying | ||
| 444 | a 3x3 matrix defined in | ||
| 445 | :c:type:`ipu3_uapi_csc_mat_config` | ||
| 446 | CDS Chroma down sampling | ||
| 447 | After the CSC is performed, the Chroma Down Sampling | ||
| 448 | is applied for a UV plane down sampling by a factor | ||
| 449 | of 2 in each direction for YUV 4:2:0 using a 4x2 | ||
| 450 | configurable filter :c:type:`ipu3_uapi_cds_params`. | ||
| 451 | CHNR Chroma noise reduction | ||
| 452 | This block processes only the chrominance pixels and | ||
| 453 | performs noise reduction by cleaning the high | ||
| 454 | frequency noise. | ||
| 455 | See struct :c:type:`ipu3_uapi_yuvp1_chnr_config`. | ||
| 456 | TCC Total color correction as defined in struct | ||
| 457 | :c:type:`ipu3_uapi_yuvp2_tcc_static_config`. | ||
| 458 | XNR3 eXtreme Noise Reduction V3 is the third revision of | ||
| 459 | noise reduction algorithm used to improve image | ||
| 460 | quality. This removes the low frequency noise in the | ||
| 461 | captured image. Two related structs are being defined, | ||
| 462 | :c:type:`ipu3_uapi_isp_xnr3_params` for ISP data memory | ||
| 463 | and :c:type:`ipu3_uapi_isp_xnr3_vmem_params` for vector | ||
| 464 | memory. | ||
| 465 | TNR Temporal Noise Reduction block compares successive | ||
| 466 | frames in time to remove anomalies / noise in pixel | ||
| 467 | values. :c:type:`ipu3_uapi_isp_tnr3_vmem_params` and | ||
| 468 | :c:type:`ipu3_uapi_isp_tnr3_params` are defined for ISP | ||
| 469 | vector and data memory respectively. | ||
| 470 | ======================== ======================================================= | ||
| 471 | |||
| 472 | Other often encountered acronyms not listed in above table: | ||
| 473 | |||
| 474 | ACC | ||
| 475 | Accelerator cluster | ||
| 476 | AWB_FR | ||
| 477 | Auto white balance filter response statistics | ||
| 478 | BDS | ||
| 479 | Bayer downscaler parameters | ||
| 480 | CCM | ||
| 481 | Color correction matrix coefficients | ||
| 482 | IEFd | ||
| 483 | Image enhancement filter directed | ||
| 484 | Obgrid | ||
| 485 | Optical black level compensation | ||
| 486 | OSYS | ||
| 487 | Output system configuration | ||
| 488 | ROI | ||
| 489 | Region of interest | ||
| 490 | YDS | ||
| 491 | Y down sampling | ||
| 492 | YTM | ||
| 493 | Y-tone mapping | ||
| 494 | |||
| 495 | A few stages of the pipeline will be executed by firmware running on the ISP | ||
| 496 | processor, while many others will use a set of fixed hardware blocks also | ||
| 497 | called accelerator cluster (ACC) to crunch pixel data and produce statistics. | ||
| 498 | |||
| 499 | ACC parameters of individual algorithms, as defined by | ||
| 500 | :c:type:`ipu3_uapi_acc_param`, can be chosen to be applied by the user | ||
| 501 | space through struct :c:type:`ipu3_uapi_flags` embedded in | ||
| 502 | :c:type:`ipu3_uapi_params` structure. For parameters that are configured as | ||
| 503 | not enabled by the user space, the corresponding structs are ignored by the | ||
| 504 | driver, in which case the existing configuration of the algorithm will be | ||
| 505 | preserved. | ||
| 506 | |||
| 358 | References | 507 | References |
| 359 | ========== | 508 | ========== |
| 360 | 509 | ||
| 361 | .. [#f5] include/uapi/linux/intel-ipu3.h | 510 | .. [#f5] drivers/staging/media/ipu3/include/intel-ipu3.h |
| 362 | 511 | ||
| 363 | .. [#f1] https://github.com/intel/nvt | 512 | .. [#f1] https://github.com/intel/nvt |
| 364 | 513 | ||
diff --git a/Documentation/media/v4l-drivers/pxa_camera.rst b/Documentation/media/v4l-drivers/pxa_camera.rst index e4fbca755e1a..ee1bd96b66dd 100644 --- a/Documentation/media/v4l-drivers/pxa_camera.rst +++ b/Documentation/media/v4l-drivers/pxa_camera.rst | |||
| @@ -18,7 +18,7 @@ Global video workflow | |||
| 18 | --------------------- | 18 | --------------------- |
| 19 | 19 | ||
| 20 | a) QCI stopped | 20 | a) QCI stopped |
| 21 | Initialy, the QCI interface is stopped. | 21 | Initially, the QCI interface is stopped. |
| 22 | When a buffer is queued (pxa_videobuf_ops->buf_queue), the QCI starts. | 22 | When a buffer is queued (pxa_videobuf_ops->buf_queue), the QCI starts. |
| 23 | 23 | ||
| 24 | b) QCI started | 24 | b) QCI started |
diff --git a/Documentation/media/v4l-drivers/qcom_camss.rst b/Documentation/media/v4l-drivers/qcom_camss.rst index 6b15385b12b3..a72e17d09cb7 100644 --- a/Documentation/media/v4l-drivers/qcom_camss.rst +++ b/Documentation/media/v4l-drivers/qcom_camss.rst | |||
| @@ -123,7 +123,7 @@ The considerations to split the driver in this particular way are as follows: | |||
| 123 | - representing CSIPHY and CSID modules by a separate sub-device for each module | 123 | - representing CSIPHY and CSID modules by a separate sub-device for each module |
| 124 | allows to model the hardware links between these modules; | 124 | allows to model the hardware links between these modules; |
| 125 | - representing VFE by a separate sub-devices for each input interface allows | 125 | - representing VFE by a separate sub-devices for each input interface allows |
| 126 | to use the input interfaces concurently and independently as this is | 126 | to use the input interfaces concurrently and independently as this is |
| 127 | supported by the hardware; | 127 | supported by the hardware; |
| 128 | - representing ISPIF by a number of sub-devices equal to the number of CSID | 128 | - representing ISPIF by a number of sub-devices equal to the number of CSID |
| 129 | sub-devices allows to create linear media controller pipelines when using two | 129 | sub-devices allows to create linear media controller pipelines when using two |
diff --git a/MAINTAINERS b/MAINTAINERS index a62416c51418..f28288f1bf07 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
| @@ -2140,8 +2140,9 @@ F: drivers/media/platform/s5p-cec/ | |||
| 2140 | F: Documentation/devicetree/bindings/media/s5p-cec.txt | 2140 | F: Documentation/devicetree/bindings/media/s5p-cec.txt |
| 2141 | 2141 | ||
| 2142 | ARM/SAMSUNG S5P SERIES JPEG CODEC SUPPORT | 2142 | ARM/SAMSUNG S5P SERIES JPEG CODEC SUPPORT |
| 2143 | M: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 2143 | M: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 2144 | M: Jacek Anaszewski <jacek.anaszewski@gmail.com> | 2144 | M: Jacek Anaszewski <jacek.anaszewski@gmail.com> |
| 2145 | M: Sylwester Nawrocki <s.nawrocki@samsung.com> | ||
| 2145 | L: linux-arm-kernel@lists.infradead.org | 2146 | L: linux-arm-kernel@lists.infradead.org |
| 2146 | L: linux-media@vger.kernel.org | 2147 | L: linux-media@vger.kernel.org |
| 2147 | S: Maintained | 2148 | S: Maintained |
| @@ -7852,7 +7853,6 @@ M: Yong Zhi <yong.zhi@intel.com> | |||
| 7852 | M: Sakari Ailus <sakari.ailus@linux.intel.com> | 7853 | M: Sakari Ailus <sakari.ailus@linux.intel.com> |
| 7853 | M: Bingbu Cao <bingbu.cao@intel.com> | 7854 | M: Bingbu Cao <bingbu.cao@intel.com> |
| 7854 | R: Tian Shu Qiu <tian.shu.qiu@intel.com> | 7855 | R: Tian Shu Qiu <tian.shu.qiu@intel.com> |
| 7855 | R: Jian Xu Zheng <jian.xu.zheng@intel.com> | ||
| 7856 | L: linux-media@vger.kernel.org | 7856 | L: linux-media@vger.kernel.org |
| 7857 | S: Maintained | 7857 | S: Maintained |
| 7858 | F: drivers/media/pci/intel/ipu3/ | 7858 | F: drivers/media/pci/intel/ipu3/ |
| @@ -9526,6 +9526,17 @@ T: git git://linuxtv.org/media_tree.git | |||
| 9526 | S: Maintained | 9526 | S: Maintained |
| 9527 | F: drivers/media/platform/imx-pxp.[ch] | 9527 | F: drivers/media/platform/imx-pxp.[ch] |
| 9528 | 9528 | ||
| 9529 | MEDIA DRIVERS FOR FREESCALE IMX7 | ||
| 9530 | M: Rui Miguel Silva <rmfrfs@gmail.com> | ||
| 9531 | L: linux-media@vger.kernel.org | ||
| 9532 | T: git git://linuxtv.org/media_tree.git | ||
| 9533 | S: Maintained | ||
| 9534 | F: Documentation/devicetree/bindings/media/imx7-csi.txt | ||
| 9535 | F: Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt | ||
| 9536 | F: Documentation/media/v4l-drivers/imx7.rst | ||
| 9537 | F: drivers/staging/media/imx/imx7-media-csi.c | ||
| 9538 | F: drivers/staging/media/imx/imx7-mipi-csis.c | ||
| 9539 | |||
| 9529 | MEDIA DRIVERS FOR HELENE | 9540 | MEDIA DRIVERS FOR HELENE |
| 9530 | M: Abylay Ospan <aospan@netup.ru> | 9541 | M: Abylay Ospan <aospan@netup.ru> |
| 9531 | L: linux-media@vger.kernel.org | 9542 | L: linux-media@vger.kernel.org |
| @@ -11441,6 +11452,19 @@ S: Maintained | |||
| 11441 | F: drivers/media/i2c/ov7740.c | 11452 | F: drivers/media/i2c/ov7740.c |
| 11442 | F: Documentation/devicetree/bindings/media/i2c/ov7740.txt | 11453 | F: Documentation/devicetree/bindings/media/i2c/ov7740.txt |
| 11443 | 11454 | ||
| 11455 | OMNIVISION OV9640 SENSOR DRIVER | ||
| 11456 | M: Petr Cvek <petrcvekcz@gmail.com> | ||
| 11457 | L: linux-media@vger.kernel.org | ||
| 11458 | S: Maintained | ||
| 11459 | F: drivers/media/i2c/ov9640.* | ||
| 11460 | |||
| 11461 | OMNIVISION OV8856 SENSOR DRIVER | ||
| 11462 | M: Ben Kao <ben.kao@intel.com> | ||
| 11463 | L: linux-media@vger.kernel.org | ||
| 11464 | T: git git://linuxtv.org/media_tree.git | ||
| 11465 | S: Maintained | ||
| 11466 | F: drivers/media/i2c/ov8856.c | ||
| 11467 | |||
| 11444 | OMNIVISION OV9650 SENSOR DRIVER | 11468 | OMNIVISION OV9650 SENSOR DRIVER |
| 11445 | M: Sakari Ailus <sakari.ailus@linux.intel.com> | 11469 | M: Sakari Ailus <sakari.ailus@linux.intel.com> |
| 11446 | R: Akinobu Mita <akinobu.mita@gmail.com> | 11470 | R: Akinobu Mita <akinobu.mita@gmail.com> |
| @@ -12585,6 +12609,7 @@ L: linux-media@vger.kernel.org | |||
| 12585 | T: git git://linuxtv.org/media_tree.git | 12609 | T: git git://linuxtv.org/media_tree.git |
| 12586 | S: Odd Fixes | 12610 | S: Odd Fixes |
| 12587 | F: drivers/media/usb/pwc/* | 12611 | F: drivers/media/usb/pwc/* |
| 12612 | F: include/trace/events/pwc.h | ||
| 12588 | 12613 | ||
| 12589 | PWM FAN DRIVER | 12614 | PWM FAN DRIVER |
| 12590 | M: Kamil Debski <kamil@wypas.org> | 12615 | M: Kamil Debski <kamil@wypas.org> |
| @@ -16764,6 +16789,11 @@ M: David Härdeman <david@hardeman.nu> | |||
| 16764 | S: Maintained | 16789 | S: Maintained |
| 16765 | F: drivers/media/rc/winbond-cir.c | 16790 | F: drivers/media/rc/winbond-cir.c |
| 16766 | 16791 | ||
| 16792 | RCMM REMOTE CONTROLS DECODER | ||
| 16793 | M: Patrick Lerda <patrick9876@free.fr> | ||
| 16794 | S: Maintained | ||
| 16795 | F: drivers/media/rc/ir-rcmm-decoder.c | ||
| 16796 | |||
| 16767 | WINSYSTEMS EBC-C384 WATCHDOG DRIVER | 16797 | WINSYSTEMS EBC-C384 WATCHDOG DRIVER |
| 16768 | M: William Breathitt Gray <vilhelm.gray@gmail.com> | 16798 | M: William Breathitt Gray <vilhelm.gray@gmail.com> |
| 16769 | L: linux-watchdog@vger.kernel.org | 16799 | L: linux-watchdog@vger.kernel.org |
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index f4ad33c6d2aa..1d2993bdd231 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | * Copyright (C) 2008 Magnus Damm | 5 | * Copyright (C) 2008 Magnus Damm |
| 6 | */ | 6 | */ |
| 7 | #include <linux/clkdev.h> | 7 | #include <linux/clkdev.h> |
| 8 | #include <linux/dma-mapping.h> | ||
| 8 | #include <linux/init.h> | 9 | #include <linux/init.h> |
| 9 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
| 10 | #include <linux/interrupt.h> | 11 | #include <linux/interrupt.h> |
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index 163fadb8a33a..d047a6867c59 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c | |||
| @@ -277,9 +277,10 @@ void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off) | |||
| 277 | } | 277 | } |
| 278 | EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); | 278 | EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); |
| 279 | 279 | ||
| 280 | void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) | 280 | void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride, |
| 281 | u32 pixelformat) | ||
| 281 | { | 282 | { |
| 282 | u32 ilo, sly; | 283 | u32 ilo, sly, sluv; |
| 283 | 284 | ||
| 284 | if (stride < 0) { | 285 | if (stride < 0) { |
| 285 | stride = -stride; | 286 | stride = -stride; |
| @@ -290,9 +291,30 @@ void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) | |||
| 290 | 291 | ||
| 291 | sly = (stride * 2) - 1; | 292 | sly = (stride * 2) - 1; |
| 292 | 293 | ||
| 294 | switch (pixelformat) { | ||
| 295 | case V4L2_PIX_FMT_YUV420: | ||
| 296 | case V4L2_PIX_FMT_YVU420: | ||
| 297 | sluv = stride / 2 - 1; | ||
| 298 | break; | ||
| 299 | case V4L2_PIX_FMT_NV12: | ||
| 300 | sluv = stride - 1; | ||
| 301 | break; | ||
| 302 | case V4L2_PIX_FMT_YUV422P: | ||
| 303 | sluv = stride - 1; | ||
| 304 | break; | ||
| 305 | case V4L2_PIX_FMT_NV16: | ||
| 306 | sluv = stride * 2 - 1; | ||
| 307 | break; | ||
| 308 | default: | ||
| 309 | sluv = 0; | ||
| 310 | break; | ||
| 311 | } | ||
| 312 | |||
| 293 | ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); | 313 | ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); |
| 294 | ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); | 314 | ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); |
| 295 | ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); | 315 | ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); |
| 316 | if (sluv) | ||
| 317 | ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, sluv); | ||
| 296 | }; | 318 | }; |
| 297 | EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); | 319 | EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); |
| 298 | 320 | ||
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c index aa0e30a2ba18..d1e575571a8d 100644 --- a/drivers/gpu/ipu-v3/ipu-csi.c +++ b/drivers/gpu/ipu-v3/ipu-csi.c | |||
| @@ -325,12 +325,21 @@ static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code, | |||
| 325 | return 0; | 325 | return 0; |
| 326 | } | 326 | } |
| 327 | 327 | ||
| 328 | /* translate alternate field mode based on given standard */ | ||
| 329 | static inline enum v4l2_field | ||
| 330 | ipu_csi_translate_field(enum v4l2_field field, v4l2_std_id std) | ||
| 331 | { | ||
| 332 | return (field != V4L2_FIELD_ALTERNATE) ? field : | ||
| 333 | ((std & V4L2_STD_525_60) ? | ||
| 334 | V4L2_FIELD_SEQ_BT : V4L2_FIELD_SEQ_TB); | ||
| 335 | } | ||
| 336 | |||
| 328 | /* | 337 | /* |
| 329 | * Fill a CSI bus config struct from mbus_config and mbus_framefmt. | 338 | * Fill a CSI bus config struct from mbus_config and mbus_framefmt. |
| 330 | */ | 339 | */ |
| 331 | static int fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, | 340 | static int fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, |
| 332 | struct v4l2_mbus_config *mbus_cfg, | 341 | const struct v4l2_mbus_config *mbus_cfg, |
| 333 | struct v4l2_mbus_framefmt *mbus_fmt) | 342 | const struct v4l2_mbus_framefmt *mbus_fmt) |
| 334 | { | 343 | { |
| 335 | int ret; | 344 | int ret; |
| 336 | 345 | ||
| @@ -374,22 +383,76 @@ static int fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, | |||
| 374 | return 0; | 383 | return 0; |
| 375 | } | 384 | } |
| 376 | 385 | ||
| 386 | static int | ||
| 387 | ipu_csi_set_bt_interlaced_codes(struct ipu_csi *csi, | ||
| 388 | const struct v4l2_mbus_framefmt *infmt, | ||
| 389 | const struct v4l2_mbus_framefmt *outfmt, | ||
| 390 | v4l2_std_id std) | ||
| 391 | { | ||
| 392 | enum v4l2_field infield, outfield; | ||
| 393 | bool swap_fields; | ||
| 394 | |||
| 395 | /* get translated field type of input and output */ | ||
| 396 | infield = ipu_csi_translate_field(infmt->field, std); | ||
| 397 | outfield = ipu_csi_translate_field(outfmt->field, std); | ||
| 398 | |||
| 399 | /* | ||
| 400 | * Write the H-V-F codes the CSI will match against the | ||
| 401 | * incoming data for start/end of active and blanking | ||
| 402 | * field intervals. If input and output field types are | ||
| 403 | * sequential but not the same (one is SEQ_BT and the other | ||
| 404 | * is SEQ_TB), swap the F-bit so that the CSI will capture | ||
| 405 | * field 1 lines before field 0 lines. | ||
| 406 | */ | ||
| 407 | swap_fields = (V4L2_FIELD_IS_SEQUENTIAL(infield) && | ||
| 408 | V4L2_FIELD_IS_SEQUENTIAL(outfield) && | ||
| 409 | infield != outfield); | ||
| 410 | |||
| 411 | if (!swap_fields) { | ||
| 412 | /* | ||
| 413 | * Field0BlankEnd = 110, Field0BlankStart = 010 | ||
| 414 | * Field0ActiveEnd = 100, Field0ActiveStart = 000 | ||
| 415 | * Field1BlankEnd = 111, Field1BlankStart = 011 | ||
| 416 | * Field1ActiveEnd = 101, Field1ActiveStart = 001 | ||
| 417 | */ | ||
| 418 | ipu_csi_write(csi, 0x40596 | CSI_CCIR_ERR_DET_EN, | ||
| 419 | CSI_CCIR_CODE_1); | ||
| 420 | ipu_csi_write(csi, 0xD07DF, CSI_CCIR_CODE_2); | ||
| 421 | } else { | ||
| 422 | dev_dbg(csi->ipu->dev, "capture field swap\n"); | ||
| 423 | |||
| 424 | /* same as above but with F-bit inverted */ | ||
| 425 | ipu_csi_write(csi, 0xD07DF | CSI_CCIR_ERR_DET_EN, | ||
| 426 | CSI_CCIR_CODE_1); | ||
| 427 | ipu_csi_write(csi, 0x40596, CSI_CCIR_CODE_2); | ||
| 428 | } | ||
| 429 | |||
| 430 | ipu_csi_write(csi, 0xFF0000, CSI_CCIR_CODE_3); | ||
| 431 | |||
| 432 | return 0; | ||
| 433 | } | ||
| 434 | |||
| 435 | |||
| 377 | int ipu_csi_init_interface(struct ipu_csi *csi, | 436 | int ipu_csi_init_interface(struct ipu_csi *csi, |
| 378 | struct v4l2_mbus_config *mbus_cfg, | 437 | const struct v4l2_mbus_config *mbus_cfg, |
| 379 | struct v4l2_mbus_framefmt *mbus_fmt) | 438 | const struct v4l2_mbus_framefmt *infmt, |
| 439 | const struct v4l2_mbus_framefmt *outfmt) | ||
| 380 | { | 440 | { |
| 381 | struct ipu_csi_bus_config cfg; | 441 | struct ipu_csi_bus_config cfg; |
| 382 | unsigned long flags; | 442 | unsigned long flags; |
| 383 | u32 width, height, data = 0; | 443 | u32 width, height, data = 0; |
| 444 | v4l2_std_id std; | ||
| 384 | int ret; | 445 | int ret; |
| 385 | 446 | ||
| 386 | ret = fill_csi_bus_cfg(&cfg, mbus_cfg, mbus_fmt); | 447 | ret = fill_csi_bus_cfg(&cfg, mbus_cfg, infmt); |
| 387 | if (ret < 0) | 448 | if (ret < 0) |
| 388 | return ret; | 449 | return ret; |
| 389 | 450 | ||
| 390 | /* set default sensor frame width and height */ | 451 | /* set default sensor frame width and height */ |
| 391 | width = mbus_fmt->width; | 452 | width = infmt->width; |
| 392 | height = mbus_fmt->height; | 453 | height = infmt->height; |
| 454 | if (infmt->field == V4L2_FIELD_ALTERNATE) | ||
| 455 | height *= 2; | ||
| 393 | 456 | ||
| 394 | /* Set the CSI_SENS_CONF register remaining fields */ | 457 | /* Set the CSI_SENS_CONF register remaining fields */ |
| 395 | data |= cfg.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT | | 458 | data |= cfg.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT | |
| @@ -416,42 +479,22 @@ int ipu_csi_init_interface(struct ipu_csi *csi, | |||
| 416 | ipu_csi_write(csi, 0xFF0000, CSI_CCIR_CODE_3); | 479 | ipu_csi_write(csi, 0xFF0000, CSI_CCIR_CODE_3); |
| 417 | break; | 480 | break; |
| 418 | case IPU_CSI_CLK_MODE_CCIR656_INTERLACED: | 481 | case IPU_CSI_CLK_MODE_CCIR656_INTERLACED: |
| 419 | if (mbus_fmt->width == 720 && mbus_fmt->height == 576) { | 482 | if (width == 720 && height == 480) { |
| 420 | /* | 483 | std = V4L2_STD_NTSC; |
| 421 | * PAL case | 484 | height = 525; |
| 422 | * | 485 | } else if (width == 720 && height == 576) { |
| 423 | * Field0BlankEnd = 0x6, Field0BlankStart = 0x2, | 486 | std = V4L2_STD_PAL; |
| 424 | * Field0ActiveEnd = 0x4, Field0ActiveStart = 0 | 487 | height = 625; |
| 425 | * Field1BlankEnd = 0x7, Field1BlankStart = 0x3, | ||
| 426 | * Field1ActiveEnd = 0x5, Field1ActiveStart = 0x1 | ||
| 427 | */ | ||
| 428 | height = 625; /* framelines for PAL */ | ||
| 429 | |||
| 430 | ipu_csi_write(csi, 0x40596 | CSI_CCIR_ERR_DET_EN, | ||
| 431 | CSI_CCIR_CODE_1); | ||
| 432 | ipu_csi_write(csi, 0xD07DF, CSI_CCIR_CODE_2); | ||
| 433 | ipu_csi_write(csi, 0xFF0000, CSI_CCIR_CODE_3); | ||
| 434 | } else if (mbus_fmt->width == 720 && mbus_fmt->height == 480) { | ||
| 435 | /* | ||
| 436 | * NTSC case | ||
| 437 | * | ||
| 438 | * Field0BlankEnd = 0x7, Field0BlankStart = 0x3, | ||
| 439 | * Field0ActiveEnd = 0x5, Field0ActiveStart = 0x1 | ||
| 440 | * Field1BlankEnd = 0x6, Field1BlankStart = 0x2, | ||
| 441 | * Field1ActiveEnd = 0x4, Field1ActiveStart = 0 | ||
| 442 | */ | ||
| 443 | height = 525; /* framelines for NTSC */ | ||
| 444 | |||
| 445 | ipu_csi_write(csi, 0xD07DF | CSI_CCIR_ERR_DET_EN, | ||
| 446 | CSI_CCIR_CODE_1); | ||
| 447 | ipu_csi_write(csi, 0x40596, CSI_CCIR_CODE_2); | ||
| 448 | ipu_csi_write(csi, 0xFF0000, CSI_CCIR_CODE_3); | ||
| 449 | } else { | 488 | } else { |
| 450 | dev_err(csi->ipu->dev, | 489 | dev_err(csi->ipu->dev, |
| 451 | "Unsupported CCIR656 interlaced video mode\n"); | 490 | "Unsupported interlaced video mode\n"); |
| 452 | spin_unlock_irqrestore(&csi->lock, flags); | 491 | ret = -EINVAL; |
| 453 | return -EINVAL; | 492 | goto out_unlock; |
| 454 | } | 493 | } |
| 494 | |||
| 495 | ret = ipu_csi_set_bt_interlaced_codes(csi, infmt, outfmt, std); | ||
| 496 | if (ret) | ||
| 497 | goto out_unlock; | ||
| 455 | break; | 498 | break; |
| 456 | case IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_DDR: | 499 | case IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_DDR: |
| 457 | case IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR: | 500 | case IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR: |
| @@ -476,9 +519,10 @@ int ipu_csi_init_interface(struct ipu_csi *csi, | |||
| 476 | dev_dbg(csi->ipu->dev, "CSI_ACT_FRM_SIZE = 0x%08X\n", | 519 | dev_dbg(csi->ipu->dev, "CSI_ACT_FRM_SIZE = 0x%08X\n", |
| 477 | ipu_csi_read(csi, CSI_ACT_FRM_SIZE)); | 520 | ipu_csi_read(csi, CSI_ACT_FRM_SIZE)); |
| 478 | 521 | ||
| 522 | out_unlock: | ||
| 479 | spin_unlock_irqrestore(&csi->lock, flags); | 523 | spin_unlock_irqrestore(&csi->lock, flags); |
| 480 | 524 | ||
| 481 | return 0; | 525 | return ret; |
| 482 | } | 526 | } |
| 483 | EXPORT_SYMBOL_GPL(ipu_csi_init_interface); | 527 | EXPORT_SYMBOL_GPL(ipu_csi_init_interface); |
| 484 | 528 | ||
diff --git a/drivers/media/cec/cec-api.c b/drivers/media/cec/cec-api.c index 391b6fd483e1..156a0d76ab2a 100644 --- a/drivers/media/cec/cec-api.c +++ b/drivers/media/cec/cec-api.c | |||
| @@ -38,6 +38,7 @@ static __poll_t cec_poll(struct file *filp, | |||
| 38 | struct cec_adapter *adap = fh->adap; | 38 | struct cec_adapter *adap = fh->adap; |
| 39 | __poll_t res = 0; | 39 | __poll_t res = 0; |
| 40 | 40 | ||
| 41 | poll_wait(filp, &fh->wait, poll); | ||
| 41 | if (!cec_is_registered(adap)) | 42 | if (!cec_is_registered(adap)) |
| 42 | return EPOLLERR | EPOLLHUP; | 43 | return EPOLLERR | EPOLLHUP; |
| 43 | mutex_lock(&adap->lock); | 44 | mutex_lock(&adap->lock); |
| @@ -48,7 +49,6 @@ static __poll_t cec_poll(struct file *filp, | |||
| 48 | res |= EPOLLIN | EPOLLRDNORM; | 49 | res |= EPOLLIN | EPOLLRDNORM; |
| 49 | if (fh->total_queued_events) | 50 | if (fh->total_queued_events) |
| 50 | res |= EPOLLPRI; | 51 | res |= EPOLLPRI; |
| 51 | poll_wait(filp, &fh->wait, poll); | ||
| 52 | mutex_unlock(&adap->lock); | 52 | mutex_unlock(&adap->lock); |
| 53 | return res; | 53 | return res; |
| 54 | } | 54 | } |
diff --git a/drivers/media/common/saa7146/saa7146_fops.c b/drivers/media/common/saa7146/saa7146_fops.c index c790ae264464..be4355a4c126 100644 --- a/drivers/media/common/saa7146/saa7146_fops.c +++ b/drivers/media/common/saa7146/saa7146_fops.c | |||
| @@ -105,7 +105,7 @@ void saa7146_buffer_finish(struct saa7146_dev *dev, | |||
| 105 | } | 105 | } |
| 106 | 106 | ||
| 107 | q->curr->vb.state = state; | 107 | q->curr->vb.state = state; |
| 108 | v4l2_get_timestamp(&q->curr->vb.ts); | 108 | q->curr->vb.ts = ktime_get_ns(); |
| 109 | wake_up(&q->curr->vb.done); | 109 | wake_up(&q->curr->vb.done); |
| 110 | 110 | ||
| 111 | q->curr = NULL; | 111 | q->curr = NULL; |
diff --git a/drivers/media/common/saa7146/saa7146_i2c.c b/drivers/media/common/saa7146/saa7146_i2c.c index 3feddc52c446..df9ebe2a168c 100644 --- a/drivers/media/common/saa7146/saa7146_i2c.c +++ b/drivers/media/common/saa7146/saa7146_i2c.c | |||
| @@ -54,10 +54,7 @@ static int saa7146_i2c_msg_prepare(const struct i2c_msg *m, int num, __le32 *op) | |||
| 54 | /* loop through all messages */ | 54 | /* loop through all messages */ |
| 55 | for(i = 0; i < num; i++) { | 55 | for(i = 0; i < num; i++) { |
| 56 | 56 | ||
| 57 | /* insert the address of the i2c-slave. | 57 | addr = i2c_8bit_addr_from_msg(&m[i]); |
| 58 | note: we get 7 bit i2c-addresses, | ||
| 59 | so we have to perform a translation */ | ||
| 60 | addr = (m[i].addr*2) + ( (0 != (m[i].flags & I2C_M_RD)) ? 1 : 0); | ||
| 61 | h1 = op_count/3; h2 = op_count%3; | 58 | h1 = op_count/3; h2 = op_count%3; |
| 62 | op[h1] |= cpu_to_le32( (u8)addr << ((3-h2)*8)); | 59 | op[h1] |= cpu_to_le32( (u8)addr << ((3-h2)*8)); |
| 63 | op[h1] |= cpu_to_le32(SAA7146_I2C_START << ((3-h2)*2)); | 60 | op[h1] |= cpu_to_le32(SAA7146_I2C_START << ((3-h2)*2)); |
diff --git a/drivers/media/common/saa7146/saa7146_video.c b/drivers/media/common/saa7146/saa7146_video.c index f90aa8109663..a0f0b5eef0bd 100644 --- a/drivers/media/common/saa7146/saa7146_video.c +++ b/drivers/media/common/saa7146/saa7146_video.c | |||
| @@ -796,7 +796,7 @@ static int vidioc_s_fmt_vid_overlay(struct file *file, void *__fh, struct v4l2_f | |||
| 796 | return -EFAULT; | 796 | return -EFAULT; |
| 797 | } | 797 | } |
| 798 | 798 | ||
| 799 | /* vv->ov.fh is used to indicate that we have valid overlay informations, too */ | 799 | /* vv->ov.fh is used to indicate that we have valid overlay information, too */ |
| 800 | vv->ov.fh = fh; | 800 | vv->ov.fh = fh; |
| 801 | 801 | ||
| 802 | /* check if our current overlay is active */ | 802 | /* check if our current overlay is active */ |
diff --git a/drivers/media/common/siano/sms-cards.c b/drivers/media/common/siano/sms-cards.c index af6b2268db61..e238c9bc17d3 100644 --- a/drivers/media/common/siano/sms-cards.c +++ b/drivers/media/common/siano/sms-cards.c | |||
| @@ -311,7 +311,7 @@ int sms_board_led_feedback(struct smscore_device_t *coredev, int led) | |||
| 311 | int board_id = smscore_get_board_id(coredev); | 311 | int board_id = smscore_get_board_id(coredev); |
| 312 | struct sms_board *board = sms_get_board(board_id); | 312 | struct sms_board *board = sms_get_board(board_id); |
| 313 | 313 | ||
| 314 | /* dont touch GPIO if LEDs are already set */ | 314 | /* don't touch GPIO if LEDs are already set */ |
| 315 | if (smscore_led_state(coredev, -1) == led) | 315 | if (smscore_led_state(coredev, -1) == led) |
| 316 | return 0; | 316 | return 0; |
| 317 | 317 | ||
diff --git a/drivers/media/common/siano/smscoreapi.h b/drivers/media/common/siano/smscoreapi.h index eb58853008c9..476fa7a8b152 100644 --- a/drivers/media/common/siano/smscoreapi.h +++ b/drivers/media/common/siano/smscoreapi.h | |||
| @@ -750,7 +750,7 @@ struct sms_stats { | |||
| 750 | u32 num_of_corrected_mpe_tlbs;/* Number of MPE tables which were | 750 | u32 num_of_corrected_mpe_tlbs;/* Number of MPE tables which were |
| 751 | corrected by MPE RS decoding */ | 751 | corrected by MPE RS decoding */ |
| 752 | /* Common params */ | 752 | /* Common params */ |
| 753 | u32 ber_error_count; /* Number of errornous SYNC bits. */ | 753 | u32 ber_error_count; /* Number of erroneous SYNC bits. */ |
| 754 | u32 ber_bit_count; /* Total number of SYNC bits. */ | 754 | u32 ber_bit_count; /* Total number of SYNC bits. */ |
| 755 | 755 | ||
| 756 | /* Interface information */ | 756 | /* Interface information */ |
diff --git a/drivers/media/common/v4l2-tpg/v4l2-tpg-core.c b/drivers/media/common/v4l2-tpg/v4l2-tpg-core.c index d9a590ae7545..07e0629af8ed 100644 --- a/drivers/media/common/v4l2-tpg/v4l2-tpg-core.c +++ b/drivers/media/common/v4l2-tpg/v4l2-tpg-core.c | |||
| @@ -246,6 +246,10 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) | |||
| 246 | case V4L2_PIX_FMT_YUV555: | 246 | case V4L2_PIX_FMT_YUV555: |
| 247 | case V4L2_PIX_FMT_YUV565: | 247 | case V4L2_PIX_FMT_YUV565: |
| 248 | case V4L2_PIX_FMT_YUV32: | 248 | case V4L2_PIX_FMT_YUV32: |
| 249 | case V4L2_PIX_FMT_AYUV32: | ||
| 250 | case V4L2_PIX_FMT_XYUV32: | ||
| 251 | case V4L2_PIX_FMT_VUYA32: | ||
| 252 | case V4L2_PIX_FMT_VUYX32: | ||
| 249 | tpg->color_enc = TGP_COLOR_ENC_YCBCR; | 253 | tpg->color_enc = TGP_COLOR_ENC_YCBCR; |
| 250 | break; | 254 | break; |
| 251 | case V4L2_PIX_FMT_YUV420M: | 255 | case V4L2_PIX_FMT_YUV420M: |
| @@ -372,6 +376,10 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) | |||
| 372 | case V4L2_PIX_FMT_ARGB32: | 376 | case V4L2_PIX_FMT_ARGB32: |
| 373 | case V4L2_PIX_FMT_ABGR32: | 377 | case V4L2_PIX_FMT_ABGR32: |
| 374 | case V4L2_PIX_FMT_YUV32: | 378 | case V4L2_PIX_FMT_YUV32: |
| 379 | case V4L2_PIX_FMT_AYUV32: | ||
| 380 | case V4L2_PIX_FMT_XYUV32: | ||
| 381 | case V4L2_PIX_FMT_VUYA32: | ||
| 382 | case V4L2_PIX_FMT_VUYX32: | ||
| 375 | case V4L2_PIX_FMT_HSV32: | 383 | case V4L2_PIX_FMT_HSV32: |
| 376 | tpg->twopixelsize[0] = 2 * 4; | 384 | tpg->twopixelsize[0] = 2 * 4; |
| 377 | break; | 385 | break; |
| @@ -1267,10 +1275,12 @@ static void gen_twopix(struct tpg_data *tpg, | |||
| 1267 | case V4L2_PIX_FMT_RGB32: | 1275 | case V4L2_PIX_FMT_RGB32: |
| 1268 | case V4L2_PIX_FMT_XRGB32: | 1276 | case V4L2_PIX_FMT_XRGB32: |
| 1269 | case V4L2_PIX_FMT_HSV32: | 1277 | case V4L2_PIX_FMT_HSV32: |
| 1278 | case V4L2_PIX_FMT_XYUV32: | ||
| 1270 | alpha = 0; | 1279 | alpha = 0; |
| 1271 | /* fall through */ | 1280 | /* fall through */ |
| 1272 | case V4L2_PIX_FMT_YUV32: | 1281 | case V4L2_PIX_FMT_YUV32: |
| 1273 | case V4L2_PIX_FMT_ARGB32: | 1282 | case V4L2_PIX_FMT_ARGB32: |
| 1283 | case V4L2_PIX_FMT_AYUV32: | ||
| 1274 | buf[0][offset] = alpha; | 1284 | buf[0][offset] = alpha; |
| 1275 | buf[0][offset + 1] = r_y_h; | 1285 | buf[0][offset + 1] = r_y_h; |
| 1276 | buf[0][offset + 2] = g_u_s; | 1286 | buf[0][offset + 2] = g_u_s; |
| @@ -1278,9 +1288,11 @@ static void gen_twopix(struct tpg_data *tpg, | |||
| 1278 | break; | 1288 | break; |
| 1279 | case V4L2_PIX_FMT_BGR32: | 1289 | case V4L2_PIX_FMT_BGR32: |
| 1280 | case V4L2_PIX_FMT_XBGR32: | 1290 | case V4L2_PIX_FMT_XBGR32: |
| 1291 | case V4L2_PIX_FMT_VUYX32: | ||
| 1281 | alpha = 0; | 1292 | alpha = 0; |
| 1282 | /* fall through */ | 1293 | /* fall through */ |
| 1283 | case V4L2_PIX_FMT_ABGR32: | 1294 | case V4L2_PIX_FMT_ABGR32: |
| 1295 | case V4L2_PIX_FMT_VUYA32: | ||
| 1284 | buf[0][offset] = b_v; | 1296 | buf[0][offset] = b_v; |
| 1285 | buf[0][offset + 1] = g_u_s; | 1297 | buf[0][offset + 1] = g_u_s; |
| 1286 | buf[0][offset + 2] = r_y_h; | 1298 | buf[0][offset + 2] = r_y_h; |
diff --git a/drivers/media/common/videobuf2/videobuf2-core.c b/drivers/media/common/videobuf2/videobuf2-core.c index 70e8c3366f9c..15b6b9c0a2e4 100644 --- a/drivers/media/common/videobuf2/videobuf2-core.c +++ b/drivers/media/common/videobuf2/videobuf2-core.c | |||
| @@ -499,9 +499,9 @@ static int __vb2_queue_free(struct vb2_queue *q, unsigned int buffers) | |||
| 499 | pr_info(" buf_init: %u buf_cleanup: %u buf_prepare: %u buf_finish: %u\n", | 499 | pr_info(" buf_init: %u buf_cleanup: %u buf_prepare: %u buf_finish: %u\n", |
| 500 | vb->cnt_buf_init, vb->cnt_buf_cleanup, | 500 | vb->cnt_buf_init, vb->cnt_buf_cleanup, |
| 501 | vb->cnt_buf_prepare, vb->cnt_buf_finish); | 501 | vb->cnt_buf_prepare, vb->cnt_buf_finish); |
| 502 | pr_info(" buf_queue: %u buf_done: %u buf_request_complete: %u\n", | 502 | pr_info(" buf_out_validate: %u buf_queue: %u buf_done: %u buf_request_complete: %u\n", |
| 503 | vb->cnt_buf_queue, vb->cnt_buf_done, | 503 | vb->cnt_buf_out_validate, vb->cnt_buf_queue, |
| 504 | vb->cnt_buf_request_complete); | 504 | vb->cnt_buf_done, vb->cnt_buf_request_complete); |
| 505 | pr_info(" alloc: %u put: %u prepare: %u finish: %u mmap: %u\n", | 505 | pr_info(" alloc: %u put: %u prepare: %u finish: %u mmap: %u\n", |
| 506 | vb->cnt_mem_alloc, vb->cnt_mem_put, | 506 | vb->cnt_mem_alloc, vb->cnt_mem_put, |
| 507 | vb->cnt_mem_prepare, vb->cnt_mem_finish, | 507 | vb->cnt_mem_prepare, vb->cnt_mem_finish, |
| @@ -934,7 +934,7 @@ void vb2_buffer_done(struct vb2_buffer *vb, enum vb2_buffer_state state) | |||
| 934 | /* sync buffers */ | 934 | /* sync buffers */ |
| 935 | for (plane = 0; plane < vb->num_planes; ++plane) | 935 | for (plane = 0; plane < vb->num_planes; ++plane) |
| 936 | call_void_memop(vb, finish, vb->planes[plane].mem_priv); | 936 | call_void_memop(vb, finish, vb->planes[plane].mem_priv); |
| 937 | vb->synced = false; | 937 | vb->synced = 0; |
| 938 | } | 938 | } |
| 939 | 939 | ||
| 940 | spin_lock_irqsave(&q->done_lock, flags); | 940 | spin_lock_irqsave(&q->done_lock, flags); |
| @@ -1041,6 +1041,7 @@ static int __prepare_userptr(struct vb2_buffer *vb) | |||
| 1041 | if (vb->planes[plane].mem_priv) { | 1041 | if (vb->planes[plane].mem_priv) { |
| 1042 | if (!reacquired) { | 1042 | if (!reacquired) { |
| 1043 | reacquired = true; | 1043 | reacquired = true; |
| 1044 | vb->copied_timestamp = 0; | ||
| 1044 | call_void_vb_qop(vb, buf_cleanup, vb); | 1045 | call_void_vb_qop(vb, buf_cleanup, vb); |
| 1045 | } | 1046 | } |
| 1046 | call_void_memop(vb, put_userptr, vb->planes[plane].mem_priv); | 1047 | call_void_memop(vb, put_userptr, vb->planes[plane].mem_priv); |
| @@ -1165,6 +1166,7 @@ static int __prepare_dmabuf(struct vb2_buffer *vb) | |||
| 1165 | 1166 | ||
| 1166 | if (!reacquired) { | 1167 | if (!reacquired) { |
| 1167 | reacquired = true; | 1168 | reacquired = true; |
| 1169 | vb->copied_timestamp = 0; | ||
| 1168 | call_void_vb_qop(vb, buf_cleanup, vb); | 1170 | call_void_vb_qop(vb, buf_cleanup, vb); |
| 1169 | } | 1171 | } |
| 1170 | 1172 | ||
| @@ -1196,6 +1198,9 @@ static int __prepare_dmabuf(struct vb2_buffer *vb) | |||
| 1196 | * userspace knows sooner rather than later if the dma-buf map fails. | 1198 | * userspace knows sooner rather than later if the dma-buf map fails. |
| 1197 | */ | 1199 | */ |
| 1198 | for (plane = 0; plane < vb->num_planes; ++plane) { | 1200 | for (plane = 0; plane < vb->num_planes; ++plane) { |
| 1201 | if (vb->planes[plane].dbuf_mapped) | ||
| 1202 | continue; | ||
| 1203 | |||
| 1199 | ret = call_memop(vb, map_dmabuf, vb->planes[plane].mem_priv); | 1204 | ret = call_memop(vb, map_dmabuf, vb->planes[plane].mem_priv); |
| 1200 | if (ret) { | 1205 | if (ret) { |
| 1201 | dprintk(1, "failed to map dmabuf for plane %d\n", | 1206 | dprintk(1, "failed to map dmabuf for plane %d\n", |
| @@ -1274,6 +1279,14 @@ static int __buf_prepare(struct vb2_buffer *vb) | |||
| 1274 | return 0; | 1279 | return 0; |
| 1275 | WARN_ON(vb->synced); | 1280 | WARN_ON(vb->synced); |
| 1276 | 1281 | ||
| 1282 | if (q->is_output) { | ||
| 1283 | ret = call_vb_qop(vb, buf_out_validate, vb); | ||
| 1284 | if (ret) { | ||
| 1285 | dprintk(1, "buffer validation failed\n"); | ||
| 1286 | return ret; | ||
| 1287 | } | ||
| 1288 | } | ||
| 1289 | |||
| 1277 | vb->state = VB2_BUF_STATE_PREPARING; | 1290 | vb->state = VB2_BUF_STATE_PREPARING; |
| 1278 | 1291 | ||
| 1279 | switch (q->memory) { | 1292 | switch (q->memory) { |
| @@ -1302,8 +1315,8 @@ static int __buf_prepare(struct vb2_buffer *vb) | |||
| 1302 | for (plane = 0; plane < vb->num_planes; ++plane) | 1315 | for (plane = 0; plane < vb->num_planes; ++plane) |
| 1303 | call_void_memop(vb, prepare, vb->planes[plane].mem_priv); | 1316 | call_void_memop(vb, prepare, vb->planes[plane].mem_priv); |
| 1304 | 1317 | ||
| 1305 | vb->synced = true; | 1318 | vb->synced = 1; |
| 1306 | vb->prepared = true; | 1319 | vb->prepared = 1; |
| 1307 | vb->state = orig_state; | 1320 | vb->state = orig_state; |
| 1308 | 1321 | ||
| 1309 | return 0; | 1322 | return 0; |
| @@ -1520,6 +1533,14 @@ int vb2_core_qbuf(struct vb2_queue *q, unsigned int index, void *pb, | |||
| 1520 | return -EINVAL; | 1533 | return -EINVAL; |
| 1521 | } | 1534 | } |
| 1522 | 1535 | ||
| 1536 | if (q->is_output && !vb->prepared) { | ||
| 1537 | ret = call_vb_qop(vb, buf_out_validate, vb); | ||
| 1538 | if (ret) { | ||
| 1539 | dprintk(1, "buffer validation failed\n"); | ||
| 1540 | return ret; | ||
| 1541 | } | ||
| 1542 | } | ||
| 1543 | |||
| 1523 | media_request_object_init(&vb->req_obj); | 1544 | media_request_object_init(&vb->req_obj); |
| 1524 | 1545 | ||
| 1525 | /* Make sure the request is in a safe state for updating. */ | 1546 | /* Make sure the request is in a safe state for updating. */ |
| @@ -1750,7 +1771,6 @@ EXPORT_SYMBOL_GPL(vb2_wait_for_all_buffers); | |||
| 1750 | static void __vb2_dqbuf(struct vb2_buffer *vb) | 1771 | static void __vb2_dqbuf(struct vb2_buffer *vb) |
| 1751 | { | 1772 | { |
| 1752 | struct vb2_queue *q = vb->vb2_queue; | 1773 | struct vb2_queue *q = vb->vb2_queue; |
| 1753 | unsigned int i; | ||
| 1754 | 1774 | ||
| 1755 | /* nothing to do if the buffer is already dequeued */ | 1775 | /* nothing to do if the buffer is already dequeued */ |
| 1756 | if (vb->state == VB2_BUF_STATE_DEQUEUED) | 1776 | if (vb->state == VB2_BUF_STATE_DEQUEUED) |
| @@ -1758,14 +1778,6 @@ static void __vb2_dqbuf(struct vb2_buffer *vb) | |||
| 1758 | 1778 | ||
| 1759 | vb->state = VB2_BUF_STATE_DEQUEUED; | 1779 | vb->state = VB2_BUF_STATE_DEQUEUED; |
| 1760 | 1780 | ||
| 1761 | /* unmap DMABUF buffer */ | ||
| 1762 | if (q->memory == VB2_MEMORY_DMABUF) | ||
| 1763 | for (i = 0; i < vb->num_planes; ++i) { | ||
| 1764 | if (!vb->planes[i].dbuf_mapped) | ||
| 1765 | continue; | ||
| 1766 | call_void_memop(vb, unmap_dmabuf, vb->planes[i].mem_priv); | ||
| 1767 | vb->planes[i].dbuf_mapped = 0; | ||
| 1768 | } | ||
| 1769 | call_void_bufop(q, init_buffer, vb); | 1781 | call_void_bufop(q, init_buffer, vb); |
| 1770 | } | 1782 | } |
| 1771 | 1783 | ||
| @@ -1792,7 +1804,7 @@ int vb2_core_dqbuf(struct vb2_queue *q, unsigned int *pindex, void *pb, | |||
| 1792 | } | 1804 | } |
| 1793 | 1805 | ||
| 1794 | call_void_vb_qop(vb, buf_finish, vb); | 1806 | call_void_vb_qop(vb, buf_finish, vb); |
| 1795 | vb->prepared = false; | 1807 | vb->prepared = 0; |
| 1796 | 1808 | ||
| 1797 | if (pindex) | 1809 | if (pindex) |
| 1798 | *pindex = vb->index; | 1810 | *pindex = vb->index; |
| @@ -1916,12 +1928,12 @@ static void __vb2_queue_cancel(struct vb2_queue *q) | |||
| 1916 | for (plane = 0; plane < vb->num_planes; ++plane) | 1928 | for (plane = 0; plane < vb->num_planes; ++plane) |
| 1917 | call_void_memop(vb, finish, | 1929 | call_void_memop(vb, finish, |
| 1918 | vb->planes[plane].mem_priv); | 1930 | vb->planes[plane].mem_priv); |
| 1919 | vb->synced = false; | 1931 | vb->synced = 0; |
| 1920 | } | 1932 | } |
| 1921 | 1933 | ||
| 1922 | if (vb->prepared) { | 1934 | if (vb->prepared) { |
| 1923 | call_void_vb_qop(vb, buf_finish, vb); | 1935 | call_void_vb_qop(vb, buf_finish, vb); |
| 1924 | vb->prepared = false; | 1936 | vb->prepared = 0; |
| 1925 | } | 1937 | } |
| 1926 | __vb2_dqbuf(vb); | 1938 | __vb2_dqbuf(vb); |
| 1927 | 1939 | ||
| @@ -1932,6 +1944,7 @@ static void __vb2_queue_cancel(struct vb2_queue *q) | |||
| 1932 | if (vb->request) | 1944 | if (vb->request) |
| 1933 | media_request_put(vb->request); | 1945 | media_request_put(vb->request); |
| 1934 | vb->request = NULL; | 1946 | vb->request = NULL; |
| 1947 | vb->copied_timestamp = 0; | ||
| 1935 | } | 1948 | } |
| 1936 | } | 1949 | } |
| 1937 | 1950 | ||
| @@ -2278,6 +2291,8 @@ __poll_t vb2_core_poll(struct vb2_queue *q, struct file *file, | |||
| 2278 | if (q->is_output && !(req_events & (EPOLLOUT | EPOLLWRNORM))) | 2291 | if (q->is_output && !(req_events & (EPOLLOUT | EPOLLWRNORM))) |
| 2279 | return 0; | 2292 | return 0; |
| 2280 | 2293 | ||
| 2294 | poll_wait(file, &q->done_wq, wait); | ||
| 2295 | |||
| 2281 | /* | 2296 | /* |
| 2282 | * Start file I/O emulator only if streaming API has not been used yet. | 2297 | * Start file I/O emulator only if streaming API has not been used yet. |
| 2283 | */ | 2298 | */ |
| @@ -2329,8 +2344,6 @@ __poll_t vb2_core_poll(struct vb2_queue *q, struct file *file, | |||
| 2329 | */ | 2344 | */ |
| 2330 | if (q->last_buffer_dequeued) | 2345 | if (q->last_buffer_dequeued) |
| 2331 | return EPOLLIN | EPOLLRDNORM; | 2346 | return EPOLLIN | EPOLLRDNORM; |
| 2332 | |||
| 2333 | poll_wait(file, &q->done_wq, wait); | ||
| 2334 | } | 2347 | } |
| 2335 | 2348 | ||
| 2336 | /* | 2349 | /* |
diff --git a/drivers/media/common/videobuf2/videobuf2-dma-sg.c b/drivers/media/common/videobuf2/videobuf2-dma-sg.c index 015e737095cd..270c3162fdcb 100644 --- a/drivers/media/common/videobuf2/videobuf2-dma-sg.c +++ b/drivers/media/common/videobuf2/videobuf2-dma-sg.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2010 Samsung Electronics | 4 | * Copyright (C) 2010 Samsung Electronics |
| 5 | * | 5 | * |
| 6 | * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 6 | * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
| @@ -67,7 +67,7 @@ static int vb2_dma_sg_alloc_compacted(struct vb2_dma_sg_buf *buf, | |||
| 67 | int i; | 67 | int i; |
| 68 | 68 | ||
| 69 | order = get_order(size); | 69 | order = get_order(size); |
| 70 | /* Dont over allocate*/ | 70 | /* Don't over allocate*/ |
| 71 | if ((PAGE_SIZE << order) > size) | 71 | if ((PAGE_SIZE << order) > size) |
| 72 | order--; | 72 | order--; |
| 73 | 73 | ||
diff --git a/drivers/media/common/videobuf2/videobuf2-memops.c b/drivers/media/common/videobuf2/videobuf2-memops.c index 89e51989332b..c4a85be48ac2 100644 --- a/drivers/media/common/videobuf2/videobuf2-memops.c +++ b/drivers/media/common/videobuf2/videobuf2-memops.c | |||
| @@ -121,7 +121,7 @@ static void vb2_common_vm_close(struct vm_area_struct *vma) | |||
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | /* | 123 | /* |
| 124 | * vb2_common_vm_ops - common vm_ops used for tracking refcount of mmaped | 124 | * vb2_common_vm_ops - common vm_ops used for tracking refcount of mmapped |
| 125 | * video buffers | 125 | * video buffers |
| 126 | */ | 126 | */ |
| 127 | const struct vm_operations_struct vb2_common_vm_ops = { | 127 | const struct vm_operations_struct vb2_common_vm_ops = { |
diff --git a/drivers/media/common/videobuf2/videobuf2-v4l2.c b/drivers/media/common/videobuf2/videobuf2-v4l2.c index 3a0ca2f9854f..d09dee20e421 100644 --- a/drivers/media/common/videobuf2/videobuf2-v4l2.c +++ b/drivers/media/common/videobuf2/videobuf2-v4l2.c | |||
| @@ -143,7 +143,7 @@ static void __copy_timestamp(struct vb2_buffer *vb, const void *pb) | |||
| 143 | * and the timecode field and flag if needed. | 143 | * and the timecode field and flag if needed. |
| 144 | */ | 144 | */ |
| 145 | if (q->copy_timestamp) | 145 | if (q->copy_timestamp) |
| 146 | vb->timestamp = timeval_to_ns(&b->timestamp); | 146 | vb->timestamp = v4l2_timeval_to_ns(&b->timestamp); |
| 147 | vbuf->flags |= b->flags & V4L2_BUF_FLAG_TIMECODE; | 147 | vbuf->flags |= b->flags & V4L2_BUF_FLAG_TIMECODE; |
| 148 | if (b->flags & V4L2_BUF_FLAG_TIMECODE) | 148 | if (b->flags & V4L2_BUF_FLAG_TIMECODE) |
| 149 | vbuf->timecode = b->timecode; | 149 | vbuf->timecode = b->timecode; |
| @@ -409,6 +409,15 @@ static int vb2_queue_or_prepare_buf(struct vb2_queue *q, struct media_device *md | |||
| 409 | */ | 409 | */ |
| 410 | if (WARN_ON(!q->ops->buf_request_complete)) | 410 | if (WARN_ON(!q->ops->buf_request_complete)) |
| 411 | return -EINVAL; | 411 | return -EINVAL; |
| 412 | /* | ||
| 413 | * Make sure this op is implemented by the driver for the output queue. | ||
| 414 | * It's easy to forget this callback, but is it important to correctly | ||
| 415 | * validate the 'field' value at QBUF time. | ||
| 416 | */ | ||
| 417 | if (WARN_ON((q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT || | ||
| 418 | q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) && | ||
| 419 | !q->ops->buf_out_validate)) | ||
| 420 | return -EINVAL; | ||
| 412 | 421 | ||
| 413 | if (vb->state != VB2_BUF_STATE_DEQUEUED) { | 422 | if (vb->state != VB2_BUF_STATE_DEQUEUED) { |
| 414 | dprintk(1, "%s: buffer is not in dequeued state\n", opname); | 423 | dprintk(1, "%s: buffer is not in dequeued state\n", opname); |
| @@ -567,7 +576,7 @@ static int __fill_vb2_buffer(struct vb2_buffer *vb, struct vb2_plane *planes) | |||
| 567 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | 576 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 568 | unsigned int plane; | 577 | unsigned int plane; |
| 569 | 578 | ||
| 570 | if (!vb->vb2_queue->is_output || !vb->vb2_queue->copy_timestamp) | 579 | if (!vb->vb2_queue->copy_timestamp) |
| 571 | vb->timestamp = 0; | 580 | vb->timestamp = 0; |
| 572 | 581 | ||
| 573 | for (plane = 0; plane < vb->num_planes; ++plane) { | 582 | for (plane = 0; plane < vb->num_planes; ++plane) { |
| @@ -589,6 +598,19 @@ static const struct vb2_buf_ops v4l2_buf_ops = { | |||
| 589 | .copy_timestamp = __copy_timestamp, | 598 | .copy_timestamp = __copy_timestamp, |
| 590 | }; | 599 | }; |
| 591 | 600 | ||
| 601 | int vb2_find_timestamp(const struct vb2_queue *q, u64 timestamp, | ||
| 602 | unsigned int start_idx) | ||
| 603 | { | ||
| 604 | unsigned int i; | ||
| 605 | |||
| 606 | for (i = start_idx; i < q->num_buffers; i++) | ||
| 607 | if (q->bufs[i]->copied_timestamp && | ||
| 608 | q->bufs[i]->timestamp == timestamp) | ||
| 609 | return i; | ||
| 610 | return -1; | ||
| 611 | } | ||
| 612 | EXPORT_SYMBOL_GPL(vb2_find_timestamp); | ||
| 613 | |||
| 592 | /* | 614 | /* |
| 593 | * vb2_querybuf() - query video buffer information | 615 | * vb2_querybuf() - query video buffer information |
| 594 | * @q: videobuf queue | 616 | * @q: videobuf queue |
| @@ -846,16 +868,14 @@ EXPORT_SYMBOL_GPL(vb2_queue_release); | |||
| 846 | __poll_t vb2_poll(struct vb2_queue *q, struct file *file, poll_table *wait) | 868 | __poll_t vb2_poll(struct vb2_queue *q, struct file *file, poll_table *wait) |
| 847 | { | 869 | { |
| 848 | struct video_device *vfd = video_devdata(file); | 870 | struct video_device *vfd = video_devdata(file); |
| 849 | __poll_t req_events = poll_requested_events(wait); | ||
| 850 | __poll_t res = 0; | 871 | __poll_t res = 0; |
| 851 | 872 | ||
| 852 | if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags)) { | 873 | if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags)) { |
| 853 | struct v4l2_fh *fh = file->private_data; | 874 | struct v4l2_fh *fh = file->private_data; |
| 854 | 875 | ||
| 876 | poll_wait(file, &fh->wait, wait); | ||
| 855 | if (v4l2_event_pending(fh)) | 877 | if (v4l2_event_pending(fh)) |
| 856 | res = EPOLLPRI; | 878 | res = EPOLLPRI; |
| 857 | else if (req_events & EPOLLPRI) | ||
| 858 | poll_wait(file, &fh->wait, wait); | ||
| 859 | } | 879 | } |
| 860 | 880 | ||
| 861 | return res | vb2_core_poll(q, file, wait); | 881 | return res | vb2_core_poll(q, file, wait); |
diff --git a/drivers/media/dvb-core/dmxdev.c b/drivers/media/dvb-core/dmxdev.c index 1544e8cef564..f14a872d1268 100644 --- a/drivers/media/dvb-core/dmxdev.c +++ b/drivers/media/dvb-core/dmxdev.c | |||
| @@ -1195,13 +1195,13 @@ static __poll_t dvb_demux_poll(struct file *file, poll_table *wait) | |||
| 1195 | struct dmxdev_filter *dmxdevfilter = file->private_data; | 1195 | struct dmxdev_filter *dmxdevfilter = file->private_data; |
| 1196 | __poll_t mask = 0; | 1196 | __poll_t mask = 0; |
| 1197 | 1197 | ||
| 1198 | poll_wait(file, &dmxdevfilter->buffer.queue, wait); | ||
| 1199 | |||
| 1198 | if ((!dmxdevfilter) || dmxdevfilter->dev->exit) | 1200 | if ((!dmxdevfilter) || dmxdevfilter->dev->exit) |
| 1199 | return EPOLLERR; | 1201 | return EPOLLERR; |
| 1200 | if (dvb_vb2_is_streaming(&dmxdevfilter->vb2_ctx)) | 1202 | if (dvb_vb2_is_streaming(&dmxdevfilter->vb2_ctx)) |
| 1201 | return dvb_vb2_poll(&dmxdevfilter->vb2_ctx, file, wait); | 1203 | return dvb_vb2_poll(&dmxdevfilter->vb2_ctx, file, wait); |
| 1202 | 1204 | ||
| 1203 | poll_wait(file, &dmxdevfilter->buffer.queue, wait); | ||
| 1204 | |||
| 1205 | if (dmxdevfilter->state != DMXDEV_STATE_GO && | 1205 | if (dmxdevfilter->state != DMXDEV_STATE_GO && |
| 1206 | dmxdevfilter->state != DMXDEV_STATE_DONE && | 1206 | dmxdevfilter->state != DMXDEV_STATE_DONE && |
| 1207 | dmxdevfilter->state != DMXDEV_STATE_TIMEDOUT) | 1207 | dmxdevfilter->state != DMXDEV_STATE_TIMEDOUT) |
| @@ -1346,13 +1346,13 @@ static __poll_t dvb_dvr_poll(struct file *file, poll_table *wait) | |||
| 1346 | 1346 | ||
| 1347 | dprintk("%s\n", __func__); | 1347 | dprintk("%s\n", __func__); |
| 1348 | 1348 | ||
| 1349 | poll_wait(file, &dmxdev->dvr_buffer.queue, wait); | ||
| 1350 | |||
| 1349 | if (dmxdev->exit) | 1351 | if (dmxdev->exit) |
| 1350 | return EPOLLERR; | 1352 | return EPOLLERR; |
| 1351 | if (dvb_vb2_is_streaming(&dmxdev->dvr_vb2_ctx)) | 1353 | if (dvb_vb2_is_streaming(&dmxdev->dvr_vb2_ctx)) |
| 1352 | return dvb_vb2_poll(&dmxdev->dvr_vb2_ctx, file, wait); | 1354 | return dvb_vb2_poll(&dmxdev->dvr_vb2_ctx, file, wait); |
| 1353 | 1355 | ||
| 1354 | poll_wait(file, &dmxdev->dvr_buffer.queue, wait); | ||
| 1355 | |||
| 1356 | if (((file->f_flags & O_ACCMODE) == O_RDONLY) || | 1356 | if (((file->f_flags & O_ACCMODE) == O_RDONLY) || |
| 1357 | dmxdev->may_do_mmap) { | 1357 | dmxdev->may_do_mmap) { |
| 1358 | if (dmxdev->dvr_buffer.error) | 1358 | if (dmxdev->dvr_buffer.error) |
diff --git a/drivers/media/dvb-core/dvb_ca_en50221.c b/drivers/media/dvb-core/dvb_ca_en50221.c index 4d371cea0d5d..ebf1e3b03819 100644 --- a/drivers/media/dvb-core/dvb_ca_en50221.c +++ b/drivers/media/dvb-core/dvb_ca_en50221.c | |||
| @@ -1797,6 +1797,8 @@ static __poll_t dvb_ca_en50221_io_poll(struct file *file, poll_table *wait) | |||
| 1797 | 1797 | ||
| 1798 | dprintk("%s\n", __func__); | 1798 | dprintk("%s\n", __func__); |
| 1799 | 1799 | ||
| 1800 | poll_wait(file, &ca->wait_queue, wait); | ||
| 1801 | |||
| 1800 | if (dvb_ca_en50221_io_read_condition(ca, &result, &slot) == 1) | 1802 | if (dvb_ca_en50221_io_read_condition(ca, &result, &slot) == 1) |
| 1801 | mask |= EPOLLIN; | 1803 | mask |= EPOLLIN; |
| 1802 | 1804 | ||
| @@ -1804,9 +1806,6 @@ static __poll_t dvb_ca_en50221_io_poll(struct file *file, poll_table *wait) | |||
| 1804 | if (mask) | 1806 | if (mask) |
| 1805 | return mask; | 1807 | return mask; |
| 1806 | 1808 | ||
| 1807 | /* wait for something to happen */ | ||
| 1808 | poll_wait(file, &ca->wait_queue, wait); | ||
| 1809 | |||
| 1810 | if (dvb_ca_en50221_io_read_condition(ca, &result, &slot) == 1) | 1809 | if (dvb_ca_en50221_io_read_condition(ca, &result, &slot) == 1) |
| 1811 | mask |= EPOLLIN; | 1810 | mask |= EPOLLIN; |
| 1812 | 1811 | ||
diff --git a/drivers/media/dvb-core/dvb_frontend.c b/drivers/media/dvb-core/dvb_frontend.c index 27a1d4a98d73..fbdb4ecc7c50 100644 --- a/drivers/media/dvb-core/dvb_frontend.c +++ b/drivers/media/dvb-core/dvb_frontend.c | |||
| @@ -1596,7 +1596,7 @@ static bool is_dvbv3_delsys(u32 delsys) | |||
| 1596 | * | 1596 | * |
| 1597 | * Provides emulation for delivery systems that are compatible with the old | 1597 | * Provides emulation for delivery systems that are compatible with the old |
| 1598 | * DVBv3 call. Among its usages, it provices support for ISDB-T, and allows | 1598 | * DVBv3 call. Among its usages, it provices support for ISDB-T, and allows |
| 1599 | * using a DVB-S2 only frontend just like it were a DVB-S, if the frontent | 1599 | * using a DVB-S2 only frontend just like it were a DVB-S, if the frontend |
| 1600 | * parameters are compatible with DVB-S spec. | 1600 | * parameters are compatible with DVB-S spec. |
| 1601 | */ | 1601 | */ |
| 1602 | static int emulate_delivery_system(struct dvb_frontend *fe, u32 delsys) | 1602 | static int emulate_delivery_system(struct dvb_frontend *fe, u32 delsys) |
diff --git a/drivers/media/dvb-core/dvbdev.c b/drivers/media/dvb-core/dvbdev.c index b7171bf094fb..4a5834a1c3b7 100644 --- a/drivers/media/dvb-core/dvbdev.c +++ b/drivers/media/dvb-core/dvbdev.c | |||
| @@ -898,7 +898,7 @@ EXPORT_SYMBOL(dvb_unregister_adapter); | |||
| 898 | 898 | ||
| 899 | /* if the miracle happens and "generic_usercopy()" is included into | 899 | /* if the miracle happens and "generic_usercopy()" is included into |
| 900 | the kernel, then this can vanish. please don't make the mistake and | 900 | the kernel, then this can vanish. please don't make the mistake and |
| 901 | define this as video_usercopy(). this will introduce a dependecy | 901 | define this as video_usercopy(). this will introduce a dependency |
| 902 | to the v4l "videodev.o" module, which is unnecessary for some | 902 | to the v4l "videodev.o" module, which is unnecessary for some |
| 903 | cards (ie. the budget dvb-cards don't need the v4l module...) */ | 903 | cards (ie. the budget dvb-cards don't need the v4l module...) */ |
| 904 | int dvb_usercopy(struct file *file, | 904 | int dvb_usercopy(struct file *file, |
diff --git a/drivers/media/dvb-frontends/cxd2841er.c b/drivers/media/dvb-frontends/cxd2841er.c index c98093ed3dd7..8acf0b91b437 100644 --- a/drivers/media/dvb-frontends/cxd2841er.c +++ b/drivers/media/dvb-frontends/cxd2841er.c | |||
| @@ -2947,7 +2947,7 @@ static int cxd2841er_sleep_tc_to_active_t(struct cxd2841er_priv *priv, | |||
| 2947 | ((priv->flags & CXD2841ER_ASCOT) ? 0x01 : 0x00), 0x01); | 2947 | ((priv->flags & CXD2841ER_ASCOT) ? 0x01 : 0x00), 0x01); |
| 2948 | /* Set SLV-T Bank : 0x18 */ | 2948 | /* Set SLV-T Bank : 0x18 */ |
| 2949 | cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x18); | 2949 | cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x18); |
| 2950 | /* Pre-RS BER moniter setting */ | 2950 | /* Pre-RS BER monitor setting */ |
| 2951 | cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x36, 0x40, 0x07); | 2951 | cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x36, 0x40, 0x07); |
| 2952 | /* FEC Auto Recovery setting */ | 2952 | /* FEC Auto Recovery setting */ |
| 2953 | cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x30, 0x01, 0x01); | 2953 | cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x30, 0x01, 0x01); |
diff --git a/drivers/media/dvb-frontends/dib0090.c b/drivers/media/dvb-frontends/dib0090.c index 4813a88eb9f7..18c41cfef8d6 100644 --- a/drivers/media/dvb-frontends/dib0090.c +++ b/drivers/media/dvb-frontends/dib0090.c | |||
| @@ -2459,7 +2459,7 @@ static int dib0090_tune(struct dvb_frontend *fe) | |||
| 2459 | state->current_standard = state->fe->dtv_property_cache.delivery_system; | 2459 | state->current_standard = state->fe->dtv_property_cache.delivery_system; |
| 2460 | 2460 | ||
| 2461 | ret = 20; | 2461 | ret = 20; |
| 2462 | state->calibrate = CAPTRIM_CAL; /* captrim serach now */ | 2462 | state->calibrate = CAPTRIM_CAL; /* captrim search now */ |
| 2463 | } | 2463 | } |
| 2464 | 2464 | ||
| 2465 | else if (*tune_state == CT_TUNER_STEP_0) { /* Warning : because of captrim cal, if you change this step, change it also in _cal.c file because it is the step following captrim cal state machine */ | 2465 | else if (*tune_state == CT_TUNER_STEP_0) { /* Warning : because of captrim cal, if you change this step, change it also in _cal.c file because it is the step following captrim cal state machine */ |
diff --git a/drivers/media/dvb-frontends/dib7000m.c b/drivers/media/dvb-frontends/dib7000m.c index b79358d09de6..389db9077ad5 100644 --- a/drivers/media/dvb-frontends/dib7000m.c +++ b/drivers/media/dvb-frontends/dib7000m.c | |||
| @@ -369,7 +369,7 @@ static int dib7000m_sad_calib(struct dib7000m_state *state) | |||
| 369 | { | 369 | { |
| 370 | 370 | ||
| 371 | /* internal */ | 371 | /* internal */ |
| 372 | // dib7000m_write_word(state, 928, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is writting in set_bandwidth | 372 | // dib7000m_write_word(state, 928, (3 << 14) | (1 << 12) | (524 << 0)); // sampling clock of the SAD is writing in set_bandwidth |
| 373 | dib7000m_write_word(state, 929, (0 << 1) | (0 << 0)); | 373 | dib7000m_write_word(state, 929, (0 << 1) | (0 << 0)); |
| 374 | dib7000m_write_word(state, 930, 776); // 0.625*3.3 / 4096 | 374 | dib7000m_write_word(state, 930, 776); // 0.625*3.3 / 4096 |
| 375 | 375 | ||
| @@ -928,7 +928,7 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dtv_fronte | |||
| 928 | } | 928 | } |
| 929 | state->div_sync_wait = (value * 3) / 2 + 32; // add 50% SFN margin + compensate for one DVSY-fifo TODO | 929 | state->div_sync_wait = (value * 3) / 2 + 32; // add 50% SFN margin + compensate for one DVSY-fifo TODO |
| 930 | 930 | ||
| 931 | /* deactive the possibility of diversity reception if extended interleave - not for 7000MC */ | 931 | /* deactivate the possibility of diversity reception if extended interleave - not for 7000MC */ |
| 932 | /* P_dvsy_sync_mode = 0, P_dvsy_sync_enable=1, P_dvcb_comb_mode=2 */ | 932 | /* P_dvsy_sync_mode = 0, P_dvsy_sync_enable=1, P_dvcb_comb_mode=2 */ |
| 933 | if (1 == 1 || state->revision > 0x4000) | 933 | if (1 == 1 || state->revision > 0x4000) |
| 934 | state->div_force_off = 0; | 934 | state->div_force_off = 0; |
diff --git a/drivers/media/dvb-frontends/dib7000p.c b/drivers/media/dvb-frontends/dib7000p.c index 2818e8def1b3..f8040f6def62 100644 --- a/drivers/media/dvb-frontends/dib7000p.c +++ b/drivers/media/dvb-frontends/dib7000p.c | |||
| @@ -94,7 +94,7 @@ enum dib7000p_power_mode { | |||
| 94 | DIB7000P_POWER_INTERFACE_ONLY, | 94 | DIB7000P_POWER_INTERFACE_ONLY, |
| 95 | }; | 95 | }; |
| 96 | 96 | ||
| 97 | /* dib7090 specific fonctions */ | 97 | /* dib7090 specific functions */ |
| 98 | static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode); | 98 | static int dib7090_set_output_mode(struct dvb_frontend *fe, int mode); |
| 99 | static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff); | 99 | static int dib7090_set_diversity_in(struct dvb_frontend *fe, int onoff); |
| 100 | static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode); | 100 | static void dib7090_setDibTxMux(struct dib7000p_state *state, int mode); |
| @@ -319,7 +319,7 @@ static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_ad | |||
| 319 | 319 | ||
| 320 | dib7000p_write_word(state, 1925, reg | (1 << 4) | (1 << 2)); /* en_slowAdc = 1 & reset_sladc = 1 */ | 320 | dib7000p_write_word(state, 1925, reg | (1 << 4) | (1 << 2)); /* en_slowAdc = 1 & reset_sladc = 1 */ |
| 321 | 321 | ||
| 322 | reg = dib7000p_read_word(state, 1925); /* read acces to make it works... strange ... */ | 322 | reg = dib7000p_read_word(state, 1925); /* read access to make it works... strange ... */ |
| 323 | msleep(200); | 323 | msleep(200); |
| 324 | dib7000p_write_word(state, 1925, reg & ~(1 << 4)); /* en_slowAdc = 1 & reset_sladc = 0 */ | 324 | dib7000p_write_word(state, 1925, reg & ~(1 << 4)); /* en_slowAdc = 1 & reset_sladc = 0 */ |
| 325 | 325 | ||
| @@ -1101,7 +1101,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, | |||
| 1101 | else | 1101 | else |
| 1102 | state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; | 1102 | state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; |
| 1103 | 1103 | ||
| 1104 | /* deactive the possibility of diversity reception if extended interleaver */ | 1104 | /* deactivate the possibility of diversity reception if extended interleaver */ |
| 1105 | state->div_force_off = !1 && ch->transmission_mode != TRANSMISSION_MODE_8K; | 1105 | state->div_force_off = !1 && ch->transmission_mode != TRANSMISSION_MODE_8K; |
| 1106 | dib7000p_set_diversity_in(&state->demod, state->div_state); | 1106 | dib7000p_set_diversity_in(&state->demod, state->div_state); |
| 1107 | 1107 | ||
| @@ -2378,7 +2378,7 @@ static int dib7090_tuner_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msg[] | |||
| 2378 | } | 2378 | } |
| 2379 | } | 2379 | } |
| 2380 | 2380 | ||
| 2381 | if (apb_address != 0) /* R/W acces via APB */ | 2381 | if (apb_address != 0) /* R/W access via APB */ |
| 2382 | return dib7090p_rw_on_apb(i2c_adap, msg, num, apb_address); | 2382 | return dib7090p_rw_on_apb(i2c_adap, msg, num, apb_address); |
| 2383 | else /* R/W access via SERPAR */ | 2383 | else /* R/W access via SERPAR */ |
| 2384 | return w7090p_tuner_rw_serpar(i2c_adap, msg, num); | 2384 | return w7090p_tuner_rw_serpar(i2c_adap, msg, num); |
diff --git a/drivers/media/dvb-frontends/dib8000.c b/drivers/media/dvb-frontends/dib8000.c index 3c3f8cb14845..85c429cce23e 100644 --- a/drivers/media/dvb-frontends/dib8000.c +++ b/drivers/media/dvb-frontends/dib8000.c | |||
| @@ -564,7 +564,7 @@ static int dib8000_set_adc_state(struct dib8000_state *state, enum dibx000_adc_s | |||
| 564 | dib8000_write_word(state, 1925, reg | | 564 | dib8000_write_word(state, 1925, reg | |
| 565 | (1<<4) | (1<<2)); | 565 | (1<<4) | (1<<2)); |
| 566 | 566 | ||
| 567 | /* read acces to make it works... strange ... */ | 567 | /* read access to make it works... strange ... */ |
| 568 | reg = dib8000_read_word(state, 1925); | 568 | reg = dib8000_read_word(state, 1925); |
| 569 | msleep(20); | 569 | msleep(20); |
| 570 | /* en_slowAdc = 1 & reset_sladc = 0 */ | 570 | /* en_slowAdc = 1 & reset_sladc = 0 */ |
| @@ -1091,7 +1091,7 @@ static int dib8000_reset(struct dvb_frontend *fe) | |||
| 1091 | 1091 | ||
| 1092 | if ((state->revision != 0x8090) && | 1092 | if ((state->revision != 0x8090) && |
| 1093 | (dib8000_set_output_mode(fe, OUTMODE_HIGH_Z) != 0)) | 1093 | (dib8000_set_output_mode(fe, OUTMODE_HIGH_Z) != 0)) |
| 1094 | dprintk("OUTPUT_MODE could not be resetted.\n"); | 1094 | dprintk("OUTPUT_MODE could not be reset.\n"); |
| 1095 | 1095 | ||
| 1096 | state->current_agc = NULL; | 1096 | state->current_agc = NULL; |
| 1097 | 1097 | ||
| @@ -1867,7 +1867,7 @@ static int dib8096p_tuner_xfer(struct i2c_adapter *i2c_adap, | |||
| 1867 | } | 1867 | } |
| 1868 | } | 1868 | } |
| 1869 | 1869 | ||
| 1870 | if (apb_address != 0) /* R/W acces via APB */ | 1870 | if (apb_address != 0) /* R/W access via APB */ |
| 1871 | return dib8096p_rw_on_apb(i2c_adap, msg, num, apb_address); | 1871 | return dib8096p_rw_on_apb(i2c_adap, msg, num, apb_address); |
| 1872 | else /* R/W access via SERPAR */ | 1872 | else /* R/W access via SERPAR */ |
| 1873 | return dib8096p_tuner_rw_serpar(i2c_adap, msg, num); | 1873 | return dib8096p_tuner_rw_serpar(i2c_adap, msg, num); |
| @@ -3082,7 +3082,7 @@ static int dib8000_tune(struct dvb_frontend *fe) | |||
| 3082 | state->autosearch_state = AS_DONE; | 3082 | state->autosearch_state = AS_DONE; |
| 3083 | *tune_state = CT_DEMOD_STOP; /* else we are done here */ | 3083 | *tune_state = CT_DEMOD_STOP; /* else we are done here */ |
| 3084 | break; | 3084 | break; |
| 3085 | case 2: /* Succes */ | 3085 | case 2: /* Success */ |
| 3086 | state->status = FE_STATUS_FFT_SUCCESS; /* signal to the upper layer, that there was a channel found and the parameters can be read */ | 3086 | state->status = FE_STATUS_FFT_SUCCESS; /* signal to the upper layer, that there was a channel found and the parameters can be read */ |
| 3087 | *tune_state = CT_DEMOD_STEP_3; | 3087 | *tune_state = CT_DEMOD_STEP_3; |
| 3088 | if (state->autosearch_state == AS_SEARCHING_GUARD) | 3088 | if (state->autosearch_state == AS_SEARCHING_GUARD) |
| @@ -3193,10 +3193,10 @@ static int dib8000_tune(struct dvb_frontend *fe) | |||
| 3193 | 3193 | ||
| 3194 | case CT_DEMOD_STEP_6: /* (36) if there is an input (diversity) */ | 3194 | case CT_DEMOD_STEP_6: /* (36) if there is an input (diversity) */ |
| 3195 | if ((state->fe[1] != NULL) && (state->output_mode != OUTMODE_DIVERSITY)) { | 3195 | if ((state->fe[1] != NULL) && (state->output_mode != OUTMODE_DIVERSITY)) { |
| 3196 | /* if there is a diversity fe in input and this fe is has not already failled : wait here until this this fe has succedeed or failled */ | 3196 | /* if there is a diversity fe in input and this fe is has not already failed : wait here until this this fe has succedeed or failed */ |
| 3197 | if (dib8000_get_status(state->fe[1]) <= FE_STATUS_STD_SUCCESS) /* Something is locked on the input fe */ | 3197 | if (dib8000_get_status(state->fe[1]) <= FE_STATUS_STD_SUCCESS) /* Something is locked on the input fe */ |
| 3198 | *tune_state = CT_DEMOD_STEP_8; /* go for mpeg */ | 3198 | *tune_state = CT_DEMOD_STEP_8; /* go for mpeg */ |
| 3199 | else if (dib8000_get_status(state->fe[1]) >= FE_STATUS_TUNE_TIME_TOO_SHORT) { /* fe in input failled also, break the current one */ | 3199 | else if (dib8000_get_status(state->fe[1]) >= FE_STATUS_TUNE_TIME_TOO_SHORT) { /* fe in input failed also, break the current one */ |
| 3200 | *tune_state = CT_DEMOD_STOP; /* else we are done here ; step 8 will close the loops and exit */ | 3200 | *tune_state = CT_DEMOD_STOP; /* else we are done here ; step 8 will close the loops and exit */ |
| 3201 | dib8000_viterbi_state(state, 1); /* start viterbi chandec */ | 3201 | dib8000_viterbi_state(state, 1); /* start viterbi chandec */ |
| 3202 | dib8000_set_isdbt_loop_params(state, LOOP_TUNE_2); | 3202 | dib8000_set_isdbt_loop_params(state, LOOP_TUNE_2); |
diff --git a/drivers/media/dvb-frontends/dib9000.c b/drivers/media/dvb-frontends/dib9000.c index 0183fb1346ef..1875da07c150 100644 --- a/drivers/media/dvb-frontends/dib9000.c +++ b/drivers/media/dvb-frontends/dib9000.c | |||
| @@ -1020,7 +1020,7 @@ static int dib9000_risc_apb_access_read(struct dib9000_state *state, u32 address | |||
| 1020 | if (address >= 1024 || !state->platform.risc.fw_is_running) | 1020 | if (address >= 1024 || !state->platform.risc.fw_is_running) |
| 1021 | return -EINVAL; | 1021 | return -EINVAL; |
| 1022 | 1022 | ||
| 1023 | /* dprintk( "APB access thru rd fw %d %x\n", address, attribute); */ | 1023 | /* dprintk( "APB access through rd fw %d %x\n", address, attribute); */ |
| 1024 | 1024 | ||
| 1025 | mb[0] = (u16) address; | 1025 | mb[0] = (u16) address; |
| 1026 | mb[1] = len / 2; | 1026 | mb[1] = len / 2; |
| @@ -1050,7 +1050,7 @@ static int dib9000_risc_apb_access_write(struct dib9000_state *state, u32 addres | |||
| 1050 | if (len > 18) | 1050 | if (len > 18) |
| 1051 | return -EINVAL; | 1051 | return -EINVAL; |
| 1052 | 1052 | ||
| 1053 | /* dprintk( "APB access thru wr fw %d %x\n", address, attribute); */ | 1053 | /* dprintk( "APB access through wr fw %d %x\n", address, attribute); */ |
| 1054 | 1054 | ||
| 1055 | mb[0] = (u16)address; | 1055 | mb[0] = (u16)address; |
| 1056 | for (i = 0; i + 1 < len; i += 2) | 1056 | for (i = 0; i + 1 < len; i += 2) |
diff --git a/drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.h b/drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.h index 23ae72468025..739dc5590fa4 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.h +++ b/drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.h | |||
| @@ -67,7 +67,7 @@ | |||
| 67 | * (2 bytes). The DAP can operate in 3 modes: | 67 | * (2 bytes). The DAP can operate in 3 modes: |
| 68 | * (1) only short | 68 | * (1) only short |
| 69 | * (2) only long | 69 | * (2) only long |
| 70 | * (3) both long and short but short preferred and long only when necesarry | 70 | * (3) both long and short but short preferred and long only when necessary |
| 71 | * | 71 | * |
| 72 | * These modes must be selected compile time via compile switches. | 72 | * These modes must be selected compile time via compile switches. |
| 73 | * Compile switch settings for the different modes: | 73 | * Compile switch settings for the different modes: |
| @@ -112,14 +112,14 @@ | |||
| 112 | * + single master mode means no use of repeated starts | 112 | * + single master mode means no use of repeated starts |
| 113 | * + multi master mode means use of repeated starts | 113 | * + multi master mode means use of repeated starts |
| 114 | * Default is single master. | 114 | * Default is single master. |
| 115 | * Default can be overriden by setting the compile switch DRXDAP_SINGLE_MASTER. | 115 | * Default can be overridden by setting the compile switch DRXDAP_SINGLE_MASTER. |
| 116 | * | 116 | * |
| 117 | * Slave: | 117 | * Slave: |
| 118 | * Single/multi master selected via the flags in the FASI protocol. | 118 | * Single/multi master selected via the flags in the FASI protocol. |
| 119 | * + single master means remember memory address between i2c packets | 119 | * + single master means remember memory address between i2c packets |
| 120 | * + multimaster means flush memory address between i2c packets | 120 | * + multimaster means flush memory address between i2c packets |
| 121 | * Default is single master, DAP FASI changes multi-master setting silently | 121 | * Default is single master, DAP FASI changes multi-master setting silently |
| 122 | * into single master setting. This cannot be overrriden. | 122 | * into single master setting. This cannot be overridden. |
| 123 | * | 123 | * |
| 124 | */ | 124 | */ |
| 125 | /* set default */ | 125 | /* set default */ |
| @@ -139,7 +139,7 @@ | |||
| 139 | * In single master mode, data can be written by sending the register address | 139 | * In single master mode, data can be written by sending the register address |
| 140 | * first, then two or four bytes of data in the next packet. | 140 | * first, then two or four bytes of data in the next packet. |
| 141 | * Because the device address plus a register address equals five bytes, | 141 | * Because the device address plus a register address equals five bytes, |
| 142 | * the mimimum chunk size must be five. | 142 | * the minimum chunk size must be five. |
| 143 | * If ten-bit I2C device addresses are used, the minimum chunk size must be six, | 143 | * If ten-bit I2C device addresses are used, the minimum chunk size must be six, |
| 144 | * because the I2C device address will then occupy two bytes when writing. | 144 | * because the I2C device address will then occupy two bytes when writing. |
| 145 | * | 145 | * |
diff --git a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h index 1ec20eecc433..15f7e58c5a30 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h +++ b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h | |||
| @@ -94,7 +94,7 @@ int drxbsp_i2c_term(void); | |||
| 94 | * \param r_count The number of bytes to read | 94 | * \param r_count The number of bytes to read |
| 95 | * \param r_data The array to read the data from | 95 | * \param r_data The array to read the data from |
| 96 | * \return int Return status. | 96 | * \return int Return status. |
| 97 | * \retval 0 Succes. | 97 | * \retval 0 Success. |
| 98 | * \retval -EIO Failure. | 98 | * \retval -EIO Failure. |
| 99 | * \retval -EINVAL Parameter 'wcount' is not zero but parameter | 99 | * \retval -EINVAL Parameter 'wcount' is not zero but parameter |
| 100 | * 'wdata' contains NULL. | 100 | * 'wdata' contains NULL. |
| @@ -986,7 +986,7 @@ struct drx_filter_info { | |||
| 986 | * \struct struct drx_channel * \brief The set of parameters describing a single channel. | 986 | * \struct struct drx_channel * \brief The set of parameters describing a single channel. |
| 987 | * | 987 | * |
| 988 | * Used by DRX_CTRL_SET_CHANNEL and DRX_CTRL_GET_CHANNEL. | 988 | * Used by DRX_CTRL_SET_CHANNEL and DRX_CTRL_GET_CHANNEL. |
| 989 | * Only certain fields need to be used for a specfic standard. | 989 | * Only certain fields need to be used for a specific standard. |
| 990 | * | 990 | * |
| 991 | */ | 991 | */ |
| 992 | struct drx_channel { | 992 | struct drx_channel { |
| @@ -1606,7 +1606,7 @@ struct drx_version_list { | |||
| 1606 | DRX_AUD_I2S_MATRIX_B_MONO, | 1606 | DRX_AUD_I2S_MATRIX_B_MONO, |
| 1607 | /*< B sound only, stereo or mono */ | 1607 | /*< B sound only, stereo or mono */ |
| 1608 | DRX_AUD_I2S_MATRIX_STEREO, | 1608 | DRX_AUD_I2S_MATRIX_STEREO, |
| 1609 | /*< A+B sound, transparant */ | 1609 | /*< A+B sound, transparent */ |
| 1610 | DRX_AUD_I2S_MATRIX_MONO /*< A+B mixed to mono sum, (L+R)/2 */}; | 1610 | DRX_AUD_I2S_MATRIX_MONO /*< A+B mixed to mono sum, (L+R)/2 */}; |
| 1611 | 1611 | ||
| 1612 | /* | 1612 | /* |
| @@ -1870,7 +1870,7 @@ struct drx_reg_dump { | |||
| 1870 | /*< current power management mode */ | 1870 | /*< current power management mode */ |
| 1871 | 1871 | ||
| 1872 | /* Tuner */ | 1872 | /* Tuner */ |
| 1873 | u8 tuner_port_nr; /*< nr of I2C port to wich tuner is */ | 1873 | u8 tuner_port_nr; /*< nr of I2C port to which tuner is */ |
| 1874 | s32 tuner_min_freq_rf; | 1874 | s32 tuner_min_freq_rf; |
| 1875 | /*< minimum RF input frequency, in kHz */ | 1875 | /*< minimum RF input frequency, in kHz */ |
| 1876 | s32 tuner_max_freq_rf; | 1876 | s32 tuner_max_freq_rf; |
diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.c b/drivers/media/dvb-frontends/drx39xyj/drxj.c index 551b7d65fa66..a6876fa48753 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drxj.c +++ b/drivers/media/dvb-frontends/drx39xyj/drxj.c | |||
| @@ -380,10 +380,10 @@ DEFINES | |||
| 380 | */ | 380 | */ |
| 381 | 381 | ||
| 382 | /*****************************************************************************/ | 382 | /*****************************************************************************/ |
| 383 | /* Audio block 0x103 is write only. To avoid shadowing in driver accessing */ | 383 | /* Audio block 0x103 is write only. To avoid shadowing in driver accessing */ |
| 384 | /* RAM adresses directly. This must be READ ONLY to avoid problems. */ | 384 | /* RAM addresses directly. This must be READ ONLY to avoid problems. */ |
| 385 | /* Writing to the interface adresses is more than only writing the RAM */ | 385 | /* Writing to the interface addresses are more than only writing the RAM */ |
| 386 | /* locations */ | 386 | /* locations */ |
| 387 | /*****************************************************************************/ | 387 | /*****************************************************************************/ |
| 388 | /* | 388 | /* |
| 389 | * \brief RAM location of MODUS registers | 389 | * \brief RAM location of MODUS registers |
| @@ -656,8 +656,8 @@ static struct drxj_data drxj_data_g = { | |||
| 656 | false, /* flag: true=bypass */ | 656 | false, /* flag: true=bypass */ |
| 657 | ATV_TOP_VID_PEAK__PRE, /* shadow of ATV_TOP_VID_PEAK__A */ | 657 | ATV_TOP_VID_PEAK__PRE, /* shadow of ATV_TOP_VID_PEAK__A */ |
| 658 | ATV_TOP_NOISE_TH__PRE, /* shadow of ATV_TOP_NOISE_TH__A */ | 658 | ATV_TOP_NOISE_TH__PRE, /* shadow of ATV_TOP_NOISE_TH__A */ |
| 659 | true, /* flag CVBS ouput enable */ | 659 | true, /* flag CVBS output enable */ |
| 660 | false, /* flag SIF ouput enable */ | 660 | false, /* flag SIF output enable */ |
| 661 | DRXJ_SIF_ATTENUATION_0DB, /* current SIF att setting */ | 661 | DRXJ_SIF_ATTENUATION_0DB, /* current SIF att setting */ |
| 662 | { /* qam_rf_agc_cfg */ | 662 | { /* qam_rf_agc_cfg */ |
| 663 | DRX_STANDARD_ITU_B, /* standard */ | 663 | DRX_STANDARD_ITU_B, /* standard */ |
| @@ -832,7 +832,7 @@ static struct drx_common_attr drxj_default_comm_attr_g = { | |||
| 832 | false, /* If true mirror frequency spectrum */ | 832 | false, /* If true mirror frequency spectrum */ |
| 833 | { | 833 | { |
| 834 | /* MPEG output configuration */ | 834 | /* MPEG output configuration */ |
| 835 | true, /* If true, enable MPEG ouput */ | 835 | true, /* If true, enable MPEG output */ |
| 836 | false, /* If true, insert RS byte */ | 836 | false, /* If true, insert RS byte */ |
| 837 | false, /* If true, parallel out otherwise serial */ | 837 | false, /* If true, parallel out otherwise serial */ |
| 838 | false, /* If true, invert DATA signals */ | 838 | false, /* If true, invert DATA signals */ |
| @@ -848,7 +848,7 @@ static struct drx_common_attr drxj_default_comm_attr_g = { | |||
| 848 | DRX_MPEG_STR_WIDTH_1 /* MPEG Start width in clock cycles */ | 848 | DRX_MPEG_STR_WIDTH_1 /* MPEG Start width in clock cycles */ |
| 849 | }, | 849 | }, |
| 850 | /* Initilisations below can be omitted, they require no user input and | 850 | /* Initilisations below can be omitted, they require no user input and |
| 851 | are initialy 0, NULL or false. The compiler will initialize them to these | 851 | are initially 0, NULL or false. The compiler will initialize them to these |
| 852 | values when omitted. */ | 852 | values when omitted. */ |
| 853 | false, /* is_opened */ | 853 | false, /* is_opened */ |
| 854 | 854 | ||
| @@ -869,7 +869,7 @@ static struct drx_common_attr drxj_default_comm_attr_g = { | |||
| 869 | DRX_POWER_UP, | 869 | DRX_POWER_UP, |
| 870 | 870 | ||
| 871 | /* Tuner */ | 871 | /* Tuner */ |
| 872 | 1, /* nr of I2C port to wich tuner is */ | 872 | 1, /* nr of I2C port to which tuner is */ |
| 873 | 0L, /* minimum RF input frequency, in kHz */ | 873 | 0L, /* minimum RF input frequency, in kHz */ |
| 874 | 0L, /* maximum RF input frequency, in kHz */ | 874 | 0L, /* maximum RF input frequency, in kHz */ |
| 875 | false, /* Rf Agc Polarity */ | 875 | false, /* Rf Agc Polarity */ |
| @@ -1656,7 +1656,7 @@ static int drxdap_fasi_write_block(struct i2c_device_addr *dev_addr, | |||
| 1656 | sequense will be visible: (1) write address {i2c addr, | 1656 | sequense will be visible: (1) write address {i2c addr, |
| 1657 | 4 bytes chip address} (2) write data {i2c addr, 4 bytes data } | 1657 | 4 bytes chip address} (2) write data {i2c addr, 4 bytes data } |
| 1658 | (3) write address (4) write data etc... | 1658 | (3) write address (4) write data etc... |
| 1659 | Address must be rewriten because HI is reset after data transport and | 1659 | Address must be rewritten because HI is reset after data transport and |
| 1660 | expects an address. | 1660 | expects an address. |
| 1661 | */ | 1661 | */ |
| 1662 | todo = (block_size < datasize ? block_size : datasize); | 1662 | todo = (block_size < datasize ? block_size : datasize); |
| @@ -1820,7 +1820,7 @@ static int drxdap_fasi_write_reg32(struct i2c_device_addr *dev_addr, | |||
| 1820 | * \param wdata Data to write | 1820 | * \param wdata Data to write |
| 1821 | * \param rdata Buffer for data to read | 1821 | * \param rdata Buffer for data to read |
| 1822 | * \return int | 1822 | * \return int |
| 1823 | * \retval 0 Succes | 1823 | * \retval 0 Success |
| 1824 | * \retval -EIO Timeout, I2C error, illegal bank | 1824 | * \retval -EIO Timeout, I2C error, illegal bank |
| 1825 | * | 1825 | * |
| 1826 | * 16 bits register read modify write access using short addressing format only. | 1826 | * 16 bits register read modify write access using short addressing format only. |
| @@ -1897,7 +1897,7 @@ static int drxj_dap_read_modify_write_reg16(struct i2c_device_addr *dev_addr, | |||
| 1897 | * \param addr | 1897 | * \param addr |
| 1898 | * \param data | 1898 | * \param data |
| 1899 | * \return int | 1899 | * \return int |
| 1900 | * \retval 0 Succes | 1900 | * \retval 0 Success |
| 1901 | * \retval -EIO Timeout, I2C error, illegal bank | 1901 | * \retval -EIO Timeout, I2C error, illegal bank |
| 1902 | * | 1902 | * |
| 1903 | * 16 bits register read access via audio token ring interface. | 1903 | * 16 bits register read access via audio token ring interface. |
| @@ -2004,7 +2004,7 @@ static int drxj_dap_read_reg16(struct i2c_device_addr *dev_addr, | |||
| 2004 | * \param addr | 2004 | * \param addr |
| 2005 | * \param data | 2005 | * \param data |
| 2006 | * \return int | 2006 | * \return int |
| 2007 | * \retval 0 Succes | 2007 | * \retval 0 Success |
| 2008 | * \retval -EIO Timeout, I2C error, illegal bank | 2008 | * \retval -EIO Timeout, I2C error, illegal bank |
| 2009 | * | 2009 | * |
| 2010 | * 16 bits register write access via audio token ring interface. | 2010 | * 16 bits register write access via audio token ring interface. |
| @@ -2094,7 +2094,7 @@ static int drxj_dap_write_reg16(struct i2c_device_addr *dev_addr, | |||
| 2094 | * \param datasize size of data buffer in bytes | 2094 | * \param datasize size of data buffer in bytes |
| 2095 | * \param data pointer to data buffer | 2095 | * \param data pointer to data buffer |
| 2096 | * \return int | 2096 | * \return int |
| 2097 | * \retval 0 Succes | 2097 | * \retval 0 Success |
| 2098 | * \retval -EIO Timeout, I2C error, illegal bank | 2098 | * \retval -EIO Timeout, I2C error, illegal bank |
| 2099 | * | 2099 | * |
| 2100 | */ | 2100 | */ |
| @@ -2338,7 +2338,7 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16 | |||
| 2338 | if ((cmd->cmd) == SIO_HI_RA_RAM_CMD_RESET) | 2338 | if ((cmd->cmd) == SIO_HI_RA_RAM_CMD_RESET) |
| 2339 | msleep(1); | 2339 | msleep(1); |
| 2340 | 2340 | ||
| 2341 | /* Detect power down to ommit reading result */ | 2341 | /* Detect power down to omit reading result */ |
| 2342 | powerdown_cmd = (bool) ((cmd->cmd == SIO_HI_RA_RAM_CMD_CONFIG) && | 2342 | powerdown_cmd = (bool) ((cmd->cmd == SIO_HI_RA_RAM_CMD_CONFIG) && |
| 2343 | (((cmd-> | 2343 | (((cmd-> |
| 2344 | param5) & SIO_HI_RA_RAM_PAR_5_CFG_SLEEP__M) | 2344 | param5) & SIO_HI_RA_RAM_PAR_5_CFG_SLEEP__M) |
| @@ -2754,7 +2754,7 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o | |||
| 2754 | common_attr = (struct drx_common_attr *) demod->my_common_attr; | 2754 | common_attr = (struct drx_common_attr *) demod->my_common_attr; |
| 2755 | 2755 | ||
| 2756 | if (cfg_data->enable_mpeg_output == true) { | 2756 | if (cfg_data->enable_mpeg_output == true) { |
| 2757 | /* quick and dirty patch to set MPEG incase current std is not | 2757 | /* quick and dirty patch to set MPEG in case current std is not |
| 2758 | producing MPEG */ | 2758 | producing MPEG */ |
| 2759 | switch (ext_attr->standard) { | 2759 | switch (ext_attr->standard) { |
| 2760 | case DRX_STANDARD_8VSB: | 2760 | case DRX_STANDARD_8VSB: |
| @@ -2894,7 +2894,7 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o | |||
| 2894 | break; | 2894 | break; |
| 2895 | default: | 2895 | default: |
| 2896 | break; | 2896 | break; |
| 2897 | } /* swtich (standard) */ | 2897 | } /* switch (standard) */ |
| 2898 | 2898 | ||
| 2899 | /* Check insertion of the Reed-Solomon parity bytes */ | 2899 | /* Check insertion of the Reed-Solomon parity bytes */ |
| 2900 | rc = drxj_dap_read_reg16(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0); | 2900 | rc = drxj_dap_read_reg16(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0); |
| @@ -4127,7 +4127,7 @@ rw_error: | |||
| 4127 | * \param datasize size of data buffer in bytes | 4127 | * \param datasize size of data buffer in bytes |
| 4128 | * \param data pointer to data buffer | 4128 | * \param data pointer to data buffer |
| 4129 | * \return int | 4129 | * \return int |
| 4130 | * \retval 0 Succes | 4130 | * \retval 0 Success |
| 4131 | * \retval -EIO Timeout, I2C error, illegal bank | 4131 | * \retval -EIO Timeout, I2C error, illegal bank |
| 4132 | * | 4132 | * |
| 4133 | */ | 4133 | */ |
| @@ -8989,7 +8989,7 @@ qam64auto(struct drx_demod_instance *demod, | |||
| 8989 | ((jiffies_to_msecs(jiffies) - start_time) < | 8989 | ((jiffies_to_msecs(jiffies) - start_time) < |
| 8990 | (DRXJ_QAM_MAX_WAITTIME + timeout_ofs)) | 8990 | (DRXJ_QAM_MAX_WAITTIME + timeout_ofs)) |
| 8991 | ); | 8991 | ); |
| 8992 | /* Returning control to apllication ... */ | 8992 | /* Returning control to application ... */ |
| 8993 | 8993 | ||
| 8994 | return 0; | 8994 | return 0; |
| 8995 | rw_error: | 8995 | rw_error: |
| @@ -9309,7 +9309,7 @@ get_qamrs_err_count(struct i2c_device_addr *dev_addr, | |||
| 9309 | return -EINVAL; | 9309 | return -EINVAL; |
| 9310 | 9310 | ||
| 9311 | /* all reported errors are received in the */ | 9311 | /* all reported errors are received in the */ |
| 9312 | /* most recently finished measurment period */ | 9312 | /* most recently finished measurement period */ |
| 9313 | /* no of pre RS bit errors */ | 9313 | /* no of pre RS bit errors */ |
| 9314 | rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_BIT_ERRORS__A, &nr_bit_errors, 0); | 9314 | rc = drxj_dap_read_reg16(dev_addr, FEC_RS_NR_BIT_ERRORS__A, &nr_bit_errors, 0); |
| 9315 | if (rc != 0) { | 9315 | if (rc != 0) { |
| @@ -9689,7 +9689,7 @@ rw_error: | |||
| 9689 | (3) SIF AGC (used to amplify the output signal in case input to low) | 9689 | (3) SIF AGC (used to amplify the output signal in case input to low) |
| 9690 | 9690 | ||
| 9691 | The SIF AGC is now coupled to the RF/IF AGCs. | 9691 | The SIF AGC is now coupled to the RF/IF AGCs. |
| 9692 | The SIF AGC is needed for both SIF ouput and the internal SIF signal to | 9692 | The SIF AGC is needed for both SIF output and the internal SIF signal to |
| 9693 | the AUD block. | 9693 | the AUD block. |
| 9694 | 9694 | ||
| 9695 | RF and IF AGCs DACs are part of AFE, Video and SIF AGC DACs are part of | 9695 | RF and IF AGCs DACs are part of AFE, Video and SIF AGC DACs are part of |
| @@ -9702,11 +9702,11 @@ rw_error: | |||
| 9702 | later on because of the schedule) | 9702 | later on because of the schedule) |
| 9703 | 9703 | ||
| 9704 | Several HW/SCU "settings" can be used for ATV. The standard selection | 9704 | Several HW/SCU "settings" can be used for ATV. The standard selection |
| 9705 | will reset most of these settings. To avoid that the end user apllication | 9705 | will reset most of these settings. To avoid that the end user application |
| 9706 | has to perform these settings each time the ATV or FM standards is | 9706 | has to perform these settings each time the ATV or FM standards is |
| 9707 | selected the driver will shadow these settings. This enables the end user | 9707 | selected the driver will shadow these settings. This enables the end user |
| 9708 | to perform the settings only once after a drx_open(). The driver must | 9708 | to perform the settings only once after a drx_open(). The driver must |
| 9709 | write the shadow settings to HW/SCU incase: | 9709 | write the shadow settings to HW/SCU in case: |
| 9710 | ( setstandard FM/ATV) || | 9710 | ( setstandard FM/ATV) || |
| 9711 | ( settings have changed && FM/ATV standard is active) | 9711 | ( settings have changed && FM/ATV standard is active) |
| 9712 | The shadow settings will be stored in the device specific data container. | 9712 | The shadow settings will be stored in the device specific data container. |
| @@ -9908,7 +9908,7 @@ rw_error: | |||
| 9908 | #define IMPULSE_COSINE_ALPHA_0_5 { 2, 0, -2, -2, 2, 5, 2, -10, -20, -14, 20, 74, 125, 145} /*sqrt raised-cosine filter with alpha=0.5 */ | 9908 | #define IMPULSE_COSINE_ALPHA_0_5 { 2, 0, -2, -2, 2, 5, 2, -10, -20, -14, 20, 74, 125, 145} /*sqrt raised-cosine filter with alpha=0.5 */ |
| 9909 | #define IMPULSE_COSINE_ALPHA_RO_0_5 { 0, 0, 1, 2, 3, 0, -7, -15, -16, 0, 34, 77, 114, 128} /*full raised-cosine filter with alpha=0.5 (receiver only) */ | 9909 | #define IMPULSE_COSINE_ALPHA_RO_0_5 { 0, 0, 1, 2, 3, 0, -7, -15, -16, 0, 34, 77, 114, 128} /*full raised-cosine filter with alpha=0.5 (receiver only) */ |
| 9910 | 9910 | ||
| 9911 | /* Coefficients for the nyquist fitler (total: 27 taps) */ | 9911 | /* Coefficients for the nyquist filter (total: 27 taps) */ |
| 9912 | #define NYQFILTERLEN 27 | 9912 | #define NYQFILTERLEN 27 |
| 9913 | 9913 | ||
| 9914 | static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_param) | 9914 | static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_param) |
diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.h b/drivers/media/dvb-frontends/drx39xyj/drxj.h index d3ee1c23bb2f..d62412f71c88 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drxj.h +++ b/drivers/media/dvb-frontends/drx39xyj/drxj.h | |||
| @@ -49,7 +49,7 @@ INCLUDES | |||
| 49 | #if ((DRXDAP_SINGLE_MASTER == 0) && (DRXDAPFASI_LONG_ADDR_ALLOWED == 0)) | 49 | #if ((DRXDAP_SINGLE_MASTER == 0) && (DRXDAPFASI_LONG_ADDR_ALLOWED == 0)) |
| 50 | #error "Multi master mode and short addressing only is an illegal combination" | 50 | #error "Multi master mode and short addressing only is an illegal combination" |
| 51 | *; /* Generate a fatal compiler error to make sure it stops here, | 51 | *; /* Generate a fatal compiler error to make sure it stops here, |
| 52 | this is necesarry because not all compilers stop after a #error. */ | 52 | this is necessary because not all compilers stop after a #error. */ |
| 53 | #endif | 53 | #endif |
| 54 | 54 | ||
| 55 | /*------------------------------------------------------------------------- | 55 | /*------------------------------------------------------------------------- |
| @@ -203,7 +203,7 @@ struct drxj_agc_status { | |||
| 203 | * /struct drxjrs_errors | 203 | * /struct drxjrs_errors |
| 204 | * Available failure information in DRXJ_FEC_RS. | 204 | * Available failure information in DRXJ_FEC_RS. |
| 205 | * | 205 | * |
| 206 | * Container for errors that are received in the most recently finished measurment period | 206 | * Container for errors that are received in the most recently finished measurement period |
| 207 | * | 207 | * |
| 208 | */ | 208 | */ |
| 209 | struct drxjrs_errors { | 209 | struct drxjrs_errors { |
| @@ -405,7 +405,7 @@ struct drxj_cfg_atv_output { | |||
| 405 | * | 405 | * |
| 406 | */ | 406 | */ |
| 407 | struct drxj_data { | 407 | struct drxj_data { |
| 408 | /* device capabilties (determined during drx_open()) */ | 408 | /* device capabilities (determined during drx_open()) */ |
| 409 | bool has_lna; /*< true if LNA (aka PGA) present */ | 409 | bool has_lna; /*< true if LNA (aka PGA) present */ |
| 410 | bool has_oob; /*< true if OOB supported */ | 410 | bool has_oob; /*< true if OOB supported */ |
| 411 | bool has_ntsc; /*< true if NTSC supported */ | 411 | bool has_ntsc; /*< true if NTSC supported */ |
| @@ -455,7 +455,7 @@ struct drxj_cfg_atv_output { | |||
| 455 | 455 | ||
| 456 | /* IQM fs frequecy shift and inversion */ | 456 | /* IQM fs frequecy shift and inversion */ |
| 457 | u32 iqm_fs_rate_ofs; /*< frequency shifter setting after setchannel */ | 457 | u32 iqm_fs_rate_ofs; /*< frequency shifter setting after setchannel */ |
| 458 | bool pos_image; /*< Ture: positive image */ | 458 | bool pos_image; /*< True: positive image */ |
| 459 | /* IQM RC frequecy shift */ | 459 | /* IQM RC frequecy shift */ |
| 460 | u32 iqm_rc_rate_ofs; /*< frequency shifter setting after setchannel */ | 460 | u32 iqm_rc_rate_ofs; /*< frequency shifter setting after setchannel */ |
| 461 | 461 | ||
| @@ -468,8 +468,8 @@ struct drxj_cfg_atv_output { | |||
| 468 | bool phase_correction_bypass;/*< flag: true=bypass */ | 468 | bool phase_correction_bypass;/*< flag: true=bypass */ |
| 469 | s16 atv_top_vid_peak; /*< shadow of ATV_TOP_VID_PEAK__A */ | 469 | s16 atv_top_vid_peak; /*< shadow of ATV_TOP_VID_PEAK__A */ |
| 470 | u16 atv_top_noise_th; /*< shadow of ATV_TOP_NOISE_TH__A */ | 470 | u16 atv_top_noise_th; /*< shadow of ATV_TOP_NOISE_TH__A */ |
| 471 | bool enable_cvbs_output; /*< flag CVBS ouput enable */ | 471 | bool enable_cvbs_output; /*< flag CVBS output enable */ |
| 472 | bool enable_sif_output; /*< flag SIF ouput enable */ | 472 | bool enable_sif_output; /*< flag SIF output enable */ |
| 473 | enum drxjsif_attenuation sif_attenuation; | 473 | enum drxjsif_attenuation sif_attenuation; |
| 474 | /*< current SIF att setting */ | 474 | /*< current SIF att setting */ |
| 475 | /* Agc configuration for QAM and VSB */ | 475 | /* Agc configuration for QAM and VSB */ |
diff --git a/drivers/media/dvb-frontends/drxd_firm.c b/drivers/media/dvb-frontends/drxd_firm.c index 4e1d8905e06a..412871d6636b 100644 --- a/drivers/media/dvb-frontends/drxd_firm.c +++ b/drivers/media/dvb-frontends/drxd_firm.c | |||
| @@ -890,7 +890,7 @@ u8 DRXD_StartDiversityEnd[] = { | |||
| 890 | /* End demod, combining RF in and diversity in, MPEG TS out */ | 890 | /* End demod, combining RF in and diversity in, MPEG TS out */ |
| 891 | WR16(B_FE_CF_REG_IMP_VAL__A, 0x0), /* disable impulse noise cruncher */ | 891 | WR16(B_FE_CF_REG_IMP_VAL__A, 0x0), /* disable impulse noise cruncher */ |
| 892 | WR16(B_FE_AD_REG_INVEXT__A, 0x0), /* clock inversion (for sohard board) */ | 892 | WR16(B_FE_AD_REG_INVEXT__A, 0x0), /* clock inversion (for sohard board) */ |
| 893 | WR16(B_CP_REG_BR_STR_DEL__A, 10), /* apperently no mb delay matching is best */ | 893 | WR16(B_CP_REG_BR_STR_DEL__A, 10), /* apparently no mb delay matching is best */ |
| 894 | 894 | ||
| 895 | WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_DIV_ON | /* org = 0x81 combining enabled */ | 895 | WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_DIV_ON | /* org = 0x81 combining enabled */ |
| 896 | B_EQ_REG_RC_SEL_CAR_MEAS_A_CC | | 896 | B_EQ_REG_RC_SEL_CAR_MEAS_A_CC | |
diff --git a/drivers/media/dvb-frontends/drxd_hard.c b/drivers/media/dvb-frontends/drxd_hard.c index 684d428efb0d..0a5b15bee1d7 100644 --- a/drivers/media/dvb-frontends/drxd_hard.c +++ b/drivers/media/dvb-frontends/drxd_hard.c | |||
| @@ -1144,6 +1144,8 @@ static int EnableAndResetMB(struct drxd_state *state) | |||
| 1144 | 1144 | ||
| 1145 | static int InitCC(struct drxd_state *state) | 1145 | static int InitCC(struct drxd_state *state) |
| 1146 | { | 1146 | { |
| 1147 | int status = 0; | ||
| 1148 | |||
| 1147 | if (state->osc_clock_freq == 0 || | 1149 | if (state->osc_clock_freq == 0 || |
| 1148 | state->osc_clock_freq > 20000 || | 1150 | state->osc_clock_freq > 20000 || |
| 1149 | (state->osc_clock_freq % 4000) != 0) { | 1151 | (state->osc_clock_freq % 4000) != 0) { |
| @@ -1151,14 +1153,17 @@ static int InitCC(struct drxd_state *state) | |||
| 1151 | return -1; | 1153 | return -1; |
| 1152 | } | 1154 | } |
| 1153 | 1155 | ||
| 1154 | Write16(state, CC_REG_OSC_MODE__A, CC_REG_OSC_MODE_M20, 0); | 1156 | status |= Write16(state, CC_REG_OSC_MODE__A, CC_REG_OSC_MODE_M20, 0); |
| 1155 | Write16(state, CC_REG_PLL_MODE__A, CC_REG_PLL_MODE_BYPASS_PLL | | 1157 | status |= Write16(state, CC_REG_PLL_MODE__A, |
| 1156 | CC_REG_PLL_MODE_PUMP_CUR_12, 0); | 1158 | CC_REG_PLL_MODE_BYPASS_PLL | |
| 1157 | Write16(state, CC_REG_REF_DIVIDE__A, state->osc_clock_freq / 4000, 0); | 1159 | CC_REG_PLL_MODE_PUMP_CUR_12, 0); |
| 1158 | Write16(state, CC_REG_PWD_MODE__A, CC_REG_PWD_MODE_DOWN_PLL, 0); | 1160 | status |= Write16(state, CC_REG_REF_DIVIDE__A, |
| 1159 | Write16(state, CC_REG_UPDATE__A, CC_REG_UPDATE_KEY, 0); | 1161 | state->osc_clock_freq / 4000, 0); |
| 1162 | status |= Write16(state, CC_REG_PWD_MODE__A, CC_REG_PWD_MODE_DOWN_PLL, | ||
| 1163 | 0); | ||
| 1164 | status |= Write16(state, CC_REG_UPDATE__A, CC_REG_UPDATE_KEY, 0); | ||
| 1160 | 1165 | ||
| 1161 | return 0; | 1166 | return status; |
| 1162 | } | 1167 | } |
| 1163 | 1168 | ||
| 1164 | static int ResetECOD(struct drxd_state *state) | 1169 | static int ResetECOD(struct drxd_state *state) |
| @@ -1312,7 +1317,10 @@ static int SC_SendCommand(struct drxd_state *state, u16 cmd) | |||
| 1312 | int status = 0, ret; | 1317 | int status = 0, ret; |
| 1313 | u16 errCode; | 1318 | u16 errCode; |
| 1314 | 1319 | ||
| 1315 | Write16(state, SC_RA_RAM_CMD__A, cmd, 0); | 1320 | status = Write16(state, SC_RA_RAM_CMD__A, cmd, 0); |
| 1321 | if (status < 0) | ||
| 1322 | return status; | ||
| 1323 | |||
| 1316 | SC_WaitForReady(state); | 1324 | SC_WaitForReady(state); |
| 1317 | 1325 | ||
| 1318 | ret = Read16(state, SC_RA_RAM_CMD_ADDR__A, &errCode, 0); | 1326 | ret = Read16(state, SC_RA_RAM_CMD_ADDR__A, &errCode, 0); |
| @@ -1339,9 +1347,9 @@ static int SC_ProcStartCommand(struct drxd_state *state, | |||
| 1339 | break; | 1347 | break; |
| 1340 | } | 1348 | } |
| 1341 | SC_WaitForReady(state); | 1349 | SC_WaitForReady(state); |
| 1342 | Write16(state, SC_RA_RAM_CMD_ADDR__A, subCmd, 0); | 1350 | status |= Write16(state, SC_RA_RAM_CMD_ADDR__A, subCmd, 0); |
| 1343 | Write16(state, SC_RA_RAM_PARAM1__A, param1, 0); | 1351 | status |= Write16(state, SC_RA_RAM_PARAM1__A, param1, 0); |
| 1344 | Write16(state, SC_RA_RAM_PARAM0__A, param0, 0); | 1352 | status |= Write16(state, SC_RA_RAM_PARAM0__A, param0, 0); |
| 1345 | 1353 | ||
| 1346 | SC_SendCommand(state, SC_RA_RAM_CMD_PROC_START); | 1354 | SC_SendCommand(state, SC_RA_RAM_CMD_PROC_START); |
| 1347 | } while (0); | 1355 | } while (0); |
diff --git a/drivers/media/dvb-frontends/drxk.h b/drivers/media/dvb-frontends/drxk.h index 76466f7ec3a0..ee06e89187e4 100644 --- a/drivers/media/dvb-frontends/drxk.h +++ b/drivers/media/dvb-frontends/drxk.h | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | * @microcode_name: Name of the firmware file with the microcode | 24 | * @microcode_name: Name of the firmware file with the microcode |
| 25 | * @qam_demod_parameter_count: The number of parameters used for the command | 25 | * @qam_demod_parameter_count: The number of parameters used for the command |
| 26 | * to set the demodulator parameters. All | 26 | * to set the demodulator parameters. All |
| 27 | * firmwares are using the 2-parameter commmand. | 27 | * firmwares are using the 2-parameter command. |
| 28 | * An exception is the ``drxk_a3.mc`` firmware, | 28 | * An exception is the ``drxk_a3.mc`` firmware, |
| 29 | * which uses the 4-parameter command. | 29 | * which uses the 4-parameter command. |
| 30 | * A value of 0 (default) or lower indicates that | 30 | * A value of 0 (default) or lower indicates that |
diff --git a/drivers/media/dvb-frontends/drxk_hard.c b/drivers/media/dvb-frontends/drxk_hard.c index 8ea1e45be710..86652a4ef9ce 100644 --- a/drivers/media/dvb-frontends/drxk_hard.c +++ b/drivers/media/dvb-frontends/drxk_hard.c | |||
| @@ -723,7 +723,7 @@ static int init_state(struct drxk_state *state) | |||
| 723 | state->m_drxk_state = DRXK_UNINITIALIZED; | 723 | state->m_drxk_state = DRXK_UNINITIALIZED; |
| 724 | 724 | ||
| 725 | /* MPEG output configuration */ | 725 | /* MPEG output configuration */ |
| 726 | state->m_enable_mpeg_output = true; /* If TRUE; enable MPEG ouput */ | 726 | state->m_enable_mpeg_output = true; /* If TRUE; enable MPEG output */ |
| 727 | state->m_insert_rs_byte = false; /* If TRUE; insert RS byte */ | 727 | state->m_insert_rs_byte = false; /* If TRUE; insert RS byte */ |
| 728 | state->m_invert_data = false; /* If TRUE; invert DATA signals */ | 728 | state->m_invert_data = false; /* If TRUE; invert DATA signals */ |
| 729 | state->m_invert_err = false; /* If TRUE; invert ERR signal */ | 729 | state->m_invert_err = false; /* If TRUE; invert ERR signal */ |
| @@ -3870,7 +3870,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, | |||
| 3870 | goto error; | 3870 | goto error; |
| 3871 | } | 3871 | } |
| 3872 | #else | 3872 | #else |
| 3873 | /* Set Priorty high */ | 3873 | /* Set Priority high */ |
| 3874 | transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_HI; | 3874 | transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_HI; |
| 3875 | status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); | 3875 | status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); |
| 3876 | if (status < 0) | 3876 | if (status < 0) |
| @@ -3901,7 +3901,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, | |||
| 3901 | } | 3901 | } |
| 3902 | 3902 | ||
| 3903 | /* | 3903 | /* |
| 3904 | * SAW filter selection: normaly not necesarry, but if wanted | 3904 | * SAW filter selection: normally not necessary, but if wanted |
| 3905 | * the application can select a SAW filter via the driver by | 3905 | * the application can select a SAW filter via the driver by |
| 3906 | * using UIOs | 3906 | * using UIOs |
| 3907 | */ | 3907 | */ |
| @@ -5423,7 +5423,7 @@ static int qam_demodulator_command(struct drxk_state *state, | |||
| 5423 | 5423 | ||
| 5424 | set_param_parameters[3] |= (QAM_MIRROR_AUTO_ON); | 5424 | set_param_parameters[3] |= (QAM_MIRROR_AUTO_ON); |
| 5425 | /* Env parameters */ | 5425 | /* Env parameters */ |
| 5426 | /* check for LOCKRANGE Extented */ | 5426 | /* check for LOCKRANGE Extended */ |
| 5427 | /* set_param_parameters[3] |= QAM_LOCKRANGE_NORMAL; */ | 5427 | /* set_param_parameters[3] |= QAM_LOCKRANGE_NORMAL; */ |
| 5428 | 5428 | ||
| 5429 | status = scu_command(state, | 5429 | status = scu_command(state, |
diff --git a/drivers/media/dvb-frontends/ds3000.c b/drivers/media/dvb-frontends/ds3000.c index 46a55146cb07..2b422d3ac5fa 100644 --- a/drivers/media/dvb-frontends/ds3000.c +++ b/drivers/media/dvb-frontends/ds3000.c | |||
| @@ -914,7 +914,7 @@ static int ds3000_set_frontend(struct dvb_frontend *fe) | |||
| 914 | /* ds3000 global reset */ | 914 | /* ds3000 global reset */ |
| 915 | ds3000_writereg(state, 0x07, 0x80); | 915 | ds3000_writereg(state, 0x07, 0x80); |
| 916 | ds3000_writereg(state, 0x07, 0x00); | 916 | ds3000_writereg(state, 0x07, 0x00); |
| 917 | /* ds3000 build-in uC reset */ | 917 | /* ds3000 built-in uC reset */ |
| 918 | ds3000_writereg(state, 0xb2, 0x01); | 918 | ds3000_writereg(state, 0xb2, 0x01); |
| 919 | /* ds3000 software reset */ | 919 | /* ds3000 software reset */ |
| 920 | ds3000_writereg(state, 0x00, 0x01); | 920 | ds3000_writereg(state, 0x00, 0x01); |
| @@ -1023,7 +1023,7 @@ static int ds3000_set_frontend(struct dvb_frontend *fe) | |||
| 1023 | 1023 | ||
| 1024 | /* ds3000 out of software reset */ | 1024 | /* ds3000 out of software reset */ |
| 1025 | ds3000_writereg(state, 0x00, 0x00); | 1025 | ds3000_writereg(state, 0x00, 0x00); |
| 1026 | /* start ds3000 build-in uC */ | 1026 | /* start ds3000 built-in uC */ |
| 1027 | ds3000_writereg(state, 0xb2, 0x00); | 1027 | ds3000_writereg(state, 0xb2, 0x00); |
| 1028 | 1028 | ||
| 1029 | if (fe->ops.tuner_ops.get_frequency) { | 1029 | if (fe->ops.tuner_ops.get_frequency) { |
diff --git a/drivers/media/dvb-frontends/isl6421.c b/drivers/media/dvb-frontends/isl6421.c index ae8ec59b665c..7de11d5062c2 100644 --- a/drivers/media/dvb-frontends/isl6421.c +++ b/drivers/media/dvb-frontends/isl6421.c | |||
| @@ -98,7 +98,7 @@ static int isl6421_set_voltage(struct dvb_frontend *fe, | |||
| 98 | if (ret != 2) | 98 | if (ret != 2) |
| 99 | return -EIO; | 99 | return -EIO; |
| 100 | 100 | ||
| 101 | /* Store off status now incase future commands fail */ | 101 | /* Store off status now in case future commands fail */ |
| 102 | isl6421->is_off = is_off; | 102 | isl6421->is_off = is_off; |
| 103 | 103 | ||
| 104 | /* On overflow, the device will try again after 900 ms (typically) */ | 104 | /* On overflow, the device will try again after 900 ms (typically) */ |
diff --git a/drivers/media/dvb-frontends/lgdt3306a.c b/drivers/media/dvb-frontends/lgdt3306a.c index cee9c83e48de..99c6289ae585 100644 --- a/drivers/media/dvb-frontends/lgdt3306a.c +++ b/drivers/media/dvb-frontends/lgdt3306a.c | |||
| @@ -1685,7 +1685,10 @@ static int lgdt3306a_read_signal_strength(struct dvb_frontend *fe, | |||
| 1685 | case QAM_256: | 1685 | case QAM_256: |
| 1686 | case QAM_AUTO: | 1686 | case QAM_AUTO: |
| 1687 | /* need to know actual modulation to set proper SNR baseline */ | 1687 | /* need to know actual modulation to set proper SNR baseline */ |
| 1688 | lgdt3306a_read_reg(state, 0x00a6, &val); | 1688 | ret = lgdt3306a_read_reg(state, 0x00a6, &val); |
| 1689 | if (lg_chkerr(ret)) | ||
| 1690 | goto fail; | ||
| 1691 | |||
| 1689 | if(val & 0x04) | 1692 | if(val & 0x04) |
| 1690 | ref_snr = 2800; /* QAM-256 28dB */ | 1693 | ref_snr = 2800; /* QAM-256 28dB */ |
| 1691 | else | 1694 | else |
diff --git a/drivers/media/dvb-frontends/lgdt330x.c b/drivers/media/dvb-frontends/lgdt330x.c index 96807e134886..8abb1a510a81 100644 --- a/drivers/media/dvb-frontends/lgdt330x.c +++ b/drivers/media/dvb-frontends/lgdt330x.c | |||
| @@ -783,7 +783,7 @@ static int lgdt3303_read_status(struct dvb_frontend *fe, | |||
| 783 | 783 | ||
| 784 | if ((buf[0] & 0x02) == 0x00) | 784 | if ((buf[0] & 0x02) == 0x00) |
| 785 | *status |= FE_HAS_SYNC; | 785 | *status |= FE_HAS_SYNC; |
| 786 | if ((buf[0] & 0xfd) == 0x01) | 786 | if ((buf[0] & 0x01) == 0x01) |
| 787 | *status |= FE_HAS_VITERBI | FE_HAS_LOCK; | 787 | *status |= FE_HAS_VITERBI | FE_HAS_LOCK; |
| 788 | break; | 788 | break; |
| 789 | default: | 789 | default: |
diff --git a/drivers/media/dvb-frontends/m88rs2000.c b/drivers/media/dvb-frontends/m88rs2000.c index d5bc85501f9e..13888732951c 100644 --- a/drivers/media/dvb-frontends/m88rs2000.c +++ b/drivers/media/dvb-frontends/m88rs2000.c | |||
| @@ -701,7 +701,7 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe) | |||
| 701 | 701 | ||
| 702 | if (status & FE_HAS_LOCK) { | 702 | if (status & FE_HAS_LOCK) { |
| 703 | state->fec_inner = m88rs2000_get_fec(state); | 703 | state->fec_inner = m88rs2000_get_fec(state); |
| 704 | /* Uknown suspect SNR level */ | 704 | /* Unknown suspect SNR level */ |
| 705 | reg = m88rs2000_readreg(state, 0x65); | 705 | reg = m88rs2000_readreg(state, 0x65); |
| 706 | } | 706 | } |
| 707 | 707 | ||
diff --git a/drivers/media/dvb-frontends/mt312.c b/drivers/media/dvb-frontends/mt312.c index 03e74a729168..bfbb879469f2 100644 --- a/drivers/media/dvb-frontends/mt312.c +++ b/drivers/media/dvb-frontends/mt312.c | |||
| @@ -645,7 +645,9 @@ static int mt312_set_frontend(struct dvb_frontend *fe) | |||
| 645 | if (ret < 0) | 645 | if (ret < 0) |
| 646 | return ret; | 646 | return ret; |
| 647 | 647 | ||
| 648 | mt312_reset(state, 0); | 648 | ret = mt312_reset(state, 0); |
| 649 | if (ret < 0) | ||
| 650 | return ret; | ||
| 649 | 651 | ||
| 650 | return 0; | 652 | return 0; |
| 651 | } | 653 | } |
diff --git a/drivers/media/dvb-frontends/nxt200x.c b/drivers/media/dvb-frontends/nxt200x.c index 0961e686ff68..0ef72d6c6f8b 100644 --- a/drivers/media/dvb-frontends/nxt200x.c +++ b/drivers/media/dvb-frontends/nxt200x.c | |||
| @@ -153,7 +153,7 @@ static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* | |||
| 153 | u8 attr, len2, buf; | 153 | u8 attr, len2, buf; |
| 154 | dprintk("%s\n", __func__); | 154 | dprintk("%s\n", __func__); |
| 155 | 155 | ||
| 156 | /* set mutli register register */ | 156 | /* set multi register register */ |
| 157 | nxt200x_writebytes(state, 0x35, ®, 1); | 157 | nxt200x_writebytes(state, 0x35, ®, 1); |
| 158 | 158 | ||
| 159 | /* send the actual data */ | 159 | /* send the actual data */ |
| @@ -214,7 +214,7 @@ static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* d | |||
| 214 | u8 buf, len2, attr; | 214 | u8 buf, len2, attr; |
| 215 | dprintk("%s\n", __func__); | 215 | dprintk("%s\n", __func__); |
| 216 | 216 | ||
| 217 | /* set mutli register register */ | 217 | /* set multi register register */ |
| 218 | nxt200x_writebytes(state, 0x35, ®, 1); | 218 | nxt200x_writebytes(state, 0x35, ®, 1); |
| 219 | 219 | ||
| 220 | switch (state->demod_chip) { | 220 | switch (state->demod_chip) { |
diff --git a/drivers/media/dvb-frontends/or51211.c b/drivers/media/dvb-frontends/or51211.c index a39bbd8ff1f0..7343da11a1d8 100644 --- a/drivers/media/dvb-frontends/or51211.c +++ b/drivers/media/dvb-frontends/or51211.c | |||
| @@ -59,7 +59,7 @@ struct or51211_state { | |||
| 59 | 59 | ||
| 60 | /* Demodulator private data */ | 60 | /* Demodulator private data */ |
| 61 | u8 initialized:1; | 61 | u8 initialized:1; |
| 62 | u32 snr; /* Result of last SNR claculation */ | 62 | u32 snr; /* Result of last SNR calculation */ |
| 63 | 63 | ||
| 64 | /* Tuner private data */ | 64 | /* Tuner private data */ |
| 65 | u32 current_frequency; | 65 | u32 current_frequency; |
diff --git a/drivers/media/dvb-frontends/rtl2832_sdr.c b/drivers/media/dvb-frontends/rtl2832_sdr.c index d6673f4fb47b..57fb05bb7e96 100644 --- a/drivers/media/dvb-frontends/rtl2832_sdr.c +++ b/drivers/media/dvb-frontends/rtl2832_sdr.c | |||
| @@ -471,7 +471,7 @@ static int rtl2832_sdr_buf_prepare(struct vb2_buffer *vb) | |||
| 471 | { | 471 | { |
| 472 | struct rtl2832_sdr_dev *dev = vb2_get_drv_priv(vb->vb2_queue); | 472 | struct rtl2832_sdr_dev *dev = vb2_get_drv_priv(vb->vb2_queue); |
| 473 | 473 | ||
| 474 | /* Don't allow queing new buffers after device disconnection */ | 474 | /* Don't allow queueing new buffers after device disconnection */ |
| 475 | if (!dev->udev) | 475 | if (!dev->udev) |
| 476 | return -ENODEV; | 476 | return -ENODEV; |
| 477 | 477 | ||
diff --git a/drivers/media/dvb-frontends/s5h1409.c b/drivers/media/dvb-frontends/s5h1409.c index ceeb0c3551ce..a2907d035fe2 100644 --- a/drivers/media/dvb-frontends/s5h1409.c +++ b/drivers/media/dvb-frontends/s5h1409.c | |||
| @@ -490,7 +490,7 @@ static void s5h1409_set_qam_amhum_mode(struct dvb_frontend *fe) | |||
| 490 | 490 | ||
| 491 | if (state->qam_state == QAM_STATE_QAM_OPTIMIZED_L3) { | 491 | if (state->qam_state == QAM_STATE_QAM_OPTIMIZED_L3) { |
| 492 | /* We've already reached the maximum optimization level, so | 492 | /* We've already reached the maximum optimization level, so |
| 493 | dont bother banging on the status registers */ | 493 | don't bother banging on the status registers */ |
| 494 | return; | 494 | return; |
| 495 | } | 495 | } |
| 496 | 496 | ||
diff --git a/drivers/media/dvb-frontends/sp8870.c b/drivers/media/dvb-frontends/sp8870.c index 8d31cf3f4f07..270a3c559e08 100644 --- a/drivers/media/dvb-frontends/sp8870.c +++ b/drivers/media/dvb-frontends/sp8870.c | |||
| @@ -293,7 +293,9 @@ static int sp8870_set_frontend_parameters(struct dvb_frontend *fe) | |||
| 293 | sp8870_writereg(state, 0xc05, reg0xc05); | 293 | sp8870_writereg(state, 0xc05, reg0xc05); |
| 294 | 294 | ||
| 295 | // read status reg in order to clear pending irqs | 295 | // read status reg in order to clear pending irqs |
| 296 | sp8870_readreg(state, 0x200); | 296 | err = sp8870_readreg(state, 0x200); |
| 297 | if (err) | ||
| 298 | return err; | ||
| 297 | 299 | ||
| 298 | // system controller start | 300 | // system controller start |
| 299 | sp8870_microcontroller_start(state); | 301 | sp8870_microcontroller_start(state); |
diff --git a/drivers/media/dvb-frontends/stb0899_algo.c b/drivers/media/dvb-frontends/stb0899_algo.c index bd2defde7a77..b5debb61bca5 100644 --- a/drivers/media/dvb-frontends/stb0899_algo.c +++ b/drivers/media/dvb-frontends/stb0899_algo.c | |||
| @@ -835,8 +835,8 @@ static u32 stb0899_dvbs2_calc_dev(struct stb0899_state *state) | |||
| 835 | dec_ratio = (internal->master_clk * 2) / (5 * internal->srate); | 835 | dec_ratio = (internal->master_clk * 2) / (5 * internal->srate); |
| 836 | dec_ratio = (dec_ratio == 0) ? 1 : dec_ratio; | 836 | dec_ratio = (dec_ratio == 0) ? 1 : dec_ratio; |
| 837 | 837 | ||
| 838 | master_clk = internal->master_clk / 1000; /* for integer Caculation*/ | 838 | master_clk = internal->master_clk / 1000; /* for integer Calculation*/ |
| 839 | srate = internal->srate / 1000; /* for integer Caculation*/ | 839 | srate = internal->srate / 1000; /* for integer Calculation*/ |
| 840 | correction = (512 * master_clk) / (2 * dec_ratio * srate); | 840 | correction = (512 * master_clk) / (2 * dec_ratio * srate); |
| 841 | 841 | ||
| 842 | return correction; | 842 | return correction; |
| @@ -864,7 +864,7 @@ static void stb0899_dvbs2_set_srate(struct stb0899_state *state) | |||
| 864 | win_sel = dec_rate - 4; | 864 | win_sel = dec_rate - 4; |
| 865 | 865 | ||
| 866 | decim = (1 << dec_rate); | 866 | decim = (1 << dec_rate); |
| 867 | /* (FSamp/Fsymbol *100) for integer Caculation */ | 867 | /* (FSamp/Fsymbol *100) for integer Calculation */ |
| 868 | f_sym = internal->master_clk / ((decim * internal->srate) / 1000); | 868 | f_sym = internal->master_clk / ((decim * internal->srate) / 1000); |
| 869 | 869 | ||
| 870 | if (f_sym <= 2250) /* don't band limit signal going into btr block*/ | 870 | if (f_sym <= 2250) /* don't band limit signal going into btr block*/ |
diff --git a/drivers/media/dvb-frontends/stv0367_defs.h b/drivers/media/dvb-frontends/stv0367_defs.h index 277d2971ed3f..4afe8248a667 100644 --- a/drivers/media/dvb-frontends/stv0367_defs.h +++ b/drivers/media/dvb-frontends/stv0367_defs.h | |||
| @@ -1096,7 +1096,7 @@ static const struct st_register def0367dd_ofdm[] = { | |||
| 1096 | }; | 1096 | }; |
| 1097 | 1097 | ||
| 1098 | static const struct st_register def0367dd_qam[] = { | 1098 | static const struct st_register def0367dd_qam[] = { |
| 1099 | {R367CAB_CTRL_1, 0x06}, /* Orginal 0x04 */ | 1099 | {R367CAB_CTRL_1, 0x06}, /* Original 0x04 */ |
| 1100 | {R367CAB_CTRL_2, 0x03}, | 1100 | {R367CAB_CTRL_2, 0x03}, |
| 1101 | {R367CAB_IT_STATUS1, 0x2b}, | 1101 | {R367CAB_IT_STATUS1, 0x2b}, |
| 1102 | {R367CAB_IT_STATUS2, 0x08}, | 1102 | {R367CAB_IT_STATUS2, 0x08}, |
diff --git a/drivers/media/dvb-frontends/stv0900_core.c b/drivers/media/dvb-frontends/stv0900_core.c index 254618a06140..fa1a0fb577ad 100644 --- a/drivers/media/dvb-frontends/stv0900_core.c +++ b/drivers/media/dvb-frontends/stv0900_core.c | |||
| @@ -744,12 +744,12 @@ static int stv0900_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks) | |||
| 744 | if (stv0900_get_standard(fe, demod) == STV0900_DVBS2_STANDARD) { | 744 | if (stv0900_get_standard(fe, demod) == STV0900_DVBS2_STANDARD) { |
| 745 | /* DVB-S2 delineator errors count */ | 745 | /* DVB-S2 delineator errors count */ |
| 746 | 746 | ||
| 747 | /* retreiving number for errnous headers */ | 747 | /* retrieving number for errnous headers */ |
| 748 | err_val1 = stv0900_read_reg(intp, BBFCRCKO1); | 748 | err_val1 = stv0900_read_reg(intp, BBFCRCKO1); |
| 749 | err_val0 = stv0900_read_reg(intp, BBFCRCKO0); | 749 | err_val0 = stv0900_read_reg(intp, BBFCRCKO0); |
| 750 | header_err_val = (err_val1 << 8) | err_val0; | 750 | header_err_val = (err_val1 << 8) | err_val0; |
| 751 | 751 | ||
| 752 | /* retreiving number for errnous packets */ | 752 | /* retrieving number for errnous packets */ |
| 753 | err_val1 = stv0900_read_reg(intp, UPCRCKO1); | 753 | err_val1 = stv0900_read_reg(intp, UPCRCKO1); |
| 754 | err_val0 = stv0900_read_reg(intp, UPCRCKO0); | 754 | err_val0 = stv0900_read_reg(intp, UPCRCKO0); |
| 755 | *ucblocks = (err_val1 << 8) | err_val0; | 755 | *ucblocks = (err_val1 << 8) | err_val0; |
diff --git a/drivers/media/dvb-frontends/stv0910.c b/drivers/media/dvb-frontends/stv0910.c index fc2440d8af36..68d7c7b41071 100644 --- a/drivers/media/dvb-frontends/stv0910.c +++ b/drivers/media/dvb-frontends/stv0910.c | |||
| @@ -1238,7 +1238,7 @@ static int gate_ctrl(struct dvb_frontend *fe, int enable) | |||
| 1238 | * mutex_lock note: Concurrent I2C gate bus accesses must be | 1238 | * mutex_lock note: Concurrent I2C gate bus accesses must be |
| 1239 | * prevented (STV0910 = dual demod on a single IC with a single I2C | 1239 | * prevented (STV0910 = dual demod on a single IC with a single I2C |
| 1240 | * gate/bus, and two tuners attached), similar to most (if not all) | 1240 | * gate/bus, and two tuners attached), similar to most (if not all) |
| 1241 | * other I2C host interfaces/busses. | 1241 | * other I2C host interfaces/buses. |
| 1242 | * | 1242 | * |
| 1243 | * enable=1 (open I2C gate) will grab the lock | 1243 | * enable=1 (open I2C gate) will grab the lock |
| 1244 | * enable=0 (close I2C gate) releases the lock | 1244 | * enable=0 (close I2C gate) releases the lock |
| @@ -1500,7 +1500,7 @@ static int read_status(struct dvb_frontend *fe, enum fe_status *status) | |||
| 1500 | RSTV0910_P2_FBERCPT4 + state->regoff, 0x00); | 1500 | RSTV0910_P2_FBERCPT4 + state->regoff, 0x00); |
| 1501 | /* | 1501 | /* |
| 1502 | * Reset the packet Error counter2 (and Set it to | 1502 | * Reset the packet Error counter2 (and Set it to |
| 1503 | * infinit error count mode) | 1503 | * infinite error count mode) |
| 1504 | */ | 1504 | */ |
| 1505 | write_reg(state, | 1505 | write_reg(state, |
| 1506 | RSTV0910_P2_ERRCTRL2 + state->regoff, 0xc1); | 1506 | RSTV0910_P2_ERRCTRL2 + state->regoff, 0xc1); |
diff --git a/drivers/media/dvb-frontends/stv6110.c b/drivers/media/dvb-frontends/stv6110.c index 7db9a5bceccc..e54708eb4fb0 100644 --- a/drivers/media/dvb-frontends/stv6110.c +++ b/drivers/media/dvb-frontends/stv6110.c | |||
| @@ -202,7 +202,7 @@ static int stv6110_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth) | |||
| 202 | i++; | 202 | i++; |
| 203 | } | 203 | } |
| 204 | 204 | ||
| 205 | /* RCCLKOFF = 1 calibration done, desactivate the calibration Clock */ | 205 | /* RCCLKOFF = 1 calibration done, deactivate the calibration Clock */ |
| 206 | priv->regs[RSTV6110_CTRL3] |= (1 << 6); | 206 | priv->regs[RSTV6110_CTRL3] |= (1 << 6); |
| 207 | stv6110_write_regs(fe, &priv->regs[RSTV6110_CTRL3], RSTV6110_CTRL3, 1); | 207 | stv6110_write_regs(fe, &priv->regs[RSTV6110_CTRL3], RSTV6110_CTRL3, 1); |
| 208 | return 0; | 208 | return 0; |
diff --git a/drivers/media/dvb-frontends/tda1004x.h b/drivers/media/dvb-frontends/tda1004x.h index efd7659dace9..26f504a830e3 100644 --- a/drivers/media/dvb-frontends/tda1004x.h +++ b/drivers/media/dvb-frontends/tda1004x.h | |||
| @@ -33,7 +33,7 @@ enum tda10046_xtal { | |||
| 33 | 33 | ||
| 34 | enum tda10046_agc { | 34 | enum tda10046_agc { |
| 35 | TDA10046_AGC_DEFAULT, /* original configuration */ | 35 | TDA10046_AGC_DEFAULT, /* original configuration */ |
| 36 | TDA10046_AGC_IFO_AUTO_NEG, /* IF AGC only, automatic, negtive */ | 36 | TDA10046_AGC_IFO_AUTO_NEG, /* IF AGC only, automatic, negative */ |
| 37 | TDA10046_AGC_IFO_AUTO_POS, /* IF AGC only, automatic, positive */ | 37 | TDA10046_AGC_IFO_AUTO_POS, /* IF AGC only, automatic, positive */ |
| 38 | TDA10046_AGC_TDA827X, /* IF AGC only, special setup for tda827x */ | 38 | TDA10046_AGC_TDA827X, /* IF AGC only, special setup for tda827x */ |
| 39 | }; | 39 | }; |
diff --git a/drivers/media/dvb-frontends/tda10086.c b/drivers/media/dvb-frontends/tda10086.c index 8323e4e53d66..85dddfce8ef4 100644 --- a/drivers/media/dvb-frontends/tda10086.c +++ b/drivers/media/dvb-frontends/tda10086.c | |||
| @@ -437,7 +437,7 @@ static int tda10086_set_frontend(struct dvb_frontend *fe) | |||
| 437 | fe->ops.i2c_gate_ctrl(fe, 0); | 437 | fe->ops.i2c_gate_ctrl(fe, 0); |
| 438 | } | 438 | } |
| 439 | 439 | ||
| 440 | /* calcluate the frequency offset (in *Hz* not kHz) */ | 440 | /* calculate the frequency offset (in *Hz* not kHz) */ |
| 441 | freqoff = fe_params->frequency - freq; | 441 | freqoff = fe_params->frequency - freq; |
| 442 | freqoff = ((1<<16) * freqoff) / (SACLK/1000); | 442 | freqoff = ((1<<16) * freqoff) / (SACLK/1000); |
| 443 | tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f)); | 443 | tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f)); |
diff --git a/drivers/media/dvb-frontends/tda18271c2dd.c b/drivers/media/dvb-frontends/tda18271c2dd.c index eeb2318c102f..e064e2b22d9d 100644 --- a/drivers/media/dvb-frontends/tda18271c2dd.c +++ b/drivers/media/dvb-frontends/tda18271c2dd.c | |||
| @@ -105,7 +105,7 @@ struct tda_state { | |||
| 105 | s32 m_RF_B2[7]; | 105 | s32 m_RF_B2[7]; |
| 106 | u32 m_RF3[7]; | 106 | u32 m_RF3[7]; |
| 107 | 107 | ||
| 108 | u8 m_TMValue_RFCal; /* Calibration temperatur */ | 108 | u8 m_TMValue_RFCal; /* Calibration temperature */ |
| 109 | 109 | ||
| 110 | bool m_bFMInput; /* true to use Pin 8 for FM Radio */ | 110 | bool m_bFMInput; /* true to use Pin 8 for FM Radio */ |
| 111 | 111 | ||
| @@ -400,7 +400,7 @@ static int CalibrateRF(struct tda_state *state, | |||
| 400 | break; | 400 | break; |
| 401 | 401 | ||
| 402 | /* Switching off LT (as datasheet says) causes calibration on C1 to fail */ | 402 | /* Switching off LT (as datasheet says) causes calibration on C1 to fail */ |
| 403 | /* (Readout of Cprog is allways 255) */ | 403 | /* (Readout of Cprog is always 255) */ |
| 404 | if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */ | 404 | if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */ |
| 405 | state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */ | 405 | state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */ |
| 406 | 406 | ||
| @@ -644,7 +644,7 @@ static int PowerScan(struct tda_state *state, | |||
| 644 | if (status < 0) | 644 | if (status < 0) |
| 645 | break; | 645 | break; |
| 646 | CID_Gain = Regs[EB10] & 0x3F; | 646 | CID_Gain = Regs[EB10] & 0x3F; |
| 647 | state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workarround in CalibrateRF) */ | 647 | state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workaround in CalibrateRF) */ |
| 648 | 648 | ||
| 649 | *pRF_Out = RF_in; | 649 | *pRF_Out = RF_in; |
| 650 | 650 | ||
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 4c936e129500..6d32f8dcf83b 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig | |||
| @@ -820,6 +820,25 @@ config VIDEO_OV7740 | |||
| 820 | This is a Video4Linux2 sensor driver for the OmniVision | 820 | This is a Video4Linux2 sensor driver for the OmniVision |
| 821 | OV7740 VGA camera sensor. | 821 | OV7740 VGA camera sensor. |
| 822 | 822 | ||
| 823 | config VIDEO_OV8856 | ||
| 824 | tristate "OmniVision OV8856 sensor support" | ||
| 825 | depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API | ||
| 826 | depends on MEDIA_CAMERA_SUPPORT | ||
| 827 | select V4L2_FWNODE | ||
| 828 | help | ||
| 829 | This is a Video4Linux2 sensor driver for the OmniVision | ||
| 830 | OV8856 camera sensor. | ||
| 831 | |||
| 832 | To compile this driver as a module, choose M here: the | ||
| 833 | module will be called ov8856. | ||
| 834 | |||
| 835 | config VIDEO_OV9640 | ||
| 836 | tristate "OmniVision OV9640 sensor support" | ||
| 837 | depends on I2C && VIDEO_V4L2 | ||
| 838 | help | ||
| 839 | This is a Video4Linux2 sensor driver for the OmniVision | ||
| 840 | OV9640 camera sensor. | ||
| 841 | |||
| 823 | config VIDEO_OV9650 | 842 | config VIDEO_OV9650 |
| 824 | tristate "OmniVision OV9650/OV9652 sensor support" | 843 | tristate "OmniVision OV9650/OV9652 sensor support" |
| 825 | depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API | 844 | depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API |
| @@ -848,6 +867,14 @@ config VIDEO_VS6624 | |||
| 848 | To compile this driver as a module, choose M here: the | 867 | To compile this driver as a module, choose M here: the |
| 849 | module will be called vs6624. | 868 | module will be called vs6624. |
| 850 | 869 | ||
| 870 | config VIDEO_MT9M001 | ||
| 871 | tristate "mt9m001 support" | ||
| 872 | depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API | ||
| 873 | depends on MEDIA_CAMERA_SUPPORT | ||
| 874 | help | ||
| 875 | This driver supports MT9M001 cameras from Micron, monochrome | ||
| 876 | and colour models. | ||
| 877 | |||
| 851 | config VIDEO_MT9M032 | 878 | config VIDEO_MT9M032 |
| 852 | tristate "MT9M032 camera sensor support" | 879 | tristate "MT9M032 camera sensor support" |
| 853 | depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API | 880 | depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API |
| @@ -1100,18 +1127,11 @@ config VIDEO_I2C | |||
| 1100 | Enable the I2C transport video support which supports the | 1127 | Enable the I2C transport video support which supports the |
| 1101 | following: | 1128 | following: |
| 1102 | * Panasonic AMG88xx Grid-Eye Sensors | 1129 | * Panasonic AMG88xx Grid-Eye Sensors |
| 1130 | * Melexis MLX90640 Thermal Cameras | ||
| 1103 | 1131 | ||
| 1104 | To compile this driver as a module, choose M here: the | 1132 | To compile this driver as a module, choose M here: the |
| 1105 | module will be called video-i2c | 1133 | module will be called video-i2c |
| 1106 | 1134 | ||
| 1107 | endmenu | 1135 | endmenu |
| 1108 | 1136 | ||
| 1109 | menu "Sensors used on soc_camera driver" | ||
| 1110 | |||
| 1111 | if SOC_CAMERA | ||
| 1112 | source "drivers/media/i2c/soc_camera/Kconfig" | ||
| 1113 | endif | ||
| 1114 | |||
| 1115 | endmenu | ||
| 1116 | |||
| 1117 | endif | 1137 | endif |
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 65fae7732de0..a64fca82e0c4 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile | |||
| @@ -6,7 +6,6 @@ obj-$(CONFIG_VIDEO_SMIAPP) += smiapp/ | |||
| 6 | obj-$(CONFIG_VIDEO_ET8EK8) += et8ek8/ | 6 | obj-$(CONFIG_VIDEO_ET8EK8) += et8ek8/ |
| 7 | obj-$(CONFIG_VIDEO_CX25840) += cx25840/ | 7 | obj-$(CONFIG_VIDEO_CX25840) += cx25840/ |
| 8 | obj-$(CONFIG_VIDEO_M5MOLS) += m5mols/ | 8 | obj-$(CONFIG_VIDEO_M5MOLS) += m5mols/ |
| 9 | obj-y += soc_camera/ | ||
| 10 | 9 | ||
| 11 | obj-$(CONFIG_VIDEO_APTINA_PLL) += aptina-pll.o | 10 | obj-$(CONFIG_VIDEO_APTINA_PLL) += aptina-pll.o |
| 12 | obj-$(CONFIG_VIDEO_TVAUDIO) += tvaudio.o | 11 | obj-$(CONFIG_VIDEO_TVAUDIO) += tvaudio.o |
| @@ -78,8 +77,11 @@ obj-$(CONFIG_VIDEO_OV7640) += ov7640.o | |||
| 78 | obj-$(CONFIG_VIDEO_OV7670) += ov7670.o | 77 | obj-$(CONFIG_VIDEO_OV7670) += ov7670.o |
| 79 | obj-$(CONFIG_VIDEO_OV772X) += ov772x.o | 78 | obj-$(CONFIG_VIDEO_OV772X) += ov772x.o |
| 80 | obj-$(CONFIG_VIDEO_OV7740) += ov7740.o | 79 | obj-$(CONFIG_VIDEO_OV7740) += ov7740.o |
| 80 | obj-$(CONFIG_VIDEO_OV8856) += ov8856.o | ||
| 81 | obj-$(CONFIG_VIDEO_OV9640) += ov9640.o | ||
| 81 | obj-$(CONFIG_VIDEO_OV9650) += ov9650.o | 82 | obj-$(CONFIG_VIDEO_OV9650) += ov9650.o |
| 82 | obj-$(CONFIG_VIDEO_OV13858) += ov13858.o | 83 | obj-$(CONFIG_VIDEO_OV13858) += ov13858.o |
| 84 | obj-$(CONFIG_VIDEO_MT9M001) += mt9m001.o | ||
| 83 | obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o | 85 | obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o |
| 84 | obj-$(CONFIG_VIDEO_MT9M111) += mt9m111.o | 86 | obj-$(CONFIG_VIDEO_MT9M111) += mt9m111.o |
| 85 | obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o | 87 | obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o |
diff --git a/drivers/media/i2c/adv7175.c b/drivers/media/i2c/adv7175.c index e31e8d909bb9..419b98117133 100644 --- a/drivers/media/i2c/adv7175.c +++ b/drivers/media/i2c/adv7175.c | |||
| @@ -219,7 +219,7 @@ static int adv7175_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std) | |||
| 219 | * SECAM->PAL (typically it does not work | 219 | * SECAM->PAL (typically it does not work |
| 220 | * due to genlock: when decoder is in SECAM | 220 | * due to genlock: when decoder is in SECAM |
| 221 | * and encoder in in PAL the subcarrier can | 221 | * and encoder in in PAL the subcarrier can |
| 222 | * not be syncronized with horizontal | 222 | * not be synchronized with horizontal |
| 223 | * quency) */ | 223 | * quency) */ |
| 224 | adv7175_write_block(sd, init_pal, sizeof(init_pal)); | 224 | adv7175_write_block(sd, init_pal, sizeof(init_pal)); |
| 225 | if (encoder->input == 0) | 225 | if (encoder->input == 0) |
diff --git a/drivers/media/i2c/adv748x/adv748x-afe.c b/drivers/media/i2c/adv748x/adv748x-afe.c index 71714634efb0..dbbb1e4d6363 100644 --- a/drivers/media/i2c/adv748x/adv748x-afe.c +++ b/drivers/media/i2c/adv748x/adv748x-afe.c | |||
| @@ -282,7 +282,7 @@ static int adv748x_afe_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 282 | goto unlock; | 282 | goto unlock; |
| 283 | } | 283 | } |
| 284 | 284 | ||
| 285 | ret = adv748x_tx_power(&state->txb, enable); | 285 | ret = adv748x_tx_power(afe->tx, enable); |
| 286 | if (ret) | 286 | if (ret) |
| 287 | goto unlock; | 287 | goto unlock; |
| 288 | 288 | ||
diff --git a/drivers/media/i2c/adv748x/adv748x-core.c b/drivers/media/i2c/adv748x/adv748x-core.c index 6854d898fdd1..f57cd77a32fa 100644 --- a/drivers/media/i2c/adv748x/adv748x-core.c +++ b/drivers/media/i2c/adv748x/adv748x-core.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <media/v4l2-ctrls.h> | 23 | #include <media/v4l2-ctrls.h> |
| 24 | #include <media/v4l2-device.h> | 24 | #include <media/v4l2-device.h> |
| 25 | #include <media/v4l2-dv-timings.h> | 25 | #include <media/v4l2-dv-timings.h> |
| 26 | #include <media/v4l2-fwnode.h> | ||
| 26 | #include <media/v4l2-ioctl.h> | 27 | #include <media/v4l2-ioctl.h> |
| 27 | 28 | ||
| 28 | #include "adv748x.h" | 29 | #include "adv748x.h" |
| @@ -124,6 +125,16 @@ int adv748x_write(struct adv748x_state *state, u8 page, u8 reg, u8 value) | |||
| 124 | return regmap_write(state->regmap[page], reg, value); | 125 | return regmap_write(state->regmap[page], reg, value); |
| 125 | } | 126 | } |
| 126 | 127 | ||
| 128 | static int adv748x_write_check(struct adv748x_state *state, u8 page, u8 reg, | ||
| 129 | u8 value, int *error) | ||
| 130 | { | ||
| 131 | if (*error) | ||
| 132 | return *error; | ||
| 133 | |||
| 134 | *error = adv748x_write(state, page, reg, value); | ||
| 135 | return *error; | ||
| 136 | } | ||
| 137 | |||
| 127 | /* adv748x_write_block(): Write raw data with a maximum of I2C_SMBUS_BLOCK_MAX | 138 | /* adv748x_write_block(): Write raw data with a maximum of I2C_SMBUS_BLOCK_MAX |
| 128 | * size to one or more registers. | 139 | * size to one or more registers. |
| 129 | * | 140 | * |
| @@ -207,20 +218,13 @@ static int adv748x_write_regs(struct adv748x_state *state, | |||
| 207 | { | 218 | { |
| 208 | int ret; | 219 | int ret; |
| 209 | 220 | ||
| 210 | while (regs->page != ADV748X_PAGE_EOR) { | 221 | for (; regs->page != ADV748X_PAGE_EOR; regs++) { |
| 211 | if (regs->page == ADV748X_PAGE_WAIT) { | 222 | ret = adv748x_write(state, regs->page, regs->reg, regs->value); |
| 212 | msleep(regs->value); | 223 | if (ret < 0) { |
| 213 | } else { | 224 | adv_err(state, "Error regs page: 0x%02x reg: 0x%02x\n", |
| 214 | ret = adv748x_write(state, regs->page, regs->reg, | 225 | regs->page, regs->reg); |
| 215 | regs->value); | 226 | return ret; |
| 216 | if (ret < 0) { | ||
| 217 | adv_err(state, | ||
| 218 | "Error regs page: 0x%02x reg: 0x%02x\n", | ||
| 219 | regs->page, regs->reg); | ||
| 220 | return ret; | ||
| 221 | } | ||
| 222 | } | 227 | } |
| 223 | regs++; | ||
| 224 | } | 228 | } |
| 225 | 229 | ||
| 226 | return 0; | 230 | return 0; |
| @@ -230,68 +234,77 @@ static int adv748x_write_regs(struct adv748x_state *state, | |||
| 230 | * TXA and TXB | 234 | * TXA and TXB |
| 231 | */ | 235 | */ |
| 232 | 236 | ||
| 233 | static const struct adv748x_reg_value adv748x_power_up_txa_4lane[] = { | 237 | static int adv748x_power_up_tx(struct adv748x_csi2 *tx) |
| 238 | { | ||
| 239 | struct adv748x_state *state = tx->state; | ||
| 240 | u8 page = is_txa(tx) ? ADV748X_PAGE_TXA : ADV748X_PAGE_TXB; | ||
| 241 | int ret = 0; | ||
| 234 | 242 | ||
| 235 | {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */ | 243 | /* Enable n-lane MIPI */ |
| 236 | {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */ | 244 | adv748x_write_check(state, page, 0x00, 0x80 | tx->num_lanes, &ret); |
| 237 | 245 | ||
| 238 | {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */ | 246 | /* Set Auto DPHY Timing */ |
| 239 | {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */ | 247 | adv748x_write_check(state, page, 0x00, 0xa0 | tx->num_lanes, &ret); |
| 240 | {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ | ||
| 241 | {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ | ||
| 242 | {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */ | ||
| 243 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 244 | {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */ | ||
| 245 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 246 | {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */ | ||
| 247 | 248 | ||
| 248 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ | 249 | /* ADI Required Write */ |
| 249 | }; | 250 | if (tx->src == &state->hdmi.sd) { |
| 251 | adv748x_write_check(state, page, 0xdb, 0x10, &ret); | ||
| 252 | adv748x_write_check(state, page, 0xd6, 0x07, &ret); | ||
| 253 | } else { | ||
| 254 | adv748x_write_check(state, page, 0xd2, 0x40, &ret); | ||
| 255 | } | ||
| 250 | 256 | ||
| 251 | static const struct adv748x_reg_value adv748x_power_down_txa_4lane[] = { | 257 | adv748x_write_check(state, page, 0xc4, 0x0a, &ret); |
| 258 | adv748x_write_check(state, page, 0x71, 0x33, &ret); | ||
| 259 | adv748x_write_check(state, page, 0x72, 0x11, &ret); | ||
| 252 | 260 | ||
| 253 | {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */ | 261 | /* i2c_dphy_pwdn - 1'b0 */ |
| 254 | {ADV748X_PAGE_TXA, 0x1e, 0x00}, /* ADI Required Write */ | 262 | adv748x_write_check(state, page, 0xf0, 0x00, &ret); |
| 255 | {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */ | ||
| 256 | {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ | ||
| 257 | {ADV748X_PAGE_TXA, 0xc1, 0x3b}, /* ADI Required Write */ | ||
| 258 | 263 | ||
| 259 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ | 264 | /* ADI Required Writes*/ |
| 260 | }; | 265 | adv748x_write_check(state, page, 0x31, 0x82, &ret); |
| 266 | adv748x_write_check(state, page, 0x1e, 0x40, &ret); | ||
| 261 | 267 | ||
| 262 | static const struct adv748x_reg_value adv748x_power_up_txb_1lane[] = { | 268 | /* i2c_mipi_pll_en - 1'b1 */ |
| 269 | adv748x_write_check(state, page, 0xda, 0x01, &ret); | ||
| 270 | usleep_range(2000, 2500); | ||
| 263 | 271 | ||
| 264 | {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */ | 272 | /* Power-up CSI-TX */ |
| 265 | {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */ | 273 | adv748x_write_check(state, page, 0x00, 0x20 | tx->num_lanes, &ret); |
| 274 | usleep_range(1000, 1500); | ||
| 266 | 275 | ||
| 267 | {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */ | 276 | /* ADI Required Writes */ |
| 268 | {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */ | 277 | adv748x_write_check(state, page, 0xc1, 0x2b, &ret); |
| 269 | {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ | 278 | usleep_range(1000, 1500); |
| 270 | {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ | 279 | adv748x_write_check(state, page, 0x31, 0x80, &ret); |
| 271 | {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */ | ||
| 272 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 273 | {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */ | ||
| 274 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 275 | {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */ | ||
| 276 | 280 | ||
| 277 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ | 281 | return ret; |
| 278 | }; | 282 | } |
| 279 | 283 | ||
| 280 | static const struct adv748x_reg_value adv748x_power_down_txb_1lane[] = { | 284 | static int adv748x_power_down_tx(struct adv748x_csi2 *tx) |
| 285 | { | ||
| 286 | struct adv748x_state *state = tx->state; | ||
| 287 | u8 page = is_txa(tx) ? ADV748X_PAGE_TXA : ADV748X_PAGE_TXB; | ||
| 288 | int ret = 0; | ||
| 281 | 289 | ||
| 282 | {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */ | 290 | /* ADI Required Writes */ |
| 283 | {ADV748X_PAGE_TXB, 0x1e, 0x00}, /* ADI Required Write */ | 291 | adv748x_write_check(state, page, 0x31, 0x82, &ret); |
| 284 | {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */ | 292 | adv748x_write_check(state, page, 0x1e, 0x00, &ret); |
| 285 | {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ | ||
| 286 | {ADV748X_PAGE_TXB, 0xc1, 0x3b}, /* ADI Required Write */ | ||
| 287 | 293 | ||
| 288 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ | 294 | /* Enable n-lane MIPI */ |
| 289 | }; | 295 | adv748x_write_check(state, page, 0x00, 0x80 | tx->num_lanes, &ret); |
| 296 | |||
| 297 | /* i2c_mipi_pll_en - 1'b1 */ | ||
| 298 | adv748x_write_check(state, page, 0xda, 0x01, &ret); | ||
| 299 | |||
| 300 | /* ADI Required Write */ | ||
| 301 | adv748x_write_check(state, page, 0xc1, 0x3b, &ret); | ||
| 302 | |||
| 303 | return ret; | ||
| 304 | } | ||
| 290 | 305 | ||
| 291 | int adv748x_tx_power(struct adv748x_csi2 *tx, bool on) | 306 | int adv748x_tx_power(struct adv748x_csi2 *tx, bool on) |
| 292 | { | 307 | { |
| 293 | struct adv748x_state *state = tx->state; | ||
| 294 | const struct adv748x_reg_value *reglist; | ||
| 295 | int val; | 308 | int val; |
| 296 | 309 | ||
| 297 | if (!is_tx_enabled(tx)) | 310 | if (!is_tx_enabled(tx)) |
| @@ -309,19 +322,57 @@ int adv748x_tx_power(struct adv748x_csi2 *tx, bool on) | |||
| 309 | WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN), | 322 | WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN), |
| 310 | "Enabling with unknown bit set"); | 323 | "Enabling with unknown bit set"); |
| 311 | 324 | ||
| 312 | if (on) | 325 | return on ? adv748x_power_up_tx(tx) : adv748x_power_down_tx(tx); |
| 313 | reglist = is_txa(tx) ? adv748x_power_up_txa_4lane : | ||
| 314 | adv748x_power_up_txb_1lane; | ||
| 315 | else | ||
| 316 | reglist = is_txa(tx) ? adv748x_power_down_txa_4lane : | ||
| 317 | adv748x_power_down_txb_1lane; | ||
| 318 | |||
| 319 | return adv748x_write_regs(state, reglist); | ||
| 320 | } | 326 | } |
| 321 | 327 | ||
| 322 | /* ----------------------------------------------------------------------------- | 328 | /* ----------------------------------------------------------------------------- |
| 323 | * Media Operations | 329 | * Media Operations |
| 324 | */ | 330 | */ |
| 331 | static int adv748x_link_setup(struct media_entity *entity, | ||
| 332 | const struct media_pad *local, | ||
| 333 | const struct media_pad *remote, u32 flags) | ||
| 334 | { | ||
| 335 | struct v4l2_subdev *rsd = media_entity_to_v4l2_subdev(remote->entity); | ||
| 336 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); | ||
| 337 | struct adv748x_state *state = v4l2_get_subdevdata(sd); | ||
| 338 | struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd); | ||
| 339 | bool enable = flags & MEDIA_LNK_FL_ENABLED; | ||
| 340 | u8 io10_mask = ADV748X_IO_10_CSI1_EN | | ||
| 341 | ADV748X_IO_10_CSI4_EN | | ||
| 342 | ADV748X_IO_10_CSI4_IN_SEL_AFE; | ||
| 343 | u8 io10 = 0; | ||
| 344 | |||
| 345 | /* Refuse to enable multiple links to the same TX at the same time. */ | ||
| 346 | if (enable && tx->src) | ||
| 347 | return -EINVAL; | ||
| 348 | |||
| 349 | /* Set or clear the source (HDMI or AFE) and the current TX. */ | ||
| 350 | if (rsd == &state->afe.sd) | ||
| 351 | state->afe.tx = enable ? tx : NULL; | ||
| 352 | else | ||
| 353 | state->hdmi.tx = enable ? tx : NULL; | ||
| 354 | |||
| 355 | tx->src = enable ? rsd : NULL; | ||
| 356 | |||
| 357 | if (state->afe.tx) { | ||
| 358 | /* AFE Requires TXA enabled, even when output to TXB */ | ||
| 359 | io10 |= ADV748X_IO_10_CSI4_EN; | ||
| 360 | if (is_txa(tx)) | ||
| 361 | io10 |= ADV748X_IO_10_CSI4_IN_SEL_AFE; | ||
| 362 | else | ||
| 363 | io10 |= ADV748X_IO_10_CSI1_EN; | ||
| 364 | } | ||
| 365 | |||
| 366 | if (state->hdmi.tx) | ||
| 367 | io10 |= ADV748X_IO_10_CSI4_EN; | ||
| 368 | |||
| 369 | return io_clrset(state, ADV748X_IO_10, io10_mask, io10); | ||
| 370 | } | ||
| 371 | |||
| 372 | static const struct media_entity_operations adv748x_tx_media_ops = { | ||
| 373 | .link_setup = adv748x_link_setup, | ||
| 374 | .link_validate = v4l2_subdev_link_validate, | ||
| 375 | }; | ||
| 325 | 376 | ||
| 326 | static const struct media_entity_operations adv748x_media_ops = { | 377 | static const struct media_entity_operations adv748x_media_ops = { |
| 327 | .link_validate = v4l2_subdev_link_validate, | 378 | .link_validate = v4l2_subdev_link_validate, |
| @@ -331,18 +382,8 @@ static const struct media_entity_operations adv748x_media_ops = { | |||
| 331 | * HW setup | 382 | * HW setup |
| 332 | */ | 383 | */ |
| 333 | 384 | ||
| 334 | static const struct adv748x_reg_value adv748x_sw_reset[] = { | 385 | /* Initialize CP Core with RGB888 format. */ |
| 335 | 386 | static const struct adv748x_reg_value adv748x_init_hdmi[] = { | |
| 336 | {ADV748X_PAGE_IO, 0xff, 0xff}, /* SW reset */ | ||
| 337 | {ADV748X_PAGE_WAIT, 0x00, 0x05},/* delay 5 */ | ||
| 338 | {ADV748X_PAGE_IO, 0x01, 0x76}, /* ADI Required Write */ | ||
| 339 | {ADV748X_PAGE_IO, 0xf2, 0x01}, /* Enable I2C Read Auto-Increment */ | ||
| 340 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ | ||
| 341 | }; | ||
| 342 | |||
| 343 | /* Supported Formats For Script Below */ | ||
| 344 | /* - 01-29 HDMI to MIPI TxA CSI 4-Lane - RGB888: */ | ||
| 345 | static const struct adv748x_reg_value adv748x_init_txa_4lane[] = { | ||
| 346 | /* Disable chip powerdown & Enable HDMI Rx block */ | 387 | /* Disable chip powerdown & Enable HDMI Rx block */ |
| 347 | {ADV748X_PAGE_IO, 0x00, 0x40}, | 388 | {ADV748X_PAGE_IO, 0x00, 0x40}, |
| 348 | 389 | ||
| @@ -383,32 +424,11 @@ static const struct adv748x_reg_value adv748x_init_txa_4lane[] = { | |||
| 383 | {ADV748X_PAGE_IO, 0x0c, 0xe0}, /* Enable LLC_DLL & Double LLC Timing */ | 424 | {ADV748X_PAGE_IO, 0x0c, 0xe0}, /* Enable LLC_DLL & Double LLC Timing */ |
| 384 | {ADV748X_PAGE_IO, 0x0e, 0xdd}, /* LLC/PIX/SPI PINS TRISTATED AUD */ | 425 | {ADV748X_PAGE_IO, 0x0e, 0xdd}, /* LLC/PIX/SPI PINS TRISTATED AUD */ |
| 385 | 426 | ||
| 386 | {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */ | ||
| 387 | {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */ | ||
| 388 | {ADV748X_PAGE_TXA, 0xdb, 0x10}, /* ADI Required Write */ | ||
| 389 | {ADV748X_PAGE_TXA, 0xd6, 0x07}, /* ADI Required Write */ | ||
| 390 | {ADV748X_PAGE_TXA, 0xc4, 0x0a}, /* ADI Required Write */ | ||
| 391 | {ADV748X_PAGE_TXA, 0x71, 0x33}, /* ADI Required Write */ | ||
| 392 | {ADV748X_PAGE_TXA, 0x72, 0x11}, /* ADI Required Write */ | ||
| 393 | {ADV748X_PAGE_TXA, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */ | ||
| 394 | |||
| 395 | {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */ | ||
| 396 | {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */ | ||
| 397 | {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ | ||
| 398 | {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ | ||
| 399 | {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */ | ||
| 400 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 401 | {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */ | ||
| 402 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 403 | {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */ | ||
| 404 | |||
| 405 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ | 427 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ |
| 406 | }; | 428 | }; |
| 407 | 429 | ||
| 408 | /* 02-01 Analog CVBS to MIPI TX-B CSI 1-Lane - */ | 430 | /* Initialize AFE core with YUV8 format. */ |
| 409 | /* Autodetect CVBS Single Ended In Ain 1 - MIPI Out */ | 431 | static const struct adv748x_reg_value adv748x_init_afe[] = { |
| 410 | static const struct adv748x_reg_value adv748x_init_txb_1lane[] = { | ||
| 411 | |||
| 412 | {ADV748X_PAGE_IO, 0x00, 0x30}, /* Disable chip powerdown Rx */ | 432 | {ADV748X_PAGE_IO, 0x00, 0x30}, /* Disable chip powerdown Rx */ |
| 413 | {ADV748X_PAGE_IO, 0xf2, 0x01}, /* Enable I2C Read Auto-Increment */ | 433 | {ADV748X_PAGE_IO, 0xf2, 0x01}, /* Enable I2C Read Auto-Increment */ |
| 414 | 434 | ||
| @@ -435,33 +455,36 @@ static const struct adv748x_reg_value adv748x_init_txb_1lane[] = { | |||
| 435 | {ADV748X_PAGE_SDP, 0x31, 0x12}, /* ADI Required Write */ | 455 | {ADV748X_PAGE_SDP, 0x31, 0x12}, /* ADI Required Write */ |
| 436 | {ADV748X_PAGE_SDP, 0xe6, 0x4f}, /* V bit end pos manually in NTSC */ | 456 | {ADV748X_PAGE_SDP, 0xe6, 0x4f}, /* V bit end pos manually in NTSC */ |
| 437 | 457 | ||
| 438 | {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */ | ||
| 439 | {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */ | ||
| 440 | {ADV748X_PAGE_TXB, 0xd2, 0x40}, /* ADI Required Write */ | ||
| 441 | {ADV748X_PAGE_TXB, 0xc4, 0x0a}, /* ADI Required Write */ | ||
| 442 | {ADV748X_PAGE_TXB, 0x71, 0x33}, /* ADI Required Write */ | ||
| 443 | {ADV748X_PAGE_TXB, 0x72, 0x11}, /* ADI Required Write */ | ||
| 444 | {ADV748X_PAGE_TXB, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */ | ||
| 445 | {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */ | ||
| 446 | {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */ | ||
| 447 | {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */ | ||
| 448 | |||
| 449 | {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */ | ||
| 450 | {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */ | ||
| 451 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 452 | {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */ | ||
| 453 | {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */ | ||
| 454 | {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */ | ||
| 455 | |||
| 456 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ | 458 | {ADV748X_PAGE_EOR, 0xff, 0xff} /* End of register table */ |
| 457 | }; | 459 | }; |
| 458 | 460 | ||
| 461 | static int adv748x_sw_reset(struct adv748x_state *state) | ||
| 462 | { | ||
| 463 | int ret; | ||
| 464 | |||
| 465 | ret = io_write(state, ADV748X_IO_REG_FF, ADV748X_IO_REG_FF_MAIN_RESET); | ||
| 466 | if (ret) | ||
| 467 | return ret; | ||
| 468 | |||
| 469 | usleep_range(5000, 6000); | ||
| 470 | |||
| 471 | /* Disable CEC Wakeup from power-down mode */ | ||
| 472 | ret = io_clrset(state, ADV748X_IO_REG_01, ADV748X_IO_REG_01_PWRDN_MASK, | ||
| 473 | ADV748X_IO_REG_01_PWRDNB); | ||
| 474 | if (ret) | ||
| 475 | return ret; | ||
| 476 | |||
| 477 | /* Enable I2C Read Auto-Increment for consecutive reads */ | ||
| 478 | return io_write(state, ADV748X_IO_REG_F2, | ||
| 479 | ADV748X_IO_REG_F2_READ_AUTO_INC); | ||
| 480 | } | ||
| 481 | |||
| 459 | static int adv748x_reset(struct adv748x_state *state) | 482 | static int adv748x_reset(struct adv748x_state *state) |
| 460 | { | 483 | { |
| 461 | int ret; | 484 | int ret; |
| 462 | u8 regval = 0; | 485 | u8 regval = 0; |
| 463 | 486 | ||
| 464 | ret = adv748x_write_regs(state, adv748x_sw_reset); | 487 | ret = adv748x_sw_reset(state); |
| 465 | if (ret < 0) | 488 | if (ret < 0) |
| 466 | return ret; | 489 | return ret; |
| 467 | 490 | ||
| @@ -469,18 +492,19 @@ static int adv748x_reset(struct adv748x_state *state) | |||
| 469 | if (ret < 0) | 492 | if (ret < 0) |
| 470 | return ret; | 493 | return ret; |
| 471 | 494 | ||
| 472 | /* Init and power down TXA */ | 495 | /* Initialize CP and AFE cores. */ |
| 473 | ret = adv748x_write_regs(state, adv748x_init_txa_4lane); | 496 | ret = adv748x_write_regs(state, adv748x_init_hdmi); |
| 474 | if (ret) | 497 | if (ret) |
| 475 | return ret; | 498 | return ret; |
| 476 | 499 | ||
| 477 | adv748x_tx_power(&state->txa, 0); | 500 | ret = adv748x_write_regs(state, adv748x_init_afe); |
| 478 | |||
| 479 | /* Init and power down TXB */ | ||
| 480 | ret = adv748x_write_regs(state, adv748x_init_txb_1lane); | ||
| 481 | if (ret) | 501 | if (ret) |
| 482 | return ret; | 502 | return ret; |
| 483 | 503 | ||
| 504 | /* Reset TXA and TXB */ | ||
| 505 | adv748x_tx_power(&state->txa, 1); | ||
| 506 | adv748x_tx_power(&state->txa, 0); | ||
| 507 | adv748x_tx_power(&state->txb, 1); | ||
| 484 | adv748x_tx_power(&state->txb, 0); | 508 | adv748x_tx_power(&state->txb, 0); |
| 485 | 509 | ||
| 486 | /* Disable chip powerdown & Enable HDMI Rx block */ | 510 | /* Disable chip powerdown & Enable HDMI Rx block */ |
| @@ -542,7 +566,51 @@ void adv748x_subdev_init(struct v4l2_subdev *sd, struct adv748x_state *state, | |||
| 542 | state->client->addr, ident); | 566 | state->client->addr, ident); |
| 543 | 567 | ||
| 544 | sd->entity.function = function; | 568 | sd->entity.function = function; |
| 545 | sd->entity.ops = &adv748x_media_ops; | 569 | sd->entity.ops = is_tx(adv748x_sd_to_csi2(sd)) ? |
| 570 | &adv748x_tx_media_ops : &adv748x_media_ops; | ||
| 571 | } | ||
| 572 | |||
| 573 | static int adv748x_parse_csi2_lanes(struct adv748x_state *state, | ||
| 574 | unsigned int port, | ||
| 575 | struct device_node *ep) | ||
| 576 | { | ||
| 577 | struct v4l2_fwnode_endpoint vep; | ||
| 578 | unsigned int num_lanes; | ||
| 579 | int ret; | ||
| 580 | |||
| 581 | if (port != ADV748X_PORT_TXA && port != ADV748X_PORT_TXB) | ||
| 582 | return 0; | ||
| 583 | |||
| 584 | vep.bus_type = V4L2_MBUS_CSI2_DPHY; | ||
| 585 | ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &vep); | ||
| 586 | if (ret) | ||
| 587 | return ret; | ||
| 588 | |||
| 589 | num_lanes = vep.bus.mipi_csi2.num_data_lanes; | ||
| 590 | |||
| 591 | if (vep.base.port == ADV748X_PORT_TXA) { | ||
| 592 | if (num_lanes != 1 && num_lanes != 2 && num_lanes != 4) { | ||
| 593 | adv_err(state, "TXA: Invalid number (%u) of lanes\n", | ||
| 594 | num_lanes); | ||
| 595 | return -EINVAL; | ||
| 596 | } | ||
| 597 | |||
| 598 | state->txa.num_lanes = num_lanes; | ||
| 599 | adv_dbg(state, "TXA: using %u lanes\n", state->txa.num_lanes); | ||
| 600 | } | ||
| 601 | |||
| 602 | if (vep.base.port == ADV748X_PORT_TXB) { | ||
| 603 | if (num_lanes != 1) { | ||
| 604 | adv_err(state, "TXB: Invalid number (%u) of lanes\n", | ||
| 605 | num_lanes); | ||
| 606 | return -EINVAL; | ||
| 607 | } | ||
| 608 | |||
| 609 | state->txb.num_lanes = num_lanes; | ||
| 610 | adv_dbg(state, "TXB: using %u lanes\n", state->txb.num_lanes); | ||
| 611 | } | ||
| 612 | |||
| 613 | return 0; | ||
| 546 | } | 614 | } |
| 547 | 615 | ||
| 548 | static int adv748x_parse_dt(struct adv748x_state *state) | 616 | static int adv748x_parse_dt(struct adv748x_state *state) |
| @@ -551,6 +619,7 @@ static int adv748x_parse_dt(struct adv748x_state *state) | |||
| 551 | struct of_endpoint ep; | 619 | struct of_endpoint ep; |
| 552 | bool out_found = false; | 620 | bool out_found = false; |
| 553 | bool in_found = false; | 621 | bool in_found = false; |
| 622 | int ret; | ||
| 554 | 623 | ||
| 555 | for_each_endpoint_of_node(state->dev->of_node, ep_np) { | 624 | for_each_endpoint_of_node(state->dev->of_node, ep_np) { |
| 556 | of_graph_parse_endpoint(ep_np, &ep); | 625 | of_graph_parse_endpoint(ep_np, &ep); |
| @@ -581,6 +650,11 @@ static int adv748x_parse_dt(struct adv748x_state *state) | |||
| 581 | in_found = true; | 650 | in_found = true; |
| 582 | else | 651 | else |
| 583 | out_found = true; | 652 | out_found = true; |
| 653 | |||
| 654 | /* Store number of CSI-2 lanes used for TXA and TXB. */ | ||
| 655 | ret = adv748x_parse_csi2_lanes(state, ep.port, ep_np); | ||
| 656 | if (ret) | ||
| 657 | return ret; | ||
| 584 | } | 658 | } |
| 585 | 659 | ||
| 586 | return in_found && out_found ? 0 : -ENODEV; | 660 | return in_found && out_found ? 0 : -ENODEV; |
| @@ -604,7 +678,7 @@ static int adv748x_probe(struct i2c_client *client, | |||
| 604 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | 678 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) |
| 605 | return -EIO; | 679 | return -EIO; |
| 606 | 680 | ||
| 607 | state = kzalloc(sizeof(struct adv748x_state), GFP_KERNEL); | 681 | state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL); |
| 608 | if (!state) | 682 | if (!state) |
| 609 | return -ENOMEM; | 683 | return -ENOMEM; |
| 610 | 684 | ||
| @@ -702,7 +776,6 @@ err_cleanup_dt: | |||
| 702 | adv748x_dt_cleanup(state); | 776 | adv748x_dt_cleanup(state); |
| 703 | err_free_mutex: | 777 | err_free_mutex: |
| 704 | mutex_destroy(&state->mutex); | 778 | mutex_destroy(&state->mutex); |
| 705 | kfree(state); | ||
| 706 | 779 | ||
| 707 | return ret; | 780 | return ret; |
| 708 | } | 781 | } |
| @@ -721,8 +794,6 @@ static int adv748x_remove(struct i2c_client *client) | |||
| 721 | adv748x_dt_cleanup(state); | 794 | adv748x_dt_cleanup(state); |
| 722 | mutex_destroy(&state->mutex); | 795 | mutex_destroy(&state->mutex); |
| 723 | 796 | ||
| 724 | kfree(state); | ||
| 725 | |||
| 726 | return 0; | 797 | return 0; |
| 727 | } | 798 | } |
| 728 | 799 | ||
diff --git a/drivers/media/i2c/adv748x/adv748x-csi2.c b/drivers/media/i2c/adv748x/adv748x-csi2.c index 6ce21542ed48..2091cda50935 100644 --- a/drivers/media/i2c/adv748x/adv748x-csi2.c +++ b/drivers/media/i2c/adv748x/adv748x-csi2.c | |||
| @@ -27,6 +27,7 @@ static int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, | |||
| 27 | * @v4l2_dev: Video registration device | 27 | * @v4l2_dev: Video registration device |
| 28 | * @src: Source subdevice to establish link | 28 | * @src: Source subdevice to establish link |
| 29 | * @src_pad: Pad number of source to link to this @tx | 29 | * @src_pad: Pad number of source to link to this @tx |
| 30 | * @enable: Link enabled flag | ||
| 30 | * | 31 | * |
| 31 | * Ensure that the subdevice is registered against the v4l2_device, and link the | 32 | * Ensure that the subdevice is registered against the v4l2_device, and link the |
| 32 | * source pad to the sink pad of the CSI2 bus entity. | 33 | * source pad to the sink pad of the CSI2 bus entity. |
| @@ -34,26 +35,27 @@ static int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, | |||
| 34 | static int adv748x_csi2_register_link(struct adv748x_csi2 *tx, | 35 | static int adv748x_csi2_register_link(struct adv748x_csi2 *tx, |
| 35 | struct v4l2_device *v4l2_dev, | 36 | struct v4l2_device *v4l2_dev, |
| 36 | struct v4l2_subdev *src, | 37 | struct v4l2_subdev *src, |
| 37 | unsigned int src_pad) | 38 | unsigned int src_pad, |
| 39 | bool enable) | ||
| 38 | { | 40 | { |
| 39 | int enabled = MEDIA_LNK_FL_ENABLED; | ||
| 40 | int ret; | 41 | int ret; |
| 41 | 42 | ||
| 42 | /* | ||
| 43 | * Dynamic linking of the AFE is not supported. | ||
| 44 | * Register the links as immutable. | ||
| 45 | */ | ||
| 46 | enabled |= MEDIA_LNK_FL_IMMUTABLE; | ||
| 47 | |||
| 48 | if (!src->v4l2_dev) { | 43 | if (!src->v4l2_dev) { |
| 49 | ret = v4l2_device_register_subdev(v4l2_dev, src); | 44 | ret = v4l2_device_register_subdev(v4l2_dev, src); |
| 50 | if (ret) | 45 | if (ret) |
| 51 | return ret; | 46 | return ret; |
| 52 | } | 47 | } |
| 53 | 48 | ||
| 54 | return media_create_pad_link(&src->entity, src_pad, | 49 | ret = media_create_pad_link(&src->entity, src_pad, |
| 55 | &tx->sd.entity, ADV748X_CSI2_SINK, | 50 | &tx->sd.entity, ADV748X_CSI2_SINK, |
| 56 | enabled); | 51 | enable ? MEDIA_LNK_FL_ENABLED : 0); |
| 52 | if (ret) | ||
| 53 | return ret; | ||
| 54 | |||
| 55 | if (enable) | ||
| 56 | tx->src = src; | ||
| 57 | |||
| 58 | return 0; | ||
| 57 | } | 59 | } |
| 58 | 60 | ||
| 59 | /* ----------------------------------------------------------------------------- | 61 | /* ----------------------------------------------------------------------------- |
| @@ -68,24 +70,42 @@ static int adv748x_csi2_registered(struct v4l2_subdev *sd) | |||
| 68 | { | 70 | { |
| 69 | struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd); | 71 | struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd); |
| 70 | struct adv748x_state *state = tx->state; | 72 | struct adv748x_state *state = tx->state; |
| 73 | int ret; | ||
| 71 | 74 | ||
| 72 | adv_dbg(state, "Registered %s (%s)", is_txa(tx) ? "TXA":"TXB", | 75 | adv_dbg(state, "Registered %s (%s)", is_txa(tx) ? "TXA":"TXB", |
| 73 | sd->name); | 76 | sd->name); |
| 74 | 77 | ||
| 75 | /* | 78 | /* |
| 76 | * The adv748x hardware allows the AFE to route through the TXA, however | 79 | * Link TXA to AFE and HDMI, and TXB to AFE only as TXB cannot output |
| 77 | * this is not currently supported in this driver. | 80 | * HDMI. |
| 78 | * | 81 | * |
| 79 | * Link HDMI->TXA, and AFE->TXB directly. | 82 | * The HDMI->TXA link is enabled by default, as is the AFE->TXB one. |
| 80 | */ | 83 | */ |
| 81 | if (is_txa(tx) && is_hdmi_enabled(state)) | 84 | if (is_afe_enabled(state)) { |
| 82 | return adv748x_csi2_register_link(tx, sd->v4l2_dev, | 85 | ret = adv748x_csi2_register_link(tx, sd->v4l2_dev, |
| 83 | &state->hdmi.sd, | 86 | &state->afe.sd, |
| 84 | ADV748X_HDMI_SOURCE); | 87 | ADV748X_AFE_SOURCE, |
| 85 | if (!is_txa(tx) && is_afe_enabled(state)) | 88 | is_txb(tx)); |
| 86 | return adv748x_csi2_register_link(tx, sd->v4l2_dev, | 89 | if (ret) |
| 87 | &state->afe.sd, | 90 | return ret; |
| 88 | ADV748X_AFE_SOURCE); | 91 | |
| 92 | /* TXB can output AFE signals only. */ | ||
| 93 | if (is_txb(tx)) | ||
| 94 | state->afe.tx = tx; | ||
| 95 | } | ||
| 96 | |||
| 97 | /* Register link to HDMI for TXA only. */ | ||
| 98 | if (is_txb(tx) || !is_hdmi_enabled(state)) | ||
| 99 | return 0; | ||
| 100 | |||
| 101 | ret = adv748x_csi2_register_link(tx, sd->v4l2_dev, &state->hdmi.sd, | ||
| 102 | ADV748X_HDMI_SOURCE, true); | ||
| 103 | if (ret) | ||
| 104 | return ret; | ||
| 105 | |||
| 106 | /* The default HDMI output is TXA. */ | ||
| 107 | state->hdmi.tx = tx; | ||
| 108 | |||
| 89 | return 0; | 109 | return 0; |
| 90 | } | 110 | } |
| 91 | 111 | ||
diff --git a/drivers/media/i2c/adv748x/adv748x-hdmi.c b/drivers/media/i2c/adv748x/adv748x-hdmi.c index 35d027941482..c557f8fdf11a 100644 --- a/drivers/media/i2c/adv748x/adv748x-hdmi.c +++ b/drivers/media/i2c/adv748x/adv748x-hdmi.c | |||
| @@ -358,7 +358,7 @@ static int adv748x_hdmi_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 358 | 358 | ||
| 359 | mutex_lock(&state->mutex); | 359 | mutex_lock(&state->mutex); |
| 360 | 360 | ||
| 361 | ret = adv748x_tx_power(&state->txa, enable); | 361 | ret = adv748x_tx_power(hdmi->tx, enable); |
| 362 | if (ret) | 362 | if (ret) |
| 363 | goto done; | 363 | goto done; |
| 364 | 364 | ||
diff --git a/drivers/media/i2c/adv748x/adv748x.h b/drivers/media/i2c/adv748x/adv748x.h index 39c2fdc3b416..5042f9e94aee 100644 --- a/drivers/media/i2c/adv748x/adv748x.h +++ b/drivers/media/i2c/adv748x/adv748x.h | |||
| @@ -39,7 +39,6 @@ enum adv748x_page { | |||
| 39 | ADV748X_PAGE_MAX, | 39 | ADV748X_PAGE_MAX, |
| 40 | 40 | ||
| 41 | /* Fake pages for register sequences */ | 41 | /* Fake pages for register sequences */ |
| 42 | ADV748X_PAGE_WAIT, /* Wait x msec */ | ||
| 43 | ADV748X_PAGE_EOR, /* End Mark */ | 42 | ADV748X_PAGE_EOR, /* End Mark */ |
| 44 | }; | 43 | }; |
| 45 | 44 | ||
| @@ -79,17 +78,23 @@ struct adv748x_csi2 { | |||
| 79 | struct v4l2_mbus_framefmt format; | 78 | struct v4l2_mbus_framefmt format; |
| 80 | unsigned int page; | 79 | unsigned int page; |
| 81 | unsigned int port; | 80 | unsigned int port; |
| 81 | unsigned int num_lanes; | ||
| 82 | 82 | ||
| 83 | struct media_pad pads[ADV748X_CSI2_NR_PADS]; | 83 | struct media_pad pads[ADV748X_CSI2_NR_PADS]; |
| 84 | struct v4l2_ctrl_handler ctrl_hdl; | 84 | struct v4l2_ctrl_handler ctrl_hdl; |
| 85 | struct v4l2_ctrl *pixel_rate; | 85 | struct v4l2_ctrl *pixel_rate; |
| 86 | struct v4l2_subdev *src; | ||
| 86 | struct v4l2_subdev sd; | 87 | struct v4l2_subdev sd; |
| 87 | }; | 88 | }; |
| 88 | 89 | ||
| 89 | #define notifier_to_csi2(n) container_of(n, struct adv748x_csi2, notifier) | 90 | #define notifier_to_csi2(n) container_of(n, struct adv748x_csi2, notifier) |
| 90 | #define adv748x_sd_to_csi2(sd) container_of(sd, struct adv748x_csi2, sd) | 91 | #define adv748x_sd_to_csi2(sd) container_of(sd, struct adv748x_csi2, sd) |
| 92 | |||
| 91 | #define is_tx_enabled(_tx) ((_tx)->state->endpoints[(_tx)->port] != NULL) | 93 | #define is_tx_enabled(_tx) ((_tx)->state->endpoints[(_tx)->port] != NULL) |
| 92 | #define is_txa(_tx) ((_tx) == &(_tx)->state->txa) | 94 | #define is_txa(_tx) ((_tx) == &(_tx)->state->txa) |
| 95 | #define is_txb(_tx) ((_tx) == &(_tx)->state->txb) | ||
| 96 | #define is_tx(_tx) (is_txa(_tx) || is_txb(_tx)) | ||
| 97 | |||
| 93 | #define is_afe_enabled(_state) \ | 98 | #define is_afe_enabled(_state) \ |
| 94 | ((_state)->endpoints[ADV748X_PORT_AIN0] != NULL || \ | 99 | ((_state)->endpoints[ADV748X_PORT_AIN0] != NULL || \ |
| 95 | (_state)->endpoints[ADV748X_PORT_AIN1] != NULL || \ | 100 | (_state)->endpoints[ADV748X_PORT_AIN1] != NULL || \ |
| @@ -116,6 +121,8 @@ struct adv748x_hdmi { | |||
| 116 | struct v4l2_dv_timings timings; | 121 | struct v4l2_dv_timings timings; |
| 117 | struct v4l2_fract aspect_ratio; | 122 | struct v4l2_fract aspect_ratio; |
| 118 | 123 | ||
| 124 | struct adv748x_csi2 *tx; | ||
| 125 | |||
| 119 | struct { | 126 | struct { |
| 120 | u8 edid[512]; | 127 | u8 edid[512]; |
| 121 | u32 present; | 128 | u32 present; |
| @@ -146,6 +153,8 @@ struct adv748x_afe { | |||
| 146 | struct v4l2_subdev sd; | 153 | struct v4l2_subdev sd; |
| 147 | struct v4l2_mbus_framefmt format; | 154 | struct v4l2_mbus_framefmt format; |
| 148 | 155 | ||
| 156 | struct adv748x_csi2 *tx; | ||
| 157 | |||
| 149 | bool streaming; | 158 | bool streaming; |
| 150 | v4l2_std_id curr_norm; | 159 | v4l2_std_id curr_norm; |
| 151 | unsigned int input; | 160 | unsigned int input; |
| @@ -201,6 +210,11 @@ struct adv748x_state { | |||
| 201 | #define ADV748X_IO_PD 0x00 /* power down controls */ | 210 | #define ADV748X_IO_PD 0x00 /* power down controls */ |
| 202 | #define ADV748X_IO_PD_RX_EN BIT(6) | 211 | #define ADV748X_IO_PD_RX_EN BIT(6) |
| 203 | 212 | ||
| 213 | #define ADV748X_IO_REG_01 0x01 /* pwrdn{2}b, prog_xtal_freq */ | ||
| 214 | #define ADV748X_IO_REG_01_PWRDN_MASK (BIT(7) | BIT(6)) | ||
| 215 | #define ADV748X_IO_REG_01_PWRDN2B BIT(7) /* CEC Wakeup Support */ | ||
| 216 | #define ADV748X_IO_REG_01_PWRDNB BIT(6) /* CEC Wakeup Support */ | ||
| 217 | |||
| 204 | #define ADV748X_IO_REG_04 0x04 | 218 | #define ADV748X_IO_REG_04 0x04 |
| 205 | #define ADV748X_IO_REG_04_FORCE_FR BIT(0) /* Force CP free-run */ | 219 | #define ADV748X_IO_REG_04_FORCE_FR BIT(0) /* Force CP free-run */ |
| 206 | 220 | ||
| @@ -214,12 +228,24 @@ struct adv748x_state { | |||
| 214 | #define ADV748X_IO_10_CSI4_EN BIT(7) | 228 | #define ADV748X_IO_10_CSI4_EN BIT(7) |
| 215 | #define ADV748X_IO_10_CSI1_EN BIT(6) | 229 | #define ADV748X_IO_10_CSI1_EN BIT(6) |
| 216 | #define ADV748X_IO_10_PIX_OUT_EN BIT(5) | 230 | #define ADV748X_IO_10_PIX_OUT_EN BIT(5) |
| 231 | #define ADV748X_IO_10_CSI4_IN_SEL_AFE BIT(3) | ||
| 217 | 232 | ||
| 218 | #define ADV748X_IO_CHIP_REV_ID_1 0xdf | 233 | #define ADV748X_IO_CHIP_REV_ID_1 0xdf |
| 219 | #define ADV748X_IO_CHIP_REV_ID_2 0xe0 | 234 | #define ADV748X_IO_CHIP_REV_ID_2 0xe0 |
| 220 | 235 | ||
| 236 | #define ADV748X_IO_REG_F2 0xf2 | ||
| 237 | #define ADV748X_IO_REG_F2_READ_AUTO_INC BIT(0) | ||
| 238 | |||
| 239 | /* For PAGE slave address offsets */ | ||
| 221 | #define ADV748X_IO_SLAVE_ADDR_BASE 0xf2 | 240 | #define ADV748X_IO_SLAVE_ADDR_BASE 0xf2 |
| 222 | 241 | ||
| 242 | /* | ||
| 243 | * The ADV748x_Recommended_Settings_PrA_2014-08-20.pdf details both 0x80 and | ||
| 244 | * 0xff as examples for performing a software reset. | ||
| 245 | */ | ||
| 246 | #define ADV748X_IO_REG_FF 0xff | ||
| 247 | #define ADV748X_IO_REG_FF_MAIN_RESET 0xff | ||
| 248 | |||
| 223 | /* HDMI RX Map */ | 249 | /* HDMI RX Map */ |
| 224 | #define ADV748X_HDMI_LW1 0x07 /* line width_1 */ | 250 | #define ADV748X_HDMI_LW1 0x07 /* line width_1 */ |
| 225 | #define ADV748X_HDMI_LW1_VERT_FILTER BIT(7) | 251 | #define ADV748X_HDMI_LW1_VERT_FILTER BIT(7) |
diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index 989259488e3d..11ab2df02dc7 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c | |||
| @@ -3102,11 +3102,11 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd) | |||
| 3102 | 3102 | ||
| 3103 | io_write(sd, 0x00, 0x01); /* Program SDP 4x1 */ | 3103 | io_write(sd, 0x00, 0x01); /* Program SDP 4x1 */ |
| 3104 | io_write(sd, 0x01, 0x00); /* Program SDP mode */ | 3104 | io_write(sd, 0x01, 0x00); /* Program SDP mode */ |
| 3105 | afe_write(sd, 0x80, 0x92); /* SDP Recommeneded Write */ | 3105 | afe_write(sd, 0x80, 0x92); /* SDP Recommended Write */ |
| 3106 | afe_write(sd, 0x9B, 0x01); /* SDP Recommeneded Write ADV7844ES1 */ | 3106 | afe_write(sd, 0x9B, 0x01); /* SDP Recommended Write ADV7844ES1 */ |
| 3107 | afe_write(sd, 0x9C, 0x60); /* SDP Recommeneded Write ADV7844ES1 */ | 3107 | afe_write(sd, 0x9C, 0x60); /* SDP Recommended Write ADV7844ES1 */ |
| 3108 | afe_write(sd, 0x9E, 0x02); /* SDP Recommeneded Write ADV7844ES1 */ | 3108 | afe_write(sd, 0x9E, 0x02); /* SDP Recommended Write ADV7844ES1 */ |
| 3109 | afe_write(sd, 0xA0, 0x0B); /* SDP Recommeneded Write ADV7844ES1 */ | 3109 | afe_write(sd, 0xA0, 0x0B); /* SDP Recommended Write ADV7844ES1 */ |
| 3110 | afe_write(sd, 0xC3, 0x02); /* Memory BIST Initialisation */ | 3110 | afe_write(sd, 0xC3, 0x02); /* Memory BIST Initialisation */ |
| 3111 | io_write(sd, 0x0C, 0x40); /* Power up ADV7844 */ | 3111 | io_write(sd, 0x0C, 0x40); /* Power up ADV7844 */ |
| 3112 | io_write(sd, 0x15, 0xBA); /* Enable outputs */ | 3112 | io_write(sd, 0x15, 0xBA); /* Enable outputs */ |
diff --git a/drivers/media/i2c/bt819.c b/drivers/media/i2c/bt819.c index 472e37637c8d..e6d3fe7790bc 100644 --- a/drivers/media/i2c/bt819.c +++ b/drivers/media/i2c/bt819.c | |||
| @@ -164,12 +164,12 @@ static int bt819_init(struct v4l2_subdev *sd) | |||
| 164 | 0x0e, 0xb4, /* 0x0e Chroma Gain (V) msb */ | 164 | 0x0e, 0xb4, /* 0x0e Chroma Gain (V) msb */ |
| 165 | 0x0f, 0x00, /* 0x0f Hue control */ | 165 | 0x0f, 0x00, /* 0x0f Hue control */ |
| 166 | 0x12, 0x04, /* 0x12 Output Format */ | 166 | 0x12, 0x04, /* 0x12 Output Format */ |
| 167 | 0x13, 0x20, /* 0x13 Vertial Scaling msb 0x00 | 167 | 0x13, 0x20, /* 0x13 Vertical Scaling msb 0x00 |
| 168 | chroma comb OFF, line drop scaling, interlace scaling | 168 | chroma comb OFF, line drop scaling, interlace scaling |
| 169 | BUG? Why does turning the chroma comb on fuck up color? | 169 | BUG? Why does turning the chroma comb on fuck up color? |
| 170 | Bug in the bt819 stepping on my board? | 170 | Bug in the bt819 stepping on my board? |
| 171 | */ | 171 | */ |
| 172 | 0x14, 0x00, /* 0x14 Vertial Scaling lsb */ | 172 | 0x14, 0x00, /* 0x14 Vertical Scaling lsb */ |
| 173 | 0x16, 0x07, /* 0x16 Video Timing Polarity | 173 | 0x16, 0x07, /* 0x16 Video Timing Polarity |
| 174 | ACTIVE=active low | 174 | ACTIVE=active low |
| 175 | FIELD: high=odd, | 175 | FIELD: high=odd, |
diff --git a/drivers/media/i2c/cx25840/cx25840-core.c b/drivers/media/i2c/cx25840/cx25840-core.c index b168bf3635b6..8b0b8b5aa531 100644 --- a/drivers/media/i2c/cx25840/cx25840-core.c +++ b/drivers/media/i2c/cx25840/cx25840-core.c | |||
| @@ -5216,8 +5216,9 @@ static int cx25840_probe(struct i2c_client *client, | |||
| 5216 | * those extra inputs. So, let's add it only when needed. | 5216 | * those extra inputs. So, let's add it only when needed. |
| 5217 | */ | 5217 | */ |
| 5218 | state->pads[CX25840_PAD_INPUT].flags = MEDIA_PAD_FL_SINK; | 5218 | state->pads[CX25840_PAD_INPUT].flags = MEDIA_PAD_FL_SINK; |
| 5219 | state->pads[CX25840_PAD_INPUT].sig_type = PAD_SIGNAL_ANALOG; | ||
| 5219 | state->pads[CX25840_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE; | 5220 | state->pads[CX25840_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE; |
| 5220 | state->pads[CX25840_PAD_VBI_OUT].flags = MEDIA_PAD_FL_SOURCE; | 5221 | state->pads[CX25840_PAD_VID_OUT].sig_type = PAD_SIGNAL_DV; |
| 5221 | sd->entity.function = MEDIA_ENT_F_ATV_DECODER; | 5222 | sd->entity.function = MEDIA_ENT_F_ATV_DECODER; |
| 5222 | 5223 | ||
| 5223 | ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(state->pads), | 5224 | ret = media_entity_pads_init(&sd->entity, ARRAY_SIZE(state->pads), |
diff --git a/drivers/media/i2c/cx25840/cx25840-core.h b/drivers/media/i2c/cx25840/cx25840-core.h index c323b1af1f83..e3ff1d7ec770 100644 --- a/drivers/media/i2c/cx25840/cx25840-core.h +++ b/drivers/media/i2c/cx25840/cx25840-core.h | |||
| @@ -40,7 +40,6 @@ enum cx25840_model { | |||
| 40 | enum cx25840_media_pads { | 40 | enum cx25840_media_pads { |
| 41 | CX25840_PAD_INPUT, | 41 | CX25840_PAD_INPUT, |
| 42 | CX25840_PAD_VID_OUT, | 42 | CX25840_PAD_VID_OUT, |
| 43 | CX25840_PAD_VBI_OUT, | ||
| 44 | 43 | ||
| 45 | CX25840_NUM_PADS | 44 | CX25840_NUM_PADS |
| 46 | }; | 45 | }; |
| @@ -67,7 +66,7 @@ enum cx25840_media_pads { | |||
| 67 | * @is_initialized: whether we have already loaded firmware into the chip | 66 | * @is_initialized: whether we have already loaded firmware into the chip |
| 68 | * and initialized it | 67 | * and initialized it |
| 69 | * @vbi_regs_offset: offset of vbi regs | 68 | * @vbi_regs_offset: offset of vbi regs |
| 70 | * @fw_wait: wait queue to wake an initalization function up when | 69 | * @fw_wait: wait queue to wake an initialization function up when |
| 71 | * firmware loading (on a separate workqueue) finishes | 70 | * firmware loading (on a separate workqueue) finishes |
| 72 | * @fw_work: a work that actually loads the firmware on a separate | 71 | * @fw_work: a work that actually loads the firmware on a separate |
| 73 | * workqueue | 72 | * workqueue |
diff --git a/drivers/media/i2c/cx25840/cx25840-ir.c b/drivers/media/i2c/cx25840/cx25840-ir.c index 69cdc09981af..a266118cd7ca 100644 --- a/drivers/media/i2c/cx25840/cx25840-ir.c +++ b/drivers/media/i2c/cx25840/cx25840-ir.c | |||
| @@ -549,7 +549,7 @@ int cx25840_ir_irq_handler(struct v4l2_subdev *sd, u32 status, bool *handled) | |||
| 549 | ror = stats & STATS_ROR; /* Rx FIFO Over Run */ | 549 | ror = stats & STATS_ROR; /* Rx FIFO Over Run */ |
| 550 | 550 | ||
| 551 | tse = irqen & IRQEN_TSE; /* Tx FIFO Service Request IRQ Enable */ | 551 | tse = irqen & IRQEN_TSE; /* Tx FIFO Service Request IRQ Enable */ |
| 552 | rse = irqen & IRQEN_RSE; /* Rx FIFO Service Reuqest IRQ Enable */ | 552 | rse = irqen & IRQEN_RSE; /* Rx FIFO Service Request IRQ Enable */ |
| 553 | rte = irqen & IRQEN_RTE; /* Rx Pulse Width Timer Time Out IRQ Enable */ | 553 | rte = irqen & IRQEN_RTE; /* Rx Pulse Width Timer Time Out IRQ Enable */ |
| 554 | roe = irqen & IRQEN_ROE; /* Rx FIFO Over Run IRQ Enable */ | 554 | roe = irqen & IRQEN_ROE; /* Rx FIFO Over Run IRQ Enable */ |
| 555 | 555 | ||
| @@ -638,7 +638,7 @@ int cx25840_ir_irq_handler(struct v4l2_subdev *sd, u32 status, bool *handled) | |||
| 638 | events |= V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED; | 638 | events |= V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED; |
| 639 | } | 639 | } |
| 640 | if (v) { | 640 | if (v) { |
| 641 | /* Clear STATS_ROR & STATS_RTO as needed by reseting hardware */ | 641 | /* Clear STATS_ROR & STATS_RTO as needed by resetting hardware */ |
| 642 | cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl & ~v); | 642 | cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl & ~v); |
| 643 | cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl); | 643 | cx25840_write4(c, CX25840_IR_CNTRL_REG, cntrl); |
| 644 | *handled = true; | 644 | *handled = true; |
diff --git a/drivers/media/i2c/dw9714.c b/drivers/media/i2c/dw9714.c index 26d83693a681..3f0b082f863f 100644 --- a/drivers/media/i2c/dw9714.c +++ b/drivers/media/i2c/dw9714.c | |||
| @@ -267,7 +267,7 @@ static struct i2c_driver dw9714_i2c_driver = { | |||
| 267 | module_i2c_driver(dw9714_i2c_driver); | 267 | module_i2c_driver(dw9714_i2c_driver); |
| 268 | 268 | ||
| 269 | MODULE_AUTHOR("Tianshu Qiu <tian.shu.qiu@intel.com>"); | 269 | MODULE_AUTHOR("Tianshu Qiu <tian.shu.qiu@intel.com>"); |
| 270 | MODULE_AUTHOR("Jian Xu Zheng <jian.xu.zheng@intel.com>"); | 270 | MODULE_AUTHOR("Jian Xu Zheng"); |
| 271 | MODULE_AUTHOR("Yuning Pu <yuning.pu@intel.com>"); | 271 | MODULE_AUTHOR("Yuning Pu <yuning.pu@intel.com>"); |
| 272 | MODULE_AUTHOR("Jouni Ukkonen <jouni.ukkonen@intel.com>"); | 272 | MODULE_AUTHOR("Jouni Ukkonen <jouni.ukkonen@intel.com>"); |
| 273 | MODULE_AUTHOR("Tommi Franttila <tommi.franttila@intel.com>"); | 273 | MODULE_AUTHOR("Tommi Franttila <tommi.franttila@intel.com>"); |
diff --git a/drivers/media/i2c/et8ek8/et8ek8_mode.c b/drivers/media/i2c/et8ek8/et8ek8_mode.c index a79882a83885..f503303cb8bc 100644 --- a/drivers/media/i2c/et8ek8/et8ek8_mode.c +++ b/drivers/media/i2c/et8ek8/et8ek8_mode.c | |||
| @@ -79,7 +79,7 @@ static struct et8ek8_reglist mode1_poweron_mode2_16vga_2592x1968_12_07fps = { | |||
| 79 | { ET8EK8_REG_8BIT, 0x1258, 0x00 }, | 79 | { ET8EK8_REG_8BIT, 0x1258, 0x00 }, |
| 80 | /* From parallel out to serial out */ | 80 | /* From parallel out to serial out */ |
| 81 | { ET8EK8_REG_8BIT, 0x125D, 0x88 }, | 81 | { ET8EK8_REG_8BIT, 0x125D, 0x88 }, |
| 82 | /* From w/ embeded data to w/o embeded data */ | 82 | /* From w/ embedded data to w/o embedded data */ |
| 83 | { ET8EK8_REG_8BIT, 0x125E, 0xC0 }, | 83 | { ET8EK8_REG_8BIT, 0x125E, 0xC0 }, |
| 84 | /* CCP2 out is from STOP to ACTIVE */ | 84 | /* CCP2 out is from STOP to ACTIVE */ |
| 85 | { ET8EK8_REG_8BIT, 0x1263, 0x98 }, | 85 | { ET8EK8_REG_8BIT, 0x1263, 0x98 }, |
diff --git a/drivers/media/i2c/imx214.c b/drivers/media/i2c/imx214.c index ec3d1b855f62..9857e151db46 100644 --- a/drivers/media/i2c/imx214.c +++ b/drivers/media/i2c/imx214.c | |||
| @@ -377,7 +377,7 @@ static const struct reg_8 mode_table_common[] = { | |||
| 377 | /* Moire reduction */ | 377 | /* Moire reduction */ |
| 378 | {0x6957, 0x01}, | 378 | {0x6957, 0x01}, |
| 379 | 379 | ||
| 380 | /* image enhancment */ | 380 | /* image enhancement */ |
| 381 | {0x6987, 0x17}, | 381 | {0x6987, 0x17}, |
| 382 | {0x698A, 0x03}, | 382 | {0x698A, 0x03}, |
| 383 | {0x698B, 0x03}, | 383 | {0x698B, 0x03}, |
diff --git a/drivers/media/i2c/imx274.c b/drivers/media/i2c/imx274.c index 5fac7fd32634..f3ff1af209f9 100644 --- a/drivers/media/i2c/imx274.c +++ b/drivers/media/i2c/imx274.c | |||
| @@ -207,8 +207,8 @@ static const char * const tp_qmenu[] = { | |||
| 207 | "Vertical Stripe (555h / 000h)", | 207 | "Vertical Stripe (555h / 000h)", |
| 208 | "Vertical Stripe (000h / FFFh)", | 208 | "Vertical Stripe (000h / FFFh)", |
| 209 | "Vertical Stripe (FFFh / 000h)", | 209 | "Vertical Stripe (FFFh / 000h)", |
| 210 | "Horizontal Color Bars", | ||
| 211 | "Vertical Color Bars", | 210 | "Vertical Color Bars", |
| 211 | "Horizontal Color Bars", | ||
| 212 | }; | 212 | }; |
| 213 | 213 | ||
| 214 | /* | 214 | /* |
| @@ -405,12 +405,12 @@ static const struct reg_8 imx274_start_2[] = { | |||
| 405 | */ | 405 | */ |
| 406 | static const struct reg_8 imx274_start_3[] = { | 406 | static const struct reg_8 imx274_start_3[] = { |
| 407 | {0x30F4, 0x00}, | 407 | {0x30F4, 0x00}, |
| 408 | {0x3018, 0xA2}, /* XHS VHS OUTUPT */ | 408 | {0x3018, 0xA2}, /* XHS VHS OUTPUT */ |
| 409 | {IMX274_TABLE_END, 0x00} | 409 | {IMX274_TABLE_END, 0x00} |
| 410 | }; | 410 | }; |
| 411 | 411 | ||
| 412 | /* | 412 | /* |
| 413 | * imx274 register configuration for stoping stream | 413 | * imx274 register configuration for stopping stream |
| 414 | */ | 414 | */ |
| 415 | static const struct reg_8 imx274_stop[] = { | 415 | static const struct reg_8 imx274_stop[] = { |
| 416 | {IMX274_STANDBY_REG, 0x01}, | 416 | {IMX274_STANDBY_REG, 0x01}, |
| @@ -617,24 +617,6 @@ static int imx274_write_table(struct stimx274 *priv, const struct reg_8 table[]) | |||
| 617 | return 0; | 617 | return 0; |
| 618 | } | 618 | } |
| 619 | 619 | ||
| 620 | static inline int imx274_read_reg(struct stimx274 *priv, u16 addr, u8 *val) | ||
| 621 | { | ||
| 622 | unsigned int uint_val; | ||
| 623 | int err; | ||
| 624 | |||
| 625 | err = regmap_read(priv->regmap, addr, &uint_val); | ||
| 626 | if (err) | ||
| 627 | dev_err(&priv->client->dev, | ||
| 628 | "%s : i2c read failed, addr = %x\n", __func__, addr); | ||
| 629 | else | ||
| 630 | dev_dbg(&priv->client->dev, | ||
| 631 | "%s : addr 0x%x, val=0x%x\n", __func__, | ||
| 632 | addr, uint_val); | ||
| 633 | |||
| 634 | *val = uint_val; | ||
| 635 | return err; | ||
| 636 | } | ||
| 637 | |||
| 638 | static inline int imx274_write_reg(struct stimx274 *priv, u16 addr, u8 val) | 620 | static inline int imx274_write_reg(struct stimx274 *priv, u16 addr, u8 val) |
| 639 | { | 621 | { |
| 640 | int err; | 622 | int err; |
diff --git a/drivers/media/i2c/lm3560.c b/drivers/media/i2c/lm3560.c index f122f03bd6b7..70c3294c21d3 100644 --- a/drivers/media/i2c/lm3560.c +++ b/drivers/media/i2c/lm3560.c | |||
| @@ -55,7 +55,7 @@ enum led_enable { | |||
| 55 | * @regmap: reg. map for i2c | 55 | * @regmap: reg. map for i2c |
| 56 | * @lock: muxtex for serial access. | 56 | * @lock: muxtex for serial access. |
| 57 | * @led_mode: V4L2 LED mode | 57 | * @led_mode: V4L2 LED mode |
| 58 | * @ctrls_led: V4L2 contols | 58 | * @ctrls_led: V4L2 controls |
| 59 | * @subdev_led: V4L2 subdev | 59 | * @subdev_led: V4L2 subdev |
| 60 | */ | 60 | */ |
| 61 | struct lm3560_flash { | 61 | struct lm3560_flash { |
diff --git a/drivers/media/i2c/lm3646.c b/drivers/media/i2c/lm3646.c index 12ef2653987b..73fbe3c37fc9 100644 --- a/drivers/media/i2c/lm3646.c +++ b/drivers/media/i2c/lm3646.c | |||
| @@ -62,7 +62,7 @@ enum led_mode { | |||
| 62 | * @regmap: reg. map for i2c | 62 | * @regmap: reg. map for i2c |
| 63 | * @lock: muxtex for serial access. | 63 | * @lock: muxtex for serial access. |
| 64 | * @led_mode: V4L2 LED mode | 64 | * @led_mode: V4L2 LED mode |
| 65 | * @ctrls_led: V4L2 contols | 65 | * @ctrls_led: V4L2 controls |
| 66 | * @subdev_led: V4L2 subdev | 66 | * @subdev_led: V4L2 subdev |
| 67 | * @mode_reg : mode register value | 67 | * @mode_reg : mode register value |
| 68 | */ | 68 | */ |
diff --git a/drivers/media/i2c/m5mols/m5mols.h b/drivers/media/i2c/m5mols/m5mols.h index 90a6c520f115..aef5b4f8904e 100644 --- a/drivers/media/i2c/m5mols/m5mols.h +++ b/drivers/media/i2c/m5mols/m5mols.h | |||
| @@ -253,7 +253,7 @@ struct m5mols_info { | |||
| 253 | * | 253 | * |
| 254 | * The I2C read operation of the M-5MOLS requires 2 messages. The first | 254 | * The I2C read operation of the M-5MOLS requires 2 messages. The first |
| 255 | * message sends the information about the command, command category, and total | 255 | * message sends the information about the command, command category, and total |
| 256 | * message size. The second message is used to retrieve the data specifed in | 256 | * message size. The second message is used to retrieve the data specified in |
| 257 | * the first message | 257 | * the first message |
| 258 | * | 258 | * |
| 259 | * 1st message 2nd message | 259 | * 1st message 2nd message |
diff --git a/drivers/media/i2c/m5mols/m5mols_core.c b/drivers/media/i2c/m5mols/m5mols_core.c index b8b2bf4cbfb2..454a336be336 100644 --- a/drivers/media/i2c/m5mols/m5mols_core.c +++ b/drivers/media/i2c/m5mols/m5mols_core.c | |||
| @@ -291,7 +291,7 @@ int m5mols_write(struct v4l2_subdev *sd, u32 reg, u32 val) | |||
| 291 | * @reg: the I2C_REG() address of an 8-bit status register to check | 291 | * @reg: the I2C_REG() address of an 8-bit status register to check |
| 292 | * @value: expected status register value | 292 | * @value: expected status register value |
| 293 | * @mask: bit mask for the read status register value | 293 | * @mask: bit mask for the read status register value |
| 294 | * @timeout: timeout in miliseconds, or -1 for default timeout | 294 | * @timeout: timeout in milliseconds, or -1 for default timeout |
| 295 | * | 295 | * |
| 296 | * The @reg register value is ORed with @mask before comparing with @value. | 296 | * The @reg register value is ORed with @mask before comparing with @value. |
| 297 | * | 297 | * |
diff --git a/drivers/media/i2c/msp3400-driver.c b/drivers/media/i2c/msp3400-driver.c index c63be01059b2..522fb1d561e7 100644 --- a/drivers/media/i2c/msp3400-driver.c +++ b/drivers/media/i2c/msp3400-driver.c | |||
| @@ -11,7 +11,7 @@ | |||
| 11 | * | 11 | * |
| 12 | * FM-Mono | 12 | * FM-Mono |
| 13 | * should work. The stereo modes are backward compatible to FM-mono, | 13 | * should work. The stereo modes are backward compatible to FM-mono, |
| 14 | * therefore FM-Mono should be allways available. | 14 | * therefore FM-Mono should be always available. |
| 15 | * | 15 | * |
| 16 | * FM-Stereo (B/G, used in germany) | 16 | * FM-Stereo (B/G, used in germany) |
| 17 | * should work, with autodetect | 17 | * should work, with autodetect |
diff --git a/drivers/media/i2c/soc_camera/soc_mt9m001.c b/drivers/media/i2c/mt9m001.c index a1a85ff838c5..4b23fde937b3 100644 --- a/drivers/media/i2c/soc_camera/soc_mt9m001.c +++ b/drivers/media/i2c/mt9m001.c | |||
| @@ -1,29 +1,27 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 1 | /* | 2 | /* |
| 2 | * Driver for MT9M001 CMOS Image Sensor from Micron | 3 | * Driver for MT9M001 CMOS Image Sensor from Micron |
| 3 | * | 4 | * |
| 4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | 5 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> |
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | 6 | */ |
| 10 | 7 | ||
| 11 | #include <linux/videodev2.h> | 8 | #include <linux/clk.h> |
| 12 | #include <linux/slab.h> | 9 | #include <linux/delay.h> |
| 10 | #include <linux/gpio/consumer.h> | ||
| 13 | #include <linux/i2c.h> | 11 | #include <linux/i2c.h> |
| 14 | #include <linux/log2.h> | 12 | #include <linux/log2.h> |
| 15 | #include <linux/module.h> | 13 | #include <linux/module.h> |
| 14 | #include <linux/pm_runtime.h> | ||
| 15 | #include <linux/slab.h> | ||
| 16 | #include <linux/videodev2.h> | ||
| 16 | 17 | ||
| 17 | #include <media/soc_camera.h> | ||
| 18 | #include <media/drv-intf/soc_mediabus.h> | ||
| 19 | #include <media/v4l2-clk.h> | ||
| 20 | #include <media/v4l2-subdev.h> | ||
| 21 | #include <media/v4l2-ctrls.h> | 18 | #include <media/v4l2-ctrls.h> |
| 19 | #include <media/v4l2-device.h> | ||
| 20 | #include <media/v4l2-event.h> | ||
| 21 | #include <media/v4l2-subdev.h> | ||
| 22 | 22 | ||
| 23 | /* | 23 | /* |
| 24 | * mt9m001 i2c address 0x5d | 24 | * mt9m001 i2c address 0x5d |
| 25 | * The platform has to define struct i2c_board_info objects and link to them | ||
| 26 | * from struct soc_camera_host_desc | ||
| 27 | */ | 25 | */ |
| 28 | 26 | ||
| 29 | /* mt9m001 selected register addresses */ | 27 | /* mt9m001 selected register addresses */ |
| @@ -50,6 +48,8 @@ | |||
| 50 | #define MT9M001_MIN_HEIGHT 32 | 48 | #define MT9M001_MIN_HEIGHT 32 |
| 51 | #define MT9M001_COLUMN_SKIP 20 | 49 | #define MT9M001_COLUMN_SKIP 20 |
| 52 | #define MT9M001_ROW_SKIP 12 | 50 | #define MT9M001_ROW_SKIP 12 |
| 51 | #define MT9M001_DEFAULT_HBLANK 9 | ||
| 52 | #define MT9M001_DEFAULT_VBLANK 25 | ||
| 53 | 53 | ||
| 54 | /* MT9M001 has only one fixed colorspace per pixelcode */ | 54 | /* MT9M001 has only one fixed colorspace per pixelcode */ |
| 55 | struct mt9m001_datafmt { | 55 | struct mt9m001_datafmt { |
| @@ -93,13 +93,18 @@ struct mt9m001 { | |||
| 93 | struct v4l2_ctrl *autoexposure; | 93 | struct v4l2_ctrl *autoexposure; |
| 94 | struct v4l2_ctrl *exposure; | 94 | struct v4l2_ctrl *exposure; |
| 95 | }; | 95 | }; |
| 96 | bool streaming; | ||
| 97 | struct mutex mutex; | ||
| 96 | struct v4l2_rect rect; /* Sensor window */ | 98 | struct v4l2_rect rect; /* Sensor window */ |
| 97 | struct v4l2_clk *clk; | 99 | struct clk *clk; |
| 100 | struct gpio_desc *standby_gpio; | ||
| 101 | struct gpio_desc *reset_gpio; | ||
| 98 | const struct mt9m001_datafmt *fmt; | 102 | const struct mt9m001_datafmt *fmt; |
| 99 | const struct mt9m001_datafmt *fmts; | 103 | const struct mt9m001_datafmt *fmts; |
| 100 | int num_fmts; | 104 | int num_fmts; |
| 101 | unsigned int total_h; | 105 | unsigned int total_h; |
| 102 | unsigned short y_skip_top; /* Lines to skip at the top */ | 106 | unsigned short y_skip_top; /* Lines to skip at the top */ |
| 107 | struct media_pad pad; | ||
| 103 | }; | 108 | }; |
| 104 | 109 | ||
| 105 | static struct mt9m001 *to_mt9m001(const struct i2c_client *client) | 110 | static struct mt9m001 *to_mt9m001(const struct i2c_client *client) |
| @@ -140,35 +145,111 @@ static int reg_clear(struct i2c_client *client, const u8 reg, | |||
| 140 | return reg_write(client, reg, ret & ~data); | 145 | return reg_write(client, reg, ret & ~data); |
| 141 | } | 146 | } |
| 142 | 147 | ||
| 148 | struct mt9m001_reg { | ||
| 149 | u8 reg; | ||
| 150 | u16 data; | ||
| 151 | }; | ||
| 152 | |||
| 153 | static int multi_reg_write(struct i2c_client *client, | ||
| 154 | const struct mt9m001_reg *regs, int num) | ||
| 155 | { | ||
| 156 | int i; | ||
| 157 | |||
| 158 | for (i = 0; i < num; i++) { | ||
| 159 | int ret = reg_write(client, regs[i].reg, regs[i].data); | ||
| 160 | |||
| 161 | if (ret) | ||
| 162 | return ret; | ||
| 163 | } | ||
| 164 | |||
| 165 | return 0; | ||
| 166 | } | ||
| 167 | |||
| 143 | static int mt9m001_init(struct i2c_client *client) | 168 | static int mt9m001_init(struct i2c_client *client) |
| 144 | { | 169 | { |
| 145 | int ret; | 170 | const struct mt9m001_reg init_regs[] = { |
| 171 | /* | ||
| 172 | * Issue a soft reset. This returns all registers to their | ||
| 173 | * default values. | ||
| 174 | */ | ||
| 175 | { MT9M001_RESET, 1 }, | ||
| 176 | { MT9M001_RESET, 0 }, | ||
| 177 | /* Disable chip, synchronous option update */ | ||
| 178 | { MT9M001_OUTPUT_CONTROL, 0 } | ||
| 179 | }; | ||
| 146 | 180 | ||
| 147 | dev_dbg(&client->dev, "%s\n", __func__); | 181 | dev_dbg(&client->dev, "%s\n", __func__); |
| 148 | 182 | ||
| 149 | /* | 183 | return multi_reg_write(client, init_regs, ARRAY_SIZE(init_regs)); |
| 150 | * We don't know, whether platform provides reset, issue a soft reset | 184 | } |
| 151 | * too. This returns all registers to their default values. | ||
| 152 | */ | ||
| 153 | ret = reg_write(client, MT9M001_RESET, 1); | ||
| 154 | if (!ret) | ||
| 155 | ret = reg_write(client, MT9M001_RESET, 0); | ||
| 156 | 185 | ||
| 157 | /* Disable chip, synchronous option update */ | 186 | static int mt9m001_apply_selection(struct v4l2_subdev *sd) |
| 158 | if (!ret) | 187 | { |
| 159 | ret = reg_write(client, MT9M001_OUTPUT_CONTROL, 0); | 188 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 189 | struct mt9m001 *mt9m001 = to_mt9m001(client); | ||
| 190 | const struct mt9m001_reg regs[] = { | ||
| 191 | /* Blanking and start values - default... */ | ||
| 192 | { MT9M001_HORIZONTAL_BLANKING, MT9M001_DEFAULT_HBLANK }, | ||
| 193 | { MT9M001_VERTICAL_BLANKING, MT9M001_DEFAULT_VBLANK }, | ||
| 194 | /* | ||
| 195 | * The caller provides a supported format, as verified per | ||
| 196 | * call to .set_fmt(FORMAT_TRY). | ||
| 197 | */ | ||
| 198 | { MT9M001_COLUMN_START, mt9m001->rect.left }, | ||
| 199 | { MT9M001_ROW_START, mt9m001->rect.top }, | ||
| 200 | { MT9M001_WINDOW_WIDTH, mt9m001->rect.width - 1 }, | ||
| 201 | { MT9M001_WINDOW_HEIGHT, | ||
| 202 | mt9m001->rect.height + mt9m001->y_skip_top - 1 }, | ||
| 203 | }; | ||
| 160 | 204 | ||
| 161 | return ret; | 205 | return multi_reg_write(client, regs, ARRAY_SIZE(regs)); |
| 162 | } | 206 | } |
| 163 | 207 | ||
| 164 | static int mt9m001_s_stream(struct v4l2_subdev *sd, int enable) | 208 | static int mt9m001_s_stream(struct v4l2_subdev *sd, int enable) |
| 165 | { | 209 | { |
| 166 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 210 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 211 | struct mt9m001 *mt9m001 = to_mt9m001(client); | ||
| 212 | int ret = 0; | ||
| 213 | |||
| 214 | mutex_lock(&mt9m001->mutex); | ||
| 215 | |||
| 216 | if (mt9m001->streaming == enable) | ||
| 217 | goto done; | ||
| 218 | |||
| 219 | if (enable) { | ||
| 220 | ret = pm_runtime_get_sync(&client->dev); | ||
| 221 | if (ret < 0) | ||
| 222 | goto put_unlock; | ||
| 223 | |||
| 224 | ret = mt9m001_apply_selection(sd); | ||
| 225 | if (ret) | ||
| 226 | goto put_unlock; | ||
| 227 | |||
| 228 | ret = __v4l2_ctrl_handler_setup(&mt9m001->hdl); | ||
| 229 | if (ret) | ||
| 230 | goto put_unlock; | ||
| 231 | |||
| 232 | /* Switch to master "normal" mode */ | ||
| 233 | ret = reg_write(client, MT9M001_OUTPUT_CONTROL, 2); | ||
| 234 | if (ret < 0) | ||
| 235 | goto put_unlock; | ||
| 236 | } else { | ||
| 237 | /* Switch to master stop sensor readout */ | ||
| 238 | reg_write(client, MT9M001_OUTPUT_CONTROL, 0); | ||
| 239 | pm_runtime_put(&client->dev); | ||
| 240 | } | ||
| 241 | |||
| 242 | mt9m001->streaming = enable; | ||
| 243 | done: | ||
| 244 | mutex_unlock(&mt9m001->mutex); | ||
| 167 | 245 | ||
| 168 | /* Switch to master "normal" mode or stop sensor readout */ | ||
| 169 | if (reg_write(client, MT9M001_OUTPUT_CONTROL, enable ? 2 : 0) < 0) | ||
| 170 | return -EIO; | ||
| 171 | return 0; | 246 | return 0; |
| 247 | |||
| 248 | put_unlock: | ||
| 249 | pm_runtime_put(&client->dev); | ||
| 250 | mutex_unlock(&mt9m001->mutex); | ||
| 251 | |||
| 252 | return ret; | ||
| 172 | } | 253 | } |
| 173 | 254 | ||
| 174 | static int mt9m001_set_selection(struct v4l2_subdev *sd, | 255 | static int mt9m001_set_selection(struct v4l2_subdev *sd, |
| @@ -178,8 +259,6 @@ static int mt9m001_set_selection(struct v4l2_subdev *sd, | |||
| 178 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 259 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 179 | struct mt9m001 *mt9m001 = to_mt9m001(client); | 260 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
| 180 | struct v4l2_rect rect = sel->r; | 261 | struct v4l2_rect rect = sel->r; |
| 181 | const u16 hblank = 9, vblank = 25; | ||
| 182 | int ret; | ||
| 183 | 262 | ||
| 184 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || | 263 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || |
| 185 | sel->target != V4L2_SEL_TGT_CROP) | 264 | sel->target != V4L2_SEL_TGT_CROP) |
| @@ -196,39 +275,22 @@ static int mt9m001_set_selection(struct v4l2_subdev *sd, | |||
| 196 | rect.width = ALIGN(rect.width, 2); | 275 | rect.width = ALIGN(rect.width, 2); |
| 197 | rect.left = ALIGN(rect.left, 2); | 276 | rect.left = ALIGN(rect.left, 2); |
| 198 | 277 | ||
| 199 | soc_camera_limit_side(&rect.left, &rect.width, | 278 | rect.width = clamp_t(u32, rect.width, MT9M001_MIN_WIDTH, |
| 200 | MT9M001_COLUMN_SKIP, MT9M001_MIN_WIDTH, MT9M001_MAX_WIDTH); | 279 | MT9M001_MAX_WIDTH); |
| 280 | rect.left = clamp_t(u32, rect.left, MT9M001_COLUMN_SKIP, | ||
| 281 | MT9M001_COLUMN_SKIP + MT9M001_MAX_WIDTH - rect.width); | ||
| 201 | 282 | ||
| 202 | soc_camera_limit_side(&rect.top, &rect.height, | 283 | rect.height = clamp_t(u32, rect.height, MT9M001_MIN_HEIGHT, |
| 203 | MT9M001_ROW_SKIP, MT9M001_MIN_HEIGHT, MT9M001_MAX_HEIGHT); | 284 | MT9M001_MAX_HEIGHT); |
| 285 | rect.top = clamp_t(u32, rect.top, MT9M001_ROW_SKIP, | ||
| 286 | MT9M001_ROW_SKIP + MT9M001_MAX_HEIGHT - rect.height); | ||
| 204 | 287 | ||
| 205 | mt9m001->total_h = rect.height + mt9m001->y_skip_top + vblank; | 288 | mt9m001->total_h = rect.height + mt9m001->y_skip_top + |
| 289 | MT9M001_DEFAULT_VBLANK; | ||
| 206 | 290 | ||
| 207 | /* Blanking and start values - default... */ | 291 | mt9m001->rect = rect; |
| 208 | ret = reg_write(client, MT9M001_HORIZONTAL_BLANKING, hblank); | ||
| 209 | if (!ret) | ||
| 210 | ret = reg_write(client, MT9M001_VERTICAL_BLANKING, vblank); | ||
| 211 | 292 | ||
| 212 | /* | 293 | return 0; |
| 213 | * The caller provides a supported format, as verified per | ||
| 214 | * call to .set_fmt(FORMAT_TRY). | ||
| 215 | */ | ||
| 216 | if (!ret) | ||
| 217 | ret = reg_write(client, MT9M001_COLUMN_START, rect.left); | ||
| 218 | if (!ret) | ||
| 219 | ret = reg_write(client, MT9M001_ROW_START, rect.top); | ||
| 220 | if (!ret) | ||
| 221 | ret = reg_write(client, MT9M001_WINDOW_WIDTH, rect.width - 1); | ||
| 222 | if (!ret) | ||
| 223 | ret = reg_write(client, MT9M001_WINDOW_HEIGHT, | ||
| 224 | rect.height + mt9m001->y_skip_top - 1); | ||
| 225 | if (!ret && v4l2_ctrl_g_ctrl(mt9m001->autoexposure) == V4L2_EXPOSURE_AUTO) | ||
| 226 | ret = reg_write(client, MT9M001_SHUTTER_WIDTH, mt9m001->total_h); | ||
| 227 | |||
| 228 | if (!ret) | ||
| 229 | mt9m001->rect = rect; | ||
| 230 | |||
| 231 | return ret; | ||
| 232 | } | 294 | } |
| 233 | 295 | ||
| 234 | static int mt9m001_get_selection(struct v4l2_subdev *sd, | 296 | static int mt9m001_get_selection(struct v4l2_subdev *sd, |
| @@ -267,11 +329,20 @@ static int mt9m001_get_fmt(struct v4l2_subdev *sd, | |||
| 267 | if (format->pad) | 329 | if (format->pad) |
| 268 | return -EINVAL; | 330 | return -EINVAL; |
| 269 | 331 | ||
| 332 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | ||
| 333 | mf = v4l2_subdev_get_try_format(sd, cfg, 0); | ||
| 334 | format->format = *mf; | ||
| 335 | return 0; | ||
| 336 | } | ||
| 337 | |||
| 270 | mf->width = mt9m001->rect.width; | 338 | mf->width = mt9m001->rect.width; |
| 271 | mf->height = mt9m001->rect.height; | 339 | mf->height = mt9m001->rect.height; |
| 272 | mf->code = mt9m001->fmt->code; | 340 | mf->code = mt9m001->fmt->code; |
| 273 | mf->colorspace = mt9m001->fmt->colorspace; | 341 | mf->colorspace = mt9m001->fmt->colorspace; |
| 274 | mf->field = V4L2_FIELD_NONE; | 342 | mf->field = V4L2_FIELD_NONE; |
| 343 | mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 344 | mf->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 345 | mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 275 | 346 | ||
| 276 | return 0; | 347 | return 0; |
| 277 | } | 348 | } |
| @@ -332,6 +403,10 @@ static int mt9m001_set_fmt(struct v4l2_subdev *sd, | |||
| 332 | } | 403 | } |
| 333 | 404 | ||
| 334 | mf->colorspace = fmt->colorspace; | 405 | mf->colorspace = fmt->colorspace; |
| 406 | mf->field = V4L2_FIELD_NONE; | ||
| 407 | mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 408 | mf->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 409 | mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 335 | 410 | ||
| 336 | if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) | 411 | if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) |
| 337 | return mt9m001_s_fmt(sd, fmt, mf); | 412 | return mt9m001_s_fmt(sd, fmt, mf); |
| @@ -372,13 +447,40 @@ static int mt9m001_s_register(struct v4l2_subdev *sd, | |||
| 372 | } | 447 | } |
| 373 | #endif | 448 | #endif |
| 374 | 449 | ||
| 375 | static int mt9m001_s_power(struct v4l2_subdev *sd, int on) | 450 | static int mt9m001_power_on(struct device *dev) |
| 376 | { | 451 | { |
| 377 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 452 | struct i2c_client *client = to_i2c_client(dev); |
| 378 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 379 | struct mt9m001 *mt9m001 = to_mt9m001(client); | 453 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
| 454 | int ret; | ||
| 455 | |||
| 456 | ret = clk_prepare_enable(mt9m001->clk); | ||
| 457 | if (ret) | ||
| 458 | return ret; | ||
| 459 | |||
| 460 | if (mt9m001->standby_gpio) { | ||
| 461 | gpiod_set_value_cansleep(mt9m001->standby_gpio, 0); | ||
| 462 | usleep_range(1000, 2000); | ||
| 463 | } | ||
| 464 | |||
| 465 | if (mt9m001->reset_gpio) { | ||
| 466 | gpiod_set_value_cansleep(mt9m001->reset_gpio, 1); | ||
| 467 | usleep_range(1000, 2000); | ||
| 468 | gpiod_set_value_cansleep(mt9m001->reset_gpio, 0); | ||
| 469 | usleep_range(1000, 2000); | ||
| 470 | } | ||
| 380 | 471 | ||
| 381 | return soc_camera_set_power(&client->dev, ssdd, mt9m001->clk, on); | 472 | return 0; |
| 473 | } | ||
| 474 | |||
| 475 | static int mt9m001_power_off(struct device *dev) | ||
| 476 | { | ||
| 477 | struct i2c_client *client = to_i2c_client(dev); | ||
| 478 | struct mt9m001 *mt9m001 = to_mt9m001(client); | ||
| 479 | |||
| 480 | gpiod_set_value_cansleep(mt9m001->standby_gpio, 1); | ||
| 481 | clk_disable_unprepare(mt9m001->clk); | ||
| 482 | |||
| 483 | return 0; | ||
| 382 | } | 484 | } |
| 383 | 485 | ||
| 384 | static int mt9m001_g_volatile_ctrl(struct v4l2_ctrl *ctrl) | 486 | static int mt9m001_g_volatile_ctrl(struct v4l2_ctrl *ctrl) |
| @@ -406,16 +508,18 @@ static int mt9m001_s_ctrl(struct v4l2_ctrl *ctrl) | |||
| 406 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 508 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 407 | struct v4l2_ctrl *exp = mt9m001->exposure; | 509 | struct v4l2_ctrl *exp = mt9m001->exposure; |
| 408 | int data; | 510 | int data; |
| 511 | int ret; | ||
| 512 | |||
| 513 | if (!pm_runtime_get_if_in_use(&client->dev)) | ||
| 514 | return 0; | ||
| 409 | 515 | ||
| 410 | switch (ctrl->id) { | 516 | switch (ctrl->id) { |
| 411 | case V4L2_CID_VFLIP: | 517 | case V4L2_CID_VFLIP: |
| 412 | if (ctrl->val) | 518 | if (ctrl->val) |
| 413 | data = reg_set(client, MT9M001_READ_OPTIONS2, 0x8000); | 519 | ret = reg_set(client, MT9M001_READ_OPTIONS2, 0x8000); |
| 414 | else | 520 | else |
| 415 | data = reg_clear(client, MT9M001_READ_OPTIONS2, 0x8000); | 521 | ret = reg_clear(client, MT9M001_READ_OPTIONS2, 0x8000); |
| 416 | if (data < 0) | 522 | break; |
| 417 | return -EIO; | ||
| 418 | return 0; | ||
| 419 | 523 | ||
| 420 | case V4L2_CID_GAIN: | 524 | case V4L2_CID_GAIN: |
| 421 | /* See Datasheet Table 7, Gain settings. */ | 525 | /* See Datasheet Table 7, Gain settings. */ |
| @@ -425,9 +529,7 @@ static int mt9m001_s_ctrl(struct v4l2_ctrl *ctrl) | |||
| 425 | data = ((ctrl->val - (s32)ctrl->minimum) * 8 + range / 2) / range; | 529 | data = ((ctrl->val - (s32)ctrl->minimum) * 8 + range / 2) / range; |
| 426 | 530 | ||
| 427 | dev_dbg(&client->dev, "Setting gain %d\n", data); | 531 | dev_dbg(&client->dev, "Setting gain %d\n", data); |
| 428 | data = reg_write(client, MT9M001_GLOBAL_GAIN, data); | 532 | ret = reg_write(client, MT9M001_GLOBAL_GAIN, data); |
| 429 | if (data < 0) | ||
| 430 | return -EIO; | ||
| 431 | } else { | 533 | } else { |
| 432 | /* Pack it into 1.125..15 variable step, register values 9..67 */ | 534 | /* Pack it into 1.125..15 variable step, register values 9..67 */ |
| 433 | /* We assume qctrl->maximum - qctrl->default_value - 1 > 0 */ | 535 | /* We assume qctrl->maximum - qctrl->default_value - 1 > 0 */ |
| @@ -444,11 +546,9 @@ static int mt9m001_s_ctrl(struct v4l2_ctrl *ctrl) | |||
| 444 | 546 | ||
| 445 | dev_dbg(&client->dev, "Setting gain from %d to %d\n", | 547 | dev_dbg(&client->dev, "Setting gain from %d to %d\n", |
| 446 | reg_read(client, MT9M001_GLOBAL_GAIN), data); | 548 | reg_read(client, MT9M001_GLOBAL_GAIN), data); |
| 447 | data = reg_write(client, MT9M001_GLOBAL_GAIN, data); | 549 | ret = reg_write(client, MT9M001_GLOBAL_GAIN, data); |
| 448 | if (data < 0) | ||
| 449 | return -EIO; | ||
| 450 | } | 550 | } |
| 451 | return 0; | 551 | break; |
| 452 | 552 | ||
| 453 | case V4L2_CID_EXPOSURE_AUTO: | 553 | case V4L2_CID_EXPOSURE_AUTO: |
| 454 | if (ctrl->val == V4L2_EXPOSURE_MANUAL) { | 554 | if (ctrl->val == V4L2_EXPOSURE_MANUAL) { |
| @@ -459,37 +559,34 @@ static int mt9m001_s_ctrl(struct v4l2_ctrl *ctrl) | |||
| 459 | dev_dbg(&client->dev, | 559 | dev_dbg(&client->dev, |
| 460 | "Setting shutter width from %d to %lu\n", | 560 | "Setting shutter width from %d to %lu\n", |
| 461 | reg_read(client, MT9M001_SHUTTER_WIDTH), shutter); | 561 | reg_read(client, MT9M001_SHUTTER_WIDTH), shutter); |
| 462 | if (reg_write(client, MT9M001_SHUTTER_WIDTH, shutter) < 0) | 562 | ret = reg_write(client, MT9M001_SHUTTER_WIDTH, shutter); |
| 463 | return -EIO; | ||
| 464 | } else { | 563 | } else { |
| 465 | const u16 vblank = 25; | ||
| 466 | |||
| 467 | mt9m001->total_h = mt9m001->rect.height + | 564 | mt9m001->total_h = mt9m001->rect.height + |
| 468 | mt9m001->y_skip_top + vblank; | 565 | mt9m001->y_skip_top + MT9M001_DEFAULT_VBLANK; |
| 469 | if (reg_write(client, MT9M001_SHUTTER_WIDTH, mt9m001->total_h) < 0) | 566 | ret = reg_write(client, MT9M001_SHUTTER_WIDTH, |
| 470 | return -EIO; | 567 | mt9m001->total_h); |
| 471 | } | 568 | } |
| 472 | return 0; | 569 | break; |
| 570 | default: | ||
| 571 | ret = -EINVAL; | ||
| 572 | break; | ||
| 473 | } | 573 | } |
| 474 | return -EINVAL; | 574 | |
| 575 | pm_runtime_put(&client->dev); | ||
| 576 | |||
| 577 | return ret; | ||
| 475 | } | 578 | } |
| 476 | 579 | ||
| 477 | /* | 580 | /* |
| 478 | * Interface active, can use i2c. If it fails, it can indeed mean, that | 581 | * Interface active, can use i2c. If it fails, it can indeed mean, that |
| 479 | * this wasn't our capture interface, so, we wait for the right one | 582 | * this wasn't our capture interface, so, we wait for the right one |
| 480 | */ | 583 | */ |
| 481 | static int mt9m001_video_probe(struct soc_camera_subdev_desc *ssdd, | 584 | static int mt9m001_video_probe(struct i2c_client *client) |
| 482 | struct i2c_client *client) | ||
| 483 | { | 585 | { |
| 484 | struct mt9m001 *mt9m001 = to_mt9m001(client); | 586 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
| 485 | s32 data; | 587 | s32 data; |
| 486 | unsigned long flags; | ||
| 487 | int ret; | 588 | int ret; |
| 488 | 589 | ||
| 489 | ret = mt9m001_s_power(&mt9m001->subdev, 1); | ||
| 490 | if (ret < 0) | ||
| 491 | return ret; | ||
| 492 | |||
| 493 | /* Enable the chip */ | 590 | /* Enable the chip */ |
| 494 | data = reg_write(client, MT9M001_CHIP_ENABLE, 1); | 591 | data = reg_write(client, MT9M001_CHIP_ENABLE, 1); |
| 495 | dev_dbg(&client->dev, "write: %d\n", data); | 592 | dev_dbg(&client->dev, "write: %d\n", data); |
| @@ -502,9 +599,11 @@ static int mt9m001_video_probe(struct soc_camera_subdev_desc *ssdd, | |||
| 502 | case 0x8411: | 599 | case 0x8411: |
| 503 | case 0x8421: | 600 | case 0x8421: |
| 504 | mt9m001->fmts = mt9m001_colour_fmts; | 601 | mt9m001->fmts = mt9m001_colour_fmts; |
| 602 | mt9m001->num_fmts = ARRAY_SIZE(mt9m001_colour_fmts); | ||
| 505 | break; | 603 | break; |
| 506 | case 0x8431: | 604 | case 0x8431: |
| 507 | mt9m001->fmts = mt9m001_monochrome_fmts; | 605 | mt9m001->fmts = mt9m001_monochrome_fmts; |
| 606 | mt9m001->num_fmts = ARRAY_SIZE(mt9m001_monochrome_fmts); | ||
| 508 | break; | 607 | break; |
| 509 | default: | 608 | default: |
| 510 | dev_err(&client->dev, | 609 | dev_err(&client->dev, |
| @@ -513,26 +612,6 @@ static int mt9m001_video_probe(struct soc_camera_subdev_desc *ssdd, | |||
| 513 | goto done; | 612 | goto done; |
| 514 | } | 613 | } |
| 515 | 614 | ||
| 516 | mt9m001->num_fmts = 0; | ||
| 517 | |||
| 518 | /* | ||
| 519 | * This is a 10bit sensor, so by default we only allow 10bit. | ||
| 520 | * The platform may support different bus widths due to | ||
| 521 | * different routing of the data lines. | ||
| 522 | */ | ||
| 523 | if (ssdd->query_bus_param) | ||
| 524 | flags = ssdd->query_bus_param(ssdd); | ||
| 525 | else | ||
| 526 | flags = SOCAM_DATAWIDTH_10; | ||
| 527 | |||
| 528 | if (flags & SOCAM_DATAWIDTH_10) | ||
| 529 | mt9m001->num_fmts++; | ||
| 530 | else | ||
| 531 | mt9m001->fmts++; | ||
| 532 | |||
| 533 | if (flags & SOCAM_DATAWIDTH_8) | ||
| 534 | mt9m001->num_fmts++; | ||
| 535 | |||
| 536 | mt9m001->fmt = &mt9m001->fmts[0]; | 615 | mt9m001->fmt = &mt9m001->fmts[0]; |
| 537 | 616 | ||
| 538 | dev_info(&client->dev, "Detected a MT9M001 chip ID %x (%s)\n", data, | 617 | dev_info(&client->dev, "Detected a MT9M001 chip ID %x (%s)\n", data, |
| @@ -548,16 +627,9 @@ static int mt9m001_video_probe(struct soc_camera_subdev_desc *ssdd, | |||
| 548 | ret = v4l2_ctrl_handler_setup(&mt9m001->hdl); | 627 | ret = v4l2_ctrl_handler_setup(&mt9m001->hdl); |
| 549 | 628 | ||
| 550 | done: | 629 | done: |
| 551 | mt9m001_s_power(&mt9m001->subdev, 0); | ||
| 552 | return ret; | 630 | return ret; |
| 553 | } | 631 | } |
| 554 | 632 | ||
| 555 | static void mt9m001_video_remove(struct soc_camera_subdev_desc *ssdd) | ||
| 556 | { | ||
| 557 | if (ssdd->free_bus) | ||
| 558 | ssdd->free_bus(ssdd); | ||
| 559 | } | ||
| 560 | |||
| 561 | static int mt9m001_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines) | 633 | static int mt9m001_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines) |
| 562 | { | 634 | { |
| 563 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 635 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| @@ -574,13 +646,35 @@ static const struct v4l2_ctrl_ops mt9m001_ctrl_ops = { | |||
| 574 | }; | 646 | }; |
| 575 | 647 | ||
| 576 | static const struct v4l2_subdev_core_ops mt9m001_subdev_core_ops = { | 648 | static const struct v4l2_subdev_core_ops mt9m001_subdev_core_ops = { |
| 649 | .log_status = v4l2_ctrl_subdev_log_status, | ||
| 650 | .subscribe_event = v4l2_ctrl_subdev_subscribe_event, | ||
| 651 | .unsubscribe_event = v4l2_event_subdev_unsubscribe, | ||
| 577 | #ifdef CONFIG_VIDEO_ADV_DEBUG | 652 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
| 578 | .g_register = mt9m001_g_register, | 653 | .g_register = mt9m001_g_register, |
| 579 | .s_register = mt9m001_s_register, | 654 | .s_register = mt9m001_s_register, |
| 580 | #endif | 655 | #endif |
| 581 | .s_power = mt9m001_s_power, | ||
| 582 | }; | 656 | }; |
| 583 | 657 | ||
| 658 | static int mt9m001_init_cfg(struct v4l2_subdev *sd, | ||
| 659 | struct v4l2_subdev_pad_config *cfg) | ||
| 660 | { | ||
| 661 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 662 | struct mt9m001 *mt9m001 = to_mt9m001(client); | ||
| 663 | struct v4l2_mbus_framefmt *try_fmt = | ||
| 664 | v4l2_subdev_get_try_format(sd, cfg, 0); | ||
| 665 | |||
| 666 | try_fmt->width = MT9M001_MAX_WIDTH; | ||
| 667 | try_fmt->height = MT9M001_MAX_HEIGHT; | ||
| 668 | try_fmt->code = mt9m001->fmts[0].code; | ||
| 669 | try_fmt->colorspace = mt9m001->fmts[0].colorspace; | ||
| 670 | try_fmt->field = V4L2_FIELD_NONE; | ||
| 671 | try_fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 672 | try_fmt->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 673 | try_fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 674 | |||
| 675 | return 0; | ||
| 676 | } | ||
| 677 | |||
| 584 | static int mt9m001_enum_mbus_code(struct v4l2_subdev *sd, | 678 | static int mt9m001_enum_mbus_code(struct v4l2_subdev *sd, |
| 585 | struct v4l2_subdev_pad_config *cfg, | 679 | struct v4l2_subdev_pad_config *cfg, |
| 586 | struct v4l2_subdev_mbus_code_enum *code) | 680 | struct v4l2_subdev_mbus_code_enum *code) |
| @@ -598,41 +692,18 @@ static int mt9m001_enum_mbus_code(struct v4l2_subdev *sd, | |||
| 598 | static int mt9m001_g_mbus_config(struct v4l2_subdev *sd, | 692 | static int mt9m001_g_mbus_config(struct v4l2_subdev *sd, |
| 599 | struct v4l2_mbus_config *cfg) | 693 | struct v4l2_mbus_config *cfg) |
| 600 | { | 694 | { |
| 601 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 602 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 603 | |||
| 604 | /* MT9M001 has all capture_format parameters fixed */ | 695 | /* MT9M001 has all capture_format parameters fixed */ |
| 605 | cfg->flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | | 696 | cfg->flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | |
| 606 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH | | 697 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH | |
| 607 | V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_MASTER; | 698 | V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_MASTER; |
| 608 | cfg->type = V4L2_MBUS_PARALLEL; | 699 | cfg->type = V4L2_MBUS_PARALLEL; |
| 609 | cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); | ||
| 610 | 700 | ||
| 611 | return 0; | 701 | return 0; |
| 612 | } | 702 | } |
| 613 | 703 | ||
| 614 | static int mt9m001_s_mbus_config(struct v4l2_subdev *sd, | ||
| 615 | const struct v4l2_mbus_config *cfg) | ||
| 616 | { | ||
| 617 | const struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 618 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 619 | struct mt9m001 *mt9m001 = to_mt9m001(client); | ||
| 620 | unsigned int bps = soc_mbus_get_fmtdesc(mt9m001->fmt->code)->bits_per_sample; | ||
| 621 | |||
| 622 | if (ssdd->set_bus_param) | ||
| 623 | return ssdd->set_bus_param(ssdd, 1 << (bps - 1)); | ||
| 624 | |||
| 625 | /* | ||
| 626 | * Without board specific bus width settings we only support the | ||
| 627 | * sensors native bus width | ||
| 628 | */ | ||
| 629 | return bps == 10 ? 0 : -EINVAL; | ||
| 630 | } | ||
| 631 | |||
| 632 | static const struct v4l2_subdev_video_ops mt9m001_subdev_video_ops = { | 704 | static const struct v4l2_subdev_video_ops mt9m001_subdev_video_ops = { |
| 633 | .s_stream = mt9m001_s_stream, | 705 | .s_stream = mt9m001_s_stream, |
| 634 | .g_mbus_config = mt9m001_g_mbus_config, | 706 | .g_mbus_config = mt9m001_g_mbus_config, |
| 635 | .s_mbus_config = mt9m001_s_mbus_config, | ||
| 636 | }; | 707 | }; |
| 637 | 708 | ||
| 638 | static const struct v4l2_subdev_sensor_ops mt9m001_subdev_sensor_ops = { | 709 | static const struct v4l2_subdev_sensor_ops mt9m001_subdev_sensor_ops = { |
| @@ -640,6 +711,7 @@ static const struct v4l2_subdev_sensor_ops mt9m001_subdev_sensor_ops = { | |||
| 640 | }; | 711 | }; |
| 641 | 712 | ||
| 642 | static const struct v4l2_subdev_pad_ops mt9m001_subdev_pad_ops = { | 713 | static const struct v4l2_subdev_pad_ops mt9m001_subdev_pad_ops = { |
| 714 | .init_cfg = mt9m001_init_cfg, | ||
| 643 | .enum_mbus_code = mt9m001_enum_mbus_code, | 715 | .enum_mbus_code = mt9m001_enum_mbus_code, |
| 644 | .get_selection = mt9m001_get_selection, | 716 | .get_selection = mt9m001_get_selection, |
| 645 | .set_selection = mt9m001_set_selection, | 717 | .set_selection = mt9m001_set_selection, |
| @@ -659,25 +731,35 @@ static int mt9m001_probe(struct i2c_client *client, | |||
| 659 | { | 731 | { |
| 660 | struct mt9m001 *mt9m001; | 732 | struct mt9m001 *mt9m001; |
| 661 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | 733 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
| 662 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 663 | int ret; | 734 | int ret; |
| 664 | 735 | ||
| 665 | if (!ssdd) { | ||
| 666 | dev_err(&client->dev, "MT9M001 driver needs platform data\n"); | ||
| 667 | return -EINVAL; | ||
| 668 | } | ||
| 669 | |||
| 670 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | 736 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { |
| 671 | dev_warn(&adapter->dev, | 737 | dev_warn(&adapter->dev, |
| 672 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | 738 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); |
| 673 | return -EIO; | 739 | return -EIO; |
| 674 | } | 740 | } |
| 675 | 741 | ||
| 676 | mt9m001 = devm_kzalloc(&client->dev, sizeof(struct mt9m001), GFP_KERNEL); | 742 | mt9m001 = devm_kzalloc(&client->dev, sizeof(*mt9m001), GFP_KERNEL); |
| 677 | if (!mt9m001) | 743 | if (!mt9m001) |
| 678 | return -ENOMEM; | 744 | return -ENOMEM; |
| 679 | 745 | ||
| 746 | mt9m001->clk = devm_clk_get(&client->dev, NULL); | ||
| 747 | if (IS_ERR(mt9m001->clk)) | ||
| 748 | return PTR_ERR(mt9m001->clk); | ||
| 749 | |||
| 750 | mt9m001->standby_gpio = devm_gpiod_get_optional(&client->dev, "standby", | ||
| 751 | GPIOD_OUT_LOW); | ||
| 752 | if (IS_ERR(mt9m001->standby_gpio)) | ||
| 753 | return PTR_ERR(mt9m001->standby_gpio); | ||
| 754 | |||
| 755 | mt9m001->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", | ||
| 756 | GPIOD_OUT_LOW); | ||
| 757 | if (IS_ERR(mt9m001->reset_gpio)) | ||
| 758 | return PTR_ERR(mt9m001->reset_gpio); | ||
| 759 | |||
| 680 | v4l2_i2c_subdev_init(&mt9m001->subdev, client, &mt9m001_subdev_ops); | 760 | v4l2_i2c_subdev_init(&mt9m001->subdev, client, &mt9m001_subdev_ops); |
| 761 | mt9m001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | | ||
| 762 | V4L2_SUBDEV_FL_HAS_EVENTS; | ||
| 681 | v4l2_ctrl_handler_init(&mt9m001->hdl, 4); | 763 | v4l2_ctrl_handler_init(&mt9m001->hdl, 4); |
| 682 | v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops, | 764 | v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops, |
| 683 | V4L2_CID_VFLIP, 0, 1, 1, 0); | 765 | V4L2_CID_VFLIP, 0, 1, 1, 0); |
| @@ -699,6 +781,9 @@ static int mt9m001_probe(struct i2c_client *client, | |||
| 699 | v4l2_ctrl_auto_cluster(2, &mt9m001->autoexposure, | 781 | v4l2_ctrl_auto_cluster(2, &mt9m001->autoexposure, |
| 700 | V4L2_EXPOSURE_MANUAL, true); | 782 | V4L2_EXPOSURE_MANUAL, true); |
| 701 | 783 | ||
| 784 | mutex_init(&mt9m001->mutex); | ||
| 785 | mt9m001->hdl.lock = &mt9m001->mutex; | ||
| 786 | |||
| 702 | /* Second stage probe - when a capture adapter is there */ | 787 | /* Second stage probe - when a capture adapter is there */ |
| 703 | mt9m001->y_skip_top = 0; | 788 | mt9m001->y_skip_top = 0; |
| 704 | mt9m001->rect.left = MT9M001_COLUMN_SKIP; | 789 | mt9m001->rect.left = MT9M001_COLUMN_SKIP; |
| @@ -706,18 +791,41 @@ static int mt9m001_probe(struct i2c_client *client, | |||
| 706 | mt9m001->rect.width = MT9M001_MAX_WIDTH; | 791 | mt9m001->rect.width = MT9M001_MAX_WIDTH; |
| 707 | mt9m001->rect.height = MT9M001_MAX_HEIGHT; | 792 | mt9m001->rect.height = MT9M001_MAX_HEIGHT; |
| 708 | 793 | ||
| 709 | mt9m001->clk = v4l2_clk_get(&client->dev, "mclk"); | 794 | ret = mt9m001_power_on(&client->dev); |
| 710 | if (IS_ERR(mt9m001->clk)) { | 795 | if (ret) |
| 711 | ret = PTR_ERR(mt9m001->clk); | 796 | goto error_hdl_free; |
| 712 | goto eclkget; | ||
| 713 | } | ||
| 714 | 797 | ||
| 715 | ret = mt9m001_video_probe(ssdd, client); | 798 | pm_runtime_set_active(&client->dev); |
| 716 | if (ret) { | 799 | pm_runtime_enable(&client->dev); |
| 717 | v4l2_clk_put(mt9m001->clk); | 800 | |
| 718 | eclkget: | 801 | ret = mt9m001_video_probe(client); |
| 719 | v4l2_ctrl_handler_free(&mt9m001->hdl); | 802 | if (ret) |
| 720 | } | 803 | goto error_power_off; |
| 804 | |||
| 805 | mt9m001->pad.flags = MEDIA_PAD_FL_SOURCE; | ||
| 806 | mt9m001->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR; | ||
| 807 | ret = media_entity_pads_init(&mt9m001->subdev.entity, 1, &mt9m001->pad); | ||
| 808 | if (ret) | ||
| 809 | goto error_power_off; | ||
| 810 | |||
| 811 | ret = v4l2_async_register_subdev(&mt9m001->subdev); | ||
| 812 | if (ret) | ||
| 813 | goto error_entity_cleanup; | ||
| 814 | |||
| 815 | pm_runtime_idle(&client->dev); | ||
| 816 | |||
| 817 | return 0; | ||
| 818 | |||
| 819 | error_entity_cleanup: | ||
| 820 | media_entity_cleanup(&mt9m001->subdev.entity); | ||
| 821 | error_power_off: | ||
| 822 | pm_runtime_disable(&client->dev); | ||
| 823 | pm_runtime_set_suspended(&client->dev); | ||
| 824 | mt9m001_power_off(&client->dev); | ||
| 825 | |||
| 826 | error_hdl_free: | ||
| 827 | v4l2_ctrl_handler_free(&mt9m001->hdl); | ||
| 828 | mutex_destroy(&mt9m001->mutex); | ||
| 721 | 829 | ||
| 722 | return ret; | 830 | return ret; |
| 723 | } | 831 | } |
| @@ -725,12 +833,19 @@ eclkget: | |||
| 725 | static int mt9m001_remove(struct i2c_client *client) | 833 | static int mt9m001_remove(struct i2c_client *client) |
| 726 | { | 834 | { |
| 727 | struct mt9m001 *mt9m001 = to_mt9m001(client); | 835 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
| 728 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 729 | 836 | ||
| 730 | v4l2_clk_put(mt9m001->clk); | 837 | pm_runtime_get_sync(&client->dev); |
| 731 | v4l2_device_unregister_subdev(&mt9m001->subdev); | 838 | |
| 839 | v4l2_async_unregister_subdev(&mt9m001->subdev); | ||
| 840 | media_entity_cleanup(&mt9m001->subdev.entity); | ||
| 841 | |||
| 842 | pm_runtime_disable(&client->dev); | ||
| 843 | pm_runtime_set_suspended(&client->dev); | ||
| 844 | pm_runtime_put_noidle(&client->dev); | ||
| 845 | mt9m001_power_off(&client->dev); | ||
| 846 | |||
| 732 | v4l2_ctrl_handler_free(&mt9m001->hdl); | 847 | v4l2_ctrl_handler_free(&mt9m001->hdl); |
| 733 | mt9m001_video_remove(ssdd); | 848 | mutex_destroy(&mt9m001->mutex); |
| 734 | 849 | ||
| 735 | return 0; | 850 | return 0; |
| 736 | } | 851 | } |
| @@ -741,9 +856,21 @@ static const struct i2c_device_id mt9m001_id[] = { | |||
| 741 | }; | 856 | }; |
| 742 | MODULE_DEVICE_TABLE(i2c, mt9m001_id); | 857 | MODULE_DEVICE_TABLE(i2c, mt9m001_id); |
| 743 | 858 | ||
| 859 | static const struct dev_pm_ops mt9m001_pm_ops = { | ||
| 860 | SET_RUNTIME_PM_OPS(mt9m001_power_off, mt9m001_power_on, NULL) | ||
| 861 | }; | ||
| 862 | |||
| 863 | static const struct of_device_id mt9m001_of_match[] = { | ||
| 864 | { .compatible = "onnn,mt9m001", }, | ||
| 865 | { /* sentinel */ }, | ||
| 866 | }; | ||
| 867 | MODULE_DEVICE_TABLE(of, mt9m001_of_match); | ||
| 868 | |||
| 744 | static struct i2c_driver mt9m001_i2c_driver = { | 869 | static struct i2c_driver mt9m001_i2c_driver = { |
| 745 | .driver = { | 870 | .driver = { |
| 746 | .name = "mt9m001", | 871 | .name = "mt9m001", |
| 872 | .pm = &mt9m001_pm_ops, | ||
| 873 | .of_match_table = mt9m001_of_match, | ||
| 747 | }, | 874 | }, |
| 748 | .probe = mt9m001_probe, | 875 | .probe = mt9m001_probe, |
| 749 | .remove = mt9m001_remove, | 876 | .remove = mt9m001_remove, |
| @@ -754,4 +881,4 @@ module_i2c_driver(mt9m001_i2c_driver); | |||
| 754 | 881 | ||
| 755 | MODULE_DESCRIPTION("Micron MT9M001 Camera driver"); | 882 | MODULE_DESCRIPTION("Micron MT9M001 Camera driver"); |
| 756 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | 883 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); |
| 757 | MODULE_LICENSE("GPL"); | 884 | MODULE_LICENSE("GPL v2"); |
diff --git a/drivers/media/i2c/mt9m111.c b/drivers/media/i2c/mt9m111.c index d639b9bcf64a..5168bb5880c4 100644 --- a/drivers/media/i2c/mt9m111.c +++ b/drivers/media/i2c/mt9m111.c | |||
| @@ -528,11 +528,24 @@ static int mt9m111_get_fmt(struct v4l2_subdev *sd, | |||
| 528 | if (format->pad) | 528 | if (format->pad) |
| 529 | return -EINVAL; | 529 | return -EINVAL; |
| 530 | 530 | ||
| 531 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | ||
| 532 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API | ||
| 533 | mf = v4l2_subdev_get_try_format(sd, cfg, format->pad); | ||
| 534 | format->format = *mf; | ||
| 535 | return 0; | ||
| 536 | #else | ||
| 537 | return -ENOTTY; | ||
| 538 | #endif | ||
| 539 | } | ||
| 540 | |||
| 531 | mf->width = mt9m111->width; | 541 | mf->width = mt9m111->width; |
| 532 | mf->height = mt9m111->height; | 542 | mf->height = mt9m111->height; |
| 533 | mf->code = mt9m111->fmt->code; | 543 | mf->code = mt9m111->fmt->code; |
| 534 | mf->colorspace = mt9m111->fmt->colorspace; | 544 | mf->colorspace = mt9m111->fmt->colorspace; |
| 535 | mf->field = V4L2_FIELD_NONE; | 545 | mf->field = V4L2_FIELD_NONE; |
| 546 | mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 547 | mf->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 548 | mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 536 | 549 | ||
| 537 | return 0; | 550 | return 0; |
| 538 | } | 551 | } |
| @@ -660,6 +673,10 @@ static int mt9m111_set_fmt(struct v4l2_subdev *sd, | |||
| 660 | 673 | ||
| 661 | mf->code = fmt->code; | 674 | mf->code = fmt->code; |
| 662 | mf->colorspace = fmt->colorspace; | 675 | mf->colorspace = fmt->colorspace; |
| 676 | mf->field = V4L2_FIELD_NONE; | ||
| 677 | mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 678 | mf->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 679 | mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 663 | 680 | ||
| 664 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | 681 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { |
| 665 | cfg->try_fmt = *mf; | 682 | cfg->try_fmt = *mf; |
| @@ -1089,6 +1106,25 @@ static int mt9m111_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 1089 | return 0; | 1106 | return 0; |
| 1090 | } | 1107 | } |
| 1091 | 1108 | ||
| 1109 | static int mt9m111_init_cfg(struct v4l2_subdev *sd, | ||
| 1110 | struct v4l2_subdev_pad_config *cfg) | ||
| 1111 | { | ||
| 1112 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API | ||
| 1113 | struct v4l2_mbus_framefmt *format = | ||
| 1114 | v4l2_subdev_get_try_format(sd, cfg, 0); | ||
| 1115 | |||
| 1116 | format->width = MT9M111_MAX_WIDTH; | ||
| 1117 | format->height = MT9M111_MAX_HEIGHT; | ||
| 1118 | format->code = mt9m111_colour_fmts[0].code; | ||
| 1119 | format->colorspace = mt9m111_colour_fmts[0].colorspace; | ||
| 1120 | format->field = V4L2_FIELD_NONE; | ||
| 1121 | format->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 1122 | format->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 1123 | format->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 1124 | #endif | ||
| 1125 | return 0; | ||
| 1126 | } | ||
| 1127 | |||
| 1092 | static int mt9m111_g_mbus_config(struct v4l2_subdev *sd, | 1128 | static int mt9m111_g_mbus_config(struct v4l2_subdev *sd, |
| 1093 | struct v4l2_mbus_config *cfg) | 1129 | struct v4l2_mbus_config *cfg) |
| 1094 | { | 1130 | { |
| @@ -1114,6 +1150,7 @@ static const struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = { | |||
| 1114 | }; | 1150 | }; |
| 1115 | 1151 | ||
| 1116 | static const struct v4l2_subdev_pad_ops mt9m111_subdev_pad_ops = { | 1152 | static const struct v4l2_subdev_pad_ops mt9m111_subdev_pad_ops = { |
| 1153 | .init_cfg = mt9m111_init_cfg, | ||
| 1117 | .enum_mbus_code = mt9m111_enum_mbus_code, | 1154 | .enum_mbus_code = mt9m111_enum_mbus_code, |
| 1118 | .get_selection = mt9m111_get_selection, | 1155 | .get_selection = mt9m111_get_selection, |
| 1119 | .set_selection = mt9m111_set_selection, | 1156 | .set_selection = mt9m111_set_selection, |
| @@ -1273,6 +1310,8 @@ static int mt9m111_probe(struct i2c_client *client, | |||
| 1273 | mt9m111->rect.top = MT9M111_MIN_DARK_ROWS; | 1310 | mt9m111->rect.top = MT9M111_MIN_DARK_ROWS; |
| 1274 | mt9m111->rect.width = MT9M111_MAX_WIDTH; | 1311 | mt9m111->rect.width = MT9M111_MAX_WIDTH; |
| 1275 | mt9m111->rect.height = MT9M111_MAX_HEIGHT; | 1312 | mt9m111->rect.height = MT9M111_MAX_HEIGHT; |
| 1313 | mt9m111->width = mt9m111->rect.width; | ||
| 1314 | mt9m111->height = mt9m111->rect.height; | ||
| 1276 | mt9m111->fmt = &mt9m111_colour_fmts[0]; | 1315 | mt9m111->fmt = &mt9m111_colour_fmts[0]; |
| 1277 | mt9m111->lastpage = -1; | 1316 | mt9m111->lastpage = -1; |
| 1278 | mutex_init(&mt9m111->power_lock); | 1317 | mutex_init(&mt9m111->power_lock); |
diff --git a/drivers/media/i2c/mt9t112.c b/drivers/media/i2c/mt9t112.c index ef353a244e33..ae3c336eadf5 100644 --- a/drivers/media/i2c/mt9t112.c +++ b/drivers/media/i2c/mt9t112.c | |||
| @@ -541,7 +541,7 @@ static int mt9t112_init_setting(const struct i2c_client *client) | |||
| 541 | mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0); | 541 | mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0); |
| 542 | 542 | ||
| 543 | /* | 543 | /* |
| 544 | * Flicker Dectection registers. | 544 | * Flicker Detection registers. |
| 545 | * This section should be replaced whenever new timing file is | 545 | * This section should be replaced whenever new timing file is |
| 546 | * generated. All the following registers need to be replaced. | 546 | * generated. All the following registers need to be replaced. |
| 547 | * Following registers are generated from Register Wizard but user can | 547 | * Following registers are generated from Register Wizard but user can |
diff --git a/drivers/media/i2c/ov2640.c b/drivers/media/i2c/ov2640.c index 5d2d6735cc78..83031cfc7914 100644 --- a/drivers/media/i2c/ov2640.c +++ b/drivers/media/i2c/ov2640.c | |||
| @@ -842,9 +842,6 @@ static int ov2640_set_params(struct i2c_client *client, | |||
| 842 | u8 val; | 842 | u8 val; |
| 843 | int ret; | 843 | int ret; |
| 844 | 844 | ||
| 845 | if (!win) | ||
| 846 | return -EINVAL; | ||
| 847 | |||
| 848 | switch (code) { | 845 | switch (code) { |
| 849 | case MEDIA_BUS_FMT_RGB565_2X8_BE: | 846 | case MEDIA_BUS_FMT_RGB565_2X8_BE: |
| 850 | dev_dbg(&client->dev, "%s: Selected cfmt RGB565 BE", __func__); | 847 | dev_dbg(&client->dev, "%s: Selected cfmt RGB565 BE", __func__); |
| @@ -929,9 +926,14 @@ static int ov2640_get_fmt(struct v4l2_subdev *sd, | |||
| 929 | if (format->pad) | 926 | if (format->pad) |
| 930 | return -EINVAL; | 927 | return -EINVAL; |
| 931 | 928 | ||
| 932 | if (!priv->win) { | 929 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { |
| 933 | priv->win = ov2640_select_win(SVGA_WIDTH, SVGA_HEIGHT); | 930 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API |
| 934 | priv->cfmt_code = MEDIA_BUS_FMT_UYVY8_2X8; | 931 | mf = v4l2_subdev_get_try_format(sd, cfg, 0); |
| 932 | format->format = *mf; | ||
| 933 | return 0; | ||
| 934 | #else | ||
| 935 | return -ENOTTY; | ||
| 936 | #endif | ||
| 935 | } | 937 | } |
| 936 | 938 | ||
| 937 | mf->width = priv->win->width; | 939 | mf->width = priv->win->width; |
| @@ -939,6 +941,9 @@ static int ov2640_get_fmt(struct v4l2_subdev *sd, | |||
| 939 | mf->code = priv->cfmt_code; | 941 | mf->code = priv->cfmt_code; |
| 940 | mf->colorspace = V4L2_COLORSPACE_SRGB; | 942 | mf->colorspace = V4L2_COLORSPACE_SRGB; |
| 941 | mf->field = V4L2_FIELD_NONE; | 943 | mf->field = V4L2_FIELD_NONE; |
| 944 | mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 945 | mf->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 946 | mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 942 | 947 | ||
| 943 | return 0; | 948 | return 0; |
| 944 | } | 949 | } |
| @@ -965,6 +970,9 @@ static int ov2640_set_fmt(struct v4l2_subdev *sd, | |||
| 965 | 970 | ||
| 966 | mf->field = V4L2_FIELD_NONE; | 971 | mf->field = V4L2_FIELD_NONE; |
| 967 | mf->colorspace = V4L2_COLORSPACE_SRGB; | 972 | mf->colorspace = V4L2_COLORSPACE_SRGB; |
| 973 | mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 974 | mf->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 975 | mf->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 968 | 976 | ||
| 969 | switch (mf->code) { | 977 | switch (mf->code) { |
| 970 | case MEDIA_BUS_FMT_RGB565_2X8_BE: | 978 | case MEDIA_BUS_FMT_RGB565_2X8_BE: |
| @@ -999,6 +1007,27 @@ out: | |||
| 999 | return ret; | 1007 | return ret; |
| 1000 | } | 1008 | } |
| 1001 | 1009 | ||
| 1010 | static int ov2640_init_cfg(struct v4l2_subdev *sd, | ||
| 1011 | struct v4l2_subdev_pad_config *cfg) | ||
| 1012 | { | ||
| 1013 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API | ||
| 1014 | struct v4l2_mbus_framefmt *try_fmt = | ||
| 1015 | v4l2_subdev_get_try_format(sd, cfg, 0); | ||
| 1016 | const struct ov2640_win_size *win = | ||
| 1017 | ov2640_select_win(SVGA_WIDTH, SVGA_HEIGHT); | ||
| 1018 | |||
| 1019 | try_fmt->width = win->width; | ||
| 1020 | try_fmt->height = win->height; | ||
| 1021 | try_fmt->code = MEDIA_BUS_FMT_UYVY8_2X8; | ||
| 1022 | try_fmt->colorspace = V4L2_COLORSPACE_SRGB; | ||
| 1023 | try_fmt->field = V4L2_FIELD_NONE; | ||
| 1024 | try_fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; | ||
| 1025 | try_fmt->quantization = V4L2_QUANTIZATION_DEFAULT; | ||
| 1026 | try_fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT; | ||
| 1027 | #endif | ||
| 1028 | return 0; | ||
| 1029 | } | ||
| 1030 | |||
| 1002 | static int ov2640_enum_mbus_code(struct v4l2_subdev *sd, | 1031 | static int ov2640_enum_mbus_code(struct v4l2_subdev *sd, |
| 1003 | struct v4l2_subdev_pad_config *cfg, | 1032 | struct v4l2_subdev_pad_config *cfg, |
| 1004 | struct v4l2_subdev_mbus_code_enum *code) | 1033 | struct v4l2_subdev_mbus_code_enum *code) |
| @@ -1108,6 +1137,7 @@ static const struct v4l2_subdev_core_ops ov2640_subdev_core_ops = { | |||
| 1108 | }; | 1137 | }; |
| 1109 | 1138 | ||
| 1110 | static const struct v4l2_subdev_pad_ops ov2640_subdev_pad_ops = { | 1139 | static const struct v4l2_subdev_pad_ops ov2640_subdev_pad_ops = { |
| 1140 | .init_cfg = ov2640_init_cfg, | ||
| 1111 | .enum_mbus_code = ov2640_enum_mbus_code, | 1141 | .enum_mbus_code = ov2640_enum_mbus_code, |
| 1112 | .get_selection = ov2640_get_selection, | 1142 | .get_selection = ov2640_get_selection, |
| 1113 | .get_fmt = ov2640_get_fmt, | 1143 | .get_fmt = ov2640_get_fmt, |
| @@ -1193,6 +1223,9 @@ static int ov2640_probe(struct i2c_client *client, | |||
| 1193 | if (ret) | 1223 | if (ret) |
| 1194 | goto err_clk; | 1224 | goto err_clk; |
| 1195 | 1225 | ||
| 1226 | priv->win = ov2640_select_win(SVGA_WIDTH, SVGA_HEIGHT); | ||
| 1227 | priv->cfmt_code = MEDIA_BUS_FMT_UYVY8_2X8; | ||
| 1228 | |||
| 1196 | v4l2_i2c_subdev_init(&priv->subdev, client, &ov2640_subdev_ops); | 1229 | v4l2_i2c_subdev_init(&priv->subdev, client, &ov2640_subdev_ops); |
| 1197 | priv->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | | 1230 | priv->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | |
| 1198 | V4L2_SUBDEV_FL_HAS_EVENTS; | 1231 | V4L2_SUBDEV_FL_HAS_EVENTS; |
diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c index bef3f3aae0ed..82d4ce93312c 100644 --- a/drivers/media/i2c/ov5640.c +++ b/drivers/media/i2c/ov5640.c | |||
| @@ -83,6 +83,9 @@ | |||
| 83 | #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c | 83 | #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c |
| 84 | #define OV5640_REG_FRAME_CTRL01 0x4202 | 84 | #define OV5640_REG_FRAME_CTRL01 0x4202 |
| 85 | #define OV5640_REG_FORMAT_CONTROL00 0x4300 | 85 | #define OV5640_REG_FORMAT_CONTROL00 0x4300 |
| 86 | #define OV5640_REG_VFIFO_HSIZE 0x4602 | ||
| 87 | #define OV5640_REG_VFIFO_VSIZE 0x4604 | ||
| 88 | #define OV5640_REG_JPG_MODE_SELECT 0x4713 | ||
| 86 | #define OV5640_REG_POLARITY_CTRL00 0x4740 | 89 | #define OV5640_REG_POLARITY_CTRL00 0x4740 |
| 87 | #define OV5640_REG_MIPI_CTRL00 0x4800 | 90 | #define OV5640_REG_MIPI_CTRL00 0x4800 |
| 88 | #define OV5640_REG_DEBUG_MODE 0x4814 | 91 | #define OV5640_REG_DEBUG_MODE 0x4814 |
| @@ -115,6 +118,15 @@ enum ov5640_frame_rate { | |||
| 115 | OV5640_NUM_FRAMERATES, | 118 | OV5640_NUM_FRAMERATES, |
| 116 | }; | 119 | }; |
| 117 | 120 | ||
| 121 | enum ov5640_format_mux { | ||
| 122 | OV5640_FMT_MUX_YUV422 = 0, | ||
| 123 | OV5640_FMT_MUX_RGB, | ||
| 124 | OV5640_FMT_MUX_DITHER, | ||
| 125 | OV5640_FMT_MUX_RAW_DPC, | ||
| 126 | OV5640_FMT_MUX_SNR_RAW, | ||
| 127 | OV5640_FMT_MUX_RAW_CIP, | ||
| 128 | }; | ||
| 129 | |||
| 118 | struct ov5640_pixfmt { | 130 | struct ov5640_pixfmt { |
| 119 | u32 code; | 131 | u32 code; |
| 120 | u32 colorspace; | 132 | u32 colorspace; |
| @@ -126,6 +138,10 @@ static const struct ov5640_pixfmt ov5640_formats[] = { | |||
| 126 | { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, }, | 138 | { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, }, |
| 127 | { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, }, | 139 | { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, }, |
| 128 | { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, }, | 140 | { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, }, |
| 141 | { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, }, | ||
| 142 | { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, }, | ||
| 143 | { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, }, | ||
| 144 | { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, }, | ||
| 129 | }; | 145 | }; |
| 130 | 146 | ||
| 131 | /* | 147 | /* |
| @@ -288,7 +304,7 @@ static const struct reg_value ov5640_init_setting_30fps_VGA[] = { | |||
| 288 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0}, | 304 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0}, |
| 289 | {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0}, | 305 | {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0}, |
| 290 | {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0}, | 306 | {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0}, |
| 291 | {0x501f, 0x00, 0, 0}, {0x4713, 0x03, 0, 0}, {0x4407, 0x04, 0, 0}, | 307 | {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0}, |
| 292 | {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 308 | {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 293 | {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0}, | 309 | {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0}, |
| 294 | {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0}, | 310 | {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0}, |
| @@ -357,7 +373,7 @@ static const struct reg_value ov5640_setting_VGA_640_480[] = { | |||
| 357 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 373 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 358 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 374 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 359 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 375 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 360 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0}, | 376 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, |
| 361 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 377 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 362 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, | 378 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, |
| 363 | }; | 379 | }; |
| @@ -376,7 +392,7 @@ static const struct reg_value ov5640_setting_XGA_1024_768[] = { | |||
| 376 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 392 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 377 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 393 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 378 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 394 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 379 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0}, | 395 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, |
| 380 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 396 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 381 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, | 397 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, |
| 382 | }; | 398 | }; |
| @@ -395,7 +411,7 @@ static const struct reg_value ov5640_setting_QVGA_320_240[] = { | |||
| 395 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 411 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 396 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 412 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 397 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 413 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 398 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0}, | 414 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, |
| 399 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 415 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 400 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, | 416 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, |
| 401 | }; | 417 | }; |
| @@ -414,7 +430,7 @@ static const struct reg_value ov5640_setting_QCIF_176_144[] = { | |||
| 414 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 430 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 415 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 431 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 416 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 432 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 417 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0}, | 433 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, |
| 418 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 434 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 419 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, | 435 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, |
| 420 | }; | 436 | }; |
| @@ -433,7 +449,7 @@ static const struct reg_value ov5640_setting_NTSC_720_480[] = { | |||
| 433 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 449 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 434 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 450 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 435 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 451 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 436 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0}, | 452 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, |
| 437 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 453 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 438 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, | 454 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, |
| 439 | }; | 455 | }; |
| @@ -452,7 +468,7 @@ static const struct reg_value ov5640_setting_PAL_720_576[] = { | |||
| 452 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 468 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 453 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 469 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 454 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 470 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 455 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0}, | 471 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, |
| 456 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 472 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 457 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, | 473 | {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, |
| 458 | }; | 474 | }; |
| @@ -471,7 +487,7 @@ static const struct reg_value ov5640_setting_720P_1280_720[] = { | |||
| 471 | {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0}, | 487 | {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0}, |
| 472 | {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0}, | 488 | {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0}, |
| 473 | {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0}, | 489 | {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0}, |
| 474 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0}, | 490 | {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, |
| 475 | {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, | 491 | {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, |
| 476 | {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0}, | 492 | {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0}, |
| 477 | }; | 493 | }; |
| @@ -491,7 +507,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = { | |||
| 491 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 507 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 492 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 508 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 493 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 509 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 494 | {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0}, | 510 | {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, |
| 495 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 511 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 496 | {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0}, | 512 | {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0}, |
| 497 | {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0}, | 513 | {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0}, |
| @@ -503,7 +519,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = { | |||
| 503 | {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0}, | 519 | {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0}, |
| 504 | {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0}, | 520 | {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0}, |
| 505 | {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0}, | 521 | {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0}, |
| 506 | {0x3a15, 0x60, 0, 0}, {0x4713, 0x02, 0, 0}, {0x4407, 0x04, 0, 0}, | 522 | {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0}, |
| 507 | {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0}, | 523 | {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0}, |
| 508 | {0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0}, | 524 | {0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0}, |
| 509 | }; | 525 | }; |
| @@ -522,7 +538,7 @@ static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = { | |||
| 522 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, | 538 | {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, |
| 523 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, | 539 | {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, |
| 524 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, | 540 | {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, |
| 525 | {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0}, | 541 | {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, |
| 526 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, | 542 | {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, |
| 527 | {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70}, | 543 | {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70}, |
| 528 | }; | 544 | }; |
| @@ -705,7 +721,7 @@ static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg, | |||
| 705 | 721 | ||
| 706 | /* | 722 | /* |
| 707 | * After trying the various combinations, reading various | 723 | * After trying the various combinations, reading various |
| 708 | * documentations spreaded around the net, and from the various | 724 | * documentations spread around the net, and from the various |
| 709 | * feedback, the clock tree is probably as follows: | 725 | * feedback, the clock tree is probably as follows: |
| 710 | * | 726 | * |
| 711 | * +--------------+ | 727 | * +--------------+ |
| @@ -1030,12 +1046,42 @@ static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate) | |||
| 1030 | (ilog2(pclk_div) << 4)); | 1046 | (ilog2(pclk_div) << 4)); |
| 1031 | } | 1047 | } |
| 1032 | 1048 | ||
| 1049 | /* set JPEG framing sizes */ | ||
| 1050 | static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor, | ||
| 1051 | const struct ov5640_mode_info *mode) | ||
| 1052 | { | ||
| 1053 | int ret; | ||
| 1054 | |||
| 1055 | /* | ||
| 1056 | * compression mode 3 timing | ||
| 1057 | * | ||
| 1058 | * Data is transmitted with programmable width (VFIFO_HSIZE). | ||
| 1059 | * No padding done. Last line may have less data. Varying | ||
| 1060 | * number of lines per frame, depending on amount of data. | ||
| 1061 | */ | ||
| 1062 | ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3); | ||
| 1063 | if (ret < 0) | ||
| 1064 | return ret; | ||
| 1065 | |||
| 1066 | ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact); | ||
| 1067 | if (ret < 0) | ||
| 1068 | return ret; | ||
| 1069 | |||
| 1070 | return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact); | ||
| 1071 | } | ||
| 1072 | |||
| 1033 | /* download ov5640 settings to sensor through i2c */ | 1073 | /* download ov5640 settings to sensor through i2c */ |
| 1034 | static int ov5640_set_timings(struct ov5640_dev *sensor, | 1074 | static int ov5640_set_timings(struct ov5640_dev *sensor, |
| 1035 | const struct ov5640_mode_info *mode) | 1075 | const struct ov5640_mode_info *mode) |
| 1036 | { | 1076 | { |
| 1037 | int ret; | 1077 | int ret; |
| 1038 | 1078 | ||
| 1079 | if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) { | ||
| 1080 | ret = ov5640_set_jpeg_timings(sensor, mode); | ||
| 1081 | if (ret < 0) | ||
| 1082 | return ret; | ||
| 1083 | } | ||
| 1084 | |||
| 1039 | ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact); | 1085 | ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact); |
| 1040 | if (ret < 0) | 1086 | if (ret < 0) |
| 1041 | return ret; | 1087 | return ret; |
| @@ -1893,7 +1939,7 @@ static void ov5640_reset(struct ov5640_dev *sensor) | |||
| 1893 | usleep_range(1000, 2000); | 1939 | usleep_range(1000, 2000); |
| 1894 | 1940 | ||
| 1895 | gpiod_set_value_cansleep(sensor->reset_gpio, 0); | 1941 | gpiod_set_value_cansleep(sensor->reset_gpio, 0); |
| 1896 | usleep_range(5000, 10000); | 1942 | usleep_range(20000, 25000); |
| 1897 | } | 1943 | } |
| 1898 | 1944 | ||
| 1899 | static int ov5640_set_power_on(struct ov5640_dev *sensor) | 1945 | static int ov5640_set_power_on(struct ov5640_dev *sensor) |
| @@ -2059,7 +2105,7 @@ static int ov5640_try_frame_interval(struct ov5640_dev *sensor, | |||
| 2059 | u32 width, u32 height) | 2105 | u32 width, u32 height) |
| 2060 | { | 2106 | { |
| 2061 | const struct ov5640_mode_info *mode; | 2107 | const struct ov5640_mode_info *mode; |
| 2062 | enum ov5640_frame_rate rate = OV5640_30_FPS; | 2108 | enum ov5640_frame_rate rate = OV5640_15_FPS; |
| 2063 | int minfps, maxfps, best_fps, fps; | 2109 | int minfps, maxfps, best_fps, fps; |
| 2064 | int i; | 2110 | int i; |
| 2065 | 2111 | ||
| @@ -2200,46 +2246,67 @@ static int ov5640_set_framefmt(struct ov5640_dev *sensor, | |||
| 2200 | struct v4l2_mbus_framefmt *format) | 2246 | struct v4l2_mbus_framefmt *format) |
| 2201 | { | 2247 | { |
| 2202 | int ret = 0; | 2248 | int ret = 0; |
| 2203 | bool is_rgb = false; | ||
| 2204 | bool is_jpeg = false; | 2249 | bool is_jpeg = false; |
| 2205 | u8 val; | 2250 | u8 fmt, mux; |
| 2206 | 2251 | ||
| 2207 | switch (format->code) { | 2252 | switch (format->code) { |
| 2208 | case MEDIA_BUS_FMT_UYVY8_2X8: | 2253 | case MEDIA_BUS_FMT_UYVY8_2X8: |
| 2209 | /* YUV422, UYVY */ | 2254 | /* YUV422, UYVY */ |
| 2210 | val = 0x3f; | 2255 | fmt = 0x3f; |
| 2256 | mux = OV5640_FMT_MUX_YUV422; | ||
| 2211 | break; | 2257 | break; |
| 2212 | case MEDIA_BUS_FMT_YUYV8_2X8: | 2258 | case MEDIA_BUS_FMT_YUYV8_2X8: |
| 2213 | /* YUV422, YUYV */ | 2259 | /* YUV422, YUYV */ |
| 2214 | val = 0x30; | 2260 | fmt = 0x30; |
| 2261 | mux = OV5640_FMT_MUX_YUV422; | ||
| 2215 | break; | 2262 | break; |
| 2216 | case MEDIA_BUS_FMT_RGB565_2X8_LE: | 2263 | case MEDIA_BUS_FMT_RGB565_2X8_LE: |
| 2217 | /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */ | 2264 | /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */ |
| 2218 | val = 0x6F; | 2265 | fmt = 0x6F; |
| 2219 | is_rgb = true; | 2266 | mux = OV5640_FMT_MUX_RGB; |
| 2220 | break; | 2267 | break; |
| 2221 | case MEDIA_BUS_FMT_RGB565_2X8_BE: | 2268 | case MEDIA_BUS_FMT_RGB565_2X8_BE: |
| 2222 | /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */ | 2269 | /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */ |
| 2223 | val = 0x61; | 2270 | fmt = 0x61; |
| 2224 | is_rgb = true; | 2271 | mux = OV5640_FMT_MUX_RGB; |
| 2225 | break; | 2272 | break; |
| 2226 | case MEDIA_BUS_FMT_JPEG_1X8: | 2273 | case MEDIA_BUS_FMT_JPEG_1X8: |
| 2227 | /* YUV422, YUYV */ | 2274 | /* YUV422, YUYV */ |
| 2228 | val = 0x30; | 2275 | fmt = 0x30; |
| 2276 | mux = OV5640_FMT_MUX_YUV422; | ||
| 2229 | is_jpeg = true; | 2277 | is_jpeg = true; |
| 2230 | break; | 2278 | break; |
| 2279 | case MEDIA_BUS_FMT_SBGGR8_1X8: | ||
| 2280 | /* Raw, BGBG... / GRGR... */ | ||
| 2281 | fmt = 0x00; | ||
| 2282 | mux = OV5640_FMT_MUX_RAW_DPC; | ||
| 2283 | break; | ||
| 2284 | case MEDIA_BUS_FMT_SGBRG8_1X8: | ||
| 2285 | /* Raw bayer, GBGB... / RGRG... */ | ||
| 2286 | fmt = 0x01; | ||
| 2287 | mux = OV5640_FMT_MUX_RAW_DPC; | ||
| 2288 | break; | ||
| 2289 | case MEDIA_BUS_FMT_SGRBG8_1X8: | ||
| 2290 | /* Raw bayer, GRGR... / BGBG... */ | ||
| 2291 | fmt = 0x02; | ||
| 2292 | mux = OV5640_FMT_MUX_RAW_DPC; | ||
| 2293 | break; | ||
| 2294 | case MEDIA_BUS_FMT_SRGGB8_1X8: | ||
| 2295 | /* Raw bayer, RGRG... / GBGB... */ | ||
| 2296 | fmt = 0x03; | ||
| 2297 | mux = OV5640_FMT_MUX_RAW_DPC; | ||
| 2298 | break; | ||
| 2231 | default: | 2299 | default: |
| 2232 | return -EINVAL; | 2300 | return -EINVAL; |
| 2233 | } | 2301 | } |
| 2234 | 2302 | ||
| 2235 | /* FORMAT CONTROL00: YUV and RGB formatting */ | 2303 | /* FORMAT CONTROL00: YUV and RGB formatting */ |
| 2236 | ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, val); | 2304 | ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt); |
| 2237 | if (ret) | 2305 | if (ret) |
| 2238 | return ret; | 2306 | return ret; |
| 2239 | 2307 | ||
| 2240 | /* FORMAT MUX CONTROL: ISP YUV or RGB */ | 2308 | /* FORMAT MUX CONTROL: ISP YUV or RGB */ |
| 2241 | ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, | 2309 | ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux); |
| 2242 | is_rgb ? 0x01 : 0x00); | ||
| 2243 | if (ret) | 2310 | if (ret) |
| 2244 | return ret; | 2311 | return ret; |
| 2245 | 2312 | ||
| @@ -2407,10 +2474,41 @@ static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain) | |||
| 2407 | return ret; | 2474 | return ret; |
| 2408 | } | 2475 | } |
| 2409 | 2476 | ||
| 2477 | static const char * const test_pattern_menu[] = { | ||
| 2478 | "Disabled", | ||
| 2479 | "Color bars", | ||
| 2480 | "Color bars w/ rolling bar", | ||
| 2481 | "Color squares", | ||
| 2482 | "Color squares w/ rolling bar", | ||
| 2483 | }; | ||
| 2484 | |||
| 2485 | #define OV5640_TEST_ENABLE BIT(7) | ||
| 2486 | #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */ | ||
| 2487 | #define OV5640_TEST_TRANSPARENT BIT(5) | ||
| 2488 | #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */ | ||
| 2489 | #define OV5640_TEST_BAR_STANDARD (0 << 2) | ||
| 2490 | #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2) | ||
| 2491 | #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2) | ||
| 2492 | #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2) | ||
| 2493 | #define OV5640_TEST_BAR (0 << 0) | ||
| 2494 | #define OV5640_TEST_RANDOM (1 << 0) | ||
| 2495 | #define OV5640_TEST_SQUARE (2 << 0) | ||
| 2496 | #define OV5640_TEST_BLACK (3 << 0) | ||
| 2497 | |||
| 2498 | static const u8 test_pattern_val[] = { | ||
| 2499 | 0, | ||
| 2500 | OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 | | ||
| 2501 | OV5640_TEST_BAR, | ||
| 2502 | OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | | ||
| 2503 | OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR, | ||
| 2504 | OV5640_TEST_ENABLE | OV5640_TEST_SQUARE, | ||
| 2505 | OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE, | ||
| 2506 | }; | ||
| 2507 | |||
| 2410 | static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value) | 2508 | static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value) |
| 2411 | { | 2509 | { |
| 2412 | return ov5640_mod_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1, | 2510 | return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1, |
| 2413 | 0xa4, value ? 0xa4 : 0); | 2511 | test_pattern_val[value]); |
| 2414 | } | 2512 | } |
| 2415 | 2513 | ||
| 2416 | static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value) | 2514 | static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value) |
| @@ -2551,11 +2649,6 @@ static const struct v4l2_ctrl_ops ov5640_ctrl_ops = { | |||
| 2551 | .s_ctrl = ov5640_s_ctrl, | 2649 | .s_ctrl = ov5640_s_ctrl, |
| 2552 | }; | 2650 | }; |
| 2553 | 2651 | ||
| 2554 | static const char * const test_pattern_menu[] = { | ||
| 2555 | "Disabled", | ||
| 2556 | "Color bars", | ||
| 2557 | }; | ||
| 2558 | |||
| 2559 | static int ov5640_init_controls(struct ov5640_dev *sensor) | 2652 | static int ov5640_init_controls(struct ov5640_dev *sensor) |
| 2560 | { | 2653 | { |
| 2561 | const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops; | 2654 | const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops; |
diff --git a/drivers/media/i2c/ov6650.c b/drivers/media/i2c/ov6650.c index 5d1b218bb7f0..c33fd584cb44 100644 --- a/drivers/media/i2c/ov6650.c +++ b/drivers/media/i2c/ov6650.c | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | * Copyright (C) 2008 Magnus Damm | 15 | * Copyright (C) 2008 Magnus Damm |
| 16 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | 16 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> |
| 17 | * | 17 | * |
| 18 | * Hardware specific bits initialy based on former work by Matt Callow | 18 | * Hardware specific bits initially based on former work by Matt Callow |
| 19 | * drivers/media/video/omap/sensor_ov6650.c | 19 | * drivers/media/video/omap/sensor_ov6650.c |
| 20 | * Copyright (C) 2006 Matt Callow | 20 | * Copyright (C) 2006 Matt Callow |
| 21 | * | 21 | * |
| @@ -759,7 +759,7 @@ static int ov6650_s_frame_interval(struct v4l2_subdev *sd, | |||
| 759 | 759 | ||
| 760 | /* | 760 | /* |
| 761 | * Keep result to be used as tpf limit | 761 | * Keep result to be used as tpf limit |
| 762 | * for subseqent clock divider calculations | 762 | * for subsequent clock divider calculations |
| 763 | */ | 763 | */ |
| 764 | priv->tpf.numerator = div; | 764 | priv->tpf.numerator = div; |
| 765 | priv->tpf.denominator = FRAME_RATE_MAX; | 765 | priv->tpf.denominator = FRAME_RATE_MAX; |
diff --git a/drivers/media/i2c/ov7670.c b/drivers/media/i2c/ov7670.c index a70a6ff7b36e..a7d26b294eb5 100644 --- a/drivers/media/i2c/ov7670.c +++ b/drivers/media/i2c/ov7670.c | |||
| @@ -160,10 +160,10 @@ MODULE_PARM_DESC(debug, "Debug level (0-1)"); | |||
| 160 | #define REG_GFIX 0x69 /* Fix gain control */ | 160 | #define REG_GFIX 0x69 /* Fix gain control */ |
| 161 | 161 | ||
| 162 | #define REG_DBLV 0x6b /* PLL control an debugging */ | 162 | #define REG_DBLV 0x6b /* PLL control an debugging */ |
| 163 | #define DBLV_BYPASS 0x00 /* Bypass PLL */ | 163 | #define DBLV_BYPASS 0x0a /* Bypass PLL */ |
| 164 | #define DBLV_X4 0x01 /* clock x4 */ | 164 | #define DBLV_X4 0x4a /* clock x4 */ |
| 165 | #define DBLV_X6 0x10 /* clock x6 */ | 165 | #define DBLV_X6 0x8a /* clock x6 */ |
| 166 | #define DBLV_X8 0x11 /* clock x8 */ | 166 | #define DBLV_X8 0xca /* clock x8 */ |
| 167 | 167 | ||
| 168 | #define REG_SCALING_XSC 0x70 /* Test pattern and horizontal scale factor */ | 168 | #define REG_SCALING_XSC 0x70 /* Test pattern and horizontal scale factor */ |
| 169 | #define TEST_PATTTERN_0 0x80 | 169 | #define TEST_PATTTERN_0 0x80 |
| @@ -241,7 +241,9 @@ struct ov7670_info { | |||
| 241 | }; | 241 | }; |
| 242 | struct v4l2_mbus_framefmt format; | 242 | struct v4l2_mbus_framefmt format; |
| 243 | struct ov7670_format_struct *fmt; /* Current format */ | 243 | struct ov7670_format_struct *fmt; /* Current format */ |
| 244 | struct ov7670_win_size *wsize; | ||
| 244 | struct clk *clk; | 245 | struct clk *clk; |
| 246 | int on; | ||
| 245 | struct gpio_desc *resetb_gpio; | 247 | struct gpio_desc *resetb_gpio; |
| 246 | struct gpio_desc *pwdn_gpio; | 248 | struct gpio_desc *pwdn_gpio; |
| 247 | unsigned int mbus_config; /* Media bus configuration flags */ | 249 | unsigned int mbus_config; /* Media bus configuration flags */ |
| @@ -810,13 +812,25 @@ static void ov7675_get_framerate(struct v4l2_subdev *sd, | |||
| 810 | (4 * clkrc); | 812 | (4 * clkrc); |
| 811 | } | 813 | } |
| 812 | 814 | ||
| 815 | static int ov7675_apply_framerate(struct v4l2_subdev *sd) | ||
| 816 | { | ||
| 817 | struct ov7670_info *info = to_state(sd); | ||
| 818 | int ret; | ||
| 819 | |||
| 820 | ret = ov7670_write(sd, REG_CLKRC, info->clkrc); | ||
| 821 | if (ret < 0) | ||
| 822 | return ret; | ||
| 823 | |||
| 824 | return ov7670_write(sd, REG_DBLV, | ||
| 825 | info->pll_bypass ? DBLV_BYPASS : DBLV_X4); | ||
| 826 | } | ||
| 827 | |||
| 813 | static int ov7675_set_framerate(struct v4l2_subdev *sd, | 828 | static int ov7675_set_framerate(struct v4l2_subdev *sd, |
| 814 | struct v4l2_fract *tpf) | 829 | struct v4l2_fract *tpf) |
| 815 | { | 830 | { |
| 816 | struct ov7670_info *info = to_state(sd); | 831 | struct ov7670_info *info = to_state(sd); |
| 817 | u32 clkrc; | 832 | u32 clkrc; |
| 818 | int pll_factor; | 833 | int pll_factor; |
| 819 | int ret; | ||
| 820 | 834 | ||
| 821 | /* | 835 | /* |
| 822 | * The formula is fps = 5/4*pixclk for YUV/RGB and | 836 | * The formula is fps = 5/4*pixclk for YUV/RGB and |
| @@ -825,19 +839,10 @@ static int ov7675_set_framerate(struct v4l2_subdev *sd, | |||
| 825 | * pixclk = clock_speed / (clkrc + 1) * PLLfactor | 839 | * pixclk = clock_speed / (clkrc + 1) * PLLfactor |
| 826 | * | 840 | * |
| 827 | */ | 841 | */ |
| 828 | if (info->pll_bypass) { | ||
| 829 | pll_factor = 1; | ||
| 830 | ret = ov7670_write(sd, REG_DBLV, DBLV_BYPASS); | ||
| 831 | } else { | ||
| 832 | pll_factor = PLL_FACTOR; | ||
| 833 | ret = ov7670_write(sd, REG_DBLV, DBLV_X4); | ||
| 834 | } | ||
| 835 | if (ret < 0) | ||
| 836 | return ret; | ||
| 837 | |||
| 838 | if (tpf->numerator == 0 || tpf->denominator == 0) { | 842 | if (tpf->numerator == 0 || tpf->denominator == 0) { |
| 839 | clkrc = 0; | 843 | clkrc = 0; |
| 840 | } else { | 844 | } else { |
| 845 | pll_factor = info->pll_bypass ? 1 : PLL_FACTOR; | ||
| 841 | clkrc = (5 * pll_factor * info->clock_speed * tpf->numerator) / | 846 | clkrc = (5 * pll_factor * info->clock_speed * tpf->numerator) / |
| 842 | (4 * tpf->denominator); | 847 | (4 * tpf->denominator); |
| 843 | if (info->fmt->mbus_code == MEDIA_BUS_FMT_SBGGR8_1X8) | 848 | if (info->fmt->mbus_code == MEDIA_BUS_FMT_SBGGR8_1X8) |
| @@ -859,11 +864,7 @@ static int ov7675_set_framerate(struct v4l2_subdev *sd, | |||
| 859 | /* Recalculate frame rate */ | 864 | /* Recalculate frame rate */ |
| 860 | ov7675_get_framerate(sd, tpf); | 865 | ov7675_get_framerate(sd, tpf); |
| 861 | 866 | ||
| 862 | ret = ov7670_write(sd, REG_CLKRC, info->clkrc); | 867 | return ov7675_apply_framerate(sd); |
| 863 | if (ret < 0) | ||
| 864 | return ret; | ||
| 865 | |||
| 866 | return ov7670_write(sd, REG_DBLV, DBLV_X4); | ||
| 867 | } | 868 | } |
| 868 | 869 | ||
| 869 | static void ov7670_get_framerate_legacy(struct v4l2_subdev *sd, | 870 | static void ov7670_get_framerate_legacy(struct v4l2_subdev *sd, |
| @@ -1004,48 +1005,20 @@ static int ov7670_try_fmt_internal(struct v4l2_subdev *sd, | |||
| 1004 | return 0; | 1005 | return 0; |
| 1005 | } | 1006 | } |
| 1006 | 1007 | ||
| 1007 | /* | 1008 | static int ov7670_apply_fmt(struct v4l2_subdev *sd) |
| 1008 | * Set a format. | ||
| 1009 | */ | ||
| 1010 | static int ov7670_set_fmt(struct v4l2_subdev *sd, | ||
| 1011 | struct v4l2_subdev_pad_config *cfg, | ||
| 1012 | struct v4l2_subdev_format *format) | ||
| 1013 | { | 1009 | { |
| 1014 | struct ov7670_format_struct *ovfmt; | ||
| 1015 | struct ov7670_win_size *wsize; | ||
| 1016 | struct ov7670_info *info = to_state(sd); | 1010 | struct ov7670_info *info = to_state(sd); |
| 1017 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API | 1011 | struct ov7670_win_size *wsize = info->wsize; |
| 1018 | struct v4l2_mbus_framefmt *mbus_fmt; | ||
| 1019 | #endif | ||
| 1020 | unsigned char com7, com10 = 0; | 1012 | unsigned char com7, com10 = 0; |
| 1021 | int ret; | 1013 | int ret; |
| 1022 | 1014 | ||
| 1023 | if (format->pad) | ||
| 1024 | return -EINVAL; | ||
| 1025 | |||
| 1026 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | ||
| 1027 | ret = ov7670_try_fmt_internal(sd, &format->format, NULL, NULL); | ||
| 1028 | if (ret) | ||
| 1029 | return ret; | ||
| 1030 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API | ||
| 1031 | mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad); | ||
| 1032 | *mbus_fmt = format->format; | ||
| 1033 | return 0; | ||
| 1034 | #else | ||
| 1035 | return -ENOTTY; | ||
| 1036 | #endif | ||
| 1037 | } | ||
| 1038 | |||
| 1039 | ret = ov7670_try_fmt_internal(sd, &format->format, &ovfmt, &wsize); | ||
| 1040 | if (ret) | ||
| 1041 | return ret; | ||
| 1042 | /* | 1015 | /* |
| 1043 | * COM7 is a pain in the ass, it doesn't like to be read then | 1016 | * COM7 is a pain in the ass, it doesn't like to be read then |
| 1044 | * quickly written afterward. But we have everything we need | 1017 | * quickly written afterward. But we have everything we need |
| 1045 | * to set it absolutely here, as long as the format-specific | 1018 | * to set it absolutely here, as long as the format-specific |
| 1046 | * register sets list it first. | 1019 | * register sets list it first. |
| 1047 | */ | 1020 | */ |
| 1048 | com7 = ovfmt->regs[0].value; | 1021 | com7 = info->fmt->regs[0].value; |
| 1049 | com7 |= wsize->com7_bit; | 1022 | com7 |= wsize->com7_bit; |
| 1050 | ret = ov7670_write(sd, REG_COM7, com7); | 1023 | ret = ov7670_write(sd, REG_COM7, com7); |
| 1051 | if (ret) | 1024 | if (ret) |
| @@ -1067,7 +1040,7 @@ static int ov7670_set_fmt(struct v4l2_subdev *sd, | |||
| 1067 | /* | 1040 | /* |
| 1068 | * Now write the rest of the array. Also store start/stops | 1041 | * Now write the rest of the array. Also store start/stops |
| 1069 | */ | 1042 | */ |
| 1070 | ret = ov7670_write_array(sd, ovfmt->regs + 1); | 1043 | ret = ov7670_write_array(sd, info->fmt->regs + 1); |
| 1071 | if (ret) | 1044 | if (ret) |
| 1072 | return ret; | 1045 | return ret; |
| 1073 | 1046 | ||
| @@ -1082,8 +1055,6 @@ static int ov7670_set_fmt(struct v4l2_subdev *sd, | |||
| 1082 | return ret; | 1055 | return ret; |
| 1083 | } | 1056 | } |
| 1084 | 1057 | ||
| 1085 | info->fmt = ovfmt; | ||
| 1086 | |||
| 1087 | /* | 1058 | /* |
| 1088 | * If we're running RGB565, we must rewrite clkrc after setting | 1059 | * If we're running RGB565, we must rewrite clkrc after setting |
| 1089 | * the other parameters or the image looks poor. If we're *not* | 1060 | * the other parameters or the image looks poor. If we're *not* |
| @@ -1101,6 +1072,46 @@ static int ov7670_set_fmt(struct v4l2_subdev *sd, | |||
| 1101 | return 0; | 1072 | return 0; |
| 1102 | } | 1073 | } |
| 1103 | 1074 | ||
| 1075 | /* | ||
| 1076 | * Set a format. | ||
| 1077 | */ | ||
| 1078 | static int ov7670_set_fmt(struct v4l2_subdev *sd, | ||
| 1079 | struct v4l2_subdev_pad_config *cfg, | ||
| 1080 | struct v4l2_subdev_format *format) | ||
| 1081 | { | ||
| 1082 | struct ov7670_info *info = to_state(sd); | ||
| 1083 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API | ||
| 1084 | struct v4l2_mbus_framefmt *mbus_fmt; | ||
| 1085 | #endif | ||
| 1086 | int ret; | ||
| 1087 | |||
| 1088 | if (format->pad) | ||
| 1089 | return -EINVAL; | ||
| 1090 | |||
| 1091 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | ||
| 1092 | ret = ov7670_try_fmt_internal(sd, &format->format, NULL, NULL); | ||
| 1093 | if (ret) | ||
| 1094 | return ret; | ||
| 1095 | #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API | ||
| 1096 | mbus_fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad); | ||
| 1097 | *mbus_fmt = format->format; | ||
| 1098 | return 0; | ||
| 1099 | #else | ||
| 1100 | return -ENOTTY; | ||
| 1101 | #endif | ||
| 1102 | } | ||
| 1103 | |||
| 1104 | ret = ov7670_try_fmt_internal(sd, &format->format, &info->fmt, &info->wsize); | ||
| 1105 | if (ret) | ||
| 1106 | return ret; | ||
| 1107 | |||
| 1108 | ret = ov7670_apply_fmt(sd); | ||
| 1109 | if (ret) | ||
| 1110 | return ret; | ||
| 1111 | |||
| 1112 | return 0; | ||
| 1113 | } | ||
| 1114 | |||
| 1104 | static int ov7670_get_fmt(struct v4l2_subdev *sd, | 1115 | static int ov7670_get_fmt(struct v4l2_subdev *sd, |
| 1105 | struct v4l2_subdev_pad_config *cfg, | 1116 | struct v4l2_subdev_pad_config *cfg, |
| 1106 | struct v4l2_subdev_format *format) | 1117 | struct v4l2_subdev_format *format) |
| @@ -1607,17 +1618,57 @@ static int ov7670_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_regis | |||
| 1607 | } | 1618 | } |
| 1608 | #endif | 1619 | #endif |
| 1609 | 1620 | ||
| 1610 | static int ov7670_s_power(struct v4l2_subdev *sd, int on) | 1621 | static void ov7670_power_on(struct v4l2_subdev *sd) |
| 1611 | { | 1622 | { |
| 1612 | struct ov7670_info *info = to_state(sd); | 1623 | struct ov7670_info *info = to_state(sd); |
| 1613 | 1624 | ||
| 1625 | if (info->on) | ||
| 1626 | return; | ||
| 1627 | |||
| 1628 | clk_prepare_enable(info->clk); | ||
| 1629 | |||
| 1614 | if (info->pwdn_gpio) | 1630 | if (info->pwdn_gpio) |
| 1615 | gpiod_set_value(info->pwdn_gpio, !on); | 1631 | gpiod_set_value(info->pwdn_gpio, 0); |
| 1616 | if (on && info->resetb_gpio) { | 1632 | if (info->resetb_gpio) { |
| 1617 | gpiod_set_value(info->resetb_gpio, 1); | 1633 | gpiod_set_value(info->resetb_gpio, 1); |
| 1618 | usleep_range(500, 1000); | 1634 | usleep_range(500, 1000); |
| 1619 | gpiod_set_value(info->resetb_gpio, 0); | 1635 | gpiod_set_value(info->resetb_gpio, 0); |
| 1636 | } | ||
| 1637 | if (info->pwdn_gpio || info->resetb_gpio || info->clk) | ||
| 1620 | usleep_range(3000, 5000); | 1638 | usleep_range(3000, 5000); |
| 1639 | |||
| 1640 | info->on = true; | ||
| 1641 | } | ||
| 1642 | |||
| 1643 | static void ov7670_power_off(struct v4l2_subdev *sd) | ||
| 1644 | { | ||
| 1645 | struct ov7670_info *info = to_state(sd); | ||
| 1646 | |||
| 1647 | if (!info->on) | ||
| 1648 | return; | ||
| 1649 | |||
| 1650 | clk_disable_unprepare(info->clk); | ||
| 1651 | |||
| 1652 | if (info->pwdn_gpio) | ||
| 1653 | gpiod_set_value(info->pwdn_gpio, 1); | ||
| 1654 | |||
| 1655 | info->on = false; | ||
| 1656 | } | ||
| 1657 | |||
| 1658 | static int ov7670_s_power(struct v4l2_subdev *sd, int on) | ||
| 1659 | { | ||
| 1660 | struct ov7670_info *info = to_state(sd); | ||
| 1661 | |||
| 1662 | if (info->on == on) | ||
| 1663 | return 0; | ||
| 1664 | |||
| 1665 | if (on) { | ||
| 1666 | ov7670_power_on (sd); | ||
| 1667 | ov7670_apply_fmt(sd); | ||
| 1668 | ov7675_apply_framerate(sd); | ||
| 1669 | v4l2_ctrl_handler_setup(&info->hdl); | ||
| 1670 | } else { | ||
| 1671 | ov7670_power_off (sd); | ||
| 1621 | } | 1672 | } |
| 1622 | 1673 | ||
| 1623 | return 0; | 1674 | return 0; |
| @@ -1652,6 +1703,7 @@ static int ov7670_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) | |||
| 1652 | static const struct v4l2_subdev_core_ops ov7670_core_ops = { | 1703 | static const struct v4l2_subdev_core_ops ov7670_core_ops = { |
| 1653 | .reset = ov7670_reset, | 1704 | .reset = ov7670_reset, |
| 1654 | .init = ov7670_init, | 1705 | .init = ov7670_init, |
| 1706 | .s_power = ov7670_s_power, | ||
| 1655 | .log_status = v4l2_ctrl_subdev_log_status, | 1707 | .log_status = v4l2_ctrl_subdev_log_status, |
| 1656 | .subscribe_event = v4l2_ctrl_subdev_subscribe_event, | 1708 | .subscribe_event = v4l2_ctrl_subdev_subscribe_event, |
| 1657 | .unsubscribe_event = v4l2_event_subdev_unsubscribe, | 1709 | .unsubscribe_event = v4l2_event_subdev_unsubscribe, |
| @@ -1801,11 +1853,7 @@ static int ov7670_probe(struct i2c_client *client, | |||
| 1801 | if (config->clock_speed) | 1853 | if (config->clock_speed) |
| 1802 | info->clock_speed = config->clock_speed; | 1854 | info->clock_speed = config->clock_speed; |
| 1803 | 1855 | ||
| 1804 | /* | 1856 | if (config->pll_bypass) |
| 1805 | * It should be allowed for ov7670 too when it is migrated to | ||
| 1806 | * the new frame rate formula. | ||
| 1807 | */ | ||
| 1808 | if (config->pll_bypass && id->driver_data != MODEL_OV7670) | ||
| 1809 | info->pll_bypass = true; | 1857 | info->pll_bypass = true; |
| 1810 | 1858 | ||
| 1811 | if (config->pclk_hb_disable) | 1859 | if (config->pclk_hb_disable) |
| @@ -1820,24 +1868,21 @@ static int ov7670_probe(struct i2c_client *client, | |||
| 1820 | else | 1868 | else |
| 1821 | return ret; | 1869 | return ret; |
| 1822 | } | 1870 | } |
| 1823 | if (info->clk) { | ||
| 1824 | ret = clk_prepare_enable(info->clk); | ||
| 1825 | if (ret) | ||
| 1826 | return ret; | ||
| 1827 | 1871 | ||
| 1872 | ret = ov7670_init_gpio(client, info); | ||
| 1873 | if (ret) | ||
| 1874 | return ret; | ||
| 1875 | |||
| 1876 | ov7670_power_on(sd); | ||
| 1877 | |||
| 1878 | if (info->clk) { | ||
| 1828 | info->clock_speed = clk_get_rate(info->clk) / 1000000; | 1879 | info->clock_speed = clk_get_rate(info->clk) / 1000000; |
| 1829 | if (info->clock_speed < 10 || info->clock_speed > 48) { | 1880 | if (info->clock_speed < 10 || info->clock_speed > 48) { |
| 1830 | ret = -EINVAL; | 1881 | ret = -EINVAL; |
| 1831 | goto clk_disable; | 1882 | goto power_off; |
| 1832 | } | 1883 | } |
| 1833 | } | 1884 | } |
| 1834 | 1885 | ||
| 1835 | ret = ov7670_init_gpio(client, info); | ||
| 1836 | if (ret) | ||
| 1837 | goto clk_disable; | ||
| 1838 | |||
| 1839 | ov7670_s_power(sd, 1); | ||
| 1840 | |||
| 1841 | /* Make sure it's an ov7670 */ | 1886 | /* Make sure it's an ov7670 */ |
| 1842 | ret = ov7670_detect(sd); | 1887 | ret = ov7670_detect(sd); |
| 1843 | if (ret) { | 1888 | if (ret) { |
| @@ -1851,6 +1896,7 @@ static int ov7670_probe(struct i2c_client *client, | |||
| 1851 | 1896 | ||
| 1852 | info->devtype = &ov7670_devdata[id->driver_data]; | 1897 | info->devtype = &ov7670_devdata[id->driver_data]; |
| 1853 | info->fmt = &ov7670_formats[0]; | 1898 | info->fmt = &ov7670_formats[0]; |
| 1899 | info->wsize = &info->devtype->win_sizes[0]; | ||
| 1854 | 1900 | ||
| 1855 | ov7670_get_default_format(sd, &info->format); | 1901 | ov7670_get_default_format(sd, &info->format); |
| 1856 | 1902 | ||
| @@ -1916,6 +1962,7 @@ static int ov7670_probe(struct i2c_client *client, | |||
| 1916 | if (ret < 0) | 1962 | if (ret < 0) |
| 1917 | goto entity_cleanup; | 1963 | goto entity_cleanup; |
| 1918 | 1964 | ||
| 1965 | ov7670_power_off(sd); | ||
| 1919 | return 0; | 1966 | return 0; |
| 1920 | 1967 | ||
| 1921 | entity_cleanup: | 1968 | entity_cleanup: |
| @@ -1923,13 +1970,10 @@ entity_cleanup: | |||
| 1923 | hdl_free: | 1970 | hdl_free: |
| 1924 | v4l2_ctrl_handler_free(&info->hdl); | 1971 | v4l2_ctrl_handler_free(&info->hdl); |
| 1925 | power_off: | 1972 | power_off: |
| 1926 | ov7670_s_power(sd, 0); | 1973 | ov7670_power_off(sd); |
| 1927 | clk_disable: | ||
| 1928 | clk_disable_unprepare(info->clk); | ||
| 1929 | return ret; | 1974 | return ret; |
| 1930 | } | 1975 | } |
| 1931 | 1976 | ||
| 1932 | |||
| 1933 | static int ov7670_remove(struct i2c_client *client) | 1977 | static int ov7670_remove(struct i2c_client *client) |
| 1934 | { | 1978 | { |
| 1935 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | 1979 | struct v4l2_subdev *sd = i2c_get_clientdata(client); |
| @@ -1937,9 +1981,8 @@ static int ov7670_remove(struct i2c_client *client) | |||
| 1937 | 1981 | ||
| 1938 | v4l2_async_unregister_subdev(sd); | 1982 | v4l2_async_unregister_subdev(sd); |
| 1939 | v4l2_ctrl_handler_free(&info->hdl); | 1983 | v4l2_ctrl_handler_free(&info->hdl); |
| 1940 | clk_disable_unprepare(info->clk); | ||
| 1941 | media_entity_cleanup(&info->sd.entity); | 1984 | media_entity_cleanup(&info->sd.entity); |
| 1942 | ov7670_s_power(sd, 0); | 1985 | ov7670_power_off(sd); |
| 1943 | return 0; | 1986 | return 0; |
| 1944 | } | 1987 | } |
| 1945 | 1988 | ||
diff --git a/drivers/media/i2c/ov7740.c b/drivers/media/i2c/ov7740.c index 177688afd9a6..dfece91ce96b 100644 --- a/drivers/media/i2c/ov7740.c +++ b/drivers/media/i2c/ov7740.c | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | #define REG_BGAIN 0x01 /* blue gain */ | 20 | #define REG_BGAIN 0x01 /* blue gain */ |
| 21 | #define REG_RGAIN 0x02 /* red gain */ | 21 | #define REG_RGAIN 0x02 /* red gain */ |
| 22 | #define REG_GGAIN 0x03 /* green gain */ | 22 | #define REG_GGAIN 0x03 /* green gain */ |
| 23 | #define REG_REG04 0x04 /* analog setting, dont change*/ | 23 | #define REG_REG04 0x04 /* analog setting, don't change*/ |
| 24 | #define REG_BAVG 0x05 /* b channel average */ | 24 | #define REG_BAVG 0x05 /* b channel average */ |
| 25 | #define REG_GAVG 0x06 /* g channel average */ | 25 | #define REG_GAVG 0x06 /* g channel average */ |
| 26 | #define REG_RAVG 0x07 /* r channel average */ | 26 | #define REG_RAVG 0x07 /* r channel average */ |
| @@ -1101,6 +1101,9 @@ static int ov7740_probe(struct i2c_client *client, | |||
| 1101 | if (ret) | 1101 | if (ret) |
| 1102 | return ret; | 1102 | return ret; |
| 1103 | 1103 | ||
| 1104 | pm_runtime_set_active(&client->dev); | ||
| 1105 | pm_runtime_enable(&client->dev); | ||
| 1106 | |||
| 1104 | ret = ov7740_detect(ov7740); | 1107 | ret = ov7740_detect(ov7740); |
| 1105 | if (ret) | 1108 | if (ret) |
| 1106 | goto error_detect; | 1109 | goto error_detect; |
| @@ -1123,8 +1126,6 @@ static int ov7740_probe(struct i2c_client *client, | |||
| 1123 | if (ret) | 1126 | if (ret) |
| 1124 | goto error_async_register; | 1127 | goto error_async_register; |
| 1125 | 1128 | ||
| 1126 | pm_runtime_set_active(&client->dev); | ||
| 1127 | pm_runtime_enable(&client->dev); | ||
| 1128 | pm_runtime_idle(&client->dev); | 1129 | pm_runtime_idle(&client->dev); |
| 1129 | 1130 | ||
| 1130 | return 0; | 1131 | return 0; |
| @@ -1134,6 +1135,8 @@ error_async_register: | |||
| 1134 | error_init_controls: | 1135 | error_init_controls: |
| 1135 | ov7740_free_controls(ov7740); | 1136 | ov7740_free_controls(ov7740); |
| 1136 | error_detect: | 1137 | error_detect: |
| 1138 | pm_runtime_disable(&client->dev); | ||
| 1139 | pm_runtime_set_suspended(&client->dev); | ||
| 1137 | ov7740_set_power(ov7740, 0); | 1140 | ov7740_set_power(ov7740, 0); |
| 1138 | media_entity_cleanup(&ov7740->subdev.entity); | 1141 | media_entity_cleanup(&ov7740->subdev.entity); |
| 1139 | 1142 | ||
diff --git a/drivers/media/i2c/ov8856.c b/drivers/media/i2c/ov8856.c new file mode 100644 index 000000000000..dbf1095b9440 --- /dev/null +++ b/drivers/media/i2c/ov8856.c | |||
| @@ -0,0 +1,1268 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | // Copyright (c) 2019 Intel Corporation. | ||
| 3 | |||
| 4 | #include <asm/unaligned.h> | ||
| 5 | #include <linux/acpi.h> | ||
| 6 | #include <linux/delay.h> | ||
| 7 | #include <linux/i2c.h> | ||
| 8 | #include <linux/module.h> | ||
| 9 | #include <linux/pm_runtime.h> | ||
| 10 | #include <media/v4l2-ctrls.h> | ||
| 11 | #include <media/v4l2-device.h> | ||
| 12 | #include <media/v4l2-fwnode.h> | ||
| 13 | |||
| 14 | #define OV8856_REG_VALUE_08BIT 1 | ||
| 15 | #define OV8856_REG_VALUE_16BIT 2 | ||
| 16 | #define OV8856_REG_VALUE_24BIT 3 | ||
| 17 | |||
| 18 | #define OV8856_LINK_FREQ_360MHZ 360000000ULL | ||
| 19 | #define OV8856_LINK_FREQ_180MHZ 180000000ULL | ||
| 20 | #define OV8856_SCLK 144000000ULL | ||
| 21 | #define OV8856_MCLK 19200000 | ||
| 22 | #define OV8856_DATA_LANES 4 | ||
| 23 | #define OV8856_RGB_DEPTH 10 | ||
| 24 | |||
| 25 | #define OV8856_REG_CHIP_ID 0x300a | ||
| 26 | #define OV8856_CHIP_ID 0x00885a | ||
| 27 | |||
| 28 | #define OV8856_REG_MODE_SELECT 0x0100 | ||
| 29 | #define OV8856_MODE_STANDBY 0x00 | ||
| 30 | #define OV8856_MODE_STREAMING 0x01 | ||
| 31 | |||
| 32 | /* vertical-timings from sensor */ | ||
| 33 | #define OV8856_REG_VTS 0x380e | ||
| 34 | #define OV8856_VTS_MAX 0x7fff | ||
| 35 | |||
| 36 | /* horizontal-timings from sensor */ | ||
| 37 | #define OV8856_REG_HTS 0x380c | ||
| 38 | |||
| 39 | /* Exposure controls from sensor */ | ||
| 40 | #define OV8856_REG_EXPOSURE 0x3500 | ||
| 41 | #define OV8856_EXPOSURE_MIN 6 | ||
| 42 | #define OV8856_EXPOSURE_MAX_MARGIN 6 | ||
| 43 | #define OV8856_EXPOSURE_STEP 1 | ||
| 44 | |||
| 45 | /* Analog gain controls from sensor */ | ||
| 46 | #define OV8856_REG_ANALOG_GAIN 0x3508 | ||
| 47 | #define OV8856_ANAL_GAIN_MIN 128 | ||
| 48 | #define OV8856_ANAL_GAIN_MAX 2047 | ||
| 49 | #define OV8856_ANAL_GAIN_STEP 1 | ||
| 50 | |||
| 51 | /* Digital gain controls from sensor */ | ||
| 52 | #define OV8856_REG_MWB_R_GAIN 0x5019 | ||
| 53 | #define OV8856_REG_MWB_G_GAIN 0x501b | ||
| 54 | #define OV8856_REG_MWB_B_GAIN 0x501d | ||
| 55 | #define OV8856_DGTL_GAIN_MIN 0 | ||
| 56 | #define OV8856_DGTL_GAIN_MAX 4095 | ||
| 57 | #define OV8856_DGTL_GAIN_STEP 1 | ||
| 58 | #define OV8856_DGTL_GAIN_DEFAULT 1024 | ||
| 59 | |||
| 60 | /* Test Pattern Control */ | ||
| 61 | #define OV8856_REG_TEST_PATTERN 0x5e00 | ||
| 62 | #define OV8856_TEST_PATTERN_ENABLE BIT(7) | ||
| 63 | #define OV8856_TEST_PATTERN_BAR_SHIFT 2 | ||
| 64 | |||
| 65 | #define to_ov8856(_sd) container_of(_sd, struct ov8856, sd) | ||
| 66 | |||
| 67 | enum { | ||
| 68 | OV8856_LINK_FREQ_720MBPS, | ||
| 69 | OV8856_LINK_FREQ_360MBPS, | ||
| 70 | }; | ||
| 71 | |||
| 72 | struct ov8856_reg { | ||
| 73 | u16 address; | ||
| 74 | u8 val; | ||
| 75 | }; | ||
| 76 | |||
| 77 | struct ov8856_reg_list { | ||
| 78 | u32 num_of_regs; | ||
| 79 | const struct ov8856_reg *regs; | ||
| 80 | }; | ||
| 81 | |||
| 82 | struct ov8856_link_freq_config { | ||
| 83 | const struct ov8856_reg_list reg_list; | ||
| 84 | }; | ||
| 85 | |||
| 86 | struct ov8856_mode { | ||
| 87 | /* Frame width in pixels */ | ||
| 88 | u32 width; | ||
| 89 | |||
| 90 | /* Frame height in pixels */ | ||
| 91 | u32 height; | ||
| 92 | |||
| 93 | /* Horizontal timining size */ | ||
| 94 | u32 hts; | ||
| 95 | |||
| 96 | /* Default vertical timining size */ | ||
| 97 | u32 vts_def; | ||
| 98 | |||
| 99 | /* Min vertical timining size */ | ||
| 100 | u32 vts_min; | ||
| 101 | |||
| 102 | /* Link frequency needed for this resolution */ | ||
| 103 | u32 link_freq_index; | ||
| 104 | |||
| 105 | /* Sensor register settings for this resolution */ | ||
| 106 | const struct ov8856_reg_list reg_list; | ||
| 107 | }; | ||
| 108 | |||
| 109 | static const struct ov8856_reg mipi_data_rate_720mbps[] = { | ||
| 110 | {0x0103, 0x01}, | ||
| 111 | {0x0100, 0x00}, | ||
| 112 | {0x0302, 0x4b}, | ||
| 113 | {0x0303, 0x01}, | ||
| 114 | {0x030b, 0x02}, | ||
| 115 | {0x030d, 0x4b}, | ||
| 116 | {0x031e, 0x0c}, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static const struct ov8856_reg mipi_data_rate_360mbps[] = { | ||
| 120 | {0x0103, 0x01}, | ||
| 121 | {0x0100, 0x00}, | ||
| 122 | {0x0302, 0x4b}, | ||
| 123 | {0x0303, 0x03}, | ||
| 124 | {0x030b, 0x02}, | ||
| 125 | {0x030d, 0x4b}, | ||
| 126 | {0x031e, 0x0c}, | ||
| 127 | }; | ||
| 128 | |||
| 129 | static const struct ov8856_reg mode_3280x2464_regs[] = { | ||
| 130 | {0x3000, 0x20}, | ||
| 131 | {0x3003, 0x08}, | ||
| 132 | {0x300e, 0x20}, | ||
| 133 | {0x3010, 0x00}, | ||
| 134 | {0x3015, 0x84}, | ||
| 135 | {0x3018, 0x72}, | ||
| 136 | {0x3021, 0x23}, | ||
| 137 | {0x3033, 0x24}, | ||
| 138 | {0x3500, 0x00}, | ||
| 139 | {0x3501, 0x9a}, | ||
| 140 | {0x3502, 0x20}, | ||
| 141 | {0x3503, 0x08}, | ||
| 142 | {0x3505, 0x83}, | ||
| 143 | {0x3508, 0x01}, | ||
| 144 | {0x3509, 0x80}, | ||
| 145 | {0x350c, 0x00}, | ||
| 146 | {0x350d, 0x80}, | ||
| 147 | {0x350e, 0x04}, | ||
| 148 | {0x350f, 0x00}, | ||
| 149 | {0x3510, 0x00}, | ||
| 150 | {0x3511, 0x02}, | ||
| 151 | {0x3512, 0x00}, | ||
| 152 | {0x3600, 0x72}, | ||
| 153 | {0x3601, 0x40}, | ||
| 154 | {0x3602, 0x30}, | ||
| 155 | {0x3610, 0xc5}, | ||
| 156 | {0x3611, 0x58}, | ||
| 157 | {0x3612, 0x5c}, | ||
| 158 | {0x3613, 0xca}, | ||
| 159 | {0x3614, 0x20}, | ||
| 160 | {0x3628, 0xff}, | ||
| 161 | {0x3629, 0xff}, | ||
| 162 | {0x362a, 0xff}, | ||
| 163 | {0x3633, 0x10}, | ||
| 164 | {0x3634, 0x10}, | ||
| 165 | {0x3635, 0x10}, | ||
| 166 | {0x3636, 0x10}, | ||
| 167 | {0x3663, 0x08}, | ||
| 168 | {0x3669, 0x34}, | ||
| 169 | {0x366e, 0x10}, | ||
| 170 | {0x3706, 0x86}, | ||
| 171 | {0x370b, 0x7e}, | ||
| 172 | {0x3714, 0x23}, | ||
| 173 | {0x3730, 0x12}, | ||
| 174 | {0x3733, 0x10}, | ||
| 175 | {0x3764, 0x00}, | ||
| 176 | {0x3765, 0x00}, | ||
| 177 | {0x3769, 0x62}, | ||
| 178 | {0x376a, 0x2a}, | ||
| 179 | {0x376b, 0x30}, | ||
| 180 | {0x3780, 0x00}, | ||
| 181 | {0x3781, 0x24}, | ||
| 182 | {0x3782, 0x00}, | ||
| 183 | {0x3783, 0x23}, | ||
| 184 | {0x3798, 0x2f}, | ||
| 185 | {0x37a1, 0x60}, | ||
| 186 | {0x37a8, 0x6a}, | ||
| 187 | {0x37ab, 0x3f}, | ||
| 188 | {0x37c2, 0x04}, | ||
| 189 | {0x37c3, 0xf1}, | ||
| 190 | {0x37c9, 0x80}, | ||
| 191 | {0x37cb, 0x16}, | ||
| 192 | {0x37cc, 0x16}, | ||
| 193 | {0x37cd, 0x16}, | ||
| 194 | {0x37ce, 0x16}, | ||
| 195 | {0x3800, 0x00}, | ||
| 196 | {0x3801, 0x00}, | ||
| 197 | {0x3802, 0x00}, | ||
| 198 | {0x3803, 0x07}, | ||
| 199 | {0x3804, 0x0c}, | ||
| 200 | {0x3805, 0xdf}, | ||
| 201 | {0x3806, 0x09}, | ||
| 202 | {0x3807, 0xa6}, | ||
| 203 | {0x3808, 0x0c}, | ||
| 204 | {0x3809, 0xd0}, | ||
| 205 | {0x380a, 0x09}, | ||
| 206 | {0x380b, 0xa0}, | ||
| 207 | {0x380c, 0x07}, | ||
| 208 | {0x380d, 0x88}, | ||
| 209 | {0x380e, 0x09}, | ||
| 210 | {0x380f, 0xb8}, | ||
| 211 | {0x3810, 0x00}, | ||
| 212 | {0x3811, 0x00}, | ||
| 213 | {0x3812, 0x00}, | ||
| 214 | {0x3813, 0x00}, | ||
| 215 | {0x3814, 0x01}, | ||
| 216 | {0x3815, 0x01}, | ||
| 217 | {0x3816, 0x00}, | ||
| 218 | {0x3817, 0x00}, | ||
| 219 | {0x3818, 0x00}, | ||
| 220 | {0x3819, 0x10}, | ||
| 221 | {0x3820, 0x80}, | ||
| 222 | {0x3821, 0x46}, | ||
| 223 | {0x382a, 0x01}, | ||
| 224 | {0x382b, 0x01}, | ||
| 225 | {0x3830, 0x06}, | ||
| 226 | {0x3836, 0x02}, | ||
| 227 | {0x3862, 0x04}, | ||
| 228 | {0x3863, 0x08}, | ||
| 229 | {0x3cc0, 0x33}, | ||
| 230 | {0x3d85, 0x17}, | ||
| 231 | {0x3d8c, 0x73}, | ||
| 232 | {0x3d8d, 0xde}, | ||
| 233 | {0x4001, 0xe0}, | ||
| 234 | {0x4003, 0x40}, | ||
| 235 | {0x4008, 0x00}, | ||
| 236 | {0x4009, 0x0b}, | ||
| 237 | {0x400a, 0x00}, | ||
| 238 | {0x400b, 0x84}, | ||
| 239 | {0x400f, 0x80}, | ||
| 240 | {0x4010, 0xf0}, | ||
| 241 | {0x4011, 0xff}, | ||
| 242 | {0x4012, 0x02}, | ||
| 243 | {0x4013, 0x01}, | ||
| 244 | {0x4014, 0x01}, | ||
| 245 | {0x4015, 0x01}, | ||
| 246 | {0x4042, 0x00}, | ||
| 247 | {0x4043, 0x80}, | ||
| 248 | {0x4044, 0x00}, | ||
| 249 | {0x4045, 0x80}, | ||
| 250 | {0x4046, 0x00}, | ||
| 251 | {0x4047, 0x80}, | ||
| 252 | {0x4048, 0x00}, | ||
| 253 | {0x4049, 0x80}, | ||
| 254 | {0x4041, 0x03}, | ||
| 255 | {0x404c, 0x20}, | ||
| 256 | {0x404d, 0x00}, | ||
| 257 | {0x404e, 0x20}, | ||
| 258 | {0x4203, 0x80}, | ||
| 259 | {0x4307, 0x30}, | ||
| 260 | {0x4317, 0x00}, | ||
| 261 | {0x4503, 0x08}, | ||
| 262 | {0x4601, 0x80}, | ||
| 263 | {0x4800, 0x44}, | ||
| 264 | {0x4816, 0x53}, | ||
| 265 | {0x481b, 0x58}, | ||
| 266 | {0x481f, 0x27}, | ||
| 267 | {0x4837, 0x16}, | ||
| 268 | {0x483c, 0x0f}, | ||
| 269 | {0x484b, 0x05}, | ||
| 270 | {0x5000, 0x57}, | ||
| 271 | {0x5001, 0x0a}, | ||
| 272 | {0x5004, 0x04}, | ||
| 273 | {0x502e, 0x03}, | ||
| 274 | {0x5030, 0x41}, | ||
| 275 | {0x5780, 0x14}, | ||
| 276 | {0x5781, 0x0f}, | ||
| 277 | {0x5782, 0x44}, | ||
| 278 | {0x5783, 0x02}, | ||
| 279 | {0x5784, 0x01}, | ||
| 280 | {0x5785, 0x01}, | ||
| 281 | {0x5786, 0x00}, | ||
| 282 | {0x5787, 0x04}, | ||
| 283 | {0x5788, 0x02}, | ||
| 284 | {0x5789, 0x0f}, | ||
| 285 | {0x578a, 0xfd}, | ||
| 286 | {0x578b, 0xf5}, | ||
| 287 | {0x578c, 0xf5}, | ||
| 288 | {0x578d, 0x03}, | ||
| 289 | {0x578e, 0x08}, | ||
| 290 | {0x578f, 0x0c}, | ||
| 291 | {0x5790, 0x08}, | ||
| 292 | {0x5791, 0x04}, | ||
| 293 | {0x5792, 0x00}, | ||
| 294 | {0x5793, 0x52}, | ||
| 295 | {0x5794, 0xa3}, | ||
| 296 | {0x5795, 0x02}, | ||
| 297 | {0x5796, 0x20}, | ||
| 298 | {0x5797, 0x20}, | ||
| 299 | {0x5798, 0xd5}, | ||
| 300 | {0x5799, 0xd5}, | ||
| 301 | {0x579a, 0x00}, | ||
| 302 | {0x579b, 0x50}, | ||
| 303 | {0x579c, 0x00}, | ||
| 304 | {0x579d, 0x2c}, | ||
| 305 | {0x579e, 0x0c}, | ||
| 306 | {0x579f, 0x40}, | ||
| 307 | {0x57a0, 0x09}, | ||
| 308 | {0x57a1, 0x40}, | ||
| 309 | {0x59f8, 0x3d}, | ||
| 310 | {0x5a08, 0x02}, | ||
| 311 | {0x5b00, 0x02}, | ||
| 312 | {0x5b01, 0x10}, | ||
| 313 | {0x5b02, 0x03}, | ||
| 314 | {0x5b03, 0xcf}, | ||
| 315 | {0x5b05, 0x6c}, | ||
| 316 | {0x5e00, 0x00} | ||
| 317 | }; | ||
| 318 | |||
| 319 | static const struct ov8856_reg mode_1640x1232_regs[] = { | ||
| 320 | {0x3000, 0x20}, | ||
| 321 | {0x3003, 0x08}, | ||
| 322 | {0x300e, 0x20}, | ||
| 323 | {0x3010, 0x00}, | ||
| 324 | {0x3015, 0x84}, | ||
| 325 | {0x3018, 0x72}, | ||
| 326 | {0x3021, 0x23}, | ||
| 327 | {0x3033, 0x24}, | ||
| 328 | {0x3500, 0x00}, | ||
| 329 | {0x3501, 0x4c}, | ||
| 330 | {0x3502, 0xe0}, | ||
| 331 | {0x3503, 0x08}, | ||
| 332 | {0x3505, 0x83}, | ||
| 333 | {0x3508, 0x01}, | ||
| 334 | {0x3509, 0x80}, | ||
| 335 | {0x350c, 0x00}, | ||
| 336 | {0x350d, 0x80}, | ||
| 337 | {0x350e, 0x04}, | ||
| 338 | {0x350f, 0x00}, | ||
| 339 | {0x3510, 0x00}, | ||
| 340 | {0x3511, 0x02}, | ||
| 341 | {0x3512, 0x00}, | ||
| 342 | {0x3600, 0x72}, | ||
| 343 | {0x3601, 0x40}, | ||
| 344 | {0x3602, 0x30}, | ||
| 345 | {0x3610, 0xc5}, | ||
| 346 | {0x3611, 0x58}, | ||
| 347 | {0x3612, 0x5c}, | ||
| 348 | {0x3613, 0xca}, | ||
| 349 | {0x3614, 0x20}, | ||
| 350 | {0x3628, 0xff}, | ||
| 351 | {0x3629, 0xff}, | ||
| 352 | {0x362a, 0xff}, | ||
| 353 | {0x3633, 0x10}, | ||
| 354 | {0x3634, 0x10}, | ||
| 355 | {0x3635, 0x10}, | ||
| 356 | {0x3636, 0x10}, | ||
| 357 | {0x3663, 0x08}, | ||
| 358 | {0x3669, 0x34}, | ||
| 359 | {0x366e, 0x08}, | ||
| 360 | {0x3706, 0x86}, | ||
| 361 | {0x370b, 0x7e}, | ||
| 362 | {0x3714, 0x27}, | ||
| 363 | {0x3730, 0x12}, | ||
| 364 | {0x3733, 0x10}, | ||
| 365 | {0x3764, 0x00}, | ||
| 366 | {0x3765, 0x00}, | ||
| 367 | {0x3769, 0x62}, | ||
| 368 | {0x376a, 0x2a}, | ||
| 369 | {0x376b, 0x30}, | ||
| 370 | {0x3780, 0x00}, | ||
| 371 | {0x3781, 0x24}, | ||
| 372 | {0x3782, 0x00}, | ||
| 373 | {0x3783, 0x23}, | ||
| 374 | {0x3798, 0x2f}, | ||
| 375 | {0x37a1, 0x60}, | ||
| 376 | {0x37a8, 0x6a}, | ||
| 377 | {0x37ab, 0x3f}, | ||
| 378 | {0x37c2, 0x14}, | ||
| 379 | {0x37c3, 0xf1}, | ||
| 380 | {0x37c9, 0x80}, | ||
| 381 | {0x37cb, 0x16}, | ||
| 382 | {0x37cc, 0x16}, | ||
| 383 | {0x37cd, 0x16}, | ||
| 384 | {0x37ce, 0x16}, | ||
| 385 | {0x3800, 0x00}, | ||
| 386 | {0x3801, 0x00}, | ||
| 387 | {0x3802, 0x00}, | ||
| 388 | {0x3803, 0x07}, | ||
| 389 | {0x3804, 0x0c}, | ||
| 390 | {0x3805, 0xdf}, | ||
| 391 | {0x3806, 0x09}, | ||
| 392 | {0x3807, 0xa6}, | ||
| 393 | {0x3808, 0x06}, | ||
| 394 | {0x3809, 0x68}, | ||
| 395 | {0x380a, 0x04}, | ||
| 396 | {0x380b, 0xd0}, | ||
| 397 | {0x380c, 0x0e}, | ||
| 398 | {0x380d, 0xec}, | ||
| 399 | {0x380e, 0x04}, | ||
| 400 | {0x380f, 0xe8}, | ||
| 401 | {0x3810, 0x00}, | ||
| 402 | {0x3811, 0x00}, | ||
| 403 | {0x3812, 0x00}, | ||
| 404 | {0x3813, 0x00}, | ||
| 405 | {0x3814, 0x03}, | ||
| 406 | {0x3815, 0x01}, | ||
| 407 | {0x3816, 0x00}, | ||
| 408 | {0x3817, 0x00}, | ||
| 409 | {0x3818, 0x00}, | ||
| 410 | {0x3819, 0x10}, | ||
| 411 | {0x3820, 0x90}, | ||
| 412 | {0x3821, 0x67}, | ||
| 413 | {0x382a, 0x03}, | ||
| 414 | {0x382b, 0x01}, | ||
| 415 | {0x3830, 0x06}, | ||
| 416 | {0x3836, 0x02}, | ||
| 417 | {0x3862, 0x04}, | ||
| 418 | {0x3863, 0x08}, | ||
| 419 | {0x3cc0, 0x33}, | ||
| 420 | {0x3d85, 0x17}, | ||
| 421 | {0x3d8c, 0x73}, | ||
| 422 | {0x3d8d, 0xde}, | ||
| 423 | {0x4001, 0xe0}, | ||
| 424 | {0x4003, 0x40}, | ||
| 425 | {0x4008, 0x00}, | ||
| 426 | {0x4009, 0x05}, | ||
| 427 | {0x400a, 0x00}, | ||
| 428 | {0x400b, 0x84}, | ||
| 429 | {0x400f, 0x80}, | ||
| 430 | {0x4010, 0xf0}, | ||
| 431 | {0x4011, 0xff}, | ||
| 432 | {0x4012, 0x02}, | ||
| 433 | {0x4013, 0x01}, | ||
| 434 | {0x4014, 0x01}, | ||
| 435 | {0x4015, 0x01}, | ||
| 436 | {0x4042, 0x00}, | ||
| 437 | {0x4043, 0x80}, | ||
| 438 | {0x4044, 0x00}, | ||
| 439 | {0x4045, 0x80}, | ||
| 440 | {0x4046, 0x00}, | ||
| 441 | {0x4047, 0x80}, | ||
| 442 | {0x4048, 0x00}, | ||
| 443 | {0x4049, 0x80}, | ||
| 444 | {0x4041, 0x03}, | ||
| 445 | {0x404c, 0x20}, | ||
| 446 | {0x404d, 0x00}, | ||
| 447 | {0x404e, 0x20}, | ||
| 448 | {0x4203, 0x80}, | ||
| 449 | {0x4307, 0x30}, | ||
| 450 | {0x4317, 0x00}, | ||
| 451 | {0x4503, 0x08}, | ||
| 452 | {0x4601, 0x80}, | ||
| 453 | {0x4800, 0x44}, | ||
| 454 | {0x4816, 0x53}, | ||
| 455 | {0x481b, 0x58}, | ||
| 456 | {0x481f, 0x27}, | ||
| 457 | {0x4837, 0x16}, | ||
| 458 | {0x483c, 0x0f}, | ||
| 459 | {0x484b, 0x05}, | ||
| 460 | {0x5000, 0x57}, | ||
| 461 | {0x5001, 0x0a}, | ||
| 462 | {0x5004, 0x04}, | ||
| 463 | {0x502e, 0x03}, | ||
| 464 | {0x5030, 0x41}, | ||
| 465 | {0x5780, 0x14}, | ||
| 466 | {0x5781, 0x0f}, | ||
| 467 | {0x5782, 0x44}, | ||
| 468 | {0x5783, 0x02}, | ||
| 469 | {0x5784, 0x01}, | ||
| 470 | {0x5785, 0x01}, | ||
| 471 | {0x5786, 0x00}, | ||
| 472 | {0x5787, 0x04}, | ||
| 473 | {0x5788, 0x02}, | ||
| 474 | {0x5789, 0x0f}, | ||
| 475 | {0x578a, 0xfd}, | ||
| 476 | {0x578b, 0xf5}, | ||
| 477 | {0x578c, 0xf5}, | ||
| 478 | {0x578d, 0x03}, | ||
| 479 | {0x578e, 0x08}, | ||
| 480 | {0x578f, 0x0c}, | ||
| 481 | {0x5790, 0x08}, | ||
| 482 | {0x5791, 0x04}, | ||
| 483 | {0x5792, 0x00}, | ||
| 484 | {0x5793, 0x52}, | ||
| 485 | {0x5794, 0xa3}, | ||
| 486 | {0x5795, 0x00}, | ||
| 487 | {0x5796, 0x10}, | ||
| 488 | {0x5797, 0x10}, | ||
| 489 | {0x5798, 0x73}, | ||
| 490 | {0x5799, 0x73}, | ||
| 491 | {0x579a, 0x00}, | ||
| 492 | {0x579b, 0x28}, | ||
| 493 | {0x579c, 0x00}, | ||
| 494 | {0x579d, 0x16}, | ||
| 495 | {0x579e, 0x06}, | ||
| 496 | {0x579f, 0x20}, | ||
| 497 | {0x57a0, 0x04}, | ||
| 498 | {0x57a1, 0xa0}, | ||
| 499 | {0x59f8, 0x3d}, | ||
| 500 | {0x5a08, 0x02}, | ||
| 501 | {0x5b00, 0x02}, | ||
| 502 | {0x5b01, 0x10}, | ||
| 503 | {0x5b02, 0x03}, | ||
| 504 | {0x5b03, 0xcf}, | ||
| 505 | {0x5b05, 0x6c}, | ||
| 506 | {0x5e00, 0x00} | ||
| 507 | }; | ||
| 508 | |||
| 509 | static const char * const ov8856_test_pattern_menu[] = { | ||
| 510 | "Disabled", | ||
| 511 | "Standard Color Bar", | ||
| 512 | "Top-Bottom Darker Color Bar", | ||
| 513 | "Right-Left Darker Color Bar", | ||
| 514 | "Bottom-Top Darker Color Bar" | ||
| 515 | }; | ||
| 516 | |||
| 517 | static const s64 link_freq_menu_items[] = { | ||
| 518 | OV8856_LINK_FREQ_360MHZ, | ||
| 519 | OV8856_LINK_FREQ_180MHZ | ||
| 520 | }; | ||
| 521 | |||
| 522 | static const struct ov8856_link_freq_config link_freq_configs[] = { | ||
| 523 | [OV8856_LINK_FREQ_720MBPS] = { | ||
| 524 | .reg_list = { | ||
| 525 | .num_of_regs = ARRAY_SIZE(mipi_data_rate_720mbps), | ||
| 526 | .regs = mipi_data_rate_720mbps, | ||
| 527 | } | ||
| 528 | }, | ||
| 529 | [OV8856_LINK_FREQ_360MBPS] = { | ||
| 530 | .reg_list = { | ||
| 531 | .num_of_regs = ARRAY_SIZE(mipi_data_rate_360mbps), | ||
| 532 | .regs = mipi_data_rate_360mbps, | ||
| 533 | } | ||
| 534 | } | ||
| 535 | }; | ||
| 536 | |||
| 537 | static const struct ov8856_mode supported_modes[] = { | ||
| 538 | { | ||
| 539 | .width = 3280, | ||
| 540 | .height = 2464, | ||
| 541 | .hts = 1928, | ||
| 542 | .vts_def = 2488, | ||
| 543 | .vts_min = 2488, | ||
| 544 | .reg_list = { | ||
| 545 | .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs), | ||
| 546 | .regs = mode_3280x2464_regs, | ||
| 547 | }, | ||
| 548 | .link_freq_index = OV8856_LINK_FREQ_720MBPS, | ||
| 549 | }, | ||
| 550 | { | ||
| 551 | .width = 1640, | ||
| 552 | .height = 1232, | ||
| 553 | .hts = 3820, | ||
| 554 | .vts_def = 1256, | ||
| 555 | .vts_min = 1256, | ||
| 556 | .reg_list = { | ||
| 557 | .num_of_regs = ARRAY_SIZE(mode_1640x1232_regs), | ||
| 558 | .regs = mode_1640x1232_regs, | ||
| 559 | }, | ||
| 560 | .link_freq_index = OV8856_LINK_FREQ_360MBPS, | ||
| 561 | } | ||
| 562 | }; | ||
| 563 | |||
| 564 | struct ov8856 { | ||
| 565 | struct v4l2_subdev sd; | ||
| 566 | struct media_pad pad; | ||
| 567 | struct v4l2_ctrl_handler ctrl_handler; | ||
| 568 | |||
| 569 | /* V4L2 Controls */ | ||
| 570 | struct v4l2_ctrl *link_freq; | ||
| 571 | struct v4l2_ctrl *pixel_rate; | ||
| 572 | struct v4l2_ctrl *vblank; | ||
| 573 | struct v4l2_ctrl *hblank; | ||
| 574 | struct v4l2_ctrl *exposure; | ||
| 575 | |||
| 576 | /* Current mode */ | ||
| 577 | const struct ov8856_mode *cur_mode; | ||
| 578 | |||
| 579 | /* To serialize asynchronus callbacks */ | ||
| 580 | struct mutex mutex; | ||
| 581 | |||
| 582 | /* Streaming on/off */ | ||
| 583 | bool streaming; | ||
| 584 | }; | ||
| 585 | |||
| 586 | static u64 to_pixel_rate(u32 f_index) | ||
| 587 | { | ||
| 588 | u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV8856_DATA_LANES; | ||
| 589 | |||
| 590 | do_div(pixel_rate, OV8856_RGB_DEPTH); | ||
| 591 | |||
| 592 | return pixel_rate; | ||
| 593 | } | ||
| 594 | |||
| 595 | static u64 to_pixels_per_line(u32 hts, u32 f_index) | ||
| 596 | { | ||
| 597 | u64 ppl = hts * to_pixel_rate(f_index); | ||
| 598 | |||
| 599 | do_div(ppl, OV8856_SCLK); | ||
| 600 | |||
| 601 | return ppl; | ||
| 602 | } | ||
| 603 | |||
| 604 | static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val) | ||
| 605 | { | ||
| 606 | struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); | ||
| 607 | struct i2c_msg msgs[2]; | ||
| 608 | u8 addr_buf[2]; | ||
| 609 | u8 data_buf[4] = {0}; | ||
| 610 | int ret; | ||
| 611 | |||
| 612 | if (len > 4) | ||
| 613 | return -EINVAL; | ||
| 614 | |||
| 615 | put_unaligned_be16(reg, addr_buf); | ||
| 616 | msgs[0].addr = client->addr; | ||
| 617 | msgs[0].flags = 0; | ||
| 618 | msgs[0].len = sizeof(addr_buf); | ||
| 619 | msgs[0].buf = addr_buf; | ||
| 620 | msgs[1].addr = client->addr; | ||
| 621 | msgs[1].flags = I2C_M_RD; | ||
| 622 | msgs[1].len = len; | ||
| 623 | msgs[1].buf = &data_buf[4 - len]; | ||
| 624 | |||
| 625 | ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); | ||
| 626 | if (ret != ARRAY_SIZE(msgs)) | ||
| 627 | return -EIO; | ||
| 628 | |||
| 629 | *val = get_unaligned_be32(data_buf); | ||
| 630 | |||
| 631 | return 0; | ||
| 632 | } | ||
| 633 | |||
| 634 | static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val) | ||
| 635 | { | ||
| 636 | struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); | ||
| 637 | u8 buf[6]; | ||
| 638 | |||
| 639 | if (len > 4) | ||
| 640 | return -EINVAL; | ||
| 641 | |||
| 642 | put_unaligned_be16(reg, buf); | ||
| 643 | put_unaligned_be32(val << 8 * (4 - len), buf + 2); | ||
| 644 | if (i2c_master_send(client, buf, len + 2) != len + 2) | ||
| 645 | return -EIO; | ||
| 646 | |||
| 647 | return 0; | ||
| 648 | } | ||
| 649 | |||
| 650 | static int ov8856_write_reg_list(struct ov8856 *ov8856, | ||
| 651 | const struct ov8856_reg_list *r_list) | ||
| 652 | { | ||
| 653 | struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); | ||
| 654 | unsigned int i; | ||
| 655 | int ret; | ||
| 656 | |||
| 657 | for (i = 0; i < r_list->num_of_regs; i++) { | ||
| 658 | ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1, | ||
| 659 | r_list->regs[i].val); | ||
| 660 | if (ret) { | ||
| 661 | dev_err_ratelimited(&client->dev, | ||
| 662 | "failed to write reg 0x%4.4x. error = %d", | ||
| 663 | r_list->regs[i].address, ret); | ||
| 664 | return ret; | ||
| 665 | } | ||
| 666 | } | ||
| 667 | |||
| 668 | return 0; | ||
| 669 | } | ||
| 670 | |||
| 671 | static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain) | ||
| 672 | { | ||
| 673 | int ret; | ||
| 674 | |||
| 675 | ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_R_GAIN, | ||
| 676 | OV8856_REG_VALUE_16BIT, d_gain); | ||
| 677 | if (ret) | ||
| 678 | return ret; | ||
| 679 | |||
| 680 | ret = ov8856_write_reg(ov8856, OV8856_REG_MWB_G_GAIN, | ||
| 681 | OV8856_REG_VALUE_16BIT, d_gain); | ||
| 682 | if (ret) | ||
| 683 | return ret; | ||
| 684 | |||
| 685 | return ov8856_write_reg(ov8856, OV8856_REG_MWB_B_GAIN, | ||
| 686 | OV8856_REG_VALUE_16BIT, d_gain); | ||
| 687 | } | ||
| 688 | |||
| 689 | static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern) | ||
| 690 | { | ||
| 691 | if (pattern) | ||
| 692 | pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT | | ||
| 693 | OV8856_TEST_PATTERN_ENABLE; | ||
| 694 | |||
| 695 | return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN, | ||
| 696 | OV8856_REG_VALUE_08BIT, pattern); | ||
| 697 | } | ||
| 698 | |||
| 699 | static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl) | ||
| 700 | { | ||
| 701 | struct ov8856 *ov8856 = container_of(ctrl->handler, | ||
| 702 | struct ov8856, ctrl_handler); | ||
| 703 | struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); | ||
| 704 | s64 exposure_max; | ||
| 705 | int ret = 0; | ||
| 706 | |||
| 707 | /* Propagate change of current control to all related controls */ | ||
| 708 | if (ctrl->id == V4L2_CID_VBLANK) { | ||
| 709 | /* Update max exposure while meeting expected vblanking */ | ||
| 710 | exposure_max = ov8856->cur_mode->height + ctrl->val - | ||
| 711 | OV8856_EXPOSURE_MAX_MARGIN; | ||
| 712 | __v4l2_ctrl_modify_range(ov8856->exposure, | ||
| 713 | ov8856->exposure->minimum, | ||
| 714 | exposure_max, ov8856->exposure->step, | ||
| 715 | exposure_max); | ||
| 716 | } | ||
| 717 | |||
| 718 | /* V4L2 controls values will be applied only when power is already up */ | ||
| 719 | if (!pm_runtime_get_if_in_use(&client->dev)) | ||
| 720 | return 0; | ||
| 721 | |||
| 722 | switch (ctrl->id) { | ||
| 723 | case V4L2_CID_ANALOGUE_GAIN: | ||
| 724 | ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN, | ||
| 725 | OV8856_REG_VALUE_16BIT, ctrl->val); | ||
| 726 | break; | ||
| 727 | |||
| 728 | case V4L2_CID_DIGITAL_GAIN: | ||
| 729 | ret = ov8856_update_digital_gain(ov8856, ctrl->val); | ||
| 730 | break; | ||
| 731 | |||
| 732 | case V4L2_CID_EXPOSURE: | ||
| 733 | /* 4 least significant bits of expsoure are fractional part */ | ||
| 734 | ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE, | ||
| 735 | OV8856_REG_VALUE_24BIT, ctrl->val << 4); | ||
| 736 | break; | ||
| 737 | |||
| 738 | case V4L2_CID_VBLANK: | ||
| 739 | ret = ov8856_write_reg(ov8856, OV8856_REG_VTS, | ||
| 740 | OV8856_REG_VALUE_16BIT, | ||
| 741 | ov8856->cur_mode->height + ctrl->val); | ||
| 742 | break; | ||
| 743 | |||
| 744 | case V4L2_CID_TEST_PATTERN: | ||
| 745 | ret = ov8856_test_pattern(ov8856, ctrl->val); | ||
| 746 | break; | ||
| 747 | |||
| 748 | default: | ||
| 749 | ret = -EINVAL; | ||
| 750 | break; | ||
| 751 | } | ||
| 752 | |||
| 753 | pm_runtime_put(&client->dev); | ||
| 754 | |||
| 755 | return ret; | ||
| 756 | } | ||
| 757 | |||
| 758 | static const struct v4l2_ctrl_ops ov8856_ctrl_ops = { | ||
| 759 | .s_ctrl = ov8856_set_ctrl, | ||
| 760 | }; | ||
| 761 | |||
| 762 | static int ov8856_init_controls(struct ov8856 *ov8856) | ||
| 763 | { | ||
| 764 | struct v4l2_ctrl_handler *ctrl_hdlr; | ||
| 765 | s64 exposure_max, h_blank; | ||
| 766 | int ret; | ||
| 767 | |||
| 768 | ctrl_hdlr = &ov8856->ctrl_handler; | ||
| 769 | ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); | ||
| 770 | if (ret) | ||
| 771 | return ret; | ||
| 772 | |||
| 773 | ctrl_hdlr->lock = &ov8856->mutex; | ||
| 774 | ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops, | ||
| 775 | V4L2_CID_LINK_FREQ, | ||
| 776 | ARRAY_SIZE(link_freq_menu_items) - 1, | ||
| 777 | 0, link_freq_menu_items); | ||
| 778 | if (ov8856->link_freq) | ||
| 779 | ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; | ||
| 780 | |||
| 781 | ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, | ||
| 782 | V4L2_CID_PIXEL_RATE, 0, | ||
| 783 | to_pixel_rate(OV8856_LINK_FREQ_720MBPS), | ||
| 784 | 1, | ||
| 785 | to_pixel_rate(OV8856_LINK_FREQ_720MBPS)); | ||
| 786 | ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, | ||
| 787 | V4L2_CID_VBLANK, | ||
| 788 | ov8856->cur_mode->vts_min - ov8856->cur_mode->height, | ||
| 789 | OV8856_VTS_MAX - ov8856->cur_mode->height, 1, | ||
| 790 | ov8856->cur_mode->vts_def - ov8856->cur_mode->height); | ||
| 791 | h_blank = to_pixels_per_line(ov8856->cur_mode->hts, | ||
| 792 | ov8856->cur_mode->link_freq_index) - ov8856->cur_mode->width; | ||
| 793 | ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, | ||
| 794 | V4L2_CID_HBLANK, h_blank, h_blank, 1, | ||
| 795 | h_blank); | ||
| 796 | if (ov8856->hblank) | ||
| 797 | ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; | ||
| 798 | |||
| 799 | v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, | ||
| 800 | OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX, | ||
| 801 | OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN); | ||
| 802 | v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN, | ||
| 803 | OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX, | ||
| 804 | OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT); | ||
| 805 | exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN; | ||
| 806 | ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, | ||
| 807 | V4L2_CID_EXPOSURE, | ||
| 808 | OV8856_EXPOSURE_MIN, exposure_max, | ||
| 809 | OV8856_EXPOSURE_STEP, | ||
| 810 | exposure_max); | ||
| 811 | v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops, | ||
| 812 | V4L2_CID_TEST_PATTERN, | ||
| 813 | ARRAY_SIZE(ov8856_test_pattern_menu) - 1, | ||
| 814 | 0, 0, ov8856_test_pattern_menu); | ||
| 815 | if (ctrl_hdlr->error) | ||
| 816 | return ctrl_hdlr->error; | ||
| 817 | |||
| 818 | ov8856->sd.ctrl_handler = ctrl_hdlr; | ||
| 819 | |||
| 820 | return 0; | ||
| 821 | } | ||
| 822 | |||
| 823 | static void ov8856_update_pad_format(const struct ov8856_mode *mode, | ||
| 824 | struct v4l2_mbus_framefmt *fmt) | ||
| 825 | { | ||
| 826 | fmt->width = mode->width; | ||
| 827 | fmt->height = mode->height; | ||
| 828 | fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; | ||
| 829 | fmt->field = V4L2_FIELD_NONE; | ||
| 830 | } | ||
| 831 | |||
| 832 | static int ov8856_start_streaming(struct ov8856 *ov8856) | ||
| 833 | { | ||
| 834 | struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); | ||
| 835 | const struct ov8856_reg_list *reg_list; | ||
| 836 | int link_freq_index, ret; | ||
| 837 | |||
| 838 | link_freq_index = ov8856->cur_mode->link_freq_index; | ||
| 839 | reg_list = &link_freq_configs[link_freq_index].reg_list; | ||
| 840 | ret = ov8856_write_reg_list(ov8856, reg_list); | ||
| 841 | if (ret) { | ||
| 842 | dev_err(&client->dev, "failed to set plls"); | ||
| 843 | return ret; | ||
| 844 | } | ||
| 845 | |||
| 846 | reg_list = &ov8856->cur_mode->reg_list; | ||
| 847 | ret = ov8856_write_reg_list(ov8856, reg_list); | ||
| 848 | if (ret) { | ||
| 849 | dev_err(&client->dev, "failed to set mode"); | ||
| 850 | return ret; | ||
| 851 | } | ||
| 852 | |||
| 853 | ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler); | ||
| 854 | if (ret) | ||
| 855 | return ret; | ||
| 856 | |||
| 857 | ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, | ||
| 858 | OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); | ||
| 859 | if (ret) { | ||
| 860 | dev_err(&client->dev, "failed to set stream"); | ||
| 861 | return ret; | ||
| 862 | } | ||
| 863 | |||
| 864 | return 0; | ||
| 865 | } | ||
| 866 | |||
| 867 | static void ov8856_stop_streaming(struct ov8856 *ov8856) | ||
| 868 | { | ||
| 869 | struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); | ||
| 870 | |||
| 871 | if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, | ||
| 872 | OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY)) | ||
| 873 | dev_err(&client->dev, "failed to set stream"); | ||
| 874 | } | ||
| 875 | |||
| 876 | static int ov8856_set_stream(struct v4l2_subdev *sd, int enable) | ||
| 877 | { | ||
| 878 | struct ov8856 *ov8856 = to_ov8856(sd); | ||
| 879 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 880 | int ret = 0; | ||
| 881 | |||
| 882 | if (ov8856->streaming == enable) | ||
| 883 | return 0; | ||
| 884 | |||
| 885 | mutex_lock(&ov8856->mutex); | ||
| 886 | if (enable) { | ||
| 887 | ret = pm_runtime_get_sync(&client->dev); | ||
| 888 | if (ret < 0) { | ||
| 889 | pm_runtime_put_noidle(&client->dev); | ||
| 890 | mutex_unlock(&ov8856->mutex); | ||
| 891 | return ret; | ||
| 892 | } | ||
| 893 | |||
| 894 | ret = ov8856_start_streaming(ov8856); | ||
| 895 | if (ret) { | ||
| 896 | enable = 0; | ||
| 897 | ov8856_stop_streaming(ov8856); | ||
| 898 | pm_runtime_put(&client->dev); | ||
| 899 | } | ||
| 900 | } else { | ||
| 901 | ov8856_stop_streaming(ov8856); | ||
| 902 | pm_runtime_put(&client->dev); | ||
| 903 | } | ||
| 904 | |||
| 905 | ov8856->streaming = enable; | ||
| 906 | mutex_unlock(&ov8856->mutex); | ||
| 907 | |||
| 908 | return ret; | ||
| 909 | } | ||
| 910 | |||
| 911 | static int __maybe_unused ov8856_suspend(struct device *dev) | ||
| 912 | { | ||
| 913 | struct i2c_client *client = to_i2c_client(dev); | ||
| 914 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | ||
| 915 | struct ov8856 *ov8856 = to_ov8856(sd); | ||
| 916 | |||
| 917 | mutex_lock(&ov8856->mutex); | ||
| 918 | if (ov8856->streaming) | ||
| 919 | ov8856_stop_streaming(ov8856); | ||
| 920 | |||
| 921 | mutex_unlock(&ov8856->mutex); | ||
| 922 | |||
| 923 | return 0; | ||
| 924 | } | ||
| 925 | |||
| 926 | static int __maybe_unused ov8856_resume(struct device *dev) | ||
| 927 | { | ||
| 928 | struct i2c_client *client = to_i2c_client(dev); | ||
| 929 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | ||
| 930 | struct ov8856 *ov8856 = to_ov8856(sd); | ||
| 931 | int ret; | ||
| 932 | |||
| 933 | mutex_lock(&ov8856->mutex); | ||
| 934 | if (ov8856->streaming) { | ||
| 935 | ret = ov8856_start_streaming(ov8856); | ||
| 936 | if (ret) { | ||
| 937 | ov8856->streaming = false; | ||
| 938 | ov8856_stop_streaming(ov8856); | ||
| 939 | mutex_unlock(&ov8856->mutex); | ||
| 940 | return ret; | ||
| 941 | } | ||
| 942 | } | ||
| 943 | |||
| 944 | mutex_unlock(&ov8856->mutex); | ||
| 945 | |||
| 946 | return 0; | ||
| 947 | } | ||
| 948 | |||
| 949 | static int ov8856_set_format(struct v4l2_subdev *sd, | ||
| 950 | struct v4l2_subdev_pad_config *cfg, | ||
| 951 | struct v4l2_subdev_format *fmt) | ||
| 952 | { | ||
| 953 | struct ov8856 *ov8856 = to_ov8856(sd); | ||
| 954 | const struct ov8856_mode *mode; | ||
| 955 | s32 vblank_def, h_blank; | ||
| 956 | |||
| 957 | mode = v4l2_find_nearest_size(supported_modes, | ||
| 958 | ARRAY_SIZE(supported_modes), width, | ||
| 959 | height, fmt->format.width, | ||
| 960 | fmt->format.height); | ||
| 961 | |||
| 962 | mutex_lock(&ov8856->mutex); | ||
| 963 | ov8856_update_pad_format(mode, &fmt->format); | ||
| 964 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { | ||
| 965 | *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format; | ||
| 966 | } else { | ||
| 967 | ov8856->cur_mode = mode; | ||
| 968 | __v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index); | ||
| 969 | __v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate, | ||
| 970 | to_pixel_rate(mode->link_freq_index)); | ||
| 971 | |||
| 972 | /* Update limits and set FPS to default */ | ||
| 973 | vblank_def = mode->vts_def - mode->height; | ||
| 974 | __v4l2_ctrl_modify_range(ov8856->vblank, | ||
| 975 | mode->vts_min - mode->height, | ||
| 976 | OV8856_VTS_MAX - mode->height, 1, | ||
| 977 | vblank_def); | ||
| 978 | __v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def); | ||
| 979 | h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) - | ||
| 980 | mode->width; | ||
| 981 | __v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1, | ||
| 982 | h_blank); | ||
| 983 | } | ||
| 984 | |||
| 985 | mutex_unlock(&ov8856->mutex); | ||
| 986 | |||
| 987 | return 0; | ||
| 988 | } | ||
| 989 | |||
| 990 | static int ov8856_get_format(struct v4l2_subdev *sd, | ||
| 991 | struct v4l2_subdev_pad_config *cfg, | ||
| 992 | struct v4l2_subdev_format *fmt) | ||
| 993 | { | ||
| 994 | struct ov8856 *ov8856 = to_ov8856(sd); | ||
| 995 | |||
| 996 | mutex_lock(&ov8856->mutex); | ||
| 997 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) | ||
| 998 | fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd, cfg, | ||
| 999 | fmt->pad); | ||
| 1000 | else | ||
| 1001 | ov8856_update_pad_format(ov8856->cur_mode, &fmt->format); | ||
| 1002 | |||
| 1003 | mutex_unlock(&ov8856->mutex); | ||
| 1004 | |||
| 1005 | return 0; | ||
| 1006 | } | ||
| 1007 | |||
| 1008 | static int ov8856_enum_mbus_code(struct v4l2_subdev *sd, | ||
| 1009 | struct v4l2_subdev_pad_config *cfg, | ||
| 1010 | struct v4l2_subdev_mbus_code_enum *code) | ||
| 1011 | { | ||
| 1012 | /* Only one bayer order GRBG is supported */ | ||
| 1013 | if (code->index > 0) | ||
| 1014 | return -EINVAL; | ||
| 1015 | |||
| 1016 | code->code = MEDIA_BUS_FMT_SGRBG10_1X10; | ||
| 1017 | |||
| 1018 | return 0; | ||
| 1019 | } | ||
| 1020 | |||
| 1021 | static int ov8856_enum_frame_size(struct v4l2_subdev *sd, | ||
| 1022 | struct v4l2_subdev_pad_config *cfg, | ||
| 1023 | struct v4l2_subdev_frame_size_enum *fse) | ||
| 1024 | { | ||
| 1025 | if (fse->index >= ARRAY_SIZE(supported_modes)) | ||
| 1026 | return -EINVAL; | ||
| 1027 | |||
| 1028 | if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10) | ||
| 1029 | return -EINVAL; | ||
| 1030 | |||
| 1031 | fse->min_width = supported_modes[fse->index].width; | ||
| 1032 | fse->max_width = fse->min_width; | ||
| 1033 | fse->min_height = supported_modes[fse->index].height; | ||
| 1034 | fse->max_height = fse->min_height; | ||
| 1035 | |||
| 1036 | return 0; | ||
| 1037 | } | ||
| 1038 | |||
| 1039 | static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) | ||
| 1040 | { | ||
| 1041 | struct ov8856 *ov8856 = to_ov8856(sd); | ||
| 1042 | |||
| 1043 | mutex_lock(&ov8856->mutex); | ||
| 1044 | ov8856_update_pad_format(&supported_modes[0], | ||
| 1045 | v4l2_subdev_get_try_format(sd, fh->pad, 0)); | ||
| 1046 | mutex_unlock(&ov8856->mutex); | ||
| 1047 | |||
| 1048 | return 0; | ||
| 1049 | } | ||
| 1050 | |||
| 1051 | static const struct v4l2_subdev_video_ops ov8856_video_ops = { | ||
| 1052 | .s_stream = ov8856_set_stream, | ||
| 1053 | }; | ||
| 1054 | |||
| 1055 | static const struct v4l2_subdev_pad_ops ov8856_pad_ops = { | ||
| 1056 | .set_fmt = ov8856_set_format, | ||
| 1057 | .get_fmt = ov8856_get_format, | ||
| 1058 | .enum_mbus_code = ov8856_enum_mbus_code, | ||
| 1059 | .enum_frame_size = ov8856_enum_frame_size, | ||
| 1060 | }; | ||
| 1061 | |||
| 1062 | static const struct v4l2_subdev_ops ov8856_subdev_ops = { | ||
| 1063 | .video = &ov8856_video_ops, | ||
| 1064 | .pad = &ov8856_pad_ops, | ||
| 1065 | }; | ||
| 1066 | |||
| 1067 | static const struct media_entity_operations ov8856_subdev_entity_ops = { | ||
| 1068 | .link_validate = v4l2_subdev_link_validate, | ||
| 1069 | }; | ||
| 1070 | |||
| 1071 | static const struct v4l2_subdev_internal_ops ov8856_internal_ops = { | ||
| 1072 | .open = ov8856_open, | ||
| 1073 | }; | ||
| 1074 | |||
| 1075 | static int ov8856_identify_module(struct ov8856 *ov8856) | ||
| 1076 | { | ||
| 1077 | struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); | ||
| 1078 | int ret; | ||
| 1079 | u32 val; | ||
| 1080 | |||
| 1081 | ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID, | ||
| 1082 | OV8856_REG_VALUE_24BIT, &val); | ||
| 1083 | if (ret) | ||
| 1084 | return ret; | ||
| 1085 | |||
| 1086 | if (val != OV8856_CHIP_ID) { | ||
| 1087 | dev_err(&client->dev, "chip id mismatch: %x!=%x", | ||
| 1088 | OV8856_CHIP_ID, val); | ||
| 1089 | return -ENXIO; | ||
| 1090 | } | ||
| 1091 | |||
| 1092 | return 0; | ||
| 1093 | } | ||
| 1094 | |||
| 1095 | static int ov8856_check_hwcfg(struct device *dev) | ||
| 1096 | { | ||
| 1097 | struct fwnode_handle *ep; | ||
| 1098 | struct fwnode_handle *fwnode = dev_fwnode(dev); | ||
| 1099 | struct v4l2_fwnode_endpoint bus_cfg = { | ||
| 1100 | .bus_type = V4L2_MBUS_CSI2_DPHY | ||
| 1101 | }; | ||
| 1102 | u32 mclk; | ||
| 1103 | int ret; | ||
| 1104 | unsigned int i, j; | ||
| 1105 | |||
| 1106 | if (!fwnode) | ||
| 1107 | return -ENXIO; | ||
| 1108 | |||
| 1109 | fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); | ||
| 1110 | if (mclk != OV8856_MCLK) { | ||
| 1111 | dev_err(dev, "external clock %d is not supported", mclk); | ||
| 1112 | return -EINVAL; | ||
| 1113 | } | ||
| 1114 | |||
| 1115 | ep = fwnode_graph_get_next_endpoint(fwnode, NULL); | ||
| 1116 | if (!ep) | ||
| 1117 | return -ENXIO; | ||
| 1118 | |||
| 1119 | ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); | ||
| 1120 | fwnode_handle_put(ep); | ||
| 1121 | if (ret) | ||
| 1122 | return ret; | ||
| 1123 | |||
| 1124 | if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV8856_DATA_LANES) { | ||
| 1125 | dev_err(dev, "number of CSI2 data lanes %d is not supported", | ||
| 1126 | bus_cfg.bus.mipi_csi2.num_data_lanes); | ||
| 1127 | ret = -EINVAL; | ||
| 1128 | goto check_hwcfg_error; | ||
| 1129 | } | ||
| 1130 | |||
| 1131 | if (!bus_cfg.nr_of_link_frequencies) { | ||
| 1132 | dev_err(dev, "no link frequencies defined"); | ||
| 1133 | ret = -EINVAL; | ||
| 1134 | goto check_hwcfg_error; | ||
| 1135 | } | ||
| 1136 | |||
| 1137 | for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) { | ||
| 1138 | for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) { | ||
| 1139 | if (link_freq_menu_items[i] == | ||
| 1140 | bus_cfg.link_frequencies[j]) | ||
| 1141 | break; | ||
| 1142 | } | ||
| 1143 | |||
| 1144 | if (j == bus_cfg.nr_of_link_frequencies) { | ||
| 1145 | dev_err(dev, "no link frequency %lld supported", | ||
| 1146 | link_freq_menu_items[i]); | ||
| 1147 | ret = -EINVAL; | ||
| 1148 | goto check_hwcfg_error; | ||
| 1149 | } | ||
| 1150 | } | ||
| 1151 | |||
| 1152 | check_hwcfg_error: | ||
| 1153 | v4l2_fwnode_endpoint_free(&bus_cfg); | ||
| 1154 | |||
| 1155 | return ret; | ||
| 1156 | } | ||
| 1157 | |||
| 1158 | static int ov8856_remove(struct i2c_client *client) | ||
| 1159 | { | ||
| 1160 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | ||
| 1161 | struct ov8856 *ov8856 = to_ov8856(sd); | ||
| 1162 | |||
| 1163 | v4l2_async_unregister_subdev(sd); | ||
| 1164 | media_entity_cleanup(&sd->entity); | ||
| 1165 | v4l2_ctrl_handler_free(sd->ctrl_handler); | ||
| 1166 | pm_runtime_disable(&client->dev); | ||
| 1167 | mutex_destroy(&ov8856->mutex); | ||
| 1168 | |||
| 1169 | return 0; | ||
| 1170 | } | ||
| 1171 | |||
| 1172 | static int ov8856_probe(struct i2c_client *client) | ||
| 1173 | { | ||
| 1174 | struct ov8856 *ov8856; | ||
| 1175 | int ret; | ||
| 1176 | |||
| 1177 | ret = ov8856_check_hwcfg(&client->dev); | ||
| 1178 | if (ret) { | ||
| 1179 | dev_err(&client->dev, "failed to check HW configuration: %d", | ||
| 1180 | ret); | ||
| 1181 | return ret; | ||
| 1182 | } | ||
| 1183 | |||
| 1184 | ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL); | ||
| 1185 | if (!ov8856) | ||
| 1186 | return -ENOMEM; | ||
| 1187 | |||
| 1188 | v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops); | ||
| 1189 | ret = ov8856_identify_module(ov8856); | ||
| 1190 | if (ret) { | ||
| 1191 | dev_err(&client->dev, "failed to find sensor: %d", ret); | ||
| 1192 | return ret; | ||
| 1193 | } | ||
| 1194 | |||
| 1195 | mutex_init(&ov8856->mutex); | ||
| 1196 | ov8856->cur_mode = &supported_modes[0]; | ||
| 1197 | ret = ov8856_init_controls(ov8856); | ||
| 1198 | if (ret) { | ||
| 1199 | dev_err(&client->dev, "failed to init controls: %d", ret); | ||
| 1200 | goto probe_error_v4l2_ctrl_handler_free; | ||
| 1201 | } | ||
| 1202 | |||
| 1203 | ov8856->sd.internal_ops = &ov8856_internal_ops; | ||
| 1204 | ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; | ||
| 1205 | ov8856->sd.entity.ops = &ov8856_subdev_entity_ops; | ||
| 1206 | ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; | ||
| 1207 | ov8856->pad.flags = MEDIA_PAD_FL_SOURCE; | ||
| 1208 | ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad); | ||
| 1209 | if (ret) { | ||
| 1210 | dev_err(&client->dev, "failed to init entity pads: %d", ret); | ||
| 1211 | goto probe_error_v4l2_ctrl_handler_free; | ||
| 1212 | } | ||
| 1213 | |||
| 1214 | ret = v4l2_async_register_subdev_sensor_common(&ov8856->sd); | ||
| 1215 | if (ret < 0) { | ||
| 1216 | dev_err(&client->dev, "failed to register V4L2 subdev: %d", | ||
| 1217 | ret); | ||
| 1218 | goto probe_error_media_entity_cleanup; | ||
| 1219 | } | ||
| 1220 | |||
| 1221 | /* | ||
| 1222 | * Device is already turned on by i2c-core with ACPI domain PM. | ||
| 1223 | * Enable runtime PM and turn off the device. | ||
| 1224 | */ | ||
| 1225 | pm_runtime_set_active(&client->dev); | ||
| 1226 | pm_runtime_enable(&client->dev); | ||
| 1227 | pm_runtime_idle(&client->dev); | ||
| 1228 | |||
| 1229 | return 0; | ||
| 1230 | |||
| 1231 | probe_error_media_entity_cleanup: | ||
| 1232 | media_entity_cleanup(&ov8856->sd.entity); | ||
| 1233 | |||
| 1234 | probe_error_v4l2_ctrl_handler_free: | ||
| 1235 | v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler); | ||
| 1236 | mutex_destroy(&ov8856->mutex); | ||
| 1237 | |||
| 1238 | return ret; | ||
| 1239 | } | ||
| 1240 | |||
| 1241 | static const struct dev_pm_ops ov8856_pm_ops = { | ||
| 1242 | SET_SYSTEM_SLEEP_PM_OPS(ov8856_suspend, ov8856_resume) | ||
| 1243 | }; | ||
| 1244 | |||
| 1245 | #ifdef CONFIG_ACPI | ||
| 1246 | static const struct acpi_device_id ov8856_acpi_ids[] = { | ||
| 1247 | {"OVTI8856"}, | ||
| 1248 | {} | ||
| 1249 | }; | ||
| 1250 | |||
| 1251 | MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids); | ||
| 1252 | #endif | ||
| 1253 | |||
| 1254 | static struct i2c_driver ov8856_i2c_driver = { | ||
| 1255 | .driver = { | ||
| 1256 | .name = "ov8856", | ||
| 1257 | .pm = &ov8856_pm_ops, | ||
| 1258 | .acpi_match_table = ACPI_PTR(ov8856_acpi_ids), | ||
| 1259 | }, | ||
| 1260 | .probe_new = ov8856_probe, | ||
| 1261 | .remove = ov8856_remove, | ||
| 1262 | }; | ||
| 1263 | |||
| 1264 | module_i2c_driver(ov8856_i2c_driver); | ||
| 1265 | |||
| 1266 | MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>"); | ||
| 1267 | MODULE_DESCRIPTION("OmniVision OV8856 sensor driver"); | ||
| 1268 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/media/i2c/soc_camera/soc_ov9640.c b/drivers/media/i2c/ov9640.c index eb91b8240083..d6831f28378b 100644 --- a/drivers/media/i2c/soc_camera/soc_ov9640.c +++ b/drivers/media/i2c/ov9640.c | |||
| @@ -1,3 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 1 | /* | 2 | /* |
| 2 | * OmniVision OV96xx Camera Driver | 3 | * OmniVision OV96xx Camera Driver |
| 3 | * | 4 | * |
| @@ -9,14 +10,11 @@ | |||
| 9 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | 10 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> |
| 10 | * | 11 | * |
| 11 | * Based on ov7670 and soc_camera_platform driver, | 12 | * Based on ov7670 and soc_camera_platform driver, |
| 13 | * transition from soc_camera to pxa_camera based on mt9m111 | ||
| 12 | * | 14 | * |
| 13 | * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> | 15 | * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> |
| 14 | * Copyright (C) 2008 Magnus Damm | 16 | * Copyright (C) 2008 Magnus Damm |
| 15 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | 17 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> |
| 16 | * | ||
| 17 | * This program is free software; you can redistribute it and/or modify | ||
| 18 | * it under the terms of the GNU General Public License version 2 as | ||
| 19 | * published by the Free Software Foundation. | ||
| 20 | */ | 18 | */ |
| 21 | 19 | ||
| 22 | #include <linux/init.h> | 20 | #include <linux/init.h> |
| @@ -27,10 +25,14 @@ | |||
| 27 | #include <linux/v4l2-mediabus.h> | 25 | #include <linux/v4l2-mediabus.h> |
| 28 | #include <linux/videodev2.h> | 26 | #include <linux/videodev2.h> |
| 29 | 27 | ||
| 30 | #include <media/soc_camera.h> | 28 | #include <media/v4l2-async.h> |
| 31 | #include <media/v4l2-clk.h> | 29 | #include <media/v4l2-clk.h> |
| 32 | #include <media/v4l2-common.h> | 30 | #include <media/v4l2-common.h> |
| 33 | #include <media/v4l2-ctrls.h> | 31 | #include <media/v4l2-ctrls.h> |
| 32 | #include <media/v4l2-device.h> | ||
| 33 | #include <media/v4l2-event.h> | ||
| 34 | |||
| 35 | #include <linux/gpio/consumer.h> | ||
| 34 | 36 | ||
| 35 | #include "ov9640.h" | 37 | #include "ov9640.h" |
| 36 | 38 | ||
| @@ -159,7 +161,7 @@ static const struct ov9640_reg ov9640_regs_rgb[] = { | |||
| 159 | { OV9640_MTXS, 0x65 }, | 161 | { OV9640_MTXS, 0x65 }, |
| 160 | }; | 162 | }; |
| 161 | 163 | ||
| 162 | static u32 ov9640_codes[] = { | 164 | static const u32 ov9640_codes[] = { |
| 163 | MEDIA_BUS_FMT_UYVY8_2X8, | 165 | MEDIA_BUS_FMT_UYVY8_2X8, |
| 164 | MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, | 166 | MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, |
| 165 | MEDIA_BUS_FMT_RGB565_2X8_LE, | 167 | MEDIA_BUS_FMT_RGB565_2X8_LE, |
| @@ -269,21 +271,23 @@ static int ov9640_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 269 | /* Set status of additional camera capabilities */ | 271 | /* Set status of additional camera capabilities */ |
| 270 | static int ov9640_s_ctrl(struct v4l2_ctrl *ctrl) | 272 | static int ov9640_s_ctrl(struct v4l2_ctrl *ctrl) |
| 271 | { | 273 | { |
| 272 | struct ov9640_priv *priv = container_of(ctrl->handler, struct ov9640_priv, hdl); | 274 | struct ov9640_priv *priv = container_of(ctrl->handler, |
| 275 | struct ov9640_priv, hdl); | ||
| 273 | struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev); | 276 | struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev); |
| 274 | 277 | ||
| 275 | switch (ctrl->id) { | 278 | switch (ctrl->id) { |
| 276 | case V4L2_CID_VFLIP: | 279 | case V4L2_CID_VFLIP: |
| 277 | if (ctrl->val) | 280 | if (ctrl->val) |
| 278 | return ov9640_reg_rmw(client, OV9640_MVFP, | 281 | return ov9640_reg_rmw(client, OV9640_MVFP, |
| 279 | OV9640_MVFP_V, 0); | 282 | OV9640_MVFP_V, 0); |
| 280 | return ov9640_reg_rmw(client, OV9640_MVFP, 0, OV9640_MVFP_V); | 283 | return ov9640_reg_rmw(client, OV9640_MVFP, 0, OV9640_MVFP_V); |
| 281 | case V4L2_CID_HFLIP: | 284 | case V4L2_CID_HFLIP: |
| 282 | if (ctrl->val) | 285 | if (ctrl->val) |
| 283 | return ov9640_reg_rmw(client, OV9640_MVFP, | 286 | return ov9640_reg_rmw(client, OV9640_MVFP, |
| 284 | OV9640_MVFP_H, 0); | 287 | OV9640_MVFP_H, 0); |
| 285 | return ov9640_reg_rmw(client, OV9640_MVFP, 0, OV9640_MVFP_H); | 288 | return ov9640_reg_rmw(client, OV9640_MVFP, 0, OV9640_MVFP_H); |
| 286 | } | 289 | } |
| 290 | |||
| 287 | return -EINVAL; | 291 | return -EINVAL; |
| 288 | } | 292 | } |
| 289 | 293 | ||
| @@ -323,20 +327,33 @@ static int ov9640_set_register(struct v4l2_subdev *sd, | |||
| 323 | 327 | ||
| 324 | static int ov9640_s_power(struct v4l2_subdev *sd, int on) | 328 | static int ov9640_s_power(struct v4l2_subdev *sd, int on) |
| 325 | { | 329 | { |
| 326 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 327 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 328 | struct ov9640_priv *priv = to_ov9640_sensor(sd); | 330 | struct ov9640_priv *priv = to_ov9640_sensor(sd); |
| 331 | int ret = 0; | ||
| 332 | |||
| 333 | if (on) { | ||
| 334 | gpiod_set_value(priv->gpio_power, 1); | ||
| 335 | usleep_range(1000, 2000); | ||
| 336 | ret = v4l2_clk_enable(priv->clk); | ||
| 337 | usleep_range(1000, 2000); | ||
| 338 | gpiod_set_value(priv->gpio_reset, 0); | ||
| 339 | } else { | ||
| 340 | gpiod_set_value(priv->gpio_reset, 1); | ||
| 341 | usleep_range(1000, 2000); | ||
| 342 | v4l2_clk_disable(priv->clk); | ||
| 343 | usleep_range(1000, 2000); | ||
| 344 | gpiod_set_value(priv->gpio_power, 0); | ||
| 345 | } | ||
| 329 | 346 | ||
| 330 | return soc_camera_set_power(&client->dev, ssdd, priv->clk, on); | 347 | return ret; |
| 331 | } | 348 | } |
| 332 | 349 | ||
| 333 | /* select nearest higher resolution for capture */ | 350 | /* select nearest higher resolution for capture */ |
| 334 | static void ov9640_res_roundup(u32 *width, u32 *height) | 351 | static void ov9640_res_roundup(u32 *width, u32 *height) |
| 335 | { | 352 | { |
| 336 | int i; | 353 | unsigned int i; |
| 337 | enum { QQCIF, QQVGA, QCIF, QVGA, CIF, VGA, SXGA }; | 354 | enum { QQCIF, QQVGA, QCIF, QVGA, CIF, VGA, SXGA }; |
| 338 | static const int res_x[] = { 88, 160, 176, 320, 352, 640, 1280 }; | 355 | static const u32 res_x[] = { 88, 160, 176, 320, 352, 640, 1280 }; |
| 339 | static const int res_y[] = { 72, 120, 144, 240, 288, 480, 960 }; | 356 | static const u32 res_y[] = { 72, 120, 144, 240, 288, 480, 960 }; |
| 340 | 357 | ||
| 341 | for (i = 0; i < ARRAY_SIZE(res_x); i++) { | 358 | for (i = 0; i < ARRAY_SIZE(res_x); i++) { |
| 342 | if (res_x[i] >= *width && res_y[i] >= *height) { | 359 | if (res_x[i] >= *width && res_y[i] >= *height) { |
| @@ -379,8 +396,9 @@ static int ov9640_write_regs(struct i2c_client *client, u32 width, | |||
| 379 | u32 code, struct ov9640_reg_alt *alts) | 396 | u32 code, struct ov9640_reg_alt *alts) |
| 380 | { | 397 | { |
| 381 | const struct ov9640_reg *ov9640_regs, *matrix_regs; | 398 | const struct ov9640_reg *ov9640_regs, *matrix_regs; |
| 382 | int ov9640_regs_len, matrix_regs_len; | 399 | unsigned int ov9640_regs_len, matrix_regs_len; |
| 383 | int i, ret; | 400 | unsigned int i; |
| 401 | int ret; | ||
| 384 | u8 val; | 402 | u8 val; |
| 385 | 403 | ||
| 386 | /* select register configuration for given resolution */ | 404 | /* select register configuration for given resolution */ |
| @@ -454,7 +472,7 @@ static int ov9640_write_regs(struct i2c_client *client, u32 width, | |||
| 454 | /* write color matrix configuration into the module */ | 472 | /* write color matrix configuration into the module */ |
| 455 | for (i = 0; i < matrix_regs_len; i++) { | 473 | for (i = 0; i < matrix_regs_len; i++) { |
| 456 | ret = ov9640_reg_write(client, matrix_regs[i].reg, | 474 | ret = ov9640_reg_write(client, matrix_regs[i].reg, |
| 457 | matrix_regs[i].val); | 475 | matrix_regs[i].val); |
| 458 | if (ret) | 476 | if (ret) |
| 459 | return ret; | 477 | return ret; |
| 460 | } | 478 | } |
| @@ -465,17 +483,18 @@ static int ov9640_write_regs(struct i2c_client *client, u32 width, | |||
| 465 | /* program default register values */ | 483 | /* program default register values */ |
| 466 | static int ov9640_prog_dflt(struct i2c_client *client) | 484 | static int ov9640_prog_dflt(struct i2c_client *client) |
| 467 | { | 485 | { |
| 468 | int i, ret; | 486 | unsigned int i; |
| 487 | int ret; | ||
| 469 | 488 | ||
| 470 | for (i = 0; i < ARRAY_SIZE(ov9640_regs_dflt); i++) { | 489 | for (i = 0; i < ARRAY_SIZE(ov9640_regs_dflt); i++) { |
| 471 | ret = ov9640_reg_write(client, ov9640_regs_dflt[i].reg, | 490 | ret = ov9640_reg_write(client, ov9640_regs_dflt[i].reg, |
| 472 | ov9640_regs_dflt[i].val); | 491 | ov9640_regs_dflt[i].val); |
| 473 | if (ret) | 492 | if (ret) |
| 474 | return ret; | 493 | return ret; |
| 475 | } | 494 | } |
| 476 | 495 | ||
| 477 | /* wait for the changes to actually happen, 140ms are not enough yet */ | 496 | /* wait for the changes to actually happen, 140ms are not enough yet */ |
| 478 | mdelay(150); | 497 | msleep(150); |
| 479 | 498 | ||
| 480 | return 0; | 499 | return 0; |
| 481 | } | 500 | } |
| @@ -529,6 +548,7 @@ static int ov9640_set_fmt(struct v4l2_subdev *sd, | |||
| 529 | return ov9640_s_fmt(sd, mf); | 548 | return ov9640_s_fmt(sd, mf); |
| 530 | 549 | ||
| 531 | cfg->try_fmt = *mf; | 550 | cfg->try_fmt = *mf; |
| 551 | |||
| 532 | return 0; | 552 | return 0; |
| 533 | } | 553 | } |
| 534 | 554 | ||
| @@ -540,6 +560,7 @@ static int ov9640_enum_mbus_code(struct v4l2_subdev *sd, | |||
| 540 | return -EINVAL; | 560 | return -EINVAL; |
| 541 | 561 | ||
| 542 | code->code = ov9640_codes[code->index]; | 562 | code->code = ov9640_codes[code->index]; |
| 563 | |||
| 543 | return 0; | 564 | return 0; |
| 544 | } | 565 | } |
| 545 | 566 | ||
| @@ -630,14 +651,10 @@ static const struct v4l2_subdev_core_ops ov9640_core_ops = { | |||
| 630 | static int ov9640_g_mbus_config(struct v4l2_subdev *sd, | 651 | static int ov9640_g_mbus_config(struct v4l2_subdev *sd, |
| 631 | struct v4l2_mbus_config *cfg) | 652 | struct v4l2_mbus_config *cfg) |
| 632 | { | 653 | { |
| 633 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 634 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 635 | |||
| 636 | cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | | 654 | cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | |
| 637 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH | | 655 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH | |
| 638 | V4L2_MBUS_DATA_ACTIVE_HIGH; | 656 | V4L2_MBUS_DATA_ACTIVE_HIGH; |
| 639 | cfg->type = V4L2_MBUS_PARALLEL; | 657 | cfg->type = V4L2_MBUS_PARALLEL; |
| 640 | cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); | ||
| 641 | 658 | ||
| 642 | return 0; | 659 | return 0; |
| 643 | } | 660 | } |
| @@ -666,41 +683,62 @@ static int ov9640_probe(struct i2c_client *client, | |||
| 666 | const struct i2c_device_id *did) | 683 | const struct i2c_device_id *did) |
| 667 | { | 684 | { |
| 668 | struct ov9640_priv *priv; | 685 | struct ov9640_priv *priv; |
| 669 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 670 | int ret; | 686 | int ret; |
| 671 | 687 | ||
| 672 | if (!ssdd) { | ||
| 673 | dev_err(&client->dev, "Missing platform_data for driver\n"); | ||
| 674 | return -EINVAL; | ||
| 675 | } | ||
| 676 | |||
| 677 | priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); | 688 | priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); |
| 678 | if (!priv) | 689 | if (!priv) |
| 679 | return -ENOMEM; | 690 | return -ENOMEM; |
| 680 | 691 | ||
| 692 | priv->gpio_power = devm_gpiod_get(&client->dev, "Camera power", | ||
| 693 | GPIOD_OUT_LOW); | ||
| 694 | if (IS_ERR_OR_NULL(priv->gpio_power)) { | ||
| 695 | ret = PTR_ERR(priv->gpio_power); | ||
| 696 | return ret; | ||
| 697 | } | ||
| 698 | |||
| 699 | priv->gpio_reset = devm_gpiod_get(&client->dev, "Camera reset", | ||
| 700 | GPIOD_OUT_HIGH); | ||
| 701 | if (IS_ERR_OR_NULL(priv->gpio_reset)) { | ||
| 702 | ret = PTR_ERR(priv->gpio_reset); | ||
| 703 | return ret; | ||
| 704 | } | ||
| 705 | |||
| 681 | v4l2_i2c_subdev_init(&priv->subdev, client, &ov9640_subdev_ops); | 706 | v4l2_i2c_subdev_init(&priv->subdev, client, &ov9640_subdev_ops); |
| 682 | 707 | ||
| 683 | v4l2_ctrl_handler_init(&priv->hdl, 2); | 708 | v4l2_ctrl_handler_init(&priv->hdl, 2); |
| 684 | v4l2_ctrl_new_std(&priv->hdl, &ov9640_ctrl_ops, | 709 | v4l2_ctrl_new_std(&priv->hdl, &ov9640_ctrl_ops, |
| 685 | V4L2_CID_VFLIP, 0, 1, 1, 0); | 710 | V4L2_CID_VFLIP, 0, 1, 1, 0); |
| 686 | v4l2_ctrl_new_std(&priv->hdl, &ov9640_ctrl_ops, | 711 | v4l2_ctrl_new_std(&priv->hdl, &ov9640_ctrl_ops, |
| 687 | V4L2_CID_HFLIP, 0, 1, 1, 0); | 712 | V4L2_CID_HFLIP, 0, 1, 1, 0); |
| 713 | |||
| 714 | if (priv->hdl.error) { | ||
| 715 | ret = priv->hdl.error; | ||
| 716 | goto ectrlinit; | ||
| 717 | } | ||
| 718 | |||
| 688 | priv->subdev.ctrl_handler = &priv->hdl; | 719 | priv->subdev.ctrl_handler = &priv->hdl; |
| 689 | if (priv->hdl.error) | ||
| 690 | return priv->hdl.error; | ||
| 691 | 720 | ||
| 692 | priv->clk = v4l2_clk_get(&client->dev, "mclk"); | 721 | priv->clk = v4l2_clk_get(&client->dev, "mclk"); |
| 693 | if (IS_ERR(priv->clk)) { | 722 | if (IS_ERR(priv->clk)) { |
| 694 | ret = PTR_ERR(priv->clk); | 723 | ret = PTR_ERR(priv->clk); |
| 695 | goto eclkget; | 724 | goto ectrlinit; |
| 696 | } | 725 | } |
| 697 | 726 | ||
| 698 | ret = ov9640_video_probe(client); | 727 | ret = ov9640_video_probe(client); |
| 699 | if (ret) { | 728 | if (ret) |
| 700 | v4l2_clk_put(priv->clk); | 729 | goto eprobe; |
| 701 | eclkget: | 730 | |
| 702 | v4l2_ctrl_handler_free(&priv->hdl); | 731 | priv->subdev.dev = &client->dev; |
| 703 | } | 732 | ret = v4l2_async_register_subdev(&priv->subdev); |
| 733 | if (ret) | ||
| 734 | goto eprobe; | ||
| 735 | |||
| 736 | return 0; | ||
| 737 | |||
| 738 | eprobe: | ||
| 739 | v4l2_clk_put(priv->clk); | ||
| 740 | ectrlinit: | ||
| 741 | v4l2_ctrl_handler_free(&priv->hdl); | ||
| 704 | 742 | ||
| 705 | return ret; | 743 | return ret; |
| 706 | } | 744 | } |
| @@ -711,8 +749,9 @@ static int ov9640_remove(struct i2c_client *client) | |||
| 711 | struct ov9640_priv *priv = to_ov9640_sensor(sd); | 749 | struct ov9640_priv *priv = to_ov9640_sensor(sd); |
| 712 | 750 | ||
| 713 | v4l2_clk_put(priv->clk); | 751 | v4l2_clk_put(priv->clk); |
| 714 | v4l2_device_unregister_subdev(&priv->subdev); | 752 | v4l2_async_unregister_subdev(&priv->subdev); |
| 715 | v4l2_ctrl_handler_free(&priv->hdl); | 753 | v4l2_ctrl_handler_free(&priv->hdl); |
| 754 | |||
| 716 | return 0; | 755 | return 0; |
| 717 | } | 756 | } |
| 718 | 757 | ||
diff --git a/drivers/media/i2c/soc_camera/ov9640.h b/drivers/media/i2c/ov9640.h index 65d13ff17536..a8ed6992c1a8 100644 --- a/drivers/media/i2c/soc_camera/ov9640.h +++ b/drivers/media/i2c/ov9640.h | |||
| @@ -1,11 +1,8 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 1 | /* | 2 | /* |
| 2 | * OmniVision OV96xx Camera Header File | 3 | * OmniVision OV96xx Camera Header File |
| 3 | * | 4 | * |
| 4 | * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com> | 5 | * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com> |
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | 6 | */ |
| 10 | 7 | ||
| 11 | #ifndef __DRIVERS_MEDIA_VIDEO_OV9640_H__ | 8 | #ifndef __DRIVERS_MEDIA_VIDEO_OV9640_H__ |
| @@ -200,6 +197,8 @@ struct ov9640_priv { | |||
| 200 | struct v4l2_subdev subdev; | 197 | struct v4l2_subdev subdev; |
| 201 | struct v4l2_ctrl_handler hdl; | 198 | struct v4l2_ctrl_handler hdl; |
| 202 | struct v4l2_clk *clk; | 199 | struct v4l2_clk *clk; |
| 200 | struct gpio_desc *gpio_power; | ||
| 201 | struct gpio_desc *gpio_reset; | ||
| 203 | 202 | ||
| 204 | int model; | 203 | int model; |
| 205 | int revision; | 204 | int revision; |
diff --git a/drivers/media/i2c/ov9650.c b/drivers/media/i2c/ov9650.c index f0587c0c0a72..eefd57ec2a73 100644 --- a/drivers/media/i2c/ov9650.c +++ b/drivers/media/i2c/ov9650.c | |||
| @@ -45,8 +45,8 @@ MODULE_PARM_DESC(debug, "Debug level (0-2)"); | |||
| 45 | * OV9650/OV9652 register definitions | 45 | * OV9650/OV9652 register definitions |
| 46 | */ | 46 | */ |
| 47 | #define REG_GAIN 0x00 /* Gain control, AGC[7:0] */ | 47 | #define REG_GAIN 0x00 /* Gain control, AGC[7:0] */ |
| 48 | #define REG_BLUE 0x01 /* AWB - Blue chanel gain */ | 48 | #define REG_BLUE 0x01 /* AWB - Blue channel gain */ |
| 49 | #define REG_RED 0x02 /* AWB - Red chanel gain */ | 49 | #define REG_RED 0x02 /* AWB - Red channel gain */ |
| 50 | #define REG_VREF 0x03 /* [7:6] - AGC[9:8], [5:3]/[2:0] */ | 50 | #define REG_VREF 0x03 /* [7:6] - AGC[9:8], [5:3]/[2:0] */ |
| 51 | #define VREF_GAIN_MASK 0xc0 /* - VREF end/start low 3 bits */ | 51 | #define VREF_GAIN_MASK 0xc0 /* - VREF end/start low 3 bits */ |
| 52 | #define REG_COM1 0x04 | 52 | #define REG_COM1 0x04 |
diff --git a/drivers/media/i2c/s5c73m3/s5c73m3-core.c b/drivers/media/i2c/s5c73m3/s5c73m3-core.c index c461847ddae8..b52fe250f75f 100644 --- a/drivers/media/i2c/s5c73m3/s5c73m3-core.c +++ b/drivers/media/i2c/s5c73m3/s5c73m3-core.c | |||
| @@ -1431,7 +1431,7 @@ err: | |||
| 1431 | for (++i; i < S5C73M3_MAX_SUPPLIES; i++) { | 1431 | for (++i; i < S5C73M3_MAX_SUPPLIES; i++) { |
| 1432 | int r = regulator_enable(state->supplies[i].consumer); | 1432 | int r = regulator_enable(state->supplies[i].consumer); |
| 1433 | if (r < 0) | 1433 | if (r < 0) |
| 1434 | v4l2_err(&state->oif_sd, "Failed to reenable %s: %d\n", | 1434 | v4l2_err(&state->oif_sd, "Failed to re-enable %s: %d\n", |
| 1435 | state->supplies[i].supply, r); | 1435 | state->supplies[i].supply, r); |
| 1436 | } | 1436 | } |
| 1437 | 1437 | ||
diff --git a/drivers/media/i2c/s5k4ecgx.c b/drivers/media/i2c/s5k4ecgx.c index 79aa2740edc4..79c1894c2c83 100644 --- a/drivers/media/i2c/s5k4ecgx.c +++ b/drivers/media/i2c/s5k4ecgx.c | |||
| @@ -263,8 +263,6 @@ static int s5k4ecgx_read(struct i2c_client *client, u32 addr, u16 *val) | |||
| 263 | ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRL, low); | 263 | ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRL, low); |
| 264 | if (!ret) | 264 | if (!ret) |
| 265 | ret = s5k4ecgx_i2c_read(client, REG_CMDBUF0_ADDR, val); | 265 | ret = s5k4ecgx_i2c_read(client, REG_CMDBUF0_ADDR, val); |
| 266 | if (!ret) | ||
| 267 | dev_err(&client->dev, "Failed to execute read command\n"); | ||
| 268 | 266 | ||
| 269 | return ret; | 267 | return ret; |
| 270 | } | 268 | } |
diff --git a/drivers/media/i2c/s5k6aa.c b/drivers/media/i2c/s5k6aa.c index ab26f549d716..f8630c4c2ef0 100644 --- a/drivers/media/i2c/s5k6aa.c +++ b/drivers/media/i2c/s5k6aa.c | |||
| @@ -729,7 +729,7 @@ static int s5k6aa_new_config_sync(struct i2c_client *client, int timeout, | |||
| 729 | * @s5k6aa: pointer to &struct s5k6aa describing the device | 729 | * @s5k6aa: pointer to &struct s5k6aa describing the device |
| 730 | * @preset: s5kaa preset to be applied | 730 | * @preset: s5kaa preset to be applied |
| 731 | * | 731 | * |
| 732 | * Configure output resolution and color fromat, pixel clock | 732 | * Configure output resolution and color format, pixel clock |
| 733 | * frequency range, device frame rate type and frame period range. | 733 | * frequency range, device frame rate type and frame period range. |
| 734 | */ | 734 | */ |
| 735 | static int s5k6aa_set_prev_config(struct s5k6aa *s5k6aa, | 735 | static int s5k6aa_set_prev_config(struct s5k6aa *s5k6aa, |
diff --git a/drivers/media/i2c/saa7115.c b/drivers/media/i2c/saa7115.c index 6bc278aa31fc..88dc6baac639 100644 --- a/drivers/media/i2c/saa7115.c +++ b/drivers/media/i2c/saa7115.c | |||
| @@ -1766,7 +1766,7 @@ static int saa711x_detect_chip(struct i2c_client *client, | |||
| 1766 | * exists. However, tests on a device labeled as: | 1766 | * exists. However, tests on a device labeled as: |
| 1767 | * "GM7113C 1145" returned "10" on all 16 chip | 1767 | * "GM7113C 1145" returned "10" on all 16 chip |
| 1768 | * version (reg 0x00) reads. So, we need to also | 1768 | * version (reg 0x00) reads. So, we need to also |
| 1769 | * accept at least verion 0. For now, let's just | 1769 | * accept at least version 0. For now, let's just |
| 1770 | * assume that a device that returns "0000" for | 1770 | * assume that a device that returns "0000" for |
| 1771 | * the lower nibble is a gm7113c. | 1771 | * the lower nibble is a gm7113c. |
| 1772 | */ | 1772 | */ |
diff --git a/drivers/media/i2c/saa717x.c b/drivers/media/i2c/saa717x.c index 668c39cc29e8..86b8b65ea683 100644 --- a/drivers/media/i2c/saa717x.c +++ b/drivers/media/i2c/saa717x.c | |||
| @@ -844,7 +844,7 @@ static void set_h_prescale(struct v4l2_subdev *sd, | |||
| 844 | if (i == count) | 844 | if (i == count) |
| 845 | return; | 845 | return; |
| 846 | 846 | ||
| 847 | /* horizonal prescaling */ | 847 | /* horizontal prescaling */ |
| 848 | saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc); | 848 | saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc); |
| 849 | /* accumulation length */ | 849 | /* accumulation length */ |
| 850 | saa717x_write(sd, 0x61 + task_shift, vals[i].xacl); | 850 | saa717x_write(sd, 0x61 + task_shift, vals[i].xacl); |
diff --git a/drivers/media/i2c/soc_camera/Makefile b/drivers/media/i2c/soc_camera/Makefile deleted file mode 100644 index 09ae483b96ef..000000000000 --- a/drivers/media/i2c/soc_camera/Makefile +++ /dev/null | |||
| @@ -1,10 +0,0 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | ||
| 2 | obj-$(CONFIG_SOC_CAMERA_MT9M001) += soc_mt9m001.o | ||
| 3 | obj-$(CONFIG_SOC_CAMERA_MT9T112) += soc_mt9t112.o | ||
| 4 | obj-$(CONFIG_SOC_CAMERA_MT9V022) += soc_mt9v022.o | ||
| 5 | obj-$(CONFIG_SOC_CAMERA_OV5642) += soc_ov5642.o | ||
| 6 | obj-$(CONFIG_SOC_CAMERA_OV772X) += soc_ov772x.o | ||
| 7 | obj-$(CONFIG_SOC_CAMERA_OV9640) += soc_ov9640.o | ||
| 8 | obj-$(CONFIG_SOC_CAMERA_OV9740) += soc_ov9740.o | ||
| 9 | obj-$(CONFIG_SOC_CAMERA_RJ54N1) += soc_rj54n1cb0c.o | ||
| 10 | obj-$(CONFIG_SOC_CAMERA_TW9910) += soc_tw9910.o | ||
diff --git a/drivers/media/i2c/soc_camera/soc_mt9t112.c b/drivers/media/i2c/soc_camera/soc_mt9t112.c deleted file mode 100644 index ea1ff270bc2d..000000000000 --- a/drivers/media/i2c/soc_camera/soc_mt9t112.c +++ /dev/null | |||
| @@ -1,1157 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * mt9t112 Camera Driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Renesas Solutions Corp. | ||
| 5 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | ||
| 6 | * | ||
| 7 | * Based on ov772x driver, mt9m111 driver, | ||
| 8 | * | ||
| 9 | * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> | ||
| 10 | * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> | ||
| 11 | * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> | ||
| 12 | * Copyright (C) 2008 Magnus Damm | ||
| 13 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | ||
| 14 | * | ||
| 15 | * This program is free software; you can redistribute it and/or modify | ||
| 16 | * it under the terms of the GNU General Public License version 2 as | ||
| 17 | * published by the Free Software Foundation. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/delay.h> | ||
| 21 | #include <linux/i2c.h> | ||
| 22 | #include <linux/init.h> | ||
| 23 | #include <linux/module.h> | ||
| 24 | #include <linux/slab.h> | ||
| 25 | #include <linux/v4l2-mediabus.h> | ||
| 26 | #include <linux/videodev2.h> | ||
| 27 | |||
| 28 | #include <media/i2c/mt9t112.h> | ||
| 29 | #include <media/soc_camera.h> | ||
| 30 | #include <media/v4l2-clk.h> | ||
| 31 | #include <media/v4l2-common.h> | ||
| 32 | #include <media/v4l2-image-sizes.h> | ||
| 33 | |||
| 34 | /* you can check PLL/clock info */ | ||
| 35 | /* #define EXT_CLOCK 24000000 */ | ||
| 36 | |||
| 37 | /************************************************************************ | ||
| 38 | macro | ||
| 39 | ************************************************************************/ | ||
| 40 | /* | ||
| 41 | * frame size | ||
| 42 | */ | ||
| 43 | #define MAX_WIDTH 2048 | ||
| 44 | #define MAX_HEIGHT 1536 | ||
| 45 | |||
| 46 | /* | ||
| 47 | * macro of read/write | ||
| 48 | */ | ||
| 49 | #define ECHECKER(ret, x) \ | ||
| 50 | do { \ | ||
| 51 | (ret) = (x); \ | ||
| 52 | if ((ret) < 0) \ | ||
| 53 | return (ret); \ | ||
| 54 | } while (0) | ||
| 55 | |||
| 56 | #define mt9t112_reg_write(ret, client, a, b) \ | ||
| 57 | ECHECKER(ret, __mt9t112_reg_write(client, a, b)) | ||
| 58 | #define mt9t112_mcu_write(ret, client, a, b) \ | ||
| 59 | ECHECKER(ret, __mt9t112_mcu_write(client, a, b)) | ||
| 60 | |||
| 61 | #define mt9t112_reg_mask_set(ret, client, a, b, c) \ | ||
| 62 | ECHECKER(ret, __mt9t112_reg_mask_set(client, a, b, c)) | ||
| 63 | #define mt9t112_mcu_mask_set(ret, client, a, b, c) \ | ||
| 64 | ECHECKER(ret, __mt9t112_mcu_mask_set(client, a, b, c)) | ||
| 65 | |||
| 66 | #define mt9t112_reg_read(ret, client, a) \ | ||
| 67 | ECHECKER(ret, __mt9t112_reg_read(client, a)) | ||
| 68 | |||
| 69 | /* | ||
| 70 | * Logical address | ||
| 71 | */ | ||
| 72 | #define _VAR(id, offset, base) (base | (id & 0x1f) << 10 | (offset & 0x3ff)) | ||
| 73 | #define VAR(id, offset) _VAR(id, offset, 0x0000) | ||
| 74 | #define VAR8(id, offset) _VAR(id, offset, 0x8000) | ||
| 75 | |||
| 76 | /************************************************************************ | ||
| 77 | struct | ||
| 78 | ************************************************************************/ | ||
| 79 | struct mt9t112_format { | ||
| 80 | u32 code; | ||
| 81 | enum v4l2_colorspace colorspace; | ||
| 82 | u16 fmt; | ||
| 83 | u16 order; | ||
| 84 | }; | ||
| 85 | |||
| 86 | struct mt9t112_priv { | ||
| 87 | struct v4l2_subdev subdev; | ||
| 88 | struct mt9t112_platform_data *info; | ||
| 89 | struct i2c_client *client; | ||
| 90 | struct v4l2_rect frame; | ||
| 91 | struct v4l2_clk *clk; | ||
| 92 | const struct mt9t112_format *format; | ||
| 93 | int num_formats; | ||
| 94 | u32 flags; | ||
| 95 | /* for flags */ | ||
| 96 | #define INIT_DONE (1 << 0) | ||
| 97 | #define PCLK_RISING (1 << 1) | ||
| 98 | }; | ||
| 99 | |||
| 100 | /************************************************************************ | ||
| 101 | supported format | ||
| 102 | ************************************************************************/ | ||
| 103 | |||
| 104 | static const struct mt9t112_format mt9t112_cfmts[] = { | ||
| 105 | { | ||
| 106 | .code = MEDIA_BUS_FMT_UYVY8_2X8, | ||
| 107 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 108 | .fmt = 1, | ||
| 109 | .order = 0, | ||
| 110 | }, { | ||
| 111 | .code = MEDIA_BUS_FMT_VYUY8_2X8, | ||
| 112 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 113 | .fmt = 1, | ||
| 114 | .order = 1, | ||
| 115 | }, { | ||
| 116 | .code = MEDIA_BUS_FMT_YUYV8_2X8, | ||
| 117 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 118 | .fmt = 1, | ||
| 119 | .order = 2, | ||
| 120 | }, { | ||
| 121 | .code = MEDIA_BUS_FMT_YVYU8_2X8, | ||
| 122 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 123 | .fmt = 1, | ||
| 124 | .order = 3, | ||
| 125 | }, { | ||
| 126 | .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, | ||
| 127 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 128 | .fmt = 8, | ||
| 129 | .order = 2, | ||
| 130 | }, { | ||
| 131 | .code = MEDIA_BUS_FMT_RGB565_2X8_LE, | ||
| 132 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 133 | .fmt = 4, | ||
| 134 | .order = 2, | ||
| 135 | }, | ||
| 136 | }; | ||
| 137 | |||
| 138 | /************************************************************************ | ||
| 139 | general function | ||
| 140 | ************************************************************************/ | ||
| 141 | static struct mt9t112_priv *to_mt9t112(const struct i2c_client *client) | ||
| 142 | { | ||
| 143 | return container_of(i2c_get_clientdata(client), | ||
| 144 | struct mt9t112_priv, | ||
| 145 | subdev); | ||
| 146 | } | ||
| 147 | |||
| 148 | static int __mt9t112_reg_read(const struct i2c_client *client, u16 command) | ||
| 149 | { | ||
| 150 | struct i2c_msg msg[2]; | ||
| 151 | u8 buf[2]; | ||
| 152 | int ret; | ||
| 153 | |||
| 154 | command = swab16(command); | ||
| 155 | |||
| 156 | msg[0].addr = client->addr; | ||
| 157 | msg[0].flags = 0; | ||
| 158 | msg[0].len = 2; | ||
| 159 | msg[0].buf = (u8 *)&command; | ||
| 160 | |||
| 161 | msg[1].addr = client->addr; | ||
| 162 | msg[1].flags = I2C_M_RD; | ||
| 163 | msg[1].len = 2; | ||
| 164 | msg[1].buf = buf; | ||
| 165 | |||
| 166 | /* | ||
| 167 | * if return value of this function is < 0, | ||
| 168 | * it mean error. | ||
| 169 | * else, under 16bit is valid data. | ||
| 170 | */ | ||
| 171 | ret = i2c_transfer(client->adapter, msg, 2); | ||
| 172 | if (ret < 0) | ||
| 173 | return ret; | ||
| 174 | |||
| 175 | memcpy(&ret, buf, 2); | ||
| 176 | return swab16(ret); | ||
| 177 | } | ||
| 178 | |||
| 179 | static int __mt9t112_reg_write(const struct i2c_client *client, | ||
| 180 | u16 command, u16 data) | ||
| 181 | { | ||
| 182 | struct i2c_msg msg; | ||
| 183 | u8 buf[4]; | ||
| 184 | int ret; | ||
| 185 | |||
| 186 | command = swab16(command); | ||
| 187 | data = swab16(data); | ||
| 188 | |||
| 189 | memcpy(buf + 0, &command, 2); | ||
| 190 | memcpy(buf + 2, &data, 2); | ||
| 191 | |||
| 192 | msg.addr = client->addr; | ||
| 193 | msg.flags = 0; | ||
| 194 | msg.len = 4; | ||
| 195 | msg.buf = buf; | ||
| 196 | |||
| 197 | /* | ||
| 198 | * i2c_transfer return message length, | ||
| 199 | * but this function should return 0 if correct case | ||
| 200 | */ | ||
| 201 | ret = i2c_transfer(client->adapter, &msg, 1); | ||
| 202 | if (ret >= 0) | ||
| 203 | ret = 0; | ||
| 204 | |||
| 205 | return ret; | ||
| 206 | } | ||
| 207 | |||
| 208 | static int __mt9t112_reg_mask_set(const struct i2c_client *client, | ||
| 209 | u16 command, | ||
| 210 | u16 mask, | ||
| 211 | u16 set) | ||
| 212 | { | ||
| 213 | int val = __mt9t112_reg_read(client, command); | ||
| 214 | if (val < 0) | ||
| 215 | return val; | ||
| 216 | |||
| 217 | val &= ~mask; | ||
| 218 | val |= set & mask; | ||
| 219 | |||
| 220 | return __mt9t112_reg_write(client, command, val); | ||
| 221 | } | ||
| 222 | |||
| 223 | /* mcu access */ | ||
| 224 | static int __mt9t112_mcu_read(const struct i2c_client *client, u16 command) | ||
| 225 | { | ||
| 226 | int ret; | ||
| 227 | |||
| 228 | ret = __mt9t112_reg_write(client, 0x098E, command); | ||
| 229 | if (ret < 0) | ||
| 230 | return ret; | ||
| 231 | |||
| 232 | return __mt9t112_reg_read(client, 0x0990); | ||
| 233 | } | ||
| 234 | |||
| 235 | static int __mt9t112_mcu_write(const struct i2c_client *client, | ||
| 236 | u16 command, u16 data) | ||
| 237 | { | ||
| 238 | int ret; | ||
| 239 | |||
| 240 | ret = __mt9t112_reg_write(client, 0x098E, command); | ||
| 241 | if (ret < 0) | ||
| 242 | return ret; | ||
| 243 | |||
| 244 | return __mt9t112_reg_write(client, 0x0990, data); | ||
| 245 | } | ||
| 246 | |||
| 247 | static int __mt9t112_mcu_mask_set(const struct i2c_client *client, | ||
| 248 | u16 command, | ||
| 249 | u16 mask, | ||
| 250 | u16 set) | ||
| 251 | { | ||
| 252 | int val = __mt9t112_mcu_read(client, command); | ||
| 253 | if (val < 0) | ||
| 254 | return val; | ||
| 255 | |||
| 256 | val &= ~mask; | ||
| 257 | val |= set & mask; | ||
| 258 | |||
| 259 | return __mt9t112_mcu_write(client, command, val); | ||
| 260 | } | ||
| 261 | |||
| 262 | static int mt9t112_reset(const struct i2c_client *client) | ||
| 263 | { | ||
| 264 | int ret; | ||
| 265 | |||
| 266 | mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0001); | ||
| 267 | msleep(1); | ||
| 268 | mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0000); | ||
| 269 | |||
| 270 | return ret; | ||
| 271 | } | ||
| 272 | |||
| 273 | #ifndef EXT_CLOCK | ||
| 274 | #define CLOCK_INFO(a, b) | ||
| 275 | #else | ||
| 276 | #define CLOCK_INFO(a, b) mt9t112_clock_info(a, b) | ||
| 277 | static int mt9t112_clock_info(const struct i2c_client *client, u32 ext) | ||
| 278 | { | ||
| 279 | int m, n, p1, p2, p3, p4, p5, p6, p7; | ||
| 280 | u32 vco, clk; | ||
| 281 | char *enable; | ||
| 282 | |||
| 283 | ext /= 1000; /* kbyte order */ | ||
| 284 | |||
| 285 | mt9t112_reg_read(n, client, 0x0012); | ||
| 286 | p1 = n & 0x000f; | ||
| 287 | n = n >> 4; | ||
| 288 | p2 = n & 0x000f; | ||
| 289 | n = n >> 4; | ||
| 290 | p3 = n & 0x000f; | ||
| 291 | |||
| 292 | mt9t112_reg_read(n, client, 0x002a); | ||
| 293 | p4 = n & 0x000f; | ||
| 294 | n = n >> 4; | ||
| 295 | p5 = n & 0x000f; | ||
| 296 | n = n >> 4; | ||
| 297 | p6 = n & 0x000f; | ||
| 298 | |||
| 299 | mt9t112_reg_read(n, client, 0x002c); | ||
| 300 | p7 = n & 0x000f; | ||
| 301 | |||
| 302 | mt9t112_reg_read(n, client, 0x0010); | ||
| 303 | m = n & 0x00ff; | ||
| 304 | n = (n >> 8) & 0x003f; | ||
| 305 | |||
| 306 | enable = ((6000 > ext) || (54000 < ext)) ? "X" : ""; | ||
| 307 | dev_dbg(&client->dev, "EXTCLK : %10u K %s\n", ext, enable); | ||
| 308 | |||
| 309 | vco = 2 * m * ext / (n+1); | ||
| 310 | enable = ((384000 > vco) || (768000 < vco)) ? "X" : ""; | ||
| 311 | dev_dbg(&client->dev, "VCO : %10u K %s\n", vco, enable); | ||
| 312 | |||
| 313 | clk = vco / (p1+1) / (p2+1); | ||
| 314 | enable = (96000 < clk) ? "X" : ""; | ||
| 315 | dev_dbg(&client->dev, "PIXCLK : %10u K %s\n", clk, enable); | ||
| 316 | |||
| 317 | clk = vco / (p3+1); | ||
| 318 | enable = (768000 < clk) ? "X" : ""; | ||
| 319 | dev_dbg(&client->dev, "MIPICLK : %10u K %s\n", clk, enable); | ||
| 320 | |||
| 321 | clk = vco / (p6+1); | ||
| 322 | enable = (96000 < clk) ? "X" : ""; | ||
| 323 | dev_dbg(&client->dev, "MCU CLK : %10u K %s\n", clk, enable); | ||
| 324 | |||
| 325 | clk = vco / (p5+1); | ||
| 326 | enable = (54000 < clk) ? "X" : ""; | ||
| 327 | dev_dbg(&client->dev, "SOC CLK : %10u K %s\n", clk, enable); | ||
| 328 | |||
| 329 | clk = vco / (p4+1); | ||
| 330 | enable = (70000 < clk) ? "X" : ""; | ||
| 331 | dev_dbg(&client->dev, "Sensor CLK : %10u K %s\n", clk, enable); | ||
| 332 | |||
| 333 | clk = vco / (p7+1); | ||
| 334 | dev_dbg(&client->dev, "External sensor : %10u K\n", clk); | ||
| 335 | |||
| 336 | clk = ext / (n+1); | ||
| 337 | enable = ((2000 > clk) || (24000 < clk)) ? "X" : ""; | ||
| 338 | dev_dbg(&client->dev, "PFD : %10u K %s\n", clk, enable); | ||
| 339 | |||
| 340 | return 0; | ||
| 341 | } | ||
| 342 | #endif | ||
| 343 | |||
| 344 | static void mt9t112_frame_check(u32 *width, u32 *height, u32 *left, u32 *top) | ||
| 345 | { | ||
| 346 | soc_camera_limit_side(left, width, 0, 0, MAX_WIDTH); | ||
| 347 | soc_camera_limit_side(top, height, 0, 0, MAX_HEIGHT); | ||
| 348 | } | ||
| 349 | |||
| 350 | static int mt9t112_set_a_frame_size(const struct i2c_client *client, | ||
| 351 | u16 width, | ||
| 352 | u16 height) | ||
| 353 | { | ||
| 354 | int ret; | ||
| 355 | u16 wstart = (MAX_WIDTH - width) / 2; | ||
| 356 | u16 hstart = (MAX_HEIGHT - height) / 2; | ||
| 357 | |||
| 358 | /* (Context A) Image Width/Height */ | ||
| 359 | mt9t112_mcu_write(ret, client, VAR(26, 0), width); | ||
| 360 | mt9t112_mcu_write(ret, client, VAR(26, 2), height); | ||
| 361 | |||
| 362 | /* (Context A) Output Width/Height */ | ||
| 363 | mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + width); | ||
| 364 | mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + height); | ||
| 365 | |||
| 366 | /* (Context A) Start Row/Column */ | ||
| 367 | mt9t112_mcu_write(ret, client, VAR(18, 2), 4 + hstart); | ||
| 368 | mt9t112_mcu_write(ret, client, VAR(18, 4), 4 + wstart); | ||
| 369 | |||
| 370 | /* (Context A) End Row/Column */ | ||
| 371 | mt9t112_mcu_write(ret, client, VAR(18, 6), 11 + height + hstart); | ||
| 372 | mt9t112_mcu_write(ret, client, VAR(18, 8), 11 + width + wstart); | ||
| 373 | |||
| 374 | mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); | ||
| 375 | |||
| 376 | return ret; | ||
| 377 | } | ||
| 378 | |||
| 379 | static int mt9t112_set_pll_dividers(const struct i2c_client *client, | ||
| 380 | u8 m, u8 n, | ||
| 381 | u8 p1, u8 p2, u8 p3, | ||
| 382 | u8 p4, u8 p5, u8 p6, | ||
| 383 | u8 p7) | ||
| 384 | { | ||
| 385 | int ret; | ||
| 386 | u16 val; | ||
| 387 | |||
| 388 | /* N/M */ | ||
| 389 | val = (n << 8) | | ||
| 390 | (m << 0); | ||
| 391 | mt9t112_reg_mask_set(ret, client, 0x0010, 0x3fff, val); | ||
| 392 | |||
| 393 | /* P1/P2/P3 */ | ||
| 394 | val = ((p3 & 0x0F) << 8) | | ||
| 395 | ((p2 & 0x0F) << 4) | | ||
| 396 | ((p1 & 0x0F) << 0); | ||
| 397 | mt9t112_reg_mask_set(ret, client, 0x0012, 0x0fff, val); | ||
| 398 | |||
| 399 | /* P4/P5/P6 */ | ||
| 400 | val = (0x7 << 12) | | ||
| 401 | ((p6 & 0x0F) << 8) | | ||
| 402 | ((p5 & 0x0F) << 4) | | ||
| 403 | ((p4 & 0x0F) << 0); | ||
| 404 | mt9t112_reg_mask_set(ret, client, 0x002A, 0x7fff, val); | ||
| 405 | |||
| 406 | /* P7 */ | ||
| 407 | val = (0x1 << 12) | | ||
| 408 | ((p7 & 0x0F) << 0); | ||
| 409 | mt9t112_reg_mask_set(ret, client, 0x002C, 0x100f, val); | ||
| 410 | |||
| 411 | return ret; | ||
| 412 | } | ||
| 413 | |||
| 414 | static int mt9t112_init_pll(const struct i2c_client *client) | ||
| 415 | { | ||
| 416 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 417 | int data, i, ret; | ||
| 418 | |||
| 419 | mt9t112_reg_mask_set(ret, client, 0x0014, 0x003, 0x0001); | ||
| 420 | |||
| 421 | /* PLL control: BYPASS PLL = 8517 */ | ||
| 422 | mt9t112_reg_write(ret, client, 0x0014, 0x2145); | ||
| 423 | |||
| 424 | /* Replace these registers when new timing parameters are generated */ | ||
| 425 | mt9t112_set_pll_dividers(client, | ||
| 426 | priv->info->divider.m, | ||
| 427 | priv->info->divider.n, | ||
| 428 | priv->info->divider.p1, | ||
| 429 | priv->info->divider.p2, | ||
| 430 | priv->info->divider.p3, | ||
| 431 | priv->info->divider.p4, | ||
| 432 | priv->info->divider.p5, | ||
| 433 | priv->info->divider.p6, | ||
| 434 | priv->info->divider.p7); | ||
| 435 | |||
| 436 | /* | ||
| 437 | * TEST_BYPASS on | ||
| 438 | * PLL_ENABLE on | ||
| 439 | * SEL_LOCK_DET on | ||
| 440 | * TEST_BYPASS off | ||
| 441 | */ | ||
| 442 | mt9t112_reg_write(ret, client, 0x0014, 0x2525); | ||
| 443 | mt9t112_reg_write(ret, client, 0x0014, 0x2527); | ||
| 444 | mt9t112_reg_write(ret, client, 0x0014, 0x3427); | ||
| 445 | mt9t112_reg_write(ret, client, 0x0014, 0x3027); | ||
| 446 | |||
| 447 | mdelay(10); | ||
| 448 | |||
| 449 | /* | ||
| 450 | * PLL_BYPASS off | ||
| 451 | * Reference clock count | ||
| 452 | * I2C Master Clock Divider | ||
| 453 | */ | ||
| 454 | mt9t112_reg_write(ret, client, 0x0014, 0x3046); | ||
| 455 | mt9t112_reg_write(ret, client, 0x0016, 0x0400); /* JPEG initialization workaround */ | ||
| 456 | mt9t112_reg_write(ret, client, 0x0022, 0x0190); | ||
| 457 | mt9t112_reg_write(ret, client, 0x3B84, 0x0212); | ||
| 458 | |||
| 459 | /* External sensor clock is PLL bypass */ | ||
| 460 | mt9t112_reg_write(ret, client, 0x002E, 0x0500); | ||
| 461 | |||
| 462 | mt9t112_reg_mask_set(ret, client, 0x0018, 0x0002, 0x0002); | ||
| 463 | mt9t112_reg_mask_set(ret, client, 0x3B82, 0x0004, 0x0004); | ||
| 464 | |||
| 465 | /* MCU disabled */ | ||
| 466 | mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0x0004); | ||
| 467 | |||
| 468 | /* out of standby */ | ||
| 469 | mt9t112_reg_mask_set(ret, client, 0x0018, 0x0001, 0); | ||
| 470 | |||
| 471 | mdelay(50); | ||
| 472 | |||
| 473 | /* | ||
| 474 | * Standby Workaround | ||
| 475 | * Disable Secondary I2C Pads | ||
| 476 | */ | ||
| 477 | mt9t112_reg_write(ret, client, 0x0614, 0x0001); | ||
| 478 | mdelay(1); | ||
| 479 | mt9t112_reg_write(ret, client, 0x0614, 0x0001); | ||
| 480 | mdelay(1); | ||
| 481 | mt9t112_reg_write(ret, client, 0x0614, 0x0001); | ||
| 482 | mdelay(1); | ||
| 483 | mt9t112_reg_write(ret, client, 0x0614, 0x0001); | ||
| 484 | mdelay(1); | ||
| 485 | mt9t112_reg_write(ret, client, 0x0614, 0x0001); | ||
| 486 | mdelay(1); | ||
| 487 | mt9t112_reg_write(ret, client, 0x0614, 0x0001); | ||
| 488 | mdelay(1); | ||
| 489 | |||
| 490 | /* poll to verify out of standby. Must Poll this bit */ | ||
| 491 | for (i = 0; i < 100; i++) { | ||
| 492 | mt9t112_reg_read(data, client, 0x0018); | ||
| 493 | if (!(0x4000 & data)) | ||
| 494 | break; | ||
| 495 | |||
| 496 | mdelay(10); | ||
| 497 | } | ||
| 498 | |||
| 499 | return ret; | ||
| 500 | } | ||
| 501 | |||
| 502 | static int mt9t112_init_setting(const struct i2c_client *client) | ||
| 503 | { | ||
| 504 | |||
| 505 | int ret; | ||
| 506 | |||
| 507 | /* Adaptive Output Clock (A) */ | ||
| 508 | mt9t112_mcu_mask_set(ret, client, VAR(26, 160), 0x0040, 0x0000); | ||
| 509 | |||
| 510 | /* Read Mode (A) */ | ||
| 511 | mt9t112_mcu_write(ret, client, VAR(18, 12), 0x0024); | ||
| 512 | |||
| 513 | /* Fine Correction (A) */ | ||
| 514 | mt9t112_mcu_write(ret, client, VAR(18, 15), 0x00CC); | ||
| 515 | |||
| 516 | /* Fine IT Min (A) */ | ||
| 517 | mt9t112_mcu_write(ret, client, VAR(18, 17), 0x01f1); | ||
| 518 | |||
| 519 | /* Fine IT Max Margin (A) */ | ||
| 520 | mt9t112_mcu_write(ret, client, VAR(18, 19), 0x00fF); | ||
| 521 | |||
| 522 | /* Base Frame Lines (A) */ | ||
| 523 | mt9t112_mcu_write(ret, client, VAR(18, 29), 0x032D); | ||
| 524 | |||
| 525 | /* Min Line Length (A) */ | ||
| 526 | mt9t112_mcu_write(ret, client, VAR(18, 31), 0x073a); | ||
| 527 | |||
| 528 | /* Line Length (A) */ | ||
| 529 | mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07d0); | ||
| 530 | |||
| 531 | /* Adaptive Output Clock (B) */ | ||
| 532 | mt9t112_mcu_mask_set(ret, client, VAR(27, 160), 0x0040, 0x0000); | ||
| 533 | |||
| 534 | /* Row Start (B) */ | ||
| 535 | mt9t112_mcu_write(ret, client, VAR(18, 74), 0x004); | ||
| 536 | |||
| 537 | /* Column Start (B) */ | ||
| 538 | mt9t112_mcu_write(ret, client, VAR(18, 76), 0x004); | ||
| 539 | |||
| 540 | /* Row End (B) */ | ||
| 541 | mt9t112_mcu_write(ret, client, VAR(18, 78), 0x60B); | ||
| 542 | |||
| 543 | /* Column End (B) */ | ||
| 544 | mt9t112_mcu_write(ret, client, VAR(18, 80), 0x80B); | ||
| 545 | |||
| 546 | /* Fine Correction (B) */ | ||
| 547 | mt9t112_mcu_write(ret, client, VAR(18, 87), 0x008C); | ||
| 548 | |||
| 549 | /* Fine IT Min (B) */ | ||
| 550 | mt9t112_mcu_write(ret, client, VAR(18, 89), 0x01F1); | ||
| 551 | |||
| 552 | /* Fine IT Max Margin (B) */ | ||
| 553 | mt9t112_mcu_write(ret, client, VAR(18, 91), 0x00FF); | ||
| 554 | |||
| 555 | /* Base Frame Lines (B) */ | ||
| 556 | mt9t112_mcu_write(ret, client, VAR(18, 101), 0x0668); | ||
| 557 | |||
| 558 | /* Min Line Length (B) */ | ||
| 559 | mt9t112_mcu_write(ret, client, VAR(18, 103), 0x0AF0); | ||
| 560 | |||
| 561 | /* Line Length (B) */ | ||
| 562 | mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0); | ||
| 563 | |||
| 564 | /* | ||
| 565 | * Flicker Dectection registers | ||
| 566 | * This section should be replaced whenever new Timing file is generated | ||
| 567 | * All the following registers need to be replaced | ||
| 568 | * Following registers are generated from Register Wizard but user can | ||
| 569 | * modify them. For detail see auto flicker detection tuning | ||
| 570 | */ | ||
| 571 | |||
| 572 | /* FD_FDPERIOD_SELECT */ | ||
| 573 | mt9t112_mcu_write(ret, client, VAR8(8, 5), 0x01); | ||
| 574 | |||
| 575 | /* PRI_B_CONFIG_FD_ALGO_RUN */ | ||
| 576 | mt9t112_mcu_write(ret, client, VAR(27, 17), 0x0003); | ||
| 577 | |||
| 578 | /* PRI_A_CONFIG_FD_ALGO_RUN */ | ||
| 579 | mt9t112_mcu_write(ret, client, VAR(26, 17), 0x0003); | ||
| 580 | |||
| 581 | /* | ||
| 582 | * AFD range detection tuning registers | ||
| 583 | */ | ||
| 584 | |||
| 585 | /* search_f1_50 */ | ||
| 586 | mt9t112_mcu_write(ret, client, VAR8(18, 165), 0x25); | ||
| 587 | |||
| 588 | /* search_f2_50 */ | ||
| 589 | mt9t112_mcu_write(ret, client, VAR8(18, 166), 0x28); | ||
| 590 | |||
| 591 | /* search_f1_60 */ | ||
| 592 | mt9t112_mcu_write(ret, client, VAR8(18, 167), 0x2C); | ||
| 593 | |||
| 594 | /* search_f2_60 */ | ||
| 595 | mt9t112_mcu_write(ret, client, VAR8(18, 168), 0x2F); | ||
| 596 | |||
| 597 | /* period_50Hz (A) */ | ||
| 598 | mt9t112_mcu_write(ret, client, VAR8(18, 68), 0xBA); | ||
| 599 | |||
| 600 | /* secret register by aptina */ | ||
| 601 | /* period_50Hz (A MSB) */ | ||
| 602 | mt9t112_mcu_write(ret, client, VAR8(18, 303), 0x00); | ||
| 603 | |||
| 604 | /* period_60Hz (A) */ | ||
| 605 | mt9t112_mcu_write(ret, client, VAR8(18, 69), 0x9B); | ||
| 606 | |||
| 607 | /* secret register by aptina */ | ||
| 608 | /* period_60Hz (A MSB) */ | ||
| 609 | mt9t112_mcu_write(ret, client, VAR8(18, 301), 0x00); | ||
| 610 | |||
| 611 | /* period_50Hz (B) */ | ||
| 612 | mt9t112_mcu_write(ret, client, VAR8(18, 140), 0x82); | ||
| 613 | |||
| 614 | /* secret register by aptina */ | ||
| 615 | /* period_50Hz (B) MSB */ | ||
| 616 | mt9t112_mcu_write(ret, client, VAR8(18, 304), 0x00); | ||
| 617 | |||
| 618 | /* period_60Hz (B) */ | ||
| 619 | mt9t112_mcu_write(ret, client, VAR8(18, 141), 0x6D); | ||
| 620 | |||
| 621 | /* secret register by aptina */ | ||
| 622 | /* period_60Hz (B) MSB */ | ||
| 623 | mt9t112_mcu_write(ret, client, VAR8(18, 302), 0x00); | ||
| 624 | |||
| 625 | /* FD Mode */ | ||
| 626 | mt9t112_mcu_write(ret, client, VAR8(8, 2), 0x10); | ||
| 627 | |||
| 628 | /* Stat_min */ | ||
| 629 | mt9t112_mcu_write(ret, client, VAR8(8, 9), 0x02); | ||
| 630 | |||
| 631 | /* Stat_max */ | ||
| 632 | mt9t112_mcu_write(ret, client, VAR8(8, 10), 0x03); | ||
| 633 | |||
| 634 | /* Min_amplitude */ | ||
| 635 | mt9t112_mcu_write(ret, client, VAR8(8, 12), 0x0A); | ||
| 636 | |||
| 637 | /* RX FIFO Watermark (A) */ | ||
| 638 | mt9t112_mcu_write(ret, client, VAR(18, 70), 0x0014); | ||
| 639 | |||
| 640 | /* RX FIFO Watermark (B) */ | ||
| 641 | mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0014); | ||
| 642 | |||
| 643 | /* MCLK: 16MHz | ||
| 644 | * PCLK: 73MHz | ||
| 645 | * CorePixCLK: 36.5 MHz | ||
| 646 | */ | ||
| 647 | mt9t112_mcu_write(ret, client, VAR8(18, 0x0044), 133); | ||
| 648 | mt9t112_mcu_write(ret, client, VAR8(18, 0x0045), 110); | ||
| 649 | mt9t112_mcu_write(ret, client, VAR8(18, 0x008c), 130); | ||
| 650 | mt9t112_mcu_write(ret, client, VAR8(18, 0x008d), 108); | ||
| 651 | |||
| 652 | mt9t112_mcu_write(ret, client, VAR8(18, 0x00A5), 27); | ||
| 653 | mt9t112_mcu_write(ret, client, VAR8(18, 0x00a6), 30); | ||
| 654 | mt9t112_mcu_write(ret, client, VAR8(18, 0x00a7), 32); | ||
| 655 | mt9t112_mcu_write(ret, client, VAR8(18, 0x00a8), 35); | ||
| 656 | |||
| 657 | return ret; | ||
| 658 | } | ||
| 659 | |||
| 660 | static int mt9t112_auto_focus_setting(const struct i2c_client *client) | ||
| 661 | { | ||
| 662 | int ret; | ||
| 663 | |||
| 664 | mt9t112_mcu_write(ret, client, VAR(12, 13), 0x000F); | ||
| 665 | mt9t112_mcu_write(ret, client, VAR(12, 23), 0x0F0F); | ||
| 666 | mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); | ||
| 667 | |||
| 668 | mt9t112_reg_write(ret, client, 0x0614, 0x0000); | ||
| 669 | |||
| 670 | mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05); | ||
| 671 | mt9t112_mcu_write(ret, client, VAR8(12, 2), 0x02); | ||
| 672 | mt9t112_mcu_write(ret, client, VAR(12, 3), 0x0002); | ||
| 673 | mt9t112_mcu_write(ret, client, VAR(17, 3), 0x8001); | ||
| 674 | mt9t112_mcu_write(ret, client, VAR(17, 11), 0x0025); | ||
| 675 | mt9t112_mcu_write(ret, client, VAR(17, 13), 0x0193); | ||
| 676 | mt9t112_mcu_write(ret, client, VAR8(17, 33), 0x18); | ||
| 677 | mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05); | ||
| 678 | |||
| 679 | return ret; | ||
| 680 | } | ||
| 681 | |||
| 682 | static int mt9t112_auto_focus_trigger(const struct i2c_client *client) | ||
| 683 | { | ||
| 684 | int ret; | ||
| 685 | |||
| 686 | mt9t112_mcu_write(ret, client, VAR8(12, 25), 0x01); | ||
| 687 | |||
| 688 | return ret; | ||
| 689 | } | ||
| 690 | |||
| 691 | static int mt9t112_init_camera(const struct i2c_client *client) | ||
| 692 | { | ||
| 693 | int ret; | ||
| 694 | |||
| 695 | ECHECKER(ret, mt9t112_reset(client)); | ||
| 696 | |||
| 697 | ECHECKER(ret, mt9t112_init_pll(client)); | ||
| 698 | |||
| 699 | ECHECKER(ret, mt9t112_init_setting(client)); | ||
| 700 | |||
| 701 | ECHECKER(ret, mt9t112_auto_focus_setting(client)); | ||
| 702 | |||
| 703 | mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0); | ||
| 704 | |||
| 705 | /* Analog setting B */ | ||
| 706 | mt9t112_reg_write(ret, client, 0x3084, 0x2409); | ||
| 707 | mt9t112_reg_write(ret, client, 0x3092, 0x0A49); | ||
| 708 | mt9t112_reg_write(ret, client, 0x3094, 0x4949); | ||
| 709 | mt9t112_reg_write(ret, client, 0x3096, 0x4950); | ||
| 710 | |||
| 711 | /* | ||
| 712 | * Disable adaptive clock | ||
| 713 | * PRI_A_CONFIG_JPEG_OB_TX_CONTROL_VAR | ||
| 714 | * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR | ||
| 715 | */ | ||
| 716 | mt9t112_mcu_write(ret, client, VAR(26, 160), 0x0A2E); | ||
| 717 | mt9t112_mcu_write(ret, client, VAR(27, 160), 0x0A2E); | ||
| 718 | |||
| 719 | /* Configure STatus in Status_before_length Format and enable header */ | ||
| 720 | /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */ | ||
| 721 | mt9t112_mcu_write(ret, client, VAR(27, 144), 0x0CB4); | ||
| 722 | |||
| 723 | /* Enable JPEG in context B */ | ||
| 724 | /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */ | ||
| 725 | mt9t112_mcu_write(ret, client, VAR8(27, 142), 0x01); | ||
| 726 | |||
| 727 | /* Disable Dac_TXLO */ | ||
| 728 | mt9t112_reg_write(ret, client, 0x316C, 0x350F); | ||
| 729 | |||
| 730 | /* Set max slew rates */ | ||
| 731 | mt9t112_reg_write(ret, client, 0x1E, 0x777); | ||
| 732 | |||
| 733 | return ret; | ||
| 734 | } | ||
| 735 | |||
| 736 | /************************************************************************ | ||
| 737 | v4l2_subdev_core_ops | ||
| 738 | ************************************************************************/ | ||
| 739 | |||
| 740 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 741 | static int mt9t112_g_register(struct v4l2_subdev *sd, | ||
| 742 | struct v4l2_dbg_register *reg) | ||
| 743 | { | ||
| 744 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 745 | int ret; | ||
| 746 | |||
| 747 | reg->size = 2; | ||
| 748 | mt9t112_reg_read(ret, client, reg->reg); | ||
| 749 | |||
| 750 | reg->val = (__u64)ret; | ||
| 751 | |||
| 752 | return 0; | ||
| 753 | } | ||
| 754 | |||
| 755 | static int mt9t112_s_register(struct v4l2_subdev *sd, | ||
| 756 | const struct v4l2_dbg_register *reg) | ||
| 757 | { | ||
| 758 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 759 | int ret; | ||
| 760 | |||
| 761 | mt9t112_reg_write(ret, client, reg->reg, reg->val); | ||
| 762 | |||
| 763 | return ret; | ||
| 764 | } | ||
| 765 | #endif | ||
| 766 | |||
| 767 | static int mt9t112_s_power(struct v4l2_subdev *sd, int on) | ||
| 768 | { | ||
| 769 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 770 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 771 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 772 | |||
| 773 | return soc_camera_set_power(&client->dev, ssdd, priv->clk, on); | ||
| 774 | } | ||
| 775 | |||
| 776 | static const struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = { | ||
| 777 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 778 | .g_register = mt9t112_g_register, | ||
| 779 | .s_register = mt9t112_s_register, | ||
| 780 | #endif | ||
| 781 | .s_power = mt9t112_s_power, | ||
| 782 | }; | ||
| 783 | |||
| 784 | |||
| 785 | /************************************************************************ | ||
| 786 | v4l2_subdev_video_ops | ||
| 787 | ************************************************************************/ | ||
| 788 | static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 789 | { | ||
| 790 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 791 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 792 | int ret = 0; | ||
| 793 | |||
| 794 | if (!enable) { | ||
| 795 | /* FIXME | ||
| 796 | * | ||
| 797 | * If user selected large output size, | ||
| 798 | * and used it long time, | ||
| 799 | * mt9t112 camera will be very warm. | ||
| 800 | * | ||
| 801 | * But current driver can not stop mt9t112 camera. | ||
| 802 | * So, set small size here to solve this problem. | ||
| 803 | */ | ||
| 804 | mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT); | ||
| 805 | return ret; | ||
| 806 | } | ||
| 807 | |||
| 808 | if (!(priv->flags & INIT_DONE)) { | ||
| 809 | u16 param = PCLK_RISING & priv->flags ? 0x0001 : 0x0000; | ||
| 810 | |||
| 811 | ECHECKER(ret, mt9t112_init_camera(client)); | ||
| 812 | |||
| 813 | /* Invert PCLK (Data sampled on falling edge of pixclk) */ | ||
| 814 | mt9t112_reg_write(ret, client, 0x3C20, param); | ||
| 815 | |||
| 816 | mdelay(5); | ||
| 817 | |||
| 818 | priv->flags |= INIT_DONE; | ||
| 819 | } | ||
| 820 | |||
| 821 | mt9t112_mcu_write(ret, client, VAR(26, 7), priv->format->fmt); | ||
| 822 | mt9t112_mcu_write(ret, client, VAR(26, 9), priv->format->order); | ||
| 823 | mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06); | ||
| 824 | |||
| 825 | mt9t112_set_a_frame_size(client, | ||
| 826 | priv->frame.width, | ||
| 827 | priv->frame.height); | ||
| 828 | |||
| 829 | ECHECKER(ret, mt9t112_auto_focus_trigger(client)); | ||
| 830 | |||
| 831 | dev_dbg(&client->dev, "format : %d\n", priv->format->code); | ||
| 832 | dev_dbg(&client->dev, "size : %d x %d\n", | ||
| 833 | priv->frame.width, | ||
| 834 | priv->frame.height); | ||
| 835 | |||
| 836 | CLOCK_INFO(client, EXT_CLOCK); | ||
| 837 | |||
| 838 | return ret; | ||
| 839 | } | ||
| 840 | |||
| 841 | static int mt9t112_set_params(struct mt9t112_priv *priv, | ||
| 842 | const struct v4l2_rect *rect, | ||
| 843 | u32 code) | ||
| 844 | { | ||
| 845 | int i; | ||
| 846 | |||
| 847 | /* | ||
| 848 | * get color format | ||
| 849 | */ | ||
| 850 | for (i = 0; i < priv->num_formats; i++) | ||
| 851 | if (mt9t112_cfmts[i].code == code) | ||
| 852 | break; | ||
| 853 | |||
| 854 | if (i == priv->num_formats) | ||
| 855 | return -EINVAL; | ||
| 856 | |||
| 857 | priv->frame = *rect; | ||
| 858 | |||
| 859 | /* | ||
| 860 | * frame size check | ||
| 861 | */ | ||
| 862 | mt9t112_frame_check(&priv->frame.width, &priv->frame.height, | ||
| 863 | &priv->frame.left, &priv->frame.top); | ||
| 864 | |||
| 865 | priv->format = mt9t112_cfmts + i; | ||
| 866 | |||
| 867 | return 0; | ||
| 868 | } | ||
| 869 | |||
| 870 | static int mt9t112_get_selection(struct v4l2_subdev *sd, | ||
| 871 | struct v4l2_subdev_pad_config *cfg, | ||
| 872 | struct v4l2_subdev_selection *sel) | ||
| 873 | { | ||
| 874 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 875 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 876 | |||
| 877 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 878 | return -EINVAL; | ||
| 879 | |||
| 880 | switch (sel->target) { | ||
| 881 | case V4L2_SEL_TGT_CROP_BOUNDS: | ||
| 882 | sel->r.left = 0; | ||
| 883 | sel->r.top = 0; | ||
| 884 | sel->r.width = MAX_WIDTH; | ||
| 885 | sel->r.height = MAX_HEIGHT; | ||
| 886 | return 0; | ||
| 887 | case V4L2_SEL_TGT_CROP: | ||
| 888 | sel->r = priv->frame; | ||
| 889 | return 0; | ||
| 890 | default: | ||
| 891 | return -EINVAL; | ||
| 892 | } | ||
| 893 | } | ||
| 894 | |||
| 895 | static int mt9t112_set_selection(struct v4l2_subdev *sd, | ||
| 896 | struct v4l2_subdev_pad_config *cfg, | ||
| 897 | struct v4l2_subdev_selection *sel) | ||
| 898 | { | ||
| 899 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 900 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 901 | const struct v4l2_rect *rect = &sel->r; | ||
| 902 | |||
| 903 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || | ||
| 904 | sel->target != V4L2_SEL_TGT_CROP) | ||
| 905 | return -EINVAL; | ||
| 906 | |||
| 907 | return mt9t112_set_params(priv, rect, priv->format->code); | ||
| 908 | } | ||
| 909 | |||
| 910 | static int mt9t112_get_fmt(struct v4l2_subdev *sd, | ||
| 911 | struct v4l2_subdev_pad_config *cfg, | ||
| 912 | struct v4l2_subdev_format *format) | ||
| 913 | { | ||
| 914 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 915 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 916 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 917 | |||
| 918 | if (format->pad) | ||
| 919 | return -EINVAL; | ||
| 920 | |||
| 921 | mf->width = priv->frame.width; | ||
| 922 | mf->height = priv->frame.height; | ||
| 923 | mf->colorspace = priv->format->colorspace; | ||
| 924 | mf->code = priv->format->code; | ||
| 925 | mf->field = V4L2_FIELD_NONE; | ||
| 926 | |||
| 927 | return 0; | ||
| 928 | } | ||
| 929 | |||
| 930 | static int mt9t112_s_fmt(struct v4l2_subdev *sd, | ||
| 931 | struct v4l2_mbus_framefmt *mf) | ||
| 932 | { | ||
| 933 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 934 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 935 | struct v4l2_rect rect = { | ||
| 936 | .width = mf->width, | ||
| 937 | .height = mf->height, | ||
| 938 | .left = priv->frame.left, | ||
| 939 | .top = priv->frame.top, | ||
| 940 | }; | ||
| 941 | int ret; | ||
| 942 | |||
| 943 | ret = mt9t112_set_params(priv, &rect, mf->code); | ||
| 944 | |||
| 945 | if (!ret) | ||
| 946 | mf->colorspace = priv->format->colorspace; | ||
| 947 | |||
| 948 | return ret; | ||
| 949 | } | ||
| 950 | |||
| 951 | static int mt9t112_set_fmt(struct v4l2_subdev *sd, | ||
| 952 | struct v4l2_subdev_pad_config *cfg, | ||
| 953 | struct v4l2_subdev_format *format) | ||
| 954 | { | ||
| 955 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 956 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 957 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 958 | unsigned int top, left; | ||
| 959 | int i; | ||
| 960 | |||
| 961 | if (format->pad) | ||
| 962 | return -EINVAL; | ||
| 963 | |||
| 964 | for (i = 0; i < priv->num_formats; i++) | ||
| 965 | if (mt9t112_cfmts[i].code == mf->code) | ||
| 966 | break; | ||
| 967 | |||
| 968 | if (i == priv->num_formats) { | ||
| 969 | mf->code = MEDIA_BUS_FMT_UYVY8_2X8; | ||
| 970 | mf->colorspace = V4L2_COLORSPACE_JPEG; | ||
| 971 | } else { | ||
| 972 | mf->colorspace = mt9t112_cfmts[i].colorspace; | ||
| 973 | } | ||
| 974 | |||
| 975 | mt9t112_frame_check(&mf->width, &mf->height, &left, &top); | ||
| 976 | |||
| 977 | mf->field = V4L2_FIELD_NONE; | ||
| 978 | |||
| 979 | if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 980 | return mt9t112_s_fmt(sd, mf); | ||
| 981 | cfg->try_fmt = *mf; | ||
| 982 | return 0; | ||
| 983 | } | ||
| 984 | |||
| 985 | static int mt9t112_enum_mbus_code(struct v4l2_subdev *sd, | ||
| 986 | struct v4l2_subdev_pad_config *cfg, | ||
| 987 | struct v4l2_subdev_mbus_code_enum *code) | ||
| 988 | { | ||
| 989 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 990 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 991 | |||
| 992 | if (code->pad || code->index >= priv->num_formats) | ||
| 993 | return -EINVAL; | ||
| 994 | |||
| 995 | code->code = mt9t112_cfmts[code->index].code; | ||
| 996 | |||
| 997 | return 0; | ||
| 998 | } | ||
| 999 | |||
| 1000 | static int mt9t112_g_mbus_config(struct v4l2_subdev *sd, | ||
| 1001 | struct v4l2_mbus_config *cfg) | ||
| 1002 | { | ||
| 1003 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1004 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1005 | |||
| 1006 | cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_VSYNC_ACTIVE_HIGH | | ||
| 1007 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_HIGH | | ||
| 1008 | V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING; | ||
| 1009 | cfg->type = V4L2_MBUS_PARALLEL; | ||
| 1010 | cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); | ||
| 1011 | |||
| 1012 | return 0; | ||
| 1013 | } | ||
| 1014 | |||
| 1015 | static int mt9t112_s_mbus_config(struct v4l2_subdev *sd, | ||
| 1016 | const struct v4l2_mbus_config *cfg) | ||
| 1017 | { | ||
| 1018 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1019 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1020 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 1021 | |||
| 1022 | if (soc_camera_apply_board_flags(ssdd, cfg) & V4L2_MBUS_PCLK_SAMPLE_RISING) | ||
| 1023 | priv->flags |= PCLK_RISING; | ||
| 1024 | |||
| 1025 | return 0; | ||
| 1026 | } | ||
| 1027 | |||
| 1028 | static const struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = { | ||
| 1029 | .s_stream = mt9t112_s_stream, | ||
| 1030 | .g_mbus_config = mt9t112_g_mbus_config, | ||
| 1031 | .s_mbus_config = mt9t112_s_mbus_config, | ||
| 1032 | }; | ||
| 1033 | |||
| 1034 | static const struct v4l2_subdev_pad_ops mt9t112_subdev_pad_ops = { | ||
| 1035 | .enum_mbus_code = mt9t112_enum_mbus_code, | ||
| 1036 | .get_selection = mt9t112_get_selection, | ||
| 1037 | .set_selection = mt9t112_set_selection, | ||
| 1038 | .get_fmt = mt9t112_get_fmt, | ||
| 1039 | .set_fmt = mt9t112_set_fmt, | ||
| 1040 | }; | ||
| 1041 | |||
| 1042 | /************************************************************************ | ||
| 1043 | i2c driver | ||
| 1044 | ************************************************************************/ | ||
| 1045 | static const struct v4l2_subdev_ops mt9t112_subdev_ops = { | ||
| 1046 | .core = &mt9t112_subdev_core_ops, | ||
| 1047 | .video = &mt9t112_subdev_video_ops, | ||
| 1048 | .pad = &mt9t112_subdev_pad_ops, | ||
| 1049 | }; | ||
| 1050 | |||
| 1051 | static int mt9t112_camera_probe(struct i2c_client *client) | ||
| 1052 | { | ||
| 1053 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 1054 | const char *devname; | ||
| 1055 | int chipid; | ||
| 1056 | int ret; | ||
| 1057 | |||
| 1058 | ret = mt9t112_s_power(&priv->subdev, 1); | ||
| 1059 | if (ret < 0) | ||
| 1060 | return ret; | ||
| 1061 | |||
| 1062 | /* | ||
| 1063 | * check and show chip ID | ||
| 1064 | */ | ||
| 1065 | mt9t112_reg_read(chipid, client, 0x0000); | ||
| 1066 | |||
| 1067 | switch (chipid) { | ||
| 1068 | case 0x2680: | ||
| 1069 | devname = "mt9t111"; | ||
| 1070 | priv->num_formats = 1; | ||
| 1071 | break; | ||
| 1072 | case 0x2682: | ||
| 1073 | devname = "mt9t112"; | ||
| 1074 | priv->num_formats = ARRAY_SIZE(mt9t112_cfmts); | ||
| 1075 | break; | ||
| 1076 | default: | ||
| 1077 | dev_err(&client->dev, "Product ID error %04x\n", chipid); | ||
| 1078 | ret = -ENODEV; | ||
| 1079 | goto done; | ||
| 1080 | } | ||
| 1081 | |||
| 1082 | dev_info(&client->dev, "%s chip ID %04x\n", devname, chipid); | ||
| 1083 | |||
| 1084 | done: | ||
| 1085 | mt9t112_s_power(&priv->subdev, 0); | ||
| 1086 | return ret; | ||
| 1087 | } | ||
| 1088 | |||
| 1089 | static int mt9t112_probe(struct i2c_client *client, | ||
| 1090 | const struct i2c_device_id *did) | ||
| 1091 | { | ||
| 1092 | struct mt9t112_priv *priv; | ||
| 1093 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1094 | struct v4l2_rect rect = { | ||
| 1095 | .width = VGA_WIDTH, | ||
| 1096 | .height = VGA_HEIGHT, | ||
| 1097 | .left = (MAX_WIDTH - VGA_WIDTH) / 2, | ||
| 1098 | .top = (MAX_HEIGHT - VGA_HEIGHT) / 2, | ||
| 1099 | }; | ||
| 1100 | int ret; | ||
| 1101 | |||
| 1102 | if (!ssdd || !ssdd->drv_priv) { | ||
| 1103 | dev_err(&client->dev, "mt9t112: missing platform data!\n"); | ||
| 1104 | return -EINVAL; | ||
| 1105 | } | ||
| 1106 | |||
| 1107 | priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); | ||
| 1108 | if (!priv) | ||
| 1109 | return -ENOMEM; | ||
| 1110 | |||
| 1111 | priv->info = ssdd->drv_priv; | ||
| 1112 | |||
| 1113 | v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops); | ||
| 1114 | |||
| 1115 | priv->clk = v4l2_clk_get(&client->dev, "mclk"); | ||
| 1116 | if (IS_ERR(priv->clk)) | ||
| 1117 | return PTR_ERR(priv->clk); | ||
| 1118 | |||
| 1119 | ret = mt9t112_camera_probe(client); | ||
| 1120 | |||
| 1121 | /* Cannot fail: using the default supported pixel code */ | ||
| 1122 | if (!ret) | ||
| 1123 | mt9t112_set_params(priv, &rect, MEDIA_BUS_FMT_UYVY8_2X8); | ||
| 1124 | else | ||
| 1125 | v4l2_clk_put(priv->clk); | ||
| 1126 | |||
| 1127 | return ret; | ||
| 1128 | } | ||
| 1129 | |||
| 1130 | static int mt9t112_remove(struct i2c_client *client) | ||
| 1131 | { | ||
| 1132 | struct mt9t112_priv *priv = to_mt9t112(client); | ||
| 1133 | |||
| 1134 | v4l2_clk_put(priv->clk); | ||
| 1135 | return 0; | ||
| 1136 | } | ||
| 1137 | |||
| 1138 | static const struct i2c_device_id mt9t112_id[] = { | ||
| 1139 | { "mt9t112", 0 }, | ||
| 1140 | { } | ||
| 1141 | }; | ||
| 1142 | MODULE_DEVICE_TABLE(i2c, mt9t112_id); | ||
| 1143 | |||
| 1144 | static struct i2c_driver mt9t112_i2c_driver = { | ||
| 1145 | .driver = { | ||
| 1146 | .name = "mt9t112", | ||
| 1147 | }, | ||
| 1148 | .probe = mt9t112_probe, | ||
| 1149 | .remove = mt9t112_remove, | ||
| 1150 | .id_table = mt9t112_id, | ||
| 1151 | }; | ||
| 1152 | |||
| 1153 | module_i2c_driver(mt9t112_i2c_driver); | ||
| 1154 | |||
| 1155 | MODULE_DESCRIPTION("SoC Camera driver for mt9t112"); | ||
| 1156 | MODULE_AUTHOR("Kuninori Morimoto"); | ||
| 1157 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/media/i2c/soc_camera/soc_ov772x.c b/drivers/media/i2c/soc_camera/soc_ov772x.c deleted file mode 100644 index fafd372527b2..000000000000 --- a/drivers/media/i2c/soc_camera/soc_ov772x.c +++ /dev/null | |||
| @@ -1,1123 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * ov772x Camera Driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Renesas Solutions Corp. | ||
| 5 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | ||
| 6 | * | ||
| 7 | * Based on ov7670 and soc_camera_platform driver, | ||
| 8 | * | ||
| 9 | * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> | ||
| 10 | * Copyright (C) 2008 Magnus Damm | ||
| 11 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | ||
| 12 | * | ||
| 13 | * This program is free software; you can redistribute it and/or modify | ||
| 14 | * it under the terms of the GNU General Public License version 2 as | ||
| 15 | * published by the Free Software Foundation. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include <linux/init.h> | ||
| 19 | #include <linux/kernel.h> | ||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/i2c.h> | ||
| 22 | #include <linux/slab.h> | ||
| 23 | #include <linux/delay.h> | ||
| 24 | #include <linux/v4l2-mediabus.h> | ||
| 25 | #include <linux/videodev2.h> | ||
| 26 | |||
| 27 | #include <media/i2c/ov772x.h> | ||
| 28 | #include <media/soc_camera.h> | ||
| 29 | #include <media/v4l2-clk.h> | ||
| 30 | #include <media/v4l2-ctrls.h> | ||
| 31 | #include <media/v4l2-subdev.h> | ||
| 32 | #include <media/v4l2-image-sizes.h> | ||
| 33 | |||
| 34 | /* | ||
| 35 | * register offset | ||
| 36 | */ | ||
| 37 | #define GAIN 0x00 /* AGC - Gain control gain setting */ | ||
| 38 | #define BLUE 0x01 /* AWB - Blue channel gain setting */ | ||
| 39 | #define RED 0x02 /* AWB - Red channel gain setting */ | ||
| 40 | #define GREEN 0x03 /* AWB - Green channel gain setting */ | ||
| 41 | #define COM1 0x04 /* Common control 1 */ | ||
| 42 | #define BAVG 0x05 /* U/B Average Level */ | ||
| 43 | #define GAVG 0x06 /* Y/Gb Average Level */ | ||
| 44 | #define RAVG 0x07 /* V/R Average Level */ | ||
| 45 | #define AECH 0x08 /* Exposure Value - AEC MSBs */ | ||
| 46 | #define COM2 0x09 /* Common control 2 */ | ||
| 47 | #define PID 0x0A /* Product ID Number MSB */ | ||
| 48 | #define VER 0x0B /* Product ID Number LSB */ | ||
| 49 | #define COM3 0x0C /* Common control 3 */ | ||
| 50 | #define COM4 0x0D /* Common control 4 */ | ||
| 51 | #define COM5 0x0E /* Common control 5 */ | ||
| 52 | #define COM6 0x0F /* Common control 6 */ | ||
| 53 | #define AEC 0x10 /* Exposure Value */ | ||
| 54 | #define CLKRC 0x11 /* Internal clock */ | ||
| 55 | #define COM7 0x12 /* Common control 7 */ | ||
| 56 | #define COM8 0x13 /* Common control 8 */ | ||
| 57 | #define COM9 0x14 /* Common control 9 */ | ||
| 58 | #define COM10 0x15 /* Common control 10 */ | ||
| 59 | #define REG16 0x16 /* Register 16 */ | ||
| 60 | #define HSTART 0x17 /* Horizontal sensor size */ | ||
| 61 | #define HSIZE 0x18 /* Horizontal frame (HREF column) end high 8-bit */ | ||
| 62 | #define VSTART 0x19 /* Vertical frame (row) start high 8-bit */ | ||
| 63 | #define VSIZE 0x1A /* Vertical sensor size */ | ||
| 64 | #define PSHFT 0x1B /* Data format - pixel delay select */ | ||
| 65 | #define MIDH 0x1C /* Manufacturer ID byte - high */ | ||
| 66 | #define MIDL 0x1D /* Manufacturer ID byte - low */ | ||
| 67 | #define LAEC 0x1F /* Fine AEC value */ | ||
| 68 | #define COM11 0x20 /* Common control 11 */ | ||
| 69 | #define BDBASE 0x22 /* Banding filter Minimum AEC value */ | ||
| 70 | #define DBSTEP 0x23 /* Banding filter Maximum Setp */ | ||
| 71 | #define AEW 0x24 /* AGC/AEC - Stable operating region (upper limit) */ | ||
| 72 | #define AEB 0x25 /* AGC/AEC - Stable operating region (lower limit) */ | ||
| 73 | #define VPT 0x26 /* AGC/AEC Fast mode operating region */ | ||
| 74 | #define REG28 0x28 /* Register 28 */ | ||
| 75 | #define HOUTSIZE 0x29 /* Horizontal data output size MSBs */ | ||
| 76 | #define EXHCH 0x2A /* Dummy pixel insert MSB */ | ||
| 77 | #define EXHCL 0x2B /* Dummy pixel insert LSB */ | ||
| 78 | #define VOUTSIZE 0x2C /* Vertical data output size MSBs */ | ||
| 79 | #define ADVFL 0x2D /* LSB of insert dummy lines in Vertical direction */ | ||
| 80 | #define ADVFH 0x2E /* MSG of insert dummy lines in Vertical direction */ | ||
| 81 | #define YAVE 0x2F /* Y/G Channel Average value */ | ||
| 82 | #define LUMHTH 0x30 /* Histogram AEC/AGC Luminance high level threshold */ | ||
| 83 | #define LUMLTH 0x31 /* Histogram AEC/AGC Luminance low level threshold */ | ||
| 84 | #define HREF 0x32 /* Image start and size control */ | ||
| 85 | #define DM_LNL 0x33 /* Dummy line low 8 bits */ | ||
| 86 | #define DM_LNH 0x34 /* Dummy line high 8 bits */ | ||
| 87 | #define ADOFF_B 0x35 /* AD offset compensation value for B channel */ | ||
| 88 | #define ADOFF_R 0x36 /* AD offset compensation value for R channel */ | ||
| 89 | #define ADOFF_GB 0x37 /* AD offset compensation value for Gb channel */ | ||
| 90 | #define ADOFF_GR 0x38 /* AD offset compensation value for Gr channel */ | ||
| 91 | #define OFF_B 0x39 /* Analog process B channel offset value */ | ||
| 92 | #define OFF_R 0x3A /* Analog process R channel offset value */ | ||
| 93 | #define OFF_GB 0x3B /* Analog process Gb channel offset value */ | ||
| 94 | #define OFF_GR 0x3C /* Analog process Gr channel offset value */ | ||
| 95 | #define COM12 0x3D /* Common control 12 */ | ||
| 96 | #define COM13 0x3E /* Common control 13 */ | ||
| 97 | #define COM14 0x3F /* Common control 14 */ | ||
| 98 | #define COM15 0x40 /* Common control 15*/ | ||
| 99 | #define COM16 0x41 /* Common control 16 */ | ||
| 100 | #define TGT_B 0x42 /* BLC blue channel target value */ | ||
| 101 | #define TGT_R 0x43 /* BLC red channel target value */ | ||
| 102 | #define TGT_GB 0x44 /* BLC Gb channel target value */ | ||
| 103 | #define TGT_GR 0x45 /* BLC Gr channel target value */ | ||
| 104 | /* for ov7720 */ | ||
| 105 | #define LCC0 0x46 /* Lens correction control 0 */ | ||
| 106 | #define LCC1 0x47 /* Lens correction option 1 - X coordinate */ | ||
| 107 | #define LCC2 0x48 /* Lens correction option 2 - Y coordinate */ | ||
| 108 | #define LCC3 0x49 /* Lens correction option 3 */ | ||
| 109 | #define LCC4 0x4A /* Lens correction option 4 - radius of the circular */ | ||
| 110 | #define LCC5 0x4B /* Lens correction option 5 */ | ||
| 111 | #define LCC6 0x4C /* Lens correction option 6 */ | ||
| 112 | /* for ov7725 */ | ||
| 113 | #define LC_CTR 0x46 /* Lens correction control */ | ||
| 114 | #define LC_XC 0x47 /* X coordinate of lens correction center relative */ | ||
| 115 | #define LC_YC 0x48 /* Y coordinate of lens correction center relative */ | ||
| 116 | #define LC_COEF 0x49 /* Lens correction coefficient */ | ||
| 117 | #define LC_RADI 0x4A /* Lens correction radius */ | ||
| 118 | #define LC_COEFB 0x4B /* Lens B channel compensation coefficient */ | ||
| 119 | #define LC_COEFR 0x4C /* Lens R channel compensation coefficient */ | ||
| 120 | |||
| 121 | #define FIXGAIN 0x4D /* Analog fix gain amplifer */ | ||
| 122 | #define AREF0 0x4E /* Sensor reference control */ | ||
| 123 | #define AREF1 0x4F /* Sensor reference current control */ | ||
| 124 | #define AREF2 0x50 /* Analog reference control */ | ||
| 125 | #define AREF3 0x51 /* ADC reference control */ | ||
| 126 | #define AREF4 0x52 /* ADC reference control */ | ||
| 127 | #define AREF5 0x53 /* ADC reference control */ | ||
| 128 | #define AREF6 0x54 /* Analog reference control */ | ||
| 129 | #define AREF7 0x55 /* Analog reference control */ | ||
| 130 | #define UFIX 0x60 /* U channel fixed value output */ | ||
| 131 | #define VFIX 0x61 /* V channel fixed value output */ | ||
| 132 | #define AWBB_BLK 0x62 /* AWB option for advanced AWB */ | ||
| 133 | #define AWB_CTRL0 0x63 /* AWB control byte 0 */ | ||
| 134 | #define DSP_CTRL1 0x64 /* DSP control byte 1 */ | ||
| 135 | #define DSP_CTRL2 0x65 /* DSP control byte 2 */ | ||
| 136 | #define DSP_CTRL3 0x66 /* DSP control byte 3 */ | ||
| 137 | #define DSP_CTRL4 0x67 /* DSP control byte 4 */ | ||
| 138 | #define AWB_BIAS 0x68 /* AWB BLC level clip */ | ||
| 139 | #define AWB_CTRL1 0x69 /* AWB control 1 */ | ||
| 140 | #define AWB_CTRL2 0x6A /* AWB control 2 */ | ||
| 141 | #define AWB_CTRL3 0x6B /* AWB control 3 */ | ||
| 142 | #define AWB_CTRL4 0x6C /* AWB control 4 */ | ||
| 143 | #define AWB_CTRL5 0x6D /* AWB control 5 */ | ||
| 144 | #define AWB_CTRL6 0x6E /* AWB control 6 */ | ||
| 145 | #define AWB_CTRL7 0x6F /* AWB control 7 */ | ||
| 146 | #define AWB_CTRL8 0x70 /* AWB control 8 */ | ||
| 147 | #define AWB_CTRL9 0x71 /* AWB control 9 */ | ||
| 148 | #define AWB_CTRL10 0x72 /* AWB control 10 */ | ||
| 149 | #define AWB_CTRL11 0x73 /* AWB control 11 */ | ||
| 150 | #define AWB_CTRL12 0x74 /* AWB control 12 */ | ||
| 151 | #define AWB_CTRL13 0x75 /* AWB control 13 */ | ||
| 152 | #define AWB_CTRL14 0x76 /* AWB control 14 */ | ||
| 153 | #define AWB_CTRL15 0x77 /* AWB control 15 */ | ||
| 154 | #define AWB_CTRL16 0x78 /* AWB control 16 */ | ||
| 155 | #define AWB_CTRL17 0x79 /* AWB control 17 */ | ||
| 156 | #define AWB_CTRL18 0x7A /* AWB control 18 */ | ||
| 157 | #define AWB_CTRL19 0x7B /* AWB control 19 */ | ||
| 158 | #define AWB_CTRL20 0x7C /* AWB control 20 */ | ||
| 159 | #define AWB_CTRL21 0x7D /* AWB control 21 */ | ||
| 160 | #define GAM1 0x7E /* Gamma Curve 1st segment input end point */ | ||
| 161 | #define GAM2 0x7F /* Gamma Curve 2nd segment input end point */ | ||
| 162 | #define GAM3 0x80 /* Gamma Curve 3rd segment input end point */ | ||
| 163 | #define GAM4 0x81 /* Gamma Curve 4th segment input end point */ | ||
| 164 | #define GAM5 0x82 /* Gamma Curve 5th segment input end point */ | ||
| 165 | #define GAM6 0x83 /* Gamma Curve 6th segment input end point */ | ||
| 166 | #define GAM7 0x84 /* Gamma Curve 7th segment input end point */ | ||
| 167 | #define GAM8 0x85 /* Gamma Curve 8th segment input end point */ | ||
| 168 | #define GAM9 0x86 /* Gamma Curve 9th segment input end point */ | ||
| 169 | #define GAM10 0x87 /* Gamma Curve 10th segment input end point */ | ||
| 170 | #define GAM11 0x88 /* Gamma Curve 11th segment input end point */ | ||
| 171 | #define GAM12 0x89 /* Gamma Curve 12th segment input end point */ | ||
| 172 | #define GAM13 0x8A /* Gamma Curve 13th segment input end point */ | ||
| 173 | #define GAM14 0x8B /* Gamma Curve 14th segment input end point */ | ||
| 174 | #define GAM15 0x8C /* Gamma Curve 15th segment input end point */ | ||
| 175 | #define SLOP 0x8D /* Gamma curve highest segment slope */ | ||
| 176 | #define DNSTH 0x8E /* De-noise threshold */ | ||
| 177 | #define EDGE_STRNGT 0x8F /* Edge strength control when manual mode */ | ||
| 178 | #define EDGE_TRSHLD 0x90 /* Edge threshold control when manual mode */ | ||
| 179 | #define DNSOFF 0x91 /* Auto De-noise threshold control */ | ||
| 180 | #define EDGE_UPPER 0x92 /* Edge strength upper limit when Auto mode */ | ||
| 181 | #define EDGE_LOWER 0x93 /* Edge strength lower limit when Auto mode */ | ||
| 182 | #define MTX1 0x94 /* Matrix coefficient 1 */ | ||
| 183 | #define MTX2 0x95 /* Matrix coefficient 2 */ | ||
| 184 | #define MTX3 0x96 /* Matrix coefficient 3 */ | ||
| 185 | #define MTX4 0x97 /* Matrix coefficient 4 */ | ||
| 186 | #define MTX5 0x98 /* Matrix coefficient 5 */ | ||
| 187 | #define MTX6 0x99 /* Matrix coefficient 6 */ | ||
| 188 | #define MTX_CTRL 0x9A /* Matrix control */ | ||
| 189 | #define BRIGHT 0x9B /* Brightness control */ | ||
| 190 | #define CNTRST 0x9C /* Contrast contrast */ | ||
| 191 | #define CNTRST_CTRL 0x9D /* Contrast contrast center */ | ||
| 192 | #define UVAD_J0 0x9E /* Auto UV adjust contrast 0 */ | ||
| 193 | #define UVAD_J1 0x9F /* Auto UV adjust contrast 1 */ | ||
| 194 | #define SCAL0 0xA0 /* Scaling control 0 */ | ||
| 195 | #define SCAL1 0xA1 /* Scaling control 1 */ | ||
| 196 | #define SCAL2 0xA2 /* Scaling control 2 */ | ||
| 197 | #define FIFODLYM 0xA3 /* FIFO manual mode delay control */ | ||
| 198 | #define FIFODLYA 0xA4 /* FIFO auto mode delay control */ | ||
| 199 | #define SDE 0xA6 /* Special digital effect control */ | ||
| 200 | #define USAT 0xA7 /* U component saturation control */ | ||
| 201 | #define VSAT 0xA8 /* V component saturation control */ | ||
| 202 | /* for ov7720 */ | ||
| 203 | #define HUE0 0xA9 /* Hue control 0 */ | ||
| 204 | #define HUE1 0xAA /* Hue control 1 */ | ||
| 205 | /* for ov7725 */ | ||
| 206 | #define HUECOS 0xA9 /* Cosine value */ | ||
| 207 | #define HUESIN 0xAA /* Sine value */ | ||
| 208 | |||
| 209 | #define SIGN 0xAB /* Sign bit for Hue and contrast */ | ||
| 210 | #define DSPAUTO 0xAC /* DSP auto function ON/OFF control */ | ||
| 211 | |||
| 212 | /* | ||
| 213 | * register detail | ||
| 214 | */ | ||
| 215 | |||
| 216 | /* COM2 */ | ||
| 217 | #define SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */ | ||
| 218 | /* Output drive capability */ | ||
| 219 | #define OCAP_1x 0x00 /* 1x */ | ||
| 220 | #define OCAP_2x 0x01 /* 2x */ | ||
| 221 | #define OCAP_3x 0x02 /* 3x */ | ||
| 222 | #define OCAP_4x 0x03 /* 4x */ | ||
| 223 | |||
| 224 | /* COM3 */ | ||
| 225 | #define SWAP_MASK (SWAP_RGB | SWAP_YUV | SWAP_ML) | ||
| 226 | #define IMG_MASK (VFLIP_IMG | HFLIP_IMG) | ||
| 227 | |||
| 228 | #define VFLIP_IMG 0x80 /* Vertical flip image ON/OFF selection */ | ||
| 229 | #define HFLIP_IMG 0x40 /* Horizontal mirror image ON/OFF selection */ | ||
| 230 | #define SWAP_RGB 0x20 /* Swap B/R output sequence in RGB mode */ | ||
| 231 | #define SWAP_YUV 0x10 /* Swap Y/UV output sequence in YUV mode */ | ||
| 232 | #define SWAP_ML 0x08 /* Swap output MSB/LSB */ | ||
| 233 | /* Tri-state option for output clock */ | ||
| 234 | #define NOTRI_CLOCK 0x04 /* 0: Tri-state at this period */ | ||
| 235 | /* 1: No tri-state at this period */ | ||
| 236 | /* Tri-state option for output data */ | ||
| 237 | #define NOTRI_DATA 0x02 /* 0: Tri-state at this period */ | ||
| 238 | /* 1: No tri-state at this period */ | ||
| 239 | #define SCOLOR_TEST 0x01 /* Sensor color bar test pattern */ | ||
| 240 | |||
| 241 | /* COM4 */ | ||
| 242 | /* PLL frequency control */ | ||
| 243 | #define PLL_BYPASS 0x00 /* 00: Bypass PLL */ | ||
| 244 | #define PLL_4x 0x40 /* 01: PLL 4x */ | ||
| 245 | #define PLL_6x 0x80 /* 10: PLL 6x */ | ||
| 246 | #define PLL_8x 0xc0 /* 11: PLL 8x */ | ||
| 247 | /* AEC evaluate window */ | ||
| 248 | #define AEC_FULL 0x00 /* 00: Full window */ | ||
| 249 | #define AEC_1p2 0x10 /* 01: 1/2 window */ | ||
| 250 | #define AEC_1p4 0x20 /* 10: 1/4 window */ | ||
| 251 | #define AEC_2p3 0x30 /* 11: Low 2/3 window */ | ||
| 252 | |||
| 253 | /* COM5 */ | ||
| 254 | #define AFR_ON_OFF 0x80 /* Auto frame rate control ON/OFF selection */ | ||
| 255 | #define AFR_SPPED 0x40 /* Auto frame rate control speed selection */ | ||
| 256 | /* Auto frame rate max rate control */ | ||
| 257 | #define AFR_NO_RATE 0x00 /* No reduction of frame rate */ | ||
| 258 | #define AFR_1p2 0x10 /* Max reduction to 1/2 frame rate */ | ||
| 259 | #define AFR_1p4 0x20 /* Max reduction to 1/4 frame rate */ | ||
| 260 | #define AFR_1p8 0x30 /* Max reduction to 1/8 frame rate */ | ||
| 261 | /* Auto frame rate active point control */ | ||
| 262 | #define AF_2x 0x00 /* Add frame when AGC reaches 2x gain */ | ||
| 263 | #define AF_4x 0x04 /* Add frame when AGC reaches 4x gain */ | ||
| 264 | #define AF_8x 0x08 /* Add frame when AGC reaches 8x gain */ | ||
| 265 | #define AF_16x 0x0c /* Add frame when AGC reaches 16x gain */ | ||
| 266 | /* AEC max step control */ | ||
| 267 | #define AEC_NO_LIMIT 0x01 /* 0 : AEC incease step has limit */ | ||
| 268 | /* 1 : No limit to AEC increase step */ | ||
| 269 | |||
| 270 | /* COM7 */ | ||
| 271 | /* SCCB Register Reset */ | ||
| 272 | #define SCCB_RESET 0x80 /* 0 : No change */ | ||
| 273 | /* 1 : Resets all registers to default */ | ||
| 274 | /* Resolution selection */ | ||
| 275 | #define SLCT_MASK 0x40 /* Mask of VGA or QVGA */ | ||
| 276 | #define SLCT_VGA 0x00 /* 0 : VGA */ | ||
| 277 | #define SLCT_QVGA 0x40 /* 1 : QVGA */ | ||
| 278 | #define ITU656_ON_OFF 0x20 /* ITU656 protocol ON/OFF selection */ | ||
| 279 | #define SENSOR_RAW 0x10 /* Sensor RAW */ | ||
| 280 | /* RGB output format control */ | ||
| 281 | #define FMT_MASK 0x0c /* Mask of color format */ | ||
| 282 | #define FMT_GBR422 0x00 /* 00 : GBR 4:2:2 */ | ||
| 283 | #define FMT_RGB565 0x04 /* 01 : RGB 565 */ | ||
| 284 | #define FMT_RGB555 0x08 /* 10 : RGB 555 */ | ||
| 285 | #define FMT_RGB444 0x0c /* 11 : RGB 444 */ | ||
| 286 | /* Output format control */ | ||
| 287 | #define OFMT_MASK 0x03 /* Mask of output format */ | ||
| 288 | #define OFMT_YUV 0x00 /* 00 : YUV */ | ||
| 289 | #define OFMT_P_BRAW 0x01 /* 01 : Processed Bayer RAW */ | ||
| 290 | #define OFMT_RGB 0x02 /* 10 : RGB */ | ||
| 291 | #define OFMT_BRAW 0x03 /* 11 : Bayer RAW */ | ||
| 292 | |||
| 293 | /* COM8 */ | ||
| 294 | #define FAST_ALGO 0x80 /* Enable fast AGC/AEC algorithm */ | ||
| 295 | /* AEC Setp size limit */ | ||
| 296 | #define UNLMT_STEP 0x40 /* 0 : Step size is limited */ | ||
| 297 | /* 1 : Unlimited step size */ | ||
| 298 | #define BNDF_ON_OFF 0x20 /* Banding filter ON/OFF */ | ||
| 299 | #define AEC_BND 0x10 /* Enable AEC below banding value */ | ||
| 300 | #define AEC_ON_OFF 0x08 /* Fine AEC ON/OFF control */ | ||
| 301 | #define AGC_ON 0x04 /* AGC Enable */ | ||
| 302 | #define AWB_ON 0x02 /* AWB Enable */ | ||
| 303 | #define AEC_ON 0x01 /* AEC Enable */ | ||
| 304 | |||
| 305 | /* COM9 */ | ||
| 306 | #define BASE_AECAGC 0x80 /* Histogram or average based AEC/AGC */ | ||
| 307 | /* Automatic gain ceiling - maximum AGC value */ | ||
| 308 | #define GAIN_2x 0x00 /* 000 : 2x */ | ||
| 309 | #define GAIN_4x 0x10 /* 001 : 4x */ | ||
| 310 | #define GAIN_8x 0x20 /* 010 : 8x */ | ||
| 311 | #define GAIN_16x 0x30 /* 011 : 16x */ | ||
| 312 | #define GAIN_32x 0x40 /* 100 : 32x */ | ||
| 313 | #define GAIN_64x 0x50 /* 101 : 64x */ | ||
| 314 | #define GAIN_128x 0x60 /* 110 : 128x */ | ||
| 315 | #define DROP_VSYNC 0x04 /* Drop VSYNC output of corrupt frame */ | ||
| 316 | #define DROP_HREF 0x02 /* Drop HREF output of corrupt frame */ | ||
| 317 | |||
| 318 | /* COM11 */ | ||
| 319 | #define SGLF_ON_OFF 0x02 /* Single frame ON/OFF selection */ | ||
| 320 | #define SGLF_TRIG 0x01 /* Single frame transfer trigger */ | ||
| 321 | |||
| 322 | /* HREF */ | ||
| 323 | #define HREF_VSTART_SHIFT 6 /* VSTART LSB */ | ||
| 324 | #define HREF_HSTART_SHIFT 4 /* HSTART 2 LSBs */ | ||
| 325 | #define HREF_VSIZE_SHIFT 2 /* VSIZE LSB */ | ||
| 326 | #define HREF_HSIZE_SHIFT 0 /* HSIZE 2 LSBs */ | ||
| 327 | |||
| 328 | /* EXHCH */ | ||
| 329 | #define EXHCH_VSIZE_SHIFT 2 /* VOUTSIZE LSB */ | ||
| 330 | #define EXHCH_HSIZE_SHIFT 0 /* HOUTSIZE 2 LSBs */ | ||
| 331 | |||
| 332 | /* DSP_CTRL1 */ | ||
| 333 | #define FIFO_ON 0x80 /* FIFO enable/disable selection */ | ||
| 334 | #define UV_ON_OFF 0x40 /* UV adjust function ON/OFF selection */ | ||
| 335 | #define YUV444_2_422 0x20 /* YUV444 to 422 UV channel option selection */ | ||
| 336 | #define CLR_MTRX_ON_OFF 0x10 /* Color matrix ON/OFF selection */ | ||
| 337 | #define INTPLT_ON_OFF 0x08 /* Interpolation ON/OFF selection */ | ||
| 338 | #define GMM_ON_OFF 0x04 /* Gamma function ON/OFF selection */ | ||
| 339 | #define AUTO_BLK_ON_OFF 0x02 /* Black defect auto correction ON/OFF */ | ||
| 340 | #define AUTO_WHT_ON_OFF 0x01 /* White define auto correction ON/OFF */ | ||
| 341 | |||
| 342 | /* DSP_CTRL3 */ | ||
| 343 | #define UV_MASK 0x80 /* UV output sequence option */ | ||
| 344 | #define UV_ON 0x80 /* ON */ | ||
| 345 | #define UV_OFF 0x00 /* OFF */ | ||
| 346 | #define CBAR_MASK 0x20 /* DSP Color bar mask */ | ||
| 347 | #define CBAR_ON 0x20 /* ON */ | ||
| 348 | #define CBAR_OFF 0x00 /* OFF */ | ||
| 349 | |||
| 350 | /* DSP_CTRL4 */ | ||
| 351 | #define DSP_OFMT_YUV 0x00 | ||
| 352 | #define DSP_OFMT_RGB 0x00 | ||
| 353 | #define DSP_OFMT_RAW8 0x02 | ||
| 354 | #define DSP_OFMT_RAW10 0x03 | ||
| 355 | |||
| 356 | /* DSPAUTO (DSP Auto Function ON/OFF Control) */ | ||
| 357 | #define AWB_ACTRL 0x80 /* AWB auto threshold control */ | ||
| 358 | #define DENOISE_ACTRL 0x40 /* De-noise auto threshold control */ | ||
| 359 | #define EDGE_ACTRL 0x20 /* Edge enhancement auto strength control */ | ||
| 360 | #define UV_ACTRL 0x10 /* UV adjust auto slope control */ | ||
| 361 | #define SCAL0_ACTRL 0x08 /* Auto scaling factor control */ | ||
| 362 | #define SCAL1_2_ACTRL 0x04 /* Auto scaling factor control */ | ||
| 363 | |||
| 364 | #define OV772X_MAX_WIDTH VGA_WIDTH | ||
| 365 | #define OV772X_MAX_HEIGHT VGA_HEIGHT | ||
| 366 | |||
| 367 | /* | ||
| 368 | * ID | ||
| 369 | */ | ||
| 370 | #define OV7720 0x7720 | ||
| 371 | #define OV7725 0x7721 | ||
| 372 | #define VERSION(pid, ver) ((pid<<8)|(ver&0xFF)) | ||
| 373 | |||
| 374 | /* | ||
| 375 | * struct | ||
| 376 | */ | ||
| 377 | |||
| 378 | struct ov772x_color_format { | ||
| 379 | u32 code; | ||
| 380 | enum v4l2_colorspace colorspace; | ||
| 381 | u8 dsp3; | ||
| 382 | u8 dsp4; | ||
| 383 | u8 com3; | ||
| 384 | u8 com7; | ||
| 385 | }; | ||
| 386 | |||
| 387 | struct ov772x_win_size { | ||
| 388 | char *name; | ||
| 389 | unsigned char com7_bit; | ||
| 390 | struct v4l2_rect rect; | ||
| 391 | }; | ||
| 392 | |||
| 393 | struct ov772x_priv { | ||
| 394 | struct v4l2_subdev subdev; | ||
| 395 | struct v4l2_ctrl_handler hdl; | ||
| 396 | struct v4l2_clk *clk; | ||
| 397 | struct ov772x_camera_info *info; | ||
| 398 | const struct ov772x_color_format *cfmt; | ||
| 399 | const struct ov772x_win_size *win; | ||
| 400 | unsigned short flag_vflip:1; | ||
| 401 | unsigned short flag_hflip:1; | ||
| 402 | /* band_filter = COM8[5] ? 256 - BDBASE : 0 */ | ||
| 403 | unsigned short band_filter; | ||
| 404 | }; | ||
| 405 | |||
| 406 | /* | ||
| 407 | * supported color format list | ||
| 408 | */ | ||
| 409 | static const struct ov772x_color_format ov772x_cfmts[] = { | ||
| 410 | { | ||
| 411 | .code = MEDIA_BUS_FMT_YUYV8_2X8, | ||
| 412 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
| 413 | .dsp3 = 0x0, | ||
| 414 | .dsp4 = DSP_OFMT_YUV, | ||
| 415 | .com3 = SWAP_YUV, | ||
| 416 | .com7 = OFMT_YUV, | ||
| 417 | }, | ||
| 418 | { | ||
| 419 | .code = MEDIA_BUS_FMT_YVYU8_2X8, | ||
| 420 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
| 421 | .dsp3 = UV_ON, | ||
| 422 | .dsp4 = DSP_OFMT_YUV, | ||
| 423 | .com3 = SWAP_YUV, | ||
| 424 | .com7 = OFMT_YUV, | ||
| 425 | }, | ||
| 426 | { | ||
| 427 | .code = MEDIA_BUS_FMT_UYVY8_2X8, | ||
| 428 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
| 429 | .dsp3 = 0x0, | ||
| 430 | .dsp4 = DSP_OFMT_YUV, | ||
| 431 | .com3 = 0x0, | ||
| 432 | .com7 = OFMT_YUV, | ||
| 433 | }, | ||
| 434 | { | ||
| 435 | .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, | ||
| 436 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 437 | .dsp3 = 0x0, | ||
| 438 | .dsp4 = DSP_OFMT_YUV, | ||
| 439 | .com3 = SWAP_RGB, | ||
| 440 | .com7 = FMT_RGB555 | OFMT_RGB, | ||
| 441 | }, | ||
| 442 | { | ||
| 443 | .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, | ||
| 444 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 445 | .dsp3 = 0x0, | ||
| 446 | .dsp4 = DSP_OFMT_YUV, | ||
| 447 | .com3 = 0x0, | ||
| 448 | .com7 = FMT_RGB555 | OFMT_RGB, | ||
| 449 | }, | ||
| 450 | { | ||
| 451 | .code = MEDIA_BUS_FMT_RGB565_2X8_LE, | ||
| 452 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 453 | .dsp3 = 0x0, | ||
| 454 | .dsp4 = DSP_OFMT_YUV, | ||
| 455 | .com3 = SWAP_RGB, | ||
| 456 | .com7 = FMT_RGB565 | OFMT_RGB, | ||
| 457 | }, | ||
| 458 | { | ||
| 459 | .code = MEDIA_BUS_FMT_RGB565_2X8_BE, | ||
| 460 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 461 | .dsp3 = 0x0, | ||
| 462 | .dsp4 = DSP_OFMT_YUV, | ||
| 463 | .com3 = 0x0, | ||
| 464 | .com7 = FMT_RGB565 | OFMT_RGB, | ||
| 465 | }, | ||
| 466 | { | ||
| 467 | /* Setting DSP4 to DSP_OFMT_RAW8 still gives 10-bit output, | ||
| 468 | * regardless of the COM7 value. We can thus only support 10-bit | ||
| 469 | * Bayer until someone figures it out. | ||
| 470 | */ | ||
| 471 | .code = MEDIA_BUS_FMT_SBGGR10_1X10, | ||
| 472 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 473 | .dsp3 = 0x0, | ||
| 474 | .dsp4 = DSP_OFMT_RAW10, | ||
| 475 | .com3 = 0x0, | ||
| 476 | .com7 = SENSOR_RAW | OFMT_BRAW, | ||
| 477 | }, | ||
| 478 | }; | ||
| 479 | |||
| 480 | |||
| 481 | /* | ||
| 482 | * window size list | ||
| 483 | */ | ||
| 484 | |||
| 485 | static const struct ov772x_win_size ov772x_win_sizes[] = { | ||
| 486 | { | ||
| 487 | .name = "VGA", | ||
| 488 | .com7_bit = SLCT_VGA, | ||
| 489 | .rect = { | ||
| 490 | .left = 140, | ||
| 491 | .top = 14, | ||
| 492 | .width = VGA_WIDTH, | ||
| 493 | .height = VGA_HEIGHT, | ||
| 494 | }, | ||
| 495 | }, { | ||
| 496 | .name = "QVGA", | ||
| 497 | .com7_bit = SLCT_QVGA, | ||
| 498 | .rect = { | ||
| 499 | .left = 252, | ||
| 500 | .top = 6, | ||
| 501 | .width = QVGA_WIDTH, | ||
| 502 | .height = QVGA_HEIGHT, | ||
| 503 | }, | ||
| 504 | }, | ||
| 505 | }; | ||
| 506 | |||
| 507 | /* | ||
| 508 | * general function | ||
| 509 | */ | ||
| 510 | |||
| 511 | static struct ov772x_priv *to_ov772x(struct v4l2_subdev *sd) | ||
| 512 | { | ||
| 513 | return container_of(sd, struct ov772x_priv, subdev); | ||
| 514 | } | ||
| 515 | |||
| 516 | static inline int ov772x_read(struct i2c_client *client, u8 addr) | ||
| 517 | { | ||
| 518 | return i2c_smbus_read_byte_data(client, addr); | ||
| 519 | } | ||
| 520 | |||
| 521 | static inline int ov772x_write(struct i2c_client *client, u8 addr, u8 value) | ||
| 522 | { | ||
| 523 | return i2c_smbus_write_byte_data(client, addr, value); | ||
| 524 | } | ||
| 525 | |||
| 526 | static int ov772x_mask_set(struct i2c_client *client, u8 command, u8 mask, | ||
| 527 | u8 set) | ||
| 528 | { | ||
| 529 | s32 val = ov772x_read(client, command); | ||
| 530 | if (val < 0) | ||
| 531 | return val; | ||
| 532 | |||
| 533 | val &= ~mask; | ||
| 534 | val |= set & mask; | ||
| 535 | |||
| 536 | return ov772x_write(client, command, val); | ||
| 537 | } | ||
| 538 | |||
| 539 | static int ov772x_reset(struct i2c_client *client) | ||
| 540 | { | ||
| 541 | int ret; | ||
| 542 | |||
| 543 | ret = ov772x_write(client, COM7, SCCB_RESET); | ||
| 544 | if (ret < 0) | ||
| 545 | return ret; | ||
| 546 | |||
| 547 | msleep(1); | ||
| 548 | |||
| 549 | return ov772x_mask_set(client, COM2, SOFT_SLEEP_MODE, SOFT_SLEEP_MODE); | ||
| 550 | } | ||
| 551 | |||
| 552 | /* | ||
| 553 | * soc_camera_ops function | ||
| 554 | */ | ||
| 555 | |||
| 556 | static int ov772x_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 557 | { | ||
| 558 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 559 | struct ov772x_priv *priv = to_ov772x(sd); | ||
| 560 | |||
| 561 | if (!enable) { | ||
| 562 | ov772x_mask_set(client, COM2, SOFT_SLEEP_MODE, SOFT_SLEEP_MODE); | ||
| 563 | return 0; | ||
| 564 | } | ||
| 565 | |||
| 566 | ov772x_mask_set(client, COM2, SOFT_SLEEP_MODE, 0); | ||
| 567 | |||
| 568 | dev_dbg(&client->dev, "format %d, win %s\n", | ||
| 569 | priv->cfmt->code, priv->win->name); | ||
| 570 | |||
| 571 | return 0; | ||
| 572 | } | ||
| 573 | |||
| 574 | static int ov772x_s_ctrl(struct v4l2_ctrl *ctrl) | ||
| 575 | { | ||
| 576 | struct ov772x_priv *priv = container_of(ctrl->handler, | ||
| 577 | struct ov772x_priv, hdl); | ||
| 578 | struct v4l2_subdev *sd = &priv->subdev; | ||
| 579 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 580 | int ret = 0; | ||
| 581 | u8 val; | ||
| 582 | |||
| 583 | switch (ctrl->id) { | ||
| 584 | case V4L2_CID_VFLIP: | ||
| 585 | val = ctrl->val ? VFLIP_IMG : 0x00; | ||
| 586 | priv->flag_vflip = ctrl->val; | ||
| 587 | if (priv->info->flags & OV772X_FLAG_VFLIP) | ||
| 588 | val ^= VFLIP_IMG; | ||
| 589 | return ov772x_mask_set(client, COM3, VFLIP_IMG, val); | ||
| 590 | case V4L2_CID_HFLIP: | ||
| 591 | val = ctrl->val ? HFLIP_IMG : 0x00; | ||
| 592 | priv->flag_hflip = ctrl->val; | ||
| 593 | if (priv->info->flags & OV772X_FLAG_HFLIP) | ||
| 594 | val ^= HFLIP_IMG; | ||
| 595 | return ov772x_mask_set(client, COM3, HFLIP_IMG, val); | ||
| 596 | case V4L2_CID_BAND_STOP_FILTER: | ||
| 597 | if (!ctrl->val) { | ||
| 598 | /* Switch the filter off, it is on now */ | ||
| 599 | ret = ov772x_mask_set(client, BDBASE, 0xff, 0xff); | ||
| 600 | if (!ret) | ||
| 601 | ret = ov772x_mask_set(client, COM8, | ||
| 602 | BNDF_ON_OFF, 0); | ||
| 603 | } else { | ||
| 604 | /* Switch the filter on, set AEC low limit */ | ||
| 605 | val = 256 - ctrl->val; | ||
| 606 | ret = ov772x_mask_set(client, COM8, | ||
| 607 | BNDF_ON_OFF, BNDF_ON_OFF); | ||
| 608 | if (!ret) | ||
| 609 | ret = ov772x_mask_set(client, BDBASE, | ||
| 610 | 0xff, val); | ||
| 611 | } | ||
| 612 | if (!ret) | ||
| 613 | priv->band_filter = ctrl->val; | ||
| 614 | return ret; | ||
| 615 | } | ||
| 616 | |||
| 617 | return -EINVAL; | ||
| 618 | } | ||
| 619 | |||
| 620 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 621 | static int ov772x_g_register(struct v4l2_subdev *sd, | ||
| 622 | struct v4l2_dbg_register *reg) | ||
| 623 | { | ||
| 624 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 625 | int ret; | ||
| 626 | |||
| 627 | reg->size = 1; | ||
| 628 | if (reg->reg > 0xff) | ||
| 629 | return -EINVAL; | ||
| 630 | |||
| 631 | ret = ov772x_read(client, reg->reg); | ||
| 632 | if (ret < 0) | ||
| 633 | return ret; | ||
| 634 | |||
| 635 | reg->val = (__u64)ret; | ||
| 636 | |||
| 637 | return 0; | ||
| 638 | } | ||
| 639 | |||
| 640 | static int ov772x_s_register(struct v4l2_subdev *sd, | ||
| 641 | const struct v4l2_dbg_register *reg) | ||
| 642 | { | ||
| 643 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 644 | |||
| 645 | if (reg->reg > 0xff || | ||
| 646 | reg->val > 0xff) | ||
| 647 | return -EINVAL; | ||
| 648 | |||
| 649 | return ov772x_write(client, reg->reg, reg->val); | ||
| 650 | } | ||
| 651 | #endif | ||
| 652 | |||
| 653 | static int ov772x_s_power(struct v4l2_subdev *sd, int on) | ||
| 654 | { | ||
| 655 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 656 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 657 | struct ov772x_priv *priv = to_ov772x(sd); | ||
| 658 | |||
| 659 | return soc_camera_set_power(&client->dev, ssdd, priv->clk, on); | ||
| 660 | } | ||
| 661 | |||
| 662 | static const struct ov772x_win_size *ov772x_select_win(u32 width, u32 height) | ||
| 663 | { | ||
| 664 | const struct ov772x_win_size *win = &ov772x_win_sizes[0]; | ||
| 665 | u32 best_diff = UINT_MAX; | ||
| 666 | unsigned int i; | ||
| 667 | |||
| 668 | for (i = 0; i < ARRAY_SIZE(ov772x_win_sizes); ++i) { | ||
| 669 | u32 diff = abs(width - ov772x_win_sizes[i].rect.width) | ||
| 670 | + abs(height - ov772x_win_sizes[i].rect.height); | ||
| 671 | if (diff < best_diff) { | ||
| 672 | best_diff = diff; | ||
| 673 | win = &ov772x_win_sizes[i]; | ||
| 674 | } | ||
| 675 | } | ||
| 676 | |||
| 677 | return win; | ||
| 678 | } | ||
| 679 | |||
| 680 | static void ov772x_select_params(const struct v4l2_mbus_framefmt *mf, | ||
| 681 | const struct ov772x_color_format **cfmt, | ||
| 682 | const struct ov772x_win_size **win) | ||
| 683 | { | ||
| 684 | unsigned int i; | ||
| 685 | |||
| 686 | /* Select a format. */ | ||
| 687 | *cfmt = &ov772x_cfmts[0]; | ||
| 688 | |||
| 689 | for (i = 0; i < ARRAY_SIZE(ov772x_cfmts); i++) { | ||
| 690 | if (mf->code == ov772x_cfmts[i].code) { | ||
| 691 | *cfmt = &ov772x_cfmts[i]; | ||
| 692 | break; | ||
| 693 | } | ||
| 694 | } | ||
| 695 | |||
| 696 | /* Select a window size. */ | ||
| 697 | *win = ov772x_select_win(mf->width, mf->height); | ||
| 698 | } | ||
| 699 | |||
| 700 | static int ov772x_set_params(struct ov772x_priv *priv, | ||
| 701 | const struct ov772x_color_format *cfmt, | ||
| 702 | const struct ov772x_win_size *win) | ||
| 703 | { | ||
| 704 | struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev); | ||
| 705 | int ret; | ||
| 706 | u8 val; | ||
| 707 | |||
| 708 | /* | ||
| 709 | * reset hardware | ||
| 710 | */ | ||
| 711 | ov772x_reset(client); | ||
| 712 | |||
| 713 | /* | ||
| 714 | * Edge Ctrl | ||
| 715 | */ | ||
| 716 | if (priv->info->edgectrl.strength & OV772X_MANUAL_EDGE_CTRL) { | ||
| 717 | |||
| 718 | /* | ||
| 719 | * Manual Edge Control Mode | ||
| 720 | * | ||
| 721 | * Edge auto strength bit is set by default. | ||
| 722 | * Remove it when manual mode. | ||
| 723 | */ | ||
| 724 | |||
| 725 | ret = ov772x_mask_set(client, DSPAUTO, EDGE_ACTRL, 0x00); | ||
| 726 | if (ret < 0) | ||
| 727 | goto ov772x_set_fmt_error; | ||
| 728 | |||
| 729 | ret = ov772x_mask_set(client, | ||
| 730 | EDGE_TRSHLD, OV772X_EDGE_THRESHOLD_MASK, | ||
| 731 | priv->info->edgectrl.threshold); | ||
| 732 | if (ret < 0) | ||
| 733 | goto ov772x_set_fmt_error; | ||
| 734 | |||
| 735 | ret = ov772x_mask_set(client, | ||
| 736 | EDGE_STRNGT, OV772X_EDGE_STRENGTH_MASK, | ||
| 737 | priv->info->edgectrl.strength); | ||
| 738 | if (ret < 0) | ||
| 739 | goto ov772x_set_fmt_error; | ||
| 740 | |||
| 741 | } else if (priv->info->edgectrl.upper > priv->info->edgectrl.lower) { | ||
| 742 | /* | ||
| 743 | * Auto Edge Control Mode | ||
| 744 | * | ||
| 745 | * set upper and lower limit | ||
| 746 | */ | ||
| 747 | ret = ov772x_mask_set(client, | ||
| 748 | EDGE_UPPER, OV772X_EDGE_UPPER_MASK, | ||
| 749 | priv->info->edgectrl.upper); | ||
| 750 | if (ret < 0) | ||
| 751 | goto ov772x_set_fmt_error; | ||
| 752 | |||
| 753 | ret = ov772x_mask_set(client, | ||
| 754 | EDGE_LOWER, OV772X_EDGE_LOWER_MASK, | ||
| 755 | priv->info->edgectrl.lower); | ||
| 756 | if (ret < 0) | ||
| 757 | goto ov772x_set_fmt_error; | ||
| 758 | } | ||
| 759 | |||
| 760 | /* Format and window size */ | ||
| 761 | ret = ov772x_write(client, HSTART, win->rect.left >> 2); | ||
| 762 | if (ret < 0) | ||
| 763 | goto ov772x_set_fmt_error; | ||
| 764 | ret = ov772x_write(client, HSIZE, win->rect.width >> 2); | ||
| 765 | if (ret < 0) | ||
| 766 | goto ov772x_set_fmt_error; | ||
| 767 | ret = ov772x_write(client, VSTART, win->rect.top >> 1); | ||
| 768 | if (ret < 0) | ||
| 769 | goto ov772x_set_fmt_error; | ||
| 770 | ret = ov772x_write(client, VSIZE, win->rect.height >> 1); | ||
| 771 | if (ret < 0) | ||
| 772 | goto ov772x_set_fmt_error; | ||
| 773 | ret = ov772x_write(client, HOUTSIZE, win->rect.width >> 2); | ||
| 774 | if (ret < 0) | ||
| 775 | goto ov772x_set_fmt_error; | ||
| 776 | ret = ov772x_write(client, VOUTSIZE, win->rect.height >> 1); | ||
| 777 | if (ret < 0) | ||
| 778 | goto ov772x_set_fmt_error; | ||
| 779 | ret = ov772x_write(client, HREF, | ||
| 780 | ((win->rect.top & 1) << HREF_VSTART_SHIFT) | | ||
| 781 | ((win->rect.left & 3) << HREF_HSTART_SHIFT) | | ||
| 782 | ((win->rect.height & 1) << HREF_VSIZE_SHIFT) | | ||
| 783 | ((win->rect.width & 3) << HREF_HSIZE_SHIFT)); | ||
| 784 | if (ret < 0) | ||
| 785 | goto ov772x_set_fmt_error; | ||
| 786 | ret = ov772x_write(client, EXHCH, | ||
| 787 | ((win->rect.height & 1) << EXHCH_VSIZE_SHIFT) | | ||
| 788 | ((win->rect.width & 3) << EXHCH_HSIZE_SHIFT)); | ||
| 789 | if (ret < 0) | ||
| 790 | goto ov772x_set_fmt_error; | ||
| 791 | |||
| 792 | /* | ||
| 793 | * set DSP_CTRL3 | ||
| 794 | */ | ||
| 795 | val = cfmt->dsp3; | ||
| 796 | if (val) { | ||
| 797 | ret = ov772x_mask_set(client, | ||
| 798 | DSP_CTRL3, UV_MASK, val); | ||
| 799 | if (ret < 0) | ||
| 800 | goto ov772x_set_fmt_error; | ||
| 801 | } | ||
| 802 | |||
| 803 | /* DSP_CTRL4: AEC reference point and DSP output format. */ | ||
| 804 | if (cfmt->dsp4) { | ||
| 805 | ret = ov772x_write(client, DSP_CTRL4, cfmt->dsp4); | ||
| 806 | if (ret < 0) | ||
| 807 | goto ov772x_set_fmt_error; | ||
| 808 | } | ||
| 809 | |||
| 810 | /* | ||
| 811 | * set COM3 | ||
| 812 | */ | ||
| 813 | val = cfmt->com3; | ||
| 814 | if (priv->info->flags & OV772X_FLAG_VFLIP) | ||
| 815 | val |= VFLIP_IMG; | ||
| 816 | if (priv->info->flags & OV772X_FLAG_HFLIP) | ||
| 817 | val |= HFLIP_IMG; | ||
| 818 | if (priv->flag_vflip) | ||
| 819 | val ^= VFLIP_IMG; | ||
| 820 | if (priv->flag_hflip) | ||
| 821 | val ^= HFLIP_IMG; | ||
| 822 | |||
| 823 | ret = ov772x_mask_set(client, | ||
| 824 | COM3, SWAP_MASK | IMG_MASK, val); | ||
| 825 | if (ret < 0) | ||
| 826 | goto ov772x_set_fmt_error; | ||
| 827 | |||
| 828 | /* COM7: Sensor resolution and output format control. */ | ||
| 829 | ret = ov772x_write(client, COM7, win->com7_bit | cfmt->com7); | ||
| 830 | if (ret < 0) | ||
| 831 | goto ov772x_set_fmt_error; | ||
| 832 | |||
| 833 | /* | ||
| 834 | * set COM8 | ||
| 835 | */ | ||
| 836 | if (priv->band_filter) { | ||
| 837 | ret = ov772x_mask_set(client, COM8, BNDF_ON_OFF, BNDF_ON_OFF); | ||
| 838 | if (!ret) | ||
| 839 | ret = ov772x_mask_set(client, BDBASE, | ||
| 840 | 0xff, 256 - priv->band_filter); | ||
| 841 | if (ret < 0) | ||
| 842 | goto ov772x_set_fmt_error; | ||
| 843 | } | ||
| 844 | |||
| 845 | return ret; | ||
| 846 | |||
| 847 | ov772x_set_fmt_error: | ||
| 848 | |||
| 849 | ov772x_reset(client); | ||
| 850 | |||
| 851 | return ret; | ||
| 852 | } | ||
| 853 | |||
| 854 | static int ov772x_get_selection(struct v4l2_subdev *sd, | ||
| 855 | struct v4l2_subdev_pad_config *cfg, | ||
| 856 | struct v4l2_subdev_selection *sel) | ||
| 857 | { | ||
| 858 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 859 | return -EINVAL; | ||
| 860 | |||
| 861 | sel->r.left = 0; | ||
| 862 | sel->r.top = 0; | ||
| 863 | switch (sel->target) { | ||
| 864 | case V4L2_SEL_TGT_CROP_BOUNDS: | ||
| 865 | sel->r.width = OV772X_MAX_WIDTH; | ||
| 866 | sel->r.height = OV772X_MAX_HEIGHT; | ||
| 867 | return 0; | ||
| 868 | case V4L2_SEL_TGT_CROP: | ||
| 869 | sel->r.width = VGA_WIDTH; | ||
| 870 | sel->r.height = VGA_HEIGHT; | ||
| 871 | return 0; | ||
| 872 | default: | ||
| 873 | return -EINVAL; | ||
| 874 | } | ||
| 875 | } | ||
| 876 | |||
| 877 | static int ov772x_get_fmt(struct v4l2_subdev *sd, | ||
| 878 | struct v4l2_subdev_pad_config *cfg, | ||
| 879 | struct v4l2_subdev_format *format) | ||
| 880 | { | ||
| 881 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 882 | struct ov772x_priv *priv = to_ov772x(sd); | ||
| 883 | |||
| 884 | if (format->pad) | ||
| 885 | return -EINVAL; | ||
| 886 | |||
| 887 | mf->width = priv->win->rect.width; | ||
| 888 | mf->height = priv->win->rect.height; | ||
| 889 | mf->code = priv->cfmt->code; | ||
| 890 | mf->colorspace = priv->cfmt->colorspace; | ||
| 891 | mf->field = V4L2_FIELD_NONE; | ||
| 892 | |||
| 893 | return 0; | ||
| 894 | } | ||
| 895 | |||
| 896 | static int ov772x_set_fmt(struct v4l2_subdev *sd, | ||
| 897 | struct v4l2_subdev_pad_config *cfg, | ||
| 898 | struct v4l2_subdev_format *format) | ||
| 899 | { | ||
| 900 | struct ov772x_priv *priv = to_ov772x(sd); | ||
| 901 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 902 | const struct ov772x_color_format *cfmt; | ||
| 903 | const struct ov772x_win_size *win; | ||
| 904 | int ret; | ||
| 905 | |||
| 906 | if (format->pad) | ||
| 907 | return -EINVAL; | ||
| 908 | |||
| 909 | ov772x_select_params(mf, &cfmt, &win); | ||
| 910 | |||
| 911 | mf->code = cfmt->code; | ||
| 912 | mf->width = win->rect.width; | ||
| 913 | mf->height = win->rect.height; | ||
| 914 | mf->field = V4L2_FIELD_NONE; | ||
| 915 | mf->colorspace = cfmt->colorspace; | ||
| 916 | |||
| 917 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | ||
| 918 | cfg->try_fmt = *mf; | ||
| 919 | return 0; | ||
| 920 | } | ||
| 921 | |||
| 922 | ret = ov772x_set_params(priv, cfmt, win); | ||
| 923 | if (ret < 0) | ||
| 924 | return ret; | ||
| 925 | |||
| 926 | priv->win = win; | ||
| 927 | priv->cfmt = cfmt; | ||
| 928 | return 0; | ||
| 929 | } | ||
| 930 | |||
| 931 | static int ov772x_video_probe(struct ov772x_priv *priv) | ||
| 932 | { | ||
| 933 | struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev); | ||
| 934 | u8 pid, ver; | ||
| 935 | const char *devname; | ||
| 936 | int ret; | ||
| 937 | |||
| 938 | ret = ov772x_s_power(&priv->subdev, 1); | ||
| 939 | if (ret < 0) | ||
| 940 | return ret; | ||
| 941 | |||
| 942 | /* | ||
| 943 | * check and show product ID and manufacturer ID | ||
| 944 | */ | ||
| 945 | pid = ov772x_read(client, PID); | ||
| 946 | ver = ov772x_read(client, VER); | ||
| 947 | |||
| 948 | switch (VERSION(pid, ver)) { | ||
| 949 | case OV7720: | ||
| 950 | devname = "ov7720"; | ||
| 951 | break; | ||
| 952 | case OV7725: | ||
| 953 | devname = "ov7725"; | ||
| 954 | break; | ||
| 955 | default: | ||
| 956 | dev_err(&client->dev, | ||
| 957 | "Product ID error %x:%x\n", pid, ver); | ||
| 958 | ret = -ENODEV; | ||
| 959 | goto done; | ||
| 960 | } | ||
| 961 | |||
| 962 | dev_info(&client->dev, | ||
| 963 | "%s Product ID %0x:%0x Manufacturer ID %x:%x\n", | ||
| 964 | devname, | ||
| 965 | pid, | ||
| 966 | ver, | ||
| 967 | ov772x_read(client, MIDH), | ||
| 968 | ov772x_read(client, MIDL)); | ||
| 969 | ret = v4l2_ctrl_handler_setup(&priv->hdl); | ||
| 970 | |||
| 971 | done: | ||
| 972 | ov772x_s_power(&priv->subdev, 0); | ||
| 973 | return ret; | ||
| 974 | } | ||
| 975 | |||
| 976 | static const struct v4l2_ctrl_ops ov772x_ctrl_ops = { | ||
| 977 | .s_ctrl = ov772x_s_ctrl, | ||
| 978 | }; | ||
| 979 | |||
| 980 | static const struct v4l2_subdev_core_ops ov772x_subdev_core_ops = { | ||
| 981 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 982 | .g_register = ov772x_g_register, | ||
| 983 | .s_register = ov772x_s_register, | ||
| 984 | #endif | ||
| 985 | .s_power = ov772x_s_power, | ||
| 986 | }; | ||
| 987 | |||
| 988 | static int ov772x_enum_mbus_code(struct v4l2_subdev *sd, | ||
| 989 | struct v4l2_subdev_pad_config *cfg, | ||
| 990 | struct v4l2_subdev_mbus_code_enum *code) | ||
| 991 | { | ||
| 992 | if (code->pad || code->index >= ARRAY_SIZE(ov772x_cfmts)) | ||
| 993 | return -EINVAL; | ||
| 994 | |||
| 995 | code->code = ov772x_cfmts[code->index].code; | ||
| 996 | return 0; | ||
| 997 | } | ||
| 998 | |||
| 999 | static int ov772x_g_mbus_config(struct v4l2_subdev *sd, | ||
| 1000 | struct v4l2_mbus_config *cfg) | ||
| 1001 | { | ||
| 1002 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1003 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1004 | |||
| 1005 | cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | | ||
| 1006 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH | | ||
| 1007 | V4L2_MBUS_DATA_ACTIVE_HIGH; | ||
| 1008 | cfg->type = V4L2_MBUS_PARALLEL; | ||
| 1009 | cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); | ||
| 1010 | |||
| 1011 | return 0; | ||
| 1012 | } | ||
| 1013 | |||
| 1014 | static const struct v4l2_subdev_video_ops ov772x_subdev_video_ops = { | ||
| 1015 | .s_stream = ov772x_s_stream, | ||
| 1016 | .g_mbus_config = ov772x_g_mbus_config, | ||
| 1017 | }; | ||
| 1018 | |||
| 1019 | static const struct v4l2_subdev_pad_ops ov772x_subdev_pad_ops = { | ||
| 1020 | .enum_mbus_code = ov772x_enum_mbus_code, | ||
| 1021 | .get_selection = ov772x_get_selection, | ||
| 1022 | .get_fmt = ov772x_get_fmt, | ||
| 1023 | .set_fmt = ov772x_set_fmt, | ||
| 1024 | }; | ||
| 1025 | |||
| 1026 | static const struct v4l2_subdev_ops ov772x_subdev_ops = { | ||
| 1027 | .core = &ov772x_subdev_core_ops, | ||
| 1028 | .video = &ov772x_subdev_video_ops, | ||
| 1029 | .pad = &ov772x_subdev_pad_ops, | ||
| 1030 | }; | ||
| 1031 | |||
| 1032 | /* | ||
| 1033 | * i2c_driver function | ||
| 1034 | */ | ||
| 1035 | |||
| 1036 | static int ov772x_probe(struct i2c_client *client, | ||
| 1037 | const struct i2c_device_id *did) | ||
| 1038 | { | ||
| 1039 | struct ov772x_priv *priv; | ||
| 1040 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1041 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | ||
| 1042 | int ret; | ||
| 1043 | |||
| 1044 | if (!ssdd || !ssdd->drv_priv) { | ||
| 1045 | dev_err(&client->dev, "OV772X: missing platform data!\n"); | ||
| 1046 | return -EINVAL; | ||
| 1047 | } | ||
| 1048 | |||
| 1049 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | | ||
| 1050 | I2C_FUNC_PROTOCOL_MANGLING)) { | ||
| 1051 | dev_err(&adapter->dev, | ||
| 1052 | "I2C-Adapter doesn't support SMBUS_BYTE_DATA or PROTOCOL_MANGLING\n"); | ||
| 1053 | return -EIO; | ||
| 1054 | } | ||
| 1055 | client->flags |= I2C_CLIENT_SCCB; | ||
| 1056 | |||
| 1057 | priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); | ||
| 1058 | if (!priv) | ||
| 1059 | return -ENOMEM; | ||
| 1060 | |||
| 1061 | priv->info = ssdd->drv_priv; | ||
| 1062 | |||
| 1063 | v4l2_i2c_subdev_init(&priv->subdev, client, &ov772x_subdev_ops); | ||
| 1064 | v4l2_ctrl_handler_init(&priv->hdl, 3); | ||
| 1065 | v4l2_ctrl_new_std(&priv->hdl, &ov772x_ctrl_ops, | ||
| 1066 | V4L2_CID_VFLIP, 0, 1, 1, 0); | ||
| 1067 | v4l2_ctrl_new_std(&priv->hdl, &ov772x_ctrl_ops, | ||
| 1068 | V4L2_CID_HFLIP, 0, 1, 1, 0); | ||
| 1069 | v4l2_ctrl_new_std(&priv->hdl, &ov772x_ctrl_ops, | ||
| 1070 | V4L2_CID_BAND_STOP_FILTER, 0, 256, 1, 0); | ||
| 1071 | priv->subdev.ctrl_handler = &priv->hdl; | ||
| 1072 | if (priv->hdl.error) | ||
| 1073 | return priv->hdl.error; | ||
| 1074 | |||
| 1075 | priv->clk = v4l2_clk_get(&client->dev, "mclk"); | ||
| 1076 | if (IS_ERR(priv->clk)) { | ||
| 1077 | ret = PTR_ERR(priv->clk); | ||
| 1078 | goto eclkget; | ||
| 1079 | } | ||
| 1080 | |||
| 1081 | ret = ov772x_video_probe(priv); | ||
| 1082 | if (ret < 0) { | ||
| 1083 | v4l2_clk_put(priv->clk); | ||
| 1084 | eclkget: | ||
| 1085 | v4l2_ctrl_handler_free(&priv->hdl); | ||
| 1086 | } else { | ||
| 1087 | priv->cfmt = &ov772x_cfmts[0]; | ||
| 1088 | priv->win = &ov772x_win_sizes[0]; | ||
| 1089 | } | ||
| 1090 | |||
| 1091 | return ret; | ||
| 1092 | } | ||
| 1093 | |||
| 1094 | static int ov772x_remove(struct i2c_client *client) | ||
| 1095 | { | ||
| 1096 | struct ov772x_priv *priv = to_ov772x(i2c_get_clientdata(client)); | ||
| 1097 | |||
| 1098 | v4l2_clk_put(priv->clk); | ||
| 1099 | v4l2_device_unregister_subdev(&priv->subdev); | ||
| 1100 | v4l2_ctrl_handler_free(&priv->hdl); | ||
| 1101 | return 0; | ||
| 1102 | } | ||
| 1103 | |||
| 1104 | static const struct i2c_device_id ov772x_id[] = { | ||
| 1105 | { "ov772x", 0 }, | ||
| 1106 | { } | ||
| 1107 | }; | ||
| 1108 | MODULE_DEVICE_TABLE(i2c, ov772x_id); | ||
| 1109 | |||
| 1110 | static struct i2c_driver ov772x_i2c_driver = { | ||
| 1111 | .driver = { | ||
| 1112 | .name = "ov772x", | ||
| 1113 | }, | ||
| 1114 | .probe = ov772x_probe, | ||
| 1115 | .remove = ov772x_remove, | ||
| 1116 | .id_table = ov772x_id, | ||
| 1117 | }; | ||
| 1118 | |||
| 1119 | module_i2c_driver(ov772x_i2c_driver); | ||
| 1120 | |||
| 1121 | MODULE_DESCRIPTION("SoC Camera driver for ov772x"); | ||
| 1122 | MODULE_AUTHOR("Kuninori Morimoto"); | ||
| 1123 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/media/i2c/soc_camera/soc_rj54n1cb0c.c b/drivers/media/i2c/soc_camera/soc_rj54n1cb0c.c deleted file mode 100644 index f0cb49a6167b..000000000000 --- a/drivers/media/i2c/soc_camera/soc_rj54n1cb0c.c +++ /dev/null | |||
| @@ -1,1415 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/delay.h> | ||
| 12 | #include <linux/i2c.h> | ||
| 13 | #include <linux/slab.h> | ||
| 14 | #include <linux/v4l2-mediabus.h> | ||
| 15 | #include <linux/videodev2.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | |||
| 18 | #include <media/i2c/rj54n1cb0c.h> | ||
| 19 | #include <media/soc_camera.h> | ||
| 20 | #include <media/v4l2-clk.h> | ||
| 21 | #include <media/v4l2-subdev.h> | ||
| 22 | #include <media/v4l2-ctrls.h> | ||
| 23 | |||
| 24 | #define RJ54N1_DEV_CODE 0x0400 | ||
| 25 | #define RJ54N1_DEV_CODE2 0x0401 | ||
| 26 | #define RJ54N1_OUT_SEL 0x0403 | ||
| 27 | #define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404 | ||
| 28 | #define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405 | ||
| 29 | #define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406 | ||
| 30 | #define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407 | ||
| 31 | #define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408 | ||
| 32 | #define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409 | ||
| 33 | #define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a | ||
| 34 | #define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b | ||
| 35 | #define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c | ||
| 36 | #define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d | ||
| 37 | #define RJ54N1_RESIZE_N 0x040e | ||
| 38 | #define RJ54N1_RESIZE_N_STEP 0x040f | ||
| 39 | #define RJ54N1_RESIZE_STEP 0x0410 | ||
| 40 | #define RJ54N1_RESIZE_HOLD_H 0x0411 | ||
| 41 | #define RJ54N1_RESIZE_HOLD_L 0x0412 | ||
| 42 | #define RJ54N1_H_OBEN_OFS 0x0413 | ||
| 43 | #define RJ54N1_V_OBEN_OFS 0x0414 | ||
| 44 | #define RJ54N1_RESIZE_CONTROL 0x0415 | ||
| 45 | #define RJ54N1_STILL_CONTROL 0x0417 | ||
| 46 | #define RJ54N1_INC_USE_SEL_H 0x0425 | ||
| 47 | #define RJ54N1_INC_USE_SEL_L 0x0426 | ||
| 48 | #define RJ54N1_MIRROR_STILL_MODE 0x0427 | ||
| 49 | #define RJ54N1_INIT_START 0x0428 | ||
| 50 | #define RJ54N1_SCALE_1_2_LEV 0x0429 | ||
| 51 | #define RJ54N1_SCALE_4_LEV 0x042a | ||
| 52 | #define RJ54N1_Y_GAIN 0x04d8 | ||
| 53 | #define RJ54N1_APT_GAIN_UP 0x04fa | ||
| 54 | #define RJ54N1_RA_SEL_UL 0x0530 | ||
| 55 | #define RJ54N1_BYTE_SWAP 0x0531 | ||
| 56 | #define RJ54N1_OUT_SIGPO 0x053b | ||
| 57 | #define RJ54N1_WB_SEL_WEIGHT_I 0x054e | ||
| 58 | #define RJ54N1_BIT8_WB 0x0569 | ||
| 59 | #define RJ54N1_HCAPS_WB 0x056a | ||
| 60 | #define RJ54N1_VCAPS_WB 0x056b | ||
| 61 | #define RJ54N1_HCAPE_WB 0x056c | ||
| 62 | #define RJ54N1_VCAPE_WB 0x056d | ||
| 63 | #define RJ54N1_EXPOSURE_CONTROL 0x058c | ||
| 64 | #define RJ54N1_FRAME_LENGTH_S_H 0x0595 | ||
| 65 | #define RJ54N1_FRAME_LENGTH_S_L 0x0596 | ||
| 66 | #define RJ54N1_FRAME_LENGTH_P_H 0x0597 | ||
| 67 | #define RJ54N1_FRAME_LENGTH_P_L 0x0598 | ||
| 68 | #define RJ54N1_PEAK_H 0x05b7 | ||
| 69 | #define RJ54N1_PEAK_50 0x05b8 | ||
| 70 | #define RJ54N1_PEAK_60 0x05b9 | ||
| 71 | #define RJ54N1_PEAK_DIFF 0x05ba | ||
| 72 | #define RJ54N1_IOC 0x05ef | ||
| 73 | #define RJ54N1_TG_BYPASS 0x0700 | ||
| 74 | #define RJ54N1_PLL_L 0x0701 | ||
| 75 | #define RJ54N1_PLL_N 0x0702 | ||
| 76 | #define RJ54N1_PLL_EN 0x0704 | ||
| 77 | #define RJ54N1_RATIO_TG 0x0706 | ||
| 78 | #define RJ54N1_RATIO_T 0x0707 | ||
| 79 | #define RJ54N1_RATIO_R 0x0708 | ||
| 80 | #define RJ54N1_RAMP_TGCLK_EN 0x0709 | ||
| 81 | #define RJ54N1_OCLK_DSP 0x0710 | ||
| 82 | #define RJ54N1_RATIO_OP 0x0711 | ||
| 83 | #define RJ54N1_RATIO_O 0x0712 | ||
| 84 | #define RJ54N1_OCLK_SEL_EN 0x0713 | ||
| 85 | #define RJ54N1_CLK_RST 0x0717 | ||
| 86 | #define RJ54N1_RESET_STANDBY 0x0718 | ||
| 87 | #define RJ54N1_FWFLG 0x07fe | ||
| 88 | |||
| 89 | #define E_EXCLK (1 << 7) | ||
| 90 | #define SOFT_STDBY (1 << 4) | ||
| 91 | #define SEN_RSTX (1 << 2) | ||
| 92 | #define TG_RSTX (1 << 1) | ||
| 93 | #define DSP_RSTX (1 << 0) | ||
| 94 | |||
| 95 | #define RESIZE_HOLD_SEL (1 << 2) | ||
| 96 | #define RESIZE_GO (1 << 1) | ||
| 97 | |||
| 98 | /* | ||
| 99 | * When cropping, the camera automatically centers the cropped region, there | ||
| 100 | * doesn't seem to be a way to specify an explicit location of the rectangle. | ||
| 101 | */ | ||
| 102 | #define RJ54N1_COLUMN_SKIP 0 | ||
| 103 | #define RJ54N1_ROW_SKIP 0 | ||
| 104 | #define RJ54N1_MAX_WIDTH 1600 | ||
| 105 | #define RJ54N1_MAX_HEIGHT 1200 | ||
| 106 | |||
| 107 | #define PLL_L 2 | ||
| 108 | #define PLL_N 0x31 | ||
| 109 | |||
| 110 | /* I2C addresses: 0x50, 0x51, 0x60, 0x61 */ | ||
| 111 | |||
| 112 | /* RJ54N1CB0C has only one fixed colorspace per pixelcode */ | ||
| 113 | struct rj54n1_datafmt { | ||
| 114 | u32 code; | ||
| 115 | enum v4l2_colorspace colorspace; | ||
| 116 | }; | ||
| 117 | |||
| 118 | /* Find a data format by a pixel code in an array */ | ||
| 119 | static const struct rj54n1_datafmt *rj54n1_find_datafmt( | ||
| 120 | u32 code, const struct rj54n1_datafmt *fmt, | ||
| 121 | int n) | ||
| 122 | { | ||
| 123 | int i; | ||
| 124 | for (i = 0; i < n; i++) | ||
| 125 | if (fmt[i].code == code) | ||
| 126 | return fmt + i; | ||
| 127 | |||
| 128 | return NULL; | ||
| 129 | } | ||
| 130 | |||
| 131 | static const struct rj54n1_datafmt rj54n1_colour_fmts[] = { | ||
| 132 | {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG}, | ||
| 133 | {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG}, | ||
| 134 | {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, | ||
| 135 | {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, | ||
| 136 | {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, | ||
| 137 | {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB}, | ||
| 138 | {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, | ||
| 139 | {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB}, | ||
| 140 | {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB}, | ||
| 141 | }; | ||
| 142 | |||
| 143 | struct rj54n1_clock_div { | ||
| 144 | u8 ratio_tg; /* can be 0 or an odd number */ | ||
| 145 | u8 ratio_t; | ||
| 146 | u8 ratio_r; | ||
| 147 | u8 ratio_op; | ||
| 148 | u8 ratio_o; | ||
| 149 | }; | ||
| 150 | |||
| 151 | struct rj54n1 { | ||
| 152 | struct v4l2_subdev subdev; | ||
| 153 | struct v4l2_ctrl_handler hdl; | ||
| 154 | struct v4l2_clk *clk; | ||
| 155 | struct rj54n1_clock_div clk_div; | ||
| 156 | const struct rj54n1_datafmt *fmt; | ||
| 157 | struct v4l2_rect rect; /* Sensor window */ | ||
| 158 | unsigned int tgclk_mhz; | ||
| 159 | bool auto_wb; | ||
| 160 | unsigned short width; /* Output window */ | ||
| 161 | unsigned short height; | ||
| 162 | unsigned short resize; /* Sensor * 1024 / resize = Output */ | ||
| 163 | unsigned short scale; | ||
| 164 | u8 bank; | ||
| 165 | }; | ||
| 166 | |||
| 167 | struct rj54n1_reg_val { | ||
| 168 | u16 reg; | ||
| 169 | u8 val; | ||
| 170 | }; | ||
| 171 | |||
| 172 | static const struct rj54n1_reg_val bank_4[] = { | ||
| 173 | {0x417, 0}, | ||
| 174 | {0x42c, 0}, | ||
| 175 | {0x42d, 0xf0}, | ||
| 176 | {0x42e, 0}, | ||
| 177 | {0x42f, 0x50}, | ||
| 178 | {0x430, 0xf5}, | ||
| 179 | {0x431, 0x16}, | ||
| 180 | {0x432, 0x20}, | ||
| 181 | {0x433, 0}, | ||
| 182 | {0x434, 0xc8}, | ||
| 183 | {0x43c, 8}, | ||
| 184 | {0x43e, 0x90}, | ||
| 185 | {0x445, 0x83}, | ||
| 186 | {0x4ba, 0x58}, | ||
| 187 | {0x4bb, 4}, | ||
| 188 | {0x4bc, 0x20}, | ||
| 189 | {0x4db, 4}, | ||
| 190 | {0x4fe, 2}, | ||
| 191 | }; | ||
| 192 | |||
| 193 | static const struct rj54n1_reg_val bank_5[] = { | ||
| 194 | {0x514, 0}, | ||
| 195 | {0x516, 0}, | ||
| 196 | {0x518, 0}, | ||
| 197 | {0x51a, 0}, | ||
| 198 | {0x51d, 0xff}, | ||
| 199 | {0x56f, 0x28}, | ||
| 200 | {0x575, 0x40}, | ||
| 201 | {0x5bc, 0x48}, | ||
| 202 | {0x5c1, 6}, | ||
| 203 | {0x5e5, 0x11}, | ||
| 204 | {0x5e6, 0x43}, | ||
| 205 | {0x5e7, 0x33}, | ||
| 206 | {0x5e8, 0x21}, | ||
| 207 | {0x5e9, 0x30}, | ||
| 208 | {0x5ea, 0x0}, | ||
| 209 | {0x5eb, 0xa5}, | ||
| 210 | {0x5ec, 0xff}, | ||
| 211 | {0x5fe, 2}, | ||
| 212 | }; | ||
| 213 | |||
| 214 | static const struct rj54n1_reg_val bank_7[] = { | ||
| 215 | {0x70a, 0}, | ||
| 216 | {0x714, 0xff}, | ||
| 217 | {0x715, 0xff}, | ||
| 218 | {0x716, 0x1f}, | ||
| 219 | {0x7FE, 2}, | ||
| 220 | }; | ||
| 221 | |||
| 222 | static const struct rj54n1_reg_val bank_8[] = { | ||
| 223 | {0x800, 0x00}, | ||
| 224 | {0x801, 0x01}, | ||
| 225 | {0x802, 0x61}, | ||
| 226 | {0x805, 0x00}, | ||
| 227 | {0x806, 0x00}, | ||
| 228 | {0x807, 0x00}, | ||
| 229 | {0x808, 0x00}, | ||
| 230 | {0x809, 0x01}, | ||
| 231 | {0x80A, 0x61}, | ||
| 232 | {0x80B, 0x00}, | ||
| 233 | {0x80C, 0x01}, | ||
| 234 | {0x80D, 0x00}, | ||
| 235 | {0x80E, 0x00}, | ||
| 236 | {0x80F, 0x00}, | ||
| 237 | {0x810, 0x00}, | ||
| 238 | {0x811, 0x01}, | ||
| 239 | {0x812, 0x61}, | ||
| 240 | {0x813, 0x00}, | ||
| 241 | {0x814, 0x11}, | ||
| 242 | {0x815, 0x00}, | ||
| 243 | {0x816, 0x41}, | ||
| 244 | {0x817, 0x00}, | ||
| 245 | {0x818, 0x51}, | ||
| 246 | {0x819, 0x01}, | ||
| 247 | {0x81A, 0x1F}, | ||
| 248 | {0x81B, 0x00}, | ||
| 249 | {0x81C, 0x01}, | ||
| 250 | {0x81D, 0x00}, | ||
| 251 | {0x81E, 0x11}, | ||
| 252 | {0x81F, 0x00}, | ||
| 253 | {0x820, 0x41}, | ||
| 254 | {0x821, 0x00}, | ||
| 255 | {0x822, 0x51}, | ||
| 256 | {0x823, 0x00}, | ||
| 257 | {0x824, 0x00}, | ||
| 258 | {0x825, 0x00}, | ||
| 259 | {0x826, 0x47}, | ||
| 260 | {0x827, 0x01}, | ||
| 261 | {0x828, 0x4F}, | ||
| 262 | {0x829, 0x00}, | ||
| 263 | {0x82A, 0x00}, | ||
| 264 | {0x82B, 0x00}, | ||
| 265 | {0x82C, 0x30}, | ||
| 266 | {0x82D, 0x00}, | ||
| 267 | {0x82E, 0x40}, | ||
| 268 | {0x82F, 0x00}, | ||
| 269 | {0x830, 0xB3}, | ||
| 270 | {0x831, 0x00}, | ||
| 271 | {0x832, 0xE3}, | ||
| 272 | {0x833, 0x00}, | ||
| 273 | {0x834, 0x00}, | ||
| 274 | {0x835, 0x00}, | ||
| 275 | {0x836, 0x00}, | ||
| 276 | {0x837, 0x00}, | ||
| 277 | {0x838, 0x00}, | ||
| 278 | {0x839, 0x01}, | ||
| 279 | {0x83A, 0x61}, | ||
| 280 | {0x83B, 0x00}, | ||
| 281 | {0x83C, 0x01}, | ||
| 282 | {0x83D, 0x00}, | ||
| 283 | {0x83E, 0x00}, | ||
| 284 | {0x83F, 0x00}, | ||
| 285 | {0x840, 0x00}, | ||
| 286 | {0x841, 0x01}, | ||
| 287 | {0x842, 0x61}, | ||
| 288 | {0x843, 0x00}, | ||
| 289 | {0x844, 0x1D}, | ||
| 290 | {0x845, 0x00}, | ||
| 291 | {0x846, 0x00}, | ||
| 292 | {0x847, 0x00}, | ||
| 293 | {0x848, 0x00}, | ||
| 294 | {0x849, 0x01}, | ||
| 295 | {0x84A, 0x1F}, | ||
| 296 | {0x84B, 0x00}, | ||
| 297 | {0x84C, 0x05}, | ||
| 298 | {0x84D, 0x00}, | ||
| 299 | {0x84E, 0x19}, | ||
| 300 | {0x84F, 0x01}, | ||
| 301 | {0x850, 0x21}, | ||
| 302 | {0x851, 0x01}, | ||
| 303 | {0x852, 0x5D}, | ||
| 304 | {0x853, 0x00}, | ||
| 305 | {0x854, 0x00}, | ||
| 306 | {0x855, 0x00}, | ||
| 307 | {0x856, 0x19}, | ||
| 308 | {0x857, 0x01}, | ||
| 309 | {0x858, 0x21}, | ||
| 310 | {0x859, 0x00}, | ||
| 311 | {0x85A, 0x00}, | ||
| 312 | {0x85B, 0x00}, | ||
| 313 | {0x85C, 0x00}, | ||
| 314 | {0x85D, 0x00}, | ||
| 315 | {0x85E, 0x00}, | ||
| 316 | {0x85F, 0x00}, | ||
| 317 | {0x860, 0xB3}, | ||
| 318 | {0x861, 0x00}, | ||
| 319 | {0x862, 0xE3}, | ||
| 320 | {0x863, 0x00}, | ||
| 321 | {0x864, 0x00}, | ||
| 322 | {0x865, 0x00}, | ||
| 323 | {0x866, 0x00}, | ||
| 324 | {0x867, 0x00}, | ||
| 325 | {0x868, 0x00}, | ||
| 326 | {0x869, 0xE2}, | ||
| 327 | {0x86A, 0x00}, | ||
| 328 | {0x86B, 0x01}, | ||
| 329 | {0x86C, 0x06}, | ||
| 330 | {0x86D, 0x00}, | ||
| 331 | {0x86E, 0x00}, | ||
| 332 | {0x86F, 0x00}, | ||
| 333 | {0x870, 0x60}, | ||
| 334 | {0x871, 0x8C}, | ||
| 335 | {0x872, 0x10}, | ||
| 336 | {0x873, 0x00}, | ||
| 337 | {0x874, 0xE0}, | ||
| 338 | {0x875, 0x00}, | ||
| 339 | {0x876, 0x27}, | ||
| 340 | {0x877, 0x01}, | ||
| 341 | {0x878, 0x00}, | ||
| 342 | {0x879, 0x00}, | ||
| 343 | {0x87A, 0x00}, | ||
| 344 | {0x87B, 0x03}, | ||
| 345 | {0x87C, 0x00}, | ||
| 346 | {0x87D, 0x00}, | ||
| 347 | {0x87E, 0x00}, | ||
| 348 | {0x87F, 0x00}, | ||
| 349 | {0x880, 0x00}, | ||
| 350 | {0x881, 0x00}, | ||
| 351 | {0x882, 0x00}, | ||
| 352 | {0x883, 0x00}, | ||
| 353 | {0x884, 0x00}, | ||
| 354 | {0x885, 0x00}, | ||
| 355 | {0x886, 0xF8}, | ||
| 356 | {0x887, 0x00}, | ||
| 357 | {0x888, 0x03}, | ||
| 358 | {0x889, 0x00}, | ||
| 359 | {0x88A, 0x64}, | ||
| 360 | {0x88B, 0x00}, | ||
| 361 | {0x88C, 0x03}, | ||
| 362 | {0x88D, 0x00}, | ||
| 363 | {0x88E, 0xB1}, | ||
| 364 | {0x88F, 0x00}, | ||
| 365 | {0x890, 0x03}, | ||
| 366 | {0x891, 0x01}, | ||
| 367 | {0x892, 0x1D}, | ||
| 368 | {0x893, 0x00}, | ||
| 369 | {0x894, 0x03}, | ||
| 370 | {0x895, 0x01}, | ||
| 371 | {0x896, 0x4B}, | ||
| 372 | {0x897, 0x00}, | ||
| 373 | {0x898, 0xE5}, | ||
| 374 | {0x899, 0x00}, | ||
| 375 | {0x89A, 0x01}, | ||
| 376 | {0x89B, 0x00}, | ||
| 377 | {0x89C, 0x01}, | ||
| 378 | {0x89D, 0x04}, | ||
| 379 | {0x89E, 0xC8}, | ||
| 380 | {0x89F, 0x00}, | ||
| 381 | {0x8A0, 0x01}, | ||
| 382 | {0x8A1, 0x01}, | ||
| 383 | {0x8A2, 0x61}, | ||
| 384 | {0x8A3, 0x00}, | ||
| 385 | {0x8A4, 0x01}, | ||
| 386 | {0x8A5, 0x00}, | ||
| 387 | {0x8A6, 0x00}, | ||
| 388 | {0x8A7, 0x00}, | ||
| 389 | {0x8A8, 0x00}, | ||
| 390 | {0x8A9, 0x00}, | ||
| 391 | {0x8AA, 0x7F}, | ||
| 392 | {0x8AB, 0x03}, | ||
| 393 | {0x8AC, 0x00}, | ||
| 394 | {0x8AD, 0x00}, | ||
| 395 | {0x8AE, 0x00}, | ||
| 396 | {0x8AF, 0x00}, | ||
| 397 | {0x8B0, 0x00}, | ||
| 398 | {0x8B1, 0x00}, | ||
| 399 | {0x8B6, 0x00}, | ||
| 400 | {0x8B7, 0x01}, | ||
| 401 | {0x8B8, 0x00}, | ||
| 402 | {0x8B9, 0x00}, | ||
| 403 | {0x8BA, 0x02}, | ||
| 404 | {0x8BB, 0x00}, | ||
| 405 | {0x8BC, 0xFF}, | ||
| 406 | {0x8BD, 0x00}, | ||
| 407 | {0x8FE, 2}, | ||
| 408 | }; | ||
| 409 | |||
| 410 | static const struct rj54n1_reg_val bank_10[] = { | ||
| 411 | {0x10bf, 0x69} | ||
| 412 | }; | ||
| 413 | |||
| 414 | /* Clock dividers - these are default register values, divider = register + 1 */ | ||
| 415 | static const struct rj54n1_clock_div clk_div = { | ||
| 416 | .ratio_tg = 3 /* default: 5 */, | ||
| 417 | .ratio_t = 4 /* default: 1 */, | ||
| 418 | .ratio_r = 4 /* default: 0 */, | ||
| 419 | .ratio_op = 1 /* default: 5 */, | ||
| 420 | .ratio_o = 9 /* default: 0 */, | ||
| 421 | }; | ||
| 422 | |||
| 423 | static struct rj54n1 *to_rj54n1(const struct i2c_client *client) | ||
| 424 | { | ||
| 425 | return container_of(i2c_get_clientdata(client), struct rj54n1, subdev); | ||
| 426 | } | ||
| 427 | |||
| 428 | static int reg_read(struct i2c_client *client, const u16 reg) | ||
| 429 | { | ||
| 430 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 431 | int ret; | ||
| 432 | |||
| 433 | /* set bank */ | ||
| 434 | if (rj54n1->bank != reg >> 8) { | ||
| 435 | dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8); | ||
| 436 | ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8); | ||
| 437 | if (ret < 0) | ||
| 438 | return ret; | ||
| 439 | rj54n1->bank = reg >> 8; | ||
| 440 | } | ||
| 441 | return i2c_smbus_read_byte_data(client, reg & 0xff); | ||
| 442 | } | ||
| 443 | |||
| 444 | static int reg_write(struct i2c_client *client, const u16 reg, | ||
| 445 | const u8 data) | ||
| 446 | { | ||
| 447 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 448 | int ret; | ||
| 449 | |||
| 450 | /* set bank */ | ||
| 451 | if (rj54n1->bank != reg >> 8) { | ||
| 452 | dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8); | ||
| 453 | ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8); | ||
| 454 | if (ret < 0) | ||
| 455 | return ret; | ||
| 456 | rj54n1->bank = reg >> 8; | ||
| 457 | } | ||
| 458 | dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data); | ||
| 459 | return i2c_smbus_write_byte_data(client, reg & 0xff, data); | ||
| 460 | } | ||
| 461 | |||
| 462 | static int reg_set(struct i2c_client *client, const u16 reg, | ||
| 463 | const u8 data, const u8 mask) | ||
| 464 | { | ||
| 465 | int ret; | ||
| 466 | |||
| 467 | ret = reg_read(client, reg); | ||
| 468 | if (ret < 0) | ||
| 469 | return ret; | ||
| 470 | return reg_write(client, reg, (ret & ~mask) | (data & mask)); | ||
| 471 | } | ||
| 472 | |||
| 473 | static int reg_write_multiple(struct i2c_client *client, | ||
| 474 | const struct rj54n1_reg_val *rv, const int n) | ||
| 475 | { | ||
| 476 | int i, ret; | ||
| 477 | |||
| 478 | for (i = 0; i < n; i++) { | ||
| 479 | ret = reg_write(client, rv->reg, rv->val); | ||
| 480 | if (ret < 0) | ||
| 481 | return ret; | ||
| 482 | rv++; | ||
| 483 | } | ||
| 484 | |||
| 485 | return 0; | ||
| 486 | } | ||
| 487 | |||
| 488 | static int rj54n1_enum_mbus_code(struct v4l2_subdev *sd, | ||
| 489 | struct v4l2_subdev_pad_config *cfg, | ||
| 490 | struct v4l2_subdev_mbus_code_enum *code) | ||
| 491 | { | ||
| 492 | if (code->pad || code->index >= ARRAY_SIZE(rj54n1_colour_fmts)) | ||
| 493 | return -EINVAL; | ||
| 494 | |||
| 495 | code->code = rj54n1_colour_fmts[code->index].code; | ||
| 496 | return 0; | ||
| 497 | } | ||
| 498 | |||
| 499 | static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 500 | { | ||
| 501 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 502 | |||
| 503 | /* Switch between preview and still shot modes */ | ||
| 504 | return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80); | ||
| 505 | } | ||
| 506 | |||
| 507 | static int rj54n1_set_rect(struct i2c_client *client, | ||
| 508 | u16 reg_x, u16 reg_y, u16 reg_xy, | ||
| 509 | u32 width, u32 height) | ||
| 510 | { | ||
| 511 | int ret; | ||
| 512 | |||
| 513 | ret = reg_write(client, reg_xy, | ||
| 514 | ((width >> 4) & 0x70) | | ||
| 515 | ((height >> 8) & 7)); | ||
| 516 | |||
| 517 | if (!ret) | ||
| 518 | ret = reg_write(client, reg_x, width & 0xff); | ||
| 519 | if (!ret) | ||
| 520 | ret = reg_write(client, reg_y, height & 0xff); | ||
| 521 | |||
| 522 | return ret; | ||
| 523 | } | ||
| 524 | |||
| 525 | /* | ||
| 526 | * Some commands, specifically certain initialisation sequences, require | ||
| 527 | * a commit operation. | ||
| 528 | */ | ||
| 529 | static int rj54n1_commit(struct i2c_client *client) | ||
| 530 | { | ||
| 531 | int ret = reg_write(client, RJ54N1_INIT_START, 1); | ||
| 532 | msleep(10); | ||
| 533 | if (!ret) | ||
| 534 | ret = reg_write(client, RJ54N1_INIT_START, 0); | ||
| 535 | return ret; | ||
| 536 | } | ||
| 537 | |||
| 538 | static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h, | ||
| 539 | s32 *out_w, s32 *out_h); | ||
| 540 | |||
| 541 | static int rj54n1_set_selection(struct v4l2_subdev *sd, | ||
| 542 | struct v4l2_subdev_pad_config *cfg, | ||
| 543 | struct v4l2_subdev_selection *sel) | ||
| 544 | { | ||
| 545 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 546 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 547 | const struct v4l2_rect *rect = &sel->r; | ||
| 548 | int dummy = 0, output_w, output_h, | ||
| 549 | input_w = rect->width, input_h = rect->height; | ||
| 550 | int ret; | ||
| 551 | |||
| 552 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || | ||
| 553 | sel->target != V4L2_SEL_TGT_CROP) | ||
| 554 | return -EINVAL; | ||
| 555 | |||
| 556 | /* arbitrary minimum width and height, edges unimportant */ | ||
| 557 | soc_camera_limit_side(&dummy, &input_w, | ||
| 558 | RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH); | ||
| 559 | |||
| 560 | soc_camera_limit_side(&dummy, &input_h, | ||
| 561 | RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT); | ||
| 562 | |||
| 563 | output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize; | ||
| 564 | output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize; | ||
| 565 | |||
| 566 | dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n", | ||
| 567 | input_w, input_h, rj54n1->resize, output_w, output_h); | ||
| 568 | |||
| 569 | ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h); | ||
| 570 | if (ret < 0) | ||
| 571 | return ret; | ||
| 572 | |||
| 573 | rj54n1->width = output_w; | ||
| 574 | rj54n1->height = output_h; | ||
| 575 | rj54n1->resize = ret; | ||
| 576 | rj54n1->rect.width = input_w; | ||
| 577 | rj54n1->rect.height = input_h; | ||
| 578 | |||
| 579 | return 0; | ||
| 580 | } | ||
| 581 | |||
| 582 | static int rj54n1_get_selection(struct v4l2_subdev *sd, | ||
| 583 | struct v4l2_subdev_pad_config *cfg, | ||
| 584 | struct v4l2_subdev_selection *sel) | ||
| 585 | { | ||
| 586 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 587 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 588 | |||
| 589 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 590 | return -EINVAL; | ||
| 591 | |||
| 592 | switch (sel->target) { | ||
| 593 | case V4L2_SEL_TGT_CROP_BOUNDS: | ||
| 594 | sel->r.left = RJ54N1_COLUMN_SKIP; | ||
| 595 | sel->r.top = RJ54N1_ROW_SKIP; | ||
| 596 | sel->r.width = RJ54N1_MAX_WIDTH; | ||
| 597 | sel->r.height = RJ54N1_MAX_HEIGHT; | ||
| 598 | return 0; | ||
| 599 | case V4L2_SEL_TGT_CROP: | ||
| 600 | sel->r = rj54n1->rect; | ||
| 601 | return 0; | ||
| 602 | default: | ||
| 603 | return -EINVAL; | ||
| 604 | } | ||
| 605 | } | ||
| 606 | |||
| 607 | static int rj54n1_get_fmt(struct v4l2_subdev *sd, | ||
| 608 | struct v4l2_subdev_pad_config *cfg, | ||
| 609 | struct v4l2_subdev_format *format) | ||
| 610 | { | ||
| 611 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 612 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 613 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 614 | |||
| 615 | if (format->pad) | ||
| 616 | return -EINVAL; | ||
| 617 | |||
| 618 | mf->code = rj54n1->fmt->code; | ||
| 619 | mf->colorspace = rj54n1->fmt->colorspace; | ||
| 620 | mf->field = V4L2_FIELD_NONE; | ||
| 621 | mf->width = rj54n1->width; | ||
| 622 | mf->height = rj54n1->height; | ||
| 623 | |||
| 624 | return 0; | ||
| 625 | } | ||
| 626 | |||
| 627 | /* | ||
| 628 | * The actual geometry configuration routine. It scales the input window into | ||
| 629 | * the output one, updates the window sizes and returns an error or the resize | ||
| 630 | * coefficient on success. Note: we only use the "Fixed Scaling" on this camera. | ||
| 631 | */ | ||
| 632 | static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h, | ||
| 633 | s32 *out_w, s32 *out_h) | ||
| 634 | { | ||
| 635 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 636 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 637 | unsigned int skip, resize, input_w = *in_w, input_h = *in_h, | ||
| 638 | output_w = *out_w, output_h = *out_h; | ||
| 639 | u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom; | ||
| 640 | unsigned int peak, peak_50, peak_60; | ||
| 641 | int ret; | ||
| 642 | |||
| 643 | /* | ||
| 644 | * We have a problem with crops, where the window is larger than 512x384 | ||
| 645 | * and output window is larger than a half of the input one. In this | ||
| 646 | * case we have to either reduce the input window to equal or below | ||
| 647 | * 512x384 or the output window to equal or below 1/2 of the input. | ||
| 648 | */ | ||
| 649 | if (output_w > max(512U, input_w / 2)) { | ||
| 650 | if (2 * output_w > RJ54N1_MAX_WIDTH) { | ||
| 651 | input_w = RJ54N1_MAX_WIDTH; | ||
| 652 | output_w = RJ54N1_MAX_WIDTH / 2; | ||
| 653 | } else { | ||
| 654 | input_w = output_w * 2; | ||
| 655 | } | ||
| 656 | |||
| 657 | dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n", | ||
| 658 | input_w, output_w); | ||
| 659 | } | ||
| 660 | |||
| 661 | if (output_h > max(384U, input_h / 2)) { | ||
| 662 | if (2 * output_h > RJ54N1_MAX_HEIGHT) { | ||
| 663 | input_h = RJ54N1_MAX_HEIGHT; | ||
| 664 | output_h = RJ54N1_MAX_HEIGHT / 2; | ||
| 665 | } else { | ||
| 666 | input_h = output_h * 2; | ||
| 667 | } | ||
| 668 | |||
| 669 | dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n", | ||
| 670 | input_h, output_h); | ||
| 671 | } | ||
| 672 | |||
| 673 | /* Idea: use the read mode for snapshots, handle separate geometries */ | ||
| 674 | ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L, | ||
| 675 | RJ54N1_Y_OUTPUT_SIZE_S_L, | ||
| 676 | RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h); | ||
| 677 | if (!ret) | ||
| 678 | ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L, | ||
| 679 | RJ54N1_Y_OUTPUT_SIZE_P_L, | ||
| 680 | RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h); | ||
| 681 | |||
| 682 | if (ret < 0) | ||
| 683 | return ret; | ||
| 684 | |||
| 685 | if (output_w > input_w && output_h > input_h) { | ||
| 686 | input_w = output_w; | ||
| 687 | input_h = output_h; | ||
| 688 | |||
| 689 | resize = 1024; | ||
| 690 | } else { | ||
| 691 | unsigned int resize_x, resize_y; | ||
| 692 | resize_x = (input_w * 1024 + output_w / 2) / output_w; | ||
| 693 | resize_y = (input_h * 1024 + output_h / 2) / output_h; | ||
| 694 | |||
| 695 | /* We want max(resize_x, resize_y), check if it still fits */ | ||
| 696 | if (resize_x > resize_y && | ||
| 697 | (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT) | ||
| 698 | resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) / | ||
| 699 | output_h; | ||
| 700 | else if (resize_y > resize_x && | ||
| 701 | (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH) | ||
| 702 | resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) / | ||
| 703 | output_w; | ||
| 704 | else | ||
| 705 | resize = max(resize_x, resize_y); | ||
| 706 | |||
| 707 | /* Prohibited value ranges */ | ||
| 708 | switch (resize) { | ||
| 709 | case 2040 ... 2047: | ||
| 710 | resize = 2039; | ||
| 711 | break; | ||
| 712 | case 4080 ... 4095: | ||
| 713 | resize = 4079; | ||
| 714 | break; | ||
| 715 | case 8160 ... 8191: | ||
| 716 | resize = 8159; | ||
| 717 | break; | ||
| 718 | case 16320 ... 16384: | ||
| 719 | resize = 16319; | ||
| 720 | } | ||
| 721 | } | ||
| 722 | |||
| 723 | /* Set scaling */ | ||
| 724 | ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff); | ||
| 725 | if (!ret) | ||
| 726 | ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8); | ||
| 727 | |||
| 728 | if (ret < 0) | ||
| 729 | return ret; | ||
| 730 | |||
| 731 | /* | ||
| 732 | * Configure a skipping bitmask. The sensor will select a skipping value | ||
| 733 | * among set bits automatically. This is very unclear in the datasheet | ||
| 734 | * too. I was told, in this register one enables all skipping values, | ||
| 735 | * that are required for a specific resize, and the camera selects | ||
| 736 | * automatically, which ones to use. But it is unclear how to identify, | ||
| 737 | * which cropping values are needed. Secondly, why don't we just set all | ||
| 738 | * bits and let the camera choose? Would it increase processing time and | ||
| 739 | * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to | ||
| 740 | * improve the image quality or stability for larger frames (see comment | ||
| 741 | * above), but I didn't check the framerate. | ||
| 742 | */ | ||
| 743 | skip = min(resize / 1024, 15U); | ||
| 744 | |||
| 745 | inc_sel = 1 << skip; | ||
| 746 | |||
| 747 | if (inc_sel <= 2) | ||
| 748 | inc_sel = 0xc; | ||
| 749 | else if (resize & 1023 && skip < 15) | ||
| 750 | inc_sel |= 1 << (skip + 1); | ||
| 751 | |||
| 752 | ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc); | ||
| 753 | if (!ret) | ||
| 754 | ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8); | ||
| 755 | |||
| 756 | if (!rj54n1->auto_wb) { | ||
| 757 | /* Auto white balance window */ | ||
| 758 | wb_left = output_w / 16; | ||
| 759 | wb_right = (3 * output_w / 4 - 3) / 4; | ||
| 760 | wb_top = output_h / 16; | ||
| 761 | wb_bottom = (3 * output_h / 4 - 3) / 4; | ||
| 762 | wb_bit8 = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) | | ||
| 763 | ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1); | ||
| 764 | |||
| 765 | if (!ret) | ||
| 766 | ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8); | ||
| 767 | if (!ret) | ||
| 768 | ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left); | ||
| 769 | if (!ret) | ||
| 770 | ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top); | ||
| 771 | if (!ret) | ||
| 772 | ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right); | ||
| 773 | if (!ret) | ||
| 774 | ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom); | ||
| 775 | } | ||
| 776 | |||
| 777 | /* Antiflicker */ | ||
| 778 | peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz / | ||
| 779 | 10000; | ||
| 780 | peak_50 = peak / 6; | ||
| 781 | peak_60 = peak / 5; | ||
| 782 | |||
| 783 | if (!ret) | ||
| 784 | ret = reg_write(client, RJ54N1_PEAK_H, | ||
| 785 | ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8)); | ||
| 786 | if (!ret) | ||
| 787 | ret = reg_write(client, RJ54N1_PEAK_50, peak_50); | ||
| 788 | if (!ret) | ||
| 789 | ret = reg_write(client, RJ54N1_PEAK_60, peak_60); | ||
| 790 | if (!ret) | ||
| 791 | ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150); | ||
| 792 | |||
| 793 | /* Start resizing */ | ||
| 794 | if (!ret) | ||
| 795 | ret = reg_write(client, RJ54N1_RESIZE_CONTROL, | ||
| 796 | RESIZE_HOLD_SEL | RESIZE_GO | 1); | ||
| 797 | |||
| 798 | if (ret < 0) | ||
| 799 | return ret; | ||
| 800 | |||
| 801 | /* Constant taken from manufacturer's example */ | ||
| 802 | msleep(230); | ||
| 803 | |||
| 804 | ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1); | ||
| 805 | if (ret < 0) | ||
| 806 | return ret; | ||
| 807 | |||
| 808 | *in_w = (output_w * resize + 512) / 1024; | ||
| 809 | *in_h = (output_h * resize + 512) / 1024; | ||
| 810 | *out_w = output_w; | ||
| 811 | *out_h = output_h; | ||
| 812 | |||
| 813 | dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n", | ||
| 814 | *in_w, *in_h, resize, output_w, output_h, skip); | ||
| 815 | |||
| 816 | return resize; | ||
| 817 | } | ||
| 818 | |||
| 819 | static int rj54n1_set_clock(struct i2c_client *client) | ||
| 820 | { | ||
| 821 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 822 | int ret; | ||
| 823 | |||
| 824 | /* Enable external clock */ | ||
| 825 | ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY); | ||
| 826 | /* Leave stand-by. Note: use this when implementing suspend / resume */ | ||
| 827 | if (!ret) | ||
| 828 | ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK); | ||
| 829 | |||
| 830 | if (!ret) | ||
| 831 | ret = reg_write(client, RJ54N1_PLL_L, PLL_L); | ||
| 832 | if (!ret) | ||
| 833 | ret = reg_write(client, RJ54N1_PLL_N, PLL_N); | ||
| 834 | |||
| 835 | /* TGCLK dividers */ | ||
| 836 | if (!ret) | ||
| 837 | ret = reg_write(client, RJ54N1_RATIO_TG, | ||
| 838 | rj54n1->clk_div.ratio_tg); | ||
| 839 | if (!ret) | ||
| 840 | ret = reg_write(client, RJ54N1_RATIO_T, | ||
| 841 | rj54n1->clk_div.ratio_t); | ||
| 842 | if (!ret) | ||
| 843 | ret = reg_write(client, RJ54N1_RATIO_R, | ||
| 844 | rj54n1->clk_div.ratio_r); | ||
| 845 | |||
| 846 | /* Enable TGCLK & RAMP */ | ||
| 847 | if (!ret) | ||
| 848 | ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3); | ||
| 849 | |||
| 850 | /* Disable clock output */ | ||
| 851 | if (!ret) | ||
| 852 | ret = reg_write(client, RJ54N1_OCLK_DSP, 0); | ||
| 853 | |||
| 854 | /* Set divisors */ | ||
| 855 | if (!ret) | ||
| 856 | ret = reg_write(client, RJ54N1_RATIO_OP, | ||
| 857 | rj54n1->clk_div.ratio_op); | ||
| 858 | if (!ret) | ||
| 859 | ret = reg_write(client, RJ54N1_RATIO_O, | ||
| 860 | rj54n1->clk_div.ratio_o); | ||
| 861 | |||
| 862 | /* Enable OCLK */ | ||
| 863 | if (!ret) | ||
| 864 | ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1); | ||
| 865 | |||
| 866 | /* Use PLL for Timing Generator, write 2 to reserved bits */ | ||
| 867 | if (!ret) | ||
| 868 | ret = reg_write(client, RJ54N1_TG_BYPASS, 2); | ||
| 869 | |||
| 870 | /* Take sensor out of reset */ | ||
| 871 | if (!ret) | ||
| 872 | ret = reg_write(client, RJ54N1_RESET_STANDBY, | ||
| 873 | E_EXCLK | SEN_RSTX); | ||
| 874 | /* Enable PLL */ | ||
| 875 | if (!ret) | ||
| 876 | ret = reg_write(client, RJ54N1_PLL_EN, 1); | ||
| 877 | |||
| 878 | /* Wait for PLL to stabilise */ | ||
| 879 | msleep(10); | ||
| 880 | |||
| 881 | /* Enable clock to frequency divider */ | ||
| 882 | if (!ret) | ||
| 883 | ret = reg_write(client, RJ54N1_CLK_RST, 1); | ||
| 884 | |||
| 885 | if (!ret) | ||
| 886 | ret = reg_read(client, RJ54N1_CLK_RST); | ||
| 887 | if (ret != 1) { | ||
| 888 | dev_err(&client->dev, | ||
| 889 | "Resetting RJ54N1CB0C clock failed: %d!\n", ret); | ||
| 890 | return -EIO; | ||
| 891 | } | ||
| 892 | |||
| 893 | /* Start the PLL */ | ||
| 894 | ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1); | ||
| 895 | |||
| 896 | /* Enable OCLK */ | ||
| 897 | if (!ret) | ||
| 898 | ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1); | ||
| 899 | |||
| 900 | return ret; | ||
| 901 | } | ||
| 902 | |||
| 903 | static int rj54n1_reg_init(struct i2c_client *client) | ||
| 904 | { | ||
| 905 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 906 | int ret = rj54n1_set_clock(client); | ||
| 907 | |||
| 908 | if (!ret) | ||
| 909 | ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7)); | ||
| 910 | if (!ret) | ||
| 911 | ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10)); | ||
| 912 | |||
| 913 | /* Set binning divisors */ | ||
| 914 | if (!ret) | ||
| 915 | ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4)); | ||
| 916 | if (!ret) | ||
| 917 | ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf); | ||
| 918 | |||
| 919 | /* Switch to fixed resize mode */ | ||
| 920 | if (!ret) | ||
| 921 | ret = reg_write(client, RJ54N1_RESIZE_CONTROL, | ||
| 922 | RESIZE_HOLD_SEL | 1); | ||
| 923 | |||
| 924 | /* Set gain */ | ||
| 925 | if (!ret) | ||
| 926 | ret = reg_write(client, RJ54N1_Y_GAIN, 0x84); | ||
| 927 | |||
| 928 | /* | ||
| 929 | * Mirror the image back: default is upside down and left-to-right... | ||
| 930 | * Set manual preview / still shot switching | ||
| 931 | */ | ||
| 932 | if (!ret) | ||
| 933 | ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27); | ||
| 934 | |||
| 935 | if (!ret) | ||
| 936 | ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4)); | ||
| 937 | |||
| 938 | /* Auto exposure area */ | ||
| 939 | if (!ret) | ||
| 940 | ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80); | ||
| 941 | /* Check current auto WB config */ | ||
| 942 | if (!ret) | ||
| 943 | ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I); | ||
| 944 | if (ret >= 0) { | ||
| 945 | rj54n1->auto_wb = ret & 0x80; | ||
| 946 | ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5)); | ||
| 947 | } | ||
| 948 | if (!ret) | ||
| 949 | ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8)); | ||
| 950 | |||
| 951 | if (!ret) | ||
| 952 | ret = reg_write(client, RJ54N1_RESET_STANDBY, | ||
| 953 | E_EXCLK | DSP_RSTX | SEN_RSTX); | ||
| 954 | |||
| 955 | /* Commit init */ | ||
| 956 | if (!ret) | ||
| 957 | ret = rj54n1_commit(client); | ||
| 958 | |||
| 959 | /* Take DSP, TG, sensor out of reset */ | ||
| 960 | if (!ret) | ||
| 961 | ret = reg_write(client, RJ54N1_RESET_STANDBY, | ||
| 962 | E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX); | ||
| 963 | |||
| 964 | /* Start register update? Same register as 0x?FE in many bank_* sets */ | ||
| 965 | if (!ret) | ||
| 966 | ret = reg_write(client, RJ54N1_FWFLG, 2); | ||
| 967 | |||
| 968 | /* Constant taken from manufacturer's example */ | ||
| 969 | msleep(700); | ||
| 970 | |||
| 971 | return ret; | ||
| 972 | } | ||
| 973 | |||
| 974 | static int rj54n1_set_fmt(struct v4l2_subdev *sd, | ||
| 975 | struct v4l2_subdev_pad_config *cfg, | ||
| 976 | struct v4l2_subdev_format *format) | ||
| 977 | { | ||
| 978 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 979 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 980 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 981 | const struct rj54n1_datafmt *fmt; | ||
| 982 | int output_w, output_h, max_w, max_h, | ||
| 983 | input_w = rj54n1->rect.width, input_h = rj54n1->rect.height; | ||
| 984 | int align = mf->code == MEDIA_BUS_FMT_SBGGR10_1X10 || | ||
| 985 | mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE || | ||
| 986 | mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE || | ||
| 987 | mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE || | ||
| 988 | mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE; | ||
| 989 | int ret; | ||
| 990 | |||
| 991 | if (format->pad) | ||
| 992 | return -EINVAL; | ||
| 993 | |||
| 994 | dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n", | ||
| 995 | __func__, mf->code, mf->width, mf->height); | ||
| 996 | |||
| 997 | fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts, | ||
| 998 | ARRAY_SIZE(rj54n1_colour_fmts)); | ||
| 999 | if (!fmt) { | ||
| 1000 | fmt = rj54n1->fmt; | ||
| 1001 | mf->code = fmt->code; | ||
| 1002 | } | ||
| 1003 | |||
| 1004 | mf->field = V4L2_FIELD_NONE; | ||
| 1005 | mf->colorspace = fmt->colorspace; | ||
| 1006 | |||
| 1007 | v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align, | ||
| 1008 | &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0); | ||
| 1009 | |||
| 1010 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | ||
| 1011 | cfg->try_fmt = *mf; | ||
| 1012 | return 0; | ||
| 1013 | } | ||
| 1014 | |||
| 1015 | /* | ||
| 1016 | * Verify if the sensor has just been powered on. TODO: replace this | ||
| 1017 | * with proper PM, when a suitable API is available. | ||
| 1018 | */ | ||
| 1019 | ret = reg_read(client, RJ54N1_RESET_STANDBY); | ||
| 1020 | if (ret < 0) | ||
| 1021 | return ret; | ||
| 1022 | |||
| 1023 | if (!(ret & E_EXCLK)) { | ||
| 1024 | ret = rj54n1_reg_init(client); | ||
| 1025 | if (ret < 0) | ||
| 1026 | return ret; | ||
| 1027 | } | ||
| 1028 | |||
| 1029 | /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */ | ||
| 1030 | switch (mf->code) { | ||
| 1031 | case MEDIA_BUS_FMT_YUYV8_2X8: | ||
| 1032 | ret = reg_write(client, RJ54N1_OUT_SEL, 0); | ||
| 1033 | if (!ret) | ||
| 1034 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | ||
| 1035 | break; | ||
| 1036 | case MEDIA_BUS_FMT_YVYU8_2X8: | ||
| 1037 | ret = reg_write(client, RJ54N1_OUT_SEL, 0); | ||
| 1038 | if (!ret) | ||
| 1039 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | ||
| 1040 | break; | ||
| 1041 | case MEDIA_BUS_FMT_RGB565_2X8_LE: | ||
| 1042 | ret = reg_write(client, RJ54N1_OUT_SEL, 0x11); | ||
| 1043 | if (!ret) | ||
| 1044 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | ||
| 1045 | break; | ||
| 1046 | case MEDIA_BUS_FMT_RGB565_2X8_BE: | ||
| 1047 | ret = reg_write(client, RJ54N1_OUT_SEL, 0x11); | ||
| 1048 | if (!ret) | ||
| 1049 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | ||
| 1050 | break; | ||
| 1051 | case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE: | ||
| 1052 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | ||
| 1053 | if (!ret) | ||
| 1054 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | ||
| 1055 | if (!ret) | ||
| 1056 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 0); | ||
| 1057 | break; | ||
| 1058 | case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE: | ||
| 1059 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | ||
| 1060 | if (!ret) | ||
| 1061 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8); | ||
| 1062 | if (!ret) | ||
| 1063 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 8); | ||
| 1064 | break; | ||
| 1065 | case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE: | ||
| 1066 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | ||
| 1067 | if (!ret) | ||
| 1068 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | ||
| 1069 | if (!ret) | ||
| 1070 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 0); | ||
| 1071 | break; | ||
| 1072 | case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE: | ||
| 1073 | ret = reg_write(client, RJ54N1_OUT_SEL, 4); | ||
| 1074 | if (!ret) | ||
| 1075 | ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8); | ||
| 1076 | if (!ret) | ||
| 1077 | ret = reg_write(client, RJ54N1_RA_SEL_UL, 8); | ||
| 1078 | break; | ||
| 1079 | case MEDIA_BUS_FMT_SBGGR10_1X10: | ||
| 1080 | ret = reg_write(client, RJ54N1_OUT_SEL, 5); | ||
| 1081 | break; | ||
| 1082 | default: | ||
| 1083 | ret = -EINVAL; | ||
| 1084 | } | ||
| 1085 | |||
| 1086 | /* Special case: a raw mode with 10 bits of data per clock tick */ | ||
| 1087 | if (!ret) | ||
| 1088 | ret = reg_set(client, RJ54N1_OCLK_SEL_EN, | ||
| 1089 | (mf->code == MEDIA_BUS_FMT_SBGGR10_1X10) << 1, 2); | ||
| 1090 | |||
| 1091 | if (ret < 0) | ||
| 1092 | return ret; | ||
| 1093 | |||
| 1094 | /* Supported scales 1:1 >= scale > 1:16 */ | ||
| 1095 | max_w = mf->width * (16 * 1024 - 1) / 1024; | ||
| 1096 | if (input_w > max_w) | ||
| 1097 | input_w = max_w; | ||
| 1098 | max_h = mf->height * (16 * 1024 - 1) / 1024; | ||
| 1099 | if (input_h > max_h) | ||
| 1100 | input_h = max_h; | ||
| 1101 | |||
| 1102 | output_w = mf->width; | ||
| 1103 | output_h = mf->height; | ||
| 1104 | |||
| 1105 | ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h); | ||
| 1106 | if (ret < 0) | ||
| 1107 | return ret; | ||
| 1108 | |||
| 1109 | fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts, | ||
| 1110 | ARRAY_SIZE(rj54n1_colour_fmts)); | ||
| 1111 | |||
| 1112 | rj54n1->fmt = fmt; | ||
| 1113 | rj54n1->resize = ret; | ||
| 1114 | rj54n1->rect.width = input_w; | ||
| 1115 | rj54n1->rect.height = input_h; | ||
| 1116 | rj54n1->width = output_w; | ||
| 1117 | rj54n1->height = output_h; | ||
| 1118 | |||
| 1119 | mf->width = output_w; | ||
| 1120 | mf->height = output_h; | ||
| 1121 | mf->field = V4L2_FIELD_NONE; | ||
| 1122 | mf->colorspace = fmt->colorspace; | ||
| 1123 | |||
| 1124 | return 0; | ||
| 1125 | } | ||
| 1126 | |||
| 1127 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1128 | static int rj54n1_g_register(struct v4l2_subdev *sd, | ||
| 1129 | struct v4l2_dbg_register *reg) | ||
| 1130 | { | ||
| 1131 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1132 | |||
| 1133 | if (reg->reg < 0x400 || reg->reg > 0x1fff) | ||
| 1134 | /* Registers > 0x0800 are only available from Sharp support */ | ||
| 1135 | return -EINVAL; | ||
| 1136 | |||
| 1137 | reg->size = 1; | ||
| 1138 | reg->val = reg_read(client, reg->reg); | ||
| 1139 | |||
| 1140 | if (reg->val > 0xff) | ||
| 1141 | return -EIO; | ||
| 1142 | |||
| 1143 | return 0; | ||
| 1144 | } | ||
| 1145 | |||
| 1146 | static int rj54n1_s_register(struct v4l2_subdev *sd, | ||
| 1147 | const struct v4l2_dbg_register *reg) | ||
| 1148 | { | ||
| 1149 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1150 | |||
| 1151 | if (reg->reg < 0x400 || reg->reg > 0x1fff) | ||
| 1152 | /* Registers >= 0x0800 are only available from Sharp support */ | ||
| 1153 | return -EINVAL; | ||
| 1154 | |||
| 1155 | if (reg_write(client, reg->reg, reg->val) < 0) | ||
| 1156 | return -EIO; | ||
| 1157 | |||
| 1158 | return 0; | ||
| 1159 | } | ||
| 1160 | #endif | ||
| 1161 | |||
| 1162 | static int rj54n1_s_power(struct v4l2_subdev *sd, int on) | ||
| 1163 | { | ||
| 1164 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1165 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1166 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 1167 | |||
| 1168 | return soc_camera_set_power(&client->dev, ssdd, rj54n1->clk, on); | ||
| 1169 | } | ||
| 1170 | |||
| 1171 | static int rj54n1_s_ctrl(struct v4l2_ctrl *ctrl) | ||
| 1172 | { | ||
| 1173 | struct rj54n1 *rj54n1 = container_of(ctrl->handler, struct rj54n1, hdl); | ||
| 1174 | struct v4l2_subdev *sd = &rj54n1->subdev; | ||
| 1175 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1176 | int data; | ||
| 1177 | |||
| 1178 | switch (ctrl->id) { | ||
| 1179 | case V4L2_CID_VFLIP: | ||
| 1180 | if (ctrl->val) | ||
| 1181 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1); | ||
| 1182 | else | ||
| 1183 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1); | ||
| 1184 | if (data < 0) | ||
| 1185 | return -EIO; | ||
| 1186 | return 0; | ||
| 1187 | case V4L2_CID_HFLIP: | ||
| 1188 | if (ctrl->val) | ||
| 1189 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2); | ||
| 1190 | else | ||
| 1191 | data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2); | ||
| 1192 | if (data < 0) | ||
| 1193 | return -EIO; | ||
| 1194 | return 0; | ||
| 1195 | case V4L2_CID_GAIN: | ||
| 1196 | if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0) | ||
| 1197 | return -EIO; | ||
| 1198 | return 0; | ||
| 1199 | case V4L2_CID_AUTO_WHITE_BALANCE: | ||
| 1200 | /* Auto WB area - whole image */ | ||
| 1201 | if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->val << 7, | ||
| 1202 | 0x80) < 0) | ||
| 1203 | return -EIO; | ||
| 1204 | rj54n1->auto_wb = ctrl->val; | ||
| 1205 | return 0; | ||
| 1206 | } | ||
| 1207 | |||
| 1208 | return -EINVAL; | ||
| 1209 | } | ||
| 1210 | |||
| 1211 | static const struct v4l2_ctrl_ops rj54n1_ctrl_ops = { | ||
| 1212 | .s_ctrl = rj54n1_s_ctrl, | ||
| 1213 | }; | ||
| 1214 | |||
| 1215 | static const struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = { | ||
| 1216 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1217 | .g_register = rj54n1_g_register, | ||
| 1218 | .s_register = rj54n1_s_register, | ||
| 1219 | #endif | ||
| 1220 | .s_power = rj54n1_s_power, | ||
| 1221 | }; | ||
| 1222 | |||
| 1223 | static int rj54n1_g_mbus_config(struct v4l2_subdev *sd, | ||
| 1224 | struct v4l2_mbus_config *cfg) | ||
| 1225 | { | ||
| 1226 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1227 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1228 | |||
| 1229 | cfg->flags = | ||
| 1230 | V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | | ||
| 1231 | V4L2_MBUS_MASTER | V4L2_MBUS_DATA_ACTIVE_HIGH | | ||
| 1232 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH; | ||
| 1233 | cfg->type = V4L2_MBUS_PARALLEL; | ||
| 1234 | cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); | ||
| 1235 | |||
| 1236 | return 0; | ||
| 1237 | } | ||
| 1238 | |||
| 1239 | static int rj54n1_s_mbus_config(struct v4l2_subdev *sd, | ||
| 1240 | const struct v4l2_mbus_config *cfg) | ||
| 1241 | { | ||
| 1242 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 1243 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1244 | |||
| 1245 | /* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */ | ||
| 1246 | if (soc_camera_apply_board_flags(ssdd, cfg) & | ||
| 1247 | V4L2_MBUS_PCLK_SAMPLE_RISING) | ||
| 1248 | return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4); | ||
| 1249 | else | ||
| 1250 | return reg_write(client, RJ54N1_OUT_SIGPO, 0); | ||
| 1251 | } | ||
| 1252 | |||
| 1253 | static const struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = { | ||
| 1254 | .s_stream = rj54n1_s_stream, | ||
| 1255 | .g_mbus_config = rj54n1_g_mbus_config, | ||
| 1256 | .s_mbus_config = rj54n1_s_mbus_config, | ||
| 1257 | }; | ||
| 1258 | |||
| 1259 | static const struct v4l2_subdev_pad_ops rj54n1_subdev_pad_ops = { | ||
| 1260 | .enum_mbus_code = rj54n1_enum_mbus_code, | ||
| 1261 | .get_selection = rj54n1_get_selection, | ||
| 1262 | .set_selection = rj54n1_set_selection, | ||
| 1263 | .get_fmt = rj54n1_get_fmt, | ||
| 1264 | .set_fmt = rj54n1_set_fmt, | ||
| 1265 | }; | ||
| 1266 | |||
| 1267 | static const struct v4l2_subdev_ops rj54n1_subdev_ops = { | ||
| 1268 | .core = &rj54n1_subdev_core_ops, | ||
| 1269 | .video = &rj54n1_subdev_video_ops, | ||
| 1270 | .pad = &rj54n1_subdev_pad_ops, | ||
| 1271 | }; | ||
| 1272 | |||
| 1273 | /* | ||
| 1274 | * Interface active, can use i2c. If it fails, it can indeed mean, that | ||
| 1275 | * this wasn't our capture interface, so, we wait for the right one | ||
| 1276 | */ | ||
| 1277 | static int rj54n1_video_probe(struct i2c_client *client, | ||
| 1278 | struct rj54n1_pdata *priv) | ||
| 1279 | { | ||
| 1280 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 1281 | int data1, data2; | ||
| 1282 | int ret; | ||
| 1283 | |||
| 1284 | ret = rj54n1_s_power(&rj54n1->subdev, 1); | ||
| 1285 | if (ret < 0) | ||
| 1286 | return ret; | ||
| 1287 | |||
| 1288 | /* Read out the chip version register */ | ||
| 1289 | data1 = reg_read(client, RJ54N1_DEV_CODE); | ||
| 1290 | data2 = reg_read(client, RJ54N1_DEV_CODE2); | ||
| 1291 | |||
| 1292 | if (data1 != 0x51 || data2 != 0x10) { | ||
| 1293 | ret = -ENODEV; | ||
| 1294 | dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n", | ||
| 1295 | data1, data2); | ||
| 1296 | goto done; | ||
| 1297 | } | ||
| 1298 | |||
| 1299 | /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */ | ||
| 1300 | ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7); | ||
| 1301 | if (ret < 0) | ||
| 1302 | goto done; | ||
| 1303 | |||
| 1304 | dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n", | ||
| 1305 | data1, data2); | ||
| 1306 | |||
| 1307 | ret = v4l2_ctrl_handler_setup(&rj54n1->hdl); | ||
| 1308 | |||
| 1309 | done: | ||
| 1310 | rj54n1_s_power(&rj54n1->subdev, 0); | ||
| 1311 | return ret; | ||
| 1312 | } | ||
| 1313 | |||
| 1314 | static int rj54n1_probe(struct i2c_client *client, | ||
| 1315 | const struct i2c_device_id *did) | ||
| 1316 | { | ||
| 1317 | struct rj54n1 *rj54n1; | ||
| 1318 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1319 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); | ||
| 1320 | struct rj54n1_pdata *rj54n1_priv; | ||
| 1321 | int ret; | ||
| 1322 | |||
| 1323 | if (!ssdd || !ssdd->drv_priv) { | ||
| 1324 | dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n"); | ||
| 1325 | return -EINVAL; | ||
| 1326 | } | ||
| 1327 | |||
| 1328 | rj54n1_priv = ssdd->drv_priv; | ||
| 1329 | |||
| 1330 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | ||
| 1331 | dev_warn(&adapter->dev, | ||
| 1332 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n"); | ||
| 1333 | return -EIO; | ||
| 1334 | } | ||
| 1335 | |||
| 1336 | rj54n1 = devm_kzalloc(&client->dev, sizeof(struct rj54n1), GFP_KERNEL); | ||
| 1337 | if (!rj54n1) | ||
| 1338 | return -ENOMEM; | ||
| 1339 | |||
| 1340 | v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops); | ||
| 1341 | v4l2_ctrl_handler_init(&rj54n1->hdl, 4); | ||
| 1342 | v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops, | ||
| 1343 | V4L2_CID_VFLIP, 0, 1, 1, 0); | ||
| 1344 | v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops, | ||
| 1345 | V4L2_CID_HFLIP, 0, 1, 1, 0); | ||
| 1346 | v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops, | ||
| 1347 | V4L2_CID_GAIN, 0, 127, 1, 66); | ||
| 1348 | v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops, | ||
| 1349 | V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); | ||
| 1350 | rj54n1->subdev.ctrl_handler = &rj54n1->hdl; | ||
| 1351 | if (rj54n1->hdl.error) | ||
| 1352 | return rj54n1->hdl.error; | ||
| 1353 | |||
| 1354 | rj54n1->clk_div = clk_div; | ||
| 1355 | rj54n1->rect.left = RJ54N1_COLUMN_SKIP; | ||
| 1356 | rj54n1->rect.top = RJ54N1_ROW_SKIP; | ||
| 1357 | rj54n1->rect.width = RJ54N1_MAX_WIDTH; | ||
| 1358 | rj54n1->rect.height = RJ54N1_MAX_HEIGHT; | ||
| 1359 | rj54n1->width = RJ54N1_MAX_WIDTH; | ||
| 1360 | rj54n1->height = RJ54N1_MAX_HEIGHT; | ||
| 1361 | rj54n1->fmt = &rj54n1_colour_fmts[0]; | ||
| 1362 | rj54n1->resize = 1024; | ||
| 1363 | rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) / | ||
| 1364 | (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1); | ||
| 1365 | |||
| 1366 | rj54n1->clk = v4l2_clk_get(&client->dev, "mclk"); | ||
| 1367 | if (IS_ERR(rj54n1->clk)) { | ||
| 1368 | ret = PTR_ERR(rj54n1->clk); | ||
| 1369 | goto eclkget; | ||
| 1370 | } | ||
| 1371 | |||
| 1372 | ret = rj54n1_video_probe(client, rj54n1_priv); | ||
| 1373 | if (ret < 0) { | ||
| 1374 | v4l2_clk_put(rj54n1->clk); | ||
| 1375 | eclkget: | ||
| 1376 | v4l2_ctrl_handler_free(&rj54n1->hdl); | ||
| 1377 | } | ||
| 1378 | |||
| 1379 | return ret; | ||
| 1380 | } | ||
| 1381 | |||
| 1382 | static int rj54n1_remove(struct i2c_client *client) | ||
| 1383 | { | ||
| 1384 | struct rj54n1 *rj54n1 = to_rj54n1(client); | ||
| 1385 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 1386 | |||
| 1387 | v4l2_clk_put(rj54n1->clk); | ||
| 1388 | v4l2_device_unregister_subdev(&rj54n1->subdev); | ||
| 1389 | if (ssdd->free_bus) | ||
| 1390 | ssdd->free_bus(ssdd); | ||
| 1391 | v4l2_ctrl_handler_free(&rj54n1->hdl); | ||
| 1392 | |||
| 1393 | return 0; | ||
| 1394 | } | ||
| 1395 | |||
| 1396 | static const struct i2c_device_id rj54n1_id[] = { | ||
| 1397 | { "rj54n1cb0c", 0 }, | ||
| 1398 | { } | ||
| 1399 | }; | ||
| 1400 | MODULE_DEVICE_TABLE(i2c, rj54n1_id); | ||
| 1401 | |||
| 1402 | static struct i2c_driver rj54n1_i2c_driver = { | ||
| 1403 | .driver = { | ||
| 1404 | .name = "rj54n1cb0c", | ||
| 1405 | }, | ||
| 1406 | .probe = rj54n1_probe, | ||
| 1407 | .remove = rj54n1_remove, | ||
| 1408 | .id_table = rj54n1_id, | ||
| 1409 | }; | ||
| 1410 | |||
| 1411 | module_i2c_driver(rj54n1_i2c_driver); | ||
| 1412 | |||
| 1413 | MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver"); | ||
| 1414 | MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); | ||
| 1415 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/media/i2c/soc_camera/soc_tw9910.c b/drivers/media/i2c/soc_camera/soc_tw9910.c deleted file mode 100644 index bdb5e0a431e9..000000000000 --- a/drivers/media/i2c/soc_camera/soc_tw9910.c +++ /dev/null | |||
| @@ -1,999 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * tw9910 Video Driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Renesas Solutions Corp. | ||
| 5 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | ||
| 6 | * | ||
| 7 | * Based on ov772x driver, | ||
| 8 | * | ||
| 9 | * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> | ||
| 10 | * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> | ||
| 11 | * Copyright (C) 2008 Magnus Damm | ||
| 12 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | ||
| 13 | * | ||
| 14 | * This program is free software; you can redistribute it and/or modify | ||
| 15 | * it under the terms of the GNU General Public License version 2 as | ||
| 16 | * published by the Free Software Foundation. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/i2c.h> | ||
| 22 | #include <linux/slab.h> | ||
| 23 | #include <linux/kernel.h> | ||
| 24 | #include <linux/delay.h> | ||
| 25 | #include <linux/v4l2-mediabus.h> | ||
| 26 | #include <linux/videodev2.h> | ||
| 27 | |||
| 28 | #include <media/soc_camera.h> | ||
| 29 | #include <media/i2c/tw9910.h> | ||
| 30 | #include <media/v4l2-clk.h> | ||
| 31 | #include <media/v4l2-subdev.h> | ||
| 32 | |||
| 33 | #define GET_ID(val) ((val & 0xF8) >> 3) | ||
| 34 | #define GET_REV(val) (val & 0x07) | ||
| 35 | |||
| 36 | /* | ||
| 37 | * register offset | ||
| 38 | */ | ||
| 39 | #define ID 0x00 /* Product ID Code Register */ | ||
| 40 | #define STATUS1 0x01 /* Chip Status Register I */ | ||
| 41 | #define INFORM 0x02 /* Input Format */ | ||
| 42 | #define OPFORM 0x03 /* Output Format Control Register */ | ||
| 43 | #define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */ | ||
| 44 | #define OUTCTR1 0x05 /* Output Control I */ | ||
| 45 | #define ACNTL1 0x06 /* Analog Control Register 1 */ | ||
| 46 | #define CROP_HI 0x07 /* Cropping Register, High */ | ||
| 47 | #define VDELAY_LO 0x08 /* Vertical Delay Register, Low */ | ||
| 48 | #define VACTIVE_LO 0x09 /* Vertical Active Register, Low */ | ||
| 49 | #define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */ | ||
| 50 | #define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */ | ||
| 51 | #define CNTRL1 0x0C /* Control Register I */ | ||
| 52 | #define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */ | ||
| 53 | #define SCALE_HI 0x0E /* Scaling Register, High */ | ||
| 54 | #define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */ | ||
| 55 | #define BRIGHT 0x10 /* BRIGHTNESS Control Register */ | ||
| 56 | #define CONTRAST 0x11 /* CONTRAST Control Register */ | ||
| 57 | #define SHARPNESS 0x12 /* SHARPNESS Control Register I */ | ||
| 58 | #define SAT_U 0x13 /* Chroma (U) Gain Register */ | ||
| 59 | #define SAT_V 0x14 /* Chroma (V) Gain Register */ | ||
| 60 | #define HUE 0x15 /* Hue Control Register */ | ||
| 61 | #define CORING1 0x17 | ||
| 62 | #define CORING2 0x18 /* Coring and IF compensation */ | ||
| 63 | #define VBICNTL 0x19 /* VBI Control Register */ | ||
| 64 | #define ACNTL2 0x1A /* Analog Control 2 */ | ||
| 65 | #define OUTCTR2 0x1B /* Output Control 2 */ | ||
| 66 | #define SDT 0x1C /* Standard Selection */ | ||
| 67 | #define SDTR 0x1D /* Standard Recognition */ | ||
| 68 | #define TEST 0x1F /* Test Control Register */ | ||
| 69 | #define CLMPG 0x20 /* Clamping Gain */ | ||
| 70 | #define IAGC 0x21 /* Individual AGC Gain */ | ||
| 71 | #define AGCGAIN 0x22 /* AGC Gain */ | ||
| 72 | #define PEAKWT 0x23 /* White Peak Threshold */ | ||
| 73 | #define CLMPL 0x24 /* Clamp level */ | ||
| 74 | #define SYNCT 0x25 /* Sync Amplitude */ | ||
| 75 | #define MISSCNT 0x26 /* Sync Miss Count Register */ | ||
| 76 | #define PCLAMP 0x27 /* Clamp Position Register */ | ||
| 77 | #define VCNTL1 0x28 /* Vertical Control I */ | ||
| 78 | #define VCNTL2 0x29 /* Vertical Control II */ | ||
| 79 | #define CKILL 0x2A /* Color Killer Level Control */ | ||
| 80 | #define COMB 0x2B /* Comb Filter Control */ | ||
| 81 | #define LDLY 0x2C /* Luma Delay and H Filter Control */ | ||
| 82 | #define MISC1 0x2D /* Miscellaneous Control I */ | ||
| 83 | #define LOOP 0x2E /* LOOP Control Register */ | ||
| 84 | #define MISC2 0x2F /* Miscellaneous Control II */ | ||
| 85 | #define MVSN 0x30 /* Macrovision Detection */ | ||
| 86 | #define STATUS2 0x31 /* Chip STATUS II */ | ||
| 87 | #define HFREF 0x32 /* H monitor */ | ||
| 88 | #define CLMD 0x33 /* CLAMP MODE */ | ||
| 89 | #define IDCNTL 0x34 /* ID Detection Control */ | ||
| 90 | #define CLCNTL1 0x35 /* Clamp Control I */ | ||
| 91 | #define ANAPLLCTL 0x4C | ||
| 92 | #define VBIMIN 0x4D | ||
| 93 | #define HSLOWCTL 0x4E | ||
| 94 | #define WSS3 0x4F | ||
| 95 | #define FILLDATA 0x50 | ||
| 96 | #define SDID 0x51 | ||
| 97 | #define DID 0x52 | ||
| 98 | #define WSS1 0x53 | ||
| 99 | #define WSS2 0x54 | ||
| 100 | #define VVBI 0x55 | ||
| 101 | #define LCTL6 0x56 | ||
| 102 | #define LCTL7 0x57 | ||
| 103 | #define LCTL8 0x58 | ||
| 104 | #define LCTL9 0x59 | ||
| 105 | #define LCTL10 0x5A | ||
| 106 | #define LCTL11 0x5B | ||
| 107 | #define LCTL12 0x5C | ||
| 108 | #define LCTL13 0x5D | ||
| 109 | #define LCTL14 0x5E | ||
| 110 | #define LCTL15 0x5F | ||
| 111 | #define LCTL16 0x60 | ||
| 112 | #define LCTL17 0x61 | ||
| 113 | #define LCTL18 0x62 | ||
| 114 | #define LCTL19 0x63 | ||
| 115 | #define LCTL20 0x64 | ||
| 116 | #define LCTL21 0x65 | ||
| 117 | #define LCTL22 0x66 | ||
| 118 | #define LCTL23 0x67 | ||
| 119 | #define LCTL24 0x68 | ||
| 120 | #define LCTL25 0x69 | ||
| 121 | #define LCTL26 0x6A | ||
| 122 | #define HSBEGIN 0x6B | ||
| 123 | #define HSEND 0x6C | ||
| 124 | #define OVSDLY 0x6D | ||
| 125 | #define OVSEND 0x6E | ||
| 126 | #define VBIDELAY 0x6F | ||
| 127 | |||
| 128 | /* | ||
| 129 | * register detail | ||
| 130 | */ | ||
| 131 | |||
| 132 | /* INFORM */ | ||
| 133 | #define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */ | ||
| 134 | #define FC27_FF 0x00 /* 0 : Square pixel mode. */ | ||
| 135 | /* Must use 24.54MHz for 60Hz field rate */ | ||
| 136 | /* source or 29.5MHz for 50Hz field rate */ | ||
| 137 | #define IFSEL_S 0x10 /* 01 : S-video decoding */ | ||
| 138 | #define IFSEL_C 0x00 /* 00 : Composite video decoding */ | ||
| 139 | /* Y input video selection */ | ||
| 140 | #define YSEL_M0 0x00 /* 00 : Mux0 selected */ | ||
| 141 | #define YSEL_M1 0x04 /* 01 : Mux1 selected */ | ||
| 142 | #define YSEL_M2 0x08 /* 10 : Mux2 selected */ | ||
| 143 | #define YSEL_M3 0x10 /* 11 : Mux3 selected */ | ||
| 144 | |||
| 145 | /* OPFORM */ | ||
| 146 | #define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */ | ||
| 147 | /* 1 : ITU-R-656 compatible data sequence format */ | ||
| 148 | #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */ | ||
| 149 | /* 1 : 16-bit YCrCb 4:2:2 output format.*/ | ||
| 150 | #define LLCMODE 0x20 /* 1 : LLC output mode. */ | ||
| 151 | /* 0 : free-run output mode */ | ||
| 152 | #define AINC 0x10 /* Serial interface auto-indexing control */ | ||
| 153 | /* 0 : auto-increment */ | ||
| 154 | /* 1 : non-auto */ | ||
| 155 | #define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */ | ||
| 156 | /* 0 : Vertical out ctrl by HACTIVE and DVALID */ | ||
| 157 | #define OEN_TRI_SEL_MASK 0x07 | ||
| 158 | #define OEN_TRI_SEL_ALL_ON 0x00 /* Enable output for Rev0/Rev1 */ | ||
| 159 | #define OEN_TRI_SEL_ALL_OFF_r0 0x06 /* All tri-stated for Rev0 */ | ||
| 160 | #define OEN_TRI_SEL_ALL_OFF_r1 0x07 /* All tri-stated for Rev1 */ | ||
| 161 | |||
| 162 | /* OUTCTR1 */ | ||
| 163 | #define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */ | ||
| 164 | #define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */ | ||
| 165 | /* VS pin output control */ | ||
| 166 | #define VSSL_VSYNC 0x00 /* 0 : VSYNC */ | ||
| 167 | #define VSSL_VACT 0x10 /* 1 : VACT */ | ||
| 168 | #define VSSL_FIELD 0x20 /* 2 : FIELD */ | ||
| 169 | #define VSSL_VVALID 0x30 /* 3 : VVALID */ | ||
| 170 | #define VSSL_ZERO 0x70 /* 7 : 0 */ | ||
| 171 | #define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */ | ||
| 172 | #define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/ | ||
| 173 | /* HS pin output control */ | ||
| 174 | #define HSSL_HACT 0x00 /* 0 : HACT */ | ||
| 175 | #define HSSL_HSYNC 0x01 /* 1 : HSYNC */ | ||
| 176 | #define HSSL_DVALID 0x02 /* 2 : DVALID */ | ||
| 177 | #define HSSL_HLOCK 0x03 /* 3 : HLOCK */ | ||
| 178 | #define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */ | ||
| 179 | #define HSSL_ZERO 0x07 /* 7 : 0 */ | ||
| 180 | |||
| 181 | /* ACNTL1 */ | ||
| 182 | #define SRESET 0x80 /* resets the device to its default state | ||
| 183 | * but all register content remain unchanged. | ||
| 184 | * This bit is self-resetting. | ||
| 185 | */ | ||
| 186 | #define ACNTL1_PDN_MASK 0x0e | ||
| 187 | #define CLK_PDN 0x08 /* system clock power down */ | ||
| 188 | #define Y_PDN 0x04 /* Luma ADC power down */ | ||
| 189 | #define C_PDN 0x02 /* Chroma ADC power down */ | ||
| 190 | |||
| 191 | /* ACNTL2 */ | ||
| 192 | #define ACNTL2_PDN_MASK 0x40 | ||
| 193 | #define PLL_PDN 0x40 /* PLL power down */ | ||
| 194 | |||
| 195 | /* VBICNTL */ | ||
| 196 | |||
| 197 | /* RTSEL : control the real time signal output from the MPOUT pin */ | ||
| 198 | #define RTSEL_MASK 0x07 | ||
| 199 | #define RTSEL_VLOSS 0x00 /* 0000 = Video loss */ | ||
| 200 | #define RTSEL_HLOCK 0x01 /* 0001 = H-lock */ | ||
| 201 | #define RTSEL_SLOCK 0x02 /* 0010 = S-lock */ | ||
| 202 | #define RTSEL_VLOCK 0x03 /* 0011 = V-lock */ | ||
| 203 | #define RTSEL_MONO 0x04 /* 0100 = MONO */ | ||
| 204 | #define RTSEL_DET50 0x05 /* 0101 = DET50 */ | ||
| 205 | #define RTSEL_FIELD 0x06 /* 0110 = FIELD */ | ||
| 206 | #define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */ | ||
| 207 | |||
| 208 | /* HSYNC start and end are constant for now */ | ||
| 209 | #define HSYNC_START 0x0260 | ||
| 210 | #define HSYNC_END 0x0300 | ||
| 211 | |||
| 212 | /* | ||
| 213 | * structure | ||
| 214 | */ | ||
| 215 | |||
| 216 | struct regval_list { | ||
| 217 | unsigned char reg_num; | ||
| 218 | unsigned char value; | ||
| 219 | }; | ||
| 220 | |||
| 221 | struct tw9910_scale_ctrl { | ||
| 222 | char *name; | ||
| 223 | unsigned short width; | ||
| 224 | unsigned short height; | ||
| 225 | u16 hscale; | ||
| 226 | u16 vscale; | ||
| 227 | }; | ||
| 228 | |||
| 229 | struct tw9910_priv { | ||
| 230 | struct v4l2_subdev subdev; | ||
| 231 | struct v4l2_clk *clk; | ||
| 232 | struct tw9910_video_info *info; | ||
| 233 | const struct tw9910_scale_ctrl *scale; | ||
| 234 | v4l2_std_id norm; | ||
| 235 | u32 revision; | ||
| 236 | }; | ||
| 237 | |||
| 238 | static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = { | ||
| 239 | { | ||
| 240 | .name = "NTSC SQ", | ||
| 241 | .width = 640, | ||
| 242 | .height = 480, | ||
| 243 | .hscale = 0x0100, | ||
| 244 | .vscale = 0x0100, | ||
| 245 | }, | ||
| 246 | { | ||
| 247 | .name = "NTSC CCIR601", | ||
| 248 | .width = 720, | ||
| 249 | .height = 480, | ||
| 250 | .hscale = 0x0100, | ||
| 251 | .vscale = 0x0100, | ||
| 252 | }, | ||
| 253 | { | ||
| 254 | .name = "NTSC SQ (CIF)", | ||
| 255 | .width = 320, | ||
| 256 | .height = 240, | ||
| 257 | .hscale = 0x0200, | ||
| 258 | .vscale = 0x0200, | ||
| 259 | }, | ||
| 260 | { | ||
| 261 | .name = "NTSC CCIR601 (CIF)", | ||
| 262 | .width = 360, | ||
| 263 | .height = 240, | ||
| 264 | .hscale = 0x0200, | ||
| 265 | .vscale = 0x0200, | ||
| 266 | }, | ||
| 267 | { | ||
| 268 | .name = "NTSC SQ (QCIF)", | ||
| 269 | .width = 160, | ||
| 270 | .height = 120, | ||
| 271 | .hscale = 0x0400, | ||
| 272 | .vscale = 0x0400, | ||
| 273 | }, | ||
| 274 | { | ||
| 275 | .name = "NTSC CCIR601 (QCIF)", | ||
| 276 | .width = 180, | ||
| 277 | .height = 120, | ||
| 278 | .hscale = 0x0400, | ||
| 279 | .vscale = 0x0400, | ||
| 280 | }, | ||
| 281 | }; | ||
| 282 | |||
| 283 | static const struct tw9910_scale_ctrl tw9910_pal_scales[] = { | ||
| 284 | { | ||
| 285 | .name = "PAL SQ", | ||
| 286 | .width = 768, | ||
| 287 | .height = 576, | ||
| 288 | .hscale = 0x0100, | ||
| 289 | .vscale = 0x0100, | ||
| 290 | }, | ||
| 291 | { | ||
| 292 | .name = "PAL CCIR601", | ||
| 293 | .width = 720, | ||
| 294 | .height = 576, | ||
| 295 | .hscale = 0x0100, | ||
| 296 | .vscale = 0x0100, | ||
| 297 | }, | ||
| 298 | { | ||
| 299 | .name = "PAL SQ (CIF)", | ||
| 300 | .width = 384, | ||
| 301 | .height = 288, | ||
| 302 | .hscale = 0x0200, | ||
| 303 | .vscale = 0x0200, | ||
| 304 | }, | ||
| 305 | { | ||
| 306 | .name = "PAL CCIR601 (CIF)", | ||
| 307 | .width = 360, | ||
| 308 | .height = 288, | ||
| 309 | .hscale = 0x0200, | ||
| 310 | .vscale = 0x0200, | ||
| 311 | }, | ||
| 312 | { | ||
| 313 | .name = "PAL SQ (QCIF)", | ||
| 314 | .width = 192, | ||
| 315 | .height = 144, | ||
| 316 | .hscale = 0x0400, | ||
| 317 | .vscale = 0x0400, | ||
| 318 | }, | ||
| 319 | { | ||
| 320 | .name = "PAL CCIR601 (QCIF)", | ||
| 321 | .width = 180, | ||
| 322 | .height = 144, | ||
| 323 | .hscale = 0x0400, | ||
| 324 | .vscale = 0x0400, | ||
| 325 | }, | ||
| 326 | }; | ||
| 327 | |||
| 328 | /* | ||
| 329 | * general function | ||
| 330 | */ | ||
| 331 | static struct tw9910_priv *to_tw9910(const struct i2c_client *client) | ||
| 332 | { | ||
| 333 | return container_of(i2c_get_clientdata(client), struct tw9910_priv, | ||
| 334 | subdev); | ||
| 335 | } | ||
| 336 | |||
| 337 | static int tw9910_mask_set(struct i2c_client *client, u8 command, | ||
| 338 | u8 mask, u8 set) | ||
| 339 | { | ||
| 340 | s32 val = i2c_smbus_read_byte_data(client, command); | ||
| 341 | if (val < 0) | ||
| 342 | return val; | ||
| 343 | |||
| 344 | val &= ~mask; | ||
| 345 | val |= set & mask; | ||
| 346 | |||
| 347 | return i2c_smbus_write_byte_data(client, command, val); | ||
| 348 | } | ||
| 349 | |||
| 350 | static int tw9910_set_scale(struct i2c_client *client, | ||
| 351 | const struct tw9910_scale_ctrl *scale) | ||
| 352 | { | ||
| 353 | int ret; | ||
| 354 | |||
| 355 | ret = i2c_smbus_write_byte_data(client, SCALE_HI, | ||
| 356 | (scale->vscale & 0x0F00) >> 4 | | ||
| 357 | (scale->hscale & 0x0F00) >> 8); | ||
| 358 | if (ret < 0) | ||
| 359 | return ret; | ||
| 360 | |||
| 361 | ret = i2c_smbus_write_byte_data(client, HSCALE_LO, | ||
| 362 | scale->hscale & 0x00FF); | ||
| 363 | if (ret < 0) | ||
| 364 | return ret; | ||
| 365 | |||
| 366 | ret = i2c_smbus_write_byte_data(client, VSCALE_LO, | ||
| 367 | scale->vscale & 0x00FF); | ||
| 368 | |||
| 369 | return ret; | ||
| 370 | } | ||
| 371 | |||
| 372 | static int tw9910_set_hsync(struct i2c_client *client) | ||
| 373 | { | ||
| 374 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 375 | int ret; | ||
| 376 | |||
| 377 | /* bit 10 - 3 */ | ||
| 378 | ret = i2c_smbus_write_byte_data(client, HSBEGIN, | ||
| 379 | (HSYNC_START & 0x07F8) >> 3); | ||
| 380 | if (ret < 0) | ||
| 381 | return ret; | ||
| 382 | |||
| 383 | /* bit 10 - 3 */ | ||
| 384 | ret = i2c_smbus_write_byte_data(client, HSEND, | ||
| 385 | (HSYNC_END & 0x07F8) >> 3); | ||
| 386 | if (ret < 0) | ||
| 387 | return ret; | ||
| 388 | |||
| 389 | /* So far only revisions 0 and 1 have been seen */ | ||
| 390 | /* bit 2 - 0 */ | ||
| 391 | if (1 == priv->revision) | ||
| 392 | ret = tw9910_mask_set(client, HSLOWCTL, 0x77, | ||
| 393 | (HSYNC_START & 0x0007) << 4 | | ||
| 394 | (HSYNC_END & 0x0007)); | ||
| 395 | |||
| 396 | return ret; | ||
| 397 | } | ||
| 398 | |||
| 399 | static void tw9910_reset(struct i2c_client *client) | ||
| 400 | { | ||
| 401 | tw9910_mask_set(client, ACNTL1, SRESET, SRESET); | ||
| 402 | msleep(1); | ||
| 403 | } | ||
| 404 | |||
| 405 | static int tw9910_power(struct i2c_client *client, int enable) | ||
| 406 | { | ||
| 407 | int ret; | ||
| 408 | u8 acntl1; | ||
| 409 | u8 acntl2; | ||
| 410 | |||
| 411 | if (enable) { | ||
| 412 | acntl1 = 0; | ||
| 413 | acntl2 = 0; | ||
| 414 | } else { | ||
| 415 | acntl1 = CLK_PDN | Y_PDN | C_PDN; | ||
| 416 | acntl2 = PLL_PDN; | ||
| 417 | } | ||
| 418 | |||
| 419 | ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1); | ||
| 420 | if (ret < 0) | ||
| 421 | return ret; | ||
| 422 | |||
| 423 | return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2); | ||
| 424 | } | ||
| 425 | |||
| 426 | static const struct tw9910_scale_ctrl *tw9910_select_norm(v4l2_std_id norm, | ||
| 427 | u32 width, u32 height) | ||
| 428 | { | ||
| 429 | const struct tw9910_scale_ctrl *scale; | ||
| 430 | const struct tw9910_scale_ctrl *ret = NULL; | ||
| 431 | __u32 diff = 0xffffffff, tmp; | ||
| 432 | int size, i; | ||
| 433 | |||
| 434 | if (norm & V4L2_STD_NTSC) { | ||
| 435 | scale = tw9910_ntsc_scales; | ||
| 436 | size = ARRAY_SIZE(tw9910_ntsc_scales); | ||
| 437 | } else if (norm & V4L2_STD_PAL) { | ||
| 438 | scale = tw9910_pal_scales; | ||
| 439 | size = ARRAY_SIZE(tw9910_pal_scales); | ||
| 440 | } else { | ||
| 441 | return NULL; | ||
| 442 | } | ||
| 443 | |||
| 444 | for (i = 0; i < size; i++) { | ||
| 445 | tmp = abs(width - scale[i].width) + | ||
| 446 | abs(height - scale[i].height); | ||
| 447 | if (tmp < diff) { | ||
| 448 | diff = tmp; | ||
| 449 | ret = scale + i; | ||
| 450 | } | ||
| 451 | } | ||
| 452 | |||
| 453 | return ret; | ||
| 454 | } | ||
| 455 | |||
| 456 | /* | ||
| 457 | * subdevice operations | ||
| 458 | */ | ||
| 459 | static int tw9910_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 460 | { | ||
| 461 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 462 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 463 | u8 val; | ||
| 464 | int ret; | ||
| 465 | |||
| 466 | if (!enable) { | ||
| 467 | switch (priv->revision) { | ||
| 468 | case 0: | ||
| 469 | val = OEN_TRI_SEL_ALL_OFF_r0; | ||
| 470 | break; | ||
| 471 | case 1: | ||
| 472 | val = OEN_TRI_SEL_ALL_OFF_r1; | ||
| 473 | break; | ||
| 474 | default: | ||
| 475 | dev_err(&client->dev, "un-supported revision\n"); | ||
| 476 | return -EINVAL; | ||
| 477 | } | ||
| 478 | } else { | ||
| 479 | val = OEN_TRI_SEL_ALL_ON; | ||
| 480 | |||
| 481 | if (!priv->scale) { | ||
| 482 | dev_err(&client->dev, "norm select error\n"); | ||
| 483 | return -EPERM; | ||
| 484 | } | ||
| 485 | |||
| 486 | dev_dbg(&client->dev, "%s %dx%d\n", | ||
| 487 | priv->scale->name, | ||
| 488 | priv->scale->width, | ||
| 489 | priv->scale->height); | ||
| 490 | } | ||
| 491 | |||
| 492 | ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val); | ||
| 493 | if (ret < 0) | ||
| 494 | return ret; | ||
| 495 | |||
| 496 | return tw9910_power(client, enable); | ||
| 497 | } | ||
| 498 | |||
| 499 | static int tw9910_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm) | ||
| 500 | { | ||
| 501 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 502 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 503 | |||
| 504 | *norm = priv->norm; | ||
| 505 | |||
| 506 | return 0; | ||
| 507 | } | ||
| 508 | |||
| 509 | static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) | ||
| 510 | { | ||
| 511 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 512 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 513 | const unsigned hact = 720; | ||
| 514 | const unsigned hdelay = 15; | ||
| 515 | unsigned vact; | ||
| 516 | unsigned vdelay; | ||
| 517 | int ret; | ||
| 518 | |||
| 519 | if (!(norm & (V4L2_STD_NTSC | V4L2_STD_PAL))) | ||
| 520 | return -EINVAL; | ||
| 521 | |||
| 522 | priv->norm = norm; | ||
| 523 | if (norm & V4L2_STD_525_60) { | ||
| 524 | vact = 240; | ||
| 525 | vdelay = 18; | ||
| 526 | ret = tw9910_mask_set(client, VVBI, 0x10, 0x10); | ||
| 527 | } else { | ||
| 528 | vact = 288; | ||
| 529 | vdelay = 24; | ||
| 530 | ret = tw9910_mask_set(client, VVBI, 0x10, 0x00); | ||
| 531 | } | ||
| 532 | if (!ret) | ||
| 533 | ret = i2c_smbus_write_byte_data(client, CROP_HI, | ||
| 534 | ((vdelay >> 2) & 0xc0) | | ||
| 535 | ((vact >> 4) & 0x30) | | ||
| 536 | ((hdelay >> 6) & 0x0c) | | ||
| 537 | ((hact >> 8) & 0x03)); | ||
| 538 | if (!ret) | ||
| 539 | ret = i2c_smbus_write_byte_data(client, VDELAY_LO, | ||
| 540 | vdelay & 0xff); | ||
| 541 | if (!ret) | ||
| 542 | ret = i2c_smbus_write_byte_data(client, VACTIVE_LO, | ||
| 543 | vact & 0xff); | ||
| 544 | |||
| 545 | return ret; | ||
| 546 | } | ||
| 547 | |||
| 548 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 549 | static int tw9910_g_register(struct v4l2_subdev *sd, | ||
| 550 | struct v4l2_dbg_register *reg) | ||
| 551 | { | ||
| 552 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 553 | int ret; | ||
| 554 | |||
| 555 | if (reg->reg > 0xff) | ||
| 556 | return -EINVAL; | ||
| 557 | |||
| 558 | reg->size = 1; | ||
| 559 | ret = i2c_smbus_read_byte_data(client, reg->reg); | ||
| 560 | if (ret < 0) | ||
| 561 | return ret; | ||
| 562 | |||
| 563 | /* | ||
| 564 | * ret = int | ||
| 565 | * reg->val = __u64 | ||
| 566 | */ | ||
| 567 | reg->val = (__u64)ret; | ||
| 568 | |||
| 569 | return 0; | ||
| 570 | } | ||
| 571 | |||
| 572 | static int tw9910_s_register(struct v4l2_subdev *sd, | ||
| 573 | const struct v4l2_dbg_register *reg) | ||
| 574 | { | ||
| 575 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 576 | |||
| 577 | if (reg->reg > 0xff || | ||
| 578 | reg->val > 0xff) | ||
| 579 | return -EINVAL; | ||
| 580 | |||
| 581 | return i2c_smbus_write_byte_data(client, reg->reg, reg->val); | ||
| 582 | } | ||
| 583 | #endif | ||
| 584 | |||
| 585 | static int tw9910_s_power(struct v4l2_subdev *sd, int on) | ||
| 586 | { | ||
| 587 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 588 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 589 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 590 | |||
| 591 | return soc_camera_set_power(&client->dev, ssdd, priv->clk, on); | ||
| 592 | } | ||
| 593 | |||
| 594 | static int tw9910_set_frame(struct v4l2_subdev *sd, u32 *width, u32 *height) | ||
| 595 | { | ||
| 596 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 597 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 598 | int ret = -EINVAL; | ||
| 599 | u8 val; | ||
| 600 | |||
| 601 | /* | ||
| 602 | * select suitable norm | ||
| 603 | */ | ||
| 604 | priv->scale = tw9910_select_norm(priv->norm, *width, *height); | ||
| 605 | if (!priv->scale) | ||
| 606 | goto tw9910_set_fmt_error; | ||
| 607 | |||
| 608 | /* | ||
| 609 | * reset hardware | ||
| 610 | */ | ||
| 611 | tw9910_reset(client); | ||
| 612 | |||
| 613 | /* | ||
| 614 | * set bus width | ||
| 615 | */ | ||
| 616 | val = 0x00; | ||
| 617 | if (SOCAM_DATAWIDTH_16 == priv->info->buswidth) | ||
| 618 | val = LEN; | ||
| 619 | |||
| 620 | ret = tw9910_mask_set(client, OPFORM, LEN, val); | ||
| 621 | if (ret < 0) | ||
| 622 | goto tw9910_set_fmt_error; | ||
| 623 | |||
| 624 | /* | ||
| 625 | * select MPOUT behavior | ||
| 626 | */ | ||
| 627 | switch (priv->info->mpout) { | ||
| 628 | case TW9910_MPO_VLOSS: | ||
| 629 | val = RTSEL_VLOSS; break; | ||
| 630 | case TW9910_MPO_HLOCK: | ||
| 631 | val = RTSEL_HLOCK; break; | ||
| 632 | case TW9910_MPO_SLOCK: | ||
| 633 | val = RTSEL_SLOCK; break; | ||
| 634 | case TW9910_MPO_VLOCK: | ||
| 635 | val = RTSEL_VLOCK; break; | ||
| 636 | case TW9910_MPO_MONO: | ||
| 637 | val = RTSEL_MONO; break; | ||
| 638 | case TW9910_MPO_DET50: | ||
| 639 | val = RTSEL_DET50; break; | ||
| 640 | case TW9910_MPO_FIELD: | ||
| 641 | val = RTSEL_FIELD; break; | ||
| 642 | case TW9910_MPO_RTCO: | ||
| 643 | val = RTSEL_RTCO; break; | ||
| 644 | default: | ||
| 645 | val = 0; | ||
| 646 | } | ||
| 647 | |||
| 648 | ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val); | ||
| 649 | if (ret < 0) | ||
| 650 | goto tw9910_set_fmt_error; | ||
| 651 | |||
| 652 | /* | ||
| 653 | * set scale | ||
| 654 | */ | ||
| 655 | ret = tw9910_set_scale(client, priv->scale); | ||
| 656 | if (ret < 0) | ||
| 657 | goto tw9910_set_fmt_error; | ||
| 658 | |||
| 659 | /* | ||
| 660 | * set hsync | ||
| 661 | */ | ||
| 662 | ret = tw9910_set_hsync(client); | ||
| 663 | if (ret < 0) | ||
| 664 | goto tw9910_set_fmt_error; | ||
| 665 | |||
| 666 | *width = priv->scale->width; | ||
| 667 | *height = priv->scale->height; | ||
| 668 | |||
| 669 | return ret; | ||
| 670 | |||
| 671 | tw9910_set_fmt_error: | ||
| 672 | |||
| 673 | tw9910_reset(client); | ||
| 674 | priv->scale = NULL; | ||
| 675 | |||
| 676 | return ret; | ||
| 677 | } | ||
| 678 | |||
| 679 | static int tw9910_get_selection(struct v4l2_subdev *sd, | ||
| 680 | struct v4l2_subdev_pad_config *cfg, | ||
| 681 | struct v4l2_subdev_selection *sel) | ||
| 682 | { | ||
| 683 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 684 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 685 | |||
| 686 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 687 | return -EINVAL; | ||
| 688 | /* Only CROP, CROP_DEFAULT and CROP_BOUNDS are supported */ | ||
| 689 | if (sel->target > V4L2_SEL_TGT_CROP_BOUNDS) | ||
| 690 | return -EINVAL; | ||
| 691 | |||
| 692 | sel->r.left = 0; | ||
| 693 | sel->r.top = 0; | ||
| 694 | if (priv->norm & V4L2_STD_NTSC) { | ||
| 695 | sel->r.width = 640; | ||
| 696 | sel->r.height = 480; | ||
| 697 | } else { | ||
| 698 | sel->r.width = 768; | ||
| 699 | sel->r.height = 576; | ||
| 700 | } | ||
| 701 | return 0; | ||
| 702 | } | ||
| 703 | |||
| 704 | static int tw9910_get_fmt(struct v4l2_subdev *sd, | ||
| 705 | struct v4l2_subdev_pad_config *cfg, | ||
| 706 | struct v4l2_subdev_format *format) | ||
| 707 | { | ||
| 708 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 709 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 710 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 711 | |||
| 712 | if (format->pad) | ||
| 713 | return -EINVAL; | ||
| 714 | |||
| 715 | if (!priv->scale) { | ||
| 716 | priv->scale = tw9910_select_norm(priv->norm, 640, 480); | ||
| 717 | if (!priv->scale) | ||
| 718 | return -EINVAL; | ||
| 719 | } | ||
| 720 | |||
| 721 | mf->width = priv->scale->width; | ||
| 722 | mf->height = priv->scale->height; | ||
| 723 | mf->code = MEDIA_BUS_FMT_UYVY8_2X8; | ||
| 724 | mf->colorspace = V4L2_COLORSPACE_SMPTE170M; | ||
| 725 | mf->field = V4L2_FIELD_INTERLACED_BT; | ||
| 726 | |||
| 727 | return 0; | ||
| 728 | } | ||
| 729 | |||
| 730 | static int tw9910_s_fmt(struct v4l2_subdev *sd, | ||
| 731 | struct v4l2_mbus_framefmt *mf) | ||
| 732 | { | ||
| 733 | u32 width = mf->width, height = mf->height; | ||
| 734 | int ret; | ||
| 735 | |||
| 736 | WARN_ON(mf->field != V4L2_FIELD_ANY && | ||
| 737 | mf->field != V4L2_FIELD_INTERLACED_BT); | ||
| 738 | |||
| 739 | /* | ||
| 740 | * check color format | ||
| 741 | */ | ||
| 742 | if (mf->code != MEDIA_BUS_FMT_UYVY8_2X8) | ||
| 743 | return -EINVAL; | ||
| 744 | |||
| 745 | mf->colorspace = V4L2_COLORSPACE_SMPTE170M; | ||
| 746 | |||
| 747 | ret = tw9910_set_frame(sd, &width, &height); | ||
| 748 | if (!ret) { | ||
| 749 | mf->width = width; | ||
| 750 | mf->height = height; | ||
| 751 | } | ||
| 752 | return ret; | ||
| 753 | } | ||
| 754 | |||
| 755 | static int tw9910_set_fmt(struct v4l2_subdev *sd, | ||
| 756 | struct v4l2_subdev_pad_config *cfg, | ||
| 757 | struct v4l2_subdev_format *format) | ||
| 758 | { | ||
| 759 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 760 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 761 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 762 | const struct tw9910_scale_ctrl *scale; | ||
| 763 | |||
| 764 | if (format->pad) | ||
| 765 | return -EINVAL; | ||
| 766 | |||
| 767 | if (V4L2_FIELD_ANY == mf->field) { | ||
| 768 | mf->field = V4L2_FIELD_INTERLACED_BT; | ||
| 769 | } else if (V4L2_FIELD_INTERLACED_BT != mf->field) { | ||
| 770 | dev_err(&client->dev, "Field type %d invalid.\n", mf->field); | ||
| 771 | return -EINVAL; | ||
| 772 | } | ||
| 773 | |||
| 774 | mf->code = MEDIA_BUS_FMT_UYVY8_2X8; | ||
| 775 | mf->colorspace = V4L2_COLORSPACE_SMPTE170M; | ||
| 776 | |||
| 777 | /* | ||
| 778 | * select suitable norm | ||
| 779 | */ | ||
| 780 | scale = tw9910_select_norm(priv->norm, mf->width, mf->height); | ||
| 781 | if (!scale) | ||
| 782 | return -EINVAL; | ||
| 783 | |||
| 784 | mf->width = scale->width; | ||
| 785 | mf->height = scale->height; | ||
| 786 | |||
| 787 | if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 788 | return tw9910_s_fmt(sd, mf); | ||
| 789 | cfg->try_fmt = *mf; | ||
| 790 | return 0; | ||
| 791 | } | ||
| 792 | |||
| 793 | static int tw9910_video_probe(struct i2c_client *client) | ||
| 794 | { | ||
| 795 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 796 | s32 id; | ||
| 797 | int ret; | ||
| 798 | |||
| 799 | /* | ||
| 800 | * tw9910 only use 8 or 16 bit bus width | ||
| 801 | */ | ||
| 802 | if (SOCAM_DATAWIDTH_16 != priv->info->buswidth && | ||
| 803 | SOCAM_DATAWIDTH_8 != priv->info->buswidth) { | ||
| 804 | dev_err(&client->dev, "bus width error\n"); | ||
| 805 | return -ENODEV; | ||
| 806 | } | ||
| 807 | |||
| 808 | ret = tw9910_s_power(&priv->subdev, 1); | ||
| 809 | if (ret < 0) | ||
| 810 | return ret; | ||
| 811 | |||
| 812 | /* | ||
| 813 | * check and show Product ID | ||
| 814 | * So far only revisions 0 and 1 have been seen | ||
| 815 | */ | ||
| 816 | id = i2c_smbus_read_byte_data(client, ID); | ||
| 817 | priv->revision = GET_REV(id); | ||
| 818 | id = GET_ID(id); | ||
| 819 | |||
| 820 | if (0x0B != id || | ||
| 821 | 0x01 < priv->revision) { | ||
| 822 | dev_err(&client->dev, | ||
| 823 | "Product ID error %x:%x\n", | ||
| 824 | id, priv->revision); | ||
| 825 | ret = -ENODEV; | ||
| 826 | goto done; | ||
| 827 | } | ||
| 828 | |||
| 829 | dev_info(&client->dev, | ||
| 830 | "tw9910 Product ID %0x:%0x\n", id, priv->revision); | ||
| 831 | |||
| 832 | priv->norm = V4L2_STD_NTSC; | ||
| 833 | priv->scale = &tw9910_ntsc_scales[0]; | ||
| 834 | |||
| 835 | done: | ||
| 836 | tw9910_s_power(&priv->subdev, 0); | ||
| 837 | return ret; | ||
| 838 | } | ||
| 839 | |||
| 840 | static const struct v4l2_subdev_core_ops tw9910_subdev_core_ops = { | ||
| 841 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 842 | .g_register = tw9910_g_register, | ||
| 843 | .s_register = tw9910_s_register, | ||
| 844 | #endif | ||
| 845 | .s_power = tw9910_s_power, | ||
| 846 | }; | ||
| 847 | |||
| 848 | static int tw9910_enum_mbus_code(struct v4l2_subdev *sd, | ||
| 849 | struct v4l2_subdev_pad_config *cfg, | ||
| 850 | struct v4l2_subdev_mbus_code_enum *code) | ||
| 851 | { | ||
| 852 | if (code->pad || code->index) | ||
| 853 | return -EINVAL; | ||
| 854 | |||
| 855 | code->code = MEDIA_BUS_FMT_UYVY8_2X8; | ||
| 856 | return 0; | ||
| 857 | } | ||
| 858 | |||
| 859 | static int tw9910_g_mbus_config(struct v4l2_subdev *sd, | ||
| 860 | struct v4l2_mbus_config *cfg) | ||
| 861 | { | ||
| 862 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 863 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 864 | |||
| 865 | cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | | ||
| 866 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | | ||
| 867 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW | | ||
| 868 | V4L2_MBUS_DATA_ACTIVE_HIGH; | ||
| 869 | cfg->type = V4L2_MBUS_PARALLEL; | ||
| 870 | cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); | ||
| 871 | |||
| 872 | return 0; | ||
| 873 | } | ||
| 874 | |||
| 875 | static int tw9910_s_mbus_config(struct v4l2_subdev *sd, | ||
| 876 | const struct v4l2_mbus_config *cfg) | ||
| 877 | { | ||
| 878 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 879 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 880 | u8 val = VSSL_VVALID | HSSL_DVALID; | ||
| 881 | unsigned long flags = soc_camera_apply_board_flags(ssdd, cfg); | ||
| 882 | |||
| 883 | /* | ||
| 884 | * set OUTCTR1 | ||
| 885 | * | ||
| 886 | * We use VVALID and DVALID signals to control VSYNC and HSYNC | ||
| 887 | * outputs, in this mode their polarity is inverted. | ||
| 888 | */ | ||
| 889 | if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) | ||
| 890 | val |= HSP_HI; | ||
| 891 | |||
| 892 | if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) | ||
| 893 | val |= VSP_HI; | ||
| 894 | |||
| 895 | return i2c_smbus_write_byte_data(client, OUTCTR1, val); | ||
| 896 | } | ||
| 897 | |||
| 898 | static int tw9910_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm) | ||
| 899 | { | ||
| 900 | *norm = V4L2_STD_NTSC | V4L2_STD_PAL; | ||
| 901 | return 0; | ||
| 902 | } | ||
| 903 | |||
| 904 | static const struct v4l2_subdev_video_ops tw9910_subdev_video_ops = { | ||
| 905 | .s_std = tw9910_s_std, | ||
| 906 | .g_std = tw9910_g_std, | ||
| 907 | .s_stream = tw9910_s_stream, | ||
| 908 | .g_mbus_config = tw9910_g_mbus_config, | ||
| 909 | .s_mbus_config = tw9910_s_mbus_config, | ||
| 910 | .g_tvnorms = tw9910_g_tvnorms, | ||
| 911 | }; | ||
| 912 | |||
| 913 | static const struct v4l2_subdev_pad_ops tw9910_subdev_pad_ops = { | ||
| 914 | .enum_mbus_code = tw9910_enum_mbus_code, | ||
| 915 | .get_selection = tw9910_get_selection, | ||
| 916 | .get_fmt = tw9910_get_fmt, | ||
| 917 | .set_fmt = tw9910_set_fmt, | ||
| 918 | }; | ||
| 919 | |||
| 920 | static const struct v4l2_subdev_ops tw9910_subdev_ops = { | ||
| 921 | .core = &tw9910_subdev_core_ops, | ||
| 922 | .video = &tw9910_subdev_video_ops, | ||
| 923 | .pad = &tw9910_subdev_pad_ops, | ||
| 924 | }; | ||
| 925 | |||
| 926 | /* | ||
| 927 | * i2c_driver function | ||
| 928 | */ | ||
| 929 | |||
| 930 | static int tw9910_probe(struct i2c_client *client, | ||
| 931 | const struct i2c_device_id *did) | ||
| 932 | |||
| 933 | { | ||
| 934 | struct tw9910_priv *priv; | ||
| 935 | struct tw9910_video_info *info; | ||
| 936 | struct i2c_adapter *adapter = | ||
| 937 | to_i2c_adapter(client->dev.parent); | ||
| 938 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); | ||
| 939 | int ret; | ||
| 940 | |||
| 941 | if (!ssdd || !ssdd->drv_priv) { | ||
| 942 | dev_err(&client->dev, "TW9910: missing platform data!\n"); | ||
| 943 | return -EINVAL; | ||
| 944 | } | ||
| 945 | |||
| 946 | info = ssdd->drv_priv; | ||
| 947 | |||
| 948 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | ||
| 949 | dev_err(&client->dev, | ||
| 950 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE_DATA\n"); | ||
| 951 | return -EIO; | ||
| 952 | } | ||
| 953 | |||
| 954 | priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); | ||
| 955 | if (!priv) | ||
| 956 | return -ENOMEM; | ||
| 957 | |||
| 958 | priv->info = info; | ||
| 959 | |||
| 960 | v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops); | ||
| 961 | |||
| 962 | priv->clk = v4l2_clk_get(&client->dev, "mclk"); | ||
| 963 | if (IS_ERR(priv->clk)) | ||
| 964 | return PTR_ERR(priv->clk); | ||
| 965 | |||
| 966 | ret = tw9910_video_probe(client); | ||
| 967 | if (ret < 0) | ||
| 968 | v4l2_clk_put(priv->clk); | ||
| 969 | |||
| 970 | return ret; | ||
| 971 | } | ||
| 972 | |||
| 973 | static int tw9910_remove(struct i2c_client *client) | ||
| 974 | { | ||
| 975 | struct tw9910_priv *priv = to_tw9910(client); | ||
| 976 | v4l2_clk_put(priv->clk); | ||
| 977 | return 0; | ||
| 978 | } | ||
| 979 | |||
| 980 | static const struct i2c_device_id tw9910_id[] = { | ||
| 981 | { "tw9910", 0 }, | ||
| 982 | { } | ||
| 983 | }; | ||
| 984 | MODULE_DEVICE_TABLE(i2c, tw9910_id); | ||
| 985 | |||
| 986 | static struct i2c_driver tw9910_i2c_driver = { | ||
| 987 | .driver = { | ||
| 988 | .name = "tw9910", | ||
| 989 | }, | ||
| 990 | .probe = tw9910_probe, | ||
| 991 | .remove = tw9910_remove, | ||
| 992 | .id_table = tw9910_id, | ||
| 993 | }; | ||
| 994 | |||
| 995 | module_i2c_driver(tw9910_i2c_driver); | ||
| 996 | |||
| 997 | MODULE_DESCRIPTION("SoC Camera driver for tw9910"); | ||
| 998 | MODULE_AUTHOR("Kuninori Morimoto"); | ||
| 999 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/media/i2c/tda1997x.c b/drivers/media/i2c/tda1997x.c index e8613e364403..a62ede096636 100644 --- a/drivers/media/i2c/tda1997x.c +++ b/drivers/media/i2c/tda1997x.c | |||
| @@ -1884,6 +1884,10 @@ static int tda1997x_set_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) | |||
| 1884 | for (i = 0; i < 128; i++) | 1884 | for (i = 0; i < 128; i++) |
| 1885 | io_write(sd, REG_EDID_IN_BYTE128 + i, edid->edid[i+128]); | 1885 | io_write(sd, REG_EDID_IN_BYTE128 + i, edid->edid[i+128]); |
| 1886 | 1886 | ||
| 1887 | /* store state */ | ||
| 1888 | memcpy(state->edid.edid, edid->edid, 256); | ||
| 1889 | state->edid.blocks = edid->blocks; | ||
| 1890 | |||
| 1887 | tda1997x_enable_edid(sd); | 1891 | tda1997x_enable_edid(sd); |
| 1888 | 1892 | ||
| 1889 | return 0; | 1893 | return 0; |
diff --git a/drivers/media/i2c/tda1997x_regs.h b/drivers/media/i2c/tda1997x_regs.h index f55dfc423a86..ecf87534613b 100644 --- a/drivers/media/i2c/tda1997x_regs.h +++ b/drivers/media/i2c/tda1997x_regs.h | |||
| @@ -596,7 +596,7 @@ | |||
| 596 | #define RESET_AUDIO BIT(0) /* Reset Audio FIFO control */ | 596 | #define RESET_AUDIO BIT(0) /* Reset Audio FIFO control */ |
| 597 | 597 | ||
| 598 | /* HDCP_BCAPS bits */ | 598 | /* HDCP_BCAPS bits */ |
| 599 | #define HDCP_HDMI BIT(7) /* HDCP suports HDMI (vs DVI only) */ | 599 | #define HDCP_HDMI BIT(7) /* HDCP supports HDMI (vs DVI only) */ |
| 600 | #define HDCP_REPEATER BIT(6) /* HDCP supports repeater function */ | 600 | #define HDCP_REPEATER BIT(6) /* HDCP supports repeater function */ |
| 601 | #define HDCP_READY BIT(5) /* set by repeater function */ | 601 | #define HDCP_READY BIT(5) /* set by repeater function */ |
| 602 | #define HDCP_FAST BIT(4) /* Up to 400kHz */ | 602 | #define HDCP_FAST BIT(4) /* Up to 400kHz */ |
diff --git a/drivers/media/i2c/tda9840.c b/drivers/media/i2c/tda9840.c index 0dd6ff3e6201..6ba53f3a6dd2 100644 --- a/drivers/media/i2c/tda9840.c +++ b/drivers/media/i2c/tda9840.c | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | The tda9840 is a stereo/dual sound processor with digital | 7 | The tda9840 is a stereo/dual sound processor with digital |
| 8 | identification. It can be found at address 0x84 on the i2c-bus. | 8 | identification. It can be found at address 0x84 on the i2c-bus. |
| 9 | 9 | ||
| 10 | For detailed informations download the specifications directly | 10 | For detailed information download the specifications directly |
| 11 | from SGS Thomson at http://www.st.com | 11 | from SGS Thomson at http://www.st.com |
| 12 | 12 | ||
| 13 | This program is free software; you can redistribute it and/or modify | 13 | This program is free software; you can redistribute it and/or modify |
diff --git a/drivers/media/i2c/tea6415c.c b/drivers/media/i2c/tea6415c.c index 084bd75bb32c..965c6ccc4fee 100644 --- a/drivers/media/i2c/tea6415c.c +++ b/drivers/media/i2c/tea6415c.c | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | It is cascadable, i.e. it can be found at the addresses | 9 | It is cascadable, i.e. it can be found at the addresses |
| 10 | 0x86 and 0x06 on the i2c-bus. | 10 | 0x86 and 0x06 on the i2c-bus. |
| 11 | 11 | ||
| 12 | For detailed informations download the specifications directly | 12 | For detailed information download the specifications directly |
| 13 | from SGS Thomson at http://www.st.com | 13 | from SGS Thomson at http://www.st.com |
| 14 | 14 | ||
| 15 | This program is free software; you can redistribute it and/or modify | 15 | This program is free software; you can redistribute it and/or modify |
diff --git a/drivers/media/i2c/tea6420.c b/drivers/media/i2c/tea6420.c index b7f4e58f3624..2701a4c9734d 100644 --- a/drivers/media/i2c/tea6420.c +++ b/drivers/media/i2c/tea6420.c | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | It is cascadable, i.e. it can be found at the addresses 0x98 | 9 | It is cascadable, i.e. it can be found at the addresses 0x98 |
| 10 | and 0x9a on the i2c-bus. | 10 | and 0x9a on the i2c-bus. |
| 11 | 11 | ||
| 12 | For detailed informations download the specifications directly | 12 | For detailed information download the specifications directly |
| 13 | from SGS Thomson at http://www.st.com | 13 | from SGS Thomson at http://www.st.com |
| 14 | 14 | ||
| 15 | This program is free software; you can redistribute it and/or modify | 15 | This program is free software; you can redistribute it and/or modify |
diff --git a/drivers/media/i2c/tvaudio.c b/drivers/media/i2c/tvaudio.c index af2da977a685..e6796e94dadf 100644 --- a/drivers/media/i2c/tvaudio.c +++ b/drivers/media/i2c/tvaudio.c | |||
| @@ -538,7 +538,7 @@ static int tda9840_checkit(struct CHIPSTATE *chip) | |||
| 538 | #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */ | 538 | #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */ |
| 539 | 539 | ||
| 540 | /* Unique to TDA9850: */ | 540 | /* Unique to TDA9850: */ |
| 541 | /* lower 4 bits contol SAP noise threshold, over which SAP turns off | 541 | /* lower 4 bits control SAP noise threshold, over which SAP turns off |
| 542 | * set to values of 0x00 through 0x0f for SAP1 through SAP16 */ | 542 | * set to values of 0x00 through 0x0f for SAP1 through SAP16 */ |
| 543 | 543 | ||
| 544 | 544 | ||
| @@ -546,7 +546,7 @@ static int tda9840_checkit(struct CHIPSTATE *chip) | |||
| 546 | /* Common to TDA9855 and TDA9850: */ | 546 | /* Common to TDA9855 and TDA9850: */ |
| 547 | #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */ | 547 | #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */ |
| 548 | #define TDA985x_MONOSAP 2<<6 /* Selects Mono on left, SAP on right */ | 548 | #define TDA985x_MONOSAP 2<<6 /* Selects Mono on left, SAP on right */ |
| 549 | #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */ | 549 | #define TDA985x_STEREO 1<<6 /* Selects Stereo output, mono if not received */ |
| 550 | #define TDA985x_MONO 0 /* Forces Mono output */ | 550 | #define TDA985x_MONO 0 /* Forces Mono output */ |
| 551 | #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */ | 551 | #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */ |
| 552 | 552 | ||
diff --git a/drivers/media/i2c/tvp514x.c b/drivers/media/i2c/tvp514x.c index 1cc83cb934e2..3ada3bb27402 100644 --- a/drivers/media/i2c/tvp514x.c +++ b/drivers/media/i2c/tvp514x.c | |||
| @@ -67,7 +67,7 @@ enum tvp514x_std { | |||
| 67 | }; | 67 | }; |
| 68 | 68 | ||
| 69 | /** | 69 | /** |
| 70 | * struct tvp514x_std_info - Structure to store standard informations | 70 | * struct tvp514x_std_info - Structure to store standard information |
| 71 | * @width: Line width in pixels | 71 | * @width: Line width in pixels |
| 72 | * @height:Number of active lines | 72 | * @height:Number of active lines |
| 73 | * @video_std: Value to write in REG_VIDEO_STD register | 73 | * @video_std: Value to write in REG_VIDEO_STD register |
diff --git a/drivers/media/i2c/tw9910.c b/drivers/media/i2c/tw9910.c index a54548cc4285..4d7cd736b930 100644 --- a/drivers/media/i2c/tw9910.c +++ b/drivers/media/i2c/tw9910.c | |||
| @@ -584,6 +584,14 @@ static int tw9910_s_register(struct v4l2_subdev *sd, | |||
| 584 | } | 584 | } |
| 585 | #endif | 585 | #endif |
| 586 | 586 | ||
| 587 | static void tw9910_set_gpio_value(struct gpio_desc *desc, int value) | ||
| 588 | { | ||
| 589 | if (desc) { | ||
| 590 | gpiod_set_value(desc, value); | ||
| 591 | usleep_range(500, 1000); | ||
| 592 | } | ||
| 593 | } | ||
| 594 | |||
| 587 | static int tw9910_power_on(struct tw9910_priv *priv) | 595 | static int tw9910_power_on(struct tw9910_priv *priv) |
| 588 | { | 596 | { |
| 589 | struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev); | 597 | struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev); |
| @@ -595,10 +603,7 @@ static int tw9910_power_on(struct tw9910_priv *priv) | |||
| 595 | return ret; | 603 | return ret; |
| 596 | } | 604 | } |
| 597 | 605 | ||
| 598 | if (priv->pdn_gpio) { | 606 | tw9910_set_gpio_value(priv->pdn_gpio, 0); |
| 599 | gpiod_set_value(priv->pdn_gpio, 0); | ||
| 600 | usleep_range(500, 1000); | ||
| 601 | } | ||
| 602 | 607 | ||
| 603 | /* | 608 | /* |
| 604 | * FIXME: The reset signal is connected to a shared GPIO on some | 609 | * FIXME: The reset signal is connected to a shared GPIO on some |
| @@ -610,14 +615,14 @@ static int tw9910_power_on(struct tw9910_priv *priv) | |||
| 610 | GPIOD_OUT_LOW); | 615 | GPIOD_OUT_LOW); |
| 611 | if (IS_ERR(priv->rstb_gpio)) { | 616 | if (IS_ERR(priv->rstb_gpio)) { |
| 612 | dev_info(&client->dev, "Unable to get GPIO \"rstb\""); | 617 | dev_info(&client->dev, "Unable to get GPIO \"rstb\""); |
| 618 | clk_disable_unprepare(priv->clk); | ||
| 619 | tw9910_set_gpio_value(priv->pdn_gpio, 1); | ||
| 613 | return PTR_ERR(priv->rstb_gpio); | 620 | return PTR_ERR(priv->rstb_gpio); |
| 614 | } | 621 | } |
| 615 | 622 | ||
| 616 | if (priv->rstb_gpio) { | 623 | if (priv->rstb_gpio) { |
| 617 | gpiod_set_value(priv->rstb_gpio, 1); | 624 | tw9910_set_gpio_value(priv->rstb_gpio, 1); |
| 618 | usleep_range(500, 1000); | 625 | tw9910_set_gpio_value(priv->rstb_gpio, 0); |
| 619 | gpiod_set_value(priv->rstb_gpio, 0); | ||
| 620 | usleep_range(500, 1000); | ||
| 621 | 626 | ||
| 622 | gpiod_put(priv->rstb_gpio); | 627 | gpiod_put(priv->rstb_gpio); |
| 623 | } | 628 | } |
| @@ -628,11 +633,7 @@ static int tw9910_power_on(struct tw9910_priv *priv) | |||
| 628 | static int tw9910_power_off(struct tw9910_priv *priv) | 633 | static int tw9910_power_off(struct tw9910_priv *priv) |
| 629 | { | 634 | { |
| 630 | clk_disable_unprepare(priv->clk); | 635 | clk_disable_unprepare(priv->clk); |
| 631 | 636 | tw9910_set_gpio_value(priv->pdn_gpio, 1); | |
| 632 | if (priv->pdn_gpio) { | ||
| 633 | gpiod_set_value(priv->pdn_gpio, 1); | ||
| 634 | usleep_range(500, 1000); | ||
| 635 | } | ||
| 636 | 637 | ||
| 637 | return 0; | 638 | return 0; |
| 638 | } | 639 | } |
| @@ -1000,7 +1001,7 @@ static int tw9910_remove(struct i2c_client *client) | |||
| 1000 | if (priv->pdn_gpio) | 1001 | if (priv->pdn_gpio) |
| 1001 | gpiod_put(priv->pdn_gpio); | 1002 | gpiod_put(priv->pdn_gpio); |
| 1002 | clk_put(priv->clk); | 1003 | clk_put(priv->clk); |
| 1003 | v4l2_device_unregister_subdev(&priv->subdev); | 1004 | v4l2_async_unregister_subdev(&priv->subdev); |
| 1004 | 1005 | ||
| 1005 | return 0; | 1006 | return 0; |
| 1006 | } | 1007 | } |
diff --git a/drivers/media/i2c/video-i2c.c b/drivers/media/i2c/video-i2c.c index 01dcf179f203..abd3152df7d0 100644 --- a/drivers/media/i2c/video-i2c.c +++ b/drivers/media/i2c/video-i2c.c | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | * | 6 | * |
| 7 | * Supported: | 7 | * Supported: |
| 8 | * - Panasonic AMG88xx Grid-Eye Sensors | 8 | * - Panasonic AMG88xx Grid-Eye Sensors |
| 9 | * - Melexis MLX90640 Thermal Cameras | ||
| 9 | */ | 10 | */ |
| 10 | 11 | ||
| 11 | #include <linux/delay.h> | 12 | #include <linux/delay.h> |
| @@ -18,6 +19,7 @@ | |||
| 18 | #include <linux/mutex.h> | 19 | #include <linux/mutex.h> |
| 19 | #include <linux/of_device.h> | 20 | #include <linux/of_device.h> |
| 20 | #include <linux/pm_runtime.h> | 21 | #include <linux/pm_runtime.h> |
| 22 | #include <linux/nvmem-provider.h> | ||
| 21 | #include <linux/regmap.h> | 23 | #include <linux/regmap.h> |
| 22 | #include <linux/sched.h> | 24 | #include <linux/sched.h> |
| 23 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
| @@ -66,12 +68,26 @@ static const struct v4l2_frmsize_discrete amg88xx_size = { | |||
| 66 | .height = 8, | 68 | .height = 8, |
| 67 | }; | 69 | }; |
| 68 | 70 | ||
| 71 | static const struct v4l2_fmtdesc mlx90640_format = { | ||
| 72 | .pixelformat = V4L2_PIX_FMT_Y16_BE, | ||
| 73 | }; | ||
| 74 | |||
| 75 | static const struct v4l2_frmsize_discrete mlx90640_size = { | ||
| 76 | .width = 32, | ||
| 77 | .height = 26, /* 24 lines of pixel data + 2 lines of processing data */ | ||
| 78 | }; | ||
| 79 | |||
| 69 | static const struct regmap_config amg88xx_regmap_config = { | 80 | static const struct regmap_config amg88xx_regmap_config = { |
| 70 | .reg_bits = 8, | 81 | .reg_bits = 8, |
| 71 | .val_bits = 8, | 82 | .val_bits = 8, |
| 72 | .max_register = 0xff | 83 | .max_register = 0xff |
| 73 | }; | 84 | }; |
| 74 | 85 | ||
| 86 | static const struct regmap_config mlx90640_regmap_config = { | ||
| 87 | .reg_bits = 16, | ||
| 88 | .val_bits = 16, | ||
| 89 | }; | ||
| 90 | |||
| 75 | struct video_i2c_chip { | 91 | struct video_i2c_chip { |
| 76 | /* video dimensions */ | 92 | /* video dimensions */ |
| 77 | const struct v4l2_fmtdesc *format; | 93 | const struct v4l2_fmtdesc *format; |
| @@ -88,6 +104,7 @@ struct video_i2c_chip { | |||
| 88 | unsigned int bpp; | 104 | unsigned int bpp; |
| 89 | 105 | ||
| 90 | const struct regmap_config *regmap_config; | 106 | const struct regmap_config *regmap_config; |
| 107 | struct nvmem_config *nvmem_config; | ||
| 91 | 108 | ||
| 92 | /* setup function */ | 109 | /* setup function */ |
| 93 | int (*setup)(struct video_i2c_data *data); | 110 | int (*setup)(struct video_i2c_data *data); |
| @@ -102,6 +119,22 @@ struct video_i2c_chip { | |||
| 102 | int (*hwmon_init)(struct video_i2c_data *data); | 119 | int (*hwmon_init)(struct video_i2c_data *data); |
| 103 | }; | 120 | }; |
| 104 | 121 | ||
| 122 | static int mlx90640_nvram_read(void *priv, unsigned int offset, void *val, | ||
| 123 | size_t bytes) | ||
| 124 | { | ||
| 125 | struct video_i2c_data *data = priv; | ||
| 126 | |||
| 127 | return regmap_bulk_read(data->regmap, 0x2400 + offset, val, bytes); | ||
| 128 | } | ||
| 129 | |||
| 130 | static struct nvmem_config mlx90640_nvram_config = { | ||
| 131 | .name = "mlx90640_nvram", | ||
| 132 | .word_size = 2, | ||
| 133 | .stride = 1, | ||
| 134 | .size = 1664, | ||
| 135 | .reg_read = mlx90640_nvram_read, | ||
| 136 | }; | ||
| 137 | |||
| 105 | /* Power control register */ | 138 | /* Power control register */ |
| 106 | #define AMG88XX_REG_PCTL 0x00 | 139 | #define AMG88XX_REG_PCTL 0x00 |
| 107 | #define AMG88XX_PCTL_NORMAL 0x00 | 140 | #define AMG88XX_PCTL_NORMAL 0x00 |
| @@ -122,12 +155,23 @@ struct video_i2c_chip { | |||
| 122 | /* Temperature register */ | 155 | /* Temperature register */ |
| 123 | #define AMG88XX_REG_T01L 0x80 | 156 | #define AMG88XX_REG_T01L 0x80 |
| 124 | 157 | ||
| 158 | /* Control register */ | ||
| 159 | #define MLX90640_REG_CTL1 0x800d | ||
| 160 | #define MLX90640_REG_CTL1_MASK 0x0380 | ||
| 161 | #define MLX90640_REG_CTL1_MASK_SHIFT 7 | ||
| 162 | |||
| 125 | static int amg88xx_xfer(struct video_i2c_data *data, char *buf) | 163 | static int amg88xx_xfer(struct video_i2c_data *data, char *buf) |
| 126 | { | 164 | { |
| 127 | return regmap_bulk_read(data->regmap, AMG88XX_REG_T01L, buf, | 165 | return regmap_bulk_read(data->regmap, AMG88XX_REG_T01L, buf, |
| 128 | data->chip->buffer_size); | 166 | data->chip->buffer_size); |
| 129 | } | 167 | } |
| 130 | 168 | ||
| 169 | static int mlx90640_xfer(struct video_i2c_data *data, char *buf) | ||
| 170 | { | ||
| 171 | return regmap_bulk_read(data->regmap, 0x400, buf, | ||
| 172 | data->chip->buffer_size); | ||
| 173 | } | ||
| 174 | |||
| 131 | static int amg88xx_setup(struct video_i2c_data *data) | 175 | static int amg88xx_setup(struct video_i2c_data *data) |
| 132 | { | 176 | { |
| 133 | unsigned int mask = AMG88XX_FPSC_1FPS; | 177 | unsigned int mask = AMG88XX_FPSC_1FPS; |
| @@ -141,6 +185,27 @@ static int amg88xx_setup(struct video_i2c_data *data) | |||
| 141 | return regmap_update_bits(data->regmap, AMG88XX_REG_FPSC, mask, val); | 185 | return regmap_update_bits(data->regmap, AMG88XX_REG_FPSC, mask, val); |
| 142 | } | 186 | } |
| 143 | 187 | ||
| 188 | static int mlx90640_setup(struct video_i2c_data *data) | ||
| 189 | { | ||
| 190 | unsigned int n, idx; | ||
| 191 | |||
| 192 | for (n = 0; n < data->chip->num_frame_intervals - 1; n++) { | ||
| 193 | if (data->frame_interval.numerator | ||
| 194 | != data->chip->frame_intervals[n].numerator) | ||
| 195 | continue; | ||
| 196 | |||
| 197 | if (data->frame_interval.denominator | ||
| 198 | == data->chip->frame_intervals[n].denominator) | ||
| 199 | break; | ||
| 200 | } | ||
| 201 | |||
| 202 | idx = data->chip->num_frame_intervals - n - 1; | ||
| 203 | |||
| 204 | return regmap_update_bits(data->regmap, MLX90640_REG_CTL1, | ||
| 205 | MLX90640_REG_CTL1_MASK, | ||
| 206 | idx << MLX90640_REG_CTL1_MASK_SHIFT); | ||
| 207 | } | ||
| 208 | |||
| 144 | static int amg88xx_set_power_on(struct video_i2c_data *data) | 209 | static int amg88xx_set_power_on(struct video_i2c_data *data) |
| 145 | { | 210 | { |
| 146 | int ret; | 211 | int ret; |
| @@ -274,13 +339,27 @@ static int amg88xx_hwmon_init(struct video_i2c_data *data) | |||
| 274 | #define amg88xx_hwmon_init NULL | 339 | #define amg88xx_hwmon_init NULL |
| 275 | #endif | 340 | #endif |
| 276 | 341 | ||
| 277 | #define AMG88XX 0 | 342 | enum { |
| 343 | AMG88XX, | ||
| 344 | MLX90640, | ||
| 345 | }; | ||
| 278 | 346 | ||
| 279 | static const struct v4l2_fract amg88xx_frame_intervals[] = { | 347 | static const struct v4l2_fract amg88xx_frame_intervals[] = { |
| 280 | { 1, 10 }, | 348 | { 1, 10 }, |
| 281 | { 1, 1 }, | 349 | { 1, 1 }, |
| 282 | }; | 350 | }; |
| 283 | 351 | ||
| 352 | static const struct v4l2_fract mlx90640_frame_intervals[] = { | ||
| 353 | { 1, 64 }, | ||
| 354 | { 1, 32 }, | ||
| 355 | { 1, 16 }, | ||
| 356 | { 1, 8 }, | ||
| 357 | { 1, 4 }, | ||
| 358 | { 1, 2 }, | ||
| 359 | { 1, 1 }, | ||
| 360 | { 2, 1 }, | ||
| 361 | }; | ||
| 362 | |||
| 284 | static const struct video_i2c_chip video_i2c_chip[] = { | 363 | static const struct video_i2c_chip video_i2c_chip[] = { |
| 285 | [AMG88XX] = { | 364 | [AMG88XX] = { |
| 286 | .size = &amg88xx_size, | 365 | .size = &amg88xx_size, |
| @@ -295,6 +374,18 @@ static const struct video_i2c_chip video_i2c_chip[] = { | |||
| 295 | .set_power = amg88xx_set_power, | 374 | .set_power = amg88xx_set_power, |
| 296 | .hwmon_init = amg88xx_hwmon_init, | 375 | .hwmon_init = amg88xx_hwmon_init, |
| 297 | }, | 376 | }, |
| 377 | [MLX90640] = { | ||
| 378 | .size = &mlx90640_size, | ||
| 379 | .format = &mlx90640_format, | ||
| 380 | .frame_intervals = mlx90640_frame_intervals, | ||
| 381 | .num_frame_intervals = ARRAY_SIZE(mlx90640_frame_intervals), | ||
| 382 | .buffer_size = 1664, | ||
| 383 | .bpp = 16, | ||
| 384 | .regmap_config = &mlx90640_regmap_config, | ||
| 385 | .nvmem_config = &mlx90640_nvram_config, | ||
| 386 | .setup = mlx90640_setup, | ||
| 387 | .xfer = mlx90640_xfer, | ||
| 388 | }, | ||
| 298 | }; | 389 | }; |
| 299 | 390 | ||
| 300 | static const struct v4l2_file_operations video_i2c_fops = { | 391 | static const struct v4l2_file_operations video_i2c_fops = { |
| @@ -756,6 +847,21 @@ static int video_i2c_probe(struct i2c_client *client, | |||
| 756 | } | 847 | } |
| 757 | } | 848 | } |
| 758 | 849 | ||
| 850 | if (data->chip->nvmem_config) { | ||
| 851 | struct nvmem_config *config = data->chip->nvmem_config; | ||
| 852 | struct nvmem_device *device; | ||
| 853 | |||
| 854 | config->priv = data; | ||
| 855 | config->dev = &client->dev; | ||
| 856 | |||
| 857 | device = devm_nvmem_register(&client->dev, config); | ||
| 858 | |||
| 859 | if (IS_ERR(device)) { | ||
| 860 | dev_warn(&client->dev, | ||
| 861 | "failed to register nvmem device\n"); | ||
| 862 | } | ||
| 863 | } | ||
| 864 | |||
| 759 | ret = video_register_device(&data->vdev, VFL_TYPE_GRABBER, -1); | 865 | ret = video_register_device(&data->vdev, VFL_TYPE_GRABBER, -1); |
| 760 | if (ret < 0) | 866 | if (ret < 0) |
| 761 | goto error_pm_disable; | 867 | goto error_pm_disable; |
| @@ -835,12 +941,14 @@ static const struct dev_pm_ops video_i2c_pm_ops = { | |||
| 835 | 941 | ||
| 836 | static const struct i2c_device_id video_i2c_id_table[] = { | 942 | static const struct i2c_device_id video_i2c_id_table[] = { |
| 837 | { "amg88xx", AMG88XX }, | 943 | { "amg88xx", AMG88XX }, |
| 944 | { "mlx90640", MLX90640 }, | ||
| 838 | {} | 945 | {} |
| 839 | }; | 946 | }; |
| 840 | MODULE_DEVICE_TABLE(i2c, video_i2c_id_table); | 947 | MODULE_DEVICE_TABLE(i2c, video_i2c_id_table); |
| 841 | 948 | ||
| 842 | static const struct of_device_id video_i2c_of_match[] = { | 949 | static const struct of_device_id video_i2c_of_match[] = { |
| 843 | { .compatible = "panasonic,amg88xx", .data = &video_i2c_chip[AMG88XX] }, | 950 | { .compatible = "panasonic,amg88xx", .data = &video_i2c_chip[AMG88XX] }, |
| 951 | { .compatible = "melexis,mlx90640", .data = &video_i2c_chip[MLX90640] }, | ||
| 844 | {} | 952 | {} |
| 845 | }; | 953 | }; |
| 846 | MODULE_DEVICE_TABLE(of, video_i2c_of_match); | 954 | MODULE_DEVICE_TABLE(of, video_i2c_of_match); |
diff --git a/drivers/media/media-request.c b/drivers/media/media-request.c index c71a34ae6383..eec2e2b2f6ec 100644 --- a/drivers/media/media-request.c +++ b/drivers/media/media-request.c | |||
| @@ -100,6 +100,7 @@ static __poll_t media_request_poll(struct file *filp, | |||
| 100 | if (!(poll_requested_events(wait) & EPOLLPRI)) | 100 | if (!(poll_requested_events(wait) & EPOLLPRI)) |
| 101 | return 0; | 101 | return 0; |
| 102 | 102 | ||
| 103 | poll_wait(filp, &req->poll_wait, wait); | ||
| 103 | spin_lock_irqsave(&req->lock, flags); | 104 | spin_lock_irqsave(&req->lock, flags); |
| 104 | if (req->state == MEDIA_REQUEST_STATE_COMPLETE) { | 105 | if (req->state == MEDIA_REQUEST_STATE_COMPLETE) { |
| 105 | ret = EPOLLPRI; | 106 | ret = EPOLLPRI; |
| @@ -110,8 +111,6 @@ static __poll_t media_request_poll(struct file *filp, | |||
| 110 | goto unlock; | 111 | goto unlock; |
| 111 | } | 112 | } |
| 112 | 113 | ||
| 113 | poll_wait(filp, &req->poll_wait, wait); | ||
| 114 | |||
| 115 | unlock: | 114 | unlock: |
| 116 | spin_unlock_irqrestore(&req->lock, flags); | 115 | spin_unlock_irqrestore(&req->lock, flags); |
| 117 | return ret; | 116 | return ret; |
diff --git a/drivers/media/pci/bt8xx/bttv-audio-hook.c b/drivers/media/pci/bt8xx/bttv-audio-hook.c index 346fc7f58839..8febe7358a8f 100644 --- a/drivers/media/pci/bt8xx/bttv-audio-hook.c +++ b/drivers/media/pci/bt8xx/bttv-audio-hook.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Handlers for board audio hooks, splitted from bttv-cards | 2 | * Handlers for board audio hooks, split from bttv-cards |
| 3 | * | 3 | * |
| 4 | * Copyright (c) 2006 Mauro Carvalho Chehab <mchehab@kernel.org> | 4 | * Copyright (c) 2006 Mauro Carvalho Chehab <mchehab@kernel.org> |
| 5 | * This code is placed under the terms of the GNU General Public License | 5 | * This code is placed under the terms of the GNU General Public License |
diff --git a/drivers/media/pci/bt8xx/bttv-audio-hook.h b/drivers/media/pci/bt8xx/bttv-audio-hook.h index be16a537a03a..c61b9ac4f4e3 100644 --- a/drivers/media/pci/bt8xx/bttv-audio-hook.h +++ b/drivers/media/pci/bt8xx/bttv-audio-hook.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Handlers for board audio hooks, splitted from bttv-cards | 2 | * Handlers for board audio hooks, split from bttv-cards |
| 3 | * | 3 | * |
| 4 | * Copyright (c) 2006 Mauro Carvalho Chehab <mchehab@kernel.org> | 4 | * Copyright (c) 2006 Mauro Carvalho Chehab <mchehab@kernel.org> |
| 5 | * This code is placed under the terms of the GNU General Public License | 5 | * This code is placed under the terms of the GNU General Public License |
diff --git a/drivers/media/pci/bt8xx/bttv-cards.c b/drivers/media/pci/bt8xx/bttv-cards.c index 2616243b2c49..b1c6f3e9c3d0 100644 --- a/drivers/media/pci/bt8xx/bttv-cards.c +++ b/drivers/media/pci/bt8xx/bttv-cards.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | 2 | ||
| 3 | bttv-cards.c | 3 | bttv-cards.c |
| 4 | 4 | ||
| 5 | this file has configuration informations - card-specific stuff | 5 | this file has configuration information - card-specific stuff |
| 6 | like the big tvcards array for the most part | 6 | like the big tvcards array for the most part |
| 7 | 7 | ||
| 8 | Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de) | 8 | Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de) |
| @@ -1391,7 +1391,7 @@ struct tvcard bttv_tvcards[] = { | |||
| 1391 | .gpiomux = {0x947fff, 0x987fff,0x947fff,0x947fff }, | 1391 | .gpiomux = {0x947fff, 0x987fff,0x947fff,0x947fff }, |
| 1392 | .gpiomute = 0x947fff, | 1392 | .gpiomute = 0x947fff, |
| 1393 | /* tvtuner, radio, external,internal, mute, stereo | 1393 | /* tvtuner, radio, external,internal, mute, stereo |
| 1394 | * tuner, Composit, SVid, Composit-on-Svid-adapter */ | 1394 | * tuner, Composite, SVid, Composite-on-Svid-adapter */ |
| 1395 | .muxsel = MUXSEL(2, 3, 0, 1), | 1395 | .muxsel = MUXSEL(2, 3, 0, 1), |
| 1396 | .tuner_type = TUNER_MT2032, | 1396 | .tuner_type = TUNER_MT2032, |
| 1397 | .tuner_addr = ADDR_UNSET, | 1397 | .tuner_addr = ADDR_UNSET, |
| @@ -1411,7 +1411,7 @@ struct tvcard bttv_tvcards[] = { | |||
| 1411 | .gpiomux = {0x947fff, 0x987fff,0x947fff,0x947fff }, | 1411 | .gpiomux = {0x947fff, 0x987fff,0x947fff,0x947fff }, |
| 1412 | .gpiomute = 0x947fff, | 1412 | .gpiomute = 0x947fff, |
| 1413 | /* tvtuner, radio, external,internal, mute, stereo | 1413 | /* tvtuner, radio, external,internal, mute, stereo |
| 1414 | * tuner, Composit, SVid, Composit-on-Svid-adapter */ | 1414 | * tuner, Composite, SVid, Composite-on-Svid-adapter */ |
| 1415 | .muxsel = MUXSEL(2, 3, 0, 1), | 1415 | .muxsel = MUXSEL(2, 3, 0, 1), |
| 1416 | .tuner_type = TUNER_MT2032, | 1416 | .tuner_type = TUNER_MT2032, |
| 1417 | .tuner_addr = ADDR_UNSET, | 1417 | .tuner_addr = ADDR_UNSET, |
| @@ -4180,7 +4180,7 @@ static void init_PXC200(struct bttv *btv) | |||
| 4180 | bttv_I2CWrite(btv,0x5E,0,0x80,1); | 4180 | bttv_I2CWrite(btv,0x5E,0,0x80,1); |
| 4181 | 4181 | ||
| 4182 | /* Initialise 12C508 PIC */ | 4182 | /* Initialise 12C508 PIC */ |
| 4183 | /* The I2CWrite and I2CRead commmands are actually to the | 4183 | /* The I2CWrite and I2CRead commands are actually to the |
| 4184 | * same chips - but the R/W bit is included in the address | 4184 | * same chips - but the R/W bit is included in the address |
| 4185 | * argument so the numbers are different */ | 4185 | * argument so the numbers are different */ |
| 4186 | 4186 | ||
| @@ -4289,7 +4289,7 @@ init_RTV24 (struct bttv *btv) | |||
| 4289 | /* ----------------------------------------------------------------------- */ | 4289 | /* ----------------------------------------------------------------------- */ |
| 4290 | /* | 4290 | /* |
| 4291 | * The PCI-8604PW contains a CPLD, probably an ispMACH 4A, that filters | 4291 | * The PCI-8604PW contains a CPLD, probably an ispMACH 4A, that filters |
| 4292 | * the PCI REQ signals comming from the four BT878 chips. After power | 4292 | * the PCI REQ signals coming from the four BT878 chips. After power |
| 4293 | * up, the CPLD does not forward requests to the bus, which prevents | 4293 | * up, the CPLD does not forward requests to the bus, which prevents |
| 4294 | * the BT878 from fetching RISC instructions from memory. While the | 4294 | * the BT878 from fetching RISC instructions from memory. While the |
| 4295 | * CPLD is connected to most of the GPIOs of PCI device 0xD, only | 4295 | * CPLD is connected to most of the GPIOs of PCI device 0xD, only |
| @@ -4405,7 +4405,7 @@ static void rv605_muxsel(struct bttv *btv, unsigned int input) | |||
| 4405 | 4405 | ||
| 4406 | gpio_bits(0x07f, muxgpio[input]); | 4406 | gpio_bits(0x07f, muxgpio[input]); |
| 4407 | 4407 | ||
| 4408 | /* reset all conections */ | 4408 | /* reset all connections */ |
| 4409 | gpio_bits(0x200,0x200); | 4409 | gpio_bits(0x200,0x200); |
| 4410 | mdelay(1); | 4410 | mdelay(1); |
| 4411 | gpio_bits(0x200,0x000); | 4411 | gpio_bits(0x200,0x000); |
diff --git a/drivers/media/pci/bt8xx/bttv-driver.c b/drivers/media/pci/bt8xx/bttv-driver.c index d09785fd37a8..b7150648081d 100644 --- a/drivers/media/pci/bt8xx/bttv-driver.c +++ b/drivers/media/pci/bt8xx/bttv-driver.c | |||
| @@ -2435,7 +2435,7 @@ static int bttv_s_fmt_vid_cap(struct file *file, void *priv, | |||
| 2435 | 2435 | ||
| 2436 | f->fmt.pix.field = field; | 2436 | f->fmt.pix.field = field; |
| 2437 | 2437 | ||
| 2438 | /* update our state informations */ | 2438 | /* update our state information */ |
| 2439 | fh->fmt = fmt; | 2439 | fh->fmt = fmt; |
| 2440 | fh->cap.field = f->fmt.pix.field; | 2440 | fh->cap.field = f->fmt.pix.field; |
| 2441 | fh->cap.last = V4L2_FIELD_NONE; | 2441 | fh->cap.last = V4L2_FIELD_NONE; |
| @@ -3064,7 +3064,7 @@ static int bttv_open(struct file *file) | |||
| 3064 | V4L2 apps we now reset the cropping parameters as seen through | 3064 | V4L2 apps we now reset the cropping parameters as seen through |
| 3065 | this fh, which is to say VIDIOC_G_SELECTION and scaling limit checks | 3065 | this fh, which is to say VIDIOC_G_SELECTION and scaling limit checks |
| 3066 | will use btv->crop[0], the default cropping parameters for the | 3066 | will use btv->crop[0], the default cropping parameters for the |
| 3067 | current video standard, and VIDIOC_S_FMT will not implicitely | 3067 | current video standard, and VIDIOC_S_FMT will not implicitly |
| 3068 | change the cropping parameters until VIDIOC_S_SELECTION has been | 3068 | change the cropping parameters until VIDIOC_S_SELECTION has been |
| 3069 | called. */ | 3069 | called. */ |
| 3070 | fh->do_crop = !reset_crop; /* module parameter */ | 3070 | fh->do_crop = !reset_crop; /* module parameter */ |
| @@ -3600,9 +3600,7 @@ static void | |||
| 3600 | bttv_irq_wakeup_video(struct bttv *btv, struct bttv_buffer_set *wakeup, | 3600 | bttv_irq_wakeup_video(struct bttv *btv, struct bttv_buffer_set *wakeup, |
| 3601 | struct bttv_buffer_set *curr, unsigned int state) | 3601 | struct bttv_buffer_set *curr, unsigned int state) |
| 3602 | { | 3602 | { |
| 3603 | struct timeval ts; | 3603 | u64 ts = ktime_get_ns(); |
| 3604 | |||
| 3605 | v4l2_get_timestamp(&ts); | ||
| 3606 | 3604 | ||
| 3607 | if (wakeup->top == wakeup->bottom) { | 3605 | if (wakeup->top == wakeup->bottom) { |
| 3608 | if (NULL != wakeup->top && curr->top != wakeup->top) { | 3606 | if (NULL != wakeup->top && curr->top != wakeup->top) { |
| @@ -3643,7 +3641,7 @@ bttv_irq_wakeup_vbi(struct bttv *btv, struct bttv_buffer *wakeup, | |||
| 3643 | if (NULL == wakeup) | 3641 | if (NULL == wakeup) |
| 3644 | return; | 3642 | return; |
| 3645 | 3643 | ||
| 3646 | v4l2_get_timestamp(&wakeup->vb.ts); | 3644 | wakeup->vb.ts = ktime_get_ns(); |
| 3647 | wakeup->vb.field_count = btv->field_count; | 3645 | wakeup->vb.field_count = btv->field_count; |
| 3648 | wakeup->vb.state = state; | 3646 | wakeup->vb.state = state; |
| 3649 | wake_up(&wakeup->vb.done); | 3647 | wake_up(&wakeup->vb.done); |
| @@ -3713,7 +3711,7 @@ bttv_irq_wakeup_top(struct bttv *btv) | |||
| 3713 | btv->curr.top = NULL; | 3711 | btv->curr.top = NULL; |
| 3714 | bttv_risc_hook(btv, RISC_SLOT_O_FIELD, NULL, 0); | 3712 | bttv_risc_hook(btv, RISC_SLOT_O_FIELD, NULL, 0); |
| 3715 | 3713 | ||
| 3716 | v4l2_get_timestamp(&wakeup->vb.ts); | 3714 | wakeup->vb.ts = ktime_get_ns(); |
| 3717 | wakeup->vb.field_count = btv->field_count; | 3715 | wakeup->vb.field_count = btv->field_count; |
| 3718 | wakeup->vb.state = VIDEOBUF_DONE; | 3716 | wakeup->vb.state = VIDEOBUF_DONE; |
| 3719 | wake_up(&wakeup->vb.done); | 3717 | wake_up(&wakeup->vb.done); |
diff --git a/drivers/media/pci/bt8xx/bttv-risc.c b/drivers/media/pci/bt8xx/bttv-risc.c index 74aff6877d9c..6b3c73674a3c 100644 --- a/drivers/media/pci/bt8xx/bttv-risc.c +++ b/drivers/media/pci/bt8xx/bttv-risc.c | |||
| @@ -93,7 +93,7 @@ bttv_risc_packed(struct bttv *btv, struct btcx_riscmem *risc, | |||
| 93 | *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset); | 93 | *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset); |
| 94 | offset+=bpl; | 94 | offset+=bpl; |
| 95 | } else { | 95 | } else { |
| 96 | /* scanline needs to be splitted */ | 96 | /* scanline needs to be split */ |
| 97 | todo = bpl; | 97 | todo = bpl; |
| 98 | *(rp++)=cpu_to_le32(BT848_RISC_WRITE|BT848_RISC_SOL| | 98 | *(rp++)=cpu_to_le32(BT848_RISC_WRITE|BT848_RISC_SOL| |
| 99 | (sg_dma_len(sg)-offset)); | 99 | (sg_dma_len(sg)-offset)); |
diff --git a/drivers/media/pci/bt8xx/bttv.h b/drivers/media/pci/bt8xx/bttv.h index a27384adadd2..d24b9ef9f59f 100644 --- a/drivers/media/pci/bt8xx/bttv.h +++ b/drivers/media/pci/bt8xx/bttv.h | |||
| @@ -288,7 +288,7 @@ extern void bttv_init_card1(struct bttv *btv); | |||
| 288 | extern void bttv_init_card2(struct bttv *btv); | 288 | extern void bttv_init_card2(struct bttv *btv); |
| 289 | extern void bttv_init_tuner(struct bttv *btv); | 289 | extern void bttv_init_tuner(struct bttv *btv); |
| 290 | 290 | ||
| 291 | /* card-specific funtions */ | 291 | /* card-specific functions */ |
| 292 | extern void tea5757_set_freq(struct bttv *btv, unsigned short freq); | 292 | extern void tea5757_set_freq(struct bttv *btv, unsigned short freq); |
| 293 | extern u32 bttv_tda9880_setnorm(struct bttv *btv, u32 gpiobits); | 293 | extern u32 bttv_tda9880_setnorm(struct bttv *btv, u32 gpiobits); |
| 294 | 294 | ||
diff --git a/drivers/media/pci/bt8xx/dst.c b/drivers/media/pci/bt8xx/dst.c index b98de2a22f78..c94318c71a0c 100644 --- a/drivers/media/pci/bt8xx/dst.c +++ b/drivers/media/pci/bt8xx/dst.c | |||
| @@ -1295,15 +1295,15 @@ static int dst_get_signal(struct dst_state *state) | |||
| 1295 | 1295 | ||
| 1296 | static int dst_tone_power_cmd(struct dst_state *state) | 1296 | static int dst_tone_power_cmd(struct dst_state *state) |
| 1297 | { | 1297 | { |
| 1298 | u8 paket[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 }; | 1298 | u8 packet[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 }; |
| 1299 | 1299 | ||
| 1300 | if (state->dst_type != DST_TYPE_IS_SAT) | 1300 | if (state->dst_type != DST_TYPE_IS_SAT) |
| 1301 | return -EOPNOTSUPP; | 1301 | return -EOPNOTSUPP; |
| 1302 | paket[4] = state->tx_tuna[4]; | 1302 | packet[4] = state->tx_tuna[4]; |
| 1303 | paket[2] = state->tx_tuna[2]; | 1303 | packet[2] = state->tx_tuna[2]; |
| 1304 | paket[3] = state->tx_tuna[3]; | 1304 | packet[3] = state->tx_tuna[3]; |
| 1305 | paket[7] = dst_check_sum (paket, 7); | 1305 | packet[7] = dst_check_sum (packet, 7); |
| 1306 | return dst_command(state, paket, 8); | 1306 | return dst_command(state, packet, 8); |
| 1307 | } | 1307 | } |
| 1308 | 1308 | ||
| 1309 | static int dst_get_tuna(struct dst_state *state) | 1309 | static int dst_get_tuna(struct dst_state *state) |
| @@ -1429,18 +1429,18 @@ error: | |||
| 1429 | static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd) | 1429 | static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd) |
| 1430 | { | 1430 | { |
| 1431 | struct dst_state *state = fe->demodulator_priv; | 1431 | struct dst_state *state = fe->demodulator_priv; |
| 1432 | u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec }; | 1432 | u8 packet[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec }; |
| 1433 | 1433 | ||
| 1434 | if (state->dst_type != DST_TYPE_IS_SAT) | 1434 | if (state->dst_type != DST_TYPE_IS_SAT) |
| 1435 | return -EOPNOTSUPP; | 1435 | return -EOPNOTSUPP; |
| 1436 | if (cmd->msg_len > 0 && cmd->msg_len < 5) | 1436 | if (cmd->msg_len > 0 && cmd->msg_len < 5) |
| 1437 | memcpy(&paket[3], cmd->msg, cmd->msg_len); | 1437 | memcpy(&packet[3], cmd->msg, cmd->msg_len); |
| 1438 | else if (cmd->msg_len == 5 && state->dst_hw_cap & DST_TYPE_HAS_DISEQC5) | 1438 | else if (cmd->msg_len == 5 && state->dst_hw_cap & DST_TYPE_HAS_DISEQC5) |
| 1439 | memcpy(&paket[2], cmd->msg, cmd->msg_len); | 1439 | memcpy(&packet[2], cmd->msg, cmd->msg_len); |
| 1440 | else | 1440 | else |
| 1441 | return -EINVAL; | 1441 | return -EINVAL; |
| 1442 | paket[7] = dst_check_sum(&paket[0], 7); | 1442 | packet[7] = dst_check_sum(&packet[0], 7); |
| 1443 | return dst_command(state, paket, 8); | 1443 | return dst_command(state, packet, 8); |
| 1444 | } | 1444 | } |
| 1445 | 1445 | ||
| 1446 | static int dst_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage) | 1446 | static int dst_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage) |
diff --git a/drivers/media/pci/cobalt/cobalt-v4l2.c b/drivers/media/pci/cobalt/cobalt-v4l2.c index c088de551081..f9fa3a7c3b8f 100644 --- a/drivers/media/pci/cobalt/cobalt-v4l2.c +++ b/drivers/media/pci/cobalt/cobalt-v4l2.c | |||
| @@ -375,7 +375,7 @@ static void cobalt_dma_stop_streaming(struct cobalt_stream *s) | |||
| 375 | } | 375 | } |
| 376 | spin_unlock_irqrestore(&s->irqlock, flags); | 376 | spin_unlock_irqrestore(&s->irqlock, flags); |
| 377 | 377 | ||
| 378 | /* Wait 100 milisecond for DMA to finish, abort on timeout. */ | 378 | /* Wait 100 millisecond for DMA to finish, abort on timeout. */ |
| 379 | if (!wait_event_timeout(s->q.done_wq, is_dma_done(s), | 379 | if (!wait_event_timeout(s->q.done_wq, is_dma_done(s), |
| 380 | msecs_to_jiffies(timeout_msec))) { | 380 | msecs_to_jiffies(timeout_msec))) { |
| 381 | omni_sg_dma_abort_channel(s); | 381 | omni_sg_dma_abort_channel(s); |
diff --git a/drivers/media/pci/cx18/cx18-cards.h b/drivers/media/pci/cx18/cx18-cards.h index 02d0fb703a41..c563cc2358ba 100644 --- a/drivers/media/pci/cx18/cx18-cards.h +++ b/drivers/media/pci/cx18/cx18-cards.h | |||
| @@ -83,7 +83,7 @@ struct cx18_gpio_i2c_slave_reset { | |||
| 83 | u32 active_hi_mask; /* GPIO outputs that reset i2c chips when high */ | 83 | u32 active_hi_mask; /* GPIO outputs that reset i2c chips when high */ |
| 84 | int msecs_asserted; /* time period reset must remain asserted */ | 84 | int msecs_asserted; /* time period reset must remain asserted */ |
| 85 | int msecs_recovery; /* time after deassert for chips to be ready */ | 85 | int msecs_recovery; /* time after deassert for chips to be ready */ |
| 86 | u32 ir_reset_mask; /* GPIO to reset the Zilog Z8F0811 IR contoller */ | 86 | u32 ir_reset_mask; /* GPIO to reset the Zilog Z8F0811 IR controller */ |
| 87 | }; | 87 | }; |
| 88 | 88 | ||
| 89 | struct cx18_gpio_audio_input { /* select tuner/line in input */ | 89 | struct cx18_gpio_audio_input { /* select tuner/line in input */ |
diff --git a/drivers/media/pci/cx18/cx18-dvb.c b/drivers/media/pci/cx18/cx18-dvb.c index a3a7f7065349..61452c50a9c3 100644 --- a/drivers/media/pci/cx18/cx18-dvb.c +++ b/drivers/media/pci/cx18/cx18-dvb.c | |||
| @@ -120,8 +120,8 @@ static struct zl10353_config leadtek_dvr3100h_demod = { | |||
| 120 | /* | 120 | /* |
| 121 | * Due to | 121 | * Due to |
| 122 | * | 122 | * |
| 123 | * 1. an absence of information on how to prgram the MT352 | 123 | * 1. an absence of information on how to program the MT352 |
| 124 | * 2. the Linux mt352 module pushing MT352 initialzation off onto us here | 124 | * 2. the Linux mt352 module pushing MT352 initialization off onto us here |
| 125 | * | 125 | * |
| 126 | * We have to use an init sequence that *you* must extract from the Windows | 126 | * We have to use an init sequence that *you* must extract from the Windows |
| 127 | * driver (yuanrap.sys) and which we load as a firmware. | 127 | * driver (yuanrap.sys) and which we load as a firmware. |
| @@ -458,7 +458,7 @@ void cx18_dvb_unregister(struct cx18_stream *stream) | |||
| 458 | dvb_unregister_adapter(dvb_adapter); | 458 | dvb_unregister_adapter(dvb_adapter); |
| 459 | } | 459 | } |
| 460 | 460 | ||
| 461 | /* All the DVB attach calls go here, this function get's modified | 461 | /* All the DVB attach calls go here, this function gets modified |
| 462 | * for each new card. cx18_dvb_start_feed() will also need changes. | 462 | * for each new card. cx18_dvb_start_feed() will also need changes. |
| 463 | */ | 463 | */ |
| 464 | static int dvb_register(struct cx18_stream *stream) | 464 | static int dvb_register(struct cx18_stream *stream) |
diff --git a/drivers/media/pci/cx18/cx18-fileops.c b/drivers/media/pci/cx18/cx18-fileops.c index a3f44e30f821..f778965a2eb8 100644 --- a/drivers/media/pci/cx18/cx18-fileops.c +++ b/drivers/media/pci/cx18/cx18-fileops.c | |||
| @@ -403,7 +403,7 @@ static size_t cx18_copy_mdl_to_user(struct cx18_stream *s, | |||
| 403 | tot_written += rc; | 403 | tot_written += rc; |
| 404 | 404 | ||
| 405 | if (stop || /* Forced stopping point for VBI insertion */ | 405 | if (stop || /* Forced stopping point for VBI insertion */ |
| 406 | tot_written >= ucount || /* Reader request statisfied */ | 406 | tot_written >= ucount || /* Reader request satisfied */ |
| 407 | mdl->curr_buf->readpos < mdl->curr_buf->bytesused || | 407 | mdl->curr_buf->readpos < mdl->curr_buf->bytesused || |
| 408 | mdl->readpos >= mdl->bytesused) /* MDL buffers drained */ | 408 | mdl->readpos >= mdl->bytesused) /* MDL buffers drained */ |
| 409 | break; | 409 | break; |
diff --git a/drivers/media/pci/cx18/cx18-io.h b/drivers/media/pci/cx18/cx18-io.h index a3c96fb5d28d..da7871fdb56d 100644 --- a/drivers/media/pci/cx18/cx18-io.h +++ b/drivers/media/pci/cx18/cx18-io.h | |||
| @@ -23,7 +23,7 @@ | |||
| 23 | /* | 23 | /* |
| 24 | * Readback and retry of MMIO access for reliability: | 24 | * Readback and retry of MMIO access for reliability: |
| 25 | * The concept was suggested by Steve Toth <stoth@linuxtv.org>. | 25 | * The concept was suggested by Steve Toth <stoth@linuxtv.org>. |
| 26 | * The implmentation is the fault of Andy Walls <awalls@md.metrocast.net>. | 26 | * The implementation is the fault of Andy Walls <awalls@md.metrocast.net>. |
| 27 | * | 27 | * |
| 28 | * *write* functions are implied to retry the mmio unless suffixed with _noretry | 28 | * *write* functions are implied to retry the mmio unless suffixed with _noretry |
| 29 | * *read* functions never retry the mmio (it never helps to do so) | 29 | * *read* functions never retry the mmio (it never helps to do so) |
diff --git a/drivers/media/pci/cx18/cx18-mailbox.c b/drivers/media/pci/cx18/cx18-mailbox.c index f66dd63e1994..0ffd2196a980 100644 --- a/drivers/media/pci/cx18/cx18-mailbox.c +++ b/drivers/media/pci/cx18/cx18-mailbox.c | |||
| @@ -197,7 +197,7 @@ static void cx18_mdl_send_to_videobuf(struct cx18_stream *s, | |||
| 197 | } | 197 | } |
| 198 | 198 | ||
| 199 | if (dispatch) { | 199 | if (dispatch) { |
| 200 | v4l2_get_timestamp(&vb_buf->vb.ts); | 200 | vb_buf->vb.ts = ktime_get_ns(); |
| 201 | list_del(&vb_buf->vb.queue); | 201 | list_del(&vb_buf->vb.queue); |
| 202 | vb_buf->vb.state = VIDEOBUF_DONE; | 202 | vb_buf->vb.state = VIDEOBUF_DONE; |
| 203 | wake_up(&vb_buf->vb.done); | 203 | wake_up(&vb_buf->vb.done); |
diff --git a/drivers/media/pci/cx18/cx18-vbi.c b/drivers/media/pci/cx18/cx18-vbi.c index 81f1e27436fd..48cb96f953a0 100644 --- a/drivers/media/pci/cx18/cx18-vbi.c +++ b/drivers/media/pci/cx18/cx18-vbi.c | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | /* | 24 | /* |
| 25 | * Raster Reference/Protection (RP) bytes, used in Start/End Active | 25 | * Raster Reference/Protection (RP) bytes, used in Start/End Active |
| 26 | * Video codes emitted from the digitzer in VIP 1.x mode, that flag the start | 26 | * Video codes emitted from the digitzer in VIP 1.x mode, that flag the start |
| 27 | * of VBI sample or VBI ancillary data regions in the digitial ratser line. | 27 | * of VBI sample or VBI ancillary data regions in the digital ratser line. |
| 28 | * | 28 | * |
| 29 | * Task FieldEven VerticalBlank HorizontalBlank 0 0 0 0 | 29 | * Task FieldEven VerticalBlank HorizontalBlank 0 0 0 0 |
| 30 | */ | 30 | */ |
diff --git a/drivers/media/pci/cx18/cx23418.h b/drivers/media/pci/cx18/cx23418.h index 15205b662952..e9f6e50ca5b4 100644 --- a/drivers/media/pci/cx18/cx23418.h +++ b/drivers/media/pci/cx18/cx23418.h | |||
| @@ -439,7 +439,7 @@ | |||
| 439 | /* Error in I2C data xfer (but I2C device is present) */ | 439 | /* Error in I2C data xfer (but I2C device is present) */ |
| 440 | #define CXERR_I2CDEV_XFERERR 0x000011 | 440 | #define CXERR_I2CDEV_XFERERR 0x000011 |
| 441 | 441 | ||
| 442 | /* Chanel changing component not ready */ | 442 | /* Channel changing component not ready */ |
| 443 | #define CXERR_CHANNELNOTREADY 0x000012 | 443 | #define CXERR_CHANNELNOTREADY 0x000012 |
| 444 | 444 | ||
| 445 | /* PPU (Presensation/Decoder) mail box is corrupted */ | 445 | /* PPU (Presensation/Decoder) mail box is corrupted */ |
diff --git a/drivers/media/pci/cx23885/cx23885-417.c b/drivers/media/pci/cx23885/cx23885-417.c index a00b77d80ed9..4863bd4ea5d0 100644 --- a/drivers/media/pci/cx23885/cx23885-417.c +++ b/drivers/media/pci/cx23885/cx23885-417.c | |||
| @@ -1561,7 +1561,7 @@ int cx23885_417_register(struct cx23885_dev *dev) | |||
| 1561 | pr_info("%s: registered device %s [mpeg]\n", | 1561 | pr_info("%s: registered device %s [mpeg]\n", |
| 1562 | dev->name, video_device_node_name(dev->v4l_device)); | 1562 | dev->name, video_device_node_name(dev->v4l_device)); |
| 1563 | 1563 | ||
| 1564 | /* ST: Configure the encoder paramaters, but don't begin | 1564 | /* ST: Configure the encoder parameters, but don't begin |
| 1565 | * encoding, this resolves an issue where the first time the | 1565 | * encoding, this resolves an issue where the first time the |
| 1566 | * encoder is started video can be choppy. | 1566 | * encoder is started video can be choppy. |
| 1567 | */ | 1567 | */ |
diff --git a/drivers/media/pci/cx23885/cx23885-alsa.c b/drivers/media/pci/cx23885/cx23885-alsa.c index ee9d329c4038..c9c1385208f9 100644 --- a/drivers/media/pci/cx23885/cx23885-alsa.c +++ b/drivers/media/pci/cx23885/cx23885-alsa.c | |||
| @@ -59,7 +59,7 @@ module_param(audio_debug, int, 0644); | |||
| 59 | MODULE_PARM_DESC(audio_debug, "enable debug messages [analog audio]"); | 59 | MODULE_PARM_DESC(audio_debug, "enable debug messages [analog audio]"); |
| 60 | 60 | ||
| 61 | /**************************************************************************** | 61 | /**************************************************************************** |
| 62 | Board specific funtions | 62 | Board specific functions |
| 63 | ****************************************************************************/ | 63 | ****************************************************************************/ |
| 64 | 64 | ||
| 65 | /* Constants taken from cx88-reg.h */ | 65 | /* Constants taken from cx88-reg.h */ |
diff --git a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c index fd5c52b21436..cec3cbca8d32 100644 --- a/drivers/media/pci/cx23885/cx23885-core.c +++ b/drivers/media/pci/cx23885/cx23885-core.c | |||
| @@ -1996,9 +1996,9 @@ static inline int encoder_on_portc(struct cx23885_dev *dev) | |||
| 1996 | * and report errors if we think we're tampering with a GPIo that might | 1996 | * and report errors if we think we're tampering with a GPIo that might |
| 1997 | * be assigned to the encoder (and used for the host bus). | 1997 | * be assigned to the encoder (and used for the host bus). |
| 1998 | * | 1998 | * |
| 1999 | * GPIO 2 thru 0 - On the cx23885 bridge | 1999 | * GPIO 2 through 0 - On the cx23885 bridge |
| 2000 | * GPIO 18 thru 3 - On the cx23417 host bus interface | 2000 | * GPIO 18 through 3 - On the cx23417 host bus interface |
| 2001 | * GPIO 23 thru 19 - On the cx25840 a/v core | 2001 | * GPIO 23 through 19 - On the cx25840 a/v core |
| 2002 | */ | 2002 | */ |
| 2003 | void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask) | 2003 | void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask) |
| 2004 | { | 2004 | { |
diff --git a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h index cf965efabe66..4d34799431dc 100644 --- a/drivers/media/pci/cx23885/cx23885.h +++ b/drivers/media/pci/cx23885/cx23885.h | |||
| @@ -246,7 +246,7 @@ struct cx23885_i2c { | |||
| 246 | struct i2c_client i2c_client; | 246 | struct i2c_client i2c_client; |
| 247 | u32 i2c_rc; | 247 | u32 i2c_rc; |
| 248 | 248 | ||
| 249 | /* 885 registers used for raw addess */ | 249 | /* 885 registers used for raw address */ |
| 250 | u32 i2c_period; | 250 | u32 i2c_period; |
| 251 | u32 reg_ctrl; | 251 | u32 reg_ctrl; |
| 252 | u32 reg_stat; | 252 | u32 reg_stat; |
diff --git a/drivers/media/pci/cx23885/cx23888-ir.c b/drivers/media/pci/cx23885/cx23888-ir.c index 1d775c90df51..a4d66141c4bb 100644 --- a/drivers/media/pci/cx23885/cx23888-ir.c +++ b/drivers/media/pci/cx23885/cx23888-ir.c | |||
| @@ -548,7 +548,7 @@ static int cx23888_ir_irq_handler(struct v4l2_subdev *sd, u32 status, | |||
| 548 | ror = stats & STATS_ROR; /* Rx FIFO Over Run */ | 548 | ror = stats & STATS_ROR; /* Rx FIFO Over Run */ |
| 549 | 549 | ||
| 550 | tse = irqen & IRQEN_TSE; /* Tx FIFO Service Request IRQ Enable */ | 550 | tse = irqen & IRQEN_TSE; /* Tx FIFO Service Request IRQ Enable */ |
| 551 | rse = irqen & IRQEN_RSE; /* Rx FIFO Service Reuqest IRQ Enable */ | 551 | rse = irqen & IRQEN_RSE; /* Rx FIFO Service Request IRQ Enable */ |
| 552 | rte = irqen & IRQEN_RTE; /* Rx Pulse Width Timer Time Out IRQ Enable */ | 552 | rte = irqen & IRQEN_RTE; /* Rx Pulse Width Timer Time Out IRQ Enable */ |
| 553 | roe = irqen & IRQEN_ROE; /* Rx FIFO Over Run IRQ Enable */ | 553 | roe = irqen & IRQEN_ROE; /* Rx FIFO Over Run IRQ Enable */ |
| 554 | 554 | ||
| @@ -638,7 +638,7 @@ static int cx23888_ir_irq_handler(struct v4l2_subdev *sd, u32 status, | |||
| 638 | events |= V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED; | 638 | events |= V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED; |
| 639 | } | 639 | } |
| 640 | if (v) { | 640 | if (v) { |
| 641 | /* Clear STATS_ROR & STATS_RTO as needed by reseting hardware */ | 641 | /* Clear STATS_ROR & STATS_RTO as needed by resetting hardware */ |
| 642 | cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl & ~v); | 642 | cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl & ~v); |
| 643 | cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl); | 643 | cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl); |
| 644 | *handled = true; | 644 | *handled = true; |
diff --git a/drivers/media/pci/cx25821/cx25821-alsa.c b/drivers/media/pci/cx25821/cx25821-alsa.c index 0a6c90e92557..926e12a1554a 100644 --- a/drivers/media/pci/cx25821/cx25821-alsa.c +++ b/drivers/media/pci/cx25821/cx25821-alsa.c | |||
| @@ -120,7 +120,7 @@ module_param(debug, int, 0644); | |||
| 120 | MODULE_PARM_DESC(debug, "enable debug messages"); | 120 | MODULE_PARM_DESC(debug, "enable debug messages"); |
| 121 | 121 | ||
| 122 | /**************************************************************************** | 122 | /**************************************************************************** |
| 123 | Module specific funtions | 123 | Module specific functions |
| 124 | ****************************************************************************/ | 124 | ****************************************************************************/ |
| 125 | /* Constants taken from cx88-reg.h */ | 125 | /* Constants taken from cx88-reg.h */ |
| 126 | #define AUD_INT_DN_RISCI1 (1 << 0) | 126 | #define AUD_INT_DN_RISCI1 (1 << 0) |
diff --git a/drivers/media/pci/cx25821/cx25821-sram.h b/drivers/media/pci/cx25821/cx25821-sram.h index b94e0d4df664..a907662dbb1c 100644 --- a/drivers/media/pci/cx25821/cx25821-sram.h +++ b/drivers/media/pci/cx25821/cx25821-sram.h | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | #define AUDIO_CMDS_SIZE 80 /* AUDIO CMDS size in bytes */ | 24 | #define AUDIO_CMDS_SIZE 80 /* AUDIO CMDS size in bytes */ |
| 25 | #define MBIF_CMDS_SIZE 80 /* MBIF CMDS size in bytes */ | 25 | #define MBIF_CMDS_SIZE 80 /* MBIF CMDS size in bytes */ |
| 26 | 26 | ||
| 27 | /* #define RX_SRAM_POOL_START_SIZE = 0; // Start of useable RX SRAM for buffers */ | 27 | /* #define RX_SRAM_POOL_START_SIZE = 0; // Start of usable RX SRAM for buffers */ |
| 28 | #define VID_IQ_SIZE 64 /* VID instruction queue size in bytes */ | 28 | #define VID_IQ_SIZE 64 /* VID instruction queue size in bytes */ |
| 29 | #define MBIF_IQ_SIZE 64 | 29 | #define MBIF_IQ_SIZE 64 |
| 30 | #define AUDIO_IQ_SIZE 64 /* AUD instruction queue size in bytes */ | 30 | #define AUDIO_IQ_SIZE 64 /* AUD instruction queue size in bytes */ |
diff --git a/drivers/media/pci/cx25821/cx25821.h b/drivers/media/pci/cx25821/cx25821.h index 25eba4ac4499..b422275ff4f1 100644 --- a/drivers/media/pci/cx25821/cx25821.h +++ b/drivers/media/pci/cx25821/cx25821.h | |||
| @@ -156,7 +156,7 @@ struct cx25821_i2c { | |||
| 156 | struct i2c_client i2c_client; | 156 | struct i2c_client i2c_client; |
| 157 | u32 i2c_rc; | 157 | u32 i2c_rc; |
| 158 | 158 | ||
| 159 | /* cx25821 registers used for raw addess */ | 159 | /* cx25821 registers used for raw address */ |
| 160 | u32 i2c_period; | 160 | u32 i2c_period; |
| 161 | u32 reg_ctrl; | 161 | u32 reg_ctrl; |
| 162 | u32 reg_stat; | 162 | u32 reg_stat; |
diff --git a/drivers/media/pci/dm1105/dm1105.c b/drivers/media/pci/dm1105/dm1105.c index a84c8270ea13..60138ca3372b 100644 --- a/drivers/media/pci/dm1105/dm1105.c +++ b/drivers/media/pci/dm1105/dm1105.c | |||
| @@ -517,7 +517,7 @@ static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
| 517 | msgs[i].buf[byte] = rc; | 517 | msgs[i].buf[byte] = rc; |
| 518 | } | 518 | } |
| 519 | } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) { | 519 | } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) { |
| 520 | /* prepaired for cx24116 firmware */ | 520 | /* prepared for cx24116 firmware */ |
| 521 | /* Write in small blocks */ | 521 | /* Write in small blocks */ |
| 522 | len = msgs[i].len - 1; | 522 | len = msgs[i].len - 1; |
| 523 | k = 1; | 523 | k = 1; |
diff --git a/drivers/media/pci/intel/ipu3/ipu3-cio2.c b/drivers/media/pci/intel/ipu3/ipu3-cio2.c index cdb79ae2d8dc..617fb2e944dc 100644 --- a/drivers/media/pci/intel/ipu3/ipu3-cio2.c +++ b/drivers/media/pci/intel/ipu3/ipu3-cio2.c | |||
| @@ -264,7 +264,7 @@ static void cio2_fbpt_exit(struct cio2_queue *q, struct device *dev) | |||
| 264 | */ | 264 | */ |
| 265 | 265 | ||
| 266 | /* | 266 | /* |
| 267 | * shift for keeping value range suitable for 32-bit integer arithmetics | 267 | * shift for keeping value range suitable for 32-bit integer arithmetic |
| 268 | */ | 268 | */ |
| 269 | #define LIMIT_SHIFT 8 | 269 | #define LIMIT_SHIFT 8 |
| 270 | 270 | ||
| @@ -1810,7 +1810,8 @@ static int cio2_pci_probe(struct pci_dev *pci_dev, | |||
| 1810 | 1810 | ||
| 1811 | /* Register notifier for subdevices we care */ | 1811 | /* Register notifier for subdevices we care */ |
| 1812 | r = cio2_notifier_init(cio2); | 1812 | r = cio2_notifier_init(cio2); |
| 1813 | if (r) | 1813 | /* Proceed without sensors connected to allow the device to suspend. */ |
| 1814 | if (r && r != -ENODEV) | ||
| 1814 | goto fail_cio2_queue_exit; | 1815 | goto fail_cio2_queue_exit; |
| 1815 | 1816 | ||
| 1816 | r = devm_request_irq(&pci_dev->dev, pci_dev->irq, cio2_irq, | 1817 | r = devm_request_irq(&pci_dev->dev, pci_dev->irq, cio2_irq, |
| @@ -2047,7 +2048,7 @@ module_pci_driver(cio2_pci_driver); | |||
| 2047 | 2048 | ||
| 2048 | MODULE_AUTHOR("Tuukka Toivonen <tuukka.toivonen@intel.com>"); | 2049 | MODULE_AUTHOR("Tuukka Toivonen <tuukka.toivonen@intel.com>"); |
| 2049 | MODULE_AUTHOR("Tianshu Qiu <tian.shu.qiu@intel.com>"); | 2050 | MODULE_AUTHOR("Tianshu Qiu <tian.shu.qiu@intel.com>"); |
| 2050 | MODULE_AUTHOR("Jian Xu Zheng <jian.xu.zheng@intel.com>"); | 2051 | MODULE_AUTHOR("Jian Xu Zheng"); |
| 2051 | MODULE_AUTHOR("Yuning Pu <yuning.pu@intel.com>"); | 2052 | MODULE_AUTHOR("Yuning Pu <yuning.pu@intel.com>"); |
| 2052 | MODULE_AUTHOR("Yong Zhi <yong.zhi@intel.com>"); | 2053 | MODULE_AUTHOR("Yong Zhi <yong.zhi@intel.com>"); |
| 2053 | MODULE_LICENSE("GPL v2"); | 2054 | MODULE_LICENSE("GPL v2"); |
diff --git a/drivers/media/pci/ivtv/Kconfig b/drivers/media/pci/ivtv/Kconfig index c72cbbd2d40c..06ca4e23f9fb 100644 --- a/drivers/media/pci/ivtv/Kconfig +++ b/drivers/media/pci/ivtv/Kconfig | |||
| @@ -70,8 +70,25 @@ config VIDEO_FB_IVTV | |||
| 70 | This is used in the Hauppauge PVR-350 card. There is a driver | 70 | This is used in the Hauppauge PVR-350 card. There is a driver |
| 71 | homepage at <http://www.ivtvdriver.org>. | 71 | homepage at <http://www.ivtvdriver.org>. |
| 72 | 72 | ||
| 73 | In order to use this module, you will need to boot with PAT disabled | ||
| 74 | on x86 systems, using the nopat kernel parameter. | ||
| 75 | |||
| 76 | To compile this driver as a module, choose M here: the | 73 | To compile this driver as a module, choose M here: the |
| 77 | module will be called ivtvfb. | 74 | module will be called ivtvfb. |
| 75 | |||
| 76 | config VIDEO_FB_IVTV_FORCE_PAT | ||
| 77 | bool "force cx23415 framebuffer init with x86 PAT enabled" | ||
| 78 | depends on VIDEO_FB_IVTV && X86_PAT | ||
| 79 | default n | ||
| 80 | ---help--- | ||
| 81 | With PAT enabled, the cx23415 framebuffer driver does not | ||
| 82 | utilize write-combined caching on the framebuffer memory. | ||
| 83 | For this reason, the driver will by default disable itself | ||
| 84 | when initializied on a kernel with PAT enabled (i.e. not | ||
| 85 | using the nopat kernel parameter). | ||
| 86 | |||
| 87 | The driver is not easily upgradable to the PAT-aware | ||
| 88 | ioremap_wc() API since the firmware hides the address | ||
| 89 | ranges that should be marked write-combined from the driver. | ||
| 90 | |||
| 91 | With this setting enabled, the framebuffer will initialize on | ||
| 92 | PAT-enabled systems but the framebuffer memory will be uncached. | ||
| 93 | |||
| 94 | If unsure, say N. | ||
diff --git a/drivers/media/pci/ivtv/ivtv-yuv.c b/drivers/media/pci/ivtv/ivtv-yuv.c index 1380474519f2..c3c2c79585f5 100644 --- a/drivers/media/pci/ivtv/ivtv-yuv.c +++ b/drivers/media/pci/ivtv/ivtv-yuv.c | |||
| @@ -110,7 +110,7 @@ static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma, | |||
| 110 | /* | 110 | /* |
| 111 | * Inherit the -EFAULT from rc's | 111 | * Inherit the -EFAULT from rc's |
| 112 | * initialization, but allow it to be | 112 | * initialization, but allow it to be |
| 113 | * overriden by uv_pages above if it was an | 113 | * overridden by uv_pages above if it was an |
| 114 | * actual errno. | 114 | * actual errno. |
| 115 | */ | 115 | */ |
| 116 | } else { | 116 | } else { |
diff --git a/drivers/media/pci/ivtv/ivtvfb.c b/drivers/media/pci/ivtv/ivtvfb.c index 8ec2525d8ef5..cfd21040d0e3 100644 --- a/drivers/media/pci/ivtv/ivtvfb.c +++ b/drivers/media/pci/ivtv/ivtvfb.c | |||
| @@ -55,6 +55,7 @@ | |||
| 55 | /* card parameters */ | 55 | /* card parameters */ |
| 56 | static int ivtvfb_card_id = -1; | 56 | static int ivtvfb_card_id = -1; |
| 57 | static int ivtvfb_debug = 0; | 57 | static int ivtvfb_debug = 0; |
| 58 | static bool ivtvfb_force_pat = IS_ENABLED(CONFIG_VIDEO_FB_IVTV_FORCE_PAT); | ||
| 58 | static bool osd_laced; | 59 | static bool osd_laced; |
| 59 | static int osd_depth; | 60 | static int osd_depth; |
| 60 | static int osd_upper; | 61 | static int osd_upper; |
| @@ -64,6 +65,7 @@ static int osd_xres; | |||
| 64 | 65 | ||
| 65 | module_param(ivtvfb_card_id, int, 0444); | 66 | module_param(ivtvfb_card_id, int, 0444); |
| 66 | module_param_named(debug,ivtvfb_debug, int, 0644); | 67 | module_param_named(debug,ivtvfb_debug, int, 0644); |
| 68 | module_param_named(force_pat, ivtvfb_force_pat, bool, 0644); | ||
| 67 | module_param(osd_laced, bool, 0444); | 69 | module_param(osd_laced, bool, 0444); |
| 68 | module_param(osd_depth, int, 0444); | 70 | module_param(osd_depth, int, 0444); |
| 69 | module_param(osd_upper, int, 0444); | 71 | module_param(osd_upper, int, 0444); |
| @@ -79,6 +81,9 @@ MODULE_PARM_DESC(debug, | |||
| 79 | "Debug level (bitmask). Default: errors only\n" | 81 | "Debug level (bitmask). Default: errors only\n" |
| 80 | "\t\t\t(debug = 3 gives full debugging)"); | 82 | "\t\t\t(debug = 3 gives full debugging)"); |
| 81 | 83 | ||
| 84 | MODULE_PARM_DESC(force_pat, | ||
| 85 | "Force initialization on x86 PAT-enabled systems (bool).\n"); | ||
| 86 | |||
| 82 | /* Why upper, left, xres, yres, depth, laced ? To match terminology used | 87 | /* Why upper, left, xres, yres, depth, laced ? To match terminology used |
| 83 | by fbset. | 88 | by fbset. |
| 84 | Why start at 1 for left & upper coordinate ? Because X doesn't allow 0 */ | 89 | Why start at 1 for left & upper coordinate ? Because X doesn't allow 0 */ |
| @@ -1167,8 +1172,15 @@ static int ivtvfb_init_card(struct ivtv *itv) | |||
| 1167 | 1172 | ||
| 1168 | #ifdef CONFIG_X86_64 | 1173 | #ifdef CONFIG_X86_64 |
| 1169 | if (pat_enabled()) { | 1174 | if (pat_enabled()) { |
| 1170 | pr_warn("ivtvfb needs PAT disabled, boot with nopat kernel parameter\n"); | 1175 | if (ivtvfb_force_pat) { |
| 1171 | return -ENODEV; | 1176 | pr_info("PAT is enabled. Write-combined framebuffer caching will be disabled.\n"); |
| 1177 | pr_info("To enable caching, boot with nopat kernel parameter\n"); | ||
| 1178 | } else { | ||
| 1179 | pr_warn("ivtvfb needs PAT disabled for write-combined framebuffer caching.\n"); | ||
| 1180 | pr_warn("Boot with nopat kernel parameter to use caching, or use the\n"); | ||
| 1181 | pr_warn("force_pat module parameter to run with caching disabled\n"); | ||
| 1182 | return -ENODEV; | ||
| 1183 | } | ||
| 1172 | } | 1184 | } |
| 1173 | #endif | 1185 | #endif |
| 1174 | 1186 | ||
diff --git a/drivers/media/pci/meye/meye.c b/drivers/media/pci/meye/meye.c index bd870e60c32b..896d2d856795 100644 --- a/drivers/media/pci/meye/meye.c +++ b/drivers/media/pci/meye/meye.c | |||
| @@ -805,7 +805,7 @@ again: | |||
| 805 | mchip_hsize() * mchip_vsize() * 2); | 805 | mchip_hsize() * mchip_vsize() * 2); |
| 806 | meye.grab_buffer[reqnr].size = mchip_hsize() * mchip_vsize() * 2; | 806 | meye.grab_buffer[reqnr].size = mchip_hsize() * mchip_vsize() * 2; |
| 807 | meye.grab_buffer[reqnr].state = MEYE_BUF_DONE; | 807 | meye.grab_buffer[reqnr].state = MEYE_BUF_DONE; |
| 808 | v4l2_get_timestamp(&meye.grab_buffer[reqnr].timestamp); | 808 | meye.grab_buffer[reqnr].ts = ktime_get_ns(); |
| 809 | meye.grab_buffer[reqnr].sequence = sequence++; | 809 | meye.grab_buffer[reqnr].sequence = sequence++; |
| 810 | kfifo_in_locked(&meye.doneq, (unsigned char *)&reqnr, | 810 | kfifo_in_locked(&meye.doneq, (unsigned char *)&reqnr, |
| 811 | sizeof(int), &meye.doneq_lock); | 811 | sizeof(int), &meye.doneq_lock); |
| @@ -826,7 +826,7 @@ again: | |||
| 826 | size); | 826 | size); |
| 827 | meye.grab_buffer[reqnr].size = size; | 827 | meye.grab_buffer[reqnr].size = size; |
| 828 | meye.grab_buffer[reqnr].state = MEYE_BUF_DONE; | 828 | meye.grab_buffer[reqnr].state = MEYE_BUF_DONE; |
| 829 | v4l2_get_timestamp(&meye.grab_buffer[reqnr].timestamp); | 829 | meye.grab_buffer[reqnr].ts = ktime_get_ns(); |
| 830 | meye.grab_buffer[reqnr].sequence = sequence++; | 830 | meye.grab_buffer[reqnr].sequence = sequence++; |
| 831 | kfifo_in_locked(&meye.doneq, (unsigned char *)&reqnr, | 831 | kfifo_in_locked(&meye.doneq, (unsigned char *)&reqnr, |
| 832 | sizeof(int), &meye.doneq_lock); | 832 | sizeof(int), &meye.doneq_lock); |
| @@ -1283,7 +1283,7 @@ static int vidioc_querybuf(struct file *file, void *fh, struct v4l2_buffer *buf) | |||
| 1283 | buf->flags |= V4L2_BUF_FLAG_DONE; | 1283 | buf->flags |= V4L2_BUF_FLAG_DONE; |
| 1284 | 1284 | ||
| 1285 | buf->field = V4L2_FIELD_NONE; | 1285 | buf->field = V4L2_FIELD_NONE; |
| 1286 | buf->timestamp = meye.grab_buffer[index].timestamp; | 1286 | buf->timestamp = ns_to_timeval(meye.grab_buffer[index].ts); |
| 1287 | buf->sequence = meye.grab_buffer[index].sequence; | 1287 | buf->sequence = meye.grab_buffer[index].sequence; |
| 1288 | buf->memory = V4L2_MEMORY_MMAP; | 1288 | buf->memory = V4L2_MEMORY_MMAP; |
| 1289 | buf->m.offset = index * gbufsize; | 1289 | buf->m.offset = index * gbufsize; |
| @@ -1349,7 +1349,7 @@ static int vidioc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) | |||
| 1349 | buf->bytesused = meye.grab_buffer[reqnr].size; | 1349 | buf->bytesused = meye.grab_buffer[reqnr].size; |
| 1350 | buf->flags = V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | 1350 | buf->flags = V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
| 1351 | buf->field = V4L2_FIELD_NONE; | 1351 | buf->field = V4L2_FIELD_NONE; |
| 1352 | buf->timestamp = meye.grab_buffer[reqnr].timestamp; | 1352 | buf->timestamp = ns_to_timeval(meye.grab_buffer[reqnr].ts); |
| 1353 | buf->sequence = meye.grab_buffer[reqnr].sequence; | 1353 | buf->sequence = meye.grab_buffer[reqnr].sequence; |
| 1354 | buf->memory = V4L2_MEMORY_MMAP; | 1354 | buf->memory = V4L2_MEMORY_MMAP; |
| 1355 | buf->m.offset = reqnr * gbufsize; | 1355 | buf->m.offset = reqnr * gbufsize; |
diff --git a/drivers/media/pci/meye/meye.h b/drivers/media/pci/meye/meye.h index c4a8a5fe040c..aff6631535be 100644 --- a/drivers/media/pci/meye/meye.h +++ b/drivers/media/pci/meye/meye.h | |||
| @@ -277,11 +277,11 @@ | |||
| 277 | struct meye_grab_buffer { | 277 | struct meye_grab_buffer { |
| 278 | int state; /* state of buffer */ | 278 | int state; /* state of buffer */ |
| 279 | unsigned long size; /* size of jpg frame */ | 279 | unsigned long size; /* size of jpg frame */ |
| 280 | struct timeval timestamp; /* timestamp */ | 280 | u64 ts; /* timestamp */ |
| 281 | unsigned long sequence; /* sequence number */ | 281 | unsigned long sequence; /* sequence number */ |
| 282 | }; | 282 | }; |
| 283 | 283 | ||
| 284 | /* size of kfifos containings buffer indices */ | 284 | /* size of kfifos containing buffer indices */ |
| 285 | #define MEYE_QUEUE_SIZE MEYE_MAX_BUFNBRS | 285 | #define MEYE_QUEUE_SIZE MEYE_MAX_BUFNBRS |
| 286 | 286 | ||
| 287 | /* Motion Eye device structure */ | 287 | /* Motion Eye device structure */ |
diff --git a/drivers/media/pci/ngene/ngene-core.c b/drivers/media/pci/ngene/ngene-core.c index 25f16833a475..27953b3610a3 100644 --- a/drivers/media/pci/ngene/ngene-core.c +++ b/drivers/media/pci/ngene/ngene-core.c | |||
| @@ -1014,7 +1014,7 @@ static int FillTSIdleBuffer(struct SRingBufferDescriptor *pIdleBuffer, | |||
| 1014 | /* Point to first buffer entry */ | 1014 | /* Point to first buffer entry */ |
| 1015 | struct SBufferHeader *Cur = pRingBuffer->Head; | 1015 | struct SBufferHeader *Cur = pRingBuffer->Head; |
| 1016 | int i; | 1016 | int i; |
| 1017 | /* Loop thru all buffer and set Buffer 2 pointers to TSIdlebuffer */ | 1017 | /* Loop through all buffer and set Buffer 2 pointers to TSIdlebuffer */ |
| 1018 | for (i = 0; i < n; i++) { | 1018 | for (i = 0; i < n; i++) { |
| 1019 | Cur->Buffer2 = pIdleBuffer->Head->Buffer1; | 1019 | Cur->Buffer2 = pIdleBuffer->Head->Buffer1; |
| 1020 | Cur->scList2 = pIdleBuffer->Head->scList1; | 1020 | Cur->scList2 = pIdleBuffer->Head->scList1; |
diff --git a/drivers/media/pci/pt1/pt1.c b/drivers/media/pci/pt1/pt1.c index f4b8030e2369..393f4c596819 100644 --- a/drivers/media/pci/pt1/pt1.c +++ b/drivers/media/pci/pt1/pt1.c | |||
| @@ -200,16 +200,10 @@ static const u8 va1j5jf8007t_25mhz_configs[][2] = { | |||
| 200 | static int config_demod(struct i2c_client *cl, enum pt1_fe_clk clk) | 200 | static int config_demod(struct i2c_client *cl, enum pt1_fe_clk clk) |
| 201 | { | 201 | { |
| 202 | int ret; | 202 | int ret; |
| 203 | u8 buf[2] = {0x01, 0x80}; | ||
| 204 | bool is_sat; | 203 | bool is_sat; |
| 205 | const u8 (*cfg_data)[2]; | 204 | const u8 (*cfg_data)[2]; |
| 206 | int i, len; | 205 | int i, len; |
| 207 | 206 | ||
| 208 | ret = i2c_master_send(cl, buf, 2); | ||
| 209 | if (ret < 0) | ||
| 210 | return ret; | ||
| 211 | usleep_range(30000, 50000); | ||
| 212 | |||
| 213 | is_sat = !strncmp(cl->name, TC90522_I2C_DEV_SAT, | 207 | is_sat = !strncmp(cl->name, TC90522_I2C_DEV_SAT, |
| 214 | strlen(TC90522_I2C_DEV_SAT)); | 208 | strlen(TC90522_I2C_DEV_SAT)); |
| 215 | if (is_sat) { | 209 | if (is_sat) { |
| @@ -260,6 +254,46 @@ static int config_demod(struct i2c_client *cl, enum pt1_fe_clk clk) | |||
| 260 | return 0; | 254 | return 0; |
| 261 | } | 255 | } |
| 262 | 256 | ||
| 257 | /* | ||
| 258 | * Init registers for (each pair of) terrestrial/satellite block in demod. | ||
| 259 | * Note that resetting terr. block also resets its peer sat. block as well. | ||
| 260 | * This function must be called before configuring any demod block | ||
| 261 | * (before pt1_wakeup(), fe->ops.init()). | ||
| 262 | */ | ||
| 263 | static int pt1_demod_block_init(struct pt1 *pt1) | ||
| 264 | { | ||
| 265 | struct i2c_client *cl; | ||
| 266 | u8 buf[2] = {0x01, 0x80}; | ||
| 267 | int ret; | ||
| 268 | int i; | ||
| 269 | |||
| 270 | /* reset all terr. & sat. pairs first */ | ||
| 271 | for (i = 0; i < PT1_NR_ADAPS; i++) { | ||
| 272 | cl = pt1->adaps[i]->demod_i2c_client; | ||
| 273 | if (strncmp(cl->name, TC90522_I2C_DEV_TER, | ||
| 274 | strlen(TC90522_I2C_DEV_TER))) | ||
| 275 | continue; | ||
| 276 | |||
| 277 | ret = i2c_master_send(cl, buf, 2); | ||
| 278 | if (ret < 0) | ||
| 279 | return ret; | ||
| 280 | usleep_range(30000, 50000); | ||
| 281 | } | ||
| 282 | |||
| 283 | for (i = 0; i < PT1_NR_ADAPS; i++) { | ||
| 284 | cl = pt1->adaps[i]->demod_i2c_client; | ||
| 285 | if (strncmp(cl->name, TC90522_I2C_DEV_SAT, | ||
| 286 | strlen(TC90522_I2C_DEV_SAT))) | ||
| 287 | continue; | ||
| 288 | |||
| 289 | ret = i2c_master_send(cl, buf, 2); | ||
| 290 | if (ret < 0) | ||
| 291 | return ret; | ||
| 292 | usleep_range(30000, 50000); | ||
| 293 | } | ||
| 294 | return 0; | ||
| 295 | } | ||
| 296 | |||
| 263 | static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data) | 297 | static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data) |
| 264 | { | 298 | { |
| 265 | writel(data, pt1->regs + reg * 4); | 299 | writel(data, pt1->regs + reg * 4); |
| @@ -987,6 +1021,10 @@ static int pt1_init_frontends(struct pt1 *pt1) | |||
| 987 | goto tuner_release; | 1021 | goto tuner_release; |
| 988 | } | 1022 | } |
| 989 | 1023 | ||
| 1024 | ret = pt1_demod_block_init(pt1); | ||
| 1025 | if (ret < 0) | ||
| 1026 | goto fe_unregister; | ||
| 1027 | |||
| 990 | return 0; | 1028 | return 0; |
| 991 | 1029 | ||
| 992 | tuner_release: | 1030 | tuner_release: |
| @@ -1245,6 +1283,10 @@ static int pt1_resume(struct device *dev) | |||
| 1245 | pt1_update_power(pt1); | 1283 | pt1_update_power(pt1); |
| 1246 | usleep_range(1000, 2000); | 1284 | usleep_range(1000, 2000); |
| 1247 | 1285 | ||
| 1286 | ret = pt1_demod_block_init(pt1); | ||
| 1287 | if (ret < 0) | ||
| 1288 | goto resume_err; | ||
| 1289 | |||
| 1248 | for (i = 0; i < PT1_NR_ADAPS; i++) | 1290 | for (i = 0; i < PT1_NR_ADAPS; i++) |
| 1249 | dvb_frontend_reinitialise(pt1->adaps[i]->fe); | 1291 | dvb_frontend_reinitialise(pt1->adaps[i]->fe); |
| 1250 | 1292 | ||
diff --git a/drivers/media/pci/pt3/pt3.h b/drivers/media/pci/pt3/pt3.h index 495891a4ee17..a53124438f51 100644 --- a/drivers/media/pci/pt3/pt3.h +++ b/drivers/media/pci/pt3/pt3.h | |||
| @@ -76,7 +76,7 @@ struct xfer_desc { | |||
| 76 | u32 addr_l; /* bus address of target data buffer */ | 76 | u32 addr_l; /* bus address of target data buffer */ |
| 77 | u32 addr_h; | 77 | u32 addr_h; |
| 78 | u32 size; | 78 | u32 size; |
| 79 | u32 next_l; /* bus adddress of the next xfer_desc */ | 79 | u32 next_l; /* bus address of the next xfer_desc */ |
| 80 | u32 next_h; | 80 | u32 next_h; |
| 81 | }; | 81 | }; |
| 82 | 82 | ||
diff --git a/drivers/media/pci/saa7134/saa7134-cards.c b/drivers/media/pci/saa7134/saa7134-cards.c index 40ce033cb884..94d6484a3afe 100644 --- a/drivers/media/pci/saa7134/saa7134-cards.c +++ b/drivers/media/pci/saa7134/saa7134-cards.c | |||
| @@ -6423,7 +6423,7 @@ struct pci_device_id saa7134_pci_tbl[] = { | |||
| 6423 | .vendor = PCI_VENDOR_ID_PHILIPS, | 6423 | .vendor = PCI_VENDOR_ID_PHILIPS, |
| 6424 | .device = PCI_DEVICE_ID_PHILIPS_SAA7133, | 6424 | .device = PCI_DEVICE_ID_PHILIPS_SAA7133, |
| 6425 | .subvendor = 0x5168, | 6425 | .subvendor = 0x5168, |
| 6426 | .subdevice = 0x3502, /* whats the difference to 0x3306 ?*/ | 6426 | .subdevice = 0x3502, /* what's the difference to 0x3306 ?*/ |
| 6427 | .driver_data = SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS, | 6427 | .driver_data = SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS, |
| 6428 | },{ | 6428 | },{ |
| 6429 | .vendor = PCI_VENDOR_ID_PHILIPS, | 6429 | .vendor = PCI_VENDOR_ID_PHILIPS, |
diff --git a/drivers/media/pci/saa7146/mxb.c b/drivers/media/pci/saa7146/mxb.c index 44440c6208df..e94324b1de68 100644 --- a/drivers/media/pci/saa7146/mxb.c +++ b/drivers/media/pci/saa7146/mxb.c | |||
| @@ -399,7 +399,7 @@ static int mxb_init_done(struct saa7146_dev* dev) | |||
| 399 | 399 | ||
| 400 | /* check if the saa7740 (aka 'sound arena module') is present | 400 | /* check if the saa7740 (aka 'sound arena module') is present |
| 401 | on the mxb. if so, we must initialize it. due to lack of | 401 | on the mxb. if so, we must initialize it. due to lack of |
| 402 | informations about the saa7740, the values were reverse | 402 | information about the saa7740, the values were reverse |
| 403 | engineered. */ | 403 | engineered. */ |
| 404 | msg.addr = 0x1b; | 404 | msg.addr = 0x1b; |
| 405 | msg.flags = 0; | 405 | msg.flags = 0; |
| @@ -495,7 +495,7 @@ static int vidioc_s_input(struct file *file, void *fh, unsigned int input) | |||
| 495 | input_port_selection[input].hps_sync); | 495 | input_port_selection[input].hps_sync); |
| 496 | 496 | ||
| 497 | /* prepare switching of tea6415c and saa7111a; | 497 | /* prepare switching of tea6415c and saa7111a; |
| 498 | have a look at the 'background'-file for further informations */ | 498 | have a look at the 'background'-file for further information */ |
| 499 | switch (input) { | 499 | switch (input) { |
| 500 | case TUNER: | 500 | case TUNER: |
| 501 | i = SAA7115_COMPOSITE0; | 501 | i = SAA7115_COMPOSITE0; |
diff --git a/drivers/media/pci/saa7164/saa7164-api.c b/drivers/media/pci/saa7164/saa7164-api.c index e318ccf81277..d6c996f39cf2 100644 --- a/drivers/media/pci/saa7164/saa7164-api.c +++ b/drivers/media/pci/saa7164/saa7164-api.c | |||
| @@ -749,7 +749,7 @@ int saa7164_api_initialize_dif(struct saa7164_port *port) | |||
| 749 | if (port->type == SAA7164_MPEG_ENCODER) { | 749 | if (port->type == SAA7164_MPEG_ENCODER) { |
| 750 | /* Pick any analog standard to init the diff. | 750 | /* Pick any analog standard to init the diff. |
| 751 | * we'll come back during encoder_init' | 751 | * we'll come back during encoder_init' |
| 752 | * and set the correct standard if requried. | 752 | * and set the correct standard if required. |
| 753 | */ | 753 | */ |
| 754 | std = V4L2_STD_NTSC; | 754 | std = V4L2_STD_NTSC; |
| 755 | } else | 755 | } else |
diff --git a/drivers/media/pci/saa7164/saa7164-cards.c b/drivers/media/pci/saa7164/saa7164-cards.c index 3af16062e79d..9a6fe7cd4d59 100644 --- a/drivers/media/pci/saa7164/saa7164-cards.c +++ b/drivers/media/pci/saa7164/saa7164-cards.c | |||
| @@ -685,7 +685,7 @@ struct saa7164_subid saa7164_subids[] = { | |||
| 685 | .subvendor = 0x0070, | 685 | .subvendor = 0x0070, |
| 686 | .subdevice = 0xf111, | 686 | .subdevice = 0xf111, |
| 687 | .card = SAA7164_BOARD_HAUPPAUGE_HVR2255, | 687 | .card = SAA7164_BOARD_HAUPPAUGE_HVR2255, |
| 688 | /* Prototype card left here for documenation purposes. | 688 | /* Prototype card left here for documentation purposes. |
| 689 | .card = SAA7164_BOARD_HAUPPAUGE_HVR2255proto, | 689 | .card = SAA7164_BOARD_HAUPPAUGE_HVR2255proto, |
| 690 | */ | 690 | */ |
| 691 | }, { | 691 | }, { |
| @@ -866,7 +866,7 @@ void saa7164_card_setup(struct saa7164_dev *dev) | |||
| 866 | * access to I2C. Instead we have to communicate through the device f/w for | 866 | * access to I2C. Instead we have to communicate through the device f/w for |
| 867 | * register access to 'processing units'. Each unit has a unique | 867 | * register access to 'processing units'. Each unit has a unique |
| 868 | * id, regardless of how the physical implementation occurs across | 868 | * id, regardless of how the physical implementation occurs across |
| 869 | * the three physical i2c busses. The being said if we want leverge of | 869 | * the three physical i2c buses. The being said if we want leverge of |
| 870 | * the existing kernel drivers for tuners and demods we have to 'speak i2c', | 870 | * the existing kernel drivers for tuners and demods we have to 'speak i2c', |
| 871 | * to this bridge implements 3 virtual i2c buses. This is a helper function | 871 | * to this bridge implements 3 virtual i2c buses. This is a helper function |
| 872 | * for those. | 872 | * for those. |
diff --git a/drivers/media/pci/saa7164/saa7164-core.c b/drivers/media/pci/saa7164/saa7164-core.c index f33349e16359..05f25c9bb308 100644 --- a/drivers/media/pci/saa7164/saa7164-core.c +++ b/drivers/media/pci/saa7164/saa7164-core.c | |||
| @@ -157,7 +157,7 @@ static void saa7164_ts_verifier(struct saa7164_buffer *buf) | |||
| 157 | 157 | ||
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | /* Only report errors if we've been through this function atleast | 160 | /* Only report errors if we've been through this function at least |
| 161 | * once already and the cached cc values are primed. First time through | 161 | * once already and the cached cc values are primed. First time through |
| 162 | * always generates errors. | 162 | * always generates errors. |
| 163 | */ | 163 | */ |
| @@ -1020,7 +1020,7 @@ static int saa7164_dev_setup(struct saa7164_dev *dev) | |||
| 1020 | dev->bmmio = (u8 __iomem *)dev->lmmio; | 1020 | dev->bmmio = (u8 __iomem *)dev->lmmio; |
| 1021 | dev->bmmio2 = (u8 __iomem *)dev->lmmio2; | 1021 | dev->bmmio2 = (u8 __iomem *)dev->lmmio2; |
| 1022 | 1022 | ||
| 1023 | /* Inerrupt and ack register locations offset of bmmio */ | 1023 | /* Interrupt and ack register locations offset of bmmio */ |
| 1024 | dev->int_status = 0x183000 + 0xf80; | 1024 | dev->int_status = 0x183000 + 0xf80; |
| 1025 | dev->int_ack = 0x183000 + 0xf90; | 1025 | dev->int_ack = 0x183000 + 0xf90; |
| 1026 | 1026 | ||
diff --git a/drivers/media/pci/saa7164/saa7164-dvb.c b/drivers/media/pci/saa7164/saa7164-dvb.c index dfb118d7d1ec..3e73cb3c7e88 100644 --- a/drivers/media/pci/saa7164/saa7164-dvb.c +++ b/drivers/media/pci/saa7164/saa7164-dvb.c | |||
| @@ -529,7 +529,7 @@ int saa7164_dvb_unregister(struct saa7164_port *port) | |||
| 529 | return 0; | 529 | return 0; |
| 530 | } | 530 | } |
| 531 | 531 | ||
| 532 | /* All the DVB attach calls go here, this function get's modified | 532 | /* All the DVB attach calls go here, this function gets modified |
| 533 | * for each new card. | 533 | * for each new card. |
| 534 | */ | 534 | */ |
| 535 | int saa7164_dvb_register(struct saa7164_port *port) | 535 | int saa7164_dvb_register(struct saa7164_port *port) |
diff --git a/drivers/media/pci/saa7164/saa7164-fw.c b/drivers/media/pci/saa7164/saa7164-fw.c index a50461861133..ed27b3ce5e8e 100644 --- a/drivers/media/pci/saa7164/saa7164-fw.c +++ b/drivers/media/pci/saa7164/saa7164-fw.c | |||
| @@ -409,7 +409,7 @@ int saa7164_downloadfirmware(struct saa7164_dev *dev) | |||
| 409 | (version & 0x0000001f), | 409 | (version & 0x0000001f), |
| 410 | (version & 0xffff0000) >> 16); | 410 | (version & 0xffff0000) >> 16); |
| 411 | 411 | ||
| 412 | /* Load the firmwware from the disk if required */ | 412 | /* Load the firmware from the disk if required */ |
| 413 | if (version == 0) { | 413 | if (version == 0) { |
| 414 | 414 | ||
| 415 | printk(KERN_INFO "%s() Waiting for firmware upload (%s)\n", | 415 | printk(KERN_INFO "%s() Waiting for firmware upload (%s)\n", |
diff --git a/drivers/media/pci/smipcie/smipcie-ir.c b/drivers/media/pci/smipcie/smipcie-ir.c index c5595af6b976..d292cdfb3671 100644 --- a/drivers/media/pci/smipcie/smipcie-ir.c +++ b/drivers/media/pci/smipcie/smipcie-ir.c | |||
| @@ -16,6 +16,9 @@ | |||
| 16 | 16 | ||
| 17 | #include "smipcie.h" | 17 | #include "smipcie.h" |
| 18 | 18 | ||
| 19 | #define SMI_SAMPLE_PERIOD 83 | ||
| 20 | #define SMI_SAMPLE_IDLEMIN (10000 / SMI_SAMPLE_PERIOD) | ||
| 21 | |||
| 19 | static void smi_ir_enableInterrupt(struct smi_rc *ir) | 22 | static void smi_ir_enableInterrupt(struct smi_rc *ir) |
| 20 | { | 23 | { |
| 21 | struct smi_dev *dev = ir->dev; | 24 | struct smi_dev *dev = ir->dev; |
| @@ -42,114 +45,64 @@ static void smi_ir_stop(struct smi_rc *ir) | |||
| 42 | struct smi_dev *dev = ir->dev; | 45 | struct smi_dev *dev = ir->dev; |
| 43 | 46 | ||
| 44 | smi_ir_disableInterrupt(ir); | 47 | smi_ir_disableInterrupt(ir); |
| 45 | smi_clear(IR_Init_Reg, 0x80); | 48 | smi_clear(IR_Init_Reg, rbIRen); |
| 46 | } | 49 | } |
| 47 | 50 | ||
| 48 | #define BITS_PER_COMMAND 14 | 51 | static void smi_raw_process(struct rc_dev *rc_dev, const u8 *buffer, |
| 49 | #define GROUPS_PER_BIT 2 | 52 | const u8 length) |
| 50 | #define IR_RC5_MIN_BIT 36 | ||
| 51 | #define IR_RC5_MAX_BIT 52 | ||
| 52 | static u32 smi_decode_rc5(u8 *pData, u8 size) | ||
| 53 | { | 53 | { |
| 54 | u8 index, current_bit, bit_count; | 54 | struct ir_raw_event rawir = {}; |
| 55 | u8 group_array[BITS_PER_COMMAND * GROUPS_PER_BIT + 4]; | 55 | int cnt; |
| 56 | u8 group_index = 0; | 56 | |
| 57 | u32 command = 0xFFFFFFFF; | 57 | for (cnt = 0; cnt < length; cnt++) { |
| 58 | 58 | if (buffer[cnt] & 0x7f) { | |
| 59 | group_array[group_index++] = 1; | 59 | rawir.pulse = (buffer[cnt] & 0x80) == 0; |
| 60 | 60 | rawir.duration = ((buffer[cnt] & 0x7f) + | |
| 61 | for (index = 0; index < size; index++) { | 61 | (rawir.pulse ? 0 : -1)) * |
| 62 | 62 | rc_dev->rx_resolution; | |
| 63 | current_bit = (pData[index] & 0x80) ? 1 : 0; | 63 | ir_raw_event_store_with_filter(rc_dev, &rawir); |
| 64 | bit_count = pData[index] & 0x7f; | ||
| 65 | |||
| 66 | if ((current_bit == 1) && (bit_count >= 2*IR_RC5_MAX_BIT + 1)) { | ||
| 67 | goto process_code; | ||
| 68 | } else if ((bit_count >= IR_RC5_MIN_BIT) && | ||
| 69 | (bit_count <= IR_RC5_MAX_BIT)) { | ||
| 70 | group_array[group_index++] = current_bit; | ||
| 71 | } else if ((bit_count > IR_RC5_MAX_BIT) && | ||
| 72 | (bit_count <= 2*IR_RC5_MAX_BIT)) { | ||
| 73 | group_array[group_index++] = current_bit; | ||
| 74 | group_array[group_index++] = current_bit; | ||
| 75 | } else { | ||
| 76 | goto invalid_timing; | ||
| 77 | } | ||
| 78 | if (group_index >= BITS_PER_COMMAND*GROUPS_PER_BIT) | ||
| 79 | goto process_code; | ||
| 80 | |||
| 81 | if ((group_index == BITS_PER_COMMAND*GROUPS_PER_BIT - 1) | ||
| 82 | && (group_array[group_index-1] == 0)) { | ||
| 83 | group_array[group_index++] = 1; | ||
| 84 | goto process_code; | ||
| 85 | } | ||
| 86 | } | ||
| 87 | |||
| 88 | process_code: | ||
| 89 | if (group_index == (BITS_PER_COMMAND*GROUPS_PER_BIT-1)) | ||
| 90 | group_array[group_index++] = 1; | ||
| 91 | |||
| 92 | if (group_index == BITS_PER_COMMAND*GROUPS_PER_BIT) { | ||
| 93 | command = 0; | ||
| 94 | for (index = 0; index < (BITS_PER_COMMAND*GROUPS_PER_BIT); | ||
| 95 | index = index + 2) { | ||
| 96 | if ((group_array[index] == 1) && | ||
| 97 | (group_array[index+1] == 0)) { | ||
| 98 | command |= (1 << (BITS_PER_COMMAND - | ||
| 99 | (index/2) - 1)); | ||
| 100 | } else if ((group_array[index] == 0) && | ||
| 101 | (group_array[index+1] == 1)) { | ||
| 102 | /* */ | ||
| 103 | } else { | ||
| 104 | command = 0xFFFFFFFF; | ||
| 105 | goto invalid_timing; | ||
| 106 | } | ||
| 107 | } | 64 | } |
| 108 | } | 65 | } |
| 109 | |||
| 110 | invalid_timing: | ||
| 111 | return command; | ||
| 112 | } | 66 | } |
| 113 | 67 | ||
| 114 | static void smi_ir_decode(struct work_struct *work) | 68 | static void smi_ir_decode(struct smi_rc *ir) |
| 115 | { | 69 | { |
| 116 | struct smi_rc *ir = container_of(work, struct smi_rc, work); | ||
| 117 | struct smi_dev *dev = ir->dev; | 70 | struct smi_dev *dev = ir->dev; |
| 118 | struct rc_dev *rc_dev = ir->rc_dev; | 71 | struct rc_dev *rc_dev = ir->rc_dev; |
| 119 | u32 dwIRControl, dwIRData, dwIRCode, scancode; | 72 | u32 dwIRControl, dwIRData; |
| 120 | u8 index, ucIRCount, readLoop, rc5_command, rc5_system, toggle; | 73 | u8 index, ucIRCount, readLoop; |
| 121 | 74 | ||
| 122 | dwIRControl = smi_read(IR_Init_Reg); | 75 | dwIRControl = smi_read(IR_Init_Reg); |
| 76 | |||
| 123 | if (dwIRControl & rbIRVld) { | 77 | if (dwIRControl & rbIRVld) { |
| 124 | ucIRCount = (u8) smi_read(IR_Data_Cnt); | 78 | ucIRCount = (u8) smi_read(IR_Data_Cnt); |
| 125 | 79 | ||
| 126 | if (ucIRCount < 4) | ||
| 127 | goto end_ir_decode; | ||
| 128 | |||
| 129 | readLoop = ucIRCount/4; | 80 | readLoop = ucIRCount/4; |
| 130 | if (ucIRCount % 4) | 81 | if (ucIRCount % 4) |
| 131 | readLoop += 1; | 82 | readLoop += 1; |
| 132 | for (index = 0; index < readLoop; index++) { | 83 | for (index = 0; index < readLoop; index++) { |
| 133 | dwIRData = smi_read(IR_DATA_BUFFER_BASE + (index*4)); | 84 | dwIRData = smi_read(IR_DATA_BUFFER_BASE + (index * 4)); |
| 134 | 85 | ||
| 135 | ir->irData[index*4 + 0] = (u8)(dwIRData); | 86 | ir->irData[index*4 + 0] = (u8)(dwIRData); |
| 136 | ir->irData[index*4 + 1] = (u8)(dwIRData >> 8); | 87 | ir->irData[index*4 + 1] = (u8)(dwIRData >> 8); |
| 137 | ir->irData[index*4 + 2] = (u8)(dwIRData >> 16); | 88 | ir->irData[index*4 + 2] = (u8)(dwIRData >> 16); |
| 138 | ir->irData[index*4 + 3] = (u8)(dwIRData >> 24); | 89 | ir->irData[index*4 + 3] = (u8)(dwIRData >> 24); |
| 139 | } | 90 | } |
| 140 | dwIRCode = smi_decode_rc5(ir->irData, ucIRCount); | 91 | smi_raw_process(rc_dev, ir->irData, ucIRCount); |
| 141 | 92 | smi_set(IR_Init_Reg, rbIRVld); | |
| 142 | if (dwIRCode != 0xFFFFFFFF) { | ||
| 143 | rc5_command = dwIRCode & 0x3F; | ||
| 144 | rc5_system = (dwIRCode & 0x7C0) >> 6; | ||
| 145 | toggle = (dwIRCode & 0x800) ? 1 : 0; | ||
| 146 | scancode = rc5_system << 8 | rc5_command; | ||
| 147 | rc_keydown(rc_dev, RC_PROTO_RC5, scancode, toggle); | ||
| 148 | } | ||
| 149 | } | 93 | } |
| 150 | end_ir_decode: | 94 | |
| 151 | smi_set(IR_Init_Reg, 0x04); | 95 | if (dwIRControl & rbIRhighidle) { |
| 152 | smi_ir_enableInterrupt(ir); | 96 | struct ir_raw_event rawir = {}; |
| 97 | |||
| 98 | rawir.pulse = 0; | ||
| 99 | rawir.duration = US_TO_NS(SMI_SAMPLE_PERIOD * | ||
| 100 | SMI_SAMPLE_IDLEMIN); | ||
| 101 | ir_raw_event_store_with_filter(rc_dev, &rawir); | ||
| 102 | smi_set(IR_Init_Reg, rbIRhighidle); | ||
| 103 | } | ||
| 104 | |||
| 105 | ir_raw_event_handle(rc_dev); | ||
| 153 | } | 106 | } |
| 154 | 107 | ||
| 155 | /* ir functions call by main driver.*/ | 108 | /* ir functions call by main driver.*/ |
| @@ -160,7 +113,8 @@ int smi_ir_irq(struct smi_rc *ir, u32 int_status) | |||
| 160 | if (int_status & IR_X_INT) { | 113 | if (int_status & IR_X_INT) { |
| 161 | smi_ir_disableInterrupt(ir); | 114 | smi_ir_disableInterrupt(ir); |
| 162 | smi_ir_clearInterrupt(ir); | 115 | smi_ir_clearInterrupt(ir); |
| 163 | schedule_work(&ir->work); | 116 | smi_ir_decode(ir); |
| 117 | smi_ir_enableInterrupt(ir); | ||
| 164 | handled = 1; | 118 | handled = 1; |
| 165 | } | 119 | } |
| 166 | return handled; | 120 | return handled; |
| @@ -170,9 +124,11 @@ void smi_ir_start(struct smi_rc *ir) | |||
| 170 | { | 124 | { |
| 171 | struct smi_dev *dev = ir->dev; | 125 | struct smi_dev *dev = ir->dev; |
| 172 | 126 | ||
| 173 | smi_write(IR_Idle_Cnt_Low, 0x00140070); | 127 | smi_write(IR_Idle_Cnt_Low, |
| 128 | (((SMI_SAMPLE_PERIOD - 1) & 0xFFFF) << 16) | | ||
| 129 | (SMI_SAMPLE_IDLEMIN & 0xFFFF)); | ||
| 174 | msleep(20); | 130 | msleep(20); |
| 175 | smi_set(IR_Init_Reg, 0x90); | 131 | smi_set(IR_Init_Reg, rbIRen | rbIRhighidle); |
| 176 | 132 | ||
| 177 | smi_ir_enableInterrupt(ir); | 133 | smi_ir_enableInterrupt(ir); |
| 178 | } | 134 | } |
| @@ -183,7 +139,7 @@ int smi_ir_init(struct smi_dev *dev) | |||
| 183 | struct rc_dev *rc_dev; | 139 | struct rc_dev *rc_dev; |
| 184 | struct smi_rc *ir = &dev->ir; | 140 | struct smi_rc *ir = &dev->ir; |
| 185 | 141 | ||
| 186 | rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE); | 142 | rc_dev = rc_allocate_device(RC_DRIVER_IR_RAW); |
| 187 | if (!rc_dev) | 143 | if (!rc_dev) |
| 188 | return -ENOMEM; | 144 | return -ENOMEM; |
| 189 | 145 | ||
| @@ -193,6 +149,7 @@ int smi_ir_init(struct smi_dev *dev) | |||
| 193 | snprintf(ir->input_phys, sizeof(ir->input_phys), "pci-%s/ir0", | 149 | snprintf(ir->input_phys, sizeof(ir->input_phys), "pci-%s/ir0", |
| 194 | pci_name(dev->pci_dev)); | 150 | pci_name(dev->pci_dev)); |
| 195 | 151 | ||
| 152 | rc_dev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; | ||
| 196 | rc_dev->driver_name = "SMI_PCIe"; | 153 | rc_dev->driver_name = "SMI_PCIe"; |
| 197 | rc_dev->input_phys = ir->input_phys; | 154 | rc_dev->input_phys = ir->input_phys; |
| 198 | rc_dev->device_name = ir->device_name; | 155 | rc_dev->device_name = ir->device_name; |
| @@ -203,11 +160,12 @@ int smi_ir_init(struct smi_dev *dev) | |||
| 203 | rc_dev->dev.parent = &dev->pci_dev->dev; | 160 | rc_dev->dev.parent = &dev->pci_dev->dev; |
| 204 | 161 | ||
| 205 | rc_dev->map_name = dev->info->rc_map; | 162 | rc_dev->map_name = dev->info->rc_map; |
| 163 | rc_dev->timeout = MS_TO_NS(100); | ||
| 164 | rc_dev->rx_resolution = US_TO_NS(SMI_SAMPLE_PERIOD); | ||
| 206 | 165 | ||
| 207 | ir->rc_dev = rc_dev; | 166 | ir->rc_dev = rc_dev; |
| 208 | ir->dev = dev; | 167 | ir->dev = dev; |
| 209 | 168 | ||
| 210 | INIT_WORK(&ir->work, smi_ir_decode); | ||
| 211 | smi_ir_disableInterrupt(ir); | 169 | smi_ir_disableInterrupt(ir); |
| 212 | 170 | ||
| 213 | ret = rc_register_device(rc_dev); | 171 | ret = rc_register_device(rc_dev); |
diff --git a/drivers/media/pci/smipcie/smipcie.h b/drivers/media/pci/smipcie/smipcie.h index a6c5b1bd7edb..e52229a87b84 100644 --- a/drivers/media/pci/smipcie/smipcie.h +++ b/drivers/media/pci/smipcie/smipcie.h | |||
| @@ -241,7 +241,6 @@ struct smi_rc { | |||
| 241 | struct rc_dev *rc_dev; | 241 | struct rc_dev *rc_dev; |
| 242 | char input_phys[64]; | 242 | char input_phys[64]; |
| 243 | char device_name[64]; | 243 | char device_name[64]; |
| 244 | struct work_struct work; | ||
| 245 | u8 irData[256]; | 244 | u8 irData[256]; |
| 246 | 245 | ||
| 247 | int users; | 246 | int users; |
diff --git a/drivers/media/pci/solo6x10/solo6x10-disp.c b/drivers/media/pci/solo6x10/solo6x10-disp.c index 11c98f0625e4..f61007022471 100644 --- a/drivers/media/pci/solo6x10/solo6x10-disp.c +++ b/drivers/media/pci/solo6x10/solo6x10-disp.c | |||
| @@ -71,7 +71,7 @@ static void solo_vin_config(struct solo_dev *solo_dev) | |||
| 71 | solo_reg_write(solo_dev, SOLO_VI_CH_FORMAT, | 71 | solo_reg_write(solo_dev, SOLO_VI_CH_FORMAT, |
| 72 | SOLO_VI_FD_SEL_MASK(0) | SOLO_VI_PROG_MASK(0)); | 72 | SOLO_VI_FD_SEL_MASK(0) | SOLO_VI_PROG_MASK(0)); |
| 73 | 73 | ||
| 74 | /* On 6110, initialize mozaic darkness stength */ | 74 | /* On 6110, initialize mozaic darkness strength */ |
| 75 | if (solo_dev->type == SOLO_DEV_6010) | 75 | if (solo_dev->type == SOLO_DEV_6010) |
| 76 | solo_reg_write(solo_dev, SOLO_VI_FMT_CFG, 0); | 76 | solo_reg_write(solo_dev, SOLO_VI_FMT_CFG, 0); |
| 77 | else | 77 | else |
| @@ -230,7 +230,7 @@ int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch, | |||
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | /* First 8k is motion flag (512 bytes * 16). Following that is an 8k+8k | 232 | /* First 8k is motion flag (512 bytes * 16). Following that is an 8k+8k |
| 233 | * threshold and working table for each channel. Atleast that's what the | 233 | * threshold and working table for each channel. At least that's what the |
| 234 | * spec says. However, this code (taken from rdk) has some mystery 8k | 234 | * spec says. However, this code (taken from rdk) has some mystery 8k |
| 235 | * block right after the flag area, before the first thresh table. */ | 235 | * block right after the flag area, before the first thresh table. */ |
| 236 | static void solo_motion_config(struct solo_dev *solo_dev) | 236 | static void solo_motion_config(struct solo_dev *solo_dev) |
diff --git a/drivers/media/pci/sta2x11/sta2x11_vip.c b/drivers/media/pci/sta2x11/sta2x11_vip.c index 411177ec4d72..2452d8f59cb0 100644 --- a/drivers/media/pci/sta2x11/sta2x11_vip.c +++ b/drivers/media/pci/sta2x11/sta2x11_vip.c | |||
| @@ -110,7 +110,7 @@ static inline struct vip_buffer *to_vip_buffer(struct vb2_v4l2_buffer *vb2) | |||
| 110 | * @std: video standard (e.g. PAL/NTSC) | 110 | * @std: video standard (e.g. PAL/NTSC) |
| 111 | * @input: input line for video signal ( 0 or 1 ) | 111 | * @input: input line for video signal ( 0 or 1 ) |
| 112 | * @disabled: Device is in power down state | 112 | * @disabled: Device is in power down state |
| 113 | * @slock: for excluse acces of registers | 113 | * @slock: for excluse access of registers |
| 114 | * @vb_vidq: queue maintained by videobuf2 layer | 114 | * @vb_vidq: queue maintained by videobuf2 layer |
| 115 | * @buffer_list: list of buffer in use | 115 | * @buffer_list: list of buffer in use |
| 116 | * @sequence: sequence number of acquired buffer | 116 | * @sequence: sequence number of acquired buffer |
diff --git a/drivers/media/pci/ttpci/av7110.c b/drivers/media/pci/ttpci/av7110.c index 409defc75c05..9345287ad963 100644 --- a/drivers/media/pci/ttpci/av7110.c +++ b/drivers/media/pci/ttpci/av7110.c | |||
| @@ -2313,7 +2313,7 @@ static int frontend_init(struct av7110 *av7110) | |||
| 2313 | * (n in defined in the RPS_THRESH1 counter threshold) | 2313 | * (n in defined in the RPS_THRESH1 counter threshold) |
| 2314 | * I think HS is raised high on the beginning of the n-th line | 2314 | * I think HS is raised high on the beginning of the n-th line |
| 2315 | * and remains high until this n-th line that triggered | 2315 | * and remains high until this n-th line that triggered |
| 2316 | * it is completely received. When the receiption of n-th line | 2316 | * it is completely received. When the reception of n-th line |
| 2317 | * ends, HS is lowered. | 2317 | * ends, HS is lowered. |
| 2318 | * | 2318 | * |
| 2319 | * To transmit data over DMA, 7146 needs changing state at | 2319 | * To transmit data over DMA, 7146 needs changing state at |
| @@ -2347,7 +2347,7 @@ static int frontend_init(struct av7110 *av7110) | |||
| 2347 | * hardware debug note: a working budget card (including budget patch) | 2347 | * hardware debug note: a working budget card (including budget patch) |
| 2348 | * with vpeirq() interrupt setup in mode "0x90" (every 64K) will | 2348 | * with vpeirq() interrupt setup in mode "0x90" (every 64K) will |
| 2349 | * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes | 2349 | * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes |
| 2350 | * and that means 3*25=75 Hz of interrupt freqency, as seen by | 2350 | * and that means 3*25=75 Hz of interrupt frequency, as seen by |
| 2351 | * watch cat /proc/interrupts | 2351 | * watch cat /proc/interrupts |
| 2352 | * | 2352 | * |
| 2353 | * If this frequency is 3x lower (and data received in the DMA | 2353 | * If this frequency is 3x lower (and data received in the DMA |
| @@ -2356,7 +2356,7 @@ static int frontend_init(struct av7110 *av7110) | |||
| 2356 | * this means VSYNC line is not connected in the hardware. | 2356 | * this means VSYNC line is not connected in the hardware. |
| 2357 | * (check soldering pcb and pins) | 2357 | * (check soldering pcb and pins) |
| 2358 | * The same behaviour of missing VSYNC can be duplicated on budget | 2358 | * The same behaviour of missing VSYNC can be duplicated on budget |
| 2359 | * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble. | 2359 | * cards, by setting DD1_INIT trigger mode 7 in 3rd nibble. |
| 2360 | */ | 2360 | */ |
| 2361 | static int av7110_attach(struct saa7146_dev* dev, | 2361 | static int av7110_attach(struct saa7146_dev* dev, |
| 2362 | struct saa7146_pci_extension_data *pci_ext) | 2362 | struct saa7146_pci_extension_data *pci_ext) |
diff --git a/drivers/media/pci/tw68/tw68-video.c b/drivers/media/pci/tw68/tw68-video.c index d3f727045ae8..4f74b14c3b4f 100644 --- a/drivers/media/pci/tw68/tw68-video.c +++ b/drivers/media/pci/tw68/tw68-video.c | |||
| @@ -446,7 +446,7 @@ static void tw68_buf_queue(struct vb2_buffer *vb) | |||
| 446 | /* | 446 | /* |
| 447 | * buffer_prepare | 447 | * buffer_prepare |
| 448 | * | 448 | * |
| 449 | * Set the ancilliary information into the buffer structure. This | 449 | * Set the ancillary information into the buffer structure. This |
| 450 | * includes generating the necessary risc program if it hasn't already | 450 | * includes generating the necessary risc program if it hasn't already |
| 451 | * been done for the current buffer format. | 451 | * been done for the current buffer format. |
| 452 | * The structure fh contains the details of the format requested by the | 452 | * The structure fh contains the details of the format requested by the |
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index a505e9f5a1e2..4acbed189644 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig | |||
| @@ -141,7 +141,6 @@ config VIDEO_RENESAS_CEU | |||
| 141 | ---help--- | 141 | ---help--- |
| 142 | This is a v4l2 driver for the Renesas CEU Interface | 142 | This is a v4l2 driver for the Renesas CEU Interface |
| 143 | 143 | ||
| 144 | source "drivers/media/platform/soc_camera/Kconfig" | ||
| 145 | source "drivers/media/platform/exynos4-is/Kconfig" | 144 | source "drivers/media/platform/exynos4-is/Kconfig" |
| 146 | source "drivers/media/platform/am437x/Kconfig" | 145 | source "drivers/media/platform/am437x/Kconfig" |
| 147 | source "drivers/media/platform/xilinx/Kconfig" | 146 | source "drivers/media/platform/xilinx/Kconfig" |
| @@ -650,7 +649,7 @@ config VIDEO_SECO_CEC | |||
| 650 | config VIDEO_SECO_RC | 649 | config VIDEO_SECO_RC |
| 651 | bool "SECO Boards IR RC5 support" | 650 | bool "SECO Boards IR RC5 support" |
| 652 | depends on VIDEO_SECO_CEC | 651 | depends on VIDEO_SECO_CEC |
| 653 | select RC_CORE | 652 | depends on RC_CORE |
| 654 | help | 653 | help |
| 655 | If you say yes here you will get support for the | 654 | If you say yes here you will get support for the |
| 656 | SECO Boards Consumer-IR in seco-cec driver. | 655 | SECO Boards Consumer-IR in seco-cec driver. |
| @@ -669,7 +668,7 @@ menuconfig SDR_PLATFORM_DRIVERS | |||
| 669 | if SDR_PLATFORM_DRIVERS | 668 | if SDR_PLATFORM_DRIVERS |
| 670 | 669 | ||
| 671 | config VIDEO_RCAR_DRIF | 670 | config VIDEO_RCAR_DRIF |
| 672 | tristate "Renesas Digitial Radio Interface (DRIF)" | 671 | tristate "Renesas Digital Radio Interface (DRIF)" |
| 673 | depends on VIDEO_V4L2 | 672 | depends on VIDEO_V4L2 |
| 674 | depends on ARCH_RENESAS || COMPILE_TEST | 673 | depends on ARCH_RENESAS || COMPILE_TEST |
| 675 | select VIDEOBUF2_VMALLOC | 674 | select VIDEOBUF2_VMALLOC |
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index e6deb2597738..7cbbd925124c 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile | |||
| @@ -62,8 +62,6 @@ obj-y += davinci/ | |||
| 62 | 62 | ||
| 63 | obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o | 63 | obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o |
| 64 | 64 | ||
| 65 | obj-$(CONFIG_SOC_CAMERA) += soc_camera/ | ||
| 66 | |||
| 67 | obj-$(CONFIG_VIDEO_RCAR_DRIF) += rcar_drif.o | 65 | obj-$(CONFIG_VIDEO_RCAR_DRIF) += rcar_drif.o |
| 68 | obj-$(CONFIG_VIDEO_RENESAS_CEU) += renesas-ceu.o | 66 | obj-$(CONFIG_VIDEO_RENESAS_CEU) += renesas-ceu.o |
| 69 | obj-$(CONFIG_VIDEO_RENESAS_FCP) += rcar-fcp.o | 67 | obj-$(CONFIG_VIDEO_RENESAS_FCP) += rcar-fcp.o |
diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c index dfec813f50a9..692e08ef38c0 100644 --- a/drivers/media/platform/aspeed-video.c +++ b/drivers/media/platform/aspeed-video.c | |||
| @@ -1661,6 +1661,7 @@ static int aspeed_video_probe(struct platform_device *pdev) | |||
| 1661 | 1661 | ||
| 1662 | video->frame_rate = 30; | 1662 | video->frame_rate = 30; |
| 1663 | video->dev = &pdev->dev; | 1663 | video->dev = &pdev->dev; |
| 1664 | spin_lock_init(&video->lock); | ||
| 1664 | mutex_init(&video->video_lock); | 1665 | mutex_init(&video->video_lock); |
| 1665 | init_waitqueue_head(&video->wait); | 1666 | init_waitqueue_head(&video->wait); |
| 1666 | INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work); | 1667 | INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work); |
diff --git a/drivers/media/platform/atmel/atmel-isi.c b/drivers/media/platform/atmel/atmel-isi.c index fdb255e4a956..08b8d5583080 100644 --- a/drivers/media/platform/atmel/atmel-isi.c +++ b/drivers/media/platform/atmel/atmel-isi.c | |||
| @@ -110,7 +110,7 @@ struct atmel_isi { | |||
| 110 | bool enable_preview_path; | 110 | bool enable_preview_path; |
| 111 | 111 | ||
| 112 | struct completion complete; | 112 | struct completion complete; |
| 113 | /* ISI peripherial clock */ | 113 | /* ISI peripheral clock */ |
| 114 | struct clk *pclk; | 114 | struct clk *pclk; |
| 115 | unsigned int irq; | 115 | unsigned int irq; |
| 116 | 116 | ||
| @@ -1078,7 +1078,7 @@ static void isi_graph_notify_unbind(struct v4l2_async_notifier *notifier, | |||
| 1078 | 1078 | ||
| 1079 | dev_dbg(isi->dev, "Removing %s\n", video_device_node_name(isi->vdev)); | 1079 | dev_dbg(isi->dev, "Removing %s\n", video_device_node_name(isi->vdev)); |
| 1080 | 1080 | ||
| 1081 | /* Checks internaly if vdev have been init or not */ | 1081 | /* Checks internally if vdev have been init or not */ |
| 1082 | video_unregister_device(isi->vdev); | 1082 | video_unregister_device(isi->vdev); |
| 1083 | } | 1083 | } |
| 1084 | 1084 | ||
diff --git a/drivers/media/platform/coda/coda-bit.c b/drivers/media/platform/coda/coda-bit.c index 8e0194993a52..b4f396c2e72c 100644 --- a/drivers/media/platform/coda/coda-bit.c +++ b/drivers/media/platform/coda/coda-bit.c | |||
| @@ -1010,7 +1010,11 @@ static int coda_start_encoding(struct coda_ctx *ctx) | |||
| 1010 | CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) | | 1010 | CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) | |
| 1011 | ((ctx->params.h264_slice_beta_offset_div2 & | 1011 | ((ctx->params.h264_slice_beta_offset_div2 & |
| 1012 | CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) << | 1012 | CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) << |
| 1013 | CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET); | 1013 | CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET) | |
| 1014 | (ctx->params.h264_constrained_intra_pred_flag << | ||
| 1015 | CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_OFFSET) | | ||
| 1016 | (ctx->params.h264_chroma_qp_index_offset & | ||
| 1017 | CODA_264PARAM_CHROMAQPOFFSET_MASK); | ||
| 1014 | coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA); | 1018 | coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA); |
| 1015 | break; | 1019 | break; |
| 1016 | case V4L2_PIX_FMT_JPEG: | 1020 | case V4L2_PIX_FMT_JPEG: |
| @@ -2020,7 +2024,6 @@ static void coda_finish_decode(struct coda_ctx *ctx) | |||
| 2020 | struct coda_q_data *q_data_dst; | 2024 | struct coda_q_data *q_data_dst; |
| 2021 | struct vb2_v4l2_buffer *dst_buf; | 2025 | struct vb2_v4l2_buffer *dst_buf; |
| 2022 | struct coda_buffer_meta *meta; | 2026 | struct coda_buffer_meta *meta; |
| 2023 | unsigned long payload; | ||
| 2024 | int width, height; | 2027 | int width, height; |
| 2025 | int decoded_idx; | 2028 | int decoded_idx; |
| 2026 | int display_idx; | 2029 | int display_idx; |
| @@ -2226,21 +2229,8 @@ static void coda_finish_decode(struct coda_ctx *ctx) | |||
| 2226 | 2229 | ||
| 2227 | trace_coda_dec_rot_done(ctx, dst_buf, meta); | 2230 | trace_coda_dec_rot_done(ctx, dst_buf, meta); |
| 2228 | 2231 | ||
| 2229 | switch (q_data_dst->fourcc) { | 2232 | vb2_set_plane_payload(&dst_buf->vb2_buf, 0, |
| 2230 | case V4L2_PIX_FMT_YUYV: | 2233 | q_data_dst->sizeimage); |
| 2231 | payload = width * height * 2; | ||
| 2232 | break; | ||
| 2233 | case V4L2_PIX_FMT_YUV420: | ||
| 2234 | case V4L2_PIX_FMT_YVU420: | ||
| 2235 | case V4L2_PIX_FMT_NV12: | ||
| 2236 | default: | ||
| 2237 | payload = width * height * 3 / 2; | ||
| 2238 | break; | ||
| 2239 | case V4L2_PIX_FMT_YUV422P: | ||
| 2240 | payload = width * height * 2; | ||
| 2241 | break; | ||
| 2242 | } | ||
| 2243 | vb2_set_plane_payload(&dst_buf->vb2_buf, 0, payload); | ||
| 2244 | 2234 | ||
| 2245 | if (ctx->frame_errors[ctx->display_idx] || err_vdoa) | 2235 | if (ctx->frame_errors[ctx->display_idx] || err_vdoa) |
| 2246 | coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR); | 2236 | coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR); |
diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c index 7518f01c48f7..fa0b22fb7991 100644 --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c | |||
| @@ -728,7 +728,7 @@ static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f, | |||
| 728 | ctx->tiled_map_type = GDI_TILED_FRAME_MB_RASTER_MAP; | 728 | ctx->tiled_map_type = GDI_TILED_FRAME_MB_RASTER_MAP; |
| 729 | break; | 729 | break; |
| 730 | case V4L2_PIX_FMT_NV12: | 730 | case V4L2_PIX_FMT_NV12: |
| 731 | if (!disable_tiling) { | 731 | if (!disable_tiling && ctx->dev->devtype->product == CODA_960) { |
| 732 | ctx->tiled_map_type = GDI_TILED_FRAME_MB_RASTER_MAP; | 732 | ctx->tiled_map_type = GDI_TILED_FRAME_MB_RASTER_MAP; |
| 733 | break; | 733 | break; |
| 734 | } | 734 | } |
| @@ -1839,6 +1839,12 @@ static int coda_s_ctrl(struct v4l2_ctrl *ctrl) | |||
| 1839 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: | 1839 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: |
| 1840 | ctx->params.h264_disable_deblocking_filter_idc = ctrl->val; | 1840 | ctx->params.h264_disable_deblocking_filter_idc = ctrl->val; |
| 1841 | break; | 1841 | break; |
| 1842 | case V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION: | ||
| 1843 | ctx->params.h264_constrained_intra_pred_flag = ctrl->val; | ||
| 1844 | break; | ||
| 1845 | case V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET: | ||
| 1846 | ctx->params.h264_chroma_qp_index_offset = ctrl->val; | ||
| 1847 | break; | ||
| 1842 | case V4L2_CID_MPEG_VIDEO_H264_PROFILE: | 1848 | case V4L2_CID_MPEG_VIDEO_H264_PROFILE: |
| 1843 | /* TODO: switch between baseline and constrained baseline */ | 1849 | /* TODO: switch between baseline and constrained baseline */ |
| 1844 | if (ctx->inst_type == CODA_INST_ENCODER) | 1850 | if (ctx->inst_type == CODA_INST_ENCODER) |
| @@ -1925,6 +1931,11 @@ static void coda_encode_ctrls(struct coda_ctx *ctx) | |||
| 1925 | V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, | 1931 | V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, |
| 1926 | V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY, | 1932 | V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY, |
| 1927 | 0x0, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED); | 1933 | 0x0, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED); |
| 1934 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | ||
| 1935 | V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION, 0, 1, 1, | ||
| 1936 | 0); | ||
| 1937 | v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, | ||
| 1938 | V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, -12, 12, 1, 0); | ||
| 1928 | v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops, | 1939 | v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops, |
| 1929 | V4L2_CID_MPEG_VIDEO_H264_PROFILE, | 1940 | V4L2_CID_MPEG_VIDEO_H264_PROFILE, |
| 1930 | V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, 0x0, | 1941 | V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, 0x0, |
diff --git a/drivers/media/platform/coda/coda-jpeg.c b/drivers/media/platform/coda/coda-jpeg.c index 9f899a6cefed..39a2351c1e48 100644 --- a/drivers/media/platform/coda/coda-jpeg.c +++ b/drivers/media/platform/coda/coda-jpeg.c | |||
| @@ -103,7 +103,7 @@ static const unsigned char chroma_ac_value[162 + 2] = { | |||
| 103 | 103 | ||
| 104 | /* | 104 | /* |
| 105 | * Quantization tables for luminance and chrominance components in | 105 | * Quantization tables for luminance and chrominance components in |
| 106 | * zig-zag scan order from the Freescale i.MX VPU libaries | 106 | * zig-zag scan order from the Freescale i.MX VPU libraries |
| 107 | */ | 107 | */ |
| 108 | 108 | ||
| 109 | static unsigned char luma_q[64] = { | 109 | static unsigned char luma_q[64] = { |
diff --git a/drivers/media/platform/coda/coda.h b/drivers/media/platform/coda/coda.h index 31cea72f5b2a..31c80bda2c0b 100644 --- a/drivers/media/platform/coda/coda.h +++ b/drivers/media/platform/coda/coda.h | |||
| @@ -118,6 +118,8 @@ struct coda_params { | |||
| 118 | u8 h264_disable_deblocking_filter_idc; | 118 | u8 h264_disable_deblocking_filter_idc; |
| 119 | s8 h264_slice_alpha_c0_offset_div2; | 119 | s8 h264_slice_alpha_c0_offset_div2; |
| 120 | s8 h264_slice_beta_offset_div2; | 120 | s8 h264_slice_beta_offset_div2; |
| 121 | bool h264_constrained_intra_pred_flag; | ||
| 122 | s8 h264_chroma_qp_index_offset; | ||
| 121 | u8 h264_profile_idc; | 123 | u8 h264_profile_idc; |
| 122 | u8 h264_level_idc; | 124 | u8 h264_level_idc; |
| 123 | u8 mpeg4_intra_qp; | 125 | u8 mpeg4_intra_qp; |
diff --git a/drivers/media/platform/davinci/isif.c b/drivers/media/platform/davinci/isif.c index 340f8218f54d..47cecd10eb9f 100644 --- a/drivers/media/platform/davinci/isif.c +++ b/drivers/media/platform/davinci/isif.c | |||
| @@ -328,7 +328,7 @@ static void isif_config_bclamp(struct isif_black_clamp *bc) | |||
| 328 | if (bc->en) { | 328 | if (bc->en) { |
| 329 | val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT; | 329 | val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT; |
| 330 | 330 | ||
| 331 | /* Enable BC and horizontal clamp caculation paramaters */ | 331 | /* Enable BC and horizontal clamp calculation parameters */ |
| 332 | val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT); | 332 | val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT); |
| 333 | 333 | ||
| 334 | regw(val, CLAMPCFG); | 334 | regw(val, CLAMPCFG); |
| @@ -358,7 +358,7 @@ static void isif_config_bclamp(struct isif_black_clamp *bc) | |||
| 358 | regw(bc->horz.win_start_v_calc, CLHWIN2); | 358 | regw(bc->horz.win_start_v_calc, CLHWIN2); |
| 359 | } | 359 | } |
| 360 | 360 | ||
| 361 | /* vertical clamp caculation paramaters */ | 361 | /* vertical clamp calculation parameters */ |
| 362 | 362 | ||
| 363 | /* Reset clamp value sel for previous line */ | 363 | /* Reset clamp value sel for previous line */ |
| 364 | val |= | 364 | val |= |
diff --git a/drivers/media/platform/davinci/vpbe.c b/drivers/media/platform/davinci/vpbe.c index 4766a7a23d16..8339163a5231 100644 --- a/drivers/media/platform/davinci/vpbe.c +++ b/drivers/media/platform/davinci/vpbe.c | |||
| @@ -242,7 +242,7 @@ static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index) | |||
| 242 | goto unlock; | 242 | goto unlock; |
| 243 | 243 | ||
| 244 | /* | 244 | /* |
| 245 | * It is assumed that venc or extenal encoder will set a default | 245 | * It is assumed that venc or external encoder will set a default |
| 246 | * mode in the sub device. For external encoder or LCD pannel output, | 246 | * mode in the sub device. For external encoder or LCD pannel output, |
| 247 | * we also need to set up the lcd port for the required mode. So setup | 247 | * we also need to set up the lcd port for the required mode. So setup |
| 248 | * the lcd port for the default mode that is configured in the board | 248 | * the lcd port for the default mode that is configured in the board |
diff --git a/drivers/media/platform/davinci/vpfe_capture.c b/drivers/media/platform/davinci/vpfe_capture.c index 9996bab98fe3..26dadbba930f 100644 --- a/drivers/media/platform/davinci/vpfe_capture.c +++ b/drivers/media/platform/davinci/vpfe_capture.c | |||
| @@ -518,7 +518,7 @@ static void vpfe_schedule_bottom_field(struct vpfe_device *vpfe_dev) | |||
| 518 | 518 | ||
| 519 | static void vpfe_process_buffer_complete(struct vpfe_device *vpfe_dev) | 519 | static void vpfe_process_buffer_complete(struct vpfe_device *vpfe_dev) |
| 520 | { | 520 | { |
| 521 | v4l2_get_timestamp(&vpfe_dev->cur_frm->ts); | 521 | vpfe_dev->cur_frm->ts = ktime_get_ns(); |
| 522 | vpfe_dev->cur_frm->state = VIDEOBUF_DONE; | 522 | vpfe_dev->cur_frm->state = VIDEOBUF_DONE; |
| 523 | vpfe_dev->cur_frm->size = vpfe_dev->fmt.fmt.pix.sizeimage; | 523 | vpfe_dev->cur_frm->size = vpfe_dev->fmt.fmt.pix.sizeimage; |
| 524 | wake_up_interruptible(&vpfe_dev->cur_frm->done); | 524 | wake_up_interruptible(&vpfe_dev->cur_frm->done); |
diff --git a/drivers/media/platform/davinci/vpif.c b/drivers/media/platform/davinci/vpif.c index 16352e2263d2..df66461f5d4f 100644 --- a/drivers/media/platform/davinci/vpif.c +++ b/drivers/media/platform/davinci/vpif.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * vpif - Video Port Interface driver | 2 | * vpif - Video Port Interface driver |
| 3 | * VPIF is a receiver and transmitter for video data. It has two channels(0, 1) | 3 | * VPIF is a receiver and transmitter for video data. It has two channels(0, 1) |
| 4 | * that receiveing video byte stream and two channels(2, 3) for video output. | 4 | * that receiving video byte stream and two channels(2, 3) for video output. |
| 5 | * The hardware supports SDTV, HDTV formats, raw data capture. | 5 | * The hardware supports SDTV, HDTV formats, raw data capture. |
| 6 | * Currently, the driver supports NTSC and PAL standards. | 6 | * Currently, the driver supports NTSC and PAL standards. |
| 7 | * | 7 | * |
diff --git a/drivers/media/platform/davinci/vpif_display.c b/drivers/media/platform/davinci/vpif_display.c index 3517487d9760..f4b4f2a1dfc0 100644 --- a/drivers/media/platform/davinci/vpif_display.c +++ b/drivers/media/platform/davinci/vpif_display.c | |||
| @@ -138,7 +138,7 @@ static int vpif_buffer_queue_setup(struct vb2_queue *vq, | |||
| 138 | * vpif_buffer_queue : Callback function to add buffer to DMA queue | 138 | * vpif_buffer_queue : Callback function to add buffer to DMA queue |
| 139 | * @vb: ptr to vb2_buffer | 139 | * @vb: ptr to vb2_buffer |
| 140 | * | 140 | * |
| 141 | * This callback fucntion queues the buffer to DMA engine | 141 | * This callback function queues the buffer to DMA engine |
| 142 | */ | 142 | */ |
| 143 | static void vpif_buffer_queue(struct vb2_buffer *vb) | 143 | static void vpif_buffer_queue(struct vb2_buffer *vb) |
| 144 | { | 144 | { |
| @@ -635,7 +635,7 @@ static int vpif_try_fmt_vid_out(struct file *file, void *priv, | |||
| 635 | struct v4l2_pix_format *pixfmt = &fmt->fmt.pix; | 635 | struct v4l2_pix_format *pixfmt = &fmt->fmt.pix; |
| 636 | 636 | ||
| 637 | /* | 637 | /* |
| 638 | * to supress v4l-compliance warnings silently correct | 638 | * to suppress v4l-compliance warnings silently correct |
| 639 | * the pixelformat | 639 | * the pixelformat |
| 640 | */ | 640 | */ |
| 641 | if (pixfmt->pixelformat != V4L2_PIX_FMT_YUV422P) | 641 | if (pixfmt->pixelformat != V4L2_PIX_FMT_YUV422P) |
diff --git a/drivers/media/platform/exynos4-is/fimc-is-command.h b/drivers/media/platform/exynos4-is/fimc-is-command.h index 0d1f52e394b1..b06b56b890d5 100644 --- a/drivers/media/platform/exynos4-is/fimc-is-command.h +++ b/drivers/media/platform/exynos4-is/fimc-is-command.h | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | 18 | ||
| 19 | #define FIMC_IS_COMMAND_VER 110 /* FIMC-IS command set version 1.10 */ | 19 | #define FIMC_IS_COMMAND_VER 110 /* FIMC-IS command set version 1.10 */ |
| 20 | 20 | ||
| 21 | /* Enumeration of commands beetween the FIMC-IS and the host processor. */ | 21 | /* Enumeration of commands between the FIMC-IS and the host processor. */ |
| 22 | 22 | ||
| 23 | /* HOST to FIMC-IS */ | 23 | /* HOST to FIMC-IS */ |
| 24 | #define HIC_PREVIEW_STILL 0x0001 | 24 | #define HIC_PREVIEW_STILL 0x0001 |
diff --git a/drivers/media/platform/exynos4-is/fimc-is-param.h b/drivers/media/platform/exynos4-is/fimc-is-param.h index 8e31f7642776..22923a3d405e 100644 --- a/drivers/media/platform/exynos4-is/fimc-is-param.h +++ b/drivers/media/platform/exynos4-is/fimc-is-param.h | |||
| @@ -298,7 +298,7 @@ enum isp_af_mode { | |||
| 298 | #define ISP_FLASH_COMMAND_AUTO 2 | 298 | #define ISP_FLASH_COMMAND_AUTO 2 |
| 299 | #define ISP_FLASH_COMMAND_TORCH 3 /* 3 sec */ | 299 | #define ISP_FLASH_COMMAND_TORCH 3 /* 3 sec */ |
| 300 | 300 | ||
| 301 | /* Flash red-eye commads */ | 301 | /* Flash red-eye commands */ |
| 302 | #define ISP_FLASH_REDEYE_DISABLE 0 | 302 | #define ISP_FLASH_REDEYE_DISABLE 0 |
| 303 | #define ISP_FLASH_REDEYE_ENABLE 1 | 303 | #define ISP_FLASH_REDEYE_ENABLE 1 |
| 304 | 304 | ||
diff --git a/drivers/media/platform/exynos4-is/fimc-is.c b/drivers/media/platform/exynos4-is/fimc-is.c index f5fc54de19da..02da0b06e56a 100644 --- a/drivers/media/platform/exynos4-is/fimc-is.c +++ b/drivers/media/platform/exynos4-is/fimc-is.c | |||
| @@ -738,7 +738,7 @@ int fimc_is_hw_initialize(struct fimc_is *is) | |||
| 738 | return 0; | 738 | return 0; |
| 739 | } | 739 | } |
| 740 | 740 | ||
| 741 | static int fimc_is_log_show(struct seq_file *s, void *data) | 741 | static int fimc_is_show(struct seq_file *s, void *data) |
| 742 | { | 742 | { |
| 743 | struct fimc_is *is = s->private; | 743 | struct fimc_is *is = s->private; |
| 744 | const u8 *buf = is->memory.vaddr + FIMC_IS_DEBUG_REGION_OFFSET; | 744 | const u8 *buf = is->memory.vaddr + FIMC_IS_DEBUG_REGION_OFFSET; |
| @@ -752,17 +752,7 @@ static int fimc_is_log_show(struct seq_file *s, void *data) | |||
| 752 | return 0; | 752 | return 0; |
| 753 | } | 753 | } |
| 754 | 754 | ||
| 755 | static int fimc_is_debugfs_open(struct inode *inode, struct file *file) | 755 | DEFINE_SHOW_ATTRIBUTE(fimc_is); |
| 756 | { | ||
| 757 | return single_open(file, fimc_is_log_show, inode->i_private); | ||
| 758 | } | ||
| 759 | |||
| 760 | static const struct file_operations fimc_is_debugfs_fops = { | ||
| 761 | .open = fimc_is_debugfs_open, | ||
| 762 | .read = seq_read, | ||
| 763 | .llseek = seq_lseek, | ||
| 764 | .release = single_release, | ||
| 765 | }; | ||
| 766 | 756 | ||
| 767 | static void fimc_is_debugfs_remove(struct fimc_is *is) | 757 | static void fimc_is_debugfs_remove(struct fimc_is *is) |
| 768 | { | 758 | { |
| @@ -777,7 +767,7 @@ static int fimc_is_debugfs_create(struct fimc_is *is) | |||
| 777 | is->debugfs_entry = debugfs_create_dir("fimc_is", NULL); | 767 | is->debugfs_entry = debugfs_create_dir("fimc_is", NULL); |
| 778 | 768 | ||
| 779 | dentry = debugfs_create_file("fw_log", S_IRUGO, is->debugfs_entry, | 769 | dentry = debugfs_create_file("fw_log", S_IRUGO, is->debugfs_entry, |
| 780 | is, &fimc_is_debugfs_fops); | 770 | is, &fimc_is_fops); |
| 781 | if (!dentry) | 771 | if (!dentry) |
| 782 | fimc_is_debugfs_remove(is); | 772 | fimc_is_debugfs_remove(is); |
| 783 | 773 | ||
diff --git a/drivers/media/platform/exynos4-is/fimc-isp-video.c b/drivers/media/platform/exynos4-is/fimc-isp-video.c index de6bd28f7e31..bb35a2017f21 100644 --- a/drivers/media/platform/exynos4-is/fimc-isp-video.c +++ b/drivers/media/platform/exynos4-is/fimc-isp-video.c | |||
| @@ -606,9 +606,7 @@ int fimc_isp_video_device_register(struct fimc_isp *isp, | |||
| 606 | 606 | ||
| 607 | vdev = &iv->ve.vdev; | 607 | vdev = &iv->ve.vdev; |
| 608 | memset(vdev, 0, sizeof(*vdev)); | 608 | memset(vdev, 0, sizeof(*vdev)); |
| 609 | snprintf(vdev->name, sizeof(vdev->name), "fimc-is-isp.%s", | 609 | strscpy(vdev->name, "fimc-is-isp.capture", sizeof(vdev->name)); |
| 610 | type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ? | ||
| 611 | "capture" : "output"); | ||
| 612 | vdev->queue = q; | 610 | vdev->queue = q; |
| 613 | vdev->fops = &isp_video_fops; | 611 | vdev->fops = &isp_video_fops; |
| 614 | vdev->ioctl_ops = &isp_video_ioctl_ops; | 612 | vdev->ioctl_ops = &isp_video_ioctl_ops; |
diff --git a/drivers/media/platform/exynos4-is/media-dev.h b/drivers/media/platform/exynos4-is/media-dev.h index 9f527670395a..a7c9490bbcb4 100644 --- a/drivers/media/platform/exynos4-is/media-dev.h +++ b/drivers/media/platform/exynos4-is/media-dev.h | |||
| @@ -79,7 +79,7 @@ struct fimc_camclk_info { | |||
| 79 | 79 | ||
| 80 | /** | 80 | /** |
| 81 | * struct fimc_sensor_info - image data source subdev information | 81 | * struct fimc_sensor_info - image data source subdev information |
| 82 | * @pdata: sensor's atrributes passed as media device's platform data | 82 | * @pdata: sensor's attributes passed as media device's platform data |
| 83 | * @asd: asynchronous subdev registration data structure | 83 | * @asd: asynchronous subdev registration data structure |
| 84 | * @subdev: image sensor v4l2 subdev | 84 | * @subdev: image sensor v4l2 subdev |
| 85 | * @host: fimc device the sensor is currently linked to | 85 | * @host: fimc device the sensor is currently linked to |
diff --git a/drivers/media/platform/exynos4-is/mipi-csis.c b/drivers/media/platform/exynos4-is/mipi-csis.c index 35cb0162085b..234e047e3e8f 100644 --- a/drivers/media/platform/exynos4-is/mipi-csis.c +++ b/drivers/media/platform/exynos4-is/mipi-csis.c | |||
| @@ -183,7 +183,7 @@ struct csis_drvdata { | |||
| 183 | * @index: the hardware instance index | 183 | * @index: the hardware instance index |
| 184 | * @pdev: CSIS platform device | 184 | * @pdev: CSIS platform device |
| 185 | * @phy: pointer to the CSIS generic PHY | 185 | * @phy: pointer to the CSIS generic PHY |
| 186 | * @regs: mmaped I/O registers memory | 186 | * @regs: mmapped I/O registers memory |
| 187 | * @supplies: CSIS regulator supplies | 187 | * @supplies: CSIS regulator supplies |
| 188 | * @clock: CSIS clocks | 188 | * @clock: CSIS clocks |
| 189 | * @irq: requested s5p-mipi-csis irq number | 189 | * @irq: requested s5p-mipi-csis irq number |
| @@ -745,7 +745,7 @@ static int s5pcsis_parse_dt(struct platform_device *pdev, | |||
| 745 | goto err; | 745 | goto err; |
| 746 | } | 746 | } |
| 747 | 747 | ||
| 748 | /* Get MIPI CSI-2 bus configration from the endpoint node. */ | 748 | /* Get MIPI CSI-2 bus configuration from the endpoint node. */ |
| 749 | of_property_read_u32(node, "samsung,csis-hs-settle", | 749 | of_property_read_u32(node, "samsung,csis-hs-settle", |
| 750 | &state->hs_settle); | 750 | &state->hs_settle); |
| 751 | state->wclk_ext = of_property_read_bool(node, | 751 | state->wclk_ext = of_property_read_bool(node, |
diff --git a/drivers/media/platform/fsl-viu.c b/drivers/media/platform/fsl-viu.c index ca6d0317ab42..cffebcaacb90 100644 --- a/drivers/media/platform/fsl-viu.c +++ b/drivers/media/platform/fsl-viu.c | |||
| @@ -1090,7 +1090,7 @@ static void viu_capture_intr(struct viu_dev *dev, u32 status) | |||
| 1090 | 1090 | ||
| 1091 | if (waitqueue_active(&buf->vb.done)) { | 1091 | if (waitqueue_active(&buf->vb.done)) { |
| 1092 | list_del(&buf->vb.queue); | 1092 | list_del(&buf->vb.queue); |
| 1093 | v4l2_get_timestamp(&buf->vb.ts); | 1093 | buf->vb.ts = ktime_get_ns(); |
| 1094 | buf->vb.state = VIDEOBUF_DONE; | 1094 | buf->vb.state = VIDEOBUF_DONE; |
| 1095 | buf->vb.field_count++; | 1095 | buf->vb.field_count++; |
| 1096 | wake_up(&buf->vb.done); | 1096 | wake_up(&buf->vb.done); |
diff --git a/drivers/media/platform/imx-pxp.c b/drivers/media/platform/imx-pxp.c index c1c255408d16..0bcfc5aa8f3d 100644 --- a/drivers/media/platform/imx-pxp.c +++ b/drivers/media/platform/imx-pxp.c | |||
| @@ -90,7 +90,11 @@ static struct pxp_fmt formats[] = { | |||
| 90 | .depth = 16, | 90 | .depth = 16, |
| 91 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | 91 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, |
| 92 | }, { | 92 | }, { |
| 93 | .fourcc = V4L2_PIX_FMT_YUV32, | 93 | .fourcc = V4L2_PIX_FMT_VUYA32, |
| 94 | .depth = 32, | ||
| 95 | .types = MEM2MEM_CAPTURE, | ||
| 96 | }, { | ||
| 97 | .fourcc = V4L2_PIX_FMT_VUYX32, | ||
| 94 | .depth = 32, | 98 | .depth = 32, |
| 95 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | 99 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, |
| 96 | }, { | 100 | }, { |
| @@ -236,7 +240,7 @@ static u32 pxp_v4l2_pix_fmt_to_ps_format(u32 v4l2_pix_fmt) | |||
| 236 | case V4L2_PIX_FMT_RGB555: return BV_PXP_PS_CTRL_FORMAT__RGB555; | 240 | case V4L2_PIX_FMT_RGB555: return BV_PXP_PS_CTRL_FORMAT__RGB555; |
| 237 | case V4L2_PIX_FMT_RGB444: return BV_PXP_PS_CTRL_FORMAT__RGB444; | 241 | case V4L2_PIX_FMT_RGB444: return BV_PXP_PS_CTRL_FORMAT__RGB444; |
| 238 | case V4L2_PIX_FMT_RGB565: return BV_PXP_PS_CTRL_FORMAT__RGB565; | 242 | case V4L2_PIX_FMT_RGB565: return BV_PXP_PS_CTRL_FORMAT__RGB565; |
| 239 | case V4L2_PIX_FMT_YUV32: return BV_PXP_PS_CTRL_FORMAT__YUV1P444; | 243 | case V4L2_PIX_FMT_VUYX32: return BV_PXP_PS_CTRL_FORMAT__YUV1P444; |
| 240 | case V4L2_PIX_FMT_UYVY: return BV_PXP_PS_CTRL_FORMAT__UYVY1P422; | 244 | case V4L2_PIX_FMT_UYVY: return BV_PXP_PS_CTRL_FORMAT__UYVY1P422; |
| 241 | case V4L2_PIX_FMT_YUYV: return BM_PXP_PS_CTRL_WB_SWAP | | 245 | case V4L2_PIX_FMT_YUYV: return BM_PXP_PS_CTRL_WB_SWAP | |
| 242 | BV_PXP_PS_CTRL_FORMAT__UYVY1P422; | 246 | BV_PXP_PS_CTRL_FORMAT__UYVY1P422; |
| @@ -265,7 +269,8 @@ static u32 pxp_v4l2_pix_fmt_to_out_format(u32 v4l2_pix_fmt) | |||
| 265 | case V4L2_PIX_FMT_RGB555: return BV_PXP_OUT_CTRL_FORMAT__RGB555; | 269 | case V4L2_PIX_FMT_RGB555: return BV_PXP_OUT_CTRL_FORMAT__RGB555; |
| 266 | case V4L2_PIX_FMT_RGB444: return BV_PXP_OUT_CTRL_FORMAT__RGB444; | 270 | case V4L2_PIX_FMT_RGB444: return BV_PXP_OUT_CTRL_FORMAT__RGB444; |
| 267 | case V4L2_PIX_FMT_RGB565: return BV_PXP_OUT_CTRL_FORMAT__RGB565; | 271 | case V4L2_PIX_FMT_RGB565: return BV_PXP_OUT_CTRL_FORMAT__RGB565; |
| 268 | case V4L2_PIX_FMT_YUV32: return BV_PXP_OUT_CTRL_FORMAT__YUV1P444; | 272 | case V4L2_PIX_FMT_VUYA32: |
| 273 | case V4L2_PIX_FMT_VUYX32: return BV_PXP_OUT_CTRL_FORMAT__YUV1P444; | ||
| 269 | case V4L2_PIX_FMT_UYVY: return BV_PXP_OUT_CTRL_FORMAT__UYVY1P422; | 274 | case V4L2_PIX_FMT_UYVY: return BV_PXP_OUT_CTRL_FORMAT__UYVY1P422; |
| 270 | case V4L2_PIX_FMT_VYUY: return BV_PXP_OUT_CTRL_FORMAT__VYUY1P422; | 275 | case V4L2_PIX_FMT_VYUY: return BV_PXP_OUT_CTRL_FORMAT__VYUY1P422; |
| 271 | case V4L2_PIX_FMT_GREY: return BV_PXP_OUT_CTRL_FORMAT__Y8; | 276 | case V4L2_PIX_FMT_GREY: return BV_PXP_OUT_CTRL_FORMAT__Y8; |
| @@ -281,7 +286,8 @@ static u32 pxp_v4l2_pix_fmt_to_out_format(u32 v4l2_pix_fmt) | |||
| 281 | static bool pxp_v4l2_pix_fmt_is_yuv(u32 v4l2_pix_fmt) | 286 | static bool pxp_v4l2_pix_fmt_is_yuv(u32 v4l2_pix_fmt) |
| 282 | { | 287 | { |
| 283 | switch (v4l2_pix_fmt) { | 288 | switch (v4l2_pix_fmt) { |
| 284 | case V4L2_PIX_FMT_YUV32: | 289 | case V4L2_PIX_FMT_VUYA32: |
| 290 | case V4L2_PIX_FMT_VUYX32: | ||
| 285 | case V4L2_PIX_FMT_UYVY: | 291 | case V4L2_PIX_FMT_UYVY: |
| 286 | case V4L2_PIX_FMT_YUYV: | 292 | case V4L2_PIX_FMT_YUYV: |
| 287 | case V4L2_PIX_FMT_VYUY: | 293 | case V4L2_PIX_FMT_VYUY: |
| @@ -680,7 +686,7 @@ static void pxp_setup_csc(struct pxp_ctx *ctx) | |||
| 680 | csc2_coef = csc2_coef_rec709_full; | 686 | csc2_coef = csc2_coef_rec709_full; |
| 681 | else | 687 | else |
| 682 | csc2_coef = csc2_coef_rec709_lim; | 688 | csc2_coef = csc2_coef_rec709_lim; |
| 683 | } else if (ycbcr_enc == V4L2_YCBCR_ENC_709) { | 689 | } else if (ycbcr_enc == V4L2_YCBCR_ENC_BT2020) { |
| 684 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) | 690 | if (quantization == V4L2_QUANTIZATION_FULL_RANGE) |
| 685 | csc2_coef = csc2_coef_bt2020_full; | 691 | csc2_coef = csc2_coef_bt2020_full; |
| 686 | else | 692 | else |
diff --git a/drivers/media/platform/marvell-ccic/mmp-driver.c b/drivers/media/platform/marvell-ccic/mmp-driver.c index 70a2833db0d1..af76eb637773 100644 --- a/drivers/media/platform/marvell-ccic/mmp-driver.c +++ b/drivers/media/platform/marvell-ccic/mmp-driver.c | |||
| @@ -240,8 +240,8 @@ static void mmpcam_calc_dphy(struct mcam_camera *mcam) | |||
| 240 | * bit 8 ~ bit 15: HS_SETTLE | 240 | * bit 8 ~ bit 15: HS_SETTLE |
| 241 | * Time interval during which the HS | 241 | * Time interval during which the HS |
| 242 | * receiver shall ignore any Data Lane | 242 | * receiver shall ignore any Data Lane |
| 243 | * HS transistions. | 243 | * HS transitions. |
| 244 | * The vaule has been calibrated on | 244 | * The value has been calibrated on |
| 245 | * different boards. It seems to work well. | 245 | * different boards. It seems to work well. |
| 246 | * | 246 | * |
| 247 | * More detail please refer | 247 | * More detail please refer |
diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c index 2a5d5002c27e..f761e4d8bf2a 100644 --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c | |||
| @@ -702,7 +702,7 @@ end: | |||
| 702 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, to_vb2_v4l2_buffer(vb)); | 702 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, to_vb2_v4l2_buffer(vb)); |
| 703 | } | 703 | } |
| 704 | 704 | ||
| 705 | static void *mtk_jpeg_buf_remove(struct mtk_jpeg_ctx *ctx, | 705 | static struct vb2_v4l2_buffer *mtk_jpeg_buf_remove(struct mtk_jpeg_ctx *ctx, |
| 706 | enum v4l2_buf_type type) | 706 | enum v4l2_buf_type type) |
| 707 | { | 707 | { |
| 708 | if (V4L2_TYPE_IS_OUTPUT(type)) | 708 | if (V4L2_TYPE_IS_OUTPUT(type)) |
| @@ -714,7 +714,7 @@ static void *mtk_jpeg_buf_remove(struct mtk_jpeg_ctx *ctx, | |||
| 714 | static int mtk_jpeg_start_streaming(struct vb2_queue *q, unsigned int count) | 714 | static int mtk_jpeg_start_streaming(struct vb2_queue *q, unsigned int count) |
| 715 | { | 715 | { |
| 716 | struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q); | 716 | struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q); |
| 717 | struct vb2_buffer *vb; | 717 | struct vb2_v4l2_buffer *vb; |
| 718 | int ret = 0; | 718 | int ret = 0; |
| 719 | 719 | ||
| 720 | ret = pm_runtime_get_sync(ctx->jpeg->dev); | 720 | ret = pm_runtime_get_sync(ctx->jpeg->dev); |
| @@ -724,14 +724,14 @@ static int mtk_jpeg_start_streaming(struct vb2_queue *q, unsigned int count) | |||
| 724 | return 0; | 724 | return 0; |
| 725 | err: | 725 | err: |
| 726 | while ((vb = mtk_jpeg_buf_remove(ctx, q->type))) | 726 | while ((vb = mtk_jpeg_buf_remove(ctx, q->type))) |
| 727 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(vb), VB2_BUF_STATE_QUEUED); | 727 | v4l2_m2m_buf_done(vb, VB2_BUF_STATE_QUEUED); |
| 728 | return ret; | 728 | return ret; |
| 729 | } | 729 | } |
| 730 | 730 | ||
| 731 | static void mtk_jpeg_stop_streaming(struct vb2_queue *q) | 731 | static void mtk_jpeg_stop_streaming(struct vb2_queue *q) |
| 732 | { | 732 | { |
| 733 | struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q); | 733 | struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q); |
| 734 | struct vb2_buffer *vb; | 734 | struct vb2_v4l2_buffer *vb; |
| 735 | 735 | ||
| 736 | /* | 736 | /* |
| 737 | * STREAMOFF is an acknowledgment for source change event. | 737 | * STREAMOFF is an acknowledgment for source change event. |
| @@ -743,7 +743,7 @@ static void mtk_jpeg_stop_streaming(struct vb2_queue *q) | |||
| 743 | struct mtk_jpeg_src_buf *src_buf; | 743 | struct mtk_jpeg_src_buf *src_buf; |
| 744 | 744 | ||
| 745 | vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 745 | vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 746 | src_buf = mtk_jpeg_vb2_to_srcbuf(vb); | 746 | src_buf = mtk_jpeg_vb2_to_srcbuf(&vb->vb2_buf); |
| 747 | mtk_jpeg_set_queue_data(ctx, &src_buf->dec_param); | 747 | mtk_jpeg_set_queue_data(ctx, &src_buf->dec_param); |
| 748 | ctx->state = MTK_JPEG_RUNNING; | 748 | ctx->state = MTK_JPEG_RUNNING; |
| 749 | } else if (V4L2_TYPE_IS_OUTPUT(q->type)) { | 749 | } else if (V4L2_TYPE_IS_OUTPUT(q->type)) { |
| @@ -751,7 +751,7 @@ static void mtk_jpeg_stop_streaming(struct vb2_queue *q) | |||
| 751 | } | 751 | } |
| 752 | 752 | ||
| 753 | while ((vb = mtk_jpeg_buf_remove(ctx, q->type))) | 753 | while ((vb = mtk_jpeg_buf_remove(ctx, q->type))) |
| 754 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(vb), VB2_BUF_STATE_ERROR); | 754 | v4l2_m2m_buf_done(vb, VB2_BUF_STATE_ERROR); |
| 755 | 755 | ||
| 756 | pm_runtime_put_sync(ctx->jpeg->dev); | 756 | pm_runtime_put_sync(ctx->jpeg->dev); |
| 757 | } | 757 | } |
| @@ -807,7 +807,7 @@ static void mtk_jpeg_device_run(void *priv) | |||
| 807 | { | 807 | { |
| 808 | struct mtk_jpeg_ctx *ctx = priv; | 808 | struct mtk_jpeg_ctx *ctx = priv; |
| 809 | struct mtk_jpeg_dev *jpeg = ctx->jpeg; | 809 | struct mtk_jpeg_dev *jpeg = ctx->jpeg; |
| 810 | struct vb2_buffer *src_buf, *dst_buf; | 810 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 811 | enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR; | 811 | enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR; |
| 812 | unsigned long flags; | 812 | unsigned long flags; |
| 813 | struct mtk_jpeg_src_buf *jpeg_src_buf; | 813 | struct mtk_jpeg_src_buf *jpeg_src_buf; |
| @@ -817,11 +817,11 @@ static void mtk_jpeg_device_run(void *priv) | |||
| 817 | 817 | ||
| 818 | src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 818 | src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 819 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); | 819 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); |
| 820 | jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(src_buf); | 820 | jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf); |
| 821 | 821 | ||
| 822 | if (jpeg_src_buf->flags & MTK_JPEG_BUF_FLAGS_LAST_FRAME) { | 822 | if (jpeg_src_buf->flags & MTK_JPEG_BUF_FLAGS_LAST_FRAME) { |
| 823 | for (i = 0; i < dst_buf->num_planes; i++) | 823 | for (i = 0; i < dst_buf->vb2_buf.num_planes; i++) |
| 824 | vb2_set_plane_payload(dst_buf, i, 0); | 824 | vb2_set_plane_payload(&dst_buf->vb2_buf, i, 0); |
| 825 | buf_state = VB2_BUF_STATE_DONE; | 825 | buf_state = VB2_BUF_STATE_DONE; |
| 826 | goto dec_end; | 826 | goto dec_end; |
| 827 | } | 827 | } |
| @@ -833,8 +833,8 @@ static void mtk_jpeg_device_run(void *priv) | |||
| 833 | return; | 833 | return; |
| 834 | } | 834 | } |
| 835 | 835 | ||
| 836 | mtk_jpeg_set_dec_src(ctx, src_buf, &bs); | 836 | mtk_jpeg_set_dec_src(ctx, &src_buf->vb2_buf, &bs); |
| 837 | if (mtk_jpeg_set_dec_dst(ctx, &jpeg_src_buf->dec_param, dst_buf, &fb)) | 837 | if (mtk_jpeg_set_dec_dst(ctx, &jpeg_src_buf->dec_param, &dst_buf->vb2_buf, &fb)) |
| 838 | goto dec_end; | 838 | goto dec_end; |
| 839 | 839 | ||
| 840 | spin_lock_irqsave(&jpeg->hw_lock, flags); | 840 | spin_lock_irqsave(&jpeg->hw_lock, flags); |
| @@ -849,8 +849,8 @@ static void mtk_jpeg_device_run(void *priv) | |||
| 849 | dec_end: | 849 | dec_end: |
| 850 | v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); | 850 | v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); |
| 851 | v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); | 851 | v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); |
| 852 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(src_buf), buf_state); | 852 | v4l2_m2m_buf_done(src_buf, buf_state); |
| 853 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), buf_state); | 853 | v4l2_m2m_buf_done(dst_buf, buf_state); |
| 854 | v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); | 854 | v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); |
| 855 | } | 855 | } |
| 856 | 856 | ||
| @@ -921,7 +921,7 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv) | |||
| 921 | { | 921 | { |
| 922 | struct mtk_jpeg_dev *jpeg = priv; | 922 | struct mtk_jpeg_dev *jpeg = priv; |
| 923 | struct mtk_jpeg_ctx *ctx; | 923 | struct mtk_jpeg_ctx *ctx; |
| 924 | struct vb2_buffer *src_buf, *dst_buf; | 924 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 925 | struct mtk_jpeg_src_buf *jpeg_src_buf; | 925 | struct mtk_jpeg_src_buf *jpeg_src_buf; |
| 926 | enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR; | 926 | enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR; |
| 927 | u32 dec_irq_ret; | 927 | u32 dec_irq_ret; |
| @@ -938,7 +938,7 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv) | |||
| 938 | 938 | ||
| 939 | src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); | 939 | src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); |
| 940 | dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); | 940 | dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); |
| 941 | jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(src_buf); | 941 | jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf); |
| 942 | 942 | ||
| 943 | if (dec_irq_ret >= MTK_JPEG_DEC_RESULT_UNDERFLOW) | 943 | if (dec_irq_ret >= MTK_JPEG_DEC_RESULT_UNDERFLOW) |
| 944 | mtk_jpeg_dec_reset(jpeg->dec_reg_base); | 944 | mtk_jpeg_dec_reset(jpeg->dec_reg_base); |
| @@ -948,15 +948,15 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv) | |||
| 948 | goto dec_end; | 948 | goto dec_end; |
| 949 | } | 949 | } |
| 950 | 950 | ||
| 951 | for (i = 0; i < dst_buf->num_planes; i++) | 951 | for (i = 0; i < dst_buf->vb2_buf.num_planes; i++) |
| 952 | vb2_set_plane_payload(dst_buf, i, | 952 | vb2_set_plane_payload(&dst_buf->vb2_buf, i, |
| 953 | jpeg_src_buf->dec_param.comp_size[i]); | 953 | jpeg_src_buf->dec_param.comp_size[i]); |
| 954 | 954 | ||
| 955 | buf_state = VB2_BUF_STATE_DONE; | 955 | buf_state = VB2_BUF_STATE_DONE; |
| 956 | 956 | ||
| 957 | dec_end: | 957 | dec_end: |
| 958 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(src_buf), buf_state); | 958 | v4l2_m2m_buf_done(src_buf, buf_state); |
| 959 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), buf_state); | 959 | v4l2_m2m_buf_done(dst_buf, buf_state); |
| 960 | v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); | 960 | v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); |
| 961 | return IRQ_HANDLED; | 961 | return IRQ_HANDLED; |
| 962 | } | 962 | } |
diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_core.h b/drivers/media/platform/mtk-mdp/mtk_mdp_core.h index ad1cff306efd..e5abb1abb3a3 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_core.h +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_core.h | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | #define MTK_MDP_CTX_ERROR BIT(5) | 41 | #define MTK_MDP_CTX_ERROR BIT(5) |
| 42 | 42 | ||
| 43 | /** | 43 | /** |
| 44 | * struct mtk_mdp_pix_align - alignement of image | 44 | * struct mtk_mdp_pix_align - alignment of image |
| 45 | * @org_w: source alignment of width | 45 | * @org_w: source alignment of width |
| 46 | * @org_h: source alignment of height | 46 | * @org_h: source alignment of height |
| 47 | * @target_w: dst alignment of width | 47 | * @target_w: dst alignment of width |
| @@ -122,8 +122,8 @@ struct mtk_mdp_frame { | |||
| 122 | /** | 122 | /** |
| 123 | * struct mtk_mdp_variant - image processor variant information | 123 | * struct mtk_mdp_variant - image processor variant information |
| 124 | * @pix_max: maximum limit of image size | 124 | * @pix_max: maximum limit of image size |
| 125 | * @pix_min: minimun limit of image size | 125 | * @pix_min: minimum limit of image size |
| 126 | * @pix_align: alignement of image | 126 | * @pix_align: alignment of image |
| 127 | * @h_scale_up_max: maximum scale-up in horizontal | 127 | * @h_scale_up_max: maximum scale-up in horizontal |
| 128 | * @v_scale_up_max: maximum scale-up in vertical | 128 | * @v_scale_up_max: maximum scale-up in vertical |
| 129 | * @h_scale_down_max: maximum scale-down in horizontal | 129 | * @h_scale_down_max: maximum scale-down in horizontal |
diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c b/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c index 51a13466261e..7d15c06e9db9 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c | |||
| @@ -473,20 +473,17 @@ static void mtk_mdp_prepare_addr(struct mtk_mdp_ctx *ctx, | |||
| 473 | static void mtk_mdp_m2m_get_bufs(struct mtk_mdp_ctx *ctx) | 473 | static void mtk_mdp_m2m_get_bufs(struct mtk_mdp_ctx *ctx) |
| 474 | { | 474 | { |
| 475 | struct mtk_mdp_frame *s_frame, *d_frame; | 475 | struct mtk_mdp_frame *s_frame, *d_frame; |
| 476 | struct vb2_buffer *src_vb, *dst_vb; | ||
| 477 | struct vb2_v4l2_buffer *src_vbuf, *dst_vbuf; | 476 | struct vb2_v4l2_buffer *src_vbuf, *dst_vbuf; |
| 478 | 477 | ||
| 479 | s_frame = &ctx->s_frame; | 478 | s_frame = &ctx->s_frame; |
| 480 | d_frame = &ctx->d_frame; | 479 | d_frame = &ctx->d_frame; |
| 481 | 480 | ||
| 482 | src_vb = v4l2_m2m_next_src_buf(ctx->m2m_ctx); | 481 | src_vbuf = v4l2_m2m_next_src_buf(ctx->m2m_ctx); |
| 483 | mtk_mdp_prepare_addr(ctx, src_vb, s_frame, &s_frame->addr); | 482 | mtk_mdp_prepare_addr(ctx, &src_vbuf->vb2_buf, s_frame, &s_frame->addr); |
| 484 | 483 | ||
| 485 | dst_vb = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); | 484 | dst_vbuf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); |
| 486 | mtk_mdp_prepare_addr(ctx, dst_vb, d_frame, &d_frame->addr); | 485 | mtk_mdp_prepare_addr(ctx, &dst_vbuf->vb2_buf, d_frame, &d_frame->addr); |
| 487 | 486 | ||
| 488 | src_vbuf = to_vb2_v4l2_buffer(src_vb); | ||
| 489 | dst_vbuf = to_vb2_v4l2_buffer(dst_vb); | ||
| 490 | dst_vbuf->vb2_buf.timestamp = src_vbuf->vb2_buf.timestamp; | 487 | dst_vbuf->vb2_buf.timestamp = src_vbuf->vb2_buf.timestamp; |
| 491 | } | 488 | } |
| 492 | 489 | ||
| @@ -494,17 +491,14 @@ static void mtk_mdp_process_done(void *priv, int vb_state) | |||
| 494 | { | 491 | { |
| 495 | struct mtk_mdp_dev *mdp = priv; | 492 | struct mtk_mdp_dev *mdp = priv; |
| 496 | struct mtk_mdp_ctx *ctx; | 493 | struct mtk_mdp_ctx *ctx; |
| 497 | struct vb2_buffer *src_vb, *dst_vb; | 494 | struct vb2_v4l2_buffer *src_vbuf, *dst_vbuf; |
| 498 | struct vb2_v4l2_buffer *src_vbuf = NULL, *dst_vbuf = NULL; | ||
| 499 | 495 | ||
| 500 | ctx = v4l2_m2m_get_curr_priv(mdp->m2m_dev); | 496 | ctx = v4l2_m2m_get_curr_priv(mdp->m2m_dev); |
| 501 | if (!ctx) | 497 | if (!ctx) |
| 502 | return; | 498 | return; |
| 503 | 499 | ||
| 504 | src_vb = v4l2_m2m_src_buf_remove(ctx->m2m_ctx); | 500 | src_vbuf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx); |
| 505 | src_vbuf = to_vb2_v4l2_buffer(src_vb); | 501 | dst_vbuf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx); |
| 506 | dst_vb = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx); | ||
| 507 | dst_vbuf = to_vb2_v4l2_buffer(dst_vb); | ||
| 508 | 502 | ||
| 509 | dst_vbuf->vb2_buf.timestamp = src_vbuf->vb2_buf.timestamp; | 503 | dst_vbuf->vb2_buf.timestamp = src_vbuf->vb2_buf.timestamp; |
| 510 | dst_vbuf->timecode = src_vbuf->timecode; | 504 | dst_vbuf->timecode = src_vbuf->timecode; |
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c index ba619647bc10..d022c65bb34c 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | |||
| @@ -325,13 +325,12 @@ static void mtk_vdec_worker(struct work_struct *work) | |||
| 325 | struct mtk_vcodec_ctx *ctx = container_of(work, struct mtk_vcodec_ctx, | 325 | struct mtk_vcodec_ctx *ctx = container_of(work, struct mtk_vcodec_ctx, |
| 326 | decode_work); | 326 | decode_work); |
| 327 | struct mtk_vcodec_dev *dev = ctx->dev; | 327 | struct mtk_vcodec_dev *dev = ctx->dev; |
| 328 | struct vb2_buffer *src_buf, *dst_buf; | 328 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 329 | struct mtk_vcodec_mem buf; | 329 | struct mtk_vcodec_mem buf; |
| 330 | struct vdec_fb *pfb; | 330 | struct vdec_fb *pfb; |
| 331 | bool res_chg = false; | 331 | bool res_chg = false; |
| 332 | int ret; | 332 | int ret; |
| 333 | struct mtk_video_dec_buf *dst_buf_info, *src_buf_info; | 333 | struct mtk_video_dec_buf *dst_buf_info, *src_buf_info; |
| 334 | struct vb2_v4l2_buffer *dst_vb2_v4l2, *src_vb2_v4l2; | ||
| 335 | 334 | ||
| 336 | src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx); | 335 | src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx); |
| 337 | if (src_buf == NULL) { | 336 | if (src_buf == NULL) { |
| @@ -347,26 +346,23 @@ static void mtk_vdec_worker(struct work_struct *work) | |||
| 347 | return; | 346 | return; |
| 348 | } | 347 | } |
| 349 | 348 | ||
| 350 | src_vb2_v4l2 = container_of(src_buf, struct vb2_v4l2_buffer, vb2_buf); | 349 | src_buf_info = container_of(src_buf, struct mtk_video_dec_buf, vb); |
| 351 | src_buf_info = container_of(src_vb2_v4l2, struct mtk_video_dec_buf, vb); | 350 | dst_buf_info = container_of(dst_buf, struct mtk_video_dec_buf, vb); |
| 352 | |||
| 353 | dst_vb2_v4l2 = container_of(dst_buf, struct vb2_v4l2_buffer, vb2_buf); | ||
| 354 | dst_buf_info = container_of(dst_vb2_v4l2, struct mtk_video_dec_buf, vb); | ||
| 355 | 351 | ||
| 356 | pfb = &dst_buf_info->frame_buffer; | 352 | pfb = &dst_buf_info->frame_buffer; |
| 357 | pfb->base_y.va = vb2_plane_vaddr(dst_buf, 0); | 353 | pfb->base_y.va = vb2_plane_vaddr(&dst_buf->vb2_buf, 0); |
| 358 | pfb->base_y.dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0); | 354 | pfb->base_y.dma_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); |
| 359 | pfb->base_y.size = ctx->picinfo.y_bs_sz + ctx->picinfo.y_len_sz; | 355 | pfb->base_y.size = ctx->picinfo.y_bs_sz + ctx->picinfo.y_len_sz; |
| 360 | 356 | ||
| 361 | pfb->base_c.va = vb2_plane_vaddr(dst_buf, 1); | 357 | pfb->base_c.va = vb2_plane_vaddr(&dst_buf->vb2_buf, 1); |
| 362 | pfb->base_c.dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 1); | 358 | pfb->base_c.dma_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 1); |
| 363 | pfb->base_c.size = ctx->picinfo.c_bs_sz + ctx->picinfo.c_len_sz; | 359 | pfb->base_c.size = ctx->picinfo.c_bs_sz + ctx->picinfo.c_len_sz; |
| 364 | pfb->status = 0; | 360 | pfb->status = 0; |
| 365 | mtk_v4l2_debug(3, "===>[%d] vdec_if_decode() ===>", ctx->id); | 361 | mtk_v4l2_debug(3, "===>[%d] vdec_if_decode() ===>", ctx->id); |
| 366 | 362 | ||
| 367 | mtk_v4l2_debug(3, | 363 | mtk_v4l2_debug(3, |
| 368 | "id=%d Framebuf pfb=%p VA=%p Y_DMA=%pad C_DMA=%pad Size=%zx", | 364 | "id=%d Framebuf pfb=%p VA=%p Y_DMA=%pad C_DMA=%pad Size=%zx", |
| 369 | dst_buf->index, pfb, | 365 | dst_buf->vb2_buf.index, pfb, |
| 370 | pfb->base_y.va, &pfb->base_y.dma_addr, | 366 | pfb->base_y.va, &pfb->base_y.dma_addr, |
| 371 | &pfb->base_c.dma_addr, pfb->base_y.size); | 367 | &pfb->base_c.dma_addr, pfb->base_y.size); |
| 372 | 368 | ||
| @@ -384,19 +380,19 @@ static void mtk_vdec_worker(struct work_struct *work) | |||
| 384 | clean_display_buffer(ctx); | 380 | clean_display_buffer(ctx); |
| 385 | vb2_set_plane_payload(&dst_buf_info->vb.vb2_buf, 0, 0); | 381 | vb2_set_plane_payload(&dst_buf_info->vb.vb2_buf, 0, 0); |
| 386 | vb2_set_plane_payload(&dst_buf_info->vb.vb2_buf, 1, 0); | 382 | vb2_set_plane_payload(&dst_buf_info->vb.vb2_buf, 1, 0); |
| 387 | dst_vb2_v4l2->flags |= V4L2_BUF_FLAG_LAST; | 383 | dst_buf->flags |= V4L2_BUF_FLAG_LAST; |
| 388 | v4l2_m2m_buf_done(&dst_buf_info->vb, VB2_BUF_STATE_DONE); | 384 | v4l2_m2m_buf_done(&dst_buf_info->vb, VB2_BUF_STATE_DONE); |
| 389 | clean_free_buffer(ctx); | 385 | clean_free_buffer(ctx); |
| 390 | v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx); | 386 | v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx); |
| 391 | return; | 387 | return; |
| 392 | } | 388 | } |
| 393 | buf.va = vb2_plane_vaddr(src_buf, 0); | 389 | buf.va = vb2_plane_vaddr(&src_buf->vb2_buf, 0); |
| 394 | buf.dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, 0); | 390 | buf.dma_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); |
| 395 | buf.size = (size_t)src_buf->planes[0].bytesused; | 391 | buf.size = (size_t)src_buf->planes[0].bytesused; |
| 396 | if (!buf.va) { | 392 | if (!buf.va) { |
| 397 | v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx); | 393 | v4l2_m2m_job_finish(dev->m2m_dev_dec, ctx->m2m_ctx); |
| 398 | mtk_v4l2_err("[%d] id=%d src_addr is NULL!!", | 394 | mtk_v4l2_err("[%d] id=%d src_addr is NULL!!", |
| 399 | ctx->id, src_buf->index); | 395 | ctx->id, src_buf->vb2_buf.index); |
| 400 | return; | 396 | return; |
| 401 | } | 397 | } |
| 402 | mtk_v4l2_debug(3, "[%d] Bitstream VA=%p DMA=%pad Size=%zx vb=%p", | 398 | mtk_v4l2_debug(3, "[%d] Bitstream VA=%p DMA=%pad Size=%zx vb=%p", |
| @@ -416,10 +412,10 @@ static void mtk_vdec_worker(struct work_struct *work) | |||
| 416 | mtk_v4l2_err( | 412 | mtk_v4l2_err( |
| 417 | " <===[%d], src_buf[%d] sz=0x%zx pts=%llu dst_buf[%d] vdec_if_decode() ret=%d res_chg=%d===>", | 413 | " <===[%d], src_buf[%d] sz=0x%zx pts=%llu dst_buf[%d] vdec_if_decode() ret=%d res_chg=%d===>", |
| 418 | ctx->id, | 414 | ctx->id, |
| 419 | src_buf->index, | 415 | src_buf->vb2_buf.index, |
| 420 | buf.size, | 416 | buf.size, |
| 421 | src_buf_info->vb.vb2_buf.timestamp, | 417 | src_buf_info->vb.vb2_buf.timestamp, |
| 422 | dst_buf->index, | 418 | dst_buf->vb2_buf.index, |
| 423 | ret, res_chg); | 419 | ret, res_chg); |
| 424 | src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx); | 420 | src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx); |
| 425 | if (ret == -EIO) { | 421 | if (ret == -EIO) { |
| @@ -1103,7 +1099,7 @@ static int vb2ops_vdec_buf_prepare(struct vb2_buffer *vb) | |||
| 1103 | 1099 | ||
| 1104 | static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb) | 1100 | static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb) |
| 1105 | { | 1101 | { |
| 1106 | struct vb2_buffer *src_buf; | 1102 | struct vb2_v4l2_buffer *src_buf; |
| 1107 | struct mtk_vcodec_mem src_mem; | 1103 | struct mtk_vcodec_mem src_mem; |
| 1108 | bool res_chg = false; | 1104 | bool res_chg = false; |
| 1109 | int ret = 0; | 1105 | int ret = 0; |
| @@ -1149,8 +1145,7 @@ static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb) | |||
| 1149 | mtk_v4l2_err("No src buffer"); | 1145 | mtk_v4l2_err("No src buffer"); |
| 1150 | return; | 1146 | return; |
| 1151 | } | 1147 | } |
| 1152 | vb2_v4l2 = to_vb2_v4l2_buffer(src_buf); | 1148 | buf = container_of(src_buf, struct mtk_video_dec_buf, vb); |
| 1153 | buf = container_of(vb2_v4l2, struct mtk_video_dec_buf, vb); | ||
| 1154 | if (buf->lastframe) { | 1149 | if (buf->lastframe) { |
| 1155 | /* This shouldn't happen. Just in case. */ | 1150 | /* This shouldn't happen. Just in case. */ |
| 1156 | mtk_v4l2_err("Invalid flush buffer."); | 1151 | mtk_v4l2_err("Invalid flush buffer."); |
| @@ -1158,8 +1153,8 @@ static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb) | |||
| 1158 | return; | 1153 | return; |
| 1159 | } | 1154 | } |
| 1160 | 1155 | ||
| 1161 | src_mem.va = vb2_plane_vaddr(src_buf, 0); | 1156 | src_mem.va = vb2_plane_vaddr(&src_buf->vb2_buf, 0); |
| 1162 | src_mem.dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, 0); | 1157 | src_mem.dma_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); |
| 1163 | src_mem.size = (size_t)src_buf->planes[0].bytesused; | 1158 | src_mem.size = (size_t)src_buf->planes[0].bytesused; |
| 1164 | mtk_v4l2_debug(2, | 1159 | mtk_v4l2_debug(2, |
| 1165 | "[%d] buf id=%d va=%p dma=%pad size=%zx", | 1160 | "[%d] buf id=%d va=%p dma=%pad size=%zx", |
| @@ -1170,7 +1165,7 @@ static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb) | |||
| 1170 | ret = vdec_if_decode(ctx, &src_mem, NULL, &res_chg); | 1165 | ret = vdec_if_decode(ctx, &src_mem, NULL, &res_chg); |
| 1171 | if (ret || !res_chg) { | 1166 | if (ret || !res_chg) { |
| 1172 | /* | 1167 | /* |
| 1173 | * fb == NULL menas to parse SPS/PPS header or | 1168 | * fb == NULL means to parse SPS/PPS header or |
| 1174 | * resolution info in src_mem. Decode can fail | 1169 | * resolution info in src_mem. Decode can fail |
| 1175 | * if there is no SPS header or picture info | 1170 | * if there is no SPS header or picture info |
| 1176 | * in bs | 1171 | * in bs |
| @@ -1181,11 +1176,9 @@ static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb) | |||
| 1181 | mtk_v4l2_err("[%d] Unrecoverable error in vdec_if_decode.", | 1176 | mtk_v4l2_err("[%d] Unrecoverable error in vdec_if_decode.", |
| 1182 | ctx->id); | 1177 | ctx->id); |
| 1183 | ctx->state = MTK_STATE_ABORT; | 1178 | ctx->state = MTK_STATE_ABORT; |
| 1184 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(src_buf), | 1179 | v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR); |
| 1185 | VB2_BUF_STATE_ERROR); | ||
| 1186 | } else { | 1180 | } else { |
| 1187 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(src_buf), | 1181 | v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); |
| 1188 | VB2_BUF_STATE_DONE); | ||
| 1189 | } | 1182 | } |
| 1190 | mtk_v4l2_debug(ret ? 0 : 1, | 1183 | mtk_v4l2_debug(ret ? 0 : 1, |
| 1191 | "[%d] vdec_if_decode() src_buf=%d, size=%zu, fail=%d, res_chg=%d", | 1184 | "[%d] vdec_if_decode() src_buf=%d, size=%zu, fail=%d, res_chg=%d", |
| @@ -1281,7 +1274,7 @@ static int vb2ops_vdec_start_streaming(struct vb2_queue *q, unsigned int count) | |||
| 1281 | 1274 | ||
| 1282 | static void vb2ops_vdec_stop_streaming(struct vb2_queue *q) | 1275 | static void vb2ops_vdec_stop_streaming(struct vb2_queue *q) |
| 1283 | { | 1276 | { |
| 1284 | struct vb2_buffer *src_buf = NULL, *dst_buf = NULL; | 1277 | struct vb2_v4l2_buffer *src_buf = NULL, *dst_buf = NULL; |
| 1285 | struct mtk_vcodec_ctx *ctx = vb2_get_drv_priv(q); | 1278 | struct mtk_vcodec_ctx *ctx = vb2_get_drv_priv(q); |
| 1286 | 1279 | ||
| 1287 | mtk_v4l2_debug(3, "[%d] (%d) state=(%x) ctx->decoded_frame_cnt=%d", | 1280 | mtk_v4l2_debug(3, "[%d] (%d) state=(%x) ctx->decoded_frame_cnt=%d", |
| @@ -1289,12 +1282,10 @@ static void vb2ops_vdec_stop_streaming(struct vb2_queue *q) | |||
| 1289 | 1282 | ||
| 1290 | if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | 1283 | if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { |
| 1291 | while ((src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx))) { | 1284 | while ((src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx))) { |
| 1292 | struct vb2_v4l2_buffer *vb2_v4l2 = | ||
| 1293 | to_vb2_v4l2_buffer(src_buf); | ||
| 1294 | struct mtk_video_dec_buf *buf_info = container_of( | 1285 | struct mtk_video_dec_buf *buf_info = container_of( |
| 1295 | vb2_v4l2, struct mtk_video_dec_buf, vb); | 1286 | src_buf, struct mtk_video_dec_buf, vb); |
| 1296 | if (!buf_info->lastframe) | 1287 | if (!buf_info->lastframe) |
| 1297 | v4l2_m2m_buf_done(vb2_v4l2, | 1288 | v4l2_m2m_buf_done(src_buf, |
| 1298 | VB2_BUF_STATE_ERROR); | 1289 | VB2_BUF_STATE_ERROR); |
| 1299 | } | 1290 | } |
| 1300 | return; | 1291 | return; |
| @@ -1323,10 +1314,9 @@ static void vb2ops_vdec_stop_streaming(struct vb2_queue *q) | |||
| 1323 | ctx->state = MTK_STATE_FLUSH; | 1314 | ctx->state = MTK_STATE_FLUSH; |
| 1324 | 1315 | ||
| 1325 | while ((dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx))) { | 1316 | while ((dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx))) { |
| 1326 | vb2_set_plane_payload(dst_buf, 0, 0); | 1317 | vb2_set_plane_payload(&dst_buf->vb2_buf, 0, 0); |
| 1327 | vb2_set_plane_payload(dst_buf, 1, 0); | 1318 | vb2_set_plane_payload(&dst_buf->vb2_buf, 1, 0); |
| 1328 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), | 1319 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_ERROR); |
| 1329 | VB2_BUF_STATE_ERROR); | ||
| 1330 | } | 1320 | } |
| 1331 | 1321 | ||
| 1332 | } | 1322 | } |
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c index 79ca03ac449c..7884465afcd2 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c | |||
| @@ -27,11 +27,14 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) | |||
| 27 | struct device_node *node; | 27 | struct device_node *node; |
| 28 | struct platform_device *pdev; | 28 | struct platform_device *pdev; |
| 29 | struct mtk_vcodec_pm *pm; | 29 | struct mtk_vcodec_pm *pm; |
| 30 | int ret = 0; | 30 | struct mtk_vcodec_clk *dec_clk; |
| 31 | struct mtk_vcodec_clk_info *clk_info; | ||
| 32 | int i = 0, ret = 0; | ||
| 31 | 33 | ||
| 32 | pdev = mtkdev->plat_dev; | 34 | pdev = mtkdev->plat_dev; |
| 33 | pm = &mtkdev->pm; | 35 | pm = &mtkdev->pm; |
| 34 | pm->mtkdev = mtkdev; | 36 | pm->mtkdev = mtkdev; |
| 37 | dec_clk = &pm->vdec_clk; | ||
| 35 | node = of_parse_phandle(pdev->dev.of_node, "mediatek,larb", 0); | 38 | node = of_parse_phandle(pdev->dev.of_node, "mediatek,larb", 0); |
| 36 | if (!node) { | 39 | if (!node) { |
| 37 | mtk_v4l2_err("of_parse_phandle mediatek,larb fail!"); | 40 | mtk_v4l2_err("of_parse_phandle mediatek,larb fail!"); |
| @@ -47,52 +50,34 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) | |||
| 47 | pdev = mtkdev->plat_dev; | 50 | pdev = mtkdev->plat_dev; |
| 48 | pm->dev = &pdev->dev; | 51 | pm->dev = &pdev->dev; |
| 49 | 52 | ||
| 50 | pm->vcodecpll = devm_clk_get(&pdev->dev, "vcodecpll"); | 53 | dec_clk->clk_num = |
| 51 | if (IS_ERR(pm->vcodecpll)) { | 54 | of_property_count_strings(pdev->dev.of_node, "clock-names"); |
| 52 | mtk_v4l2_err("devm_clk_get vcodecpll fail"); | 55 | if (dec_clk->clk_num > 0) { |
| 53 | ret = PTR_ERR(pm->vcodecpll); | 56 | dec_clk->clk_info = devm_kcalloc(&pdev->dev, |
| 57 | dec_clk->clk_num, sizeof(*clk_info), | ||
| 58 | GFP_KERNEL); | ||
| 59 | if (!dec_clk->clk_info) | ||
| 60 | return -ENOMEM; | ||
| 61 | } else { | ||
| 62 | mtk_v4l2_err("Failed to get vdec clock count"); | ||
| 63 | return -EINVAL; | ||
| 54 | } | 64 | } |
| 55 | 65 | ||
| 56 | pm->univpll_d2 = devm_clk_get(&pdev->dev, "univpll_d2"); | 66 | for (i = 0; i < dec_clk->clk_num; i++) { |
| 57 | if (IS_ERR(pm->univpll_d2)) { | 67 | clk_info = &dec_clk->clk_info[i]; |
| 58 | mtk_v4l2_err("devm_clk_get univpll_d2 fail"); | 68 | ret = of_property_read_string_index(pdev->dev.of_node, |
| 59 | ret = PTR_ERR(pm->univpll_d2); | 69 | "clock-names", i, &clk_info->clk_name); |
| 60 | } | 70 | if (ret) { |
| 61 | 71 | mtk_v4l2_err("Failed to get clock name id = %d", i); | |
| 62 | pm->clk_cci400_sel = devm_clk_get(&pdev->dev, "clk_cci400_sel"); | 72 | return ret; |
| 63 | if (IS_ERR(pm->clk_cci400_sel)) { | 73 | } |
| 64 | mtk_v4l2_err("devm_clk_get clk_cci400_sel fail"); | 74 | clk_info->vcodec_clk = devm_clk_get(&pdev->dev, |
| 65 | ret = PTR_ERR(pm->clk_cci400_sel); | 75 | clk_info->clk_name); |
| 66 | } | 76 | if (IS_ERR(clk_info->vcodec_clk)) { |
| 67 | 77 | mtk_v4l2_err("devm_clk_get (%d)%s fail", i, | |
| 68 | pm->vdec_sel = devm_clk_get(&pdev->dev, "vdec_sel"); | 78 | clk_info->clk_name); |
| 69 | if (IS_ERR(pm->vdec_sel)) { | 79 | return PTR_ERR(clk_info->vcodec_clk); |
| 70 | mtk_v4l2_err("devm_clk_get vdec_sel fail"); | 80 | } |
| 71 | ret = PTR_ERR(pm->vdec_sel); | ||
| 72 | } | ||
| 73 | |||
| 74 | pm->vdecpll = devm_clk_get(&pdev->dev, "vdecpll"); | ||
| 75 | if (IS_ERR(pm->vdecpll)) { | ||
| 76 | mtk_v4l2_err("devm_clk_get vdecpll fail"); | ||
| 77 | ret = PTR_ERR(pm->vdecpll); | ||
| 78 | } | ||
| 79 | |||
| 80 | pm->vencpll = devm_clk_get(&pdev->dev, "vencpll"); | ||
| 81 | if (IS_ERR(pm->vencpll)) { | ||
| 82 | mtk_v4l2_err("devm_clk_get vencpll fail"); | ||
| 83 | ret = PTR_ERR(pm->vencpll); | ||
| 84 | } | ||
| 85 | |||
| 86 | pm->venc_lt_sel = devm_clk_get(&pdev->dev, "venc_lt_sel"); | ||
| 87 | if (IS_ERR(pm->venc_lt_sel)) { | ||
| 88 | mtk_v4l2_err("devm_clk_get venc_lt_sel fail"); | ||
| 89 | ret = PTR_ERR(pm->venc_lt_sel); | ||
| 90 | } | ||
| 91 | |||
| 92 | pm->vdec_bus_clk_src = devm_clk_get(&pdev->dev, "vdec_bus_clk_src"); | ||
| 93 | if (IS_ERR(pm->vdec_bus_clk_src)) { | ||
| 94 | mtk_v4l2_err("devm_clk_get vdec_bus_clk_src"); | ||
| 95 | ret = PTR_ERR(pm->vdec_bus_clk_src); | ||
| 96 | } | 81 | } |
| 97 | 82 | ||
| 98 | pm_runtime_enable(&pdev->dev); | 83 | pm_runtime_enable(&pdev->dev); |
| @@ -125,78 +110,36 @@ void mtk_vcodec_dec_pw_off(struct mtk_vcodec_pm *pm) | |||
| 125 | 110 | ||
| 126 | void mtk_vcodec_dec_clock_on(struct mtk_vcodec_pm *pm) | 111 | void mtk_vcodec_dec_clock_on(struct mtk_vcodec_pm *pm) |
| 127 | { | 112 | { |
| 128 | int ret; | 113 | struct mtk_vcodec_clk *dec_clk = &pm->vdec_clk; |
| 129 | 114 | int ret, i = 0; | |
| 130 | ret = clk_set_rate(pm->vcodecpll, 1482 * 1000000); | 115 | |
| 131 | if (ret) | 116 | for (i = 0; i < dec_clk->clk_num; i++) { |
| 132 | mtk_v4l2_err("clk_set_rate vcodecpll fail %d", ret); | 117 | ret = clk_prepare_enable(dec_clk->clk_info[i].vcodec_clk); |
| 133 | 118 | if (ret) { | |
| 134 | ret = clk_set_rate(pm->vencpll, 800 * 1000000); | 119 | mtk_v4l2_err("clk_prepare_enable %d %s fail %d", i, |
| 135 | if (ret) | 120 | dec_clk->clk_info[i].clk_name, ret); |
| 136 | mtk_v4l2_err("clk_set_rate vencpll fail %d", ret); | 121 | goto error; |
| 137 | 122 | } | |
| 138 | ret = clk_prepare_enable(pm->vcodecpll); | 123 | } |
| 139 | if (ret) | ||
| 140 | mtk_v4l2_err("clk_prepare_enable vcodecpll fail %d", ret); | ||
| 141 | |||
| 142 | ret = clk_prepare_enable(pm->vencpll); | ||
| 143 | if (ret) | ||
| 144 | mtk_v4l2_err("clk_prepare_enable vencpll fail %d", ret); | ||
| 145 | |||
| 146 | ret = clk_prepare_enable(pm->vdec_bus_clk_src); | ||
| 147 | if (ret) | ||
| 148 | mtk_v4l2_err("clk_prepare_enable vdec_bus_clk_src fail %d", | ||
| 149 | ret); | ||
| 150 | |||
| 151 | ret = clk_prepare_enable(pm->venc_lt_sel); | ||
| 152 | if (ret) | ||
| 153 | mtk_v4l2_err("clk_prepare_enable venc_lt_sel fail %d", ret); | ||
| 154 | |||
| 155 | ret = clk_set_parent(pm->venc_lt_sel, pm->vdec_bus_clk_src); | ||
| 156 | if (ret) | ||
| 157 | mtk_v4l2_err("clk_set_parent venc_lt_sel vdec_bus_clk_src fail %d", | ||
| 158 | ret); | ||
| 159 | |||
| 160 | ret = clk_prepare_enable(pm->univpll_d2); | ||
| 161 | if (ret) | ||
| 162 | mtk_v4l2_err("clk_prepare_enable univpll_d2 fail %d", ret); | ||
| 163 | |||
| 164 | ret = clk_prepare_enable(pm->clk_cci400_sel); | ||
| 165 | if (ret) | ||
| 166 | mtk_v4l2_err("clk_prepare_enable clk_cci400_sel fail %d", ret); | ||
| 167 | |||
| 168 | ret = clk_set_parent(pm->clk_cci400_sel, pm->univpll_d2); | ||
| 169 | if (ret) | ||
| 170 | mtk_v4l2_err("clk_set_parent clk_cci400_sel univpll_d2 fail %d", | ||
| 171 | ret); | ||
| 172 | |||
| 173 | ret = clk_prepare_enable(pm->vdecpll); | ||
| 174 | if (ret) | ||
| 175 | mtk_v4l2_err("clk_prepare_enable vdecpll fail %d", ret); | ||
| 176 | |||
| 177 | ret = clk_prepare_enable(pm->vdec_sel); | ||
| 178 | if (ret) | ||
| 179 | mtk_v4l2_err("clk_prepare_enable vdec_sel fail %d", ret); | ||
| 180 | |||
| 181 | ret = clk_set_parent(pm->vdec_sel, pm->vdecpll); | ||
| 182 | if (ret) | ||
| 183 | mtk_v4l2_err("clk_set_parent vdec_sel vdecpll fail %d", ret); | ||
| 184 | 124 | ||
| 185 | ret = mtk_smi_larb_get(pm->larbvdec); | 125 | ret = mtk_smi_larb_get(pm->larbvdec); |
| 186 | if (ret) | 126 | if (ret) { |
| 187 | mtk_v4l2_err("mtk_smi_larb_get larbvdec fail %d", ret); | 127 | mtk_v4l2_err("mtk_smi_larb_get larbvdec fail %d", ret); |
| 128 | goto error; | ||
| 129 | } | ||
| 130 | return; | ||
| 188 | 131 | ||
| 132 | error: | ||
| 133 | for (i -= 1; i >= 0; i--) | ||
| 134 | clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk); | ||
| 189 | } | 135 | } |
| 190 | 136 | ||
| 191 | void mtk_vcodec_dec_clock_off(struct mtk_vcodec_pm *pm) | 137 | void mtk_vcodec_dec_clock_off(struct mtk_vcodec_pm *pm) |
| 192 | { | 138 | { |
| 139 | struct mtk_vcodec_clk *dec_clk = &pm->vdec_clk; | ||
| 140 | int i = 0; | ||
| 141 | |||
| 193 | mtk_smi_larb_put(pm->larbvdec); | 142 | mtk_smi_larb_put(pm->larbvdec); |
| 194 | clk_disable_unprepare(pm->vdec_sel); | 143 | for (i = dec_clk->clk_num - 1; i >= 0; i--) |
| 195 | clk_disable_unprepare(pm->vdecpll); | 144 | clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk); |
| 196 | clk_disable_unprepare(pm->univpll_d2); | ||
| 197 | clk_disable_unprepare(pm->clk_cci400_sel); | ||
| 198 | clk_disable_unprepare(pm->venc_lt_sel); | ||
| 199 | clk_disable_unprepare(pm->vdec_bus_clk_src); | ||
| 200 | clk_disable_unprepare(pm->vencpll); | ||
| 201 | clk_disable_unprepare(pm->vcodecpll); | ||
| 202 | } | 145 | } |
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h index 3cffb381ac8e..e7e2a108def9 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h | |||
| @@ -151,9 +151,9 @@ struct mtk_q_data { | |||
| 151 | * @intra_period: I frame period | 151 | * @intra_period: I frame period |
| 152 | * @gop_size: group of picture size, it's used as the intra frame period | 152 | * @gop_size: group of picture size, it's used as the intra frame period |
| 153 | * @framerate_num: frame rate numerator. ex: framerate_num=30 and | 153 | * @framerate_num: frame rate numerator. ex: framerate_num=30 and |
| 154 | * framerate_denom=1 menas FPS is 30 | 154 | * framerate_denom=1 means FPS is 30 |
| 155 | * @framerate_denom: frame rate denominator. ex: framerate_num=30 and | 155 | * @framerate_denom: frame rate denominator. ex: framerate_num=30 and |
| 156 | * framerate_denom=1 menas FPS is 30 | 156 | * framerate_denom=1 means FPS is 30 |
| 157 | * @h264_max_qp: Max value for H.264 quantization parameter | 157 | * @h264_max_qp: Max value for H.264 quantization parameter |
| 158 | * @h264_profile: V4L2 defined H.264 profile | 158 | * @h264_profile: V4L2 defined H.264 profile |
| 159 | * @h264_level: V4L2 defined H.264 level | 159 | * @h264_level: V4L2 defined H.264 level |
| @@ -176,22 +176,29 @@ struct mtk_enc_params { | |||
| 176 | }; | 176 | }; |
| 177 | 177 | ||
| 178 | /** | 178 | /** |
| 179 | * struct mtk_vcodec_clk_info - Structure used to store clock name | ||
| 180 | */ | ||
| 181 | struct mtk_vcodec_clk_info { | ||
| 182 | const char *clk_name; | ||
| 183 | struct clk *vcodec_clk; | ||
| 184 | }; | ||
| 185 | |||
| 186 | /** | ||
| 187 | * struct mtk_vcodec_clk - Structure used to store vcodec clock information | ||
| 188 | */ | ||
| 189 | struct mtk_vcodec_clk { | ||
| 190 | struct mtk_vcodec_clk_info *clk_info; | ||
| 191 | int clk_num; | ||
| 192 | }; | ||
| 193 | |||
| 194 | /** | ||
| 179 | * struct mtk_vcodec_pm - Power management data structure | 195 | * struct mtk_vcodec_pm - Power management data structure |
| 180 | */ | 196 | */ |
| 181 | struct mtk_vcodec_pm { | 197 | struct mtk_vcodec_pm { |
| 182 | struct clk *vdec_bus_clk_src; | 198 | struct mtk_vcodec_clk vdec_clk; |
| 183 | struct clk *vencpll; | ||
| 184 | |||
| 185 | struct clk *vcodecpll; | ||
| 186 | struct clk *univpll_d2; | ||
| 187 | struct clk *clk_cci400_sel; | ||
| 188 | struct clk *vdecpll; | ||
| 189 | struct clk *vdec_sel; | ||
| 190 | struct clk *vencpll_d2; | ||
| 191 | struct clk *venc_sel; | ||
| 192 | struct clk *univpll1_d2; | ||
| 193 | struct clk *venc_lt_sel; | ||
| 194 | struct device *larbvdec; | 199 | struct device *larbvdec; |
| 200 | |||
| 201 | struct mtk_vcodec_clk venc_clk; | ||
| 195 | struct device *larbvenc; | 202 | struct device *larbvenc; |
| 196 | struct device *larbvenclt; | 203 | struct device *larbvenclt; |
| 197 | struct device *dev; | 204 | struct device *dev; |
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c index d1f12257bf66..c6b48b5925fb 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c | |||
| @@ -393,7 +393,7 @@ static void mtk_venc_set_param(struct mtk_vcodec_ctx *ctx, | |||
| 393 | param->input_yuv_fmt = VENC_YUV_FORMAT_NV21; | 393 | param->input_yuv_fmt = VENC_YUV_FORMAT_NV21; |
| 394 | break; | 394 | break; |
| 395 | default: | 395 | default: |
| 396 | mtk_v4l2_err("Unsupport fourcc =%d", q_data_src->fmt->fourcc); | 396 | mtk_v4l2_err("Unsupported fourcc =%d", q_data_src->fmt->fourcc); |
| 397 | break; | 397 | break; |
| 398 | } | 398 | } |
| 399 | param->h264_profile = enc_params->h264_profile; | 399 | param->h264_profile = enc_params->h264_profile; |
| @@ -887,7 +887,7 @@ err_set_param: | |||
| 887 | static void vb2ops_venc_stop_streaming(struct vb2_queue *q) | 887 | static void vb2ops_venc_stop_streaming(struct vb2_queue *q) |
| 888 | { | 888 | { |
| 889 | struct mtk_vcodec_ctx *ctx = vb2_get_drv_priv(q); | 889 | struct mtk_vcodec_ctx *ctx = vb2_get_drv_priv(q); |
| 890 | struct vb2_buffer *src_buf, *dst_buf; | 890 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 891 | int ret; | 891 | int ret; |
| 892 | 892 | ||
| 893 | mtk_v4l2_debug(2, "[%d]-> type=%d", ctx->id, q->type); | 893 | mtk_v4l2_debug(2, "[%d]-> type=%d", ctx->id, q->type); |
| @@ -895,13 +895,11 @@ static void vb2ops_venc_stop_streaming(struct vb2_queue *q) | |||
| 895 | if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | 895 | if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { |
| 896 | while ((dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx))) { | 896 | while ((dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx))) { |
| 897 | dst_buf->planes[0].bytesused = 0; | 897 | dst_buf->planes[0].bytesused = 0; |
| 898 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), | 898 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_ERROR); |
| 899 | VB2_BUF_STATE_ERROR); | ||
| 900 | } | 899 | } |
| 901 | } else { | 900 | } else { |
| 902 | while ((src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx))) | 901 | while ((src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx))) |
| 903 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(src_buf), | 902 | v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR); |
| 904 | VB2_BUF_STATE_ERROR); | ||
| 905 | } | 903 | } |
| 906 | 904 | ||
| 907 | if ((q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && | 905 | if ((q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && |
| @@ -937,8 +935,7 @@ static int mtk_venc_encode_header(void *priv) | |||
| 937 | { | 935 | { |
| 938 | struct mtk_vcodec_ctx *ctx = priv; | 936 | struct mtk_vcodec_ctx *ctx = priv; |
| 939 | int ret; | 937 | int ret; |
| 940 | struct vb2_buffer *src_buf, *dst_buf; | 938 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 941 | struct vb2_v4l2_buffer *dst_vb2_v4l2, *src_vb2_v4l2; | ||
| 942 | struct mtk_vcodec_mem bs_buf; | 939 | struct mtk_vcodec_mem bs_buf; |
| 943 | struct venc_done_result enc_result; | 940 | struct venc_done_result enc_result; |
| 944 | 941 | ||
| @@ -948,14 +945,14 @@ static int mtk_venc_encode_header(void *priv) | |||
| 948 | return -EINVAL; | 945 | return -EINVAL; |
| 949 | } | 946 | } |
| 950 | 947 | ||
| 951 | bs_buf.va = vb2_plane_vaddr(dst_buf, 0); | 948 | bs_buf.va = vb2_plane_vaddr(&dst_buf->vb2_buf, 0); |
| 952 | bs_buf.dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0); | 949 | bs_buf.dma_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); |
| 953 | bs_buf.size = (size_t)dst_buf->planes[0].length; | 950 | bs_buf.size = (size_t)dst_buf->planes[0].length; |
| 954 | 951 | ||
| 955 | mtk_v4l2_debug(1, | 952 | mtk_v4l2_debug(1, |
| 956 | "[%d] buf id=%d va=0x%p dma_addr=0x%llx size=%zu", | 953 | "[%d] buf id=%d va=0x%p dma_addr=0x%llx size=%zu", |
| 957 | ctx->id, | 954 | ctx->id, |
| 958 | dst_buf->index, bs_buf.va, | 955 | dst_buf->vb2_buf.index, bs_buf.va, |
| 959 | (u64)bs_buf.dma_addr, | 956 | (u64)bs_buf.dma_addr, |
| 960 | bs_buf.size); | 957 | bs_buf.size); |
| 961 | 958 | ||
| @@ -964,26 +961,23 @@ static int mtk_venc_encode_header(void *priv) | |||
| 964 | NULL, &bs_buf, &enc_result); | 961 | NULL, &bs_buf, &enc_result); |
| 965 | 962 | ||
| 966 | if (ret) { | 963 | if (ret) { |
| 967 | dst_buf->planes[0].bytesused = 0; | 964 | dst_buf->vb2_buf.planes[0].bytesused = 0; |
| 968 | ctx->state = MTK_STATE_ABORT; | 965 | ctx->state = MTK_STATE_ABORT; |
| 969 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), | 966 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_ERROR); |
| 970 | VB2_BUF_STATE_ERROR); | ||
| 971 | mtk_v4l2_err("venc_if_encode failed=%d", ret); | 967 | mtk_v4l2_err("venc_if_encode failed=%d", ret); |
| 972 | return -EINVAL; | 968 | return -EINVAL; |
| 973 | } | 969 | } |
| 974 | src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx); | 970 | src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx); |
| 975 | if (src_buf) { | 971 | if (src_buf) { |
| 976 | src_vb2_v4l2 = to_vb2_v4l2_buffer(src_buf); | 972 | dst_buf->vb2_buf.timestamp = src_buf->vb2_buf.timestamp; |
| 977 | dst_vb2_v4l2 = to_vb2_v4l2_buffer(dst_buf); | 973 | dst_buf->timecode = src_buf->timecode; |
| 978 | dst_buf->timestamp = src_buf->timestamp; | ||
| 979 | dst_vb2_v4l2->timecode = src_vb2_v4l2->timecode; | ||
| 980 | } else { | 974 | } else { |
| 981 | mtk_v4l2_err("No timestamp for the header buffer."); | 975 | mtk_v4l2_err("No timestamp for the header buffer."); |
| 982 | } | 976 | } |
| 983 | 977 | ||
| 984 | ctx->state = MTK_STATE_HEADER; | 978 | ctx->state = MTK_STATE_HEADER; |
| 985 | dst_buf->planes[0].bytesused = enc_result.bs_size; | 979 | dst_buf->planes[0].bytesused = enc_result.bs_size; |
| 986 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), VB2_BUF_STATE_DONE); | 980 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); |
| 987 | 981 | ||
| 988 | return 0; | 982 | return 0; |
| 989 | } | 983 | } |
| @@ -991,9 +985,7 @@ static int mtk_venc_encode_header(void *priv) | |||
| 991 | static int mtk_venc_param_change(struct mtk_vcodec_ctx *ctx) | 985 | static int mtk_venc_param_change(struct mtk_vcodec_ctx *ctx) |
| 992 | { | 986 | { |
| 993 | struct venc_enc_param enc_prm; | 987 | struct venc_enc_param enc_prm; |
| 994 | struct vb2_buffer *vb = v4l2_m2m_next_src_buf(ctx->m2m_ctx); | 988 | struct vb2_v4l2_buffer *vb2_v4l2 = v4l2_m2m_next_src_buf(ctx->m2m_ctx); |
| 995 | struct vb2_v4l2_buffer *vb2_v4l2 = | ||
| 996 | container_of(vb, struct vb2_v4l2_buffer, vb2_buf); | ||
| 997 | struct mtk_video_enc_buf *mtk_buf = | 989 | struct mtk_video_enc_buf *mtk_buf = |
| 998 | container_of(vb2_v4l2, struct mtk_video_enc_buf, vb); | 990 | container_of(vb2_v4l2, struct mtk_video_enc_buf, vb); |
| 999 | 991 | ||
| @@ -1067,12 +1059,11 @@ static void mtk_venc_worker(struct work_struct *work) | |||
| 1067 | { | 1059 | { |
| 1068 | struct mtk_vcodec_ctx *ctx = container_of(work, struct mtk_vcodec_ctx, | 1060 | struct mtk_vcodec_ctx *ctx = container_of(work, struct mtk_vcodec_ctx, |
| 1069 | encode_work); | 1061 | encode_work); |
| 1070 | struct vb2_buffer *src_buf, *dst_buf; | 1062 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 1071 | struct venc_frm_buf frm_buf; | 1063 | struct venc_frm_buf frm_buf; |
| 1072 | struct mtk_vcodec_mem bs_buf; | 1064 | struct mtk_vcodec_mem bs_buf; |
| 1073 | struct venc_done_result enc_result; | 1065 | struct venc_done_result enc_result; |
| 1074 | int ret, i; | 1066 | int ret, i; |
| 1075 | struct vb2_v4l2_buffer *dst_vb2_v4l2, *src_vb2_v4l2; | ||
| 1076 | 1067 | ||
| 1077 | /* check dst_buf, dst_buf may be removed in device_run | 1068 | /* check dst_buf, dst_buf may be removed in device_run |
| 1078 | * to stored encdoe header so we need check dst_buf and | 1069 | * to stored encdoe header so we need check dst_buf and |
| @@ -1086,15 +1077,15 @@ static void mtk_venc_worker(struct work_struct *work) | |||
| 1086 | 1077 | ||
| 1087 | src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx); | 1078 | src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx); |
| 1088 | memset(&frm_buf, 0, sizeof(frm_buf)); | 1079 | memset(&frm_buf, 0, sizeof(frm_buf)); |
| 1089 | for (i = 0; i < src_buf->num_planes ; i++) { | 1080 | for (i = 0; i < src_buf->vb2_buf.num_planes ; i++) { |
| 1090 | frm_buf.fb_addr[i].dma_addr = | 1081 | frm_buf.fb_addr[i].dma_addr = |
| 1091 | vb2_dma_contig_plane_dma_addr(src_buf, i); | 1082 | vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, i); |
| 1092 | frm_buf.fb_addr[i].size = | 1083 | frm_buf.fb_addr[i].size = |
| 1093 | (size_t)src_buf->planes[i].length; | 1084 | (size_t)src_buf->vb2_buf.planes[i].length; |
| 1094 | } | 1085 | } |
| 1095 | bs_buf.va = vb2_plane_vaddr(dst_buf, 0); | 1086 | bs_buf.va = vb2_plane_vaddr(&dst_buf->vb2_buf, 0); |
| 1096 | bs_buf.dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0); | 1087 | bs_buf.dma_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); |
| 1097 | bs_buf.size = (size_t)dst_buf->planes[0].length; | 1088 | bs_buf.size = (size_t)dst_buf->vb2_buf.planes[0].length; |
| 1098 | 1089 | ||
| 1099 | mtk_v4l2_debug(2, | 1090 | mtk_v4l2_debug(2, |
| 1100 | "Framebuf PA=%llx Size=0x%zx;PA=0x%llx Size=0x%zx;PA=0x%llx Size=%zu", | 1091 | "Framebuf PA=%llx Size=0x%zx;PA=0x%llx Size=0x%zx;PA=0x%llx Size=%zu", |
| @@ -1108,28 +1099,21 @@ static void mtk_venc_worker(struct work_struct *work) | |||
| 1108 | ret = venc_if_encode(ctx, VENC_START_OPT_ENCODE_FRAME, | 1099 | ret = venc_if_encode(ctx, VENC_START_OPT_ENCODE_FRAME, |
| 1109 | &frm_buf, &bs_buf, &enc_result); | 1100 | &frm_buf, &bs_buf, &enc_result); |
| 1110 | 1101 | ||
| 1111 | src_vb2_v4l2 = to_vb2_v4l2_buffer(src_buf); | 1102 | dst_buf->vb2_buf.timestamp = src_buf->vb2_buf.timestamp; |
| 1112 | dst_vb2_v4l2 = to_vb2_v4l2_buffer(dst_buf); | 1103 | dst_buf->timecode = src_buf->timecode; |
| 1113 | |||
| 1114 | dst_buf->timestamp = src_buf->timestamp; | ||
| 1115 | dst_vb2_v4l2->timecode = src_vb2_v4l2->timecode; | ||
| 1116 | 1104 | ||
| 1117 | if (enc_result.is_key_frm) | 1105 | if (enc_result.is_key_frm) |
| 1118 | dst_vb2_v4l2->flags |= V4L2_BUF_FLAG_KEYFRAME; | 1106 | dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME; |
| 1119 | 1107 | ||
| 1120 | if (ret) { | 1108 | if (ret) { |
| 1121 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(src_buf), | 1109 | v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR); |
| 1122 | VB2_BUF_STATE_ERROR); | ||
| 1123 | dst_buf->planes[0].bytesused = 0; | 1110 | dst_buf->planes[0].bytesused = 0; |
| 1124 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), | 1111 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_ERROR); |
| 1125 | VB2_BUF_STATE_ERROR); | ||
| 1126 | mtk_v4l2_err("venc_if_encode failed=%d", ret); | 1112 | mtk_v4l2_err("venc_if_encode failed=%d", ret); |
| 1127 | } else { | 1113 | } else { |
| 1128 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(src_buf), | 1114 | v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); |
| 1129 | VB2_BUF_STATE_DONE); | ||
| 1130 | dst_buf->planes[0].bytesused = enc_result.bs_size; | 1115 | dst_buf->planes[0].bytesused = enc_result.bs_size; |
| 1131 | v4l2_m2m_buf_done(to_vb2_v4l2_buffer(dst_buf), | 1116 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); |
| 1132 | VB2_BUF_STATE_DONE); | ||
| 1133 | mtk_v4l2_debug(2, "venc_if_encode bs size=%d", | 1117 | mtk_v4l2_debug(2, "venc_if_encode bs size=%d", |
| 1134 | enc_result.bs_size); | 1118 | enc_result.bs_size); |
| 1135 | } | 1119 | } |
| @@ -1137,7 +1121,7 @@ static void mtk_venc_worker(struct work_struct *work) | |||
| 1137 | v4l2_m2m_job_finish(ctx->dev->m2m_dev_enc, ctx->m2m_ctx); | 1121 | v4l2_m2m_job_finish(ctx->dev->m2m_dev_enc, ctx->m2m_ctx); |
| 1138 | 1122 | ||
| 1139 | mtk_v4l2_debug(1, "<=== src_buf[%d] dst_buf[%d] venc_if_encode ret=%d Size=%u===>", | 1123 | mtk_v4l2_debug(1, "<=== src_buf[%d] dst_buf[%d] venc_if_encode ret=%d Size=%u===>", |
| 1140 | src_buf->index, dst_buf->index, ret, | 1124 | src_buf->vb2_buf.index, dst_buf->vb2_buf.index, ret, |
| 1141 | enc_result.bs_size); | 1125 | enc_result.bs_size); |
| 1142 | } | 1126 | } |
| 1143 | 1127 | ||
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c index 7c025045ea90..39375b8ea27c 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c | |||
| @@ -27,9 +27,11 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) | |||
| 27 | { | 27 | { |
| 28 | struct device_node *node; | 28 | struct device_node *node; |
| 29 | struct platform_device *pdev; | 29 | struct platform_device *pdev; |
| 30 | struct device *dev; | ||
| 31 | struct mtk_vcodec_pm *pm; | 30 | struct mtk_vcodec_pm *pm; |
| 32 | int ret = 0; | 31 | struct mtk_vcodec_clk *enc_clk; |
| 32 | struct mtk_vcodec_clk_info *clk_info; | ||
| 33 | int ret = 0, i = 0; | ||
| 34 | struct device *dev; | ||
| 33 | 35 | ||
| 34 | pdev = mtkdev->plat_dev; | 36 | pdev = mtkdev->plat_dev; |
| 35 | pm = &mtkdev->pm; | 37 | pm = &mtkdev->pm; |
| @@ -37,6 +39,7 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) | |||
| 37 | pm->mtkdev = mtkdev; | 39 | pm->mtkdev = mtkdev; |
| 38 | pm->dev = &pdev->dev; | 40 | pm->dev = &pdev->dev; |
| 39 | dev = &pdev->dev; | 41 | dev = &pdev->dev; |
| 42 | enc_clk = &pm->venc_clk; | ||
| 40 | 43 | ||
| 41 | node = of_parse_phandle(dev->of_node, "mediatek,larb", 0); | 44 | node = of_parse_phandle(dev->of_node, "mediatek,larb", 0); |
| 42 | if (!node) { | 45 | if (!node) { |
| @@ -68,28 +71,34 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) | |||
| 68 | pdev = mtkdev->plat_dev; | 71 | pdev = mtkdev->plat_dev; |
| 69 | pm->dev = &pdev->dev; | 72 | pm->dev = &pdev->dev; |
| 70 | 73 | ||
| 71 | pm->vencpll_d2 = devm_clk_get(&pdev->dev, "venc_sel_src"); | 74 | enc_clk->clk_num = of_property_count_strings(pdev->dev.of_node, |
| 72 | if (IS_ERR(pm->vencpll_d2)) { | 75 | "clock-names"); |
| 73 | mtk_v4l2_err("devm_clk_get vencpll_d2 fail"); | 76 | if (enc_clk->clk_num > 0) { |
| 74 | ret = PTR_ERR(pm->vencpll_d2); | 77 | enc_clk->clk_info = devm_kcalloc(&pdev->dev, |
| 75 | } | 78 | enc_clk->clk_num, sizeof(*clk_info), |
| 76 | 79 | GFP_KERNEL); | |
| 77 | pm->venc_sel = devm_clk_get(&pdev->dev, "venc_sel"); | 80 | if (!enc_clk->clk_info) |
| 78 | if (IS_ERR(pm->venc_sel)) { | 81 | return -ENOMEM; |
| 79 | mtk_v4l2_err("devm_clk_get venc_sel fail"); | 82 | } else { |
| 80 | ret = PTR_ERR(pm->venc_sel); | 83 | mtk_v4l2_err("Failed to get venc clock count"); |
| 84 | return -EINVAL; | ||
| 81 | } | 85 | } |
| 82 | 86 | ||
| 83 | pm->univpll1_d2 = devm_clk_get(&pdev->dev, "venc_lt_sel_src"); | 87 | for (i = 0; i < enc_clk->clk_num; i++) { |
| 84 | if (IS_ERR(pm->univpll1_d2)) { | 88 | clk_info = &enc_clk->clk_info[i]; |
| 85 | mtk_v4l2_err("devm_clk_get univpll1_d2 fail"); | 89 | ret = of_property_read_string_index(pdev->dev.of_node, |
| 86 | ret = PTR_ERR(pm->univpll1_d2); | 90 | "clock-names", i, &clk_info->clk_name); |
| 87 | } | 91 | if (ret) { |
| 88 | 92 | mtk_v4l2_err("venc failed to get clk name %d", i); | |
| 89 | pm->venc_lt_sel = devm_clk_get(&pdev->dev, "venc_lt_sel"); | 93 | return ret; |
| 90 | if (IS_ERR(pm->venc_lt_sel)) { | 94 | } |
| 91 | mtk_v4l2_err("devm_clk_get venc_lt_sel fail"); | 95 | clk_info->vcodec_clk = devm_clk_get(&pdev->dev, |
| 92 | ret = PTR_ERR(pm->venc_lt_sel); | 96 | clk_info->clk_name); |
| 97 | if (IS_ERR(clk_info->vcodec_clk)) { | ||
| 98 | mtk_v4l2_err("venc devm_clk_get (%d)%s fail", i, | ||
| 99 | clk_info->clk_name); | ||
| 100 | return PTR_ERR(clk_info->vcodec_clk); | ||
| 101 | } | ||
| 93 | } | 102 | } |
| 94 | 103 | ||
| 95 | return ret; | 104 | return ret; |
| @@ -102,38 +111,45 @@ void mtk_vcodec_release_enc_pm(struct mtk_vcodec_dev *mtkdev) | |||
| 102 | 111 | ||
| 103 | void mtk_vcodec_enc_clock_on(struct mtk_vcodec_pm *pm) | 112 | void mtk_vcodec_enc_clock_on(struct mtk_vcodec_pm *pm) |
| 104 | { | 113 | { |
| 105 | int ret; | 114 | struct mtk_vcodec_clk *enc_clk = &pm->venc_clk; |
| 106 | 115 | int ret, i = 0; | |
| 107 | ret = clk_prepare_enable(pm->venc_sel); | 116 | |
| 108 | if (ret) | 117 | for (i = 0; i < enc_clk->clk_num; i++) { |
| 109 | mtk_v4l2_err("clk_prepare_enable fail %d", ret); | 118 | ret = clk_prepare_enable(enc_clk->clk_info[i].vcodec_clk); |
| 110 | 119 | if (ret) { | |
| 111 | ret = clk_set_parent(pm->venc_sel, pm->vencpll_d2); | 120 | mtk_v4l2_err("venc clk_prepare_enable %d %s fail %d", i, |
| 112 | if (ret) | 121 | enc_clk->clk_info[i].clk_name, ret); |
| 113 | mtk_v4l2_err("clk_set_parent fail %d", ret); | 122 | goto clkerr; |
| 114 | 123 | } | |
| 115 | ret = clk_prepare_enable(pm->venc_lt_sel); | 124 | } |
| 116 | if (ret) | ||
| 117 | mtk_v4l2_err("clk_prepare_enable fail %d", ret); | ||
| 118 | |||
| 119 | ret = clk_set_parent(pm->venc_lt_sel, pm->univpll1_d2); | ||
| 120 | if (ret) | ||
| 121 | mtk_v4l2_err("clk_set_parent fail %d", ret); | ||
| 122 | 125 | ||
| 123 | ret = mtk_smi_larb_get(pm->larbvenc); | 126 | ret = mtk_smi_larb_get(pm->larbvenc); |
| 124 | if (ret) | 127 | if (ret) { |
| 125 | mtk_v4l2_err("mtk_smi_larb_get larb3 fail %d", ret); | 128 | mtk_v4l2_err("mtk_smi_larb_get larb3 fail %d", ret); |
| 126 | 129 | goto larbvencerr; | |
| 130 | } | ||
| 127 | ret = mtk_smi_larb_get(pm->larbvenclt); | 131 | ret = mtk_smi_larb_get(pm->larbvenclt); |
| 128 | if (ret) | 132 | if (ret) { |
| 129 | mtk_v4l2_err("mtk_smi_larb_get larb4 fail %d", ret); | 133 | mtk_v4l2_err("mtk_smi_larb_get larb4 fail %d", ret); |
| 134 | goto larbvenclterr; | ||
| 135 | } | ||
| 136 | return; | ||
| 130 | 137 | ||
| 138 | larbvenclterr: | ||
| 139 | mtk_smi_larb_put(pm->larbvenc); | ||
| 140 | larbvencerr: | ||
| 141 | clkerr: | ||
| 142 | for (i -= 1; i >= 0; i--) | ||
| 143 | clk_disable_unprepare(enc_clk->clk_info[i].vcodec_clk); | ||
| 131 | } | 144 | } |
| 132 | 145 | ||
| 133 | void mtk_vcodec_enc_clock_off(struct mtk_vcodec_pm *pm) | 146 | void mtk_vcodec_enc_clock_off(struct mtk_vcodec_pm *pm) |
| 134 | { | 147 | { |
| 148 | struct mtk_vcodec_clk *enc_clk = &pm->venc_clk; | ||
| 149 | int i = 0; | ||
| 150 | |||
| 135 | mtk_smi_larb_put(pm->larbvenc); | 151 | mtk_smi_larb_put(pm->larbvenc); |
| 136 | mtk_smi_larb_put(pm->larbvenclt); | 152 | mtk_smi_larb_put(pm->larbvenclt); |
| 137 | clk_disable_unprepare(pm->venc_lt_sel); | 153 | for (i = enc_clk->clk_num - 1; i >= 0; i--) |
| 138 | clk_disable_unprepare(pm->venc_sel); | 154 | clk_disable_unprepare(enc_clk->clk_info[i].vcodec_clk); |
| 139 | } | 155 | } |
diff --git a/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_if.c b/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_if.c index aa3ce41898bc..02c960c63ac0 100644 --- a/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_if.c +++ b/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_if.c | |||
| @@ -55,7 +55,7 @@ struct h264_fb { | |||
| 55 | 55 | ||
| 56 | /** | 56 | /** |
| 57 | * struct h264_ring_fb_list - ring frame buffer list | 57 | * struct h264_ring_fb_list - ring frame buffer list |
| 58 | * @fb_list : frame buffer arrary | 58 | * @fb_list : frame buffer array |
| 59 | * @read_idx : read index | 59 | * @read_idx : read index |
| 60 | * @write_idx : write index | 60 | * @write_idx : write index |
| 61 | * @count : buffer count in list | 61 | * @count : buffer count in list |
| @@ -72,7 +72,7 @@ struct h264_ring_fb_list { | |||
| 72 | /** | 72 | /** |
| 73 | * struct vdec_h264_dec_info - decode information | 73 | * struct vdec_h264_dec_info - decode information |
| 74 | * @dpb_sz : decoding picture buffer size | 74 | * @dpb_sz : decoding picture buffer size |
| 75 | * @resolution_changed : resoltion change happen | 75 | * @resolution_changed : resolution change happen |
| 76 | * @realloc_mv_buf : flag to notify driver to re-allocate mv buffer | 76 | * @realloc_mv_buf : flag to notify driver to re-allocate mv buffer |
| 77 | * @reserved : for 8 bytes alignment | 77 | * @reserved : for 8 bytes alignment |
| 78 | * @bs_dma : Input bit-stream buffer dma address | 78 | * @bs_dma : Input bit-stream buffer dma address |
diff --git a/drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c b/drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c index 3e84a761db3a..bac3723038de 100644 --- a/drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c +++ b/drivers/media/platform/mtk-vcodec/vdec/vdec_vp8_if.c | |||
| @@ -120,7 +120,7 @@ struct vdec_vp8_hw_reg_base { | |||
| 120 | /** | 120 | /** |
| 121 | * struct vdec_vp8_vpu_inst - VPU instance for VP8 decode | 121 | * struct vdec_vp8_vpu_inst - VPU instance for VP8 decode |
| 122 | * @wq_hd : Wait queue to wait VPU message ack | 122 | * @wq_hd : Wait queue to wait VPU message ack |
| 123 | * @signaled : 1 - Host has received ack message from VPU, 0 - not recevie | 123 | * @signaled : 1 - Host has received ack message from VPU, 0 - not receive |
| 124 | * @failure : VPU execution result status 0 - success, others - fail | 124 | * @failure : VPU execution result status 0 - success, others - fail |
| 125 | * @inst_addr : VPU decoder instance address | 125 | * @inst_addr : VPU decoder instance address |
| 126 | */ | 126 | */ |
diff --git a/drivers/media/platform/mtk-vcodec/vdec_drv_if.h b/drivers/media/platform/mtk-vcodec/vdec_drv_if.h index ded1154481cd..9a21591f3818 100644 --- a/drivers/media/platform/mtk-vcodec/vdec_drv_if.h +++ b/drivers/media/platform/mtk-vcodec/vdec_drv_if.h | |||
| @@ -80,7 +80,7 @@ void vdec_if_deinit(struct mtk_vcodec_ctx *ctx); | |||
| 80 | * vdec_if_decode() - trigger decode | 80 | * vdec_if_decode() - trigger decode |
| 81 | * @ctx : [in] v4l2 context | 81 | * @ctx : [in] v4l2 context |
| 82 | * @bs : [in] input bitstream | 82 | * @bs : [in] input bitstream |
| 83 | * @fb : [in] frame buffer to store decoded frame, when null menas parse | 83 | * @fb : [in] frame buffer to store decoded frame, when null means parse |
| 84 | * header only | 84 | * header only |
| 85 | * @res_chg : [out] resolution change happens if current bs have different | 85 | * @res_chg : [out] resolution change happens if current bs have different |
| 86 | * picture width/height | 86 | * picture width/height |
diff --git a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h index cd37bb2a610f..79d8eac7f5e2 100644 --- a/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h +++ b/drivers/media/platform/mtk-vcodec/vdec_vpu_if.h | |||
| @@ -62,7 +62,7 @@ int vpu_dec_start(struct vdec_vpu_inst *vpu, uint32_t *data, unsigned int len); | |||
| 62 | /** | 62 | /** |
| 63 | * vpu_dec_end - end decoding, basically the function will be invoked once | 63 | * vpu_dec_end - end decoding, basically the function will be invoked once |
| 64 | * when HW decoding done interrupt received successfully. The | 64 | * when HW decoding done interrupt received successfully. The |
| 65 | * decoder in VPU will continute to do referene frame management | 65 | * decoder in VPU will continue to do reference frame management |
| 66 | * and check if there is a new decoded frame available to display. | 66 | * and check if there is a new decoded frame available to display. |
| 67 | * | 67 | * |
| 68 | * @vpu : instance for vdec_vpu_inst | 68 | * @vpu : instance for vdec_vpu_inst |
diff --git a/drivers/media/platform/mx2_emmaprp.c b/drivers/media/platform/mx2_emmaprp.c index 27b078cf98e3..f60f499c596b 100644 --- a/drivers/media/platform/mx2_emmaprp.c +++ b/drivers/media/platform/mx2_emmaprp.c | |||
| @@ -274,7 +274,7 @@ static void emmaprp_device_run(void *priv) | |||
| 274 | { | 274 | { |
| 275 | struct emmaprp_ctx *ctx = priv; | 275 | struct emmaprp_ctx *ctx = priv; |
| 276 | struct emmaprp_q_data *s_q_data, *d_q_data; | 276 | struct emmaprp_q_data *s_q_data, *d_q_data; |
| 277 | struct vb2_buffer *src_buf, *dst_buf; | 277 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 278 | struct emmaprp_dev *pcdev = ctx->dev; | 278 | struct emmaprp_dev *pcdev = ctx->dev; |
| 279 | unsigned int s_width, s_height; | 279 | unsigned int s_width, s_height; |
| 280 | unsigned int d_width, d_height; | 280 | unsigned int d_width, d_height; |
| @@ -294,8 +294,8 @@ static void emmaprp_device_run(void *priv) | |||
| 294 | d_height = d_q_data->height; | 294 | d_height = d_q_data->height; |
| 295 | d_size = d_width * d_height; | 295 | d_size = d_width * d_height; |
| 296 | 296 | ||
| 297 | p_in = vb2_dma_contig_plane_dma_addr(src_buf, 0); | 297 | p_in = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); |
| 298 | p_out = vb2_dma_contig_plane_dma_addr(dst_buf, 0); | 298 | p_out = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); |
| 299 | if (!p_in || !p_out) { | 299 | if (!p_in || !p_out) { |
| 300 | v4l2_err(&pcdev->v4l2_dev, | 300 | v4l2_err(&pcdev->v4l2_dev, |
| 301 | "Acquiring kernel pointers to buffers failed\n"); | 301 | "Acquiring kernel pointers to buffers failed\n"); |
diff --git a/drivers/media/platform/omap/omap_vout.c b/drivers/media/platform/omap/omap_vout.c index f447ae3bb465..37f0d7146dfa 100644 --- a/drivers/media/platform/omap/omap_vout.c +++ b/drivers/media/platform/omap/omap_vout.c | |||
| @@ -513,7 +513,7 @@ static int omapvid_apply_changes(struct omap_vout_device *vout) | |||
| 513 | } | 513 | } |
| 514 | 514 | ||
| 515 | static int omapvid_handle_interlace_display(struct omap_vout_device *vout, | 515 | static int omapvid_handle_interlace_display(struct omap_vout_device *vout, |
| 516 | unsigned int irqstatus, struct timeval timevalue) | 516 | unsigned int irqstatus, u64 ts) |
| 517 | { | 517 | { |
| 518 | u32 fid; | 518 | u32 fid; |
| 519 | 519 | ||
| @@ -537,7 +537,7 @@ static int omapvid_handle_interlace_display(struct omap_vout_device *vout, | |||
| 537 | if (vout->cur_frm == vout->next_frm) | 537 | if (vout->cur_frm == vout->next_frm) |
| 538 | goto err; | 538 | goto err; |
| 539 | 539 | ||
| 540 | vout->cur_frm->ts = timevalue; | 540 | vout->cur_frm->ts = ts; |
| 541 | vout->cur_frm->state = VIDEOBUF_DONE; | 541 | vout->cur_frm->state = VIDEOBUF_DONE; |
| 542 | wake_up_interruptible(&vout->cur_frm->done); | 542 | wake_up_interruptible(&vout->cur_frm->done); |
| 543 | vout->cur_frm = vout->next_frm; | 543 | vout->cur_frm = vout->next_frm; |
| @@ -557,7 +557,7 @@ static void omap_vout_isr(void *arg, unsigned int irqstatus) | |||
| 557 | int ret, fid, mgr_id; | 557 | int ret, fid, mgr_id; |
| 558 | u32 addr, irq; | 558 | u32 addr, irq; |
| 559 | struct omap_overlay *ovl; | 559 | struct omap_overlay *ovl; |
| 560 | struct timeval timevalue; | 560 | u64 ts; |
| 561 | struct omapvideo_info *ovid; | 561 | struct omapvideo_info *ovid; |
| 562 | struct omap_dss_device *cur_display; | 562 | struct omap_dss_device *cur_display; |
| 563 | struct omap_vout_device *vout = (struct omap_vout_device *)arg; | 563 | struct omap_vout_device *vout = (struct omap_vout_device *)arg; |
| @@ -577,7 +577,7 @@ static void omap_vout_isr(void *arg, unsigned int irqstatus) | |||
| 577 | return; | 577 | return; |
| 578 | 578 | ||
| 579 | spin_lock(&vout->vbq_lock); | 579 | spin_lock(&vout->vbq_lock); |
| 580 | v4l2_get_timestamp(&timevalue); | 580 | ts = ktime_get_ns(); |
| 581 | 581 | ||
| 582 | switch (cur_display->type) { | 582 | switch (cur_display->type) { |
| 583 | case OMAP_DISPLAY_TYPE_DSI: | 583 | case OMAP_DISPLAY_TYPE_DSI: |
| @@ -595,7 +595,7 @@ static void omap_vout_isr(void *arg, unsigned int irqstatus) | |||
| 595 | break; | 595 | break; |
| 596 | case OMAP_DISPLAY_TYPE_VENC: | 596 | case OMAP_DISPLAY_TYPE_VENC: |
| 597 | fid = omapvid_handle_interlace_display(vout, irqstatus, | 597 | fid = omapvid_handle_interlace_display(vout, irqstatus, |
| 598 | timevalue); | 598 | ts); |
| 599 | if (!fid) | 599 | if (!fid) |
| 600 | goto vout_isr_err; | 600 | goto vout_isr_err; |
| 601 | break; | 601 | break; |
| @@ -608,7 +608,7 @@ static void omap_vout_isr(void *arg, unsigned int irqstatus) | |||
| 608 | } | 608 | } |
| 609 | 609 | ||
| 610 | if (!vout->first_int && (vout->cur_frm != vout->next_frm)) { | 610 | if (!vout->first_int && (vout->cur_frm != vout->next_frm)) { |
| 611 | vout->cur_frm->ts = timevalue; | 611 | vout->cur_frm->ts = ts; |
| 612 | vout->cur_frm->state = VIDEOBUF_DONE; | 612 | vout->cur_frm->state = VIDEOBUF_DONE; |
| 613 | wake_up_interruptible(&vout->cur_frm->done); | 613 | wake_up_interruptible(&vout->cur_frm->done); |
| 614 | vout->cur_frm = vout->next_frm; | 614 | vout->cur_frm = vout->next_frm; |
| @@ -1129,7 +1129,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh, | |||
| 1129 | } | 1129 | } |
| 1130 | timing = &dssdev->panel.timings; | 1130 | timing = &dssdev->panel.timings; |
| 1131 | 1131 | ||
| 1132 | /* We dont support RGB24-packed mode if vrfb rotation | 1132 | /* We don't support RGB24-packed mode if vrfb rotation |
| 1133 | * is enabled*/ | 1133 | * is enabled*/ |
| 1134 | if ((is_rotation_enabled(vout)) && | 1134 | if ((is_rotation_enabled(vout)) && |
| 1135 | f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) { | 1135 | f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) { |
| @@ -1147,7 +1147,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh, | |||
| 1147 | vout->fbuf.fmt.width = timing->x_res; | 1147 | vout->fbuf.fmt.width = timing->x_res; |
| 1148 | } | 1148 | } |
| 1149 | 1149 | ||
| 1150 | /* change to samller size is OK */ | 1150 | /* change to smaller size is OK */ |
| 1151 | 1151 | ||
| 1152 | bpp = omap_vout_try_format(&f->fmt.pix); | 1152 | bpp = omap_vout_try_format(&f->fmt.pix); |
| 1153 | f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height * bpp; | 1153 | f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height * bpp; |
diff --git a/drivers/media/platform/omap/omap_voutdef.h b/drivers/media/platform/omap/omap_voutdef.h index 56b630b1c8b4..c740393c8509 100644 --- a/drivers/media/platform/omap/omap_voutdef.h +++ b/drivers/media/platform/omap/omap_voutdef.h | |||
| @@ -37,7 +37,7 @@ | |||
| 37 | #define VID_MAX_WIDTH 1280 /* Largest width */ | 37 | #define VID_MAX_WIDTH 1280 /* Largest width */ |
| 38 | #define VID_MAX_HEIGHT 720 /* Largest height */ | 38 | #define VID_MAX_HEIGHT 720 /* Largest height */ |
| 39 | 39 | ||
| 40 | /* Mimimum requirement is 2x2 for DSS */ | 40 | /* Minimum requirement is 2x2 for DSS */ |
| 41 | #define VID_MIN_WIDTH 2 | 41 | #define VID_MIN_WIDTH 2 |
| 42 | #define VID_MIN_HEIGHT 2 | 42 | #define VID_MIN_HEIGHT 2 |
| 43 | 43 | ||
| @@ -135,7 +135,7 @@ struct omap_vout_device { | |||
| 135 | enum omap_color_mode dss_mode; | 135 | enum omap_color_mode dss_mode; |
| 136 | 136 | ||
| 137 | /* we don't allow to request new buffer when old buffers are | 137 | /* we don't allow to request new buffer when old buffers are |
| 138 | * still mmaped | 138 | * still mmapped |
| 139 | */ | 139 | */ |
| 140 | int mmap_count; | 140 | int mmap_count; |
| 141 | 141 | ||
diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c index 13f2828d880d..bd57174d81a7 100644 --- a/drivers/media/platform/omap3isp/isp.c +++ b/drivers/media/platform/omap3isp/isp.c | |||
| @@ -1517,7 +1517,7 @@ void omap3isp_print_status(struct isp_device *isp) | |||
| 1517 | * | 1517 | * |
| 1518 | * To solve this problem power management support is split into prepare/complete | 1518 | * To solve this problem power management support is split into prepare/complete |
| 1519 | * and suspend/resume operations. The pipelines are stopped in prepare() and the | 1519 | * and suspend/resume operations. The pipelines are stopped in prepare() and the |
| 1520 | * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in | 1520 | * ISP clocks get disabled in suspend(). Similarly, the clocks are re-enabled in |
| 1521 | * resume(), and the the pipelines are restarted in complete(). | 1521 | * resume(), and the the pipelines are restarted in complete(). |
| 1522 | * | 1522 | * |
| 1523 | * TODO: PM dependencies between the ISP and sensors are not modelled explicitly | 1523 | * TODO: PM dependencies between the ISP and sensors are not modelled explicitly |
diff --git a/drivers/media/platform/omap3isp/ispccdc.c b/drivers/media/platform/omap3isp/ispccdc.c index 14a1c24037c4..261ad1175f98 100644 --- a/drivers/media/platform/omap3isp/ispccdc.c +++ b/drivers/media/platform/omap3isp/ispccdc.c | |||
| @@ -1594,7 +1594,7 @@ static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc) | |||
| 1594 | return 0; | 1594 | return 0; |
| 1595 | 1595 | ||
| 1596 | /* We're in continuous mode, and memory writes were disabled due to a | 1596 | /* We're in continuous mode, and memory writes were disabled due to a |
| 1597 | * buffer underrun. Reenable them now that we have a buffer. The buffer | 1597 | * buffer underrun. Re-enable them now that we have a buffer. The buffer |
| 1598 | * address has been set in ccdc_video_queue. | 1598 | * address has been set in ccdc_video_queue. |
| 1599 | */ | 1599 | */ |
| 1600 | if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) { | 1600 | if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) { |
| @@ -1712,7 +1712,7 @@ static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc) | |||
| 1712 | * data to memory the CCDC and LSC are stopped immediately but | 1712 | * data to memory the CCDC and LSC are stopped immediately but |
| 1713 | * without change the CCDC stopping state machine. The CCDC | 1713 | * without change the CCDC stopping state machine. The CCDC |
| 1714 | * stopping state machine should be used only when user request | 1714 | * stopping state machine should be used only when user request |
| 1715 | * for stopping is received (SINGLESHOT is an exeption). | 1715 | * for stopping is received (SINGLESHOT is an exception). |
| 1716 | */ | 1716 | */ |
| 1717 | switch (ccdc->state) { | 1717 | switch (ccdc->state) { |
| 1718 | case ISP_PIPELINE_STREAM_SINGLESHOT: | 1718 | case ISP_PIPELINE_STREAM_SINGLESHOT: |
diff --git a/drivers/media/platform/omap3isp/ispcsi2.c b/drivers/media/platform/omap3isp/ispcsi2.c index 9c180f607bcb..da66ea65be5d 100644 --- a/drivers/media/platform/omap3isp/ispcsi2.c +++ b/drivers/media/platform/omap3isp/ispcsi2.c | |||
| @@ -710,7 +710,7 @@ static void csi2_isr_ctx(struct isp_csi2_device *csi2, | |||
| 710 | 710 | ||
| 711 | /* Skip interrupts until we reach the frame skip count. The CSI2 will be | 711 | /* Skip interrupts until we reach the frame skip count. The CSI2 will be |
| 712 | * automatically disabled, as the frame skip count has been programmed | 712 | * automatically disabled, as the frame skip count has been programmed |
| 713 | * in the CSI2_CTx_CTRL1::COUNT field, so reenable it. | 713 | * in the CSI2_CTx_CTRL1::COUNT field, so re-enable it. |
| 714 | * | 714 | * |
| 715 | * It would have been nice to rely on the FRAME_NUMBER interrupt instead | 715 | * It would have been nice to rely on the FRAME_NUMBER interrupt instead |
| 716 | * but it turned out that the interrupt is only generated when the CSI2 | 716 | * but it turned out that the interrupt is only generated when the CSI2 |
diff --git a/drivers/media/platform/pxa_camera.c b/drivers/media/platform/pxa_camera.c index 5f930560eb30..4fe228752a43 100644 --- a/drivers/media/platform/pxa_camera.c +++ b/drivers/media/platform/pxa_camera.c | |||
| @@ -1631,7 +1631,7 @@ static int pxa_camera_set_bus_param(struct pxa_camera_dev *pcdev) | |||
| 1631 | 1631 | ||
| 1632 | pcdev->channels = 1; | 1632 | pcdev->channels = 1; |
| 1633 | 1633 | ||
| 1634 | /* Make choises, based on platform preferences */ | 1634 | /* Make choices, based on platform preferences */ |
| 1635 | if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) && | 1635 | if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) && |
| 1636 | (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) { | 1636 | (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) { |
| 1637 | if (pcdev->platform_flags & PXA_CAMERA_HSP) | 1637 | if (pcdev->platform_flags & PXA_CAMERA_HSP) |
| @@ -2394,15 +2394,17 @@ static int pxa_camera_probe(struct platform_device *pdev) | |||
| 2394 | pcdev->res = res; | 2394 | pcdev->res = res; |
| 2395 | 2395 | ||
| 2396 | pcdev->pdata = pdev->dev.platform_data; | 2396 | pcdev->pdata = pdev->dev.platform_data; |
| 2397 | if (pdev->dev.of_node && !pcdev->pdata) { | 2397 | if (pcdev->pdata) { |
| 2398 | err = pxa_camera_pdata_from_dt(&pdev->dev, pcdev, &pcdev->asd); | ||
| 2399 | } else { | ||
| 2400 | pcdev->platform_flags = pcdev->pdata->flags; | 2398 | pcdev->platform_flags = pcdev->pdata->flags; |
| 2401 | pcdev->mclk = pcdev->pdata->mclk_10khz * 10000; | 2399 | pcdev->mclk = pcdev->pdata->mclk_10khz * 10000; |
| 2402 | pcdev->asd.match_type = V4L2_ASYNC_MATCH_I2C; | 2400 | pcdev->asd.match_type = V4L2_ASYNC_MATCH_I2C; |
| 2403 | pcdev->asd.match.i2c.adapter_id = | 2401 | pcdev->asd.match.i2c.adapter_id = |
| 2404 | pcdev->pdata->sensor_i2c_adapter_id; | 2402 | pcdev->pdata->sensor_i2c_adapter_id; |
| 2405 | pcdev->asd.match.i2c.address = pcdev->pdata->sensor_i2c_address; | 2403 | pcdev->asd.match.i2c.address = pcdev->pdata->sensor_i2c_address; |
| 2404 | } else if (pdev->dev.of_node) { | ||
| 2405 | err = pxa_camera_pdata_from_dt(&pdev->dev, pcdev, &pcdev->asd); | ||
| 2406 | } else { | ||
| 2407 | return -ENODEV; | ||
| 2406 | } | 2408 | } |
| 2407 | if (err < 0) | 2409 | if (err < 0) |
| 2408 | return err; | 2410 | return err; |
diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index cb411eb85ee4..739366744e0f 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c | |||
| @@ -455,7 +455,7 @@ static const struct venus_resources msm8996_res = { | |||
| 455 | .reg_tbl_size = ARRAY_SIZE(msm8996_reg_preset), | 455 | .reg_tbl_size = ARRAY_SIZE(msm8996_reg_preset), |
| 456 | .clks = {"core", "iface", "bus", "mbus" }, | 456 | .clks = {"core", "iface", "bus", "mbus" }, |
| 457 | .clks_num = 4, | 457 | .clks_num = 4, |
| 458 | .max_load = 2563200, | 458 | .max_load = 3110400, /* 4096x2160@90 */ |
| 459 | .hfi_version = HFI_VERSION_3XX, | 459 | .hfi_version = HFI_VERSION_3XX, |
| 460 | .vmem_id = VIDC_RESOURCE_NONE, | 460 | .vmem_id = VIDC_RESOURCE_NONE, |
| 461 | .vmem_size = 0, | 461 | .vmem_size = 0, |
| @@ -465,10 +465,12 @@ static const struct venus_resources msm8996_res = { | |||
| 465 | }; | 465 | }; |
| 466 | 466 | ||
| 467 | static const struct freq_tbl sdm845_freq_table[] = { | 467 | static const struct freq_tbl sdm845_freq_table[] = { |
| 468 | { 1944000, 380000000 }, /* 4k UHD @ 60 */ | 468 | { 3110400, 533000000 }, /* 4096x2160@90 */ |
| 469 | { 972000, 320000000 }, /* 4k UHD @ 30 */ | 469 | { 2073600, 444000000 }, /* 4096x2160@60 */ |
| 470 | { 489600, 200000000 }, /* 1080p @ 60 */ | 470 | { 1944000, 404000000 }, /* 3840x2160@60 */ |
| 471 | { 244800, 100000000 }, /* 1080p @ 30 */ | 471 | { 972000, 330000000 }, /* 3840x2160@30 */ |
| 472 | { 489600, 200000000 }, /* 1920x1080@60 */ | ||
| 473 | { 244800, 100000000 }, /* 1920x1080@30 */ | ||
| 472 | }; | 474 | }; |
| 473 | 475 | ||
| 474 | static const struct venus_resources sdm845_res = { | 476 | static const struct venus_resources sdm845_res = { |
diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 6382cea29185..7a3feb5cee00 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h | |||
| @@ -134,6 +134,7 @@ struct venus_core { | |||
| 134 | struct video_firmware { | 134 | struct video_firmware { |
| 135 | struct device *dev; | 135 | struct device *dev; |
| 136 | struct iommu_domain *iommu_domain; | 136 | struct iommu_domain *iommu_domain; |
| 137 | size_t mapped_mem_size; | ||
| 137 | } fw; | 138 | } fw; |
| 138 | struct mutex lock; | 139 | struct mutex lock; |
| 139 | struct list_head instances; | 140 | struct list_head instances; |
| @@ -218,7 +219,7 @@ struct venus_buffer { | |||
| 218 | #define to_venus_buffer(ptr) container_of(ptr, struct venus_buffer, vb) | 219 | #define to_venus_buffer(ptr) container_of(ptr, struct venus_buffer, vb) |
| 219 | 220 | ||
| 220 | /** | 221 | /** |
| 221 | * struct venus_inst - holds per instance paramerters | 222 | * struct venus_inst - holds per instance parameters |
| 222 | * | 223 | * |
| 223 | * @list: used for attach an instance to the core | 224 | * @list: used for attach an instance to the core |
| 224 | * @lock: instance lock | 225 | * @lock: instance lock |
diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index c29acfd70c1b..6cfa8021721e 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c | |||
| @@ -35,14 +35,15 @@ | |||
| 35 | 35 | ||
| 36 | static void venus_reset_cpu(struct venus_core *core) | 36 | static void venus_reset_cpu(struct venus_core *core) |
| 37 | { | 37 | { |
| 38 | u32 fw_size = core->fw.mapped_mem_size; | ||
| 38 | void __iomem *base = core->base; | 39 | void __iomem *base = core->base; |
| 39 | 40 | ||
| 40 | writel(0, base + WRAPPER_FW_START_ADDR); | 41 | writel(0, base + WRAPPER_FW_START_ADDR); |
| 41 | writel(VENUS_FW_MEM_SIZE, base + WRAPPER_FW_END_ADDR); | 42 | writel(fw_size, base + WRAPPER_FW_END_ADDR); |
| 42 | writel(0, base + WRAPPER_CPA_START_ADDR); | 43 | writel(0, base + WRAPPER_CPA_START_ADDR); |
| 43 | writel(VENUS_FW_MEM_SIZE, base + WRAPPER_CPA_END_ADDR); | 44 | writel(fw_size, base + WRAPPER_CPA_END_ADDR); |
| 44 | writel(VENUS_FW_MEM_SIZE, base + WRAPPER_NONPIX_START_ADDR); | 45 | writel(fw_size, base + WRAPPER_NONPIX_START_ADDR); |
| 45 | writel(VENUS_FW_MEM_SIZE, base + WRAPPER_NONPIX_END_ADDR); | 46 | writel(fw_size, base + WRAPPER_NONPIX_END_ADDR); |
| 46 | writel(0x0, base + WRAPPER_CPU_CGC_DIS); | 47 | writel(0x0, base + WRAPPER_CPU_CGC_DIS); |
| 47 | writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG); | 48 | writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG); |
| 48 | 49 | ||
| @@ -74,6 +75,9 @@ static int venus_load_fw(struct venus_core *core, const char *fwname, | |||
| 74 | void *mem_va; | 75 | void *mem_va; |
| 75 | int ret; | 76 | int ret; |
| 76 | 77 | ||
| 78 | *mem_phys = 0; | ||
| 79 | *mem_size = 0; | ||
| 80 | |||
| 77 | dev = core->dev; | 81 | dev = core->dev; |
| 78 | node = of_parse_phandle(dev->of_node, "memory-region", 0); | 82 | node = of_parse_phandle(dev->of_node, "memory-region", 0); |
| 79 | if (!node) { | 83 | if (!node) { |
| @@ -85,28 +89,30 @@ static int venus_load_fw(struct venus_core *core, const char *fwname, | |||
| 85 | if (ret) | 89 | if (ret) |
| 86 | return ret; | 90 | return ret; |
| 87 | 91 | ||
| 92 | ret = request_firmware(&mdt, fwname, dev); | ||
| 93 | if (ret < 0) | ||
| 94 | return ret; | ||
| 95 | |||
| 96 | fw_size = qcom_mdt_get_size(mdt); | ||
| 97 | if (fw_size < 0) { | ||
| 98 | ret = fw_size; | ||
| 99 | goto err_release_fw; | ||
| 100 | } | ||
| 101 | |||
| 88 | *mem_phys = r.start; | 102 | *mem_phys = r.start; |
| 89 | *mem_size = resource_size(&r); | 103 | *mem_size = resource_size(&r); |
| 90 | 104 | ||
| 91 | if (*mem_size < VENUS_FW_MEM_SIZE) | 105 | if (*mem_size < fw_size || fw_size > VENUS_FW_MEM_SIZE) { |
| 92 | return -EINVAL; | 106 | ret = -EINVAL; |
| 107 | goto err_release_fw; | ||
| 108 | } | ||
| 93 | 109 | ||
| 94 | mem_va = memremap(r.start, *mem_size, MEMREMAP_WC); | 110 | mem_va = memremap(r.start, *mem_size, MEMREMAP_WC); |
| 95 | if (!mem_va) { | 111 | if (!mem_va) { |
| 96 | dev_err(dev, "unable to map memory region: %pa+%zx\n", | 112 | dev_err(dev, "unable to map memory region: %pa+%zx\n", |
| 97 | &r.start, *mem_size); | 113 | &r.start, *mem_size); |
| 98 | return -ENOMEM; | 114 | ret = -ENOMEM; |
| 99 | } | 115 | goto err_release_fw; |
| 100 | |||
| 101 | ret = request_firmware(&mdt, fwname, dev); | ||
| 102 | if (ret < 0) | ||
| 103 | goto err_unmap; | ||
| 104 | |||
| 105 | fw_size = qcom_mdt_get_size(mdt); | ||
| 106 | if (fw_size < 0) { | ||
| 107 | ret = fw_size; | ||
| 108 | release_firmware(mdt); | ||
| 109 | goto err_unmap; | ||
| 110 | } | 116 | } |
| 111 | 117 | ||
| 112 | if (core->use_tz) | 118 | if (core->use_tz) |
| @@ -116,10 +122,9 @@ static int venus_load_fw(struct venus_core *core, const char *fwname, | |||
| 116 | ret = qcom_mdt_load_no_init(dev, mdt, fwname, VENUS_PAS_ID, | 122 | ret = qcom_mdt_load_no_init(dev, mdt, fwname, VENUS_PAS_ID, |
| 117 | mem_va, *mem_phys, *mem_size, NULL); | 123 | mem_va, *mem_phys, *mem_size, NULL); |
| 118 | 124 | ||
| 119 | release_firmware(mdt); | ||
| 120 | |||
| 121 | err_unmap: | ||
| 122 | memunmap(mem_va); | 125 | memunmap(mem_va); |
| 126 | err_release_fw: | ||
| 127 | release_firmware(mdt); | ||
| 123 | return ret; | 128 | return ret; |
| 124 | } | 129 | } |
| 125 | 130 | ||
| @@ -135,6 +140,7 @@ static int venus_boot_no_tz(struct venus_core *core, phys_addr_t mem_phys, | |||
| 135 | return -EPROBE_DEFER; | 140 | return -EPROBE_DEFER; |
| 136 | 141 | ||
| 137 | iommu = core->fw.iommu_domain; | 142 | iommu = core->fw.iommu_domain; |
| 143 | core->fw.mapped_mem_size = mem_size; | ||
| 138 | 144 | ||
| 139 | ret = iommu_map(iommu, VENUS_FW_START_ADDR, mem_phys, mem_size, | 145 | ret = iommu_map(iommu, VENUS_FW_START_ADDR, mem_phys, mem_size, |
| 140 | IOMMU_READ | IOMMU_WRITE | IOMMU_PRIV); | 146 | IOMMU_READ | IOMMU_WRITE | IOMMU_PRIV); |
| @@ -150,6 +156,7 @@ static int venus_boot_no_tz(struct venus_core *core, phys_addr_t mem_phys, | |||
| 150 | 156 | ||
| 151 | static int venus_shutdown_no_tz(struct venus_core *core) | 157 | static int venus_shutdown_no_tz(struct venus_core *core) |
| 152 | { | 158 | { |
| 159 | const size_t mapped = core->fw.mapped_mem_size; | ||
| 153 | struct iommu_domain *iommu; | 160 | struct iommu_domain *iommu; |
| 154 | size_t unmapped; | 161 | size_t unmapped; |
| 155 | u32 reg; | 162 | u32 reg; |
| @@ -166,8 +173,8 @@ static int venus_shutdown_no_tz(struct venus_core *core) | |||
| 166 | 173 | ||
| 167 | iommu = core->fw.iommu_domain; | 174 | iommu = core->fw.iommu_domain; |
| 168 | 175 | ||
| 169 | unmapped = iommu_unmap(iommu, VENUS_FW_START_ADDR, VENUS_FW_MEM_SIZE); | 176 | unmapped = iommu_unmap(iommu, VENUS_FW_START_ADDR, mapped); |
| 170 | if (unmapped != VENUS_FW_MEM_SIZE) | 177 | if (unmapped != mapped) |
| 171 | dev_err(dev, "failed to unmap firmware\n"); | 178 | dev_err(dev, "failed to unmap firmware\n"); |
| 172 | 179 | ||
| 173 | return 0; | 180 | return 0; |
diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index e436385bc5ab..5cad601d4c57 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c | |||
| @@ -439,9 +439,6 @@ session_process_buf(struct venus_inst *inst, struct vb2_v4l2_buffer *vbuf) | |||
| 439 | fdata.flags = 0; | 439 | fdata.flags = 0; |
| 440 | fdata.clnt_data = vbuf->vb2_buf.index; | 440 | fdata.clnt_data = vbuf->vb2_buf.index; |
| 441 | 441 | ||
| 442 | if (!fdata.timestamp) | ||
| 443 | fdata.flags |= HFI_BUFFERFLAG_TIMESTAMPINVALID; | ||
| 444 | |||
| 445 | if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | 442 | if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { |
| 446 | fdata.buffer_type = HFI_BUFFER_INPUT; | 443 | fdata.buffer_type = HFI_BUFFER_INPUT; |
| 447 | fdata.filled_len = vb2_get_plane_payload(vb, 0); | 444 | fdata.filled_len = vb2_get_plane_payload(vb, 0); |
diff --git a/drivers/media/platform/rcar-vin/rcar-core.c b/drivers/media/platform/rcar-vin/rcar-core.c index f0719ce24b97..594d80434004 100644 --- a/drivers/media/platform/rcar-vin/rcar-core.c +++ b/drivers/media/platform/rcar-vin/rcar-core.c | |||
| @@ -131,9 +131,13 @@ static int rvin_group_link_notify(struct media_link *link, u32 flags, | |||
| 131 | !is_media_entity_v4l2_video_device(link->sink->entity)) | 131 | !is_media_entity_v4l2_video_device(link->sink->entity)) |
| 132 | return 0; | 132 | return 0; |
| 133 | 133 | ||
| 134 | /* If any entity is in use don't allow link changes. */ | 134 | /* |
| 135 | * Don't allow link changes if any entity in the graph is | ||
| 136 | * streaming, modifying the CHSEL register fields can disrupt | ||
| 137 | * running streams. | ||
| 138 | */ | ||
| 135 | media_device_for_each_entity(entity, &group->mdev) | 139 | media_device_for_each_entity(entity, &group->mdev) |
| 136 | if (entity->use_count) | 140 | if (entity->stream_count) |
| 137 | return -EBUSY; | 141 | return -EBUSY; |
| 138 | 142 | ||
| 139 | mutex_lock(&group->lock); | 143 | mutex_lock(&group->lock); |
| @@ -542,9 +546,7 @@ static void rvin_parallel_notify_unbind(struct v4l2_async_notifier *notifier, | |||
| 542 | 546 | ||
| 543 | vin_dbg(vin, "unbind parallel subdev %s\n", subdev->name); | 547 | vin_dbg(vin, "unbind parallel subdev %s\n", subdev->name); |
| 544 | 548 | ||
| 545 | mutex_lock(&vin->lock); | ||
| 546 | rvin_parallel_subdevice_detach(vin); | 549 | rvin_parallel_subdevice_detach(vin); |
| 547 | mutex_unlock(&vin->lock); | ||
| 548 | } | 550 | } |
| 549 | 551 | ||
| 550 | static int rvin_parallel_notify_bound(struct v4l2_async_notifier *notifier, | 552 | static int rvin_parallel_notify_bound(struct v4l2_async_notifier *notifier, |
| @@ -554,9 +556,7 @@ static int rvin_parallel_notify_bound(struct v4l2_async_notifier *notifier, | |||
| 554 | struct rvin_dev *vin = v4l2_dev_to_vin(notifier->v4l2_dev); | 556 | struct rvin_dev *vin = v4l2_dev_to_vin(notifier->v4l2_dev); |
| 555 | int ret; | 557 | int ret; |
| 556 | 558 | ||
| 557 | mutex_lock(&vin->lock); | ||
| 558 | ret = rvin_parallel_subdevice_attach(vin, subdev); | 559 | ret = rvin_parallel_subdevice_attach(vin, subdev); |
| 559 | mutex_unlock(&vin->lock); | ||
| 560 | if (ret) | 560 | if (ret) |
| 561 | return ret; | 561 | return ret; |
| 562 | 562 | ||
| @@ -664,7 +664,6 @@ static int rvin_group_notify_complete(struct v4l2_async_notifier *notifier) | |||
| 664 | } | 664 | } |
| 665 | 665 | ||
| 666 | /* Create all media device links between VINs and CSI-2's. */ | 666 | /* Create all media device links between VINs and CSI-2's. */ |
| 667 | mutex_lock(&vin->group->lock); | ||
| 668 | for (route = vin->info->routes; route->mask; route++) { | 667 | for (route = vin->info->routes; route->mask; route++) { |
| 669 | struct media_pad *source_pad, *sink_pad; | 668 | struct media_pad *source_pad, *sink_pad; |
| 670 | struct media_entity *source, *sink; | 669 | struct media_entity *source, *sink; |
| @@ -700,7 +699,6 @@ static int rvin_group_notify_complete(struct v4l2_async_notifier *notifier) | |||
| 700 | break; | 699 | break; |
| 701 | } | 700 | } |
| 702 | } | 701 | } |
| 703 | mutex_unlock(&vin->group->lock); | ||
| 704 | 702 | ||
| 705 | return ret; | 703 | return ret; |
| 706 | } | 704 | } |
| @@ -716,8 +714,6 @@ static void rvin_group_notify_unbind(struct v4l2_async_notifier *notifier, | |||
| 716 | if (vin->group->vin[i]) | 714 | if (vin->group->vin[i]) |
| 717 | rvin_v4l2_unregister(vin->group->vin[i]); | 715 | rvin_v4l2_unregister(vin->group->vin[i]); |
| 718 | 716 | ||
| 719 | mutex_lock(&vin->group->lock); | ||
| 720 | |||
| 721 | for (i = 0; i < RVIN_CSI_MAX; i++) { | 717 | for (i = 0; i < RVIN_CSI_MAX; i++) { |
| 722 | if (vin->group->csi[i].fwnode != asd->match.fwnode) | 718 | if (vin->group->csi[i].fwnode != asd->match.fwnode) |
| 723 | continue; | 719 | continue; |
| @@ -725,8 +721,6 @@ static void rvin_group_notify_unbind(struct v4l2_async_notifier *notifier, | |||
| 725 | vin_dbg(vin, "Unbind CSI-2 %s from slot %u\n", subdev->name, i); | 721 | vin_dbg(vin, "Unbind CSI-2 %s from slot %u\n", subdev->name, i); |
| 726 | break; | 722 | break; |
| 727 | } | 723 | } |
| 728 | |||
| 729 | mutex_unlock(&vin->group->lock); | ||
| 730 | } | 724 | } |
| 731 | 725 | ||
| 732 | static int rvin_group_notify_bound(struct v4l2_async_notifier *notifier, | 726 | static int rvin_group_notify_bound(struct v4l2_async_notifier *notifier, |
| @@ -736,8 +730,6 @@ static int rvin_group_notify_bound(struct v4l2_async_notifier *notifier, | |||
| 736 | struct rvin_dev *vin = v4l2_dev_to_vin(notifier->v4l2_dev); | 730 | struct rvin_dev *vin = v4l2_dev_to_vin(notifier->v4l2_dev); |
| 737 | unsigned int i; | 731 | unsigned int i; |
| 738 | 732 | ||
| 739 | mutex_lock(&vin->group->lock); | ||
| 740 | |||
| 741 | for (i = 0; i < RVIN_CSI_MAX; i++) { | 733 | for (i = 0; i < RVIN_CSI_MAX; i++) { |
| 742 | if (vin->group->csi[i].fwnode != asd->match.fwnode) | 734 | if (vin->group->csi[i].fwnode != asd->match.fwnode) |
| 743 | continue; | 735 | continue; |
| @@ -746,8 +738,6 @@ static int rvin_group_notify_bound(struct v4l2_async_notifier *notifier, | |||
| 746 | break; | 738 | break; |
| 747 | } | 739 | } |
| 748 | 740 | ||
| 749 | mutex_unlock(&vin->group->lock); | ||
| 750 | |||
| 751 | return 0; | 741 | return 0; |
| 752 | } | 742 | } |
| 753 | 743 | ||
| @@ -1146,6 +1136,10 @@ static const struct rvin_info rcar_info_r8a77995 = { | |||
| 1146 | 1136 | ||
| 1147 | static const struct of_device_id rvin_of_id_table[] = { | 1137 | static const struct of_device_id rvin_of_id_table[] = { |
| 1148 | { | 1138 | { |
| 1139 | .compatible = "renesas,vin-r8a774c0", | ||
| 1140 | .data = &rcar_info_r8a77990, | ||
| 1141 | }, | ||
| 1142 | { | ||
| 1149 | .compatible = "renesas,vin-r8a7778", | 1143 | .compatible = "renesas,vin-r8a7778", |
| 1150 | .data = &rcar_info_m1, | 1144 | .data = &rcar_info_m1, |
| 1151 | }, | 1145 | }, |
diff --git a/drivers/media/platform/rcar-vin/rcar-csi2.c b/drivers/media/platform/rcar-vin/rcar-csi2.c index 6d356f5a9456..f64528d2be3c 100644 --- a/drivers/media/platform/rcar-vin/rcar-csi2.c +++ b/drivers/media/platform/rcar-vin/rcar-csi2.c | |||
| @@ -152,37 +152,37 @@ static const struct rcsi2_mbps_reg phtw_mbps_h3_v3h_m3n[] = { | |||
| 152 | }; | 152 | }; |
| 153 | 153 | ||
| 154 | static const struct rcsi2_mbps_reg phtw_mbps_v3m_e3[] = { | 154 | static const struct rcsi2_mbps_reg phtw_mbps_v3m_e3[] = { |
| 155 | { .mbps = 89, .reg = 0x00 }, | 155 | { .mbps = 80, .reg = 0x00 }, |
| 156 | { .mbps = 99, .reg = 0x20 }, | 156 | { .mbps = 90, .reg = 0x20 }, |
| 157 | { .mbps = 109, .reg = 0x40 }, | 157 | { .mbps = 100, .reg = 0x40 }, |
| 158 | { .mbps = 129, .reg = 0x02 }, | 158 | { .mbps = 110, .reg = 0x02 }, |
| 159 | { .mbps = 139, .reg = 0x22 }, | 159 | { .mbps = 130, .reg = 0x22 }, |
| 160 | { .mbps = 149, .reg = 0x42 }, | 160 | { .mbps = 140, .reg = 0x42 }, |
| 161 | { .mbps = 169, .reg = 0x04 }, | 161 | { .mbps = 150, .reg = 0x04 }, |
| 162 | { .mbps = 179, .reg = 0x24 }, | 162 | { .mbps = 170, .reg = 0x24 }, |
| 163 | { .mbps = 199, .reg = 0x44 }, | 163 | { .mbps = 180, .reg = 0x44 }, |
| 164 | { .mbps = 219, .reg = 0x06 }, | 164 | { .mbps = 200, .reg = 0x06 }, |
| 165 | { .mbps = 239, .reg = 0x26 }, | 165 | { .mbps = 220, .reg = 0x26 }, |
| 166 | { .mbps = 249, .reg = 0x46 }, | 166 | { .mbps = 240, .reg = 0x46 }, |
| 167 | { .mbps = 269, .reg = 0x08 }, | 167 | { .mbps = 250, .reg = 0x08 }, |
| 168 | { .mbps = 299, .reg = 0x28 }, | 168 | { .mbps = 270, .reg = 0x28 }, |
| 169 | { .mbps = 329, .reg = 0x0a }, | 169 | { .mbps = 300, .reg = 0x0a }, |
| 170 | { .mbps = 359, .reg = 0x2a }, | 170 | { .mbps = 330, .reg = 0x2a }, |
| 171 | { .mbps = 399, .reg = 0x4a }, | 171 | { .mbps = 360, .reg = 0x4a }, |
| 172 | { .mbps = 449, .reg = 0x0c }, | 172 | { .mbps = 400, .reg = 0x0c }, |
| 173 | { .mbps = 499, .reg = 0x2c }, | 173 | { .mbps = 450, .reg = 0x2c }, |
| 174 | { .mbps = 549, .reg = 0x0e }, | 174 | { .mbps = 500, .reg = 0x0e }, |
| 175 | { .mbps = 599, .reg = 0x2e }, | 175 | { .mbps = 550, .reg = 0x2e }, |
| 176 | { .mbps = 649, .reg = 0x10 }, | 176 | { .mbps = 600, .reg = 0x10 }, |
| 177 | { .mbps = 699, .reg = 0x30 }, | 177 | { .mbps = 650, .reg = 0x30 }, |
| 178 | { .mbps = 749, .reg = 0x12 }, | 178 | { .mbps = 700, .reg = 0x12 }, |
| 179 | { .mbps = 799, .reg = 0x32 }, | 179 | { .mbps = 750, .reg = 0x32 }, |
| 180 | { .mbps = 849, .reg = 0x52 }, | 180 | { .mbps = 800, .reg = 0x52 }, |
| 181 | { .mbps = 899, .reg = 0x72 }, | 181 | { .mbps = 850, .reg = 0x72 }, |
| 182 | { .mbps = 949, .reg = 0x14 }, | 182 | { .mbps = 900, .reg = 0x14 }, |
| 183 | { .mbps = 999, .reg = 0x34 }, | 183 | { .mbps = 950, .reg = 0x34 }, |
| 184 | { .mbps = 1049, .reg = 0x54 }, | 184 | { .mbps = 1000, .reg = 0x54 }, |
| 185 | { .mbps = 1099, .reg = 0x74 }, | 185 | { .mbps = 1050, .reg = 0x74 }, |
| 186 | { .mbps = 1125, .reg = 0x16 }, | 186 | { .mbps = 1125, .reg = 0x16 }, |
| 187 | { /* sentinel */ }, | 187 | { /* sentinel */ }, |
| 188 | }; | 188 | }; |
| @@ -986,6 +986,10 @@ static const struct rcar_csi2_info rcar_csi2_info_r8a77990 = { | |||
| 986 | 986 | ||
| 987 | static const struct of_device_id rcar_csi2_of_table[] = { | 987 | static const struct of_device_id rcar_csi2_of_table[] = { |
| 988 | { | 988 | { |
| 989 | .compatible = "renesas,r8a774c0-csi2", | ||
| 990 | .data = &rcar_csi2_info_r8a77990, | ||
| 991 | }, | ||
| 992 | { | ||
| 989 | .compatible = "renesas,r8a7795-csi2", | 993 | .compatible = "renesas,r8a7795-csi2", |
| 990 | .data = &rcar_csi2_info_r8a7795, | 994 | .data = &rcar_csi2_info_r8a7795, |
| 991 | }, | 995 | }, |
diff --git a/drivers/media/platform/rcar-vin/rcar-dma.c b/drivers/media/platform/rcar-vin/rcar-dma.c index 92323310f735..2207a31d355e 100644 --- a/drivers/media/platform/rcar-vin/rcar-dma.c +++ b/drivers/media/platform/rcar-vin/rcar-dma.c | |||
| @@ -681,7 +681,7 @@ static int rvin_setup(struct rvin_dev *vin) | |||
| 681 | break; | 681 | break; |
| 682 | } | 682 | } |
| 683 | 683 | ||
| 684 | /* Enable VSYNC Field Toogle mode after one VSYNC input */ | 684 | /* Enable VSYNC Field Toggle mode after one VSYNC input */ |
| 685 | if (vin->info->model == RCAR_GEN3) | 685 | if (vin->info->model == RCAR_GEN3) |
| 686 | dmr2 = VNDMR2_FTEV; | 686 | dmr2 = VNDMR2_FTEV; |
| 687 | else | 687 | else |
| @@ -1341,5 +1341,5 @@ int rvin_set_channel_routing(struct rvin_dev *vin, u8 chsel) | |||
| 1341 | 1341 | ||
| 1342 | pm_runtime_put(vin->dev); | 1342 | pm_runtime_put(vin->dev); |
| 1343 | 1343 | ||
| 1344 | return ret; | 1344 | return 0; |
| 1345 | } | 1345 | } |
diff --git a/drivers/media/platform/rcar-vin/rcar-v4l2.c b/drivers/media/platform/rcar-vin/rcar-v4l2.c index 7a2851790b91..7cbdcbf9b090 100644 --- a/drivers/media/platform/rcar-vin/rcar-v4l2.c +++ b/drivers/media/platform/rcar-vin/rcar-v4l2.c | |||
| @@ -665,7 +665,7 @@ static void rvin_mc_try_format(struct rvin_dev *vin, | |||
| 665 | * The V4L2 specification clearly documents the colorspace fields | 665 | * The V4L2 specification clearly documents the colorspace fields |
| 666 | * as being set by drivers for capture devices. Using the values | 666 | * as being set by drivers for capture devices. Using the values |
| 667 | * supplied by userspace thus wouldn't comply with the API. Until | 667 | * supplied by userspace thus wouldn't comply with the API. Until |
| 668 | * the API is updated force fixed vaules. | 668 | * the API is updated force fixed values. |
| 669 | */ | 669 | */ |
| 670 | pix->colorspace = RVIN_DEFAULT_COLORSPACE; | 670 | pix->colorspace = RVIN_DEFAULT_COLORSPACE; |
| 671 | pix->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(pix->colorspace); | 671 | pix->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(pix->colorspace); |
| @@ -964,7 +964,7 @@ void rvin_v4l2_unregister(struct rvin_dev *vin) | |||
| 964 | v4l2_info(&vin->v4l2_dev, "Removing %s\n", | 964 | v4l2_info(&vin->v4l2_dev, "Removing %s\n", |
| 965 | video_device_node_name(&vin->vdev)); | 965 | video_device_node_name(&vin->vdev)); |
| 966 | 966 | ||
| 967 | /* Checks internaly if vdev have been init or not */ | 967 | /* Checks internally if vdev have been init or not */ |
| 968 | video_unregister_device(&vin->vdev); | 968 | video_unregister_device(&vin->vdev); |
| 969 | } | 969 | } |
| 970 | 970 | ||
diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/platform/rockchip/rga/rga-hw.c index 96d1b1b3fe8e..843e50d17a72 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c | |||
| @@ -256,7 +256,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx) | |||
| 256 | } | 256 | } |
| 257 | 257 | ||
| 258 | /* | 258 | /* |
| 259 | * Cacluate the up/down scaling mode/factor. | 259 | * Calculate the up/down scaling mode/factor. |
| 260 | * | 260 | * |
| 261 | * RGA used to scale the picture first, and then rotate second, | 261 | * RGA used to scale the picture first, and then rotate second, |
| 262 | * so we need to swap the w/h when rotate degree is 90/270. | 262 | * so we need to swap the w/h when rotate degree is 90/270. |
| @@ -304,7 +304,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx) | |||
| 304 | } | 304 | } |
| 305 | 305 | ||
| 306 | /* | 306 | /* |
| 307 | * Cacluate the framebuffer virtual strides and active size, | 307 | * Calculate the framebuffer virtual strides and active size, |
| 308 | * note that the step of vir_stride / vir_width is 4 byte words | 308 | * note that the step of vir_stride / vir_width is 4 byte words |
| 309 | */ | 309 | */ |
| 310 | src_vir_info.data.vir_stride = ctx->in.stride >> 2; | 310 | src_vir_info.data.vir_stride = ctx->in.stride >> 2; |
| @@ -318,7 +318,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx) | |||
| 318 | dst_act_info.data.act_width = dst_w - 1; | 318 | dst_act_info.data.act_width = dst_w - 1; |
| 319 | 319 | ||
| 320 | /* | 320 | /* |
| 321 | * Cacluate the source framebuffer base address with offset pixel. | 321 | * Calculate the source framebuffer base address with offset pixel. |
| 322 | */ | 322 | */ |
| 323 | src_offsets = rga_get_addr_offset(&ctx->in, src_x, src_y, | 323 | src_offsets = rga_get_addr_offset(&ctx->in, src_x, src_y, |
| 324 | src_w, src_h); | 324 | src_w, src_h); |
diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/platform/rockchip/rga/rga.c index 5c653287185f..b096227a9722 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c | |||
| @@ -43,7 +43,7 @@ static void device_run(void *prv) | |||
| 43 | { | 43 | { |
| 44 | struct rga_ctx *ctx = prv; | 44 | struct rga_ctx *ctx = prv; |
| 45 | struct rockchip_rga *rga = ctx->rga; | 45 | struct rockchip_rga *rga = ctx->rga; |
| 46 | struct vb2_buffer *src, *dst; | 46 | struct vb2_v4l2_buffer *src, *dst; |
| 47 | unsigned long flags; | 47 | unsigned long flags; |
| 48 | 48 | ||
| 49 | spin_lock_irqsave(&rga->ctrl_lock, flags); | 49 | spin_lock_irqsave(&rga->ctrl_lock, flags); |
| @@ -53,8 +53,8 @@ static void device_run(void *prv) | |||
| 53 | src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 53 | src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 54 | dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); | 54 | dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); |
| 55 | 55 | ||
| 56 | rga_buf_map(src); | 56 | rga_buf_map(&src->vb2_buf); |
| 57 | rga_buf_map(dst); | 57 | rga_buf_map(&dst->vb2_buf); |
| 58 | 58 | ||
| 59 | rga_hw_start(rga); | 59 | rga_hw_start(rga); |
| 60 | 60 | ||
diff --git a/drivers/media/platform/s3c-camif/camif-core.h b/drivers/media/platform/s3c-camif/camif-core.h index 1f5c8c94ce89..be5e7357dffc 100644 --- a/drivers/media/platform/s3c-camif/camif-core.h +++ b/drivers/media/platform/s3c-camif/camif-core.h | |||
| @@ -260,7 +260,7 @@ struct camif_vp { | |||
| 260 | * @clock: clocks required for the CAMIF operation | 260 | * @clock: clocks required for the CAMIF operation |
| 261 | * @lock: mutex protecting this data structure | 261 | * @lock: mutex protecting this data structure |
| 262 | * @slock: spinlock protecting CAMIF registers | 262 | * @slock: spinlock protecting CAMIF registers |
| 263 | * @io_base: start address of the mmaped CAMIF registers | 263 | * @io_base: start address of the mmapped CAMIF registers |
| 264 | */ | 264 | */ |
| 265 | struct camif_dev { | 265 | struct camif_dev { |
| 266 | struct media_device media_dev; | 266 | struct media_device media_dev; |
diff --git a/drivers/media/platform/s5p-g2d/g2d.c b/drivers/media/platform/s5p-g2d/g2d.c index 57ab1d1085d1..971c47165010 100644 --- a/drivers/media/platform/s5p-g2d/g2d.c +++ b/drivers/media/platform/s5p-g2d/g2d.c | |||
| @@ -513,7 +513,7 @@ static void device_run(void *prv) | |||
| 513 | { | 513 | { |
| 514 | struct g2d_ctx *ctx = prv; | 514 | struct g2d_ctx *ctx = prv; |
| 515 | struct g2d_dev *dev = ctx->dev; | 515 | struct g2d_dev *dev = ctx->dev; |
| 516 | struct vb2_buffer *src, *dst; | 516 | struct vb2_v4l2_buffer *src, *dst; |
| 517 | unsigned long flags; | 517 | unsigned long flags; |
| 518 | u32 cmd = 0; | 518 | u32 cmd = 0; |
| 519 | 519 | ||
| @@ -528,10 +528,10 @@ static void device_run(void *prv) | |||
| 528 | spin_lock_irqsave(&dev->ctrl_lock, flags); | 528 | spin_lock_irqsave(&dev->ctrl_lock, flags); |
| 529 | 529 | ||
| 530 | g2d_set_src_size(dev, &ctx->in); | 530 | g2d_set_src_size(dev, &ctx->in); |
| 531 | g2d_set_src_addr(dev, vb2_dma_contig_plane_dma_addr(src, 0)); | 531 | g2d_set_src_addr(dev, vb2_dma_contig_plane_dma_addr(&src->vb2_buf, 0)); |
| 532 | 532 | ||
| 533 | g2d_set_dst_size(dev, &ctx->out); | 533 | g2d_set_dst_size(dev, &ctx->out); |
| 534 | g2d_set_dst_addr(dev, vb2_dma_contig_plane_dma_addr(dst, 0)); | 534 | g2d_set_dst_addr(dev, vb2_dma_contig_plane_dma_addr(&dst->vb2_buf, 0)); |
| 535 | 535 | ||
| 536 | g2d_set_rop4(dev, ctx->rop); | 536 | g2d_set_rop4(dev, ctx->rop); |
| 537 | g2d_set_flip(dev, ctx->flip); | 537 | g2d_set_flip(dev, ctx->flip); |
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-core.c b/drivers/media/platform/s5p-jpeg/jpeg-core.c index 3f9000b70385..8cc730eccb6c 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-core.c +++ b/drivers/media/platform/s5p-jpeg/jpeg-core.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
| 5 | * | 5 | * |
| 6 | * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 6 | * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 7 | * Author: Jacek Anaszewski <j.anaszewski@samsung.com> | 7 | * Author: Jacek Anaszewski <j.anaszewski@samsung.com> |
| 8 | * | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
| @@ -793,14 +793,14 @@ static void skip(struct s5p_jpeg_buffer *buf, long len); | |||
| 793 | static void exynos4_jpeg_parse_decode_h_tbl(struct s5p_jpeg_ctx *ctx) | 793 | static void exynos4_jpeg_parse_decode_h_tbl(struct s5p_jpeg_ctx *ctx) |
| 794 | { | 794 | { |
| 795 | struct s5p_jpeg *jpeg = ctx->jpeg; | 795 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 796 | struct vb2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 796 | struct vb2_v4l2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 797 | struct s5p_jpeg_buffer jpeg_buffer; | 797 | struct s5p_jpeg_buffer jpeg_buffer; |
| 798 | unsigned int word; | 798 | unsigned int word; |
| 799 | int c, x, components; | 799 | int c, x, components; |
| 800 | 800 | ||
| 801 | jpeg_buffer.size = 2; /* Ls */ | 801 | jpeg_buffer.size = 2; /* Ls */ |
| 802 | jpeg_buffer.data = | 802 | jpeg_buffer.data = |
| 803 | (unsigned long)vb2_plane_vaddr(vb, 0) + ctx->out_q.sos + 2; | 803 | (unsigned long)vb2_plane_vaddr(&vb->vb2_buf, 0) + ctx->out_q.sos + 2; |
| 804 | jpeg_buffer.curr = 0; | 804 | jpeg_buffer.curr = 0; |
| 805 | 805 | ||
| 806 | word = 0; | 806 | word = 0; |
| @@ -830,14 +830,14 @@ static void exynos4_jpeg_parse_decode_h_tbl(struct s5p_jpeg_ctx *ctx) | |||
| 830 | static void exynos4_jpeg_parse_huff_tbl(struct s5p_jpeg_ctx *ctx) | 830 | static void exynos4_jpeg_parse_huff_tbl(struct s5p_jpeg_ctx *ctx) |
| 831 | { | 831 | { |
| 832 | struct s5p_jpeg *jpeg = ctx->jpeg; | 832 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 833 | struct vb2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 833 | struct vb2_v4l2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 834 | struct s5p_jpeg_buffer jpeg_buffer; | 834 | struct s5p_jpeg_buffer jpeg_buffer; |
| 835 | unsigned int word; | 835 | unsigned int word; |
| 836 | int c, i, n, j; | 836 | int c, i, n, j; |
| 837 | 837 | ||
| 838 | for (j = 0; j < ctx->out_q.dht.n; ++j) { | 838 | for (j = 0; j < ctx->out_q.dht.n; ++j) { |
| 839 | jpeg_buffer.size = ctx->out_q.dht.len[j]; | 839 | jpeg_buffer.size = ctx->out_q.dht.len[j]; |
| 840 | jpeg_buffer.data = (unsigned long)vb2_plane_vaddr(vb, 0) + | 840 | jpeg_buffer.data = (unsigned long)vb2_plane_vaddr(&vb->vb2_buf, 0) + |
| 841 | ctx->out_q.dht.marker[j]; | 841 | ctx->out_q.dht.marker[j]; |
| 842 | jpeg_buffer.curr = 0; | 842 | jpeg_buffer.curr = 0; |
| 843 | 843 | ||
| @@ -889,13 +889,13 @@ static void exynos4_jpeg_parse_huff_tbl(struct s5p_jpeg_ctx *ctx) | |||
| 889 | static void exynos4_jpeg_parse_decode_q_tbl(struct s5p_jpeg_ctx *ctx) | 889 | static void exynos4_jpeg_parse_decode_q_tbl(struct s5p_jpeg_ctx *ctx) |
| 890 | { | 890 | { |
| 891 | struct s5p_jpeg *jpeg = ctx->jpeg; | 891 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 892 | struct vb2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 892 | struct vb2_v4l2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 893 | struct s5p_jpeg_buffer jpeg_buffer; | 893 | struct s5p_jpeg_buffer jpeg_buffer; |
| 894 | int c, x, components; | 894 | int c, x, components; |
| 895 | 895 | ||
| 896 | jpeg_buffer.size = ctx->out_q.sof_len; | 896 | jpeg_buffer.size = ctx->out_q.sof_len; |
| 897 | jpeg_buffer.data = | 897 | jpeg_buffer.data = |
| 898 | (unsigned long)vb2_plane_vaddr(vb, 0) + ctx->out_q.sof; | 898 | (unsigned long)vb2_plane_vaddr(&vb->vb2_buf, 0) + ctx->out_q.sof; |
| 899 | jpeg_buffer.curr = 0; | 899 | jpeg_buffer.curr = 0; |
| 900 | 900 | ||
| 901 | skip(&jpeg_buffer, 5); /* P, Y, X */ | 901 | skip(&jpeg_buffer, 5); /* P, Y, X */ |
| @@ -920,14 +920,14 @@ static void exynos4_jpeg_parse_decode_q_tbl(struct s5p_jpeg_ctx *ctx) | |||
| 920 | static void exynos4_jpeg_parse_q_tbl(struct s5p_jpeg_ctx *ctx) | 920 | static void exynos4_jpeg_parse_q_tbl(struct s5p_jpeg_ctx *ctx) |
| 921 | { | 921 | { |
| 922 | struct s5p_jpeg *jpeg = ctx->jpeg; | 922 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 923 | struct vb2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 923 | struct vb2_v4l2_buffer *vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 924 | struct s5p_jpeg_buffer jpeg_buffer; | 924 | struct s5p_jpeg_buffer jpeg_buffer; |
| 925 | unsigned int word; | 925 | unsigned int word; |
| 926 | int c, i, j; | 926 | int c, i, j; |
| 927 | 927 | ||
| 928 | for (j = 0; j < ctx->out_q.dqt.n; ++j) { | 928 | for (j = 0; j < ctx->out_q.dqt.n; ++j) { |
| 929 | jpeg_buffer.size = ctx->out_q.dqt.len[j]; | 929 | jpeg_buffer.size = ctx->out_q.dqt.len[j]; |
| 930 | jpeg_buffer.data = (unsigned long)vb2_plane_vaddr(vb, 0) + | 930 | jpeg_buffer.data = (unsigned long)vb2_plane_vaddr(&vb->vb2_buf, 0) + |
| 931 | ctx->out_q.dqt.marker[j]; | 931 | ctx->out_q.dqt.marker[j]; |
| 932 | jpeg_buffer.curr = 0; | 932 | jpeg_buffer.curr = 0; |
| 933 | 933 | ||
| @@ -1293,13 +1293,16 @@ static int s5p_jpeg_querycap(struct file *file, void *priv, | |||
| 1293 | return 0; | 1293 | return 0; |
| 1294 | } | 1294 | } |
| 1295 | 1295 | ||
| 1296 | static int enum_fmt(struct s5p_jpeg_fmt *sjpeg_formats, int n, | 1296 | static int enum_fmt(struct s5p_jpeg_ctx *ctx, |
| 1297 | struct s5p_jpeg_fmt *sjpeg_formats, int n, | ||
| 1297 | struct v4l2_fmtdesc *f, u32 type) | 1298 | struct v4l2_fmtdesc *f, u32 type) |
| 1298 | { | 1299 | { |
| 1299 | int i, num = 0; | 1300 | int i, num = 0; |
| 1301 | unsigned int fmt_ver_flag = ctx->jpeg->variant->fmt_ver_flag; | ||
| 1300 | 1302 | ||
| 1301 | for (i = 0; i < n; ++i) { | 1303 | for (i = 0; i < n; ++i) { |
| 1302 | if (sjpeg_formats[i].flags & type) { | 1304 | if (sjpeg_formats[i].flags & type && |
| 1305 | sjpeg_formats[i].flags & fmt_ver_flag) { | ||
| 1303 | /* index-th format of type type found ? */ | 1306 | /* index-th format of type type found ? */ |
| 1304 | if (num == f->index) | 1307 | if (num == f->index) |
| 1305 | break; | 1308 | break; |
| @@ -1326,11 +1329,11 @@ static int s5p_jpeg_enum_fmt_vid_cap(struct file *file, void *priv, | |||
| 1326 | struct s5p_jpeg_ctx *ctx = fh_to_ctx(priv); | 1329 | struct s5p_jpeg_ctx *ctx = fh_to_ctx(priv); |
| 1327 | 1330 | ||
| 1328 | if (ctx->mode == S5P_JPEG_ENCODE) | 1331 | if (ctx->mode == S5P_JPEG_ENCODE) |
| 1329 | return enum_fmt(sjpeg_formats, SJPEG_NUM_FORMATS, f, | 1332 | return enum_fmt(ctx, sjpeg_formats, SJPEG_NUM_FORMATS, f, |
| 1330 | SJPEG_FMT_FLAG_ENC_CAPTURE); | 1333 | SJPEG_FMT_FLAG_ENC_CAPTURE); |
| 1331 | 1334 | ||
| 1332 | return enum_fmt(sjpeg_formats, SJPEG_NUM_FORMATS, f, | 1335 | return enum_fmt(ctx, sjpeg_formats, SJPEG_NUM_FORMATS, f, |
| 1333 | SJPEG_FMT_FLAG_DEC_CAPTURE); | 1336 | SJPEG_FMT_FLAG_DEC_CAPTURE); |
| 1334 | } | 1337 | } |
| 1335 | 1338 | ||
| 1336 | static int s5p_jpeg_enum_fmt_vid_out(struct file *file, void *priv, | 1339 | static int s5p_jpeg_enum_fmt_vid_out(struct file *file, void *priv, |
| @@ -1339,11 +1342,11 @@ static int s5p_jpeg_enum_fmt_vid_out(struct file *file, void *priv, | |||
| 1339 | struct s5p_jpeg_ctx *ctx = fh_to_ctx(priv); | 1342 | struct s5p_jpeg_ctx *ctx = fh_to_ctx(priv); |
| 1340 | 1343 | ||
| 1341 | if (ctx->mode == S5P_JPEG_ENCODE) | 1344 | if (ctx->mode == S5P_JPEG_ENCODE) |
| 1342 | return enum_fmt(sjpeg_formats, SJPEG_NUM_FORMATS, f, | 1345 | return enum_fmt(ctx, sjpeg_formats, SJPEG_NUM_FORMATS, f, |
| 1343 | SJPEG_FMT_FLAG_ENC_OUTPUT); | 1346 | SJPEG_FMT_FLAG_ENC_OUTPUT); |
| 1344 | 1347 | ||
| 1345 | return enum_fmt(sjpeg_formats, SJPEG_NUM_FORMATS, f, | 1348 | return enum_fmt(ctx, sjpeg_formats, SJPEG_NUM_FORMATS, f, |
| 1346 | SJPEG_FMT_FLAG_DEC_OUTPUT); | 1349 | SJPEG_FMT_FLAG_DEC_OUTPUT); |
| 1347 | } | 1350 | } |
| 1348 | 1351 | ||
| 1349 | static struct s5p_jpeg_q_data *get_q_data(struct s5p_jpeg_ctx *ctx, | 1352 | static struct s5p_jpeg_q_data *get_q_data(struct s5p_jpeg_ctx *ctx, |
| @@ -2002,7 +2005,7 @@ static int s5p_jpeg_controls_create(struct s5p_jpeg_ctx *ctx) | |||
| 2002 | 2005 | ||
| 2003 | v4l2_ctrl_new_std(&ctx->ctrl_handler, &s5p_jpeg_ctrl_ops, | 2006 | v4l2_ctrl_new_std(&ctx->ctrl_handler, &s5p_jpeg_ctrl_ops, |
| 2004 | V4L2_CID_JPEG_RESTART_INTERVAL, | 2007 | V4L2_CID_JPEG_RESTART_INTERVAL, |
| 2005 | 0, 3, 0xffff, 0); | 2008 | 0, 0xffff, 1, 0); |
| 2006 | if (ctx->jpeg->variant->version == SJPEG_S5P) | 2009 | if (ctx->jpeg->variant->version == SJPEG_S5P) |
| 2007 | mask = ~0x06; /* 422, 420 */ | 2010 | mask = ~0x06; /* 422, 420 */ |
| 2008 | } | 2011 | } |
| @@ -2072,15 +2075,15 @@ static void s5p_jpeg_device_run(void *priv) | |||
| 2072 | { | 2075 | { |
| 2073 | struct s5p_jpeg_ctx *ctx = priv; | 2076 | struct s5p_jpeg_ctx *ctx = priv; |
| 2074 | struct s5p_jpeg *jpeg = ctx->jpeg; | 2077 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 2075 | struct vb2_buffer *src_buf, *dst_buf; | 2078 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 2076 | unsigned long src_addr, dst_addr, flags; | 2079 | unsigned long src_addr, dst_addr, flags; |
| 2077 | 2080 | ||
| 2078 | spin_lock_irqsave(&ctx->jpeg->slock, flags); | 2081 | spin_lock_irqsave(&ctx->jpeg->slock, flags); |
| 2079 | 2082 | ||
| 2080 | src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 2083 | src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 2081 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); | 2084 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); |
| 2082 | src_addr = vb2_dma_contig_plane_dma_addr(src_buf, 0); | 2085 | src_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); |
| 2083 | dst_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0); | 2086 | dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); |
| 2084 | 2087 | ||
| 2085 | s5p_jpeg_reset(jpeg->regs); | 2088 | s5p_jpeg_reset(jpeg->regs); |
| 2086 | s5p_jpeg_poweron(jpeg->regs); | 2089 | s5p_jpeg_poweron(jpeg->regs); |
| @@ -2153,7 +2156,7 @@ static void exynos4_jpeg_set_img_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2153 | { | 2156 | { |
| 2154 | struct s5p_jpeg *jpeg = ctx->jpeg; | 2157 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 2155 | struct s5p_jpeg_fmt *fmt; | 2158 | struct s5p_jpeg_fmt *fmt; |
| 2156 | struct vb2_buffer *vb; | 2159 | struct vb2_v4l2_buffer *vb; |
| 2157 | struct s5p_jpeg_addr jpeg_addr = {}; | 2160 | struct s5p_jpeg_addr jpeg_addr = {}; |
| 2158 | u32 pix_size, padding_bytes = 0; | 2161 | u32 pix_size, padding_bytes = 0; |
| 2159 | 2162 | ||
| @@ -2172,7 +2175,7 @@ static void exynos4_jpeg_set_img_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2172 | vb = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); | 2175 | vb = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); |
| 2173 | } | 2176 | } |
| 2174 | 2177 | ||
| 2175 | jpeg_addr.y = vb2_dma_contig_plane_dma_addr(vb, 0); | 2178 | jpeg_addr.y = vb2_dma_contig_plane_dma_addr(&vb->vb2_buf, 0); |
| 2176 | 2179 | ||
| 2177 | if (fmt->colplanes == 2) { | 2180 | if (fmt->colplanes == 2) { |
| 2178 | jpeg_addr.cb = jpeg_addr.y + pix_size - padding_bytes; | 2181 | jpeg_addr.cb = jpeg_addr.y + pix_size - padding_bytes; |
| @@ -2190,7 +2193,7 @@ static void exynos4_jpeg_set_img_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2190 | static void exynos4_jpeg_set_jpeg_addr(struct s5p_jpeg_ctx *ctx) | 2193 | static void exynos4_jpeg_set_jpeg_addr(struct s5p_jpeg_ctx *ctx) |
| 2191 | { | 2194 | { |
| 2192 | struct s5p_jpeg *jpeg = ctx->jpeg; | 2195 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 2193 | struct vb2_buffer *vb; | 2196 | struct vb2_v4l2_buffer *vb; |
| 2194 | unsigned int jpeg_addr = 0; | 2197 | unsigned int jpeg_addr = 0; |
| 2195 | 2198 | ||
| 2196 | if (ctx->mode == S5P_JPEG_ENCODE) | 2199 | if (ctx->mode == S5P_JPEG_ENCODE) |
| @@ -2198,7 +2201,7 @@ static void exynos4_jpeg_set_jpeg_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2198 | else | 2201 | else |
| 2199 | vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 2202 | vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 2200 | 2203 | ||
| 2201 | jpeg_addr = vb2_dma_contig_plane_dma_addr(vb, 0); | 2204 | jpeg_addr = vb2_dma_contig_plane_dma_addr(&vb->vb2_buf, 0); |
| 2202 | if (jpeg->variant->version == SJPEG_EXYNOS5433 && | 2205 | if (jpeg->variant->version == SJPEG_EXYNOS5433 && |
| 2203 | ctx->mode == S5P_JPEG_DECODE) | 2206 | ctx->mode == S5P_JPEG_DECODE) |
| 2204 | jpeg_addr += ctx->out_q.sos; | 2207 | jpeg_addr += ctx->out_q.sos; |
| @@ -2314,7 +2317,7 @@ static void exynos3250_jpeg_set_img_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2314 | { | 2317 | { |
| 2315 | struct s5p_jpeg *jpeg = ctx->jpeg; | 2318 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 2316 | struct s5p_jpeg_fmt *fmt; | 2319 | struct s5p_jpeg_fmt *fmt; |
| 2317 | struct vb2_buffer *vb; | 2320 | struct vb2_v4l2_buffer *vb; |
| 2318 | struct s5p_jpeg_addr jpeg_addr = {}; | 2321 | struct s5p_jpeg_addr jpeg_addr = {}; |
| 2319 | u32 pix_size; | 2322 | u32 pix_size; |
| 2320 | 2323 | ||
| @@ -2328,7 +2331,7 @@ static void exynos3250_jpeg_set_img_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2328 | fmt = ctx->cap_q.fmt; | 2331 | fmt = ctx->cap_q.fmt; |
| 2329 | } | 2332 | } |
| 2330 | 2333 | ||
| 2331 | jpeg_addr.y = vb2_dma_contig_plane_dma_addr(vb, 0); | 2334 | jpeg_addr.y = vb2_dma_contig_plane_dma_addr(&vb->vb2_buf, 0); |
| 2332 | 2335 | ||
| 2333 | if (fmt->colplanes == 2) { | 2336 | if (fmt->colplanes == 2) { |
| 2334 | jpeg_addr.cb = jpeg_addr.y + pix_size; | 2337 | jpeg_addr.cb = jpeg_addr.y + pix_size; |
| @@ -2346,7 +2349,7 @@ static void exynos3250_jpeg_set_img_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2346 | static void exynos3250_jpeg_set_jpeg_addr(struct s5p_jpeg_ctx *ctx) | 2349 | static void exynos3250_jpeg_set_jpeg_addr(struct s5p_jpeg_ctx *ctx) |
| 2347 | { | 2350 | { |
| 2348 | struct s5p_jpeg *jpeg = ctx->jpeg; | 2351 | struct s5p_jpeg *jpeg = ctx->jpeg; |
| 2349 | struct vb2_buffer *vb; | 2352 | struct vb2_v4l2_buffer *vb; |
| 2350 | unsigned int jpeg_addr = 0; | 2353 | unsigned int jpeg_addr = 0; |
| 2351 | 2354 | ||
| 2352 | if (ctx->mode == S5P_JPEG_ENCODE) | 2355 | if (ctx->mode == S5P_JPEG_ENCODE) |
| @@ -2354,7 +2357,7 @@ static void exynos3250_jpeg_set_jpeg_addr(struct s5p_jpeg_ctx *ctx) | |||
| 2354 | else | 2357 | else |
| 2355 | vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 2358 | vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| 2356 | 2359 | ||
| 2357 | jpeg_addr = vb2_dma_contig_plane_dma_addr(vb, 0); | 2360 | jpeg_addr = vb2_dma_contig_plane_dma_addr(&vb->vb2_buf, 0); |
| 2358 | exynos3250_jpeg_jpgadr(jpeg->regs, jpeg_addr); | 2361 | exynos3250_jpeg_jpgadr(jpeg->regs, jpeg_addr); |
| 2359 | } | 2362 | } |
| 2360 | 2363 | ||
| @@ -3220,7 +3223,7 @@ static struct platform_driver s5p_jpeg_driver = { | |||
| 3220 | 3223 | ||
| 3221 | module_platform_driver(s5p_jpeg_driver); | 3224 | module_platform_driver(s5p_jpeg_driver); |
| 3222 | 3225 | ||
| 3223 | MODULE_AUTHOR("Andrzej Pietrasiewicz <andrzej.p@samsung.com>"); | 3226 | MODULE_AUTHOR("Andrzej Pietrasiewicz <andrzejtp2010@gmail.com>"); |
| 3224 | MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>"); | 3227 | MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>"); |
| 3225 | MODULE_DESCRIPTION("Samsung JPEG codec driver"); | 3228 | MODULE_DESCRIPTION("Samsung JPEG codec driver"); |
| 3226 | MODULE_LICENSE("GPL"); | 3229 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-core.h b/drivers/media/platform/s5p-jpeg/jpeg-core.h index a46465e10351..144c102ff05f 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-core.h +++ b/drivers/media/platform/s5p-jpeg/jpeg-core.h | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
| 5 | * | 5 | * |
| 6 | * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 6 | * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| @@ -153,7 +153,7 @@ struct s5p_jpeg_variant { | |||
| 153 | 153 | ||
| 154 | /** | 154 | /** |
| 155 | * struct jpeg_fmt - driver's internal color format data | 155 | * struct jpeg_fmt - driver's internal color format data |
| 156 | * @name: format descritpion | 156 | * @name: format description |
| 157 | * @fourcc: the fourcc code, 0 if not applicable | 157 | * @fourcc: the fourcc code, 0 if not applicable |
| 158 | * @depth: number of bits per pixel | 158 | * @depth: number of bits per pixel |
| 159 | * @colplanes: number of color planes (1 for packed formats) | 159 | * @colplanes: number of color planes (1 for packed formats) |
| @@ -193,7 +193,7 @@ struct s5p_jpeg_marker { | |||
| 193 | * @sos: SOS marker's position relative to the buffer beginning | 193 | * @sos: SOS marker's position relative to the buffer beginning |
| 194 | * @dht: DHT markers' positions relative to the buffer beginning | 194 | * @dht: DHT markers' positions relative to the buffer beginning |
| 195 | * @dqt: DQT markers' positions relative to the buffer beginning | 195 | * @dqt: DQT markers' positions relative to the buffer beginning |
| 196 | * @sof: SOF0 marker's postition relative to the buffer beginning | 196 | * @sof: SOF0 marker's position relative to the buffer beginning |
| 197 | * @sof_len: SOF0 marker's payload length (without length field itself) | 197 | * @sof_len: SOF0 marker's payload length (without length field itself) |
| 198 | * @components: number of image components | 198 | * @components: number of image components |
| 199 | * @size: image buffer size in bytes | 199 | * @size: image buffer size in bytes |
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c index b5f20e722b63..59c6263a71bf 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
| 5 | * | 5 | * |
| 6 | * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 6 | * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.h b/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.h index f208fa3ed738..bfe746f8f750 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.h +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-s5p.h | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
| 5 | * | 5 | * |
| 6 | * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 6 | * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/drivers/media/platform/s5p-jpeg/jpeg-regs.h b/drivers/media/platform/s5p-jpeg/jpeg-regs.h index df790b10140c..574f0e8021e5 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-regs.h +++ b/drivers/media/platform/s5p-jpeg/jpeg-regs.h | |||
| @@ -5,7 +5,7 @@ | |||
| 5 | * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. | 5 | * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. |
| 6 | * http://www.samsung.com | 6 | * http://www.samsung.com |
| 7 | * | 7 | * |
| 8 | * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 8 | * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 9 | * Author: Jacek Anaszewski <j.anaszewski@samsung.com> | 9 | * Author: Jacek Anaszewski <j.anaszewski@samsung.com> |
| 10 | * | 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index 8a5ba3bec3af..0a9f59d89185 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c | |||
| @@ -1089,7 +1089,6 @@ static struct device *s5p_mfc_alloc_memdev(struct device *dev, | |||
| 1089 | device_initialize(child); | 1089 | device_initialize(child); |
| 1090 | dev_set_name(child, "%s:%s", dev_name(dev), name); | 1090 | dev_set_name(child, "%s:%s", dev_name(dev), name); |
| 1091 | child->parent = dev; | 1091 | child->parent = dev; |
| 1092 | child->bus = dev->bus; | ||
| 1093 | child->coherent_dma_mask = dev->coherent_dma_mask; | 1092 | child->coherent_dma_mask = dev->coherent_dma_mask; |
| 1094 | child->dma_mask = dev->dma_mask; | 1093 | child->dma_mask = dev->dma_mask; |
| 1095 | child->release = s5p_mfc_memdev_release; | 1094 | child->release = s5p_mfc_memdev_release; |
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h index 20442a9b9f7a..24148020baa9 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h | |||
| @@ -268,7 +268,7 @@ struct s5p_mfc_priv_buf { | |||
| 268 | * @enc_ctrl_handler: control framework handler for encoding | 268 | * @enc_ctrl_handler: control framework handler for encoding |
| 269 | * @pm: power management control | 269 | * @pm: power management control |
| 270 | * @variant: MFC hardware variant information | 270 | * @variant: MFC hardware variant information |
| 271 | * @num_inst: couter of active MFC instances | 271 | * @num_inst: counter of active MFC instances |
| 272 | * @irqlock: lock for operations on videobuf2 queues | 272 | * @irqlock: lock for operations on videobuf2 queues |
| 273 | * @condlock: lock for changing/checking if a context is ready to be | 273 | * @condlock: lock for changing/checking if a context is ready to be |
| 274 | * processed | 274 | * processed |
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c index ee7b15b335e0..9f832ba7bc8c 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | |||
| @@ -51,7 +51,7 @@ int s5p_mfc_load_firmware(struct s5p_mfc_dev *dev) | |||
| 51 | struct firmware *fw_blob; | 51 | struct firmware *fw_blob; |
| 52 | int i, err = -EINVAL; | 52 | int i, err = -EINVAL; |
| 53 | 53 | ||
| 54 | /* Firmare has to be present as a separate file or compiled | 54 | /* Firmware has to be present as a separate file or compiled |
| 55 | * into kernel. */ | 55 | * into kernel. */ |
| 56 | mfc_debug_enter(); | 56 | mfc_debug_enter(); |
| 57 | 57 | ||
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c index f4c0e3a8f27d..e111f9c47179 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | |||
| @@ -602,7 +602,7 @@ static int vidioc_querybuf(struct file *file, void *priv, | |||
| 602 | int i; | 602 | int i; |
| 603 | 603 | ||
| 604 | if (buf->memory != V4L2_MEMORY_MMAP) { | 604 | if (buf->memory != V4L2_MEMORY_MMAP) { |
| 605 | mfc_err("Only mmaped buffers can be used\n"); | 605 | mfc_err("Only mmapped buffers can be used\n"); |
| 606 | return -EINVAL; | 606 | return -EINVAL; |
| 607 | } | 607 | } |
| 608 | mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type); | 608 | mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type); |
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c index 0913881219ff..6144e95f6425 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c | |||
| @@ -1293,7 +1293,7 @@ static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx) | |||
| 1293 | * First set the output frame buffers | 1293 | * First set the output frame buffers |
| 1294 | */ | 1294 | */ |
| 1295 | if (ctx->capture_state != QUEUE_BUFS_MMAPED) { | 1295 | if (ctx->capture_state != QUEUE_BUFS_MMAPED) { |
| 1296 | mfc_err("It seems that not all destination buffers were mmaped\nMFC requires that all destination are mmaped before starting processing\n"); | 1296 | mfc_err("It seems that not all destination buffers were mmapped\nMFC requires that all destination are mmapped before starting processing\n"); |
| 1297 | return -EAGAIN; | 1297 | return -EAGAIN; |
| 1298 | } | 1298 | } |
| 1299 | if (list_empty(&ctx->src_queue)) { | 1299 | if (list_empty(&ctx->src_queue)) { |
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c index 7c629be43205..281699ab7fe1 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | |||
| @@ -53,7 +53,7 @@ static int s5p_mfc_alloc_dec_temp_buffers_v6(struct s5p_mfc_ctx *ctx) | |||
| 53 | return 0; | 53 | return 0; |
| 54 | } | 54 | } |
| 55 | 55 | ||
| 56 | /* Release temproary buffers for decoding */ | 56 | /* Release temporary buffers for decoding */ |
| 57 | static void s5p_mfc_release_dec_desc_buffer_v6(struct s5p_mfc_ctx *ctx) | 57 | static void s5p_mfc_release_dec_desc_buffer_v6(struct s5p_mfc_ctx *ctx) |
| 58 | { | 58 | { |
| 59 | /* NOP */ | 59 | /* NOP */ |
| @@ -1928,7 +1928,7 @@ static inline int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx) | |||
| 1928 | 1928 | ||
| 1929 | if (ctx->capture_state != QUEUE_BUFS_MMAPED) { | 1929 | if (ctx->capture_state != QUEUE_BUFS_MMAPED) { |
| 1930 | mfc_err("It seems that not all destination buffers were\n" | 1930 | mfc_err("It seems that not all destination buffers were\n" |
| 1931 | "mmaped.MFC requires that all destination are mmaped\n" | 1931 | "mmapped.MFC requires that all destination are mmapped\n" |
| 1932 | "before starting processing.\n"); | 1932 | "before starting processing.\n"); |
| 1933 | return -EAGAIN; | 1933 | return -EAGAIN; |
| 1934 | } | 1934 | } |
diff --git a/drivers/media/platform/seco-cec/seco-cec.h b/drivers/media/platform/seco-cec/seco-cec.h index e632c4a2a044..843de8c7dfd4 100644 --- a/drivers/media/platform/seco-cec/seco-cec.h +++ b/drivers/media/platform/seco-cec/seco-cec.h | |||
| @@ -106,7 +106,7 @@ | |||
| 106 | #define SECOCEC_IR_COMMAND_MASK 0x007F | 106 | #define SECOCEC_IR_COMMAND_MASK 0x007F |
| 107 | #define SECOCEC_IR_COMMAND_SHL 0 | 107 | #define SECOCEC_IR_COMMAND_SHL 0 |
| 108 | #define SECOCEC_IR_ADDRESS_MASK 0x1F00 | 108 | #define SECOCEC_IR_ADDRESS_MASK 0x1F00 |
| 109 | #define SECOCEC_IR_ADDRESS_SHL 7 | 109 | #define SECOCEC_IR_ADDRESS_SHL 8 |
| 110 | #define SECOCEC_IR_TOGGLE_MASK 0x8000 | 110 | #define SECOCEC_IR_TOGGLE_MASK 0x8000 |
| 111 | #define SECOCEC_IR_TOGGLE_SHL 15 | 111 | #define SECOCEC_IR_TOGGLE_SHL 15 |
| 112 | 112 | ||
diff --git a/drivers/media/platform/sh_veu.c b/drivers/media/platform/sh_veu.c index 09ae64a0004c..d277cc674349 100644 --- a/drivers/media/platform/sh_veu.c +++ b/drivers/media/platform/sh_veu.c | |||
| @@ -273,13 +273,13 @@ static void sh_veu_process(struct sh_veu_dev *veu, | |||
| 273 | static void sh_veu_device_run(void *priv) | 273 | static void sh_veu_device_run(void *priv) |
| 274 | { | 274 | { |
| 275 | struct sh_veu_dev *veu = priv; | 275 | struct sh_veu_dev *veu = priv; |
| 276 | struct vb2_buffer *src_buf, *dst_buf; | 276 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 277 | 277 | ||
| 278 | src_buf = v4l2_m2m_next_src_buf(veu->m2m_ctx); | 278 | src_buf = v4l2_m2m_next_src_buf(veu->m2m_ctx); |
| 279 | dst_buf = v4l2_m2m_next_dst_buf(veu->m2m_ctx); | 279 | dst_buf = v4l2_m2m_next_dst_buf(veu->m2m_ctx); |
| 280 | 280 | ||
| 281 | if (src_buf && dst_buf) | 281 | if (src_buf && dst_buf) |
| 282 | sh_veu_process(veu, src_buf, dst_buf); | 282 | sh_veu_process(veu, &src_buf->vb2_buf, &dst_buf->vb2_buf); |
| 283 | } | 283 | } |
| 284 | 284 | ||
| 285 | /* ========== video ioctls ========== */ | 285 | /* ========== video ioctls ========== */ |
diff --git a/drivers/media/platform/soc_camera/Kconfig b/drivers/media/platform/soc_camera/Kconfig deleted file mode 100644 index 669d116b8f09..000000000000 --- a/drivers/media/platform/soc_camera/Kconfig +++ /dev/null | |||
| @@ -1,26 +0,0 @@ | |||
| 1 | config SOC_CAMERA | ||
| 2 | tristate "SoC camera support" | ||
| 3 | depends on VIDEO_V4L2 && HAS_DMA && I2C | ||
| 4 | select VIDEOBUF2_CORE | ||
| 5 | help | ||
| 6 | SoC Camera is a common API to several cameras, not connecting | ||
| 7 | over a bus like PCI or USB. For example some i2c camera connected | ||
| 8 | directly to the data bus of an SoC. | ||
| 9 | |||
| 10 | config SOC_CAMERA_SCALE_CROP | ||
| 11 | tristate | ||
| 12 | |||
| 13 | config SOC_CAMERA_PLATFORM | ||
| 14 | tristate "platform camera support" | ||
| 15 | depends on SOC_CAMERA | ||
| 16 | help | ||
| 17 | This is a generic SoC camera platform driver, useful for testing | ||
| 18 | |||
| 19 | config VIDEO_SH_MOBILE_CEU | ||
| 20 | tristate "SuperH Mobile CEU Interface driver" | ||
| 21 | depends on VIDEO_DEV && SOC_CAMERA && HAVE_CLK | ||
| 22 | depends on ARCH_SHMOBILE || COMPILE_TEST | ||
| 23 | select VIDEOBUF2_DMA_CONTIG | ||
| 24 | select SOC_CAMERA_SCALE_CROP | ||
| 25 | ---help--- | ||
| 26 | This is a v4l2 driver for the SuperH Mobile CEU Interface | ||
diff --git a/drivers/media/platform/soc_camera/Makefile b/drivers/media/platform/soc_camera/Makefile deleted file mode 100644 index 07a451e8b228..000000000000 --- a/drivers/media/platform/soc_camera/Makefile +++ /dev/null | |||
| @@ -1,9 +0,0 @@ | |||
| 1 | obj-$(CONFIG_SOC_CAMERA) += soc_camera.o soc_mediabus.o | ||
| 2 | obj-$(CONFIG_SOC_CAMERA_SCALE_CROP) += soc_scale_crop.o | ||
| 3 | |||
| 4 | # a platform subdevice driver stub, allowing to support cameras by adding a | ||
| 5 | # couple of callback functions to the board code | ||
| 6 | obj-$(CONFIG_SOC_CAMERA_PLATFORM) += soc_camera_platform.o | ||
| 7 | |||
| 8 | # soc-camera host drivers have to be linked after camera drivers | ||
| 9 | obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o | ||
diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c deleted file mode 100644 index 6803f744e307..000000000000 --- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c +++ /dev/null | |||
| @@ -1,1810 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 2 | /* | ||
| 3 | * V4L2 Driver for SuperH Mobile CEU interface | ||
| 4 | * | ||
| 5 | * Copyright (C) 2008 Magnus Damm | ||
| 6 | * | ||
| 7 | * Based on V4L2 Driver for PXA camera host - "pxa_camera.c", | ||
| 8 | * | ||
| 9 | * Copyright (C) 2006, Sascha Hauer, Pengutronix | ||
| 10 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/io.h> | ||
| 16 | #include <linux/completion.h> | ||
| 17 | #include <linux/delay.h> | ||
| 18 | #include <linux/dma-mapping.h> | ||
| 19 | #include <linux/err.h> | ||
| 20 | #include <linux/errno.h> | ||
| 21 | #include <linux/fs.h> | ||
| 22 | #include <linux/interrupt.h> | ||
| 23 | #include <linux/kernel.h> | ||
| 24 | #include <linux/mm.h> | ||
| 25 | #include <linux/moduleparam.h> | ||
| 26 | #include <linux/of.h> | ||
| 27 | #include <linux/time.h> | ||
| 28 | #include <linux/slab.h> | ||
| 29 | #include <linux/device.h> | ||
| 30 | #include <linux/platform_device.h> | ||
| 31 | #include <linux/videodev2.h> | ||
| 32 | #include <linux/pm_runtime.h> | ||
| 33 | #include <linux/sched.h> | ||
| 34 | |||
| 35 | #include <media/v4l2-async.h> | ||
| 36 | #include <media/v4l2-common.h> | ||
| 37 | #include <media/v4l2-dev.h> | ||
| 38 | #include <media/soc_camera.h> | ||
| 39 | #include <media/drv-intf/sh_mobile_ceu.h> | ||
| 40 | #include <media/videobuf2-dma-contig.h> | ||
| 41 | #include <media/v4l2-mediabus.h> | ||
| 42 | #include <media/drv-intf/soc_mediabus.h> | ||
| 43 | |||
| 44 | #include "soc_scale_crop.h" | ||
| 45 | |||
| 46 | /* register offsets for sh7722 / sh7723 */ | ||
| 47 | |||
| 48 | #define CAPSR 0x00 /* Capture start register */ | ||
| 49 | #define CAPCR 0x04 /* Capture control register */ | ||
| 50 | #define CAMCR 0x08 /* Capture interface control register */ | ||
| 51 | #define CMCYR 0x0c /* Capture interface cycle register */ | ||
| 52 | #define CAMOR 0x10 /* Capture interface offset register */ | ||
| 53 | #define CAPWR 0x14 /* Capture interface width register */ | ||
| 54 | #define CAIFR 0x18 /* Capture interface input format register */ | ||
| 55 | #define CSTCR 0x20 /* Camera strobe control register (<= sh7722) */ | ||
| 56 | #define CSECR 0x24 /* Camera strobe emission count register (<= sh7722) */ | ||
| 57 | #define CRCNTR 0x28 /* CEU register control register */ | ||
| 58 | #define CRCMPR 0x2c /* CEU register forcible control register */ | ||
| 59 | #define CFLCR 0x30 /* Capture filter control register */ | ||
| 60 | #define CFSZR 0x34 /* Capture filter size clip register */ | ||
| 61 | #define CDWDR 0x38 /* Capture destination width register */ | ||
| 62 | #define CDAYR 0x3c /* Capture data address Y register */ | ||
| 63 | #define CDACR 0x40 /* Capture data address C register */ | ||
| 64 | #define CDBYR 0x44 /* Capture data bottom-field address Y register */ | ||
| 65 | #define CDBCR 0x48 /* Capture data bottom-field address C register */ | ||
| 66 | #define CBDSR 0x4c /* Capture bundle destination size register */ | ||
| 67 | #define CFWCR 0x5c /* Firewall operation control register */ | ||
| 68 | #define CLFCR 0x60 /* Capture low-pass filter control register */ | ||
| 69 | #define CDOCR 0x64 /* Capture data output control register */ | ||
| 70 | #define CDDCR 0x68 /* Capture data complexity level register */ | ||
| 71 | #define CDDAR 0x6c /* Capture data complexity level address register */ | ||
| 72 | #define CEIER 0x70 /* Capture event interrupt enable register */ | ||
| 73 | #define CETCR 0x74 /* Capture event flag clear register */ | ||
| 74 | #define CSTSR 0x7c /* Capture status register */ | ||
| 75 | #define CSRTR 0x80 /* Capture software reset register */ | ||
| 76 | #define CDSSR 0x84 /* Capture data size register */ | ||
| 77 | #define CDAYR2 0x90 /* Capture data address Y register 2 */ | ||
| 78 | #define CDACR2 0x94 /* Capture data address C register 2 */ | ||
| 79 | #define CDBYR2 0x98 /* Capture data bottom-field address Y register 2 */ | ||
| 80 | #define CDBCR2 0x9c /* Capture data bottom-field address C register 2 */ | ||
| 81 | |||
| 82 | #undef DEBUG_GEOMETRY | ||
| 83 | #ifdef DEBUG_GEOMETRY | ||
| 84 | #define dev_geo dev_info | ||
| 85 | #else | ||
| 86 | #define dev_geo dev_dbg | ||
| 87 | #endif | ||
| 88 | |||
| 89 | /* per video frame buffer */ | ||
| 90 | struct sh_mobile_ceu_buffer { | ||
| 91 | struct vb2_v4l2_buffer vb; /* v4l buffer must be first */ | ||
| 92 | struct list_head queue; | ||
| 93 | }; | ||
| 94 | |||
| 95 | struct sh_mobile_ceu_dev { | ||
| 96 | struct soc_camera_host ici; | ||
| 97 | |||
| 98 | unsigned int irq; | ||
| 99 | void __iomem *base; | ||
| 100 | size_t video_limit; | ||
| 101 | size_t buf_total; | ||
| 102 | |||
| 103 | spinlock_t lock; /* Protects video buffer lists */ | ||
| 104 | struct list_head capture; | ||
| 105 | struct vb2_v4l2_buffer *active; | ||
| 106 | |||
| 107 | struct sh_mobile_ceu_info *pdata; | ||
| 108 | struct completion complete; | ||
| 109 | |||
| 110 | u32 cflcr; | ||
| 111 | |||
| 112 | /* static max sizes either from platform data or default */ | ||
| 113 | int max_width; | ||
| 114 | int max_height; | ||
| 115 | |||
| 116 | enum v4l2_field field; | ||
| 117 | int sequence; | ||
| 118 | unsigned long flags; | ||
| 119 | |||
| 120 | unsigned int image_mode:1; | ||
| 121 | unsigned int is_16bit:1; | ||
| 122 | unsigned int frozen:1; | ||
| 123 | }; | ||
| 124 | |||
| 125 | struct sh_mobile_ceu_cam { | ||
| 126 | /* CEU offsets within the camera output, before the CEU scaler */ | ||
| 127 | unsigned int ceu_left; | ||
| 128 | unsigned int ceu_top; | ||
| 129 | /* Client output, as seen by the CEU */ | ||
| 130 | unsigned int width; | ||
| 131 | unsigned int height; | ||
| 132 | /* | ||
| 133 | * User window from S_SELECTION / G_SELECTION, produced by client cropping and | ||
| 134 | * scaling, CEU scaling and CEU cropping, mapped back onto the client | ||
| 135 | * input window | ||
| 136 | */ | ||
| 137 | struct v4l2_rect subrect; | ||
| 138 | /* Camera cropping rectangle */ | ||
| 139 | struct v4l2_rect rect; | ||
| 140 | const struct soc_mbus_pixelfmt *extra_fmt; | ||
| 141 | u32 code; | ||
| 142 | }; | ||
| 143 | |||
| 144 | static struct sh_mobile_ceu_buffer *to_ceu_vb(struct vb2_v4l2_buffer *vbuf) | ||
| 145 | { | ||
| 146 | return container_of(vbuf, struct sh_mobile_ceu_buffer, vb); | ||
| 147 | } | ||
| 148 | |||
| 149 | static void ceu_write(struct sh_mobile_ceu_dev *priv, | ||
| 150 | unsigned long reg_offs, u32 data) | ||
| 151 | { | ||
| 152 | iowrite32(data, priv->base + reg_offs); | ||
| 153 | } | ||
| 154 | |||
| 155 | static u32 ceu_read(struct sh_mobile_ceu_dev *priv, unsigned long reg_offs) | ||
| 156 | { | ||
| 157 | return ioread32(priv->base + reg_offs); | ||
| 158 | } | ||
| 159 | |||
| 160 | static int sh_mobile_ceu_soft_reset(struct sh_mobile_ceu_dev *pcdev) | ||
| 161 | { | ||
| 162 | int i, success = 0; | ||
| 163 | |||
| 164 | ceu_write(pcdev, CAPSR, 1 << 16); /* reset */ | ||
| 165 | |||
| 166 | /* wait CSTSR.CPTON bit */ | ||
| 167 | for (i = 0; i < 1000; i++) { | ||
| 168 | if (!(ceu_read(pcdev, CSTSR) & 1)) { | ||
| 169 | success++; | ||
| 170 | break; | ||
| 171 | } | ||
| 172 | udelay(1); | ||
| 173 | } | ||
| 174 | |||
| 175 | /* wait CAPSR.CPKIL bit */ | ||
| 176 | for (i = 0; i < 1000; i++) { | ||
| 177 | if (!(ceu_read(pcdev, CAPSR) & (1 << 16))) { | ||
| 178 | success++; | ||
| 179 | break; | ||
| 180 | } | ||
| 181 | udelay(1); | ||
| 182 | } | ||
| 183 | |||
| 184 | if (2 != success) { | ||
| 185 | dev_warn(pcdev->ici.v4l2_dev.dev, "soft reset time out\n"); | ||
| 186 | return -EIO; | ||
| 187 | } | ||
| 188 | |||
| 189 | return 0; | ||
| 190 | } | ||
| 191 | |||
| 192 | /* | ||
| 193 | * Videobuf operations | ||
| 194 | */ | ||
| 195 | |||
| 196 | /* | ||
| 197 | * .queue_setup() is called to check, whether the driver can accept the | ||
| 198 | * requested number of buffers and to fill in plane sizes | ||
| 199 | * for the current frame format if required | ||
| 200 | */ | ||
| 201 | static int sh_mobile_ceu_videobuf_setup(struct vb2_queue *vq, | ||
| 202 | unsigned int *count, unsigned int *num_planes, | ||
| 203 | unsigned int sizes[], struct device *alloc_devs[]) | ||
| 204 | { | ||
| 205 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | ||
| 206 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 207 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 208 | |||
| 209 | if (!vq->num_buffers) | ||
| 210 | pcdev->sequence = 0; | ||
| 211 | |||
| 212 | if (!*count) | ||
| 213 | *count = 2; | ||
| 214 | |||
| 215 | /* Called from VIDIOC_REQBUFS or in compatibility mode */ | ||
| 216 | if (!*num_planes) | ||
| 217 | sizes[0] = icd->sizeimage; | ||
| 218 | else if (sizes[0] < icd->sizeimage) | ||
| 219 | return -EINVAL; | ||
| 220 | |||
| 221 | /* If *num_planes != 0, we have already verified *count. */ | ||
| 222 | if (pcdev->video_limit) { | ||
| 223 | size_t size = PAGE_ALIGN(sizes[0]) * *count; | ||
| 224 | |||
| 225 | if (size + pcdev->buf_total > pcdev->video_limit) | ||
| 226 | *count = (pcdev->video_limit - pcdev->buf_total) / | ||
| 227 | PAGE_ALIGN(sizes[0]); | ||
| 228 | } | ||
| 229 | |||
| 230 | *num_planes = 1; | ||
| 231 | |||
| 232 | dev_dbg(icd->parent, "count=%d, size=%u\n", *count, sizes[0]); | ||
| 233 | |||
| 234 | return 0; | ||
| 235 | } | ||
| 236 | |||
| 237 | #define CEU_CETCR_MAGIC 0x0317f313 /* acknowledge magical interrupt sources */ | ||
| 238 | #define CEU_CETCR_IGRW (1 << 4) /* prohibited register access interrupt bit */ | ||
| 239 | #define CEU_CEIER_CPEIE (1 << 0) /* one-frame capture end interrupt */ | ||
| 240 | #define CEU_CEIER_VBP (1 << 20) /* vbp error */ | ||
| 241 | #define CEU_CAPCR_CTNCP (1 << 16) /* continuous capture mode (if set) */ | ||
| 242 | #define CEU_CEIER_MASK (CEU_CEIER_CPEIE | CEU_CEIER_VBP) | ||
| 243 | |||
| 244 | |||
| 245 | /* | ||
| 246 | * return value doesn't reflex the success/failure to queue the new buffer, | ||
| 247 | * but rather the status of the previous buffer. | ||
| 248 | */ | ||
| 249 | static int sh_mobile_ceu_capture(struct sh_mobile_ceu_dev *pcdev) | ||
| 250 | { | ||
| 251 | struct soc_camera_device *icd = pcdev->ici.icd; | ||
| 252 | dma_addr_t phys_addr_top, phys_addr_bottom; | ||
| 253 | unsigned long top1, top2; | ||
| 254 | unsigned long bottom1, bottom2; | ||
| 255 | u32 status; | ||
| 256 | bool planar; | ||
| 257 | int ret = 0; | ||
| 258 | |||
| 259 | /* | ||
| 260 | * The hardware is _very_ picky about this sequence. Especially | ||
| 261 | * the CEU_CETCR_MAGIC value. It seems like we need to acknowledge | ||
| 262 | * several not-so-well documented interrupt sources in CETCR. | ||
| 263 | */ | ||
| 264 | ceu_write(pcdev, CEIER, ceu_read(pcdev, CEIER) & ~CEU_CEIER_MASK); | ||
| 265 | status = ceu_read(pcdev, CETCR); | ||
| 266 | ceu_write(pcdev, CETCR, ~status & CEU_CETCR_MAGIC); | ||
| 267 | if (!pcdev->frozen) | ||
| 268 | ceu_write(pcdev, CEIER, ceu_read(pcdev, CEIER) | CEU_CEIER_MASK); | ||
| 269 | ceu_write(pcdev, CAPCR, ceu_read(pcdev, CAPCR) & ~CEU_CAPCR_CTNCP); | ||
| 270 | ceu_write(pcdev, CETCR, CEU_CETCR_MAGIC ^ CEU_CETCR_IGRW); | ||
| 271 | |||
| 272 | /* | ||
| 273 | * When a VBP interrupt occurs, a capture end interrupt does not occur | ||
| 274 | * and the image of that frame is not captured correctly. So, soft reset | ||
| 275 | * is needed here. | ||
| 276 | */ | ||
| 277 | if (status & CEU_CEIER_VBP) { | ||
| 278 | sh_mobile_ceu_soft_reset(pcdev); | ||
| 279 | ret = -EIO; | ||
| 280 | } | ||
| 281 | |||
| 282 | if (pcdev->frozen) { | ||
| 283 | complete(&pcdev->complete); | ||
| 284 | return ret; | ||
| 285 | } | ||
| 286 | |||
| 287 | if (!pcdev->active) | ||
| 288 | return ret; | ||
| 289 | |||
| 290 | if (V4L2_FIELD_INTERLACED_BT == pcdev->field) { | ||
| 291 | top1 = CDBYR; | ||
| 292 | top2 = CDBCR; | ||
| 293 | bottom1 = CDAYR; | ||
| 294 | bottom2 = CDACR; | ||
| 295 | } else { | ||
| 296 | top1 = CDAYR; | ||
| 297 | top2 = CDACR; | ||
| 298 | bottom1 = CDBYR; | ||
| 299 | bottom2 = CDBCR; | ||
| 300 | } | ||
| 301 | |||
| 302 | phys_addr_top = | ||
| 303 | vb2_dma_contig_plane_dma_addr(&pcdev->active->vb2_buf, 0); | ||
| 304 | |||
| 305 | switch (icd->current_fmt->host_fmt->fourcc) { | ||
| 306 | case V4L2_PIX_FMT_NV12: | ||
| 307 | case V4L2_PIX_FMT_NV21: | ||
| 308 | case V4L2_PIX_FMT_NV16: | ||
| 309 | case V4L2_PIX_FMT_NV61: | ||
| 310 | planar = true; | ||
| 311 | break; | ||
| 312 | default: | ||
| 313 | planar = false; | ||
| 314 | } | ||
| 315 | |||
| 316 | ceu_write(pcdev, top1, phys_addr_top); | ||
| 317 | if (V4L2_FIELD_NONE != pcdev->field) { | ||
| 318 | phys_addr_bottom = phys_addr_top + icd->bytesperline; | ||
| 319 | ceu_write(pcdev, bottom1, phys_addr_bottom); | ||
| 320 | } | ||
| 321 | |||
| 322 | if (planar) { | ||
| 323 | phys_addr_top += icd->bytesperline * icd->user_height; | ||
| 324 | ceu_write(pcdev, top2, phys_addr_top); | ||
| 325 | if (V4L2_FIELD_NONE != pcdev->field) { | ||
| 326 | phys_addr_bottom = phys_addr_top + icd->bytesperline; | ||
| 327 | ceu_write(pcdev, bottom2, phys_addr_bottom); | ||
| 328 | } | ||
| 329 | } | ||
| 330 | |||
| 331 | ceu_write(pcdev, CAPSR, 0x1); /* start capture */ | ||
| 332 | |||
| 333 | return ret; | ||
| 334 | } | ||
| 335 | |||
| 336 | static int sh_mobile_ceu_videobuf_prepare(struct vb2_buffer *vb) | ||
| 337 | { | ||
| 338 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | ||
| 339 | struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vbuf); | ||
| 340 | |||
| 341 | /* Added list head initialization on alloc */ | ||
| 342 | WARN(!list_empty(&buf->queue), "Buffer %p on queue!\n", vb); | ||
| 343 | |||
| 344 | return 0; | ||
| 345 | } | ||
| 346 | |||
| 347 | static void sh_mobile_ceu_videobuf_queue(struct vb2_buffer *vb) | ||
| 348 | { | ||
| 349 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | ||
| 350 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | ||
| 351 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 352 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 353 | struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vbuf); | ||
| 354 | unsigned long size; | ||
| 355 | |||
| 356 | size = icd->sizeimage; | ||
| 357 | |||
| 358 | if (vb2_plane_size(vb, 0) < size) { | ||
| 359 | dev_err(icd->parent, "Buffer #%d too small (%lu < %lu)\n", | ||
| 360 | vb->index, vb2_plane_size(vb, 0), size); | ||
| 361 | goto error; | ||
| 362 | } | ||
| 363 | |||
| 364 | vb2_set_plane_payload(vb, 0, size); | ||
| 365 | |||
| 366 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%p %lu\n", __func__, | ||
| 367 | vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0)); | ||
| 368 | |||
| 369 | #ifdef DEBUG | ||
| 370 | /* | ||
| 371 | * This can be useful if you want to see if we actually fill | ||
| 372 | * the buffer with something | ||
| 373 | */ | ||
| 374 | if (vb2_plane_vaddr(vb, 0)) | ||
| 375 | memset(vb2_plane_vaddr(vb, 0), 0xaa, vb2_get_plane_payload(vb, 0)); | ||
| 376 | #endif | ||
| 377 | |||
| 378 | spin_lock_irq(&pcdev->lock); | ||
| 379 | list_add_tail(&buf->queue, &pcdev->capture); | ||
| 380 | |||
| 381 | if (!pcdev->active) { | ||
| 382 | /* | ||
| 383 | * Because there were no active buffer at this moment, | ||
| 384 | * we are not interested in the return value of | ||
| 385 | * sh_mobile_ceu_capture here. | ||
| 386 | */ | ||
| 387 | pcdev->active = vbuf; | ||
| 388 | sh_mobile_ceu_capture(pcdev); | ||
| 389 | } | ||
| 390 | spin_unlock_irq(&pcdev->lock); | ||
| 391 | |||
| 392 | return; | ||
| 393 | |||
| 394 | error: | ||
| 395 | vb2_buffer_done(vb, VB2_BUF_STATE_ERROR); | ||
| 396 | } | ||
| 397 | |||
| 398 | static void sh_mobile_ceu_videobuf_release(struct vb2_buffer *vb) | ||
| 399 | { | ||
| 400 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | ||
| 401 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | ||
| 402 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 403 | struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vbuf); | ||
| 404 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 405 | |||
| 406 | spin_lock_irq(&pcdev->lock); | ||
| 407 | |||
| 408 | if (pcdev->active == vbuf) { | ||
| 409 | /* disable capture (release DMA buffer), reset */ | ||
| 410 | ceu_write(pcdev, CAPSR, 1 << 16); | ||
| 411 | pcdev->active = NULL; | ||
| 412 | } | ||
| 413 | |||
| 414 | /* | ||
| 415 | * Doesn't hurt also if the list is empty, but it hurts, if queuing the | ||
| 416 | * buffer failed, and .buf_init() hasn't been called | ||
| 417 | */ | ||
| 418 | if (buf->queue.next) | ||
| 419 | list_del_init(&buf->queue); | ||
| 420 | |||
| 421 | pcdev->buf_total -= PAGE_ALIGN(vb2_plane_size(vb, 0)); | ||
| 422 | dev_dbg(icd->parent, "%s() %zu bytes buffers\n", __func__, | ||
| 423 | pcdev->buf_total); | ||
| 424 | |||
| 425 | spin_unlock_irq(&pcdev->lock); | ||
| 426 | } | ||
| 427 | |||
| 428 | static int sh_mobile_ceu_videobuf_init(struct vb2_buffer *vb) | ||
| 429 | { | ||
| 430 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | ||
| 431 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | ||
| 432 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 433 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 434 | |||
| 435 | pcdev->buf_total += PAGE_ALIGN(vb2_plane_size(vb, 0)); | ||
| 436 | dev_dbg(icd->parent, "%s() %zu bytes buffers\n", __func__, | ||
| 437 | pcdev->buf_total); | ||
| 438 | |||
| 439 | /* This is for locking debugging only */ | ||
| 440 | INIT_LIST_HEAD(&to_ceu_vb(vbuf)->queue); | ||
| 441 | return 0; | ||
| 442 | } | ||
| 443 | |||
| 444 | static void sh_mobile_ceu_stop_streaming(struct vb2_queue *q) | ||
| 445 | { | ||
| 446 | struct soc_camera_device *icd = soc_camera_from_vb2q(q); | ||
| 447 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 448 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 449 | struct list_head *buf_head, *tmp; | ||
| 450 | struct vb2_v4l2_buffer *vbuf; | ||
| 451 | |||
| 452 | spin_lock_irq(&pcdev->lock); | ||
| 453 | |||
| 454 | pcdev->active = NULL; | ||
| 455 | |||
| 456 | list_for_each_safe(buf_head, tmp, &pcdev->capture) { | ||
| 457 | vbuf = &list_entry(buf_head, struct sh_mobile_ceu_buffer, | ||
| 458 | queue)->vb; | ||
| 459 | vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE); | ||
| 460 | list_del_init(buf_head); | ||
| 461 | } | ||
| 462 | |||
| 463 | spin_unlock_irq(&pcdev->lock); | ||
| 464 | |||
| 465 | sh_mobile_ceu_soft_reset(pcdev); | ||
| 466 | } | ||
| 467 | |||
| 468 | static const struct vb2_ops sh_mobile_ceu_videobuf_ops = { | ||
| 469 | .queue_setup = sh_mobile_ceu_videobuf_setup, | ||
| 470 | .buf_prepare = sh_mobile_ceu_videobuf_prepare, | ||
| 471 | .buf_queue = sh_mobile_ceu_videobuf_queue, | ||
| 472 | .buf_cleanup = sh_mobile_ceu_videobuf_release, | ||
| 473 | .buf_init = sh_mobile_ceu_videobuf_init, | ||
| 474 | .wait_prepare = vb2_ops_wait_prepare, | ||
| 475 | .wait_finish = vb2_ops_wait_finish, | ||
| 476 | .stop_streaming = sh_mobile_ceu_stop_streaming, | ||
| 477 | }; | ||
| 478 | |||
| 479 | static irqreturn_t sh_mobile_ceu_irq(int irq, void *data) | ||
| 480 | { | ||
| 481 | struct sh_mobile_ceu_dev *pcdev = data; | ||
| 482 | struct vb2_v4l2_buffer *vbuf; | ||
| 483 | int ret; | ||
| 484 | |||
| 485 | spin_lock(&pcdev->lock); | ||
| 486 | |||
| 487 | vbuf = pcdev->active; | ||
| 488 | if (!vbuf) | ||
| 489 | /* Stale interrupt from a released buffer */ | ||
| 490 | goto out; | ||
| 491 | |||
| 492 | list_del_init(&to_ceu_vb(vbuf)->queue); | ||
| 493 | |||
| 494 | if (!list_empty(&pcdev->capture)) | ||
| 495 | pcdev->active = &list_entry(pcdev->capture.next, | ||
| 496 | struct sh_mobile_ceu_buffer, queue)->vb; | ||
| 497 | else | ||
| 498 | pcdev->active = NULL; | ||
| 499 | |||
| 500 | ret = sh_mobile_ceu_capture(pcdev); | ||
| 501 | vbuf->vb2_buf.timestamp = ktime_get_ns(); | ||
| 502 | if (!ret) { | ||
| 503 | vbuf->field = pcdev->field; | ||
| 504 | vbuf->sequence = pcdev->sequence++; | ||
| 505 | } | ||
| 506 | vb2_buffer_done(&vbuf->vb2_buf, | ||
| 507 | ret < 0 ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE); | ||
| 508 | |||
| 509 | out: | ||
| 510 | spin_unlock(&pcdev->lock); | ||
| 511 | |||
| 512 | return IRQ_HANDLED; | ||
| 513 | } | ||
| 514 | |||
| 515 | static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) | ||
| 516 | { | ||
| 517 | dev_info(icd->parent, | ||
| 518 | "SuperH Mobile CEU driver attached to camera %d\n", | ||
| 519 | icd->devnum); | ||
| 520 | |||
| 521 | return 0; | ||
| 522 | } | ||
| 523 | |||
| 524 | static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd) | ||
| 525 | { | ||
| 526 | dev_info(icd->parent, | ||
| 527 | "SuperH Mobile CEU driver detached from camera %d\n", | ||
| 528 | icd->devnum); | ||
| 529 | } | ||
| 530 | |||
| 531 | /* Called with .host_lock held */ | ||
| 532 | static int sh_mobile_ceu_clock_start(struct soc_camera_host *ici) | ||
| 533 | { | ||
| 534 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 535 | |||
| 536 | pm_runtime_get_sync(ici->v4l2_dev.dev); | ||
| 537 | |||
| 538 | pcdev->buf_total = 0; | ||
| 539 | |||
| 540 | sh_mobile_ceu_soft_reset(pcdev); | ||
| 541 | |||
| 542 | return 0; | ||
| 543 | } | ||
| 544 | |||
| 545 | /* Called with .host_lock held */ | ||
| 546 | static void sh_mobile_ceu_clock_stop(struct soc_camera_host *ici) | ||
| 547 | { | ||
| 548 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 549 | |||
| 550 | /* disable capture, disable interrupts */ | ||
| 551 | ceu_write(pcdev, CEIER, 0); | ||
| 552 | sh_mobile_ceu_soft_reset(pcdev); | ||
| 553 | |||
| 554 | /* make sure active buffer is canceled */ | ||
| 555 | spin_lock_irq(&pcdev->lock); | ||
| 556 | if (pcdev->active) { | ||
| 557 | list_del_init(&to_ceu_vb(pcdev->active)->queue); | ||
| 558 | vb2_buffer_done(&pcdev->active->vb2_buf, VB2_BUF_STATE_ERROR); | ||
| 559 | pcdev->active = NULL; | ||
| 560 | } | ||
| 561 | spin_unlock_irq(&pcdev->lock); | ||
| 562 | |||
| 563 | pm_runtime_put(ici->v4l2_dev.dev); | ||
| 564 | } | ||
| 565 | |||
| 566 | /* | ||
| 567 | * See chapter 29.4.12 "Capture Filter Control Register (CFLCR)" | ||
| 568 | * in SH7722 Hardware Manual | ||
| 569 | */ | ||
| 570 | static unsigned int size_dst(unsigned int src, unsigned int scale) | ||
| 571 | { | ||
| 572 | unsigned int mant_pre = scale >> 12; | ||
| 573 | if (!src || !scale) | ||
| 574 | return src; | ||
| 575 | return ((mant_pre + 2 * (src - 1)) / (2 * mant_pre) - 1) * | ||
| 576 | mant_pre * 4096 / scale + 1; | ||
| 577 | } | ||
| 578 | |||
| 579 | static u16 calc_scale(unsigned int src, unsigned int *dst) | ||
| 580 | { | ||
| 581 | u16 scale; | ||
| 582 | |||
| 583 | if (src == *dst) | ||
| 584 | return 0; | ||
| 585 | |||
| 586 | scale = (src * 4096 / *dst) & ~7; | ||
| 587 | |||
| 588 | while (scale > 4096 && size_dst(src, scale) < *dst) | ||
| 589 | scale -= 8; | ||
| 590 | |||
| 591 | *dst = size_dst(src, scale); | ||
| 592 | |||
| 593 | return scale; | ||
| 594 | } | ||
| 595 | |||
| 596 | /* rect is guaranteed to not exceed the scaled camera rectangle */ | ||
| 597 | static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd) | ||
| 598 | { | ||
| 599 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 600 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | ||
| 601 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 602 | unsigned int height, width, cdwdr_width, in_width, in_height; | ||
| 603 | unsigned int left_offset, top_offset; | ||
| 604 | u32 camor; | ||
| 605 | |||
| 606 | dev_geo(icd->parent, "Crop %ux%u@%u:%u\n", | ||
| 607 | icd->user_width, icd->user_height, cam->ceu_left, cam->ceu_top); | ||
| 608 | |||
| 609 | left_offset = cam->ceu_left; | ||
| 610 | top_offset = cam->ceu_top; | ||
| 611 | |||
| 612 | WARN_ON(icd->user_width & 3 || icd->user_height & 3); | ||
| 613 | |||
| 614 | width = icd->user_width; | ||
| 615 | |||
| 616 | if (pcdev->image_mode) { | ||
| 617 | in_width = cam->width; | ||
| 618 | if (!pcdev->is_16bit) { | ||
| 619 | in_width *= 2; | ||
| 620 | left_offset *= 2; | ||
| 621 | } | ||
| 622 | } else { | ||
| 623 | unsigned int w_factor; | ||
| 624 | |||
| 625 | switch (icd->current_fmt->host_fmt->packing) { | ||
| 626 | case SOC_MBUS_PACKING_2X8_PADHI: | ||
| 627 | w_factor = 2; | ||
| 628 | break; | ||
| 629 | default: | ||
| 630 | w_factor = 1; | ||
| 631 | } | ||
| 632 | |||
| 633 | in_width = cam->width * w_factor; | ||
| 634 | left_offset *= w_factor; | ||
| 635 | } | ||
| 636 | |||
| 637 | cdwdr_width = icd->bytesperline; | ||
| 638 | |||
| 639 | height = icd->user_height; | ||
| 640 | in_height = cam->height; | ||
| 641 | if (V4L2_FIELD_NONE != pcdev->field) { | ||
| 642 | height = (height / 2) & ~3; | ||
| 643 | in_height /= 2; | ||
| 644 | top_offset /= 2; | ||
| 645 | cdwdr_width *= 2; | ||
| 646 | } | ||
| 647 | |||
| 648 | /* Set CAMOR, CAPWR, CFSZR, take care of CDWDR */ | ||
| 649 | camor = left_offset | (top_offset << 16); | ||
| 650 | |||
| 651 | dev_geo(icd->parent, | ||
| 652 | "CAMOR 0x%x, CAPWR 0x%x, CFSZR 0x%x, CDWDR 0x%x\n", camor, | ||
| 653 | (in_height << 16) | in_width, (height << 16) | width, | ||
| 654 | cdwdr_width); | ||
| 655 | |||
| 656 | ceu_write(pcdev, CAMOR, camor); | ||
| 657 | ceu_write(pcdev, CAPWR, (in_height << 16) | in_width); | ||
| 658 | /* CFSZR clipping is applied _after_ the scaling filter (CFLCR) */ | ||
| 659 | ceu_write(pcdev, CFSZR, (height << 16) | width); | ||
| 660 | ceu_write(pcdev, CDWDR, cdwdr_width); | ||
| 661 | } | ||
| 662 | |||
| 663 | static u32 capture_save_reset(struct sh_mobile_ceu_dev *pcdev) | ||
| 664 | { | ||
| 665 | u32 capsr = ceu_read(pcdev, CAPSR); | ||
| 666 | ceu_write(pcdev, CAPSR, 1 << 16); /* reset, stop capture */ | ||
| 667 | return capsr; | ||
| 668 | } | ||
| 669 | |||
| 670 | static void capture_restore(struct sh_mobile_ceu_dev *pcdev, u32 capsr) | ||
| 671 | { | ||
| 672 | unsigned long timeout = jiffies + 10 * HZ; | ||
| 673 | |||
| 674 | /* | ||
| 675 | * Wait until the end of the current frame. It can take a long time, | ||
| 676 | * but if it has been aborted by a CAPSR reset, it shoule exit sooner. | ||
| 677 | */ | ||
| 678 | while ((ceu_read(pcdev, CSTSR) & 1) && time_before(jiffies, timeout)) | ||
| 679 | msleep(1); | ||
| 680 | |||
| 681 | if (time_after(jiffies, timeout)) { | ||
| 682 | dev_err(pcdev->ici.v4l2_dev.dev, | ||
| 683 | "Timeout waiting for frame end! Interface problem?\n"); | ||
| 684 | return; | ||
| 685 | } | ||
| 686 | |||
| 687 | /* Wait until reset clears, this shall not hang... */ | ||
| 688 | while (ceu_read(pcdev, CAPSR) & (1 << 16)) | ||
| 689 | udelay(10); | ||
| 690 | |||
| 691 | /* Anything to restore? */ | ||
| 692 | if (capsr & ~(1 << 16)) | ||
| 693 | ceu_write(pcdev, CAPSR, capsr); | ||
| 694 | } | ||
| 695 | |||
| 696 | #define CEU_BUS_FLAGS (V4L2_MBUS_MASTER | \ | ||
| 697 | V4L2_MBUS_PCLK_SAMPLE_RISING | \ | ||
| 698 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \ | ||
| 699 | V4L2_MBUS_HSYNC_ACTIVE_LOW | \ | ||
| 700 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | \ | ||
| 701 | V4L2_MBUS_VSYNC_ACTIVE_LOW | \ | ||
| 702 | V4L2_MBUS_DATA_ACTIVE_HIGH) | ||
| 703 | |||
| 704 | /* Capture is not running, no interrupts, no locking needed */ | ||
| 705 | static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd) | ||
| 706 | { | ||
| 707 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 708 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 709 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 710 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | ||
| 711 | struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; | ||
| 712 | unsigned long value, common_flags = CEU_BUS_FLAGS; | ||
| 713 | u32 capsr = capture_save_reset(pcdev); | ||
| 714 | unsigned int yuv_lineskip; | ||
| 715 | int ret; | ||
| 716 | |||
| 717 | /* | ||
| 718 | * If the client doesn't implement g_mbus_config, we just use our | ||
| 719 | * platform data | ||
| 720 | */ | ||
| 721 | ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg); | ||
| 722 | if (!ret) { | ||
| 723 | common_flags = soc_mbus_config_compatible(&cfg, | ||
| 724 | common_flags); | ||
| 725 | if (!common_flags) | ||
| 726 | return -EINVAL; | ||
| 727 | } else if (ret != -ENOIOCTLCMD) { | ||
| 728 | return ret; | ||
| 729 | } | ||
| 730 | |||
| 731 | /* Make choises, based on platform preferences */ | ||
| 732 | if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) && | ||
| 733 | (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) { | ||
| 734 | if (pcdev->flags & SH_CEU_FLAG_HSYNC_LOW) | ||
| 735 | common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH; | ||
| 736 | else | ||
| 737 | common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW; | ||
| 738 | } | ||
| 739 | |||
| 740 | if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) && | ||
| 741 | (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) { | ||
| 742 | if (pcdev->flags & SH_CEU_FLAG_VSYNC_LOW) | ||
| 743 | common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH; | ||
| 744 | else | ||
| 745 | common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW; | ||
| 746 | } | ||
| 747 | |||
| 748 | cfg.flags = common_flags; | ||
| 749 | ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg); | ||
| 750 | if (ret < 0 && ret != -ENOIOCTLCMD) | ||
| 751 | return ret; | ||
| 752 | |||
| 753 | if (icd->current_fmt->host_fmt->bits_per_sample > 8) | ||
| 754 | pcdev->is_16bit = 1; | ||
| 755 | else | ||
| 756 | pcdev->is_16bit = 0; | ||
| 757 | |||
| 758 | ceu_write(pcdev, CRCNTR, 0); | ||
| 759 | ceu_write(pcdev, CRCMPR, 0); | ||
| 760 | |||
| 761 | value = 0x00000010; /* data fetch by default */ | ||
| 762 | yuv_lineskip = 0x10; | ||
| 763 | |||
| 764 | switch (icd->current_fmt->host_fmt->fourcc) { | ||
| 765 | case V4L2_PIX_FMT_NV12: | ||
| 766 | case V4L2_PIX_FMT_NV21: | ||
| 767 | /* convert 4:2:2 -> 4:2:0 */ | ||
| 768 | yuv_lineskip = 0; /* skip for NV12/21, no skip for NV16/61 */ | ||
| 769 | /* fall-through */ | ||
| 770 | case V4L2_PIX_FMT_NV16: | ||
| 771 | case V4L2_PIX_FMT_NV61: | ||
| 772 | switch (cam->code) { | ||
| 773 | case MEDIA_BUS_FMT_UYVY8_2X8: | ||
| 774 | value = 0x00000000; /* Cb0, Y0, Cr0, Y1 */ | ||
| 775 | break; | ||
| 776 | case MEDIA_BUS_FMT_VYUY8_2X8: | ||
| 777 | value = 0x00000100; /* Cr0, Y0, Cb0, Y1 */ | ||
| 778 | break; | ||
| 779 | case MEDIA_BUS_FMT_YUYV8_2X8: | ||
| 780 | value = 0x00000200; /* Y0, Cb0, Y1, Cr0 */ | ||
| 781 | break; | ||
| 782 | case MEDIA_BUS_FMT_YVYU8_2X8: | ||
| 783 | value = 0x00000300; /* Y0, Cr0, Y1, Cb0 */ | ||
| 784 | break; | ||
| 785 | default: | ||
| 786 | BUG(); | ||
| 787 | } | ||
| 788 | } | ||
| 789 | |||
| 790 | if (icd->current_fmt->host_fmt->fourcc == V4L2_PIX_FMT_NV21 || | ||
| 791 | icd->current_fmt->host_fmt->fourcc == V4L2_PIX_FMT_NV61) | ||
| 792 | value ^= 0x00000100; /* swap U, V to change from NV1x->NVx1 */ | ||
| 793 | |||
| 794 | value |= common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW ? 1 << 1 : 0; | ||
| 795 | value |= common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW ? 1 << 0 : 0; | ||
| 796 | |||
| 797 | if (pcdev->is_16bit) | ||
| 798 | value |= 1 << 12; | ||
| 799 | else if (pcdev->flags & SH_CEU_FLAG_LOWER_8BIT) | ||
| 800 | value |= 2 << 12; | ||
| 801 | |||
| 802 | ceu_write(pcdev, CAMCR, value); | ||
| 803 | |||
| 804 | ceu_write(pcdev, CAPCR, 0x00300000); | ||
| 805 | |||
| 806 | switch (pcdev->field) { | ||
| 807 | case V4L2_FIELD_INTERLACED_TB: | ||
| 808 | value = 0x101; | ||
| 809 | break; | ||
| 810 | case V4L2_FIELD_INTERLACED_BT: | ||
| 811 | value = 0x102; | ||
| 812 | break; | ||
| 813 | default: | ||
| 814 | value = 0; | ||
| 815 | break; | ||
| 816 | } | ||
| 817 | ceu_write(pcdev, CAIFR, value); | ||
| 818 | |||
| 819 | sh_mobile_ceu_set_rect(icd); | ||
| 820 | mdelay(1); | ||
| 821 | |||
| 822 | dev_geo(icd->parent, "CFLCR 0x%x\n", pcdev->cflcr); | ||
| 823 | ceu_write(pcdev, CFLCR, pcdev->cflcr); | ||
| 824 | |||
| 825 | /* | ||
| 826 | * A few words about byte order (observed in Big Endian mode) | ||
| 827 | * | ||
| 828 | * In data fetch mode bytes are received in chunks of 8 bytes. | ||
| 829 | * D0, D1, D2, D3, D4, D5, D6, D7 (D0 received first) | ||
| 830 | * | ||
| 831 | * The data is however by default written to memory in reverse order: | ||
| 832 | * D7, D6, D5, D4, D3, D2, D1, D0 (D7 written to lowest byte) | ||
| 833 | * | ||
| 834 | * The lowest three bits of CDOCR allows us to do swapping, | ||
| 835 | * using 7 we swap the data bytes to match the incoming order: | ||
| 836 | * D0, D1, D2, D3, D4, D5, D6, D7 | ||
| 837 | */ | ||
| 838 | value = 0x00000007 | yuv_lineskip; | ||
| 839 | |||
| 840 | ceu_write(pcdev, CDOCR, value); | ||
| 841 | ceu_write(pcdev, CFWCR, 0); /* keep "datafetch firewall" disabled */ | ||
| 842 | |||
| 843 | capture_restore(pcdev, capsr); | ||
| 844 | |||
| 845 | /* not in bundle mode: skip CBDSR, CDAYR2, CDACR2, CDBYR2, CDBCR2 */ | ||
| 846 | return 0; | ||
| 847 | } | ||
| 848 | |||
| 849 | static int sh_mobile_ceu_try_bus_param(struct soc_camera_device *icd, | ||
| 850 | unsigned char buswidth) | ||
| 851 | { | ||
| 852 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 853 | unsigned long common_flags = CEU_BUS_FLAGS; | ||
| 854 | struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,}; | ||
| 855 | int ret; | ||
| 856 | |||
| 857 | ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg); | ||
| 858 | if (!ret) | ||
| 859 | common_flags = soc_mbus_config_compatible(&cfg, | ||
| 860 | common_flags); | ||
| 861 | else if (ret != -ENOIOCTLCMD) | ||
| 862 | return ret; | ||
| 863 | |||
| 864 | if (!common_flags || buswidth > 16) | ||
| 865 | return -EINVAL; | ||
| 866 | |||
| 867 | return 0; | ||
| 868 | } | ||
| 869 | |||
| 870 | static const struct soc_mbus_pixelfmt sh_mobile_ceu_formats[] = { | ||
| 871 | { | ||
| 872 | .fourcc = V4L2_PIX_FMT_NV12, | ||
| 873 | .name = "NV12", | ||
| 874 | .bits_per_sample = 8, | ||
| 875 | .packing = SOC_MBUS_PACKING_1_5X8, | ||
| 876 | .order = SOC_MBUS_ORDER_LE, | ||
| 877 | .layout = SOC_MBUS_LAYOUT_PLANAR_2Y_C, | ||
| 878 | }, { | ||
| 879 | .fourcc = V4L2_PIX_FMT_NV21, | ||
| 880 | .name = "NV21", | ||
| 881 | .bits_per_sample = 8, | ||
| 882 | .packing = SOC_MBUS_PACKING_1_5X8, | ||
| 883 | .order = SOC_MBUS_ORDER_LE, | ||
| 884 | .layout = SOC_MBUS_LAYOUT_PLANAR_2Y_C, | ||
| 885 | }, { | ||
| 886 | .fourcc = V4L2_PIX_FMT_NV16, | ||
| 887 | .name = "NV16", | ||
| 888 | .bits_per_sample = 8, | ||
| 889 | .packing = SOC_MBUS_PACKING_2X8_PADHI, | ||
| 890 | .order = SOC_MBUS_ORDER_LE, | ||
| 891 | .layout = SOC_MBUS_LAYOUT_PLANAR_Y_C, | ||
| 892 | }, { | ||
| 893 | .fourcc = V4L2_PIX_FMT_NV61, | ||
| 894 | .name = "NV61", | ||
| 895 | .bits_per_sample = 8, | ||
| 896 | .packing = SOC_MBUS_PACKING_2X8_PADHI, | ||
| 897 | .order = SOC_MBUS_ORDER_LE, | ||
| 898 | .layout = SOC_MBUS_LAYOUT_PLANAR_Y_C, | ||
| 899 | }, | ||
| 900 | }; | ||
| 901 | |||
| 902 | /* This will be corrected as we get more formats */ | ||
| 903 | static bool sh_mobile_ceu_packing_supported(const struct soc_mbus_pixelfmt *fmt) | ||
| 904 | { | ||
| 905 | return fmt->packing == SOC_MBUS_PACKING_NONE || | ||
| 906 | (fmt->bits_per_sample == 8 && | ||
| 907 | fmt->packing == SOC_MBUS_PACKING_1_5X8) || | ||
| 908 | (fmt->bits_per_sample == 8 && | ||
| 909 | fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) || | ||
| 910 | (fmt->bits_per_sample > 8 && | ||
| 911 | fmt->packing == SOC_MBUS_PACKING_EXTEND16); | ||
| 912 | } | ||
| 913 | |||
| 914 | static struct soc_camera_device *ctrl_to_icd(struct v4l2_ctrl *ctrl) | ||
| 915 | { | ||
| 916 | return container_of(ctrl->handler, struct soc_camera_device, | ||
| 917 | ctrl_handler); | ||
| 918 | } | ||
| 919 | |||
| 920 | static int sh_mobile_ceu_s_ctrl(struct v4l2_ctrl *ctrl) | ||
| 921 | { | ||
| 922 | struct soc_camera_device *icd = ctrl_to_icd(ctrl); | ||
| 923 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 924 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 925 | |||
| 926 | switch (ctrl->id) { | ||
| 927 | case V4L2_CID_SHARPNESS: | ||
| 928 | switch (icd->current_fmt->host_fmt->fourcc) { | ||
| 929 | case V4L2_PIX_FMT_NV12: | ||
| 930 | case V4L2_PIX_FMT_NV21: | ||
| 931 | case V4L2_PIX_FMT_NV16: | ||
| 932 | case V4L2_PIX_FMT_NV61: | ||
| 933 | ceu_write(pcdev, CLFCR, !ctrl->val); | ||
| 934 | return 0; | ||
| 935 | } | ||
| 936 | break; | ||
| 937 | } | ||
| 938 | |||
| 939 | return -EINVAL; | ||
| 940 | } | ||
| 941 | |||
| 942 | static const struct v4l2_ctrl_ops sh_mobile_ceu_ctrl_ops = { | ||
| 943 | .s_ctrl = sh_mobile_ceu_s_ctrl, | ||
| 944 | }; | ||
| 945 | |||
| 946 | static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int idx, | ||
| 947 | struct soc_camera_format_xlate *xlate) | ||
| 948 | { | ||
| 949 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 950 | struct device *dev = icd->parent; | ||
| 951 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 952 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 953 | int ret, k, n; | ||
| 954 | int formats = 0; | ||
| 955 | struct sh_mobile_ceu_cam *cam; | ||
| 956 | struct v4l2_subdev_mbus_code_enum code = { | ||
| 957 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 958 | .index = idx, | ||
| 959 | }; | ||
| 960 | const struct soc_mbus_pixelfmt *fmt; | ||
| 961 | |||
| 962 | ret = v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code); | ||
| 963 | if (ret < 0) | ||
| 964 | /* No more formats */ | ||
| 965 | return 0; | ||
| 966 | |||
| 967 | fmt = soc_mbus_get_fmtdesc(code.code); | ||
| 968 | if (!fmt) { | ||
| 969 | dev_warn(dev, "unsupported format code #%u: %d\n", idx, code.code); | ||
| 970 | return 0; | ||
| 971 | } | ||
| 972 | |||
| 973 | ret = sh_mobile_ceu_try_bus_param(icd, fmt->bits_per_sample); | ||
| 974 | if (ret < 0) | ||
| 975 | return 0; | ||
| 976 | |||
| 977 | if (!icd->host_priv) { | ||
| 978 | struct v4l2_subdev_format fmt = { | ||
| 979 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 980 | }; | ||
| 981 | struct v4l2_mbus_framefmt *mf = &fmt.format; | ||
| 982 | struct v4l2_rect rect; | ||
| 983 | int shift = 0; | ||
| 984 | |||
| 985 | /* Add our control */ | ||
| 986 | v4l2_ctrl_new_std(&icd->ctrl_handler, &sh_mobile_ceu_ctrl_ops, | ||
| 987 | V4L2_CID_SHARPNESS, 0, 1, 1, 1); | ||
| 988 | if (icd->ctrl_handler.error) | ||
| 989 | return icd->ctrl_handler.error; | ||
| 990 | |||
| 991 | /* FIXME: subwindow is lost between close / open */ | ||
| 992 | |||
| 993 | /* Cache current client geometry */ | ||
| 994 | ret = soc_camera_client_g_rect(sd, &rect); | ||
| 995 | if (ret < 0) | ||
| 996 | return ret; | ||
| 997 | |||
| 998 | /* First time */ | ||
| 999 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt); | ||
| 1000 | if (ret < 0) | ||
| 1001 | return ret; | ||
| 1002 | |||
| 1003 | /* | ||
| 1004 | * All currently existing CEU implementations support 2560x1920 | ||
| 1005 | * or larger frames. If the sensor is proposing too big a frame, | ||
| 1006 | * don't bother with possibly supportred by the CEU larger | ||
| 1007 | * sizes, just try VGA multiples. If needed, this can be | ||
| 1008 | * adjusted in the future. | ||
| 1009 | */ | ||
| 1010 | while ((mf->width > pcdev->max_width || | ||
| 1011 | mf->height > pcdev->max_height) && shift < 4) { | ||
| 1012 | /* Try 2560x1920, 1280x960, 640x480, 320x240 */ | ||
| 1013 | mf->width = 2560 >> shift; | ||
| 1014 | mf->height = 1920 >> shift; | ||
| 1015 | ret = v4l2_device_call_until_err(sd->v4l2_dev, | ||
| 1016 | soc_camera_grp_id(icd), pad, | ||
| 1017 | set_fmt, NULL, &fmt); | ||
| 1018 | if (ret < 0) | ||
| 1019 | return ret; | ||
| 1020 | shift++; | ||
| 1021 | } | ||
| 1022 | |||
| 1023 | if (shift == 4) { | ||
| 1024 | dev_err(dev, "Failed to configure the client below %ux%x\n", | ||
| 1025 | mf->width, mf->height); | ||
| 1026 | return -EIO; | ||
| 1027 | } | ||
| 1028 | |||
| 1029 | dev_geo(dev, "camera fmt %ux%u\n", mf->width, mf->height); | ||
| 1030 | |||
| 1031 | cam = kzalloc(sizeof(*cam), GFP_KERNEL); | ||
| 1032 | if (!cam) | ||
| 1033 | return -ENOMEM; | ||
| 1034 | |||
| 1035 | /* We are called with current camera crop, initialise subrect with it */ | ||
| 1036 | cam->rect = rect; | ||
| 1037 | cam->subrect = rect; | ||
| 1038 | |||
| 1039 | cam->width = mf->width; | ||
| 1040 | cam->height = mf->height; | ||
| 1041 | |||
| 1042 | icd->host_priv = cam; | ||
| 1043 | } else { | ||
| 1044 | cam = icd->host_priv; | ||
| 1045 | } | ||
| 1046 | |||
| 1047 | /* Beginning of a pass */ | ||
| 1048 | if (!idx) | ||
| 1049 | cam->extra_fmt = NULL; | ||
| 1050 | |||
| 1051 | switch (code.code) { | ||
| 1052 | case MEDIA_BUS_FMT_UYVY8_2X8: | ||
| 1053 | case MEDIA_BUS_FMT_VYUY8_2X8: | ||
| 1054 | case MEDIA_BUS_FMT_YUYV8_2X8: | ||
| 1055 | case MEDIA_BUS_FMT_YVYU8_2X8: | ||
| 1056 | if (cam->extra_fmt) | ||
| 1057 | break; | ||
| 1058 | |||
| 1059 | /* | ||
| 1060 | * Our case is simple so far: for any of the above four camera | ||
| 1061 | * formats we add all our four synthesized NV* formats, so, | ||
| 1062 | * just marking the device with a single flag suffices. If | ||
| 1063 | * the format generation rules are more complex, you would have | ||
| 1064 | * to actually hang your already added / counted formats onto | ||
| 1065 | * the host_priv pointer and check whether the format you're | ||
| 1066 | * going to add now is already there. | ||
| 1067 | */ | ||
| 1068 | cam->extra_fmt = sh_mobile_ceu_formats; | ||
| 1069 | |||
| 1070 | n = ARRAY_SIZE(sh_mobile_ceu_formats); | ||
| 1071 | formats += n; | ||
| 1072 | for (k = 0; xlate && k < n; k++) { | ||
| 1073 | xlate->host_fmt = &sh_mobile_ceu_formats[k]; | ||
| 1074 | xlate->code = code.code; | ||
| 1075 | xlate++; | ||
| 1076 | dev_dbg(dev, "Providing format %s using code %d\n", | ||
| 1077 | sh_mobile_ceu_formats[k].name, code.code); | ||
| 1078 | } | ||
| 1079 | break; | ||
| 1080 | default: | ||
| 1081 | if (!sh_mobile_ceu_packing_supported(fmt)) | ||
| 1082 | return 0; | ||
| 1083 | } | ||
| 1084 | |||
| 1085 | /* Generic pass-through */ | ||
| 1086 | formats++; | ||
| 1087 | if (xlate) { | ||
| 1088 | xlate->host_fmt = fmt; | ||
| 1089 | xlate->code = code.code; | ||
| 1090 | xlate++; | ||
| 1091 | dev_dbg(dev, "Providing format %s in pass-through mode\n", | ||
| 1092 | fmt->name); | ||
| 1093 | } | ||
| 1094 | |||
| 1095 | return formats; | ||
| 1096 | } | ||
| 1097 | |||
| 1098 | static void sh_mobile_ceu_put_formats(struct soc_camera_device *icd) | ||
| 1099 | { | ||
| 1100 | kfree(icd->host_priv); | ||
| 1101 | icd->host_priv = NULL; | ||
| 1102 | } | ||
| 1103 | |||
| 1104 | #define scale_down(size, scale) soc_camera_shift_scale(size, 12, scale) | ||
| 1105 | #define calc_generic_scale(in, out) soc_camera_calc_scale(in, 12, out) | ||
| 1106 | |||
| 1107 | /* | ||
| 1108 | * CEU can scale and crop, but we don't want to waste bandwidth and kill the | ||
| 1109 | * framerate by always requesting the maximum image from the client. See | ||
| 1110 | * Documentation/media/v4l-drivers/sh_mobile_ceu_camera.rst for a description of | ||
| 1111 | * scaling and cropping algorithms and for the meaning of referenced here steps. | ||
| 1112 | */ | ||
| 1113 | static int sh_mobile_ceu_set_selection(struct soc_camera_device *icd, | ||
| 1114 | struct v4l2_selection *sel) | ||
| 1115 | { | ||
| 1116 | struct v4l2_rect *rect = &sel->r; | ||
| 1117 | struct device *dev = icd->parent; | ||
| 1118 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1119 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 1120 | struct v4l2_selection cam_sel; | ||
| 1121 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | ||
| 1122 | struct v4l2_rect *cam_rect = &cam_sel.r; | ||
| 1123 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 1124 | struct v4l2_subdev_format fmt = { | ||
| 1125 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 1126 | }; | ||
| 1127 | struct v4l2_mbus_framefmt *mf = &fmt.format; | ||
| 1128 | unsigned int scale_cam_h, scale_cam_v, scale_ceu_h, scale_ceu_v, | ||
| 1129 | out_width, out_height; | ||
| 1130 | int interm_width, interm_height; | ||
| 1131 | u32 capsr, cflcr; | ||
| 1132 | int ret; | ||
| 1133 | |||
| 1134 | dev_geo(dev, "S_SELECTION(%ux%u@%u:%u)\n", rect->width, rect->height, | ||
| 1135 | rect->left, rect->top); | ||
| 1136 | |||
| 1137 | /* During camera cropping its output window can change too, stop CEU */ | ||
| 1138 | capsr = capture_save_reset(pcdev); | ||
| 1139 | dev_dbg(dev, "CAPSR 0x%x, CFLCR 0x%x\n", capsr, pcdev->cflcr); | ||
| 1140 | |||
| 1141 | /* | ||
| 1142 | * 1. - 2. Apply iterative camera S_SELECTION for new input window, read back | ||
| 1143 | * actual camera rectangle. | ||
| 1144 | */ | ||
| 1145 | ret = soc_camera_client_s_selection(sd, sel, &cam_sel, | ||
| 1146 | &cam->rect, &cam->subrect); | ||
| 1147 | if (ret < 0) | ||
| 1148 | return ret; | ||
| 1149 | |||
| 1150 | dev_geo(dev, "1-2: camera cropped to %ux%u@%u:%u\n", | ||
| 1151 | cam_rect->width, cam_rect->height, | ||
| 1152 | cam_rect->left, cam_rect->top); | ||
| 1153 | |||
| 1154 | /* On success cam_crop contains current camera crop */ | ||
| 1155 | |||
| 1156 | /* 3. Retrieve camera output window */ | ||
| 1157 | ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt); | ||
| 1158 | if (ret < 0) | ||
| 1159 | return ret; | ||
| 1160 | |||
| 1161 | if (mf->width > pcdev->max_width || mf->height > pcdev->max_height) | ||
| 1162 | return -EINVAL; | ||
| 1163 | |||
| 1164 | /* 4. Calculate camera scales */ | ||
| 1165 | scale_cam_h = calc_generic_scale(cam_rect->width, mf->width); | ||
| 1166 | scale_cam_v = calc_generic_scale(cam_rect->height, mf->height); | ||
| 1167 | |||
| 1168 | /* Calculate intermediate window */ | ||
| 1169 | interm_width = scale_down(rect->width, scale_cam_h); | ||
| 1170 | interm_height = scale_down(rect->height, scale_cam_v); | ||
| 1171 | |||
| 1172 | if (interm_width < icd->user_width) { | ||
| 1173 | u32 new_scale_h; | ||
| 1174 | |||
| 1175 | new_scale_h = calc_generic_scale(rect->width, icd->user_width); | ||
| 1176 | |||
| 1177 | mf->width = scale_down(cam_rect->width, new_scale_h); | ||
| 1178 | } | ||
| 1179 | |||
| 1180 | if (interm_height < icd->user_height) { | ||
| 1181 | u32 new_scale_v; | ||
| 1182 | |||
| 1183 | new_scale_v = calc_generic_scale(rect->height, icd->user_height); | ||
| 1184 | |||
| 1185 | mf->height = scale_down(cam_rect->height, new_scale_v); | ||
| 1186 | } | ||
| 1187 | |||
| 1188 | if (interm_width < icd->user_width || interm_height < icd->user_height) { | ||
| 1189 | ret = v4l2_device_call_until_err(sd->v4l2_dev, | ||
| 1190 | soc_camera_grp_id(icd), pad, | ||
| 1191 | set_fmt, NULL, &fmt); | ||
| 1192 | if (ret < 0) | ||
| 1193 | return ret; | ||
| 1194 | |||
| 1195 | dev_geo(dev, "New camera output %ux%u\n", mf->width, mf->height); | ||
| 1196 | scale_cam_h = calc_generic_scale(cam_rect->width, mf->width); | ||
| 1197 | scale_cam_v = calc_generic_scale(cam_rect->height, mf->height); | ||
| 1198 | interm_width = scale_down(rect->width, scale_cam_h); | ||
| 1199 | interm_height = scale_down(rect->height, scale_cam_v); | ||
| 1200 | } | ||
| 1201 | |||
| 1202 | /* Cache camera output window */ | ||
| 1203 | cam->width = mf->width; | ||
| 1204 | cam->height = mf->height; | ||
| 1205 | |||
| 1206 | if (pcdev->image_mode) { | ||
| 1207 | out_width = min(interm_width, icd->user_width); | ||
| 1208 | out_height = min(interm_height, icd->user_height); | ||
| 1209 | } else { | ||
| 1210 | out_width = interm_width; | ||
| 1211 | out_height = interm_height; | ||
| 1212 | } | ||
| 1213 | |||
| 1214 | /* | ||
| 1215 | * 5. Calculate CEU scales from camera scales from results of (5) and | ||
| 1216 | * the user window | ||
| 1217 | */ | ||
| 1218 | scale_ceu_h = calc_scale(interm_width, &out_width); | ||
| 1219 | scale_ceu_v = calc_scale(interm_height, &out_height); | ||
| 1220 | |||
| 1221 | dev_geo(dev, "5: CEU scales %u:%u\n", scale_ceu_h, scale_ceu_v); | ||
| 1222 | |||
| 1223 | /* Apply CEU scales. */ | ||
| 1224 | cflcr = scale_ceu_h | (scale_ceu_v << 16); | ||
| 1225 | if (cflcr != pcdev->cflcr) { | ||
| 1226 | pcdev->cflcr = cflcr; | ||
| 1227 | ceu_write(pcdev, CFLCR, cflcr); | ||
| 1228 | } | ||
| 1229 | |||
| 1230 | icd->user_width = out_width & ~3; | ||
| 1231 | icd->user_height = out_height & ~3; | ||
| 1232 | /* Offsets are applied at the CEU scaling filter input */ | ||
| 1233 | cam->ceu_left = scale_down(rect->left - cam_rect->left, scale_cam_h) & ~1; | ||
| 1234 | cam->ceu_top = scale_down(rect->top - cam_rect->top, scale_cam_v) & ~1; | ||
| 1235 | |||
| 1236 | /* 6. Use CEU cropping to crop to the new window. */ | ||
| 1237 | sh_mobile_ceu_set_rect(icd); | ||
| 1238 | |||
| 1239 | cam->subrect = *rect; | ||
| 1240 | |||
| 1241 | dev_geo(dev, "6: CEU cropped to %ux%u@%u:%u\n", | ||
| 1242 | icd->user_width, icd->user_height, | ||
| 1243 | cam->ceu_left, cam->ceu_top); | ||
| 1244 | |||
| 1245 | /* Restore capture. The CE bit can be cleared by the hardware */ | ||
| 1246 | if (pcdev->active) | ||
| 1247 | capsr |= 1; | ||
| 1248 | capture_restore(pcdev, capsr); | ||
| 1249 | |||
| 1250 | /* Even if only camera cropping succeeded */ | ||
| 1251 | return ret; | ||
| 1252 | } | ||
| 1253 | |||
| 1254 | static int sh_mobile_ceu_get_selection(struct soc_camera_device *icd, | ||
| 1255 | struct v4l2_selection *sel) | ||
| 1256 | { | ||
| 1257 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | ||
| 1258 | |||
| 1259 | sel->r = cam->subrect; | ||
| 1260 | |||
| 1261 | return 0; | ||
| 1262 | } | ||
| 1263 | |||
| 1264 | /* Similar to set_crop multistage iterative algorithm */ | ||
| 1265 | static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd, | ||
| 1266 | struct v4l2_format *f) | ||
| 1267 | { | ||
| 1268 | struct device *dev = icd->parent; | ||
| 1269 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1270 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 1271 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | ||
| 1272 | struct v4l2_pix_format *pix = &f->fmt.pix; | ||
| 1273 | struct v4l2_mbus_framefmt mf; | ||
| 1274 | __u32 pixfmt = pix->pixelformat; | ||
| 1275 | const struct soc_camera_format_xlate *xlate; | ||
| 1276 | unsigned int ceu_sub_width = pcdev->max_width, | ||
| 1277 | ceu_sub_height = pcdev->max_height; | ||
| 1278 | u16 scale_v, scale_h; | ||
| 1279 | int ret; | ||
| 1280 | bool image_mode; | ||
| 1281 | enum v4l2_field field; | ||
| 1282 | |||
| 1283 | switch (pix->field) { | ||
| 1284 | default: | ||
| 1285 | pix->field = V4L2_FIELD_NONE; | ||
| 1286 | /* fall-through */ | ||
| 1287 | case V4L2_FIELD_INTERLACED_TB: | ||
| 1288 | case V4L2_FIELD_INTERLACED_BT: | ||
| 1289 | case V4L2_FIELD_NONE: | ||
| 1290 | field = pix->field; | ||
| 1291 | break; | ||
| 1292 | case V4L2_FIELD_INTERLACED: | ||
| 1293 | field = V4L2_FIELD_INTERLACED_TB; | ||
| 1294 | break; | ||
| 1295 | } | ||
| 1296 | |||
| 1297 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | ||
| 1298 | if (!xlate) { | ||
| 1299 | dev_warn(dev, "Format %x not found\n", pixfmt); | ||
| 1300 | return -EINVAL; | ||
| 1301 | } | ||
| 1302 | |||
| 1303 | /* 1.-4. Calculate desired client output geometry */ | ||
| 1304 | soc_camera_calc_client_output(icd, &cam->rect, &cam->subrect, pix, &mf, 12); | ||
| 1305 | mf.field = pix->field; | ||
| 1306 | mf.colorspace = pix->colorspace; | ||
| 1307 | mf.code = xlate->code; | ||
| 1308 | |||
| 1309 | switch (pixfmt) { | ||
| 1310 | case V4L2_PIX_FMT_NV12: | ||
| 1311 | case V4L2_PIX_FMT_NV21: | ||
| 1312 | case V4L2_PIX_FMT_NV16: | ||
| 1313 | case V4L2_PIX_FMT_NV61: | ||
| 1314 | image_mode = true; | ||
| 1315 | break; | ||
| 1316 | default: | ||
| 1317 | image_mode = false; | ||
| 1318 | } | ||
| 1319 | |||
| 1320 | dev_geo(dev, "S_FMT(pix=0x%x, fld 0x%x, code 0x%x, %ux%u)\n", pixfmt, mf.field, mf.code, | ||
| 1321 | pix->width, pix->height); | ||
| 1322 | |||
| 1323 | dev_geo(dev, "4: request camera output %ux%u\n", mf.width, mf.height); | ||
| 1324 | |||
| 1325 | /* 5. - 9. */ | ||
| 1326 | ret = soc_camera_client_scale(icd, &cam->rect, &cam->subrect, | ||
| 1327 | &mf, &ceu_sub_width, &ceu_sub_height, | ||
| 1328 | image_mode && V4L2_FIELD_NONE == field, 12); | ||
| 1329 | |||
| 1330 | dev_geo(dev, "5-9: client scale return %d\n", ret); | ||
| 1331 | |||
| 1332 | /* Done with the camera. Now see if we can improve the result */ | ||
| 1333 | |||
| 1334 | dev_geo(dev, "fmt %ux%u, requested %ux%u\n", | ||
| 1335 | mf.width, mf.height, pix->width, pix->height); | ||
| 1336 | if (ret < 0) | ||
| 1337 | return ret; | ||
| 1338 | |||
| 1339 | if (mf.code != xlate->code) | ||
| 1340 | return -EINVAL; | ||
| 1341 | |||
| 1342 | /* 9. Prepare CEU crop */ | ||
| 1343 | cam->width = mf.width; | ||
| 1344 | cam->height = mf.height; | ||
| 1345 | |||
| 1346 | /* 10. Use CEU scaling to scale to the requested user window. */ | ||
| 1347 | |||
| 1348 | /* We cannot scale up */ | ||
| 1349 | if (pix->width > ceu_sub_width) | ||
| 1350 | ceu_sub_width = pix->width; | ||
| 1351 | |||
| 1352 | if (pix->height > ceu_sub_height) | ||
| 1353 | ceu_sub_height = pix->height; | ||
| 1354 | |||
| 1355 | pix->colorspace = mf.colorspace; | ||
| 1356 | |||
| 1357 | if (image_mode) { | ||
| 1358 | /* Scale pix->{width x height} down to width x height */ | ||
| 1359 | scale_h = calc_scale(ceu_sub_width, &pix->width); | ||
| 1360 | scale_v = calc_scale(ceu_sub_height, &pix->height); | ||
| 1361 | } else { | ||
| 1362 | pix->width = ceu_sub_width; | ||
| 1363 | pix->height = ceu_sub_height; | ||
| 1364 | scale_h = 0; | ||
| 1365 | scale_v = 0; | ||
| 1366 | } | ||
| 1367 | |||
| 1368 | pcdev->cflcr = scale_h | (scale_v << 16); | ||
| 1369 | |||
| 1370 | /* | ||
| 1371 | * We have calculated CFLCR, the actual configuration will be performed | ||
| 1372 | * in sh_mobile_ceu_set_bus_param() | ||
| 1373 | */ | ||
| 1374 | |||
| 1375 | dev_geo(dev, "10: W: %u : 0x%x = %u, H: %u : 0x%x = %u\n", | ||
| 1376 | ceu_sub_width, scale_h, pix->width, | ||
| 1377 | ceu_sub_height, scale_v, pix->height); | ||
| 1378 | |||
| 1379 | cam->code = xlate->code; | ||
| 1380 | icd->current_fmt = xlate; | ||
| 1381 | |||
| 1382 | pcdev->field = field; | ||
| 1383 | pcdev->image_mode = image_mode; | ||
| 1384 | |||
| 1385 | /* CFSZR requirement */ | ||
| 1386 | pix->width &= ~3; | ||
| 1387 | pix->height &= ~3; | ||
| 1388 | |||
| 1389 | return 0; | ||
| 1390 | } | ||
| 1391 | |||
| 1392 | #define CEU_CHDW_MAX 8188U /* Maximum line stride */ | ||
| 1393 | |||
| 1394 | static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, | ||
| 1395 | struct v4l2_format *f) | ||
| 1396 | { | ||
| 1397 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 1398 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 1399 | const struct soc_camera_format_xlate *xlate; | ||
| 1400 | struct v4l2_pix_format *pix = &f->fmt.pix; | ||
| 1401 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 1402 | struct v4l2_subdev_pad_config pad_cfg; | ||
| 1403 | struct v4l2_subdev_format format = { | ||
| 1404 | .which = V4L2_SUBDEV_FORMAT_TRY, | ||
| 1405 | }; | ||
| 1406 | struct v4l2_mbus_framefmt *mf = &format.format; | ||
| 1407 | __u32 pixfmt = pix->pixelformat; | ||
| 1408 | int width, height; | ||
| 1409 | int ret; | ||
| 1410 | |||
| 1411 | dev_geo(icd->parent, "TRY_FMT(pix=0x%x, %ux%u)\n", | ||
| 1412 | pixfmt, pix->width, pix->height); | ||
| 1413 | |||
| 1414 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | ||
| 1415 | if (!xlate) { | ||
| 1416 | xlate = icd->current_fmt; | ||
| 1417 | dev_dbg(icd->parent, "Format %x not found, keeping %x\n", | ||
| 1418 | pixfmt, xlate->host_fmt->fourcc); | ||
| 1419 | pixfmt = xlate->host_fmt->fourcc; | ||
| 1420 | pix->pixelformat = pixfmt; | ||
| 1421 | pix->colorspace = icd->colorspace; | ||
| 1422 | } | ||
| 1423 | |||
| 1424 | /* FIXME: calculate using depth and bus width */ | ||
| 1425 | |||
| 1426 | /* CFSZR requires height and width to be 4-pixel aligned */ | ||
| 1427 | v4l_bound_align_image(&pix->width, 2, pcdev->max_width, 2, | ||
| 1428 | &pix->height, 4, pcdev->max_height, 2, 0); | ||
| 1429 | |||
| 1430 | width = pix->width; | ||
| 1431 | height = pix->height; | ||
| 1432 | |||
| 1433 | /* limit to sensor capabilities */ | ||
| 1434 | mf->width = pix->width; | ||
| 1435 | mf->height = pix->height; | ||
| 1436 | mf->field = pix->field; | ||
| 1437 | mf->code = xlate->code; | ||
| 1438 | mf->colorspace = pix->colorspace; | ||
| 1439 | |||
| 1440 | ret = v4l2_device_call_until_err(sd->v4l2_dev, soc_camera_grp_id(icd), | ||
| 1441 | pad, set_fmt, &pad_cfg, &format); | ||
| 1442 | if (ret < 0) | ||
| 1443 | return ret; | ||
| 1444 | |||
| 1445 | pix->width = mf->width; | ||
| 1446 | pix->height = mf->height; | ||
| 1447 | pix->field = mf->field; | ||
| 1448 | pix->colorspace = mf->colorspace; | ||
| 1449 | |||
| 1450 | switch (pixfmt) { | ||
| 1451 | case V4L2_PIX_FMT_NV12: | ||
| 1452 | case V4L2_PIX_FMT_NV21: | ||
| 1453 | case V4L2_PIX_FMT_NV16: | ||
| 1454 | case V4L2_PIX_FMT_NV61: | ||
| 1455 | /* FIXME: check against rect_max after converting soc-camera */ | ||
| 1456 | /* We can scale precisely, need a bigger image from camera */ | ||
| 1457 | if (pix->width < width || pix->height < height) { | ||
| 1458 | /* | ||
| 1459 | * We presume, the sensor behaves sanely, i.e., if | ||
| 1460 | * requested a bigger rectangle, it will not return a | ||
| 1461 | * smaller one. | ||
| 1462 | */ | ||
| 1463 | mf->width = pcdev->max_width; | ||
| 1464 | mf->height = pcdev->max_height; | ||
| 1465 | ret = v4l2_device_call_until_err(sd->v4l2_dev, | ||
| 1466 | soc_camera_grp_id(icd), pad, | ||
| 1467 | set_fmt, &pad_cfg, &format); | ||
| 1468 | if (ret < 0) { | ||
| 1469 | /* Shouldn't actually happen... */ | ||
| 1470 | dev_err(icd->parent, | ||
| 1471 | "FIXME: client try_fmt() = %d\n", ret); | ||
| 1472 | return ret; | ||
| 1473 | } | ||
| 1474 | } | ||
| 1475 | /* We will scale exactly */ | ||
| 1476 | if (mf->width > width) | ||
| 1477 | pix->width = width; | ||
| 1478 | if (mf->height > height) | ||
| 1479 | pix->height = height; | ||
| 1480 | |||
| 1481 | pix->bytesperline = max(pix->bytesperline, pix->width); | ||
| 1482 | pix->bytesperline = min(pix->bytesperline, CEU_CHDW_MAX); | ||
| 1483 | pix->bytesperline &= ~3; | ||
| 1484 | break; | ||
| 1485 | |||
| 1486 | default: | ||
| 1487 | /* Configurable stride isn't supported in pass-through mode. */ | ||
| 1488 | pix->bytesperline = 0; | ||
| 1489 | } | ||
| 1490 | |||
| 1491 | pix->width &= ~3; | ||
| 1492 | pix->height &= ~3; | ||
| 1493 | pix->sizeimage = 0; | ||
| 1494 | |||
| 1495 | dev_geo(icd->parent, "%s(): return %d, fmt 0x%x, %ux%u\n", | ||
| 1496 | __func__, ret, pix->pixelformat, pix->width, pix->height); | ||
| 1497 | |||
| 1498 | return ret; | ||
| 1499 | } | ||
| 1500 | |||
| 1501 | static int sh_mobile_ceu_set_liveselection(struct soc_camera_device *icd, | ||
| 1502 | struct v4l2_selection *sel) | ||
| 1503 | { | ||
| 1504 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 1505 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 1506 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | ||
| 1507 | u32 out_width = icd->user_width, out_height = icd->user_height; | ||
| 1508 | int ret; | ||
| 1509 | |||
| 1510 | /* Freeze queue */ | ||
| 1511 | pcdev->frozen = 1; | ||
| 1512 | /* Wait for frame */ | ||
| 1513 | ret = wait_for_completion_interruptible(&pcdev->complete); | ||
| 1514 | /* Stop the client */ | ||
| 1515 | ret = v4l2_subdev_call(sd, video, s_stream, 0); | ||
| 1516 | if (ret < 0) | ||
| 1517 | dev_warn(icd->parent, | ||
| 1518 | "Client failed to stop the stream: %d\n", ret); | ||
| 1519 | else | ||
| 1520 | /* Do the crop, if it fails, there's nothing more we can do */ | ||
| 1521 | sh_mobile_ceu_set_selection(icd, sel); | ||
| 1522 | |||
| 1523 | dev_geo(icd->parent, "Output after crop: %ux%u\n", icd->user_width, icd->user_height); | ||
| 1524 | |||
| 1525 | if (icd->user_width != out_width || icd->user_height != out_height) { | ||
| 1526 | struct v4l2_format f = { | ||
| 1527 | .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, | ||
| 1528 | .fmt.pix = { | ||
| 1529 | .width = out_width, | ||
| 1530 | .height = out_height, | ||
| 1531 | .pixelformat = icd->current_fmt->host_fmt->fourcc, | ||
| 1532 | .field = pcdev->field, | ||
| 1533 | .colorspace = icd->colorspace, | ||
| 1534 | }, | ||
| 1535 | }; | ||
| 1536 | ret = sh_mobile_ceu_set_fmt(icd, &f); | ||
| 1537 | if (!ret && (out_width != f.fmt.pix.width || | ||
| 1538 | out_height != f.fmt.pix.height)) | ||
| 1539 | ret = -EINVAL; | ||
| 1540 | if (!ret) { | ||
| 1541 | icd->user_width = out_width & ~3; | ||
| 1542 | icd->user_height = out_height & ~3; | ||
| 1543 | ret = sh_mobile_ceu_set_bus_param(icd); | ||
| 1544 | } | ||
| 1545 | } | ||
| 1546 | |||
| 1547 | /* Thaw the queue */ | ||
| 1548 | pcdev->frozen = 0; | ||
| 1549 | spin_lock_irq(&pcdev->lock); | ||
| 1550 | sh_mobile_ceu_capture(pcdev); | ||
| 1551 | spin_unlock_irq(&pcdev->lock); | ||
| 1552 | /* Start the client */ | ||
| 1553 | ret = v4l2_subdev_call(sd, video, s_stream, 1); | ||
| 1554 | return ret; | ||
| 1555 | } | ||
| 1556 | |||
| 1557 | static __poll_t sh_mobile_ceu_poll(struct file *file, poll_table *pt) | ||
| 1558 | { | ||
| 1559 | struct soc_camera_device *icd = file->private_data; | ||
| 1560 | |||
| 1561 | return vb2_poll(&icd->vb2_vidq, file, pt); | ||
| 1562 | } | ||
| 1563 | |||
| 1564 | static int sh_mobile_ceu_querycap(struct soc_camera_host *ici, | ||
| 1565 | struct v4l2_capability *cap) | ||
| 1566 | { | ||
| 1567 | strscpy(cap->card, "SuperH_Mobile_CEU", sizeof(cap->card)); | ||
| 1568 | strscpy(cap->driver, "sh_mobile_ceu", sizeof(cap->driver)); | ||
| 1569 | strscpy(cap->bus_info, "platform:sh_mobile_ceu", sizeof(cap->bus_info)); | ||
| 1570 | cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | ||
| 1571 | cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; | ||
| 1572 | |||
| 1573 | return 0; | ||
| 1574 | } | ||
| 1575 | |||
| 1576 | static int sh_mobile_ceu_init_videobuf(struct vb2_queue *q, | ||
| 1577 | struct soc_camera_device *icd) | ||
| 1578 | { | ||
| 1579 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 1580 | |||
| 1581 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 1582 | q->io_modes = VB2_MMAP | VB2_USERPTR; | ||
| 1583 | q->drv_priv = icd; | ||
| 1584 | q->ops = &sh_mobile_ceu_videobuf_ops; | ||
| 1585 | q->mem_ops = &vb2_dma_contig_memops; | ||
| 1586 | q->buf_struct_size = sizeof(struct sh_mobile_ceu_buffer); | ||
| 1587 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | ||
| 1588 | q->lock = &ici->host_lock; | ||
| 1589 | q->dev = ici->v4l2_dev.dev; | ||
| 1590 | |||
| 1591 | return vb2_queue_init(q); | ||
| 1592 | } | ||
| 1593 | |||
| 1594 | static struct soc_camera_host_ops sh_mobile_ceu_host_ops = { | ||
| 1595 | .owner = THIS_MODULE, | ||
| 1596 | .add = sh_mobile_ceu_add_device, | ||
| 1597 | .remove = sh_mobile_ceu_remove_device, | ||
| 1598 | .clock_start = sh_mobile_ceu_clock_start, | ||
| 1599 | .clock_stop = sh_mobile_ceu_clock_stop, | ||
| 1600 | .get_formats = sh_mobile_ceu_get_formats, | ||
| 1601 | .put_formats = sh_mobile_ceu_put_formats, | ||
| 1602 | .get_selection = sh_mobile_ceu_get_selection, | ||
| 1603 | .set_selection = sh_mobile_ceu_set_selection, | ||
| 1604 | .set_liveselection = sh_mobile_ceu_set_liveselection, | ||
| 1605 | .set_fmt = sh_mobile_ceu_set_fmt, | ||
| 1606 | .try_fmt = sh_mobile_ceu_try_fmt, | ||
| 1607 | .poll = sh_mobile_ceu_poll, | ||
| 1608 | .querycap = sh_mobile_ceu_querycap, | ||
| 1609 | .set_bus_param = sh_mobile_ceu_set_bus_param, | ||
| 1610 | .init_videobuf2 = sh_mobile_ceu_init_videobuf, | ||
| 1611 | }; | ||
| 1612 | |||
| 1613 | struct bus_wait { | ||
| 1614 | struct notifier_block notifier; | ||
| 1615 | struct completion completion; | ||
| 1616 | struct device *dev; | ||
| 1617 | }; | ||
| 1618 | |||
| 1619 | static int bus_notify(struct notifier_block *nb, | ||
| 1620 | unsigned long action, void *data) | ||
| 1621 | { | ||
| 1622 | struct device *dev = data; | ||
| 1623 | struct bus_wait *wait = container_of(nb, struct bus_wait, notifier); | ||
| 1624 | |||
| 1625 | if (wait->dev != dev) | ||
| 1626 | return NOTIFY_DONE; | ||
| 1627 | |||
| 1628 | switch (action) { | ||
| 1629 | case BUS_NOTIFY_UNBOUND_DRIVER: | ||
| 1630 | /* Protect from module unloading */ | ||
| 1631 | wait_for_completion(&wait->completion); | ||
| 1632 | return NOTIFY_OK; | ||
| 1633 | } | ||
| 1634 | return NOTIFY_DONE; | ||
| 1635 | } | ||
| 1636 | |||
| 1637 | static int sh_mobile_ceu_probe(struct platform_device *pdev) | ||
| 1638 | { | ||
| 1639 | struct sh_mobile_ceu_dev *pcdev; | ||
| 1640 | struct resource *res; | ||
| 1641 | void __iomem *base; | ||
| 1642 | unsigned int irq; | ||
| 1643 | int err; | ||
| 1644 | struct bus_wait wait = { | ||
| 1645 | .completion = COMPLETION_INITIALIZER_ONSTACK(wait.completion), | ||
| 1646 | .notifier.notifier_call = bus_notify, | ||
| 1647 | }; | ||
| 1648 | |||
| 1649 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 1650 | irq = platform_get_irq(pdev, 0); | ||
| 1651 | if (!res || (int)irq <= 0) { | ||
| 1652 | dev_err(&pdev->dev, "Not enough CEU platform resources.\n"); | ||
| 1653 | return -ENODEV; | ||
| 1654 | } | ||
| 1655 | |||
| 1656 | pcdev = devm_kzalloc(&pdev->dev, sizeof(*pcdev), GFP_KERNEL); | ||
| 1657 | if (!pcdev) { | ||
| 1658 | dev_err(&pdev->dev, "Could not allocate pcdev\n"); | ||
| 1659 | return -ENOMEM; | ||
| 1660 | } | ||
| 1661 | |||
| 1662 | INIT_LIST_HEAD(&pcdev->capture); | ||
| 1663 | spin_lock_init(&pcdev->lock); | ||
| 1664 | init_completion(&pcdev->complete); | ||
| 1665 | |||
| 1666 | pcdev->pdata = pdev->dev.platform_data; | ||
| 1667 | if (!pcdev->pdata && !pdev->dev.of_node) { | ||
| 1668 | dev_err(&pdev->dev, "CEU platform data not set.\n"); | ||
| 1669 | return -EINVAL; | ||
| 1670 | } | ||
| 1671 | |||
| 1672 | /* TODO: implement per-device bus flags */ | ||
| 1673 | if (pcdev->pdata) { | ||
| 1674 | pcdev->max_width = pcdev->pdata->max_width; | ||
| 1675 | pcdev->max_height = pcdev->pdata->max_height; | ||
| 1676 | pcdev->flags = pcdev->pdata->flags; | ||
| 1677 | } | ||
| 1678 | pcdev->field = V4L2_FIELD_NONE; | ||
| 1679 | |||
| 1680 | if (!pcdev->max_width) { | ||
| 1681 | unsigned int v; | ||
| 1682 | err = of_property_read_u32(pdev->dev.of_node, "renesas,max-width", &v); | ||
| 1683 | if (!err) | ||
| 1684 | pcdev->max_width = v; | ||
| 1685 | |||
| 1686 | if (!pcdev->max_width) | ||
| 1687 | pcdev->max_width = 2560; | ||
| 1688 | } | ||
| 1689 | if (!pcdev->max_height) { | ||
| 1690 | unsigned int v; | ||
| 1691 | err = of_property_read_u32(pdev->dev.of_node, "renesas,max-height", &v); | ||
| 1692 | if (!err) | ||
| 1693 | pcdev->max_height = v; | ||
| 1694 | |||
| 1695 | if (!pcdev->max_height) | ||
| 1696 | pcdev->max_height = 1920; | ||
| 1697 | } | ||
| 1698 | |||
| 1699 | base = devm_ioremap_resource(&pdev->dev, res); | ||
| 1700 | if (IS_ERR(base)) | ||
| 1701 | return PTR_ERR(base); | ||
| 1702 | |||
| 1703 | pcdev->irq = irq; | ||
| 1704 | pcdev->base = base; | ||
| 1705 | pcdev->video_limit = 0; /* only enabled if second resource exists */ | ||
| 1706 | |||
| 1707 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | ||
| 1708 | if (res) { | ||
| 1709 | err = dma_declare_coherent_memory(&pdev->dev, res->start, | ||
| 1710 | res->start, | ||
| 1711 | resource_size(res), | ||
| 1712 | DMA_MEMORY_EXCLUSIVE); | ||
| 1713 | if (err) { | ||
| 1714 | dev_err(&pdev->dev, "Unable to declare CEU memory.\n"); | ||
| 1715 | return err; | ||
| 1716 | } | ||
| 1717 | |||
| 1718 | pcdev->video_limit = resource_size(res); | ||
| 1719 | } | ||
| 1720 | |||
| 1721 | /* request irq */ | ||
| 1722 | err = devm_request_irq(&pdev->dev, pcdev->irq, sh_mobile_ceu_irq, | ||
| 1723 | 0, dev_name(&pdev->dev), pcdev); | ||
| 1724 | if (err) { | ||
| 1725 | dev_err(&pdev->dev, "Unable to register CEU interrupt.\n"); | ||
| 1726 | goto exit_release_mem; | ||
| 1727 | } | ||
| 1728 | |||
| 1729 | pm_suspend_ignore_children(&pdev->dev, true); | ||
| 1730 | pm_runtime_enable(&pdev->dev); | ||
| 1731 | pm_runtime_resume(&pdev->dev); | ||
| 1732 | |||
| 1733 | pcdev->ici.priv = pcdev; | ||
| 1734 | pcdev->ici.v4l2_dev.dev = &pdev->dev; | ||
| 1735 | pcdev->ici.nr = pdev->id; | ||
| 1736 | pcdev->ici.drv_name = dev_name(&pdev->dev); | ||
| 1737 | pcdev->ici.ops = &sh_mobile_ceu_host_ops; | ||
| 1738 | pcdev->ici.capabilities = SOCAM_HOST_CAP_STRIDE; | ||
| 1739 | |||
| 1740 | if (pcdev->pdata && pcdev->pdata->asd_sizes) { | ||
| 1741 | pcdev->ici.asd = pcdev->pdata->asd; | ||
| 1742 | pcdev->ici.asd_sizes = pcdev->pdata->asd_sizes; | ||
| 1743 | } | ||
| 1744 | |||
| 1745 | err = soc_camera_host_register(&pcdev->ici); | ||
| 1746 | if (err) | ||
| 1747 | goto exit_free_clk; | ||
| 1748 | |||
| 1749 | return 0; | ||
| 1750 | |||
| 1751 | exit_free_clk: | ||
| 1752 | pm_runtime_disable(&pdev->dev); | ||
| 1753 | exit_release_mem: | ||
| 1754 | if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) | ||
| 1755 | dma_release_declared_memory(&pdev->dev); | ||
| 1756 | return err; | ||
| 1757 | } | ||
| 1758 | |||
| 1759 | static int sh_mobile_ceu_remove(struct platform_device *pdev) | ||
| 1760 | { | ||
| 1761 | struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); | ||
| 1762 | |||
| 1763 | soc_camera_host_unregister(soc_host); | ||
| 1764 | pm_runtime_disable(&pdev->dev); | ||
| 1765 | if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) | ||
| 1766 | dma_release_declared_memory(&pdev->dev); | ||
| 1767 | |||
| 1768 | return 0; | ||
| 1769 | } | ||
| 1770 | |||
| 1771 | static int sh_mobile_ceu_runtime_nop(struct device *dev) | ||
| 1772 | { | ||
| 1773 | /* Runtime PM callback shared between ->runtime_suspend() | ||
| 1774 | * and ->runtime_resume(). Simply returns success. | ||
| 1775 | * | ||
| 1776 | * This driver re-initializes all registers after | ||
| 1777 | * pm_runtime_get_sync() anyway so there is no need | ||
| 1778 | * to save and restore registers here. | ||
| 1779 | */ | ||
| 1780 | return 0; | ||
| 1781 | } | ||
| 1782 | |||
| 1783 | static const struct dev_pm_ops sh_mobile_ceu_dev_pm_ops = { | ||
| 1784 | .runtime_suspend = sh_mobile_ceu_runtime_nop, | ||
| 1785 | .runtime_resume = sh_mobile_ceu_runtime_nop, | ||
| 1786 | }; | ||
| 1787 | |||
| 1788 | static const struct of_device_id sh_mobile_ceu_of_match[] = { | ||
| 1789 | { .compatible = "renesas,sh-mobile-ceu" }, | ||
| 1790 | { } | ||
| 1791 | }; | ||
| 1792 | MODULE_DEVICE_TABLE(of, sh_mobile_ceu_of_match); | ||
| 1793 | |||
| 1794 | static struct platform_driver sh_mobile_ceu_driver = { | ||
| 1795 | .driver = { | ||
| 1796 | .name = "sh_mobile_ceu", | ||
| 1797 | .pm = &sh_mobile_ceu_dev_pm_ops, | ||
| 1798 | .of_match_table = sh_mobile_ceu_of_match, | ||
| 1799 | }, | ||
| 1800 | .probe = sh_mobile_ceu_probe, | ||
| 1801 | .remove = sh_mobile_ceu_remove, | ||
| 1802 | }; | ||
| 1803 | |||
| 1804 | module_platform_driver(sh_mobile_ceu_driver); | ||
| 1805 | |||
| 1806 | MODULE_DESCRIPTION("SuperH Mobile CEU driver"); | ||
| 1807 | MODULE_AUTHOR("Magnus Damm"); | ||
| 1808 | MODULE_LICENSE("GPL"); | ||
| 1809 | MODULE_VERSION("0.1.0"); | ||
| 1810 | MODULE_ALIAS("platform:sh_mobile_ceu"); | ||
diff --git a/drivers/media/platform/soc_camera/soc_camera_platform.c b/drivers/media/platform/soc_camera/soc_camera_platform.c deleted file mode 100644 index 79fbe1fea95f..000000000000 --- a/drivers/media/platform/soc_camera/soc_camera_platform.c +++ /dev/null | |||
| @@ -1,188 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* | ||
| 3 | * Generic Platform Camera Driver | ||
| 4 | * | ||
| 5 | * Copyright (C) 2008 Magnus Damm | ||
| 6 | * Based on mt9m001 driver, | ||
| 7 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/module.h> | ||
| 12 | #include <linux/slab.h> | ||
| 13 | #include <linux/delay.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | #include <linux/videodev2.h> | ||
| 16 | #include <media/v4l2-subdev.h> | ||
| 17 | #include <media/soc_camera.h> | ||
| 18 | #include <linux/platform_data/media/soc_camera_platform.h> | ||
| 19 | |||
| 20 | struct soc_camera_platform_priv { | ||
| 21 | struct v4l2_subdev subdev; | ||
| 22 | }; | ||
| 23 | |||
| 24 | static struct soc_camera_platform_priv *get_priv(struct platform_device *pdev) | ||
| 25 | { | ||
| 26 | struct v4l2_subdev *subdev = platform_get_drvdata(pdev); | ||
| 27 | return container_of(subdev, struct soc_camera_platform_priv, subdev); | ||
| 28 | } | ||
| 29 | |||
| 30 | static int soc_camera_platform_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 31 | { | ||
| 32 | struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd); | ||
| 33 | return p->set_capture(p, enable); | ||
| 34 | } | ||
| 35 | |||
| 36 | static int soc_camera_platform_fill_fmt(struct v4l2_subdev *sd, | ||
| 37 | struct v4l2_subdev_pad_config *cfg, | ||
| 38 | struct v4l2_subdev_format *format) | ||
| 39 | { | ||
| 40 | struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd); | ||
| 41 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 42 | |||
| 43 | mf->width = p->format.width; | ||
| 44 | mf->height = p->format.height; | ||
| 45 | mf->code = p->format.code; | ||
| 46 | mf->colorspace = p->format.colorspace; | ||
| 47 | mf->field = p->format.field; | ||
| 48 | |||
| 49 | return 0; | ||
| 50 | } | ||
| 51 | |||
| 52 | static int soc_camera_platform_s_power(struct v4l2_subdev *sd, int on) | ||
| 53 | { | ||
| 54 | struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd); | ||
| 55 | |||
| 56 | return soc_camera_set_power(p->icd->control, &p->icd->sdesc->subdev_desc, NULL, on); | ||
| 57 | } | ||
| 58 | |||
| 59 | static const struct v4l2_subdev_core_ops platform_subdev_core_ops = { | ||
| 60 | .s_power = soc_camera_platform_s_power, | ||
| 61 | }; | ||
| 62 | |||
| 63 | static int soc_camera_platform_enum_mbus_code(struct v4l2_subdev *sd, | ||
| 64 | struct v4l2_subdev_pad_config *cfg, | ||
| 65 | struct v4l2_subdev_mbus_code_enum *code) | ||
| 66 | { | ||
| 67 | struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd); | ||
| 68 | |||
| 69 | if (code->pad || code->index) | ||
| 70 | return -EINVAL; | ||
| 71 | |||
| 72 | code->code = p->format.code; | ||
| 73 | return 0; | ||
| 74 | } | ||
| 75 | |||
| 76 | static int soc_camera_platform_get_selection(struct v4l2_subdev *sd, | ||
| 77 | struct v4l2_subdev_pad_config *cfg, | ||
| 78 | struct v4l2_subdev_selection *sel) | ||
| 79 | { | ||
| 80 | struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd); | ||
| 81 | |||
| 82 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 83 | return -EINVAL; | ||
| 84 | |||
| 85 | switch (sel->target) { | ||
| 86 | case V4L2_SEL_TGT_CROP_BOUNDS: | ||
| 87 | case V4L2_SEL_TGT_CROP_DEFAULT: | ||
| 88 | case V4L2_SEL_TGT_CROP: | ||
| 89 | sel->r.left = 0; | ||
| 90 | sel->r.top = 0; | ||
| 91 | sel->r.width = p->format.width; | ||
| 92 | sel->r.height = p->format.height; | ||
| 93 | return 0; | ||
| 94 | default: | ||
| 95 | return -EINVAL; | ||
| 96 | } | ||
| 97 | } | ||
| 98 | |||
| 99 | static int soc_camera_platform_g_mbus_config(struct v4l2_subdev *sd, | ||
| 100 | struct v4l2_mbus_config *cfg) | ||
| 101 | { | ||
| 102 | struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd); | ||
| 103 | |||
| 104 | cfg->flags = p->mbus_param; | ||
| 105 | cfg->type = p->mbus_type; | ||
| 106 | |||
| 107 | return 0; | ||
| 108 | } | ||
| 109 | |||
| 110 | static const struct v4l2_subdev_video_ops platform_subdev_video_ops = { | ||
| 111 | .s_stream = soc_camera_platform_s_stream, | ||
| 112 | .g_mbus_config = soc_camera_platform_g_mbus_config, | ||
| 113 | }; | ||
| 114 | |||
| 115 | static const struct v4l2_subdev_pad_ops platform_subdev_pad_ops = { | ||
| 116 | .enum_mbus_code = soc_camera_platform_enum_mbus_code, | ||
| 117 | .get_selection = soc_camera_platform_get_selection, | ||
| 118 | .get_fmt = soc_camera_platform_fill_fmt, | ||
| 119 | .set_fmt = soc_camera_platform_fill_fmt, | ||
| 120 | }; | ||
| 121 | |||
| 122 | static const struct v4l2_subdev_ops platform_subdev_ops = { | ||
| 123 | .core = &platform_subdev_core_ops, | ||
| 124 | .video = &platform_subdev_video_ops, | ||
| 125 | .pad = &platform_subdev_pad_ops, | ||
| 126 | }; | ||
| 127 | |||
| 128 | static int soc_camera_platform_probe(struct platform_device *pdev) | ||
| 129 | { | ||
| 130 | struct soc_camera_host *ici; | ||
| 131 | struct soc_camera_platform_priv *priv; | ||
| 132 | struct soc_camera_platform_info *p = pdev->dev.platform_data; | ||
| 133 | struct soc_camera_device *icd; | ||
| 134 | |||
| 135 | if (!p) | ||
| 136 | return -EINVAL; | ||
| 137 | |||
| 138 | if (!p->icd) { | ||
| 139 | dev_err(&pdev->dev, | ||
| 140 | "Platform has not set soc_camera_device pointer!\n"); | ||
| 141 | return -EINVAL; | ||
| 142 | } | ||
| 143 | |||
| 144 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); | ||
| 145 | if (!priv) | ||
| 146 | return -ENOMEM; | ||
| 147 | |||
| 148 | icd = p->icd; | ||
| 149 | |||
| 150 | /* soc-camera convention: control's drvdata points to the subdev */ | ||
| 151 | platform_set_drvdata(pdev, &priv->subdev); | ||
| 152 | /* Set the control device reference */ | ||
| 153 | icd->control = &pdev->dev; | ||
| 154 | |||
| 155 | ici = to_soc_camera_host(icd->parent); | ||
| 156 | |||
| 157 | v4l2_subdev_init(&priv->subdev, &platform_subdev_ops); | ||
| 158 | v4l2_set_subdevdata(&priv->subdev, p); | ||
| 159 | strscpy(priv->subdev.name, dev_name(&pdev->dev), | ||
| 160 | sizeof(priv->subdev.name)); | ||
| 161 | |||
| 162 | return v4l2_device_register_subdev(&ici->v4l2_dev, &priv->subdev); | ||
| 163 | } | ||
| 164 | |||
| 165 | static int soc_camera_platform_remove(struct platform_device *pdev) | ||
| 166 | { | ||
| 167 | struct soc_camera_platform_priv *priv = get_priv(pdev); | ||
| 168 | struct soc_camera_platform_info *p = v4l2_get_subdevdata(&priv->subdev); | ||
| 169 | |||
| 170 | p->icd->control = NULL; | ||
| 171 | v4l2_device_unregister_subdev(&priv->subdev); | ||
| 172 | return 0; | ||
| 173 | } | ||
| 174 | |||
| 175 | static struct platform_driver soc_camera_platform_driver = { | ||
| 176 | .driver = { | ||
| 177 | .name = "soc_camera_platform", | ||
| 178 | }, | ||
| 179 | .probe = soc_camera_platform_probe, | ||
| 180 | .remove = soc_camera_platform_remove, | ||
| 181 | }; | ||
| 182 | |||
| 183 | module_platform_driver(soc_camera_platform_driver); | ||
| 184 | |||
| 185 | MODULE_DESCRIPTION("SoC Camera Platform driver"); | ||
| 186 | MODULE_AUTHOR("Magnus Damm"); | ||
| 187 | MODULE_LICENSE("GPL v2"); | ||
| 188 | MODULE_ALIAS("platform:soc_camera_platform"); | ||
diff --git a/drivers/media/platform/soc_camera/soc_scale_crop.c b/drivers/media/platform/soc_camera/soc_scale_crop.c deleted file mode 100644 index 8d25ca0490f7..000000000000 --- a/drivers/media/platform/soc_camera/soc_scale_crop.c +++ /dev/null | |||
| @@ -1,426 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * soc-camera generic scaling-cropping manipulation functions | ||
| 3 | * | ||
| 4 | * Copyright (C) 2013 Guennadi Liakhovetski <g.liakhovetski@gmx.de> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/device.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | |||
| 15 | #include <media/soc_camera.h> | ||
| 16 | #include <media/v4l2-common.h> | ||
| 17 | |||
| 18 | #include "soc_scale_crop.h" | ||
| 19 | |||
| 20 | #ifdef DEBUG_GEOMETRY | ||
| 21 | #define dev_geo dev_info | ||
| 22 | #else | ||
| 23 | #define dev_geo dev_dbg | ||
| 24 | #endif | ||
| 25 | |||
| 26 | /* Check if any dimension of r1 is smaller than respective one of r2 */ | ||
| 27 | static bool is_smaller(const struct v4l2_rect *r1, const struct v4l2_rect *r2) | ||
| 28 | { | ||
| 29 | return r1->width < r2->width || r1->height < r2->height; | ||
| 30 | } | ||
| 31 | |||
| 32 | /* Check if r1 fails to cover r2 */ | ||
| 33 | static bool is_inside(const struct v4l2_rect *r1, const struct v4l2_rect *r2) | ||
| 34 | { | ||
| 35 | return r1->left > r2->left || r1->top > r2->top || | ||
| 36 | r1->left + r1->width < r2->left + r2->width || | ||
| 37 | r1->top + r1->height < r2->top + r2->height; | ||
| 38 | } | ||
| 39 | |||
| 40 | /* Get and store current client crop */ | ||
| 41 | int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect) | ||
| 42 | { | ||
| 43 | struct v4l2_subdev_selection sdsel = { | ||
| 44 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 45 | .target = V4L2_SEL_TGT_CROP, | ||
| 46 | }; | ||
| 47 | int ret; | ||
| 48 | |||
| 49 | ret = v4l2_subdev_call(sd, pad, get_selection, NULL, &sdsel); | ||
| 50 | if (!ret) { | ||
| 51 | *rect = sdsel.r; | ||
| 52 | return ret; | ||
| 53 | } | ||
| 54 | |||
| 55 | sdsel.target = V4L2_SEL_TGT_CROP_BOUNDS; | ||
| 56 | ret = v4l2_subdev_call(sd, pad, get_selection, NULL, &sdsel); | ||
| 57 | if (!ret) | ||
| 58 | *rect = sdsel.r; | ||
| 59 | |||
| 60 | return ret; | ||
| 61 | } | ||
| 62 | EXPORT_SYMBOL(soc_camera_client_g_rect); | ||
| 63 | |||
| 64 | /* Client crop has changed, update our sub-rectangle to remain within the area */ | ||
| 65 | static void move_and_crop_subrect(struct v4l2_rect *rect, | ||
| 66 | struct v4l2_rect *subrect) | ||
| 67 | { | ||
| 68 | if (rect->width < subrect->width) | ||
| 69 | subrect->width = rect->width; | ||
| 70 | |||
| 71 | if (rect->height < subrect->height) | ||
| 72 | subrect->height = rect->height; | ||
| 73 | |||
| 74 | if (rect->left > subrect->left) | ||
| 75 | subrect->left = rect->left; | ||
| 76 | else if (rect->left + rect->width < | ||
| 77 | subrect->left + subrect->width) | ||
| 78 | subrect->left = rect->left + rect->width - | ||
| 79 | subrect->width; | ||
| 80 | |||
| 81 | if (rect->top > subrect->top) | ||
| 82 | subrect->top = rect->top; | ||
| 83 | else if (rect->top + rect->height < | ||
| 84 | subrect->top + subrect->height) | ||
| 85 | subrect->top = rect->top + rect->height - | ||
| 86 | subrect->height; | ||
| 87 | } | ||
| 88 | |||
| 89 | /* | ||
| 90 | * The common for both scaling and cropping iterative approach is: | ||
| 91 | * 1. try if the client can produce exactly what requested by the user | ||
| 92 | * 2. if (1) failed, try to double the client image until we get one big enough | ||
| 93 | * 3. if (2) failed, try to request the maximum image | ||
| 94 | */ | ||
| 95 | int soc_camera_client_s_selection(struct v4l2_subdev *sd, | ||
| 96 | struct v4l2_selection *sel, struct v4l2_selection *cam_sel, | ||
| 97 | struct v4l2_rect *target_rect, struct v4l2_rect *subrect) | ||
| 98 | { | ||
| 99 | struct v4l2_subdev_selection sdsel = { | ||
| 100 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 101 | .target = sel->target, | ||
| 102 | .flags = sel->flags, | ||
| 103 | .r = sel->r, | ||
| 104 | }; | ||
| 105 | struct v4l2_subdev_selection bounds = { | ||
| 106 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 107 | .target = V4L2_SEL_TGT_CROP_BOUNDS, | ||
| 108 | }; | ||
| 109 | struct v4l2_rect *rect = &sel->r, *cam_rect = &cam_sel->r; | ||
| 110 | struct device *dev = sd->v4l2_dev->dev; | ||
| 111 | int ret; | ||
| 112 | unsigned int width, height; | ||
| 113 | |||
| 114 | v4l2_subdev_call(sd, pad, set_selection, NULL, &sdsel); | ||
| 115 | sel->r = sdsel.r; | ||
| 116 | ret = soc_camera_client_g_rect(sd, cam_rect); | ||
| 117 | if (ret < 0) | ||
| 118 | return ret; | ||
| 119 | |||
| 120 | /* | ||
| 121 | * Now cam_crop contains the current camera input rectangle, and it must | ||
| 122 | * be within camera cropcap bounds | ||
| 123 | */ | ||
| 124 | if (!memcmp(rect, cam_rect, sizeof(*rect))) { | ||
| 125 | /* Even if camera S_SELECTION failed, but camera rectangle matches */ | ||
| 126 | dev_dbg(dev, "Camera S_SELECTION successful for %dx%d@%d:%d\n", | ||
| 127 | rect->width, rect->height, rect->left, rect->top); | ||
| 128 | *target_rect = *cam_rect; | ||
| 129 | return 0; | ||
| 130 | } | ||
| 131 | |||
| 132 | /* Try to fix cropping, that camera hasn't managed to set */ | ||
| 133 | dev_geo(dev, "Fix camera S_SELECTION for %dx%d@%d:%d to %dx%d@%d:%d\n", | ||
| 134 | cam_rect->width, cam_rect->height, | ||
| 135 | cam_rect->left, cam_rect->top, | ||
| 136 | rect->width, rect->height, rect->left, rect->top); | ||
| 137 | |||
| 138 | /* We need sensor maximum rectangle */ | ||
| 139 | ret = v4l2_subdev_call(sd, pad, get_selection, NULL, &bounds); | ||
| 140 | if (ret < 0) | ||
| 141 | return ret; | ||
| 142 | |||
| 143 | /* Put user requested rectangle within sensor bounds */ | ||
| 144 | soc_camera_limit_side(&rect->left, &rect->width, sdsel.r.left, 2, | ||
| 145 | bounds.r.width); | ||
| 146 | soc_camera_limit_side(&rect->top, &rect->height, sdsel.r.top, 4, | ||
| 147 | bounds.r.height); | ||
| 148 | |||
| 149 | /* | ||
| 150 | * Popular special case - some cameras can only handle fixed sizes like | ||
| 151 | * QVGA, VGA,... Take care to avoid infinite loop. | ||
| 152 | */ | ||
| 153 | width = max_t(unsigned int, cam_rect->width, 2); | ||
| 154 | height = max_t(unsigned int, cam_rect->height, 2); | ||
| 155 | |||
| 156 | /* | ||
| 157 | * Loop as long as sensor is not covering the requested rectangle and | ||
| 158 | * is still within its bounds | ||
| 159 | */ | ||
| 160 | while (!ret && (is_smaller(cam_rect, rect) || | ||
| 161 | is_inside(cam_rect, rect)) && | ||
| 162 | (bounds.r.width > width || bounds.r.height > height)) { | ||
| 163 | |||
| 164 | width *= 2; | ||
| 165 | height *= 2; | ||
| 166 | |||
| 167 | cam_rect->width = width; | ||
| 168 | cam_rect->height = height; | ||
| 169 | |||
| 170 | /* | ||
| 171 | * We do not know what capabilities the camera has to set up | ||
| 172 | * left and top borders. We could try to be smarter in iterating | ||
| 173 | * them, e.g., if camera current left is to the right of the | ||
| 174 | * target left, set it to the middle point between the current | ||
| 175 | * left and minimum left. But that would add too much | ||
| 176 | * complexity: we would have to iterate each border separately. | ||
| 177 | * Instead we just drop to the left and top bounds. | ||
| 178 | */ | ||
| 179 | if (cam_rect->left > rect->left) | ||
| 180 | cam_rect->left = bounds.r.left; | ||
| 181 | |||
| 182 | if (cam_rect->left + cam_rect->width < rect->left + rect->width) | ||
| 183 | cam_rect->width = rect->left + rect->width - | ||
| 184 | cam_rect->left; | ||
| 185 | |||
| 186 | if (cam_rect->top > rect->top) | ||
| 187 | cam_rect->top = bounds.r.top; | ||
| 188 | |||
| 189 | if (cam_rect->top + cam_rect->height < rect->top + rect->height) | ||
| 190 | cam_rect->height = rect->top + rect->height - | ||
| 191 | cam_rect->top; | ||
| 192 | |||
| 193 | sdsel.r = *cam_rect; | ||
| 194 | v4l2_subdev_call(sd, pad, set_selection, NULL, &sdsel); | ||
| 195 | *cam_rect = sdsel.r; | ||
| 196 | ret = soc_camera_client_g_rect(sd, cam_rect); | ||
| 197 | dev_geo(dev, "Camera S_SELECTION %d for %dx%d@%d:%d\n", ret, | ||
| 198 | cam_rect->width, cam_rect->height, | ||
| 199 | cam_rect->left, cam_rect->top); | ||
| 200 | } | ||
| 201 | |||
| 202 | /* S_SELECTION must not modify the rectangle */ | ||
| 203 | if (is_smaller(cam_rect, rect) || is_inside(cam_rect, rect)) { | ||
| 204 | /* | ||
| 205 | * The camera failed to configure a suitable cropping, | ||
| 206 | * we cannot use the current rectangle, set to max | ||
| 207 | */ | ||
| 208 | sdsel.r = bounds.r; | ||
| 209 | v4l2_subdev_call(sd, pad, set_selection, NULL, &sdsel); | ||
| 210 | *cam_rect = sdsel.r; | ||
| 211 | |||
| 212 | ret = soc_camera_client_g_rect(sd, cam_rect); | ||
| 213 | dev_geo(dev, "Camera S_SELECTION %d for max %dx%d@%d:%d\n", ret, | ||
| 214 | cam_rect->width, cam_rect->height, | ||
| 215 | cam_rect->left, cam_rect->top); | ||
| 216 | } | ||
| 217 | |||
| 218 | if (!ret) { | ||
| 219 | *target_rect = *cam_rect; | ||
| 220 | move_and_crop_subrect(target_rect, subrect); | ||
| 221 | } | ||
| 222 | |||
| 223 | return ret; | ||
| 224 | } | ||
| 225 | EXPORT_SYMBOL(soc_camera_client_s_selection); | ||
| 226 | |||
| 227 | /* Iterative set_fmt, also updates cached client crop on success */ | ||
| 228 | static int client_set_fmt(struct soc_camera_device *icd, | ||
| 229 | struct v4l2_rect *rect, struct v4l2_rect *subrect, | ||
| 230 | unsigned int max_width, unsigned int max_height, | ||
| 231 | struct v4l2_subdev_format *format, bool host_can_scale) | ||
| 232 | { | ||
| 233 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 234 | struct device *dev = icd->parent; | ||
| 235 | struct v4l2_mbus_framefmt *mf = &format->format; | ||
| 236 | unsigned int width = mf->width, height = mf->height, tmp_w, tmp_h; | ||
| 237 | struct v4l2_subdev_selection sdsel = { | ||
| 238 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 239 | .target = V4L2_SEL_TGT_CROP_BOUNDS, | ||
| 240 | }; | ||
| 241 | bool host_1to1; | ||
| 242 | int ret; | ||
| 243 | |||
| 244 | ret = v4l2_device_call_until_err(sd->v4l2_dev, | ||
| 245 | soc_camera_grp_id(icd), pad, | ||
| 246 | set_fmt, NULL, format); | ||
| 247 | if (ret < 0) | ||
| 248 | return ret; | ||
| 249 | |||
| 250 | dev_geo(dev, "camera scaled to %ux%u\n", mf->width, mf->height); | ||
| 251 | |||
| 252 | if (width == mf->width && height == mf->height) { | ||
| 253 | /* Perfect! The client has done it all. */ | ||
| 254 | host_1to1 = true; | ||
| 255 | goto update_cache; | ||
| 256 | } | ||
| 257 | |||
| 258 | host_1to1 = false; | ||
| 259 | if (!host_can_scale) | ||
| 260 | goto update_cache; | ||
| 261 | |||
| 262 | ret = v4l2_subdev_call(sd, pad, get_selection, NULL, &sdsel); | ||
| 263 | if (ret < 0) | ||
| 264 | return ret; | ||
| 265 | |||
| 266 | if (max_width > sdsel.r.width) | ||
| 267 | max_width = sdsel.r.width; | ||
| 268 | if (max_height > sdsel.r.height) | ||
| 269 | max_height = sdsel.r.height; | ||
| 270 | |||
| 271 | /* Camera set a format, but geometry is not precise, try to improve */ | ||
| 272 | tmp_w = mf->width; | ||
| 273 | tmp_h = mf->height; | ||
| 274 | |||
| 275 | /* width <= max_width && height <= max_height - guaranteed by try_fmt */ | ||
| 276 | while ((width > tmp_w || height > tmp_h) && | ||
| 277 | tmp_w < max_width && tmp_h < max_height) { | ||
| 278 | tmp_w = min(2 * tmp_w, max_width); | ||
| 279 | tmp_h = min(2 * tmp_h, max_height); | ||
| 280 | mf->width = tmp_w; | ||
| 281 | mf->height = tmp_h; | ||
| 282 | ret = v4l2_device_call_until_err(sd->v4l2_dev, | ||
| 283 | soc_camera_grp_id(icd), pad, | ||
| 284 | set_fmt, NULL, format); | ||
| 285 | dev_geo(dev, "Camera scaled to %ux%u\n", | ||
| 286 | mf->width, mf->height); | ||
| 287 | if (ret < 0) { | ||
| 288 | /* This shouldn't happen */ | ||
| 289 | dev_err(dev, "Client failed to set format: %d\n", ret); | ||
| 290 | return ret; | ||
| 291 | } | ||
| 292 | } | ||
| 293 | |||
| 294 | update_cache: | ||
| 295 | /* Update cache */ | ||
| 296 | ret = soc_camera_client_g_rect(sd, rect); | ||
| 297 | if (ret < 0) | ||
| 298 | return ret; | ||
| 299 | |||
| 300 | if (host_1to1) | ||
| 301 | *subrect = *rect; | ||
| 302 | else | ||
| 303 | move_and_crop_subrect(rect, subrect); | ||
| 304 | |||
| 305 | return 0; | ||
| 306 | } | ||
| 307 | |||
| 308 | /** | ||
| 309 | * soc_camera_client_scale | ||
| 310 | * @icd: soc-camera device | ||
| 311 | * @rect: camera cropping window | ||
| 312 | * @subrect: part of rect, sent to the user | ||
| 313 | * @mf: in- / output camera output window | ||
| 314 | * @width: on input: max host input width; | ||
| 315 | * on output: user width, mapped back to input | ||
| 316 | * @height: on input: max host input height; | ||
| 317 | * on output: user height, mapped back to input | ||
| 318 | * @host_can_scale: host can scale this pixel format | ||
| 319 | * @shift: shift, used for scaling | ||
| 320 | */ | ||
| 321 | int soc_camera_client_scale(struct soc_camera_device *icd, | ||
| 322 | struct v4l2_rect *rect, struct v4l2_rect *subrect, | ||
| 323 | struct v4l2_mbus_framefmt *mf, | ||
| 324 | unsigned int *width, unsigned int *height, | ||
| 325 | bool host_can_scale, unsigned int shift) | ||
| 326 | { | ||
| 327 | struct device *dev = icd->parent; | ||
| 328 | struct v4l2_subdev_format fmt_tmp = { | ||
| 329 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | ||
| 330 | .format = *mf, | ||
| 331 | }; | ||
| 332 | struct v4l2_mbus_framefmt *mf_tmp = &fmt_tmp.format; | ||
| 333 | unsigned int scale_h, scale_v; | ||
| 334 | int ret; | ||
| 335 | |||
| 336 | /* | ||
| 337 | * 5. Apply iterative camera S_FMT for camera user window (also updates | ||
| 338 | * client crop cache and the imaginary sub-rectangle). | ||
| 339 | */ | ||
| 340 | ret = client_set_fmt(icd, rect, subrect, *width, *height, | ||
| 341 | &fmt_tmp, host_can_scale); | ||
| 342 | if (ret < 0) | ||
| 343 | return ret; | ||
| 344 | |||
| 345 | dev_geo(dev, "5: camera scaled to %ux%u\n", | ||
| 346 | mf_tmp->width, mf_tmp->height); | ||
| 347 | |||
| 348 | /* 6. Retrieve camera output window (g_fmt) */ | ||
| 349 | |||
| 350 | /* unneeded - it is already in "mf_tmp" */ | ||
| 351 | |||
| 352 | /* 7. Calculate new client scales. */ | ||
| 353 | scale_h = soc_camera_calc_scale(rect->width, shift, mf_tmp->width); | ||
| 354 | scale_v = soc_camera_calc_scale(rect->height, shift, mf_tmp->height); | ||
| 355 | |||
| 356 | mf->width = mf_tmp->width; | ||
| 357 | mf->height = mf_tmp->height; | ||
| 358 | mf->colorspace = mf_tmp->colorspace; | ||
| 359 | |||
| 360 | /* | ||
| 361 | * 8. Calculate new host crop - apply camera scales to previously | ||
| 362 | * updated "effective" crop. | ||
| 363 | */ | ||
| 364 | *width = soc_camera_shift_scale(subrect->width, shift, scale_h); | ||
| 365 | *height = soc_camera_shift_scale(subrect->height, shift, scale_v); | ||
| 366 | |||
| 367 | dev_geo(dev, "8: new client sub-window %ux%u\n", *width, *height); | ||
| 368 | |||
| 369 | return 0; | ||
| 370 | } | ||
| 371 | EXPORT_SYMBOL(soc_camera_client_scale); | ||
| 372 | |||
| 373 | /* | ||
| 374 | * Calculate real client output window by applying new scales to the current | ||
| 375 | * client crop. New scales are calculated from the requested output format and | ||
| 376 | * host crop, mapped backed onto the client input (subrect). | ||
| 377 | */ | ||
| 378 | void soc_camera_calc_client_output(struct soc_camera_device *icd, | ||
| 379 | struct v4l2_rect *rect, struct v4l2_rect *subrect, | ||
| 380 | const struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf, | ||
| 381 | unsigned int shift) | ||
| 382 | { | ||
| 383 | struct device *dev = icd->parent; | ||
| 384 | unsigned int scale_v, scale_h; | ||
| 385 | |||
| 386 | if (subrect->width == rect->width && | ||
| 387 | subrect->height == rect->height) { | ||
| 388 | /* No sub-cropping */ | ||
| 389 | mf->width = pix->width; | ||
| 390 | mf->height = pix->height; | ||
| 391 | return; | ||
| 392 | } | ||
| 393 | |||
| 394 | /* 1.-2. Current camera scales and subwin - cached. */ | ||
| 395 | |||
| 396 | dev_geo(dev, "2: subwin %ux%u@%u:%u\n", | ||
| 397 | subrect->width, subrect->height, | ||
| 398 | subrect->left, subrect->top); | ||
| 399 | |||
| 400 | /* | ||
| 401 | * 3. Calculate new combined scales from input sub-window to requested | ||
| 402 | * user window. | ||
| 403 | */ | ||
| 404 | |||
| 405 | /* | ||
| 406 | * TODO: CEU cannot scale images larger than VGA to smaller than SubQCIF | ||
| 407 | * (128x96) or larger than VGA. This and similar limitations have to be | ||
| 408 | * taken into account here. | ||
| 409 | */ | ||
| 410 | scale_h = soc_camera_calc_scale(subrect->width, shift, pix->width); | ||
| 411 | scale_v = soc_camera_calc_scale(subrect->height, shift, pix->height); | ||
| 412 | |||
| 413 | dev_geo(dev, "3: scales %u:%u\n", scale_h, scale_v); | ||
| 414 | |||
| 415 | /* | ||
| 416 | * 4. Calculate desired client output window by applying combined scales | ||
| 417 | * to client (real) input window. | ||
| 418 | */ | ||
| 419 | mf->width = soc_camera_shift_scale(rect->width, shift, scale_h); | ||
| 420 | mf->height = soc_camera_shift_scale(rect->height, shift, scale_v); | ||
| 421 | } | ||
| 422 | EXPORT_SYMBOL(soc_camera_calc_client_output); | ||
| 423 | |||
| 424 | MODULE_DESCRIPTION("soc-camera scaling-cropping functions"); | ||
| 425 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | ||
| 426 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/platform/soc_camera/soc_scale_crop.h b/drivers/media/platform/soc_camera/soc_scale_crop.h deleted file mode 100644 index 9ca469312a1f..000000000000 --- a/drivers/media/platform/soc_camera/soc_scale_crop.h +++ /dev/null | |||
| @@ -1,47 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * soc-camera generic scaling-cropping manipulation functions | ||
| 3 | * | ||
| 4 | * Copyright (C) 2013 Guennadi Liakhovetski <g.liakhovetski@gmx.de> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef SOC_SCALE_CROP_H | ||
| 13 | #define SOC_SCALE_CROP_H | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | |||
| 17 | struct soc_camera_device; | ||
| 18 | |||
| 19 | struct v4l2_selection; | ||
| 20 | struct v4l2_mbus_framefmt; | ||
| 21 | struct v4l2_pix_format; | ||
| 22 | struct v4l2_rect; | ||
| 23 | struct v4l2_subdev; | ||
| 24 | |||
| 25 | static inline unsigned int soc_camera_shift_scale(unsigned int size, | ||
| 26 | unsigned int shift, unsigned int scale) | ||
| 27 | { | ||
| 28 | return DIV_ROUND_CLOSEST(size << shift, scale); | ||
| 29 | } | ||
| 30 | |||
| 31 | #define soc_camera_calc_scale(in, shift, out) soc_camera_shift_scale(in, shift, out) | ||
| 32 | |||
| 33 | int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect); | ||
| 34 | int soc_camera_client_s_selection(struct v4l2_subdev *sd, | ||
| 35 | struct v4l2_selection *sel, struct v4l2_selection *cam_sel, | ||
| 36 | struct v4l2_rect *target_rect, struct v4l2_rect *subrect); | ||
| 37 | int soc_camera_client_scale(struct soc_camera_device *icd, | ||
| 38 | struct v4l2_rect *rect, struct v4l2_rect *subrect, | ||
| 39 | struct v4l2_mbus_framefmt *mf, | ||
| 40 | unsigned int *width, unsigned int *height, | ||
| 41 | bool host_can_scale, unsigned int shift); | ||
| 42 | void soc_camera_calc_client_output(struct soc_camera_device *icd, | ||
| 43 | struct v4l2_rect *rect, struct v4l2_rect *subrect, | ||
| 44 | const struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf, | ||
| 45 | unsigned int shift); | ||
| 46 | |||
| 47 | #endif | ||
diff --git a/drivers/media/platform/sti/bdisp/bdisp-debug.c b/drivers/media/platform/sti/bdisp/bdisp-debug.c index c6a4e2de5c0c..77ca7517fa3e 100644 --- a/drivers/media/platform/sti/bdisp/bdisp-debug.c +++ b/drivers/media/platform/sti/bdisp/bdisp-debug.c | |||
| @@ -315,7 +315,7 @@ static void bdisp_dbg_dump_ivmx(struct seq_file *s, | |||
| 315 | seq_puts(s, "Unknown conversion\n"); | 315 | seq_puts(s, "Unknown conversion\n"); |
| 316 | } | 316 | } |
| 317 | 317 | ||
| 318 | static int bdisp_dbg_last_nodes(struct seq_file *s, void *data) | 318 | static int last_nodes_show(struct seq_file *s, void *data) |
| 319 | { | 319 | { |
| 320 | /* Not dumping all fields, focusing on significant ones */ | 320 | /* Not dumping all fields, focusing on significant ones */ |
| 321 | struct bdisp_dev *bdisp = s->private; | 321 | struct bdisp_dev *bdisp = s->private; |
| @@ -388,7 +388,7 @@ static int bdisp_dbg_last_nodes(struct seq_file *s, void *data) | |||
| 388 | return 0; | 388 | return 0; |
| 389 | } | 389 | } |
| 390 | 390 | ||
| 391 | static int bdisp_dbg_last_nodes_raw(struct seq_file *s, void *data) | 391 | static int last_nodes_raw_show(struct seq_file *s, void *data) |
| 392 | { | 392 | { |
| 393 | struct bdisp_dev *bdisp = s->private; | 393 | struct bdisp_dev *bdisp = s->private; |
| 394 | struct bdisp_node *node; | 394 | struct bdisp_node *node; |
| @@ -437,7 +437,7 @@ static const char *bdisp_fmt_to_str(struct bdisp_frame frame) | |||
| 437 | } | 437 | } |
| 438 | } | 438 | } |
| 439 | 439 | ||
| 440 | static int bdisp_dbg_last_request(struct seq_file *s, void *data) | 440 | static int last_request_show(struct seq_file *s, void *data) |
| 441 | { | 441 | { |
| 442 | struct bdisp_dev *bdisp = s->private; | 442 | struct bdisp_dev *bdisp = s->private; |
| 443 | struct bdisp_request *request = &bdisp->dbg.copy_request; | 443 | struct bdisp_request *request = &bdisp->dbg.copy_request; |
| @@ -474,7 +474,7 @@ static int bdisp_dbg_last_request(struct seq_file *s, void *data) | |||
| 474 | 474 | ||
| 475 | #define DUMP(reg) seq_printf(s, #reg " \t0x%08X\n", readl(bdisp->regs + reg)) | 475 | #define DUMP(reg) seq_printf(s, #reg " \t0x%08X\n", readl(bdisp->regs + reg)) |
| 476 | 476 | ||
| 477 | static int bdisp_dbg_regs(struct seq_file *s, void *data) | 477 | static int regs_show(struct seq_file *s, void *data) |
| 478 | { | 478 | { |
| 479 | struct bdisp_dev *bdisp = s->private; | 479 | struct bdisp_dev *bdisp = s->private; |
| 480 | int ret; | 480 | int ret; |
| @@ -582,7 +582,7 @@ static int bdisp_dbg_regs(struct seq_file *s, void *data) | |||
| 582 | 582 | ||
| 583 | #define SECOND 1000000 | 583 | #define SECOND 1000000 |
| 584 | 584 | ||
| 585 | static int bdisp_dbg_perf(struct seq_file *s, void *data) | 585 | static int perf_show(struct seq_file *s, void *data) |
| 586 | { | 586 | { |
| 587 | struct bdisp_dev *bdisp = s->private; | 587 | struct bdisp_dev *bdisp = s->private; |
| 588 | struct bdisp_request *request = &bdisp->dbg.copy_request; | 588 | struct bdisp_request *request = &bdisp->dbg.copy_request; |
| @@ -627,27 +627,15 @@ static int bdisp_dbg_perf(struct seq_file *s, void *data) | |||
| 627 | return 0; | 627 | return 0; |
| 628 | } | 628 | } |
| 629 | 629 | ||
| 630 | #define bdisp_dbg_declare(name) \ | ||
| 631 | static int bdisp_dbg_##name##_open(struct inode *i, struct file *f) \ | ||
| 632 | { \ | ||
| 633 | return single_open(f, bdisp_dbg_##name, i->i_private); \ | ||
| 634 | } \ | ||
| 635 | static const struct file_operations bdisp_dbg_##name##_fops = { \ | ||
| 636 | .open = bdisp_dbg_##name##_open, \ | ||
| 637 | .read = seq_read, \ | ||
| 638 | .llseek = seq_lseek, \ | ||
| 639 | .release = single_release, \ | ||
| 640 | } | ||
| 641 | |||
| 642 | #define bdisp_dbg_create_entry(name) \ | 630 | #define bdisp_dbg_create_entry(name) \ |
| 643 | debugfs_create_file(#name, S_IRUGO, bdisp->dbg.debugfs_entry, bdisp, \ | 631 | debugfs_create_file(#name, S_IRUGO, bdisp->dbg.debugfs_entry, bdisp, \ |
| 644 | &bdisp_dbg_##name##_fops) | 632 | &name##_fops) |
| 645 | 633 | ||
| 646 | bdisp_dbg_declare(regs); | 634 | DEFINE_SHOW_ATTRIBUTE(regs); |
| 647 | bdisp_dbg_declare(last_nodes); | 635 | DEFINE_SHOW_ATTRIBUTE(last_nodes); |
| 648 | bdisp_dbg_declare(last_nodes_raw); | 636 | DEFINE_SHOW_ATTRIBUTE(last_nodes_raw); |
| 649 | bdisp_dbg_declare(last_request); | 637 | DEFINE_SHOW_ATTRIBUTE(last_request); |
| 650 | bdisp_dbg_declare(perf); | 638 | DEFINE_SHOW_ATTRIBUTE(perf); |
| 651 | 639 | ||
| 652 | int bdisp_debugfs_create(struct bdisp_dev *bdisp) | 640 | int bdisp_debugfs_create(struct bdisp_dev *bdisp) |
| 653 | { | 641 | { |
diff --git a/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h b/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h index 3dbb3a287cc0..c9d6021904cd 100644 --- a/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h +++ b/drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.h | |||
| @@ -193,7 +193,7 @@ struct c8sectpfei { | |||
| 193 | #define C8SECTPFE_SYS_ENABLE BIT(0) | 193 | #define C8SECTPFE_SYS_ENABLE BIT(0) |
| 194 | 194 | ||
| 195 | /* | 195 | /* |
| 196 | * Ponter record data structure required for each input block | 196 | * Pointer record data structure required for each input block |
| 197 | * see Table 82 on page 167 of functional specification. | 197 | * see Table 82 on page 167 of functional specification. |
| 198 | */ | 198 | */ |
| 199 | 199 | ||
diff --git a/drivers/media/platform/sti/delta/delta.h b/drivers/media/platform/sti/delta/delta.h index 2ba99922c05b..914556030e70 100644 --- a/drivers/media/platform/sti/delta/delta.h +++ b/drivers/media/platform/sti/delta/delta.h | |||
| @@ -286,7 +286,7 @@ struct delta_dec { | |||
| 286 | * Header parsing must be done using decode(), giving | 286 | * Header parsing must be done using decode(), giving |
| 287 | * explicitly header access unit or first access unit of bitstream. | 287 | * explicitly header access unit or first access unit of bitstream. |
| 288 | * If no valid header is found, get_streaminfo will return -ENODATA, | 288 | * If no valid header is found, get_streaminfo will return -ENODATA, |
| 289 | * in this case the next bistream access unit must be decoded till | 289 | * in this case the next bitstream access unit must be decoded till |
| 290 | * get_streaminfo becomes successful. | 290 | * get_streaminfo becomes successful. |
| 291 | */ | 291 | */ |
| 292 | int (*get_streaminfo)(struct delta_ctx *ctx, | 292 | int (*get_streaminfo)(struct delta_ctx *ctx, |
diff --git a/drivers/media/platform/sti/hva/hva-debugfs.c b/drivers/media/platform/sti/hva/hva-debugfs.c index 9f7e8ac875d1..7d12a5b5d914 100644 --- a/drivers/media/platform/sti/hva/hva-debugfs.c +++ b/drivers/media/platform/sti/hva/hva-debugfs.c | |||
| @@ -271,7 +271,7 @@ static void hva_dbg_perf_compute(struct hva_ctx *ctx) | |||
| 271 | * device debug info | 271 | * device debug info |
| 272 | */ | 272 | */ |
| 273 | 273 | ||
| 274 | static int hva_dbg_device(struct seq_file *s, void *data) | 274 | static int device_show(struct seq_file *s, void *data) |
| 275 | { | 275 | { |
| 276 | struct hva_dev *hva = s->private; | 276 | struct hva_dev *hva = s->private; |
| 277 | 277 | ||
| @@ -281,7 +281,7 @@ static int hva_dbg_device(struct seq_file *s, void *data) | |||
| 281 | return 0; | 281 | return 0; |
| 282 | } | 282 | } |
| 283 | 283 | ||
| 284 | static int hva_dbg_encoders(struct seq_file *s, void *data) | 284 | static int encoders_show(struct seq_file *s, void *data) |
| 285 | { | 285 | { |
| 286 | struct hva_dev *hva = s->private; | 286 | struct hva_dev *hva = s->private; |
| 287 | unsigned int i = 0; | 287 | unsigned int i = 0; |
| @@ -299,7 +299,7 @@ static int hva_dbg_encoders(struct seq_file *s, void *data) | |||
| 299 | return 0; | 299 | return 0; |
| 300 | } | 300 | } |
| 301 | 301 | ||
| 302 | static int hva_dbg_last(struct seq_file *s, void *data) | 302 | static int last_show(struct seq_file *s, void *data) |
| 303 | { | 303 | { |
| 304 | struct hva_dev *hva = s->private; | 304 | struct hva_dev *hva = s->private; |
| 305 | struct hva_ctx *last_ctx = &hva->dbg.last_ctx; | 305 | struct hva_ctx *last_ctx = &hva->dbg.last_ctx; |
| @@ -316,7 +316,7 @@ static int hva_dbg_last(struct seq_file *s, void *data) | |||
| 316 | return 0; | 316 | return 0; |
| 317 | } | 317 | } |
| 318 | 318 | ||
| 319 | static int hva_dbg_regs(struct seq_file *s, void *data) | 319 | static int regs_show(struct seq_file *s, void *data) |
| 320 | { | 320 | { |
| 321 | struct hva_dev *hva = s->private; | 321 | struct hva_dev *hva = s->private; |
| 322 | 322 | ||
| @@ -325,26 +325,14 @@ static int hva_dbg_regs(struct seq_file *s, void *data) | |||
| 325 | return 0; | 325 | return 0; |
| 326 | } | 326 | } |
| 327 | 327 | ||
| 328 | #define hva_dbg_declare(name) \ | ||
| 329 | static int hva_dbg_##name##_open(struct inode *i, struct file *f) \ | ||
| 330 | { \ | ||
| 331 | return single_open(f, hva_dbg_##name, i->i_private); \ | ||
| 332 | } \ | ||
| 333 | static const struct file_operations hva_dbg_##name##_fops = { \ | ||
| 334 | .open = hva_dbg_##name##_open, \ | ||
| 335 | .read = seq_read, \ | ||
| 336 | .llseek = seq_lseek, \ | ||
| 337 | .release = single_release, \ | ||
| 338 | } | ||
| 339 | |||
| 340 | #define hva_dbg_create_entry(name) \ | 328 | #define hva_dbg_create_entry(name) \ |
| 341 | debugfs_create_file(#name, 0444, hva->dbg.debugfs_entry, hva, \ | 329 | debugfs_create_file(#name, 0444, hva->dbg.debugfs_entry, hva, \ |
| 342 | &hva_dbg_##name##_fops) | 330 | &name##_fops) |
| 343 | 331 | ||
| 344 | hva_dbg_declare(device); | 332 | DEFINE_SHOW_ATTRIBUTE(device); |
| 345 | hva_dbg_declare(encoders); | 333 | DEFINE_SHOW_ATTRIBUTE(encoders); |
| 346 | hva_dbg_declare(last); | 334 | DEFINE_SHOW_ATTRIBUTE(last); |
| 347 | hva_dbg_declare(regs); | 335 | DEFINE_SHOW_ATTRIBUTE(regs); |
| 348 | 336 | ||
| 349 | void hva_debugfs_create(struct hva_dev *hva) | 337 | void hva_debugfs_create(struct hva_dev *hva) |
| 350 | { | 338 | { |
| @@ -380,7 +368,7 @@ void hva_debugfs_remove(struct hva_dev *hva) | |||
| 380 | * context (instance) debug info | 368 | * context (instance) debug info |
| 381 | */ | 369 | */ |
| 382 | 370 | ||
| 383 | static int hva_dbg_ctx(struct seq_file *s, void *data) | 371 | static int ctx_show(struct seq_file *s, void *data) |
| 384 | { | 372 | { |
| 385 | struct hva_ctx *ctx = s->private; | 373 | struct hva_ctx *ctx = s->private; |
| 386 | 374 | ||
| @@ -392,7 +380,7 @@ static int hva_dbg_ctx(struct seq_file *s, void *data) | |||
| 392 | return 0; | 380 | return 0; |
| 393 | } | 381 | } |
| 394 | 382 | ||
| 395 | hva_dbg_declare(ctx); | 383 | DEFINE_SHOW_ATTRIBUTE(ctx); |
| 396 | 384 | ||
| 397 | void hva_dbg_ctx_create(struct hva_ctx *ctx) | 385 | void hva_dbg_ctx_create(struct hva_ctx *ctx) |
| 398 | { | 386 | { |
| @@ -407,7 +395,7 @@ void hva_dbg_ctx_create(struct hva_ctx *ctx) | |||
| 407 | 395 | ||
| 408 | ctx->dbg.debugfs_entry = debugfs_create_file(name, 0444, | 396 | ctx->dbg.debugfs_entry = debugfs_create_file(name, 0444, |
| 409 | hva->dbg.debugfs_entry, | 397 | hva->dbg.debugfs_entry, |
| 410 | ctx, &hva_dbg_ctx_fops); | 398 | ctx, &ctx_fops); |
| 411 | } | 399 | } |
| 412 | 400 | ||
| 413 | void hva_dbg_ctx_remove(struct hva_ctx *ctx) | 401 | void hva_dbg_ctx_remove(struct hva_ctx *ctx) |
diff --git a/drivers/media/platform/sti/hva/hva-h264.c b/drivers/media/platform/sti/hva/hva-h264.c index b61a5d337d2a..c34f7cf5aed2 100644 --- a/drivers/media/platform/sti/hva/hva-h264.c +++ b/drivers/media/platform/sti/hva/hva-h264.c | |||
| @@ -626,7 +626,7 @@ static int hva_h264_prepare_task(struct hva_ctx *pctx, | |||
| 626 | td->frame_width = frame_width; | 626 | td->frame_width = frame_width; |
| 627 | td->frame_height = frame_height; | 627 | td->frame_height = frame_height; |
| 628 | 628 | ||
| 629 | /* set frame alignement */ | 629 | /* set frame alignment */ |
| 630 | td->window_width = frame_width; | 630 | td->window_width = frame_width; |
| 631 | td->window_height = frame_height; | 631 | td->window_height = frame_height; |
| 632 | td->window_horizontal_offset = 0; | 632 | td->window_horizontal_offset = 0; |
diff --git a/drivers/media/platform/stm32/stm32-dcmi.c b/drivers/media/platform/stm32/stm32-dcmi.c index 6732874114cf..5fe5b38fa901 100644 --- a/drivers/media/platform/stm32/stm32-dcmi.c +++ b/drivers/media/platform/stm32/stm32-dcmi.c | |||
| @@ -1544,7 +1544,7 @@ static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier, | |||
| 1544 | 1544 | ||
| 1545 | dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev)); | 1545 | dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev)); |
| 1546 | 1546 | ||
| 1547 | /* Checks internaly if vdev has been init or not */ | 1547 | /* Checks internally if vdev has been init or not */ |
| 1548 | video_unregister_device(dcmi->vdev); | 1548 | video_unregister_device(dcmi->vdev); |
| 1549 | } | 1549 | } |
| 1550 | 1550 | ||
diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c index 6950585edb5a..4c79eb64a7a7 100644 --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | #include <linux/ioctl.h> | 15 | #include <linux/ioctl.h> |
| 16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
| 17 | #include <linux/of.h> | 17 | #include <linux/of.h> |
| 18 | #include <linux/of_device.h> | ||
| 18 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
| 19 | #include <linux/pm_runtime.h> | 20 | #include <linux/pm_runtime.h> |
| 20 | #include <linux/regmap.h> | 21 | #include <linux/regmap.h> |
| @@ -143,6 +144,15 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, | |||
| 143 | break; | 144 | break; |
| 144 | } | 145 | } |
| 145 | break; | 146 | break; |
| 147 | |||
| 148 | case V4L2_PIX_FMT_RGB565: | ||
| 149 | return (mbus_code == MEDIA_BUS_FMT_RGB565_2X8_LE); | ||
| 150 | case V4L2_PIX_FMT_RGB565X: | ||
| 151 | return (mbus_code == MEDIA_BUS_FMT_RGB565_2X8_BE); | ||
| 152 | |||
| 153 | case V4L2_PIX_FMT_JPEG: | ||
| 154 | return (mbus_code == MEDIA_BUS_FMT_JPEG_1X8); | ||
| 155 | |||
| 146 | default: | 156 | default: |
| 147 | dev_dbg(sdev->dev, "Unsupported pixformat: 0x%x\n", pixformat); | 157 | dev_dbg(sdev->dev, "Unsupported pixformat: 0x%x\n", pixformat); |
| 148 | break; | 158 | break; |
| @@ -154,6 +164,7 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, | |||
| 154 | int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable) | 164 | int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable) |
| 155 | { | 165 | { |
| 156 | struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi); | 166 | struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi); |
| 167 | struct device *dev = sdev->dev; | ||
| 157 | struct regmap *regmap = sdev->regmap; | 168 | struct regmap *regmap = sdev->regmap; |
| 158 | int ret; | 169 | int ret; |
| 159 | 170 | ||
| @@ -161,6 +172,9 @@ int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable) | |||
| 161 | regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0); | 172 | regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0); |
| 162 | 173 | ||
| 163 | clk_disable_unprepare(sdev->clk_ram); | 174 | clk_disable_unprepare(sdev->clk_ram); |
| 175 | if (of_device_is_compatible(dev->of_node, | ||
| 176 | "allwinner,sun50i-a64-csi")) | ||
| 177 | clk_rate_exclusive_put(sdev->clk_mod); | ||
| 164 | clk_disable_unprepare(sdev->clk_mod); | 178 | clk_disable_unprepare(sdev->clk_mod); |
| 165 | reset_control_assert(sdev->rstc_bus); | 179 | reset_control_assert(sdev->rstc_bus); |
| 166 | return 0; | 180 | return 0; |
| @@ -172,6 +186,9 @@ int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable) | |||
| 172 | return ret; | 186 | return ret; |
| 173 | } | 187 | } |
| 174 | 188 | ||
| 189 | if (of_device_is_compatible(dev->of_node, "allwinner,sun50i-a64-csi")) | ||
| 190 | clk_set_rate_exclusive(sdev->clk_mod, 300000000); | ||
| 191 | |||
| 175 | ret = clk_prepare_enable(sdev->clk_ram); | 192 | ret = clk_prepare_enable(sdev->clk_ram); |
| 176 | if (ret) { | 193 | if (ret) { |
| 177 | dev_err(sdev->dev, "Enable clk_dram_csi clk err %d\n", ret); | 194 | dev_err(sdev->dev, "Enable clk_dram_csi clk err %d\n", ret); |
| @@ -191,6 +208,8 @@ int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable) | |||
| 191 | clk_ram_disable: | 208 | clk_ram_disable: |
| 192 | clk_disable_unprepare(sdev->clk_ram); | 209 | clk_disable_unprepare(sdev->clk_ram); |
| 193 | clk_mod_disable: | 210 | clk_mod_disable: |
| 211 | if (of_device_is_compatible(dev->of_node, "allwinner,sun50i-a64-csi")) | ||
| 212 | clk_rate_exclusive_put(sdev->clk_mod); | ||
| 194 | clk_disable_unprepare(sdev->clk_mod); | 213 | clk_disable_unprepare(sdev->clk_mod); |
| 195 | return ret; | 214 | return ret; |
| 196 | } | 215 | } |
| @@ -198,8 +217,8 @@ clk_mod_disable: | |||
| 198 | static enum csi_input_fmt get_csi_input_format(struct sun6i_csi_dev *sdev, | 217 | static enum csi_input_fmt get_csi_input_format(struct sun6i_csi_dev *sdev, |
| 199 | u32 mbus_code, u32 pixformat) | 218 | u32 mbus_code, u32 pixformat) |
| 200 | { | 219 | { |
| 201 | /* bayer */ | 220 | /* non-YUV */ |
| 202 | if ((mbus_code & 0xF000) == 0x3000) | 221 | if ((mbus_code & 0xF000) != 0x2000) |
| 203 | return CSI_INPUT_FORMAT_RAW; | 222 | return CSI_INPUT_FORMAT_RAW; |
| 204 | 223 | ||
| 205 | switch (pixformat) { | 224 | switch (pixformat) { |
| @@ -268,6 +287,14 @@ static enum csi_output_fmt get_csi_output_format(struct sun6i_csi_dev *sdev, | |||
| 268 | case V4L2_PIX_FMT_YUV422P: | 287 | case V4L2_PIX_FMT_YUV422P: |
| 269 | return buf_interlaced ? CSI_FRAME_PLANAR_YUV422 : | 288 | return buf_interlaced ? CSI_FRAME_PLANAR_YUV422 : |
| 270 | CSI_FIELD_PLANAR_YUV422; | 289 | CSI_FIELD_PLANAR_YUV422; |
| 290 | |||
| 291 | case V4L2_PIX_FMT_RGB565: | ||
| 292 | case V4L2_PIX_FMT_RGB565X: | ||
| 293 | return buf_interlaced ? CSI_FRAME_RGB565 : CSI_FIELD_RGB565; | ||
| 294 | |||
| 295 | case V4L2_PIX_FMT_JPEG: | ||
| 296 | return buf_interlaced ? CSI_FRAME_RAW_8 : CSI_FIELD_RAW_8; | ||
| 297 | |||
| 271 | default: | 298 | default: |
| 272 | dev_warn(sdev->dev, "Unsupported pixformat: 0x%x\n", pixformat); | 299 | dev_warn(sdev->dev, "Unsupported pixformat: 0x%x\n", pixformat); |
| 273 | break; | 300 | break; |
| @@ -279,6 +306,10 @@ static enum csi_output_fmt get_csi_output_format(struct sun6i_csi_dev *sdev, | |||
| 279 | static enum csi_input_seq get_csi_input_seq(struct sun6i_csi_dev *sdev, | 306 | static enum csi_input_seq get_csi_input_seq(struct sun6i_csi_dev *sdev, |
| 280 | u32 mbus_code, u32 pixformat) | 307 | u32 mbus_code, u32 pixformat) |
| 281 | { | 308 | { |
| 309 | /* Input sequence does not apply to non-YUV formats */ | ||
| 310 | if ((mbus_code & 0xF000) != 0x2000) | ||
| 311 | return 0; | ||
| 312 | |||
| 282 | switch (pixformat) { | 313 | switch (pixformat) { |
| 283 | case V4L2_PIX_FMT_HM12: | 314 | case V4L2_PIX_FMT_HM12: |
| 284 | case V4L2_PIX_FMT_NV12: | 315 | case V4L2_PIX_FMT_NV12: |
| @@ -793,7 +824,7 @@ static const struct regmap_config sun6i_csi_regmap_config = { | |||
| 793 | .reg_bits = 32, | 824 | .reg_bits = 32, |
| 794 | .reg_stride = 4, | 825 | .reg_stride = 4, |
| 795 | .val_bits = 32, | 826 | .val_bits = 32, |
| 796 | .max_register = 0x1000, | 827 | .max_register = 0x9c, |
| 797 | }; | 828 | }; |
| 798 | 829 | ||
| 799 | static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev, | 830 | static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev, |
| @@ -893,7 +924,9 @@ static int sun6i_csi_remove(struct platform_device *pdev) | |||
| 893 | 924 | ||
| 894 | static const struct of_device_id sun6i_csi_of_match[] = { | 925 | static const struct of_device_id sun6i_csi_of_match[] = { |
| 895 | { .compatible = "allwinner,sun6i-a31-csi", }, | 926 | { .compatible = "allwinner,sun6i-a31-csi", }, |
| 927 | { .compatible = "allwinner,sun8i-h3-csi", }, | ||
| 896 | { .compatible = "allwinner,sun8i-v3s-csi", }, | 928 | { .compatible = "allwinner,sun8i-v3s-csi", }, |
| 929 | { .compatible = "allwinner,sun50i-a64-csi", }, | ||
| 897 | {}, | 930 | {}, |
| 898 | }; | 931 | }; |
| 899 | MODULE_DEVICE_TABLE(of, sun6i_csi_of_match); | 932 | MODULE_DEVICE_TABLE(of, sun6i_csi_of_match); |
diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h index 0bb000712c33..c626821aaedb 100644 --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h | |||
| @@ -65,7 +65,7 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, u32 pixformat, | |||
| 65 | int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable); | 65 | int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable); |
| 66 | 66 | ||
| 67 | /** | 67 | /** |
| 68 | * sun6i_csi_update_config() - update the csi register setttings | 68 | * sun6i_csi_update_config() - update the csi register settings |
| 69 | * @csi: pointer to the csi | 69 | * @csi: pointer to the csi |
| 70 | * @config: see struct sun6i_csi_config | 70 | * @config: see struct sun6i_csi_config |
| 71 | */ | 71 | */ |
| @@ -94,6 +94,7 @@ static inline int sun6i_csi_get_bpp(unsigned int pixformat) | |||
| 94 | case V4L2_PIX_FMT_SGBRG8: | 94 | case V4L2_PIX_FMT_SGBRG8: |
| 95 | case V4L2_PIX_FMT_SGRBG8: | 95 | case V4L2_PIX_FMT_SGRBG8: |
| 96 | case V4L2_PIX_FMT_SRGGB8: | 96 | case V4L2_PIX_FMT_SRGGB8: |
| 97 | case V4L2_PIX_FMT_JPEG: | ||
| 97 | return 8; | 98 | return 8; |
| 98 | case V4L2_PIX_FMT_SBGGR10: | 99 | case V4L2_PIX_FMT_SBGGR10: |
| 99 | case V4L2_PIX_FMT_SGBRG10: | 100 | case V4L2_PIX_FMT_SGBRG10: |
| @@ -117,6 +118,8 @@ static inline int sun6i_csi_get_bpp(unsigned int pixformat) | |||
| 117 | case V4L2_PIX_FMT_NV16: | 118 | case V4L2_PIX_FMT_NV16: |
| 118 | case V4L2_PIX_FMT_NV61: | 119 | case V4L2_PIX_FMT_NV61: |
| 119 | case V4L2_PIX_FMT_YUV422P: | 120 | case V4L2_PIX_FMT_YUV422P: |
| 121 | case V4L2_PIX_FMT_RGB565: | ||
| 122 | case V4L2_PIX_FMT_RGB565X: | ||
| 120 | return 16; | 123 | return 16; |
| 121 | case V4L2_PIX_FMT_RGB24: | 124 | case V4L2_PIX_FMT_RGB24: |
| 122 | case V4L2_PIX_FMT_BGR24: | 125 | case V4L2_PIX_FMT_BGR24: |
diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c index b04300c3811f..1fd16861f111 100644 --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c | |||
| @@ -56,6 +56,9 @@ static const u32 supported_pixformats[] = { | |||
| 56 | V4L2_PIX_FMT_NV16, | 56 | V4L2_PIX_FMT_NV16, |
| 57 | V4L2_PIX_FMT_NV61, | 57 | V4L2_PIX_FMT_NV61, |
| 58 | V4L2_PIX_FMT_YUV422P, | 58 | V4L2_PIX_FMT_YUV422P, |
| 59 | V4L2_PIX_FMT_RGB565, | ||
| 60 | V4L2_PIX_FMT_RGB565X, | ||
| 61 | V4L2_PIX_FMT_JPEG, | ||
| 59 | }; | 62 | }; |
| 60 | 63 | ||
| 61 | static bool is_pixformat_valid(unsigned int pixformat) | 64 | static bool is_pixformat_valid(unsigned int pixformat) |
diff --git a/drivers/media/platform/ti-vpe/vpdma.c b/drivers/media/platform/ti-vpe/vpdma.c index e2cf2b90e500..78d716c93649 100644 --- a/drivers/media/platform/ti-vpe/vpdma.c +++ b/drivers/media/platform/ti-vpe/vpdma.c | |||
| @@ -404,7 +404,7 @@ EXPORT_SYMBOL(vpdma_map_desc_buf); | |||
| 404 | 404 | ||
| 405 | /* | 405 | /* |
| 406 | * unmap descriptor/payload DMA buffer, disabling DMA access and | 406 | * unmap descriptor/payload DMA buffer, disabling DMA access and |
| 407 | * allowing the main processor to acces the data | 407 | * allowing the main processor to access the data |
| 408 | */ | 408 | */ |
| 409 | void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf) | 409 | void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf) |
| 410 | { | 410 | { |
| @@ -501,7 +501,7 @@ void vpdma_reset_desc_list(struct vpdma_desc_list *list) | |||
| 501 | EXPORT_SYMBOL(vpdma_reset_desc_list); | 501 | EXPORT_SYMBOL(vpdma_reset_desc_list); |
| 502 | 502 | ||
| 503 | /* | 503 | /* |
| 504 | * free the buffer allocated fot the VPDMA descriptor list, this should be | 504 | * free the buffer allocated for the VPDMA descriptor list, this should be |
| 505 | * called when the user doesn't want to use VPDMA any more. | 505 | * called when the user doesn't want to use VPDMA any more. |
| 506 | */ | 506 | */ |
| 507 | void vpdma_free_desc_list(struct vpdma_desc_list *list) | 507 | void vpdma_free_desc_list(struct vpdma_desc_list *list) |
| @@ -790,7 +790,7 @@ static void dump_dtd(struct vpdma_dtd *dtd) | |||
| 790 | * append an outbound data transfer descriptor to the given descriptor list, | 790 | * append an outbound data transfer descriptor to the given descriptor list, |
| 791 | * this sets up a 'client to memory' VPDMA transfer for the given VPDMA channel | 791 | * this sets up a 'client to memory' VPDMA transfer for the given VPDMA channel |
| 792 | * | 792 | * |
| 793 | * @list: vpdma desc list to which we add this decriptor | 793 | * @list: vpdma desc list to which we add this descriptor |
| 794 | * @width: width of the image in pixels in memory | 794 | * @width: width of the image in pixels in memory |
| 795 | * @c_rect: compose params of output image | 795 | * @c_rect: compose params of output image |
| 796 | * @fmt: vpdma data format of the buffer | 796 | * @fmt: vpdma data format of the buffer |
| @@ -798,7 +798,7 @@ static void dump_dtd(struct vpdma_dtd *dtd) | |||
| 798 | * max_width: enum for maximum width of data transfer | 798 | * max_width: enum for maximum width of data transfer |
| 799 | * max_height: enum for maximum height of data transfer | 799 | * max_height: enum for maximum height of data transfer |
| 800 | * chan: VPDMA channel | 800 | * chan: VPDMA channel |
| 801 | * flags: VPDMA flags to configure some descriptor fileds | 801 | * flags: VPDMA flags to configure some descriptor fields |
| 802 | */ | 802 | */ |
| 803 | void vpdma_add_out_dtd(struct vpdma_desc_list *list, int width, | 803 | void vpdma_add_out_dtd(struct vpdma_desc_list *list, int width, |
| 804 | int stride, const struct v4l2_rect *c_rect, | 804 | int stride, const struct v4l2_rect *c_rect, |
| @@ -863,14 +863,14 @@ EXPORT_SYMBOL(vpdma_rawchan_add_out_dtd); | |||
| 863 | * append an inbound data transfer descriptor to the given descriptor list, | 863 | * append an inbound data transfer descriptor to the given descriptor list, |
| 864 | * this sets up a 'memory to client' VPDMA transfer for the given VPDMA channel | 864 | * this sets up a 'memory to client' VPDMA transfer for the given VPDMA channel |
| 865 | * | 865 | * |
| 866 | * @list: vpdma desc list to which we add this decriptor | 866 | * @list: vpdma desc list to which we add this descriptor |
| 867 | * @width: width of the image in pixels in memory(not the cropped width) | 867 | * @width: width of the image in pixels in memory(not the cropped width) |
| 868 | * @c_rect: crop params of input image | 868 | * @c_rect: crop params of input image |
| 869 | * @fmt: vpdma data format of the buffer | 869 | * @fmt: vpdma data format of the buffer |
| 870 | * dma_addr: dma address as seen by VPDMA | 870 | * dma_addr: dma address as seen by VPDMA |
| 871 | * chan: VPDMA channel | 871 | * chan: VPDMA channel |
| 872 | * field: top or bottom field info of the input image | 872 | * field: top or bottom field info of the input image |
| 873 | * flags: VPDMA flags to configure some descriptor fileds | 873 | * flags: VPDMA flags to configure some descriptor fields |
| 874 | * frame_width/height: the complete width/height of the image presented to the | 874 | * frame_width/height: the complete width/height of the image presented to the |
| 875 | * client (this makes sense when multiple channels are | 875 | * client (this makes sense when multiple channels are |
| 876 | * connected to the same client, forming a larger frame) | 876 | * connected to the same client, forming a larger frame) |
| @@ -1008,7 +1008,7 @@ unsigned int vpdma_get_list_mask(struct vpdma_data *vpdma, int irq_num) | |||
| 1008 | } | 1008 | } |
| 1009 | EXPORT_SYMBOL(vpdma_get_list_mask); | 1009 | EXPORT_SYMBOL(vpdma_get_list_mask); |
| 1010 | 1010 | ||
| 1011 | /* clear previosuly occured list intterupts in the LIST_STAT register */ | 1011 | /* clear previously occurred list interrupts in the LIST_STAT register */ |
| 1012 | void vpdma_clear_list_stat(struct vpdma_data *vpdma, int irq_num, | 1012 | void vpdma_clear_list_stat(struct vpdma_data *vpdma, int irq_num, |
| 1013 | int list_num) | 1013 | int list_num) |
| 1014 | { | 1014 | { |
diff --git a/drivers/media/platform/ti-vpe/vpe.c b/drivers/media/platform/ti-vpe/vpe.c index d70871d0ad2d..207e7e76c048 100644 --- a/drivers/media/platform/ti-vpe/vpe.c +++ b/drivers/media/platform/ti-vpe/vpe.c | |||
| @@ -876,7 +876,7 @@ static int set_srcdst_params(struct vpe_ctx *ctx) | |||
| 876 | /* | 876 | /* |
| 877 | * we make sure that the source image has a 16 byte aligned | 877 | * we make sure that the source image has a 16 byte aligned |
| 878 | * stride, we need to do the same for the motion vector buffer | 878 | * stride, we need to do the same for the motion vector buffer |
| 879 | * by aligning it's stride to the next 16 byte boundry. this | 879 | * by aligning it's stride to the next 16 byte boundary. this |
| 880 | * extra space will not be used by the de-interlacer, but will | 880 | * extra space will not be used by the de-interlacer, but will |
| 881 | * ensure that vpdma operates correctly | 881 | * ensure that vpdma operates correctly |
| 882 | */ | 882 | */ |
diff --git a/drivers/media/platform/vicodec/codec-fwht.c b/drivers/media/platform/vicodec/codec-fwht.c index 5630f1dc45e6..d1d6085da9f1 100644 --- a/drivers/media/platform/vicodec/codec-fwht.c +++ b/drivers/media/platform/vicodec/codec-fwht.c | |||
| @@ -10,8 +10,11 @@ | |||
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | #include <linux/string.h> | 12 | #include <linux/string.h> |
| 13 | #include <linux/kernel.h> | ||
| 13 | #include "codec-fwht.h" | 14 | #include "codec-fwht.h" |
| 14 | 15 | ||
| 16 | #define OVERFLOW_BIT BIT(14) | ||
| 17 | |||
| 15 | /* | 18 | /* |
| 16 | * Note: bit 0 of the header must always be 0. Otherwise it cannot | 19 | * Note: bit 0 of the header must always be 0. Otherwise it cannot |
| 17 | * be guaranteed that the magic 8 byte sequence (see below) can | 20 | * be guaranteed that the magic 8 byte sequence (see below) can |
| @@ -103,16 +106,21 @@ static int rlc(const s16 *in, __be16 *output, int blocktype) | |||
| 103 | * This function will worst-case increase rlc_in by 65*2 bytes: | 106 | * This function will worst-case increase rlc_in by 65*2 bytes: |
| 104 | * one s16 value for the header and 8 * 8 coefficients of type s16. | 107 | * one s16 value for the header and 8 * 8 coefficients of type s16. |
| 105 | */ | 108 | */ |
| 106 | static s16 derlc(const __be16 **rlc_in, s16 *dwht_out) | 109 | static u16 derlc(const __be16 **rlc_in, s16 *dwht_out, |
| 110 | const __be16 *end_of_input) | ||
| 107 | { | 111 | { |
| 108 | /* header */ | 112 | /* header */ |
| 109 | const __be16 *input = *rlc_in; | 113 | const __be16 *input = *rlc_in; |
| 110 | s16 ret = ntohs(*input++); | 114 | u16 stat; |
| 111 | int dec_count = 0; | 115 | int dec_count = 0; |
| 112 | s16 block[8 * 8 + 16]; | 116 | s16 block[8 * 8 + 16]; |
| 113 | s16 *wp = block; | 117 | s16 *wp = block; |
| 114 | int i; | 118 | int i; |
| 115 | 119 | ||
| 120 | if (input > end_of_input) | ||
| 121 | return OVERFLOW_BIT; | ||
| 122 | stat = ntohs(*input++); | ||
| 123 | |||
| 116 | /* | 124 | /* |
| 117 | * Now de-compress, it expands one byte to up to 15 bytes | 125 | * Now de-compress, it expands one byte to up to 15 bytes |
| 118 | * (or fills the remainder of the 64 bytes with zeroes if it | 126 | * (or fills the remainder of the 64 bytes with zeroes if it |
| @@ -122,9 +130,15 @@ static s16 derlc(const __be16 **rlc_in, s16 *dwht_out) | |||
| 122 | * allow for overflow if the incoming data was malformed. | 130 | * allow for overflow if the incoming data was malformed. |
| 123 | */ | 131 | */ |
| 124 | while (dec_count < 8 * 8) { | 132 | while (dec_count < 8 * 8) { |
| 125 | s16 in = ntohs(*input++); | 133 | s16 in; |
| 126 | int length = in & 0xf; | 134 | int length; |
| 127 | int coeff = in >> 4; | 135 | int coeff; |
| 136 | |||
| 137 | if (input > end_of_input) | ||
| 138 | return OVERFLOW_BIT; | ||
| 139 | in = ntohs(*input++); | ||
| 140 | length = in & 0xf; | ||
| 141 | coeff = in >> 4; | ||
| 128 | 142 | ||
| 129 | /* fill remainder with zeros */ | 143 | /* fill remainder with zeros */ |
| 130 | if (length == 15) { | 144 | if (length == 15) { |
| @@ -149,7 +163,7 @@ static s16 derlc(const __be16 **rlc_in, s16 *dwht_out) | |||
| 149 | dwht_out[x + y * 8] = *wp++; | 163 | dwht_out[x + y * 8] = *wp++; |
| 150 | } | 164 | } |
| 151 | *rlc_in = input; | 165 | *rlc_in = input; |
| 152 | return ret; | 166 | return stat; |
| 153 | } | 167 | } |
| 154 | 168 | ||
| 155 | static const int quant_table[] = { | 169 | static const int quant_table[] = { |
| @@ -237,8 +251,6 @@ static void fwht(const u8 *block, s16 *output_block, unsigned int stride, | |||
| 237 | unsigned int i; | 251 | unsigned int i; |
| 238 | 252 | ||
| 239 | /* stage 1 */ | 253 | /* stage 1 */ |
| 240 | stride *= input_step; | ||
| 241 | |||
| 242 | for (i = 0; i < 8; i++, tmp += stride, out += 8) { | 254 | for (i = 0; i < 8; i++, tmp += stride, out += 8) { |
| 243 | switch (input_step) { | 255 | switch (input_step) { |
| 244 | case 1: | 256 | case 1: |
| @@ -562,7 +574,7 @@ static void fill_encoder_block(const u8 *input, s16 *dst, | |||
| 562 | for (i = 0; i < 8; i++) { | 574 | for (i = 0; i < 8; i++) { |
| 563 | for (j = 0; j < 8; j++, input += input_step) | 575 | for (j = 0; j < 8; j++, input += input_step) |
| 564 | *dst++ = *input; | 576 | *dst++ = *input; |
| 565 | input += (stride - 8) * input_step; | 577 | input += stride - 8 * input_step; |
| 566 | } | 578 | } |
| 567 | } | 579 | } |
| 568 | 580 | ||
| @@ -660,7 +672,7 @@ static void add_deltas(s16 *deltas, const u8 *ref, int stride) | |||
| 660 | 672 | ||
| 661 | static u32 encode_plane(u8 *input, u8 *refp, __be16 **rlco, __be16 *rlco_max, | 673 | static u32 encode_plane(u8 *input, u8 *refp, __be16 **rlco, __be16 *rlco_max, |
| 662 | struct fwht_cframe *cf, u32 height, u32 width, | 674 | struct fwht_cframe *cf, u32 height, u32 width, |
| 663 | unsigned int input_step, | 675 | u32 stride, unsigned int input_step, |
| 664 | bool is_intra, bool next_is_intra) | 676 | bool is_intra, bool next_is_intra) |
| 665 | { | 677 | { |
| 666 | u8 *input_start = input; | 678 | u8 *input_start = input; |
| @@ -671,7 +683,11 @@ static u32 encode_plane(u8 *input, u8 *refp, __be16 **rlco, __be16 *rlco_max, | |||
| 671 | unsigned int last_size = 0; | 683 | unsigned int last_size = 0; |
| 672 | unsigned int i, j; | 684 | unsigned int i, j; |
| 673 | 685 | ||
| 686 | width = round_up(width, 8); | ||
| 687 | height = round_up(height, 8); | ||
| 688 | |||
| 674 | for (j = 0; j < height / 8; j++) { | 689 | for (j = 0; j < height / 8; j++) { |
| 690 | input = input_start + j * 8 * stride; | ||
| 675 | for (i = 0; i < width / 8; i++) { | 691 | for (i = 0; i < width / 8; i++) { |
| 676 | /* intra code, first frame is always intra coded. */ | 692 | /* intra code, first frame is always intra coded. */ |
| 677 | int blocktype = IBLOCK; | 693 | int blocktype = IBLOCK; |
| @@ -679,9 +695,9 @@ static u32 encode_plane(u8 *input, u8 *refp, __be16 **rlco, __be16 *rlco_max, | |||
| 679 | 695 | ||
| 680 | if (!is_intra) | 696 | if (!is_intra) |
| 681 | blocktype = decide_blocktype(input, refp, | 697 | blocktype = decide_blocktype(input, refp, |
| 682 | deltablock, width, input_step); | 698 | deltablock, stride, input_step); |
| 683 | if (blocktype == IBLOCK) { | 699 | if (blocktype == IBLOCK) { |
| 684 | fwht(input, cf->coeffs, width, input_step, 1); | 700 | fwht(input, cf->coeffs, stride, input_step, 1); |
| 685 | quantize_intra(cf->coeffs, cf->de_coeffs, | 701 | quantize_intra(cf->coeffs, cf->de_coeffs, |
| 686 | cf->i_frame_qp); | 702 | cf->i_frame_qp); |
| 687 | } else { | 703 | } else { |
| @@ -722,12 +738,12 @@ static u32 encode_plane(u8 *input, u8 *refp, __be16 **rlco, __be16 *rlco_max, | |||
| 722 | } | 738 | } |
| 723 | last_size = size; | 739 | last_size = size; |
| 724 | } | 740 | } |
| 725 | input += width * 7 * input_step; | ||
| 726 | } | 741 | } |
| 727 | 742 | ||
| 728 | exit_loop: | 743 | exit_loop: |
| 729 | if (encoding & FWHT_FRAME_UNENCODED) { | 744 | if (encoding & FWHT_FRAME_UNENCODED) { |
| 730 | u8 *out = (u8 *)rlco_start; | 745 | u8 *out = (u8 *)rlco_start; |
| 746 | u8 *p; | ||
| 731 | 747 | ||
| 732 | input = input_start; | 748 | input = input_start; |
| 733 | /* | 749 | /* |
| @@ -736,8 +752,11 @@ exit_loop: | |||
| 736 | * by 0xfe. Since YUV is limited range such values | 752 | * by 0xfe. Since YUV is limited range such values |
| 737 | * shouldn't appear anyway. | 753 | * shouldn't appear anyway. |
| 738 | */ | 754 | */ |
| 739 | for (i = 0; i < height * width; i++, input += input_step) | 755 | for (j = 0; j < height; j++) { |
| 740 | *out++ = (*input == 0xff) ? 0xfe : *input; | 756 | for (i = 0, p = input; i < width; i++, p += input_step) |
| 757 | *out++ = (*p == 0xff) ? 0xfe : *p; | ||
| 758 | input += stride; | ||
| 759 | } | ||
| 741 | *rlco = (__be16 *)out; | 760 | *rlco = (__be16 *)out; |
| 742 | encoding &= ~FWHT_FRAME_PCODED; | 761 | encoding &= ~FWHT_FRAME_PCODED; |
| 743 | } | 762 | } |
| @@ -747,30 +766,32 @@ exit_loop: | |||
| 747 | u32 fwht_encode_frame(struct fwht_raw_frame *frm, | 766 | u32 fwht_encode_frame(struct fwht_raw_frame *frm, |
| 748 | struct fwht_raw_frame *ref_frm, | 767 | struct fwht_raw_frame *ref_frm, |
| 749 | struct fwht_cframe *cf, | 768 | struct fwht_cframe *cf, |
| 750 | bool is_intra, bool next_is_intra) | 769 | bool is_intra, bool next_is_intra, |
| 770 | unsigned int width, unsigned int height, | ||
| 771 | unsigned int stride, unsigned int chroma_stride) | ||
| 751 | { | 772 | { |
| 752 | unsigned int size = frm->height * frm->width; | 773 | unsigned int size = height * width; |
| 753 | __be16 *rlco = cf->rlc_data; | 774 | __be16 *rlco = cf->rlc_data; |
| 754 | __be16 *rlco_max; | 775 | __be16 *rlco_max; |
| 755 | u32 encoding; | 776 | u32 encoding; |
| 756 | 777 | ||
| 757 | rlco_max = rlco + size / 2 - 256; | 778 | rlco_max = rlco + size / 2 - 256; |
| 758 | encoding = encode_plane(frm->luma, ref_frm->luma, &rlco, rlco_max, cf, | 779 | encoding = encode_plane(frm->luma, ref_frm->luma, &rlco, rlco_max, cf, |
| 759 | frm->height, frm->width, | 780 | height, width, stride, |
| 760 | frm->luma_alpha_step, is_intra, next_is_intra); | 781 | frm->luma_alpha_step, is_intra, next_is_intra); |
| 761 | if (encoding & FWHT_FRAME_UNENCODED) | 782 | if (encoding & FWHT_FRAME_UNENCODED) |
| 762 | encoding |= FWHT_LUMA_UNENCODED; | 783 | encoding |= FWHT_LUMA_UNENCODED; |
| 763 | encoding &= ~FWHT_FRAME_UNENCODED; | 784 | encoding &= ~FWHT_FRAME_UNENCODED; |
| 764 | 785 | ||
| 765 | if (frm->components_num >= 3) { | 786 | if (frm->components_num >= 3) { |
| 766 | u32 chroma_h = frm->height / frm->height_div; | 787 | u32 chroma_h = height / frm->height_div; |
| 767 | u32 chroma_w = frm->width / frm->width_div; | 788 | u32 chroma_w = width / frm->width_div; |
| 768 | unsigned int chroma_size = chroma_h * chroma_w; | 789 | unsigned int chroma_size = chroma_h * chroma_w; |
| 769 | 790 | ||
| 770 | rlco_max = rlco + chroma_size / 2 - 256; | 791 | rlco_max = rlco + chroma_size / 2 - 256; |
| 771 | encoding |= encode_plane(frm->cb, ref_frm->cb, &rlco, rlco_max, | 792 | encoding |= encode_plane(frm->cb, ref_frm->cb, &rlco, rlco_max, |
| 772 | cf, chroma_h, chroma_w, | 793 | cf, chroma_h, chroma_w, |
| 773 | frm->chroma_step, | 794 | chroma_stride, frm->chroma_step, |
| 774 | is_intra, next_is_intra); | 795 | is_intra, next_is_intra); |
| 775 | if (encoding & FWHT_FRAME_UNENCODED) | 796 | if (encoding & FWHT_FRAME_UNENCODED) |
| 776 | encoding |= FWHT_CB_UNENCODED; | 797 | encoding |= FWHT_CB_UNENCODED; |
| @@ -778,7 +799,7 @@ u32 fwht_encode_frame(struct fwht_raw_frame *frm, | |||
| 778 | rlco_max = rlco + chroma_size / 2 - 256; | 799 | rlco_max = rlco + chroma_size / 2 - 256; |
| 779 | encoding |= encode_plane(frm->cr, ref_frm->cr, &rlco, rlco_max, | 800 | encoding |= encode_plane(frm->cr, ref_frm->cr, &rlco, rlco_max, |
| 780 | cf, chroma_h, chroma_w, | 801 | cf, chroma_h, chroma_w, |
| 781 | frm->chroma_step, | 802 | chroma_stride, frm->chroma_step, |
| 782 | is_intra, next_is_intra); | 803 | is_intra, next_is_intra); |
| 783 | if (encoding & FWHT_FRAME_UNENCODED) | 804 | if (encoding & FWHT_FRAME_UNENCODED) |
| 784 | encoding |= FWHT_CR_UNENCODED; | 805 | encoding |= FWHT_CR_UNENCODED; |
| @@ -787,10 +808,10 @@ u32 fwht_encode_frame(struct fwht_raw_frame *frm, | |||
| 787 | 808 | ||
| 788 | if (frm->components_num == 4) { | 809 | if (frm->components_num == 4) { |
| 789 | rlco_max = rlco + size / 2 - 256; | 810 | rlco_max = rlco + size / 2 - 256; |
| 790 | encoding = encode_plane(frm->alpha, ref_frm->alpha, &rlco, | 811 | encoding |= encode_plane(frm->alpha, ref_frm->alpha, &rlco, |
| 791 | rlco_max, cf, frm->height, frm->width, | 812 | rlco_max, cf, height, width, |
| 792 | frm->luma_alpha_step, | 813 | stride, frm->luma_alpha_step, |
| 793 | is_intra, next_is_intra); | 814 | is_intra, next_is_intra); |
| 794 | if (encoding & FWHT_FRAME_UNENCODED) | 815 | if (encoding & FWHT_FRAME_UNENCODED) |
| 795 | encoding |= FWHT_ALPHA_UNENCODED; | 816 | encoding |= FWHT_ALPHA_UNENCODED; |
| 796 | encoding &= ~FWHT_FRAME_UNENCODED; | 817 | encoding &= ~FWHT_FRAME_UNENCODED; |
| @@ -800,18 +821,24 @@ u32 fwht_encode_frame(struct fwht_raw_frame *frm, | |||
| 800 | return encoding; | 821 | return encoding; |
| 801 | } | 822 | } |
| 802 | 823 | ||
| 803 | static void decode_plane(struct fwht_cframe *cf, const __be16 **rlco, u8 *ref, | 824 | static bool decode_plane(struct fwht_cframe *cf, const __be16 **rlco, u8 *ref, |
| 804 | u32 height, u32 width, bool uncompressed) | 825 | u32 height, u32 width, u32 coded_width, |
| 826 | bool uncompressed, const __be16 *end_of_rlco_buf) | ||
| 805 | { | 827 | { |
| 806 | unsigned int copies = 0; | 828 | unsigned int copies = 0; |
| 807 | s16 copy[8 * 8]; | 829 | s16 copy[8 * 8]; |
| 808 | s16 stat; | 830 | u16 stat; |
| 809 | unsigned int i, j; | 831 | unsigned int i, j; |
| 810 | 832 | ||
| 833 | width = round_up(width, 8); | ||
| 834 | height = round_up(height, 8); | ||
| 835 | |||
| 811 | if (uncompressed) { | 836 | if (uncompressed) { |
| 837 | if (end_of_rlco_buf + 1 < *rlco + width * height / 2) | ||
| 838 | return false; | ||
| 812 | memcpy(ref, *rlco, width * height); | 839 | memcpy(ref, *rlco, width * height); |
| 813 | *rlco += width * height / 2; | 840 | *rlco += width * height / 2; |
| 814 | return; | 841 | return true; |
| 815 | } | 842 | } |
| 816 | 843 | ||
| 817 | /* | 844 | /* |
| @@ -822,19 +849,22 @@ static void decode_plane(struct fwht_cframe *cf, const __be16 **rlco, u8 *ref, | |||
| 822 | */ | 849 | */ |
| 823 | for (j = 0; j < height / 8; j++) { | 850 | for (j = 0; j < height / 8; j++) { |
| 824 | for (i = 0; i < width / 8; i++) { | 851 | for (i = 0; i < width / 8; i++) { |
| 825 | u8 *refp = ref + j * 8 * width + i * 8; | 852 | u8 *refp = ref + j * 8 * coded_width + i * 8; |
| 826 | 853 | ||
| 827 | if (copies) { | 854 | if (copies) { |
| 828 | memcpy(cf->de_fwht, copy, sizeof(copy)); | 855 | memcpy(cf->de_fwht, copy, sizeof(copy)); |
| 829 | if (stat & PFRAME_BIT) | 856 | if (stat & PFRAME_BIT) |
| 830 | add_deltas(cf->de_fwht, refp, width); | 857 | add_deltas(cf->de_fwht, refp, |
| 831 | fill_decoder_block(refp, cf->de_fwht, width); | 858 | coded_width); |
| 859 | fill_decoder_block(refp, cf->de_fwht, | ||
| 860 | coded_width); | ||
| 832 | copies--; | 861 | copies--; |
| 833 | continue; | 862 | continue; |
| 834 | } | 863 | } |
| 835 | 864 | ||
| 836 | stat = derlc(rlco, cf->coeffs); | 865 | stat = derlc(rlco, cf->coeffs, end_of_rlco_buf); |
| 837 | 866 | if (stat & OVERFLOW_BIT) | |
| 867 | return false; | ||
| 838 | if (stat & PFRAME_BIT) | 868 | if (stat & PFRAME_BIT) |
| 839 | dequantize_inter(cf->coeffs); | 869 | dequantize_inter(cf->coeffs); |
| 840 | else | 870 | else |
| @@ -847,35 +877,53 @@ static void decode_plane(struct fwht_cframe *cf, const __be16 **rlco, u8 *ref, | |||
| 847 | if (copies) | 877 | if (copies) |
| 848 | memcpy(copy, cf->de_fwht, sizeof(copy)); | 878 | memcpy(copy, cf->de_fwht, sizeof(copy)); |
| 849 | if (stat & PFRAME_BIT) | 879 | if (stat & PFRAME_BIT) |
| 850 | add_deltas(cf->de_fwht, refp, width); | 880 | add_deltas(cf->de_fwht, refp, coded_width); |
| 851 | fill_decoder_block(refp, cf->de_fwht, width); | 881 | fill_decoder_block(refp, cf->de_fwht, coded_width); |
| 852 | } | 882 | } |
| 853 | } | 883 | } |
| 884 | return true; | ||
| 854 | } | 885 | } |
| 855 | 886 | ||
| 856 | void fwht_decode_frame(struct fwht_cframe *cf, struct fwht_raw_frame *ref, | 887 | bool fwht_decode_frame(struct fwht_cframe *cf, struct fwht_raw_frame *ref, |
| 857 | u32 hdr_flags, unsigned int components_num) | 888 | u32 hdr_flags, unsigned int components_num, |
| 889 | unsigned int width, unsigned int height, | ||
| 890 | unsigned int coded_width) | ||
| 858 | { | 891 | { |
| 859 | const __be16 *rlco = cf->rlc_data; | 892 | const __be16 *rlco = cf->rlc_data; |
| 893 | const __be16 *end_of_rlco_buf = cf->rlc_data + | ||
| 894 | (cf->size / sizeof(*rlco)) - 1; | ||
| 860 | 895 | ||
| 861 | decode_plane(cf, &rlco, ref->luma, cf->height, cf->width, | 896 | if (!decode_plane(cf, &rlco, ref->luma, height, width, coded_width, |
| 862 | hdr_flags & FWHT_FL_LUMA_IS_UNCOMPRESSED); | 897 | hdr_flags & FWHT_FL_LUMA_IS_UNCOMPRESSED, |
| 898 | end_of_rlco_buf)) | ||
| 899 | return false; | ||
| 863 | 900 | ||
| 864 | if (components_num >= 3) { | 901 | if (components_num >= 3) { |
| 865 | u32 h = cf->height; | 902 | u32 h = height; |
| 866 | u32 w = cf->width; | 903 | u32 w = width; |
| 904 | u32 c = coded_width; | ||
| 867 | 905 | ||
| 868 | if (!(hdr_flags & FWHT_FL_CHROMA_FULL_HEIGHT)) | 906 | if (!(hdr_flags & FWHT_FL_CHROMA_FULL_HEIGHT)) |
| 869 | h /= 2; | 907 | h /= 2; |
| 870 | if (!(hdr_flags & FWHT_FL_CHROMA_FULL_WIDTH)) | 908 | if (!(hdr_flags & FWHT_FL_CHROMA_FULL_WIDTH)) { |
| 871 | w /= 2; | 909 | w /= 2; |
| 872 | decode_plane(cf, &rlco, ref->cb, h, w, | 910 | c /= 2; |
| 873 | hdr_flags & FWHT_FL_CB_IS_UNCOMPRESSED); | 911 | } |
| 874 | decode_plane(cf, &rlco, ref->cr, h, w, | 912 | if (!decode_plane(cf, &rlco, ref->cb, h, w, c, |
| 875 | hdr_flags & FWHT_FL_CR_IS_UNCOMPRESSED); | 913 | hdr_flags & FWHT_FL_CB_IS_UNCOMPRESSED, |
| 914 | end_of_rlco_buf)) | ||
| 915 | return false; | ||
| 916 | if (!decode_plane(cf, &rlco, ref->cr, h, w, c, | ||
| 917 | hdr_flags & FWHT_FL_CR_IS_UNCOMPRESSED, | ||
| 918 | end_of_rlco_buf)) | ||
| 919 | return false; | ||
| 876 | } | 920 | } |
| 877 | 921 | ||
| 878 | if (components_num == 4) | 922 | if (components_num == 4) |
| 879 | decode_plane(cf, &rlco, ref->alpha, cf->height, cf->width, | 923 | if (!decode_plane(cf, &rlco, ref->alpha, height, width, |
| 880 | hdr_flags & FWHT_FL_ALPHA_IS_UNCOMPRESSED); | 924 | coded_width, |
| 925 | hdr_flags & FWHT_FL_ALPHA_IS_UNCOMPRESSED, | ||
| 926 | end_of_rlco_buf)) | ||
| 927 | return false; | ||
| 928 | return true; | ||
| 881 | } | 929 | } |
diff --git a/drivers/media/platform/vicodec/codec-fwht.h b/drivers/media/platform/vicodec/codec-fwht.h index 90ff8962fca7..c410512d47c5 100644 --- a/drivers/media/platform/vicodec/codec-fwht.h +++ b/drivers/media/platform/vicodec/codec-fwht.h | |||
| @@ -56,7 +56,7 @@ | |||
| 56 | #define FWHT_MAGIC1 0x4f4f4f4f | 56 | #define FWHT_MAGIC1 0x4f4f4f4f |
| 57 | #define FWHT_MAGIC2 0xffffffff | 57 | #define FWHT_MAGIC2 0xffffffff |
| 58 | 58 | ||
| 59 | #define FWHT_VERSION 2 | 59 | #define FWHT_VERSION 3 |
| 60 | 60 | ||
| 61 | /* Set if this is an interlaced format */ | 61 | /* Set if this is an interlaced format */ |
| 62 | #define FWHT_FL_IS_INTERLACED BIT(0) | 62 | #define FWHT_FL_IS_INTERLACED BIT(0) |
| @@ -76,11 +76,25 @@ | |||
| 76 | #define FWHT_FL_CHROMA_FULL_HEIGHT BIT(7) | 76 | #define FWHT_FL_CHROMA_FULL_HEIGHT BIT(7) |
| 77 | #define FWHT_FL_CHROMA_FULL_WIDTH BIT(8) | 77 | #define FWHT_FL_CHROMA_FULL_WIDTH BIT(8) |
| 78 | #define FWHT_FL_ALPHA_IS_UNCOMPRESSED BIT(9) | 78 | #define FWHT_FL_ALPHA_IS_UNCOMPRESSED BIT(9) |
| 79 | #define FWHT_FL_I_FRAME BIT(10) | ||
| 79 | 80 | ||
| 80 | /* A 4-values flag - the number of components - 1 */ | 81 | /* A 4-values flag - the number of components - 1 */ |
| 81 | #define FWHT_FL_COMPONENTS_NUM_MSK GENMASK(17, 16) | 82 | #define FWHT_FL_COMPONENTS_NUM_MSK GENMASK(18, 16) |
| 82 | #define FWHT_FL_COMPONENTS_NUM_OFFSET 16 | 83 | #define FWHT_FL_COMPONENTS_NUM_OFFSET 16 |
| 83 | 84 | ||
| 85 | #define FWHT_FL_PIXENC_MSK GENMASK(20, 19) | ||
| 86 | #define FWHT_FL_PIXENC_OFFSET 19 | ||
| 87 | #define FWHT_FL_PIXENC_YUV (1 << FWHT_FL_PIXENC_OFFSET) | ||
| 88 | #define FWHT_FL_PIXENC_RGB (2 << FWHT_FL_PIXENC_OFFSET) | ||
| 89 | #define FWHT_FL_PIXENC_HSV (3 << FWHT_FL_PIXENC_OFFSET) | ||
| 90 | |||
| 91 | /* | ||
| 92 | * A macro to calculate the needed padding in order to make sure | ||
| 93 | * both luma and chroma components resolutions are rounded up to | ||
| 94 | * a multiple of 8 | ||
| 95 | */ | ||
| 96 | #define vic_round_dim(dim, div) (round_up((dim) / (div), 8) * (div)) | ||
| 97 | |||
| 84 | struct fwht_cframe_hdr { | 98 | struct fwht_cframe_hdr { |
| 85 | u32 magic1; | 99 | u32 magic1; |
| 86 | u32 magic2; | 100 | u32 magic2; |
| @@ -95,7 +109,6 @@ struct fwht_cframe_hdr { | |||
| 95 | }; | 109 | }; |
| 96 | 110 | ||
| 97 | struct fwht_cframe { | 111 | struct fwht_cframe { |
| 98 | unsigned int width, height; | ||
| 99 | u16 i_frame_qp; | 112 | u16 i_frame_qp; |
| 100 | u16 p_frame_qp; | 113 | u16 p_frame_qp; |
| 101 | __be16 *rlc_data; | 114 | __be16 *rlc_data; |
| @@ -106,7 +119,6 @@ struct fwht_cframe { | |||
| 106 | }; | 119 | }; |
| 107 | 120 | ||
| 108 | struct fwht_raw_frame { | 121 | struct fwht_raw_frame { |
| 109 | unsigned int width, height; | ||
| 110 | unsigned int width_div; | 122 | unsigned int width_div; |
| 111 | unsigned int height_div; | 123 | unsigned int height_div; |
| 112 | unsigned int luma_alpha_step; | 124 | unsigned int luma_alpha_step; |
| @@ -125,8 +137,12 @@ struct fwht_raw_frame { | |||
| 125 | u32 fwht_encode_frame(struct fwht_raw_frame *frm, | 137 | u32 fwht_encode_frame(struct fwht_raw_frame *frm, |
| 126 | struct fwht_raw_frame *ref_frm, | 138 | struct fwht_raw_frame *ref_frm, |
| 127 | struct fwht_cframe *cf, | 139 | struct fwht_cframe *cf, |
| 128 | bool is_intra, bool next_is_intra); | 140 | bool is_intra, bool next_is_intra, |
| 129 | void fwht_decode_frame(struct fwht_cframe *cf, struct fwht_raw_frame *ref, | 141 | unsigned int width, unsigned int height, |
| 130 | u32 hdr_flags, unsigned int components_num); | 142 | unsigned int stride, unsigned int chroma_stride); |
| 143 | bool fwht_decode_frame(struct fwht_cframe *cf, struct fwht_raw_frame *ref, | ||
| 144 | u32 hdr_flags, unsigned int components_num, | ||
| 145 | unsigned int width, unsigned int height, | ||
| 146 | unsigned int coded_width); | ||
| 131 | 147 | ||
| 132 | #endif | 148 | #endif |
diff --git a/drivers/media/platform/vicodec/codec-v4l2-fwht.c b/drivers/media/platform/vicodec/codec-v4l2-fwht.c index 8cb0212df67f..6573a471c5ca 100644 --- a/drivers/media/platform/vicodec/codec-v4l2-fwht.c +++ b/drivers/media/platform/vicodec/codec-v4l2-fwht.c | |||
| @@ -11,32 +11,53 @@ | |||
| 11 | #include "codec-v4l2-fwht.h" | 11 | #include "codec-v4l2-fwht.h" |
| 12 | 12 | ||
| 13 | static const struct v4l2_fwht_pixfmt_info v4l2_fwht_pixfmts[] = { | 13 | static const struct v4l2_fwht_pixfmt_info v4l2_fwht_pixfmts[] = { |
| 14 | { V4L2_PIX_FMT_YUV420, 1, 3, 2, 1, 1, 2, 2, 3}, | 14 | { V4L2_PIX_FMT_YUV420, 1, 3, 2, 1, 1, 2, 2, 3, 3, FWHT_FL_PIXENC_YUV}, |
| 15 | { V4L2_PIX_FMT_YVU420, 1, 3, 2, 1, 1, 2, 2, 3}, | 15 | { V4L2_PIX_FMT_YVU420, 1, 3, 2, 1, 1, 2, 2, 3, 3, FWHT_FL_PIXENC_YUV}, |
| 16 | { V4L2_PIX_FMT_YUV422P, 1, 2, 1, 1, 1, 2, 1, 3}, | 16 | { V4L2_PIX_FMT_YUV422P, 1, 2, 1, 1, 1, 2, 1, 3, 3, FWHT_FL_PIXENC_YUV}, |
| 17 | { V4L2_PIX_FMT_NV12, 1, 3, 2, 1, 2, 2, 2, 3}, | 17 | { V4L2_PIX_FMT_NV12, 1, 3, 2, 1, 2, 2, 2, 3, 2, FWHT_FL_PIXENC_YUV}, |
| 18 | { V4L2_PIX_FMT_NV21, 1, 3, 2, 1, 2, 2, 2, 3}, | 18 | { V4L2_PIX_FMT_NV21, 1, 3, 2, 1, 2, 2, 2, 3, 2, FWHT_FL_PIXENC_YUV}, |
| 19 | { V4L2_PIX_FMT_NV16, 1, 2, 1, 1, 2, 2, 1, 3}, | 19 | { V4L2_PIX_FMT_NV16, 1, 2, 1, 1, 2, 2, 1, 3, 2, FWHT_FL_PIXENC_YUV}, |
| 20 | { V4L2_PIX_FMT_NV61, 1, 2, 1, 1, 2, 2, 1, 3}, | 20 | { V4L2_PIX_FMT_NV61, 1, 2, 1, 1, 2, 2, 1, 3, 2, FWHT_FL_PIXENC_YUV}, |
| 21 | { V4L2_PIX_FMT_NV24, 1, 3, 1, 1, 2, 1, 1, 3}, | 21 | { V4L2_PIX_FMT_NV24, 1, 3, 1, 1, 2, 1, 1, 3, 2, FWHT_FL_PIXENC_YUV}, |
| 22 | { V4L2_PIX_FMT_NV42, 1, 3, 1, 1, 2, 1, 1, 3}, | 22 | { V4L2_PIX_FMT_NV42, 1, 3, 1, 1, 2, 1, 1, 3, 2, FWHT_FL_PIXENC_YUV}, |
| 23 | { V4L2_PIX_FMT_YUYV, 2, 2, 1, 2, 4, 2, 1, 3}, | 23 | { V4L2_PIX_FMT_YUYV, 2, 2, 1, 2, 4, 2, 1, 3, 1, FWHT_FL_PIXENC_YUV}, |
| 24 | { V4L2_PIX_FMT_YVYU, 2, 2, 1, 2, 4, 2, 1, 3}, | 24 | { V4L2_PIX_FMT_YVYU, 2, 2, 1, 2, 4, 2, 1, 3, 1, FWHT_FL_PIXENC_YUV}, |
| 25 | { V4L2_PIX_FMT_UYVY, 2, 2, 1, 2, 4, 2, 1, 3}, | 25 | { V4L2_PIX_FMT_UYVY, 2, 2, 1, 2, 4, 2, 1, 3, 1, FWHT_FL_PIXENC_YUV}, |
| 26 | { V4L2_PIX_FMT_VYUY, 2, 2, 1, 2, 4, 2, 1, 3}, | 26 | { V4L2_PIX_FMT_VYUY, 2, 2, 1, 2, 4, 2, 1, 3, 1, FWHT_FL_PIXENC_YUV}, |
| 27 | { V4L2_PIX_FMT_BGR24, 3, 3, 1, 3, 3, 1, 1, 3}, | 27 | { V4L2_PIX_FMT_BGR24, 3, 3, 1, 3, 3, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 28 | { V4L2_PIX_FMT_RGB24, 3, 3, 1, 3, 3, 1, 1, 3}, | 28 | { V4L2_PIX_FMT_RGB24, 3, 3, 1, 3, 3, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 29 | { V4L2_PIX_FMT_HSV24, 3, 3, 1, 3, 3, 1, 1, 3}, | 29 | { V4L2_PIX_FMT_HSV24, 3, 3, 1, 3, 3, 1, 1, 3, 1, FWHT_FL_PIXENC_HSV}, |
| 30 | { V4L2_PIX_FMT_BGR32, 4, 4, 1, 4, 4, 1, 1, 3}, | 30 | { V4L2_PIX_FMT_BGR32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 31 | { V4L2_PIX_FMT_XBGR32, 4, 4, 1, 4, 4, 1, 1, 3}, | 31 | { V4L2_PIX_FMT_XBGR32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 32 | { V4L2_PIX_FMT_RGB32, 4, 4, 1, 4, 4, 1, 1, 3}, | 32 | { V4L2_PIX_FMT_RGB32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 33 | { V4L2_PIX_FMT_XRGB32, 4, 4, 1, 4, 4, 1, 1, 3}, | 33 | { V4L2_PIX_FMT_XRGB32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 34 | { V4L2_PIX_FMT_HSV32, 4, 4, 1, 4, 4, 1, 1, 3}, | 34 | { V4L2_PIX_FMT_HSV32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_HSV}, |
| 35 | { V4L2_PIX_FMT_ARGB32, 4, 4, 1, 4, 4, 1, 1, 4}, | 35 | { V4L2_PIX_FMT_ARGB32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, |
| 36 | { V4L2_PIX_FMT_ABGR32, 4, 4, 1, 4, 4, 1, 1, 4}, | 36 | { V4L2_PIX_FMT_ABGR32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, |
| 37 | { V4L2_PIX_FMT_GREY, 1, 1, 1, 1, 0, 1, 1, 1}, | 37 | { V4L2_PIX_FMT_GREY, 1, 1, 1, 1, 0, 1, 1, 1, 1, FWHT_FL_PIXENC_RGB}, |
| 38 | }; | 38 | }; |
| 39 | 39 | ||
| 40 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_default_fmt(u32 width_div, | ||
| 41 | u32 height_div, | ||
| 42 | u32 components_num, | ||
| 43 | u32 pixenc, | ||
| 44 | unsigned int start_idx) | ||
| 45 | { | ||
| 46 | unsigned int i; | ||
| 47 | |||
| 48 | for (i = 0; i < ARRAY_SIZE(v4l2_fwht_pixfmts); i++) { | ||
| 49 | if (v4l2_fwht_pixfmts[i].width_div == width_div && | ||
| 50 | v4l2_fwht_pixfmts[i].height_div == height_div && | ||
| 51 | (!pixenc || v4l2_fwht_pixfmts[i].pixenc == pixenc) && | ||
| 52 | v4l2_fwht_pixfmts[i].components_num == components_num) { | ||
| 53 | if (start_idx == 0) | ||
| 54 | return v4l2_fwht_pixfmts + i; | ||
| 55 | start_idx--; | ||
| 56 | } | ||
| 57 | } | ||
| 58 | return NULL; | ||
| 59 | } | ||
| 60 | |||
| 40 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_find_pixfmt(u32 pixelformat) | 61 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_find_pixfmt(u32 pixelformat) |
| 41 | { | 62 | { |
| 42 | unsigned int i; | 63 | unsigned int i; |
| @@ -56,7 +77,8 @@ const struct v4l2_fwht_pixfmt_info *v4l2_fwht_get_pixfmt(u32 idx) | |||
| 56 | 77 | ||
| 57 | int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | 78 | int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) |
| 58 | { | 79 | { |
| 59 | unsigned int size = state->width * state->height; | 80 | unsigned int size = state->stride * state->coded_height; |
| 81 | unsigned int chroma_stride = state->stride; | ||
| 60 | const struct v4l2_fwht_pixfmt_info *info = state->info; | 82 | const struct v4l2_fwht_pixfmt_info *info = state->info; |
| 61 | struct fwht_cframe_hdr *p_hdr; | 83 | struct fwht_cframe_hdr *p_hdr; |
| 62 | struct fwht_cframe cf; | 84 | struct fwht_cframe cf; |
| @@ -66,8 +88,7 @@ int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | |||
| 66 | 88 | ||
| 67 | if (!info) | 89 | if (!info) |
| 68 | return -EINVAL; | 90 | return -EINVAL; |
| 69 | rf.width = state->width; | 91 | |
| 70 | rf.height = state->height; | ||
| 71 | rf.luma = p_in; | 92 | rf.luma = p_in; |
| 72 | rf.width_div = info->width_div; | 93 | rf.width_div = info->width_div; |
| 73 | rf.height_div = info->height_div; | 94 | rf.height_div = info->height_div; |
| @@ -84,14 +105,17 @@ int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | |||
| 84 | case V4L2_PIX_FMT_YUV420: | 105 | case V4L2_PIX_FMT_YUV420: |
| 85 | rf.cb = rf.luma + size; | 106 | rf.cb = rf.luma + size; |
| 86 | rf.cr = rf.cb + size / 4; | 107 | rf.cr = rf.cb + size / 4; |
| 108 | chroma_stride /= 2; | ||
| 87 | break; | 109 | break; |
| 88 | case V4L2_PIX_FMT_YVU420: | 110 | case V4L2_PIX_FMT_YVU420: |
| 89 | rf.cr = rf.luma + size; | 111 | rf.cr = rf.luma + size; |
| 90 | rf.cb = rf.cr + size / 4; | 112 | rf.cb = rf.cr + size / 4; |
| 113 | chroma_stride /= 2; | ||
| 91 | break; | 114 | break; |
| 92 | case V4L2_PIX_FMT_YUV422P: | 115 | case V4L2_PIX_FMT_YUV422P: |
| 93 | rf.cb = rf.luma + size; | 116 | rf.cb = rf.luma + size; |
| 94 | rf.cr = rf.cb + size / 2; | 117 | rf.cr = rf.cb + size / 2; |
| 118 | chroma_stride /= 2; | ||
| 95 | break; | 119 | break; |
| 96 | case V4L2_PIX_FMT_NV12: | 120 | case V4L2_PIX_FMT_NV12: |
| 97 | case V4L2_PIX_FMT_NV16: | 121 | case V4L2_PIX_FMT_NV16: |
| @@ -163,15 +187,16 @@ int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | |||
| 163 | return -EINVAL; | 187 | return -EINVAL; |
| 164 | } | 188 | } |
| 165 | 189 | ||
| 166 | cf.width = state->width; | ||
| 167 | cf.height = state->height; | ||
| 168 | cf.i_frame_qp = state->i_frame_qp; | 190 | cf.i_frame_qp = state->i_frame_qp; |
| 169 | cf.p_frame_qp = state->p_frame_qp; | 191 | cf.p_frame_qp = state->p_frame_qp; |
| 170 | cf.rlc_data = (__be16 *)(p_out + sizeof(*p_hdr)); | 192 | cf.rlc_data = (__be16 *)(p_out + sizeof(*p_hdr)); |
| 171 | 193 | ||
| 172 | encoding = fwht_encode_frame(&rf, &state->ref_frame, &cf, | 194 | encoding = fwht_encode_frame(&rf, &state->ref_frame, &cf, |
| 173 | !state->gop_cnt, | 195 | !state->gop_cnt, |
| 174 | state->gop_cnt == state->gop_size - 1); | 196 | state->gop_cnt == state->gop_size - 1, |
| 197 | state->visible_width, | ||
| 198 | state->visible_height, | ||
| 199 | state->stride, chroma_stride); | ||
| 175 | if (!(encoding & FWHT_FRAME_PCODED)) | 200 | if (!(encoding & FWHT_FRAME_PCODED)) |
| 176 | state->gop_cnt = 0; | 201 | state->gop_cnt = 0; |
| 177 | if (++state->gop_cnt >= state->gop_size) | 202 | if (++state->gop_cnt >= state->gop_size) |
| @@ -181,9 +206,10 @@ int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | |||
| 181 | p_hdr->magic1 = FWHT_MAGIC1; | 206 | p_hdr->magic1 = FWHT_MAGIC1; |
| 182 | p_hdr->magic2 = FWHT_MAGIC2; | 207 | p_hdr->magic2 = FWHT_MAGIC2; |
| 183 | p_hdr->version = htonl(FWHT_VERSION); | 208 | p_hdr->version = htonl(FWHT_VERSION); |
| 184 | p_hdr->width = htonl(cf.width); | 209 | p_hdr->width = htonl(state->visible_width); |
| 185 | p_hdr->height = htonl(cf.height); | 210 | p_hdr->height = htonl(state->visible_height); |
| 186 | flags |= (info->components_num - 1) << FWHT_FL_COMPONENTS_NUM_OFFSET; | 211 | flags |= (info->components_num - 1) << FWHT_FL_COMPONENTS_NUM_OFFSET; |
| 212 | flags |= info->pixenc; | ||
| 187 | if (encoding & FWHT_LUMA_UNENCODED) | 213 | if (encoding & FWHT_LUMA_UNENCODED) |
| 188 | flags |= FWHT_FL_LUMA_IS_UNCOMPRESSED; | 214 | flags |= FWHT_FL_LUMA_IS_UNCOMPRESSED; |
| 189 | if (encoding & FWHT_CB_UNENCODED) | 215 | if (encoding & FWHT_CB_UNENCODED) |
| @@ -192,6 +218,8 @@ int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | |||
| 192 | flags |= FWHT_FL_CR_IS_UNCOMPRESSED; | 218 | flags |= FWHT_FL_CR_IS_UNCOMPRESSED; |
| 193 | if (encoding & FWHT_ALPHA_UNENCODED) | 219 | if (encoding & FWHT_ALPHA_UNENCODED) |
| 194 | flags |= FWHT_FL_ALPHA_IS_UNCOMPRESSED; | 220 | flags |= FWHT_FL_ALPHA_IS_UNCOMPRESSED; |
| 221 | if (!(encoding & FWHT_FRAME_PCODED)) | ||
| 222 | flags |= FWHT_FL_I_FRAME; | ||
| 195 | if (rf.height_div == 1) | 223 | if (rf.height_div == 1) |
| 196 | flags |= FWHT_FL_CHROMA_FULL_HEIGHT; | 224 | flags |= FWHT_FL_CHROMA_FULL_HEIGHT; |
| 197 | if (rf.width_div == 1) | 225 | if (rf.width_div == 1) |
| @@ -202,65 +230,70 @@ int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | |||
| 202 | p_hdr->ycbcr_enc = htonl(state->ycbcr_enc); | 230 | p_hdr->ycbcr_enc = htonl(state->ycbcr_enc); |
| 203 | p_hdr->quantization = htonl(state->quantization); | 231 | p_hdr->quantization = htonl(state->quantization); |
| 204 | p_hdr->size = htonl(cf.size); | 232 | p_hdr->size = htonl(cf.size); |
| 205 | state->ref_frame.width = cf.width; | ||
| 206 | state->ref_frame.height = cf.height; | ||
| 207 | return cf.size + sizeof(*p_hdr); | 233 | return cf.size + sizeof(*p_hdr); |
| 208 | } | 234 | } |
| 209 | 235 | ||
| 210 | int v4l2_fwht_decode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | 236 | int v4l2_fwht_decode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) |
| 211 | { | 237 | { |
| 212 | unsigned int size = state->width * state->height; | 238 | unsigned int i, j, k; |
| 213 | unsigned int chroma_size = size; | ||
| 214 | unsigned int i; | ||
| 215 | u32 flags; | 239 | u32 flags; |
| 216 | struct fwht_cframe_hdr *p_hdr; | ||
| 217 | struct fwht_cframe cf; | 240 | struct fwht_cframe cf; |
| 218 | u8 *p; | 241 | u8 *p, *ref_p; |
| 219 | unsigned int components_num = 3; | 242 | unsigned int components_num = 3; |
| 220 | unsigned int version; | 243 | unsigned int version; |
| 244 | const struct v4l2_fwht_pixfmt_info *info; | ||
| 245 | unsigned int hdr_width_div, hdr_height_div; | ||
| 221 | 246 | ||
| 222 | if (!state->info) | 247 | if (!state->info) |
| 223 | return -EINVAL; | 248 | return -EINVAL; |
| 224 | 249 | ||
| 225 | p_hdr = (struct fwht_cframe_hdr *)p_in; | 250 | info = state->info; |
| 226 | cf.width = ntohl(p_hdr->width); | ||
| 227 | cf.height = ntohl(p_hdr->height); | ||
| 228 | 251 | ||
| 229 | version = ntohl(p_hdr->version); | 252 | version = ntohl(state->header.version); |
| 230 | if (!version || version > FWHT_VERSION) { | 253 | if (!version || version > FWHT_VERSION) { |
| 231 | pr_err("version %d is not supported, current version is %d\n", | 254 | pr_err("version %d is not supported, current version is %d\n", |
| 232 | version, FWHT_VERSION); | 255 | version, FWHT_VERSION); |
| 233 | return -EINVAL; | 256 | return -EINVAL; |
| 234 | } | 257 | } |
| 235 | 258 | ||
| 236 | if (p_hdr->magic1 != FWHT_MAGIC1 || | 259 | if (state->header.magic1 != FWHT_MAGIC1 || |
| 237 | p_hdr->magic2 != FWHT_MAGIC2 || | 260 | state->header.magic2 != FWHT_MAGIC2) |
| 238 | (cf.width & 7) || (cf.height & 7)) | ||
| 239 | return -EINVAL; | 261 | return -EINVAL; |
| 240 | 262 | ||
| 241 | /* TODO: support resolution changes */ | 263 | /* TODO: support resolution changes */ |
| 242 | if (cf.width != state->width || cf.height != state->height) | 264 | if (ntohl(state->header.width) != state->visible_width || |
| 265 | ntohl(state->header.height) != state->visible_height) | ||
| 243 | return -EINVAL; | 266 | return -EINVAL; |
| 244 | 267 | ||
| 245 | flags = ntohl(p_hdr->flags); | 268 | flags = ntohl(state->header.flags); |
| 246 | 269 | ||
| 247 | if (version == FWHT_VERSION) { | 270 | if (version >= 2) { |
| 271 | if ((flags & FWHT_FL_PIXENC_MSK) != info->pixenc) | ||
| 272 | return -EINVAL; | ||
| 248 | components_num = 1 + ((flags & FWHT_FL_COMPONENTS_NUM_MSK) >> | 273 | components_num = 1 + ((flags & FWHT_FL_COMPONENTS_NUM_MSK) >> |
| 249 | FWHT_FL_COMPONENTS_NUM_OFFSET); | 274 | FWHT_FL_COMPONENTS_NUM_OFFSET); |
| 250 | } | 275 | } |
| 251 | 276 | ||
| 252 | state->colorspace = ntohl(p_hdr->colorspace); | 277 | if (components_num != info->components_num) |
| 253 | state->xfer_func = ntohl(p_hdr->xfer_func); | 278 | return -EINVAL; |
| 254 | state->ycbcr_enc = ntohl(p_hdr->ycbcr_enc); | ||
| 255 | state->quantization = ntohl(p_hdr->quantization); | ||
| 256 | cf.rlc_data = (__be16 *)(p_in + sizeof(*p_hdr)); | ||
| 257 | 279 | ||
| 258 | if (!(flags & FWHT_FL_CHROMA_FULL_WIDTH)) | 280 | state->colorspace = ntohl(state->header.colorspace); |
| 259 | chroma_size /= 2; | 281 | state->xfer_func = ntohl(state->header.xfer_func); |
| 260 | if (!(flags & FWHT_FL_CHROMA_FULL_HEIGHT)) | 282 | state->ycbcr_enc = ntohl(state->header.ycbcr_enc); |
| 261 | chroma_size /= 2; | 283 | state->quantization = ntohl(state->header.quantization); |
| 284 | cf.rlc_data = (__be16 *)p_in; | ||
| 285 | cf.size = ntohl(state->header.size); | ||
| 262 | 286 | ||
| 263 | fwht_decode_frame(&cf, &state->ref_frame, flags, components_num); | 287 | hdr_width_div = (flags & FWHT_FL_CHROMA_FULL_WIDTH) ? 1 : 2; |
| 288 | hdr_height_div = (flags & FWHT_FL_CHROMA_FULL_HEIGHT) ? 1 : 2; | ||
| 289 | if (hdr_width_div != info->width_div || | ||
| 290 | hdr_height_div != info->height_div) | ||
| 291 | return -EINVAL; | ||
| 292 | |||
| 293 | if (!fwht_decode_frame(&cf, &state->ref_frame, flags, components_num, | ||
| 294 | state->visible_width, state->visible_height, | ||
| 295 | state->coded_width)) | ||
| 296 | return -EINVAL; | ||
| 264 | 297 | ||
| 265 | /* | 298 | /* |
| 266 | * TODO - handle the case where the compressed stream encodes a | 299 | * TODO - handle the case where the compressed stream encodes a |
| @@ -268,123 +301,226 @@ int v4l2_fwht_decode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out) | |||
| 268 | */ | 301 | */ |
| 269 | switch (state->info->id) { | 302 | switch (state->info->id) { |
| 270 | case V4L2_PIX_FMT_GREY: | 303 | case V4L2_PIX_FMT_GREY: |
| 271 | memcpy(p_out, state->ref_frame.luma, size); | 304 | ref_p = state->ref_frame.luma; |
| 305 | for (i = 0; i < state->coded_height; i++) { | ||
| 306 | memcpy(p_out, ref_p, state->visible_width); | ||
| 307 | p_out += state->stride; | ||
| 308 | ref_p += state->coded_width; | ||
| 309 | } | ||
| 272 | break; | 310 | break; |
| 273 | case V4L2_PIX_FMT_YUV420: | 311 | case V4L2_PIX_FMT_YUV420: |
| 274 | case V4L2_PIX_FMT_YUV422P: | 312 | case V4L2_PIX_FMT_YUV422P: |
| 275 | memcpy(p_out, state->ref_frame.luma, size); | 313 | ref_p = state->ref_frame.luma; |
| 276 | p_out += size; | 314 | for (i = 0; i < state->coded_height; i++) { |
| 277 | memcpy(p_out, state->ref_frame.cb, chroma_size); | 315 | memcpy(p_out, ref_p, state->visible_width); |
| 278 | p_out += chroma_size; | 316 | p_out += state->stride; |
| 279 | memcpy(p_out, state->ref_frame.cr, chroma_size); | 317 | ref_p += state->coded_width; |
| 318 | } | ||
| 319 | |||
| 320 | ref_p = state->ref_frame.cb; | ||
| 321 | for (i = 0; i < state->coded_height / 2; i++) { | ||
| 322 | memcpy(p_out, ref_p, state->visible_width / 2); | ||
| 323 | p_out += state->stride / 2; | ||
| 324 | ref_p += state->coded_width / 2; | ||
| 325 | } | ||
| 326 | ref_p = state->ref_frame.cr; | ||
| 327 | for (i = 0; i < state->coded_height / 2; i++) { | ||
| 328 | memcpy(p_out, ref_p, state->visible_width / 2); | ||
| 329 | p_out += state->stride / 2; | ||
| 330 | ref_p += state->coded_width / 2; | ||
| 331 | } | ||
| 280 | break; | 332 | break; |
| 281 | case V4L2_PIX_FMT_YVU420: | 333 | case V4L2_PIX_FMT_YVU420: |
| 282 | memcpy(p_out, state->ref_frame.luma, size); | 334 | ref_p = state->ref_frame.luma; |
| 283 | p_out += size; | 335 | for (i = 0; i < state->coded_height; i++) { |
| 284 | memcpy(p_out, state->ref_frame.cr, chroma_size); | 336 | memcpy(p_out, ref_p, state->visible_width); |
| 285 | p_out += chroma_size; | 337 | p_out += state->stride; |
| 286 | memcpy(p_out, state->ref_frame.cb, chroma_size); | 338 | ref_p += state->coded_width; |
| 339 | } | ||
| 340 | |||
| 341 | ref_p = state->ref_frame.cr; | ||
| 342 | for (i = 0; i < state->coded_height / 2; i++) { | ||
| 343 | memcpy(p_out, ref_p, state->visible_width / 2); | ||
| 344 | p_out += state->stride / 2; | ||
| 345 | ref_p += state->coded_width / 2; | ||
| 346 | } | ||
| 347 | ref_p = state->ref_frame.cb; | ||
| 348 | for (i = 0; i < state->coded_height / 2; i++) { | ||
| 349 | memcpy(p_out, ref_p, state->visible_width / 2); | ||
| 350 | p_out += state->stride / 2; | ||
| 351 | ref_p += state->coded_width / 2; | ||
| 352 | } | ||
| 287 | break; | 353 | break; |
| 288 | case V4L2_PIX_FMT_NV12: | 354 | case V4L2_PIX_FMT_NV12: |
| 289 | case V4L2_PIX_FMT_NV16: | 355 | case V4L2_PIX_FMT_NV16: |
| 290 | case V4L2_PIX_FMT_NV24: | 356 | case V4L2_PIX_FMT_NV24: |
| 291 | memcpy(p_out, state->ref_frame.luma, size); | 357 | ref_p = state->ref_frame.luma; |
| 292 | p_out += size; | 358 | for (i = 0; i < state->coded_height; i++) { |
| 293 | for (i = 0, p = p_out; i < chroma_size; i++) { | 359 | memcpy(p_out, ref_p, state->visible_width); |
| 294 | *p++ = state->ref_frame.cb[i]; | 360 | p_out += state->stride; |
| 295 | *p++ = state->ref_frame.cr[i]; | 361 | ref_p += state->coded_width; |
| 362 | } | ||
| 363 | |||
| 364 | k = 0; | ||
| 365 | for (i = 0; i < state->coded_height / 2; i++) { | ||
| 366 | for (j = 0, p = p_out; j < state->coded_width / 2; j++) { | ||
| 367 | *p++ = state->ref_frame.cb[k]; | ||
| 368 | *p++ = state->ref_frame.cr[k]; | ||
| 369 | k++; | ||
| 370 | } | ||
| 371 | p_out += state->stride; | ||
| 296 | } | 372 | } |
| 297 | break; | 373 | break; |
| 298 | case V4L2_PIX_FMT_NV21: | 374 | case V4L2_PIX_FMT_NV21: |
| 299 | case V4L2_PIX_FMT_NV61: | 375 | case V4L2_PIX_FMT_NV61: |
| 300 | case V4L2_PIX_FMT_NV42: | 376 | case V4L2_PIX_FMT_NV42: |
| 301 | memcpy(p_out, state->ref_frame.luma, size); | 377 | ref_p = state->ref_frame.luma; |
| 302 | p_out += size; | 378 | for (i = 0; i < state->coded_height; i++) { |
| 303 | for (i = 0, p = p_out; i < chroma_size; i++) { | 379 | memcpy(p_out, ref_p, state->visible_width); |
| 304 | *p++ = state->ref_frame.cr[i]; | 380 | p_out += state->stride; |
| 305 | *p++ = state->ref_frame.cb[i]; | 381 | ref_p += state->coded_width; |
| 382 | } | ||
| 383 | |||
| 384 | k = 0; | ||
| 385 | for (i = 0; i < state->coded_height / 2; i++) { | ||
| 386 | for (j = 0, p = p_out; j < state->coded_width / 2; j++) { | ||
| 387 | *p++ = state->ref_frame.cr[k]; | ||
| 388 | *p++ = state->ref_frame.cb[k]; | ||
| 389 | k++; | ||
| 390 | } | ||
| 391 | p_out += state->stride; | ||
| 306 | } | 392 | } |
| 307 | break; | 393 | break; |
| 308 | case V4L2_PIX_FMT_YUYV: | 394 | case V4L2_PIX_FMT_YUYV: |
| 309 | for (i = 0, p = p_out; i < size; i += 2) { | 395 | k = 0; |
| 310 | *p++ = state->ref_frame.luma[i]; | 396 | for (i = 0; i < state->coded_height; i++) { |
| 311 | *p++ = state->ref_frame.cb[i / 2]; | 397 | for (j = 0, p = p_out; j < state->coded_width / 2; j++) { |
| 312 | *p++ = state->ref_frame.luma[i + 1]; | 398 | *p++ = state->ref_frame.luma[k]; |
| 313 | *p++ = state->ref_frame.cr[i / 2]; | 399 | *p++ = state->ref_frame.cb[k / 2]; |
| 400 | *p++ = state->ref_frame.luma[k + 1]; | ||
| 401 | *p++ = state->ref_frame.cr[k / 2]; | ||
| 402 | k += 2; | ||
| 403 | } | ||
| 404 | p_out += state->stride; | ||
| 314 | } | 405 | } |
| 315 | break; | 406 | break; |
| 316 | case V4L2_PIX_FMT_YVYU: | 407 | case V4L2_PIX_FMT_YVYU: |
| 317 | for (i = 0, p = p_out; i < size; i += 2) { | 408 | k = 0; |
| 318 | *p++ = state->ref_frame.luma[i]; | 409 | for (i = 0; i < state->coded_height; i++) { |
| 319 | *p++ = state->ref_frame.cr[i / 2]; | 410 | for (j = 0, p = p_out; j < state->coded_width / 2; j++) { |
| 320 | *p++ = state->ref_frame.luma[i + 1]; | 411 | *p++ = state->ref_frame.luma[k]; |
| 321 | *p++ = state->ref_frame.cb[i / 2]; | 412 | *p++ = state->ref_frame.cr[k / 2]; |
| 413 | *p++ = state->ref_frame.luma[k + 1]; | ||
| 414 | *p++ = state->ref_frame.cb[k / 2]; | ||
| 415 | k += 2; | ||
| 416 | } | ||
| 417 | p_out += state->stride; | ||
| 322 | } | 418 | } |
| 323 | break; | 419 | break; |
| 324 | case V4L2_PIX_FMT_UYVY: | 420 | case V4L2_PIX_FMT_UYVY: |
| 325 | for (i = 0, p = p_out; i < size; i += 2) { | 421 | k = 0; |
| 326 | *p++ = state->ref_frame.cb[i / 2]; | 422 | for (i = 0; i < state->coded_height; i++) { |
| 327 | *p++ = state->ref_frame.luma[i]; | 423 | for (j = 0, p = p_out; j < state->coded_width / 2; j++) { |
| 328 | *p++ = state->ref_frame.cr[i / 2]; | 424 | *p++ = state->ref_frame.cb[k / 2]; |
| 329 | *p++ = state->ref_frame.luma[i + 1]; | 425 | *p++ = state->ref_frame.luma[k]; |
| 426 | *p++ = state->ref_frame.cr[k / 2]; | ||
| 427 | *p++ = state->ref_frame.luma[k + 1]; | ||
| 428 | k += 2; | ||
| 429 | } | ||
| 430 | p_out += state->stride; | ||
| 330 | } | 431 | } |
| 331 | break; | 432 | break; |
| 332 | case V4L2_PIX_FMT_VYUY: | 433 | case V4L2_PIX_FMT_VYUY: |
| 333 | for (i = 0, p = p_out; i < size; i += 2) { | 434 | k = 0; |
| 334 | *p++ = state->ref_frame.cr[i / 2]; | 435 | for (i = 0; i < state->coded_height; i++) { |
| 335 | *p++ = state->ref_frame.luma[i]; | 436 | for (j = 0, p = p_out; j < state->coded_width / 2; j++) { |
| 336 | *p++ = state->ref_frame.cb[i / 2]; | 437 | *p++ = state->ref_frame.cr[k / 2]; |
| 337 | *p++ = state->ref_frame.luma[i + 1]; | 438 | *p++ = state->ref_frame.luma[k]; |
| 439 | *p++ = state->ref_frame.cb[k / 2]; | ||
| 440 | *p++ = state->ref_frame.luma[k + 1]; | ||
| 441 | k += 2; | ||
| 442 | } | ||
| 443 | p_out += state->stride; | ||
| 338 | } | 444 | } |
| 339 | break; | 445 | break; |
| 340 | case V4L2_PIX_FMT_RGB24: | 446 | case V4L2_PIX_FMT_RGB24: |
| 341 | case V4L2_PIX_FMT_HSV24: | 447 | case V4L2_PIX_FMT_HSV24: |
| 342 | for (i = 0, p = p_out; i < size; i++) { | 448 | k = 0; |
| 343 | *p++ = state->ref_frame.cr[i]; | 449 | for (i = 0; i < state->coded_height; i++) { |
| 344 | *p++ = state->ref_frame.luma[i]; | 450 | for (j = 0, p = p_out; j < state->coded_width; j++) { |
| 345 | *p++ = state->ref_frame.cb[i]; | 451 | *p++ = state->ref_frame.cr[k]; |
| 452 | *p++ = state->ref_frame.luma[k]; | ||
| 453 | *p++ = state->ref_frame.cb[k]; | ||
| 454 | k++; | ||
| 455 | } | ||
| 456 | p_out += state->stride; | ||
| 346 | } | 457 | } |
| 347 | break; | 458 | break; |
| 348 | case V4L2_PIX_FMT_BGR24: | 459 | case V4L2_PIX_FMT_BGR24: |
| 349 | for (i = 0, p = p_out; i < size; i++) { | 460 | k = 0; |
| 350 | *p++ = state->ref_frame.cb[i]; | 461 | for (i = 0; i < state->coded_height; i++) { |
| 351 | *p++ = state->ref_frame.luma[i]; | 462 | for (j = 0, p = p_out; j < state->coded_width; j++) { |
| 352 | *p++ = state->ref_frame.cr[i]; | 463 | *p++ = state->ref_frame.cb[k]; |
| 464 | *p++ = state->ref_frame.luma[k]; | ||
| 465 | *p++ = state->ref_frame.cr[k]; | ||
| 466 | k++; | ||
| 467 | } | ||
| 468 | p_out += state->stride; | ||
| 353 | } | 469 | } |
| 354 | break; | 470 | break; |
| 355 | case V4L2_PIX_FMT_RGB32: | 471 | case V4L2_PIX_FMT_RGB32: |
| 356 | case V4L2_PIX_FMT_XRGB32: | 472 | case V4L2_PIX_FMT_XRGB32: |
| 357 | case V4L2_PIX_FMT_HSV32: | 473 | case V4L2_PIX_FMT_HSV32: |
| 358 | for (i = 0, p = p_out; i < size; i++) { | 474 | k = 0; |
| 359 | *p++ = 0; | 475 | for (i = 0; i < state->coded_height; i++) { |
| 360 | *p++ = state->ref_frame.cr[i]; | 476 | for (j = 0, p = p_out; j < state->coded_width; j++) { |
| 361 | *p++ = state->ref_frame.luma[i]; | 477 | *p++ = 0; |
| 362 | *p++ = state->ref_frame.cb[i]; | 478 | *p++ = state->ref_frame.cr[k]; |
| 479 | *p++ = state->ref_frame.luma[k]; | ||
| 480 | *p++ = state->ref_frame.cb[k]; | ||
| 481 | k++; | ||
| 482 | } | ||
| 483 | p_out += state->stride; | ||
| 363 | } | 484 | } |
| 364 | break; | 485 | break; |
| 365 | case V4L2_PIX_FMT_BGR32: | 486 | case V4L2_PIX_FMT_BGR32: |
| 366 | case V4L2_PIX_FMT_XBGR32: | 487 | case V4L2_PIX_FMT_XBGR32: |
| 367 | for (i = 0, p = p_out; i < size; i++) { | 488 | k = 0; |
| 368 | *p++ = state->ref_frame.cb[i]; | 489 | for (i = 0; i < state->coded_height; i++) { |
| 369 | *p++ = state->ref_frame.luma[i]; | 490 | for (j = 0, p = p_out; j < state->coded_width; j++) { |
| 370 | *p++ = state->ref_frame.cr[i]; | 491 | *p++ = state->ref_frame.cb[k]; |
| 371 | *p++ = 0; | 492 | *p++ = state->ref_frame.luma[k]; |
| 493 | *p++ = state->ref_frame.cr[k]; | ||
| 494 | *p++ = 0; | ||
| 495 | k++; | ||
| 496 | } | ||
| 497 | p_out += state->stride; | ||
| 372 | } | 498 | } |
| 373 | break; | 499 | break; |
| 374 | case V4L2_PIX_FMT_ARGB32: | 500 | case V4L2_PIX_FMT_ARGB32: |
| 375 | for (i = 0, p = p_out; i < size; i++) { | 501 | k = 0; |
| 376 | *p++ = state->ref_frame.alpha[i]; | 502 | for (i = 0; i < state->coded_height; i++) { |
| 377 | *p++ = state->ref_frame.cr[i]; | 503 | for (j = 0, p = p_out; j < state->coded_width; j++) { |
| 378 | *p++ = state->ref_frame.luma[i]; | 504 | *p++ = state->ref_frame.alpha[k]; |
| 379 | *p++ = state->ref_frame.cb[i]; | 505 | *p++ = state->ref_frame.cr[k]; |
| 506 | *p++ = state->ref_frame.luma[k]; | ||
| 507 | *p++ = state->ref_frame.cb[k]; | ||
| 508 | k++; | ||
| 509 | } | ||
| 510 | p_out += state->stride; | ||
| 380 | } | 511 | } |
| 381 | break; | 512 | break; |
| 382 | case V4L2_PIX_FMT_ABGR32: | 513 | case V4L2_PIX_FMT_ABGR32: |
| 383 | for (i = 0, p = p_out; i < size; i++) { | 514 | k = 0; |
| 384 | *p++ = state->ref_frame.cb[i]; | 515 | for (i = 0; i < state->coded_height; i++) { |
| 385 | *p++ = state->ref_frame.luma[i]; | 516 | for (j = 0, p = p_out; j < state->coded_width; j++) { |
| 386 | *p++ = state->ref_frame.cr[i]; | 517 | *p++ = state->ref_frame.cb[k]; |
| 387 | *p++ = state->ref_frame.alpha[i]; | 518 | *p++ = state->ref_frame.luma[k]; |
| 519 | *p++ = state->ref_frame.cr[k]; | ||
| 520 | *p++ = state->ref_frame.alpha[k]; | ||
| 521 | k++; | ||
| 522 | } | ||
| 523 | p_out += state->stride; | ||
| 388 | } | 524 | } |
| 389 | break; | 525 | break; |
| 390 | default: | 526 | default: |
diff --git a/drivers/media/platform/vicodec/codec-v4l2-fwht.h b/drivers/media/platform/vicodec/codec-v4l2-fwht.h index ed53e28d4f9c..aa6fa90a48be 100644 --- a/drivers/media/platform/vicodec/codec-v4l2-fwht.h +++ b/drivers/media/platform/vicodec/codec-v4l2-fwht.h | |||
| @@ -19,12 +19,17 @@ struct v4l2_fwht_pixfmt_info { | |||
| 19 | unsigned int width_div; | 19 | unsigned int width_div; |
| 20 | unsigned int height_div; | 20 | unsigned int height_div; |
| 21 | unsigned int components_num; | 21 | unsigned int components_num; |
| 22 | unsigned int planes_num; | ||
| 23 | unsigned int pixenc; | ||
| 22 | }; | 24 | }; |
| 23 | 25 | ||
| 24 | struct v4l2_fwht_state { | 26 | struct v4l2_fwht_state { |
| 25 | const struct v4l2_fwht_pixfmt_info *info; | 27 | const struct v4l2_fwht_pixfmt_info *info; |
| 26 | unsigned int width; | 28 | unsigned int visible_width; |
| 27 | unsigned int height; | 29 | unsigned int visible_height; |
| 30 | unsigned int coded_width; | ||
| 31 | unsigned int coded_height; | ||
| 32 | unsigned int stride; | ||
| 28 | unsigned int gop_size; | 33 | unsigned int gop_size; |
| 29 | unsigned int gop_cnt; | 34 | unsigned int gop_cnt; |
| 30 | u16 i_frame_qp; | 35 | u16 i_frame_qp; |
| @@ -36,11 +41,17 @@ struct v4l2_fwht_state { | |||
| 36 | enum v4l2_quantization quantization; | 41 | enum v4l2_quantization quantization; |
| 37 | 42 | ||
| 38 | struct fwht_raw_frame ref_frame; | 43 | struct fwht_raw_frame ref_frame; |
| 44 | struct fwht_cframe_hdr header; | ||
| 39 | u8 *compressed_frame; | 45 | u8 *compressed_frame; |
| 40 | }; | 46 | }; |
| 41 | 47 | ||
| 42 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_find_pixfmt(u32 pixelformat); | 48 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_find_pixfmt(u32 pixelformat); |
| 43 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_get_pixfmt(u32 idx); | 49 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_get_pixfmt(u32 idx); |
| 50 | const struct v4l2_fwht_pixfmt_info *v4l2_fwht_default_fmt(u32 width_div, | ||
| 51 | u32 height_div, | ||
| 52 | u32 components_num, | ||
| 53 | u32 pixenc, | ||
| 54 | unsigned int start_idx); | ||
| 44 | 55 | ||
| 45 | int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out); | 56 | int v4l2_fwht_encode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out); |
| 46 | int v4l2_fwht_decode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out); | 57 | int v4l2_fwht_decode(struct v4l2_fwht_state *state, u8 *p_in, u8 *p_out); |
diff --git a/drivers/media/platform/vicodec/vicodec-core.c b/drivers/media/platform/vicodec/vicodec-core.c index 0d7876f5acf0..d7636fe9e174 100644 --- a/drivers/media/platform/vicodec/vicodec-core.c +++ b/drivers/media/platform/vicodec/vicodec-core.c | |||
| @@ -61,7 +61,7 @@ struct pixfmt_info { | |||
| 61 | }; | 61 | }; |
| 62 | 62 | ||
| 63 | static const struct v4l2_fwht_pixfmt_info pixfmt_fwht = { | 63 | static const struct v4l2_fwht_pixfmt_info pixfmt_fwht = { |
| 64 | V4L2_PIX_FMT_FWHT, 0, 3, 1, 1, 1, 1, 1, 0 | 64 | V4L2_PIX_FMT_FWHT, 0, 3, 1, 1, 1, 1, 1, 0, 1 |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | static void vicodec_dev_release(struct device *dev) | 67 | static void vicodec_dev_release(struct device *dev) |
| @@ -75,8 +75,10 @@ static struct platform_device vicodec_pdev = { | |||
| 75 | 75 | ||
| 76 | /* Per-queue, driver-specific private data */ | 76 | /* Per-queue, driver-specific private data */ |
| 77 | struct vicodec_q_data { | 77 | struct vicodec_q_data { |
| 78 | unsigned int width; | 78 | unsigned int coded_width; |
| 79 | unsigned int height; | 79 | unsigned int coded_height; |
| 80 | unsigned int visible_width; | ||
| 81 | unsigned int visible_height; | ||
| 80 | unsigned int sizeimage; | 82 | unsigned int sizeimage; |
| 81 | unsigned int sequence; | 83 | unsigned int sequence; |
| 82 | const struct v4l2_fwht_pixfmt_info *info; | 84 | const struct v4l2_fwht_pixfmt_info *info; |
| @@ -122,10 +124,12 @@ struct vicodec_ctx { | |||
| 122 | u32 cur_buf_offset; | 124 | u32 cur_buf_offset; |
| 123 | u32 comp_max_size; | 125 | u32 comp_max_size; |
| 124 | u32 comp_size; | 126 | u32 comp_size; |
| 127 | u32 header_size; | ||
| 125 | u32 comp_magic_cnt; | 128 | u32 comp_magic_cnt; |
| 126 | u32 comp_frame_size; | ||
| 127 | bool comp_has_frame; | 129 | bool comp_has_frame; |
| 128 | bool comp_has_next_frame; | 130 | bool comp_has_next_frame; |
| 131 | bool first_source_change_sent; | ||
| 132 | bool source_changed; | ||
| 129 | }; | 133 | }; |
| 130 | 134 | ||
| 131 | static inline struct vicodec_ctx *file2ctx(struct file *file) | 135 | static inline struct vicodec_ctx *file2ctx(struct file *file) |
| @@ -182,6 +186,10 @@ static int device_process(struct vicodec_ctx *ctx, | |||
| 182 | return ret; | 186 | return ret; |
| 183 | vb2_set_plane_payload(&dst_vb->vb2_buf, 0, ret); | 187 | vb2_set_plane_payload(&dst_vb->vb2_buf, 0, ret); |
| 184 | } else { | 188 | } else { |
| 189 | unsigned int comp_frame_size = ntohl(ctx->state.header.size); | ||
| 190 | |||
| 191 | if (comp_frame_size > ctx->comp_max_size) | ||
| 192 | return -EINVAL; | ||
| 185 | state->info = q_dst->info; | 193 | state->info = q_dst->info; |
| 186 | ret = v4l2_fwht_decode(state, p_src, p_dst); | 194 | ret = v4l2_fwht_decode(state, p_src, p_dst); |
| 187 | if (ret < 0) | 195 | if (ret < 0) |
| @@ -190,18 +198,8 @@ static int device_process(struct vicodec_ctx *ctx, | |||
| 190 | } | 198 | } |
| 191 | 199 | ||
| 192 | dst_vb->sequence = q_dst->sequence++; | 200 | dst_vb->sequence = q_dst->sequence++; |
| 193 | dst_vb->vb2_buf.timestamp = src_vb->vb2_buf.timestamp; | ||
| 194 | |||
| 195 | if (src_vb->flags & V4L2_BUF_FLAG_TIMECODE) | ||
| 196 | dst_vb->timecode = src_vb->timecode; | ||
| 197 | dst_vb->field = src_vb->field; | ||
| 198 | dst_vb->flags &= ~V4L2_BUF_FLAG_LAST; | 201 | dst_vb->flags &= ~V4L2_BUF_FLAG_LAST; |
| 199 | dst_vb->flags |= src_vb->flags & | 202 | v4l2_m2m_buf_copy_metadata(src_vb, dst_vb, !ctx->is_enc); |
| 200 | (V4L2_BUF_FLAG_TIMECODE | | ||
| 201 | V4L2_BUF_FLAG_KEYFRAME | | ||
| 202 | V4L2_BUF_FLAG_PFRAME | | ||
| 203 | V4L2_BUF_FLAG_BFRAME | | ||
| 204 | V4L2_BUF_FLAG_TSTAMP_SRC_MASK); | ||
| 205 | 203 | ||
| 206 | return 0; | 204 | return 0; |
| 207 | } | 205 | } |
| @@ -209,6 +207,63 @@ static int device_process(struct vicodec_ctx *ctx, | |||
| 209 | /* | 207 | /* |
| 210 | * mem2mem callbacks | 208 | * mem2mem callbacks |
| 211 | */ | 209 | */ |
| 210 | static enum vb2_buffer_state get_next_header(struct vicodec_ctx *ctx, | ||
| 211 | u8 **pp, u32 sz) | ||
| 212 | { | ||
| 213 | static const u8 magic[] = { | ||
| 214 | 0x4f, 0x4f, 0x4f, 0x4f, 0xff, 0xff, 0xff, 0xff | ||
| 215 | }; | ||
| 216 | u8 *p = *pp; | ||
| 217 | u32 state; | ||
| 218 | u8 *header = (u8 *)&ctx->state.header; | ||
| 219 | |||
| 220 | state = VB2_BUF_STATE_DONE; | ||
| 221 | |||
| 222 | if (!ctx->header_size) { | ||
| 223 | state = VB2_BUF_STATE_ERROR; | ||
| 224 | for (; p < *pp + sz; p++) { | ||
| 225 | u32 copy; | ||
| 226 | |||
| 227 | p = memchr(p, magic[ctx->comp_magic_cnt], | ||
| 228 | *pp + sz - p); | ||
| 229 | if (!p) { | ||
| 230 | ctx->comp_magic_cnt = 0; | ||
| 231 | p = *pp + sz; | ||
| 232 | break; | ||
| 233 | } | ||
| 234 | copy = sizeof(magic) - ctx->comp_magic_cnt; | ||
| 235 | if (*pp + sz - p < copy) | ||
| 236 | copy = *pp + sz - p; | ||
| 237 | |||
| 238 | memcpy(header + ctx->comp_magic_cnt, p, copy); | ||
| 239 | ctx->comp_magic_cnt += copy; | ||
| 240 | if (!memcmp(header, magic, ctx->comp_magic_cnt)) { | ||
| 241 | p += copy; | ||
| 242 | state = VB2_BUF_STATE_DONE; | ||
| 243 | break; | ||
| 244 | } | ||
| 245 | ctx->comp_magic_cnt = 0; | ||
| 246 | } | ||
| 247 | if (ctx->comp_magic_cnt < sizeof(magic)) { | ||
| 248 | *pp = p; | ||
| 249 | return state; | ||
| 250 | } | ||
| 251 | ctx->header_size = sizeof(magic); | ||
| 252 | } | ||
| 253 | |||
| 254 | if (ctx->header_size < sizeof(struct fwht_cframe_hdr)) { | ||
| 255 | u32 copy = sizeof(struct fwht_cframe_hdr) - ctx->header_size; | ||
| 256 | |||
| 257 | if (*pp + sz - p < copy) | ||
| 258 | copy = *pp + sz - p; | ||
| 259 | |||
| 260 | memcpy(header + ctx->header_size, p, copy); | ||
| 261 | p += copy; | ||
| 262 | ctx->header_size += copy; | ||
| 263 | } | ||
| 264 | *pp = p; | ||
| 265 | return state; | ||
| 266 | } | ||
| 212 | 267 | ||
| 213 | /* device_run() - prepares and starts the device */ | 268 | /* device_run() - prepares and starts the device */ |
| 214 | static void device_run(void *priv) | 269 | static void device_run(void *priv) |
| @@ -249,6 +304,7 @@ static void device_run(void *priv) | |||
| 249 | } | 304 | } |
| 250 | v4l2_m2m_buf_done(dst_buf, state); | 305 | v4l2_m2m_buf_done(dst_buf, state); |
| 251 | ctx->comp_size = 0; | 306 | ctx->comp_size = 0; |
| 307 | ctx->header_size = 0; | ||
| 252 | ctx->comp_magic_cnt = 0; | 308 | ctx->comp_magic_cnt = 0; |
| 253 | ctx->comp_has_frame = false; | 309 | ctx->comp_has_frame = false; |
| 254 | spin_unlock(ctx->lock); | 310 | spin_unlock(ctx->lock); |
| @@ -273,6 +329,96 @@ static void job_remove_src_buf(struct vicodec_ctx *ctx, u32 state) | |||
| 273 | spin_unlock(ctx->lock); | 329 | spin_unlock(ctx->lock); |
| 274 | } | 330 | } |
| 275 | 331 | ||
| 332 | static const struct v4l2_fwht_pixfmt_info * | ||
| 333 | info_from_header(const struct fwht_cframe_hdr *p_hdr) | ||
| 334 | { | ||
| 335 | unsigned int flags = ntohl(p_hdr->flags); | ||
| 336 | unsigned int width_div = (flags & FWHT_FL_CHROMA_FULL_WIDTH) ? 1 : 2; | ||
| 337 | unsigned int height_div = (flags & FWHT_FL_CHROMA_FULL_HEIGHT) ? 1 : 2; | ||
| 338 | unsigned int components_num = 3; | ||
| 339 | unsigned int pixenc = 0; | ||
| 340 | unsigned int version = ntohl(p_hdr->version); | ||
| 341 | |||
| 342 | if (version >= 2) { | ||
| 343 | components_num = 1 + ((flags & FWHT_FL_COMPONENTS_NUM_MSK) >> | ||
| 344 | FWHT_FL_COMPONENTS_NUM_OFFSET); | ||
| 345 | pixenc = (flags & FWHT_FL_PIXENC_MSK); | ||
| 346 | } | ||
| 347 | return v4l2_fwht_default_fmt(width_div, height_div, | ||
| 348 | components_num, pixenc, 0); | ||
| 349 | } | ||
| 350 | |||
| 351 | static bool is_header_valid(const struct fwht_cframe_hdr *p_hdr) | ||
| 352 | { | ||
| 353 | const struct v4l2_fwht_pixfmt_info *info; | ||
| 354 | unsigned int w = ntohl(p_hdr->width); | ||
| 355 | unsigned int h = ntohl(p_hdr->height); | ||
| 356 | unsigned int version = ntohl(p_hdr->version); | ||
| 357 | unsigned int flags = ntohl(p_hdr->flags); | ||
| 358 | |||
| 359 | if (!version || version > FWHT_VERSION) | ||
| 360 | return false; | ||
| 361 | |||
| 362 | if (w < MIN_WIDTH || w > MAX_WIDTH || h < MIN_HEIGHT || h > MAX_HEIGHT) | ||
| 363 | return false; | ||
| 364 | |||
| 365 | if (version >= 2) { | ||
| 366 | unsigned int components_num = 1 + | ||
| 367 | ((flags & FWHT_FL_COMPONENTS_NUM_MSK) >> | ||
| 368 | FWHT_FL_COMPONENTS_NUM_OFFSET); | ||
| 369 | unsigned int pixenc = flags & FWHT_FL_PIXENC_MSK; | ||
| 370 | |||
| 371 | if (components_num == 0 || components_num > 4 || !pixenc) | ||
| 372 | return false; | ||
| 373 | } | ||
| 374 | |||
| 375 | info = info_from_header(p_hdr); | ||
| 376 | if (!info) | ||
| 377 | return false; | ||
| 378 | return true; | ||
| 379 | } | ||
| 380 | |||
| 381 | static void update_capture_data_from_header(struct vicodec_ctx *ctx) | ||
| 382 | { | ||
| 383 | struct vicodec_q_data *q_dst = get_q_data(ctx, | ||
| 384 | V4L2_BUF_TYPE_VIDEO_CAPTURE); | ||
| 385 | const struct fwht_cframe_hdr *p_hdr = &ctx->state.header; | ||
| 386 | const struct v4l2_fwht_pixfmt_info *info = info_from_header(p_hdr); | ||
| 387 | unsigned int flags = ntohl(p_hdr->flags); | ||
| 388 | unsigned int hdr_width_div = (flags & FWHT_FL_CHROMA_FULL_WIDTH) ? 1 : 2; | ||
| 389 | unsigned int hdr_height_div = (flags & FWHT_FL_CHROMA_FULL_HEIGHT) ? 1 : 2; | ||
| 390 | |||
| 391 | q_dst->info = info; | ||
| 392 | q_dst->visible_width = ntohl(p_hdr->width); | ||
| 393 | q_dst->visible_height = ntohl(p_hdr->height); | ||
| 394 | q_dst->coded_width = vic_round_dim(q_dst->visible_width, hdr_width_div); | ||
| 395 | q_dst->coded_height = vic_round_dim(q_dst->visible_height, | ||
| 396 | hdr_height_div); | ||
| 397 | |||
| 398 | q_dst->sizeimage = q_dst->coded_width * q_dst->coded_height * | ||
| 399 | q_dst->info->sizeimage_mult / q_dst->info->sizeimage_div; | ||
| 400 | ctx->state.colorspace = ntohl(p_hdr->colorspace); | ||
| 401 | |||
| 402 | ctx->state.xfer_func = ntohl(p_hdr->xfer_func); | ||
| 403 | ctx->state.ycbcr_enc = ntohl(p_hdr->ycbcr_enc); | ||
| 404 | ctx->state.quantization = ntohl(p_hdr->quantization); | ||
| 405 | } | ||
| 406 | |||
| 407 | static void set_last_buffer(struct vb2_v4l2_buffer *dst_buf, | ||
| 408 | const struct vb2_v4l2_buffer *src_buf, | ||
| 409 | struct vicodec_ctx *ctx) | ||
| 410 | { | ||
| 411 | struct vicodec_q_data *q_dst = get_q_data(ctx, | ||
| 412 | V4L2_BUF_TYPE_VIDEO_CAPTURE); | ||
| 413 | |||
| 414 | vb2_set_plane_payload(&dst_buf->vb2_buf, 0, 0); | ||
| 415 | dst_buf->sequence = q_dst->sequence++; | ||
| 416 | |||
| 417 | v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, !ctx->is_enc); | ||
| 418 | dst_buf->flags |= V4L2_BUF_FLAG_LAST; | ||
| 419 | v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); | ||
| 420 | } | ||
| 421 | |||
| 276 | static int job_ready(void *priv) | 422 | static int job_ready(void *priv) |
| 277 | { | 423 | { |
| 278 | static const u8 magic[] = { | 424 | static const u8 magic[] = { |
| @@ -284,7 +430,16 @@ static int job_ready(void *priv) | |||
| 284 | u8 *p; | 430 | u8 *p; |
| 285 | u32 sz; | 431 | u32 sz; |
| 286 | u32 state; | 432 | u32 state; |
| 287 | 433 | struct vicodec_q_data *q_dst = get_q_data(ctx, | |
| 434 | V4L2_BUF_TYPE_VIDEO_CAPTURE); | ||
| 435 | unsigned int flags; | ||
| 436 | unsigned int hdr_width_div; | ||
| 437 | unsigned int hdr_height_div; | ||
| 438 | unsigned int max_to_copy; | ||
| 439 | unsigned int comp_frame_size; | ||
| 440 | |||
| 441 | if (ctx->source_changed) | ||
| 442 | return 0; | ||
| 288 | if (ctx->is_enc || ctx->comp_has_frame) | 443 | if (ctx->is_enc || ctx->comp_has_frame) |
| 289 | return 1; | 444 | return 1; |
| 290 | 445 | ||
| @@ -299,59 +454,27 @@ restart: | |||
| 299 | 454 | ||
| 300 | state = VB2_BUF_STATE_DONE; | 455 | state = VB2_BUF_STATE_DONE; |
| 301 | 456 | ||
| 302 | if (!ctx->comp_size) { | 457 | if (ctx->header_size < sizeof(struct fwht_cframe_hdr)) { |
| 303 | state = VB2_BUF_STATE_ERROR; | 458 | state = get_next_header(ctx, &p, p_src + sz - p); |
| 304 | for (; p < p_src + sz; p++) { | 459 | if (ctx->header_size < sizeof(struct fwht_cframe_hdr)) { |
| 305 | u32 copy; | ||
| 306 | |||
| 307 | p = memchr(p, magic[ctx->comp_magic_cnt], | ||
| 308 | p_src + sz - p); | ||
| 309 | if (!p) { | ||
| 310 | ctx->comp_magic_cnt = 0; | ||
| 311 | break; | ||
| 312 | } | ||
| 313 | copy = sizeof(magic) - ctx->comp_magic_cnt; | ||
| 314 | if (p_src + sz - p < copy) | ||
| 315 | copy = p_src + sz - p; | ||
| 316 | |||
| 317 | memcpy(ctx->state.compressed_frame + ctx->comp_magic_cnt, | ||
| 318 | p, copy); | ||
| 319 | ctx->comp_magic_cnt += copy; | ||
| 320 | if (!memcmp(ctx->state.compressed_frame, magic, | ||
| 321 | ctx->comp_magic_cnt)) { | ||
| 322 | p += copy; | ||
| 323 | state = VB2_BUF_STATE_DONE; | ||
| 324 | break; | ||
| 325 | } | ||
| 326 | ctx->comp_magic_cnt = 0; | ||
| 327 | } | ||
| 328 | if (ctx->comp_magic_cnt < sizeof(magic)) { | ||
| 329 | job_remove_src_buf(ctx, state); | 460 | job_remove_src_buf(ctx, state); |
| 330 | goto restart; | 461 | goto restart; |
| 331 | } | 462 | } |
| 332 | ctx->comp_size = sizeof(magic); | ||
| 333 | } | 463 | } |
| 334 | if (ctx->comp_size < sizeof(struct fwht_cframe_hdr)) { | ||
| 335 | struct fwht_cframe_hdr *p_hdr = | ||
| 336 | (struct fwht_cframe_hdr *)ctx->state.compressed_frame; | ||
| 337 | u32 copy = sizeof(struct fwht_cframe_hdr) - ctx->comp_size; | ||
| 338 | 464 | ||
| 339 | if (copy > p_src + sz - p) | 465 | comp_frame_size = ntohl(ctx->state.header.size); |
| 340 | copy = p_src + sz - p; | 466 | |
| 341 | memcpy(ctx->state.compressed_frame + ctx->comp_size, | 467 | /* |
| 342 | p, copy); | 468 | * The current scanned frame might be the first frame of a new |
| 343 | p += copy; | 469 | * resolution so its size might be larger than ctx->comp_max_size. |
| 344 | ctx->comp_size += copy; | 470 | * In that case it is copied up to the current buffer capacity and |
| 345 | if (ctx->comp_size < sizeof(struct fwht_cframe_hdr)) { | 471 | * the copy will continue after allocating new large enough buffer |
| 346 | job_remove_src_buf(ctx, state); | 472 | * when restreaming |
| 347 | goto restart; | 473 | */ |
| 348 | } | 474 | max_to_copy = min(comp_frame_size, ctx->comp_max_size); |
| 349 | ctx->comp_frame_size = ntohl(p_hdr->size) + sizeof(*p_hdr); | 475 | |
| 350 | if (ctx->comp_frame_size > ctx->comp_max_size) | 476 | if (ctx->comp_size < max_to_copy) { |
| 351 | ctx->comp_frame_size = ctx->comp_max_size; | 477 | u32 copy = max_to_copy - ctx->comp_size; |
| 352 | } | ||
| 353 | if (ctx->comp_size < ctx->comp_frame_size) { | ||
| 354 | u32 copy = ctx->comp_frame_size - ctx->comp_size; | ||
| 355 | 478 | ||
| 356 | if (copy > p_src + sz - p) | 479 | if (copy > p_src + sz - p) |
| 357 | copy = p_src + sz - p; | 480 | copy = p_src + sz - p; |
| @@ -360,15 +483,17 @@ restart: | |||
| 360 | p, copy); | 483 | p, copy); |
| 361 | p += copy; | 484 | p += copy; |
| 362 | ctx->comp_size += copy; | 485 | ctx->comp_size += copy; |
| 363 | if (ctx->comp_size < ctx->comp_frame_size) { | 486 | if (ctx->comp_size < max_to_copy) { |
| 364 | job_remove_src_buf(ctx, state); | 487 | job_remove_src_buf(ctx, state); |
| 365 | goto restart; | 488 | goto restart; |
| 366 | } | 489 | } |
| 367 | } | 490 | } |
| 368 | ctx->cur_buf_offset = p - p_src; | 491 | ctx->cur_buf_offset = p - p_src; |
| 369 | ctx->comp_has_frame = true; | 492 | if (ctx->comp_size == comp_frame_size) |
| 493 | ctx->comp_has_frame = true; | ||
| 370 | ctx->comp_has_next_frame = false; | 494 | ctx->comp_has_next_frame = false; |
| 371 | if (sz - ctx->cur_buf_offset >= sizeof(struct fwht_cframe_hdr)) { | 495 | if (ctx->comp_has_frame && sz - ctx->cur_buf_offset >= |
| 496 | sizeof(struct fwht_cframe_hdr)) { | ||
| 372 | struct fwht_cframe_hdr *p_hdr = (struct fwht_cframe_hdr *)p; | 497 | struct fwht_cframe_hdr *p_hdr = (struct fwht_cframe_hdr *)p; |
| 373 | u32 frame_size = ntohl(p_hdr->size); | 498 | u32 frame_size = ntohl(p_hdr->size); |
| 374 | u32 remaining = sz - ctx->cur_buf_offset - sizeof(*p_hdr); | 499 | u32 remaining = sz - ctx->cur_buf_offset - sizeof(*p_hdr); |
| @@ -376,6 +501,36 @@ restart: | |||
| 376 | if (!memcmp(p, magic, sizeof(magic))) | 501 | if (!memcmp(p, magic, sizeof(magic))) |
| 377 | ctx->comp_has_next_frame = remaining >= frame_size; | 502 | ctx->comp_has_next_frame = remaining >= frame_size; |
| 378 | } | 503 | } |
| 504 | /* | ||
| 505 | * if the header is invalid the device_run will just drop the frame | ||
| 506 | * with an error | ||
| 507 | */ | ||
| 508 | if (!is_header_valid(&ctx->state.header) && ctx->comp_has_frame) | ||
| 509 | return 1; | ||
| 510 | flags = ntohl(ctx->state.header.flags); | ||
| 511 | hdr_width_div = (flags & FWHT_FL_CHROMA_FULL_WIDTH) ? 1 : 2; | ||
| 512 | hdr_height_div = (flags & FWHT_FL_CHROMA_FULL_HEIGHT) ? 1 : 2; | ||
| 513 | |||
| 514 | if (ntohl(ctx->state.header.width) != q_dst->visible_width || | ||
| 515 | ntohl(ctx->state.header.height) != q_dst->visible_height || | ||
| 516 | !q_dst->info || | ||
| 517 | hdr_width_div != q_dst->info->width_div || | ||
| 518 | hdr_height_div != q_dst->info->height_div) { | ||
| 519 | static const struct v4l2_event rs_event = { | ||
| 520 | .type = V4L2_EVENT_SOURCE_CHANGE, | ||
| 521 | .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION, | ||
| 522 | }; | ||
| 523 | |||
| 524 | struct vb2_v4l2_buffer *dst_buf = | ||
| 525 | v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); | ||
| 526 | |||
| 527 | update_capture_data_from_header(ctx); | ||
| 528 | ctx->first_source_change_sent = true; | ||
| 529 | v4l2_event_queue_fh(&ctx->fh, &rs_event); | ||
| 530 | set_last_buffer(dst_buf, src_buf, ctx); | ||
| 531 | ctx->source_changed = true; | ||
| 532 | return 0; | ||
| 533 | } | ||
| 379 | return 1; | 534 | return 1; |
| 380 | } | 535 | } |
| 381 | 536 | ||
| @@ -403,9 +558,10 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 403 | return 0; | 558 | return 0; |
| 404 | } | 559 | } |
| 405 | 560 | ||
| 406 | static int enum_fmt(struct v4l2_fmtdesc *f, bool is_enc, bool is_out) | 561 | static int enum_fmt(struct v4l2_fmtdesc *f, struct vicodec_ctx *ctx, |
| 562 | bool is_out) | ||
| 407 | { | 563 | { |
| 408 | bool is_uncomp = (is_enc && is_out) || (!is_enc && !is_out); | 564 | bool is_uncomp = (ctx->is_enc && is_out) || (!ctx->is_enc && !is_out); |
| 409 | 565 | ||
| 410 | if (V4L2_TYPE_IS_MULTIPLANAR(f->type) && !multiplanar) | 566 | if (V4L2_TYPE_IS_MULTIPLANAR(f->type) && !multiplanar) |
| 411 | return -EINVAL; | 567 | return -EINVAL; |
| @@ -414,8 +570,16 @@ static int enum_fmt(struct v4l2_fmtdesc *f, bool is_enc, bool is_out) | |||
| 414 | 570 | ||
| 415 | if (is_uncomp) { | 571 | if (is_uncomp) { |
| 416 | const struct v4l2_fwht_pixfmt_info *info = | 572 | const struct v4l2_fwht_pixfmt_info *info = |
| 417 | v4l2_fwht_get_pixfmt(f->index); | 573 | get_q_data(ctx, f->type)->info; |
| 418 | 574 | ||
| 575 | if (!info || ctx->is_enc) | ||
| 576 | info = v4l2_fwht_get_pixfmt(f->index); | ||
| 577 | else | ||
| 578 | info = v4l2_fwht_default_fmt(info->width_div, | ||
| 579 | info->height_div, | ||
| 580 | info->components_num, | ||
| 581 | info->pixenc, | ||
| 582 | f->index); | ||
| 419 | if (!info) | 583 | if (!info) |
| 420 | return -EINVAL; | 584 | return -EINVAL; |
| 421 | f->pixelformat = info->id; | 585 | f->pixelformat = info->id; |
| @@ -432,7 +596,7 @@ static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, | |||
| 432 | { | 596 | { |
| 433 | struct vicodec_ctx *ctx = file2ctx(file); | 597 | struct vicodec_ctx *ctx = file2ctx(file); |
| 434 | 598 | ||
| 435 | return enum_fmt(f, ctx->is_enc, false); | 599 | return enum_fmt(f, ctx, false); |
| 436 | } | 600 | } |
| 437 | 601 | ||
| 438 | static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, | 602 | static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, |
| @@ -440,7 +604,7 @@ static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, | |||
| 440 | { | 604 | { |
| 441 | struct vicodec_ctx *ctx = file2ctx(file); | 605 | struct vicodec_ctx *ctx = file2ctx(file); |
| 442 | 606 | ||
| 443 | return enum_fmt(f, ctx->is_enc, true); | 607 | return enum_fmt(f, ctx, true); |
| 444 | } | 608 | } |
| 445 | 609 | ||
| 446 | static int vidioc_g_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | 610 | static int vidioc_g_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) |
| @@ -458,17 +622,21 @@ static int vidioc_g_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 458 | q_data = get_q_data(ctx, f->type); | 622 | q_data = get_q_data(ctx, f->type); |
| 459 | info = q_data->info; | 623 | info = q_data->info; |
| 460 | 624 | ||
| 625 | if (!info) | ||
| 626 | info = v4l2_fwht_get_pixfmt(0); | ||
| 627 | |||
| 461 | switch (f->type) { | 628 | switch (f->type) { |
| 462 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | 629 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: |
| 463 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: | 630 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: |
| 464 | if (multiplanar) | 631 | if (multiplanar) |
| 465 | return -EINVAL; | 632 | return -EINVAL; |
| 466 | pix = &f->fmt.pix; | 633 | pix = &f->fmt.pix; |
| 467 | pix->width = q_data->width; | 634 | pix->width = q_data->coded_width; |
| 468 | pix->height = q_data->height; | 635 | pix->height = q_data->coded_height; |
| 469 | pix->field = V4L2_FIELD_NONE; | 636 | pix->field = V4L2_FIELD_NONE; |
| 470 | pix->pixelformat = info->id; | 637 | pix->pixelformat = info->id; |
| 471 | pix->bytesperline = q_data->width * info->bytesperline_mult; | 638 | pix->bytesperline = q_data->coded_width * |
| 639 | info->bytesperline_mult; | ||
| 472 | pix->sizeimage = q_data->sizeimage; | 640 | pix->sizeimage = q_data->sizeimage; |
| 473 | pix->colorspace = ctx->state.colorspace; | 641 | pix->colorspace = ctx->state.colorspace; |
| 474 | pix->xfer_func = ctx->state.xfer_func; | 642 | pix->xfer_func = ctx->state.xfer_func; |
| @@ -481,13 +649,13 @@ static int vidioc_g_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 481 | if (!multiplanar) | 649 | if (!multiplanar) |
| 482 | return -EINVAL; | 650 | return -EINVAL; |
| 483 | pix_mp = &f->fmt.pix_mp; | 651 | pix_mp = &f->fmt.pix_mp; |
| 484 | pix_mp->width = q_data->width; | 652 | pix_mp->width = q_data->coded_width; |
| 485 | pix_mp->height = q_data->height; | 653 | pix_mp->height = q_data->coded_height; |
| 486 | pix_mp->field = V4L2_FIELD_NONE; | 654 | pix_mp->field = V4L2_FIELD_NONE; |
| 487 | pix_mp->pixelformat = info->id; | 655 | pix_mp->pixelformat = info->id; |
| 488 | pix_mp->num_planes = 1; | 656 | pix_mp->num_planes = 1; |
| 489 | pix_mp->plane_fmt[0].bytesperline = | 657 | pix_mp->plane_fmt[0].bytesperline = |
| 490 | q_data->width * info->bytesperline_mult; | 658 | q_data->coded_width * info->bytesperline_mult; |
| 491 | pix_mp->plane_fmt[0].sizeimage = q_data->sizeimage; | 659 | pix_mp->plane_fmt[0].sizeimage = q_data->sizeimage; |
| 492 | pix_mp->colorspace = ctx->state.colorspace; | 660 | pix_mp->colorspace = ctx->state.colorspace; |
| 493 | pix_mp->xfer_func = ctx->state.xfer_func; | 661 | pix_mp->xfer_func = ctx->state.xfer_func; |
| @@ -528,8 +696,13 @@ static int vidioc_try_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 528 | pix = &f->fmt.pix; | 696 | pix = &f->fmt.pix; |
| 529 | if (pix->pixelformat != V4L2_PIX_FMT_FWHT) | 697 | if (pix->pixelformat != V4L2_PIX_FMT_FWHT) |
| 530 | info = find_fmt(pix->pixelformat); | 698 | info = find_fmt(pix->pixelformat); |
| 531 | pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH) & ~7; | 699 | |
| 532 | pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT) & ~7; | 700 | pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH); |
| 701 | pix->width = vic_round_dim(pix->width, info->width_div); | ||
| 702 | |||
| 703 | pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT); | ||
| 704 | pix->height = vic_round_dim(pix->height, info->height_div); | ||
| 705 | |||
| 533 | pix->field = V4L2_FIELD_NONE; | 706 | pix->field = V4L2_FIELD_NONE; |
| 534 | pix->bytesperline = | 707 | pix->bytesperline = |
| 535 | pix->width * info->bytesperline_mult; | 708 | pix->width * info->bytesperline_mult; |
| @@ -545,9 +718,14 @@ static int vidioc_try_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 545 | if (pix_mp->pixelformat != V4L2_PIX_FMT_FWHT) | 718 | if (pix_mp->pixelformat != V4L2_PIX_FMT_FWHT) |
| 546 | info = find_fmt(pix_mp->pixelformat); | 719 | info = find_fmt(pix_mp->pixelformat); |
| 547 | pix_mp->num_planes = 1; | 720 | pix_mp->num_planes = 1; |
| 548 | pix_mp->width = clamp(pix_mp->width, MIN_WIDTH, MAX_WIDTH) & ~7; | 721 | |
| 549 | pix_mp->height = | 722 | pix_mp->width = clamp(pix_mp->width, MIN_WIDTH, MAX_WIDTH); |
| 550 | clamp(pix_mp->height, MIN_HEIGHT, MAX_HEIGHT) & ~7; | 723 | pix_mp->width = vic_round_dim(pix_mp->width, info->width_div); |
| 724 | |||
| 725 | pix_mp->height = clamp(pix_mp->height, MIN_HEIGHT, MAX_HEIGHT); | ||
| 726 | pix_mp->height = vic_round_dim(pix_mp->height, | ||
| 727 | info->height_div); | ||
| 728 | |||
| 551 | pix_mp->field = V4L2_FIELD_NONE; | 729 | pix_mp->field = V4L2_FIELD_NONE; |
| 552 | plane->bytesperline = | 730 | plane->bytesperline = |
| 553 | pix_mp->width * info->bytesperline_mult; | 731 | pix_mp->width * info->bytesperline_mult; |
| @@ -657,9 +835,10 @@ static int vidioc_s_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 657 | pix = &f->fmt.pix; | 835 | pix = &f->fmt.pix; |
| 658 | if (ctx->is_enc && V4L2_TYPE_IS_OUTPUT(f->type)) | 836 | if (ctx->is_enc && V4L2_TYPE_IS_OUTPUT(f->type)) |
| 659 | fmt_changed = | 837 | fmt_changed = |
| 838 | !q_data->info || | ||
| 660 | q_data->info->id != pix->pixelformat || | 839 | q_data->info->id != pix->pixelformat || |
| 661 | q_data->width != pix->width || | 840 | q_data->coded_width != pix->width || |
| 662 | q_data->height != pix->height; | 841 | q_data->coded_height != pix->height; |
| 663 | 842 | ||
| 664 | if (vb2_is_busy(vq) && fmt_changed) | 843 | if (vb2_is_busy(vq) && fmt_changed) |
| 665 | return -EBUSY; | 844 | return -EBUSY; |
| @@ -668,8 +847,8 @@ static int vidioc_s_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 668 | q_data->info = &pixfmt_fwht; | 847 | q_data->info = &pixfmt_fwht; |
| 669 | else | 848 | else |
| 670 | q_data->info = find_fmt(pix->pixelformat); | 849 | q_data->info = find_fmt(pix->pixelformat); |
| 671 | q_data->width = pix->width; | 850 | q_data->coded_width = pix->width; |
| 672 | q_data->height = pix->height; | 851 | q_data->coded_height = pix->height; |
| 673 | q_data->sizeimage = pix->sizeimage; | 852 | q_data->sizeimage = pix->sizeimage; |
| 674 | break; | 853 | break; |
| 675 | case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: | 854 | case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: |
| @@ -677,9 +856,10 @@ static int vidioc_s_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 677 | pix_mp = &f->fmt.pix_mp; | 856 | pix_mp = &f->fmt.pix_mp; |
| 678 | if (ctx->is_enc && V4L2_TYPE_IS_OUTPUT(f->type)) | 857 | if (ctx->is_enc && V4L2_TYPE_IS_OUTPUT(f->type)) |
| 679 | fmt_changed = | 858 | fmt_changed = |
| 859 | !q_data->info || | ||
| 680 | q_data->info->id != pix_mp->pixelformat || | 860 | q_data->info->id != pix_mp->pixelformat || |
| 681 | q_data->width != pix_mp->width || | 861 | q_data->coded_width != pix_mp->width || |
| 682 | q_data->height != pix_mp->height; | 862 | q_data->coded_height != pix_mp->height; |
| 683 | 863 | ||
| 684 | if (vb2_is_busy(vq) && fmt_changed) | 864 | if (vb2_is_busy(vq) && fmt_changed) |
| 685 | return -EBUSY; | 865 | return -EBUSY; |
| @@ -688,17 +868,24 @@ static int vidioc_s_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) | |||
| 688 | q_data->info = &pixfmt_fwht; | 868 | q_data->info = &pixfmt_fwht; |
| 689 | else | 869 | else |
| 690 | q_data->info = find_fmt(pix_mp->pixelformat); | 870 | q_data->info = find_fmt(pix_mp->pixelformat); |
| 691 | q_data->width = pix_mp->width; | 871 | q_data->coded_width = pix_mp->width; |
| 692 | q_data->height = pix_mp->height; | 872 | q_data->coded_height = pix_mp->height; |
| 693 | q_data->sizeimage = pix_mp->plane_fmt[0].sizeimage; | 873 | q_data->sizeimage = pix_mp->plane_fmt[0].sizeimage; |
| 694 | break; | 874 | break; |
| 695 | default: | 875 | default: |
| 696 | return -EINVAL; | 876 | return -EINVAL; |
| 697 | } | 877 | } |
| 878 | if (q_data->visible_width > q_data->coded_width) | ||
| 879 | q_data->visible_width = q_data->coded_width; | ||
| 880 | if (q_data->visible_height > q_data->coded_height) | ||
| 881 | q_data->visible_height = q_data->coded_height; | ||
| 882 | |||
| 698 | 883 | ||
| 699 | dprintk(ctx->dev, | 884 | dprintk(ctx->dev, |
| 700 | "Setting format for type %d, wxh: %dx%d, fourcc: %08x\n", | 885 | "Setting format for type %d, coded wxh: %dx%d, visible wxh: %dx%d, fourcc: %08x\n", |
| 701 | f->type, q_data->width, q_data->height, q_data->info->id); | 886 | f->type, q_data->coded_width, q_data->coded_height, |
| 887 | q_data->visible_width, q_data->visible_height, | ||
| 888 | q_data->info->id); | ||
| 702 | 889 | ||
| 703 | return 0; | 890 | return 0; |
| 704 | } | 891 | } |
| @@ -753,6 +940,84 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *priv, | |||
| 753 | return ret; | 940 | return ret; |
| 754 | } | 941 | } |
| 755 | 942 | ||
| 943 | static int vidioc_g_selection(struct file *file, void *priv, | ||
| 944 | struct v4l2_selection *s) | ||
| 945 | { | ||
| 946 | struct vicodec_ctx *ctx = file2ctx(file); | ||
| 947 | struct vicodec_q_data *q_data; | ||
| 948 | enum v4l2_buf_type valid_cap_type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 949 | enum v4l2_buf_type valid_out_type = V4L2_BUF_TYPE_VIDEO_OUTPUT; | ||
| 950 | |||
| 951 | if (multiplanar) { | ||
| 952 | valid_cap_type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; | ||
| 953 | valid_out_type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; | ||
| 954 | } | ||
| 955 | |||
| 956 | if (s->type != valid_cap_type && s->type != valid_out_type) | ||
| 957 | return -EINVAL; | ||
| 958 | |||
| 959 | q_data = get_q_data(ctx, s->type); | ||
| 960 | if (!q_data) | ||
| 961 | return -EINVAL; | ||
| 962 | /* | ||
| 963 | * encoder supports only cropping on the OUTPUT buffer | ||
| 964 | * decoder supports only composing on the CAPTURE buffer | ||
| 965 | */ | ||
| 966 | if ((ctx->is_enc && s->type == valid_out_type) || | ||
| 967 | (!ctx->is_enc && s->type == valid_cap_type)) { | ||
| 968 | switch (s->target) { | ||
| 969 | case V4L2_SEL_TGT_COMPOSE: | ||
| 970 | case V4L2_SEL_TGT_CROP: | ||
| 971 | s->r.left = 0; | ||
| 972 | s->r.top = 0; | ||
| 973 | s->r.width = q_data->visible_width; | ||
| 974 | s->r.height = q_data->visible_height; | ||
| 975 | return 0; | ||
| 976 | case V4L2_SEL_TGT_COMPOSE_DEFAULT: | ||
| 977 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: | ||
| 978 | case V4L2_SEL_TGT_CROP_DEFAULT: | ||
| 979 | case V4L2_SEL_TGT_CROP_BOUNDS: | ||
| 980 | s->r.left = 0; | ||
| 981 | s->r.top = 0; | ||
| 982 | s->r.width = q_data->coded_width; | ||
| 983 | s->r.height = q_data->coded_height; | ||
| 984 | return 0; | ||
| 985 | } | ||
| 986 | } | ||
| 987 | return -EINVAL; | ||
| 988 | } | ||
| 989 | |||
| 990 | static int vidioc_s_selection(struct file *file, void *priv, | ||
| 991 | struct v4l2_selection *s) | ||
| 992 | { | ||
| 993 | struct vicodec_ctx *ctx = file2ctx(file); | ||
| 994 | struct vicodec_q_data *q_data; | ||
| 995 | enum v4l2_buf_type out_type = V4L2_BUF_TYPE_VIDEO_OUTPUT; | ||
| 996 | |||
| 997 | if (multiplanar) | ||
| 998 | out_type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; | ||
| 999 | |||
| 1000 | if (s->type != out_type) | ||
| 1001 | return -EINVAL; | ||
| 1002 | |||
| 1003 | q_data = get_q_data(ctx, s->type); | ||
| 1004 | if (!q_data) | ||
| 1005 | return -EINVAL; | ||
| 1006 | |||
| 1007 | if (!ctx->is_enc || s->target != V4L2_SEL_TGT_CROP) | ||
| 1008 | return -EINVAL; | ||
| 1009 | |||
| 1010 | s->r.left = 0; | ||
| 1011 | s->r.top = 0; | ||
| 1012 | q_data->visible_width = clamp(s->r.width, MIN_WIDTH, | ||
| 1013 | q_data->coded_width); | ||
| 1014 | s->r.width = q_data->visible_width; | ||
| 1015 | q_data->visible_height = clamp(s->r.height, MIN_HEIGHT, | ||
| 1016 | q_data->coded_height); | ||
| 1017 | s->r.height = q_data->visible_height; | ||
| 1018 | return 0; | ||
| 1019 | } | ||
| 1020 | |||
| 756 | static void vicodec_mark_last_buf(struct vicodec_ctx *ctx) | 1021 | static void vicodec_mark_last_buf(struct vicodec_ctx *ctx) |
| 757 | { | 1022 | { |
| 758 | static const struct v4l2_event eos_event = { | 1023 | static const struct v4l2_event eos_event = { |
| @@ -853,7 +1118,13 @@ static int vicodec_enum_framesizes(struct file *file, void *fh, | |||
| 853 | static int vicodec_subscribe_event(struct v4l2_fh *fh, | 1118 | static int vicodec_subscribe_event(struct v4l2_fh *fh, |
| 854 | const struct v4l2_event_subscription *sub) | 1119 | const struct v4l2_event_subscription *sub) |
| 855 | { | 1120 | { |
| 1121 | struct vicodec_ctx *ctx = container_of(fh, struct vicodec_ctx, fh); | ||
| 1122 | |||
| 856 | switch (sub->type) { | 1123 | switch (sub->type) { |
| 1124 | case V4L2_EVENT_SOURCE_CHANGE: | ||
| 1125 | if (ctx->is_enc) | ||
| 1126 | return -EINVAL; | ||
| 1127 | /* fall through */ | ||
| 857 | case V4L2_EVENT_EOS: | 1128 | case V4L2_EVENT_EOS: |
| 858 | return v4l2_event_subscribe(fh, sub, 0, NULL); | 1129 | return v4l2_event_subscribe(fh, sub, 0, NULL); |
| 859 | default: | 1130 | default: |
| @@ -895,6 +1166,9 @@ static const struct v4l2_ioctl_ops vicodec_ioctl_ops = { | |||
| 895 | .vidioc_streamon = v4l2_m2m_ioctl_streamon, | 1166 | .vidioc_streamon = v4l2_m2m_ioctl_streamon, |
| 896 | .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, | 1167 | .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, |
| 897 | 1168 | ||
| 1169 | .vidioc_g_selection = vidioc_g_selection, | ||
| 1170 | .vidioc_s_selection = vidioc_s_selection, | ||
| 1171 | |||
| 898 | .vidioc_try_encoder_cmd = vicodec_try_encoder_cmd, | 1172 | .vidioc_try_encoder_cmd = vicodec_try_encoder_cmd, |
| 899 | .vidioc_encoder_cmd = vicodec_encoder_cmd, | 1173 | .vidioc_encoder_cmd = vicodec_encoder_cmd, |
| 900 | .vidioc_try_decoder_cmd = vicodec_try_decoder_cmd, | 1174 | .vidioc_try_decoder_cmd = vicodec_try_decoder_cmd, |
| @@ -960,7 +1234,71 @@ static void vicodec_buf_queue(struct vb2_buffer *vb) | |||
| 960 | { | 1234 | { |
| 961 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | 1235 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 962 | struct vicodec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); | 1236 | struct vicodec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); |
| 1237 | unsigned int sz = vb2_get_plane_payload(&vbuf->vb2_buf, 0); | ||
| 1238 | u8 *p_src = vb2_plane_vaddr(&vbuf->vb2_buf, 0); | ||
| 1239 | u8 *p = p_src; | ||
| 1240 | struct vb2_queue *vq_out = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, | ||
| 1241 | V4L2_BUF_TYPE_VIDEO_OUTPUT); | ||
| 1242 | struct vb2_queue *vq_cap = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, | ||
| 1243 | V4L2_BUF_TYPE_VIDEO_CAPTURE); | ||
| 1244 | bool header_valid = false; | ||
| 1245 | static const struct v4l2_event rs_event = { | ||
| 1246 | .type = V4L2_EVENT_SOURCE_CHANGE, | ||
| 1247 | .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION, | ||
| 1248 | }; | ||
| 963 | 1249 | ||
| 1250 | /* buf_queue handles only the first source change event */ | ||
| 1251 | if (ctx->first_source_change_sent) { | ||
| 1252 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); | ||
| 1253 | return; | ||
| 1254 | } | ||
| 1255 | |||
| 1256 | /* | ||
| 1257 | * if both queues are streaming, the source change event is | ||
| 1258 | * handled in job_ready | ||
| 1259 | */ | ||
| 1260 | if (vb2_is_streaming(vq_cap) && vb2_is_streaming(vq_out)) { | ||
| 1261 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); | ||
| 1262 | return; | ||
| 1263 | } | ||
| 1264 | |||
| 1265 | /* | ||
| 1266 | * source change event is relevant only for the decoder | ||
| 1267 | * in the compressed stream | ||
| 1268 | */ | ||
| 1269 | if (ctx->is_enc || !V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) { | ||
| 1270 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); | ||
| 1271 | return; | ||
| 1272 | } | ||
| 1273 | |||
| 1274 | do { | ||
| 1275 | enum vb2_buffer_state state = | ||
| 1276 | get_next_header(ctx, &p, p_src + sz - p); | ||
| 1277 | |||
| 1278 | if (ctx->header_size < sizeof(struct fwht_cframe_hdr)) { | ||
| 1279 | v4l2_m2m_buf_done(vbuf, state); | ||
| 1280 | return; | ||
| 1281 | } | ||
| 1282 | header_valid = is_header_valid(&ctx->state.header); | ||
| 1283 | /* | ||
| 1284 | * p points right after the end of the header in the | ||
| 1285 | * buffer. If the header is invalid we set p to point | ||
| 1286 | * to the next byte after the start of the header | ||
| 1287 | */ | ||
| 1288 | if (!header_valid) { | ||
| 1289 | p = p - sizeof(struct fwht_cframe_hdr) + 1; | ||
| 1290 | if (p < p_src) | ||
| 1291 | p = p_src; | ||
| 1292 | ctx->header_size = 0; | ||
| 1293 | ctx->comp_magic_cnt = 0; | ||
| 1294 | } | ||
| 1295 | |||
| 1296 | } while (!header_valid); | ||
| 1297 | |||
| 1298 | ctx->cur_buf_offset = p - p_src; | ||
| 1299 | update_capture_data_from_header(ctx); | ||
| 1300 | ctx->first_source_change_sent = true; | ||
| 1301 | v4l2_event_queue_fh(&ctx->fh, &rs_event); | ||
| 964 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); | 1302 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); |
| 965 | } | 1303 | } |
| 966 | 1304 | ||
| @@ -988,47 +1326,70 @@ static int vicodec_start_streaming(struct vb2_queue *q, | |||
| 988 | struct vicodec_ctx *ctx = vb2_get_drv_priv(q); | 1326 | struct vicodec_ctx *ctx = vb2_get_drv_priv(q); |
| 989 | struct vicodec_q_data *q_data = get_q_data(ctx, q->type); | 1327 | struct vicodec_q_data *q_data = get_q_data(ctx, q->type); |
| 990 | struct v4l2_fwht_state *state = &ctx->state; | 1328 | struct v4l2_fwht_state *state = &ctx->state; |
| 991 | unsigned int size = q_data->width * q_data->height; | ||
| 992 | const struct v4l2_fwht_pixfmt_info *info = q_data->info; | 1329 | const struct v4l2_fwht_pixfmt_info *info = q_data->info; |
| 993 | unsigned int chroma_div = info->width_div * info->height_div; | 1330 | unsigned int size = q_data->coded_width * q_data->coded_height; |
| 1331 | unsigned int chroma_div; | ||
| 994 | unsigned int total_planes_size; | 1332 | unsigned int total_planes_size; |
| 1333 | u8 *new_comp_frame; | ||
| 995 | 1334 | ||
| 996 | /* | 1335 | if (!info) |
| 997 | * we don't know ahead how many components are in the encoding type | 1336 | return -EINVAL; |
| 998 | * V4L2_PIX_FMT_FWHT, so we will allocate space for 4 planes. | 1337 | |
| 999 | */ | 1338 | chroma_div = info->width_div * info->height_div; |
| 1000 | if (info->id == V4L2_PIX_FMT_FWHT || info->components_num == 4) | 1339 | q_data->sequence = 0; |
| 1340 | |||
| 1341 | ctx->last_src_buf = NULL; | ||
| 1342 | ctx->last_dst_buf = NULL; | ||
| 1343 | state->gop_cnt = 0; | ||
| 1344 | |||
| 1345 | if ((V4L2_TYPE_IS_OUTPUT(q->type) && !ctx->is_enc) || | ||
| 1346 | (!V4L2_TYPE_IS_OUTPUT(q->type) && ctx->is_enc)) | ||
| 1347 | return 0; | ||
| 1348 | |||
| 1349 | if (info->id == V4L2_PIX_FMT_FWHT) { | ||
| 1350 | vicodec_return_bufs(q, VB2_BUF_STATE_QUEUED); | ||
| 1351 | return -EINVAL; | ||
| 1352 | } | ||
| 1353 | if (info->components_num == 4) | ||
| 1001 | total_planes_size = 2 * size + 2 * (size / chroma_div); | 1354 | total_planes_size = 2 * size + 2 * (size / chroma_div); |
| 1002 | else if (info->components_num == 3) | 1355 | else if (info->components_num == 3) |
| 1003 | total_planes_size = size + 2 * (size / chroma_div); | 1356 | total_planes_size = size + 2 * (size / chroma_div); |
| 1004 | else | 1357 | else |
| 1005 | total_planes_size = size; | 1358 | total_planes_size = size; |
| 1006 | 1359 | ||
| 1007 | q_data->sequence = 0; | 1360 | state->visible_width = q_data->visible_width; |
| 1361 | state->visible_height = q_data->visible_height; | ||
| 1362 | state->coded_width = q_data->coded_width; | ||
| 1363 | state->coded_height = q_data->coded_height; | ||
| 1364 | state->stride = q_data->coded_width * | ||
| 1365 | info->bytesperline_mult; | ||
| 1008 | 1366 | ||
| 1009 | if (!V4L2_TYPE_IS_OUTPUT(q->type)) { | ||
| 1010 | if (!ctx->is_enc) { | ||
| 1011 | state->width = q_data->width; | ||
| 1012 | state->height = q_data->height; | ||
| 1013 | } | ||
| 1014 | return 0; | ||
| 1015 | } | ||
| 1016 | |||
| 1017 | if (ctx->is_enc) { | ||
| 1018 | state->width = q_data->width; | ||
| 1019 | state->height = q_data->height; | ||
| 1020 | } | ||
| 1021 | state->ref_frame.width = state->ref_frame.height = 0; | ||
| 1022 | state->ref_frame.luma = kvmalloc(total_planes_size, GFP_KERNEL); | 1367 | state->ref_frame.luma = kvmalloc(total_planes_size, GFP_KERNEL); |
| 1023 | ctx->comp_max_size = total_planes_size + sizeof(struct fwht_cframe_hdr); | 1368 | ctx->comp_max_size = total_planes_size; |
| 1024 | state->compressed_frame = kvmalloc(ctx->comp_max_size, GFP_KERNEL); | 1369 | new_comp_frame = kvmalloc(ctx->comp_max_size, GFP_KERNEL); |
| 1025 | if (!state->ref_frame.luma || !state->compressed_frame) { | 1370 | |
| 1371 | if (!state->ref_frame.luma || !new_comp_frame) { | ||
| 1026 | kvfree(state->ref_frame.luma); | 1372 | kvfree(state->ref_frame.luma); |
| 1027 | kvfree(state->compressed_frame); | 1373 | kvfree(new_comp_frame); |
| 1028 | vicodec_return_bufs(q, VB2_BUF_STATE_QUEUED); | 1374 | vicodec_return_bufs(q, VB2_BUF_STATE_QUEUED); |
| 1029 | return -ENOMEM; | 1375 | return -ENOMEM; |
| 1030 | } | 1376 | } |
| 1031 | if (info->id == V4L2_PIX_FMT_FWHT || info->components_num >= 3) { | 1377 | /* |
| 1378 | * if state->compressed_frame was already allocated then | ||
| 1379 | * it contain data of the first frame of the new resolution | ||
| 1380 | */ | ||
| 1381 | if (state->compressed_frame) { | ||
| 1382 | if (ctx->comp_size > ctx->comp_max_size) | ||
| 1383 | ctx->comp_size = ctx->comp_max_size; | ||
| 1384 | |||
| 1385 | memcpy(new_comp_frame, | ||
| 1386 | state->compressed_frame, ctx->comp_size); | ||
| 1387 | } | ||
| 1388 | |||
| 1389 | kvfree(state->compressed_frame); | ||
| 1390 | state->compressed_frame = new_comp_frame; | ||
| 1391 | |||
| 1392 | if (info->components_num >= 3) { | ||
| 1032 | state->ref_frame.cb = state->ref_frame.luma + size; | 1393 | state->ref_frame.cb = state->ref_frame.luma + size; |
| 1033 | state->ref_frame.cr = state->ref_frame.cb + size / chroma_div; | 1394 | state->ref_frame.cr = state->ref_frame.cb + size / chroma_div; |
| 1034 | } else { | 1395 | } else { |
| @@ -1036,20 +1397,11 @@ static int vicodec_start_streaming(struct vb2_queue *q, | |||
| 1036 | state->ref_frame.cr = NULL; | 1397 | state->ref_frame.cr = NULL; |
| 1037 | } | 1398 | } |
| 1038 | 1399 | ||
| 1039 | if (info->id == V4L2_PIX_FMT_FWHT || info->components_num == 4) | 1400 | if (info->components_num == 4) |
| 1040 | state->ref_frame.alpha = | 1401 | state->ref_frame.alpha = |
| 1041 | state->ref_frame.cr + size / chroma_div; | 1402 | state->ref_frame.cr + size / chroma_div; |
| 1042 | else | 1403 | else |
| 1043 | state->ref_frame.alpha = NULL; | 1404 | state->ref_frame.alpha = NULL; |
| 1044 | |||
| 1045 | ctx->last_src_buf = NULL; | ||
| 1046 | ctx->last_dst_buf = NULL; | ||
| 1047 | state->gop_cnt = 0; | ||
| 1048 | ctx->cur_buf_offset = 0; | ||
| 1049 | ctx->comp_size = 0; | ||
| 1050 | ctx->comp_magic_cnt = 0; | ||
| 1051 | ctx->comp_has_frame = false; | ||
| 1052 | |||
| 1053 | return 0; | 1405 | return 0; |
| 1054 | } | 1406 | } |
| 1055 | 1407 | ||
| @@ -1059,11 +1411,20 @@ static void vicodec_stop_streaming(struct vb2_queue *q) | |||
| 1059 | 1411 | ||
| 1060 | vicodec_return_bufs(q, VB2_BUF_STATE_ERROR); | 1412 | vicodec_return_bufs(q, VB2_BUF_STATE_ERROR); |
| 1061 | 1413 | ||
| 1062 | if (!V4L2_TYPE_IS_OUTPUT(q->type)) | 1414 | if ((!V4L2_TYPE_IS_OUTPUT(q->type) && !ctx->is_enc) || |
| 1063 | return; | 1415 | (V4L2_TYPE_IS_OUTPUT(q->type) && ctx->is_enc)) { |
| 1064 | 1416 | kvfree(ctx->state.ref_frame.luma); | |
| 1065 | kvfree(ctx->state.ref_frame.luma); | 1417 | ctx->comp_max_size = 0; |
| 1066 | kvfree(ctx->state.compressed_frame); | 1418 | ctx->source_changed = false; |
| 1419 | } | ||
| 1420 | if (V4L2_TYPE_IS_OUTPUT(q->type) && !ctx->is_enc) { | ||
| 1421 | ctx->cur_buf_offset = 0; | ||
| 1422 | ctx->comp_size = 0; | ||
| 1423 | ctx->header_size = 0; | ||
| 1424 | ctx->comp_magic_cnt = 0; | ||
| 1425 | ctx->comp_has_frame = 0; | ||
| 1426 | ctx->comp_has_next_frame = 0; | ||
| 1427 | } | ||
| 1067 | } | 1428 | } |
| 1068 | 1429 | ||
| 1069 | static const struct vb2_ops vicodec_qops = { | 1430 | static const struct vb2_ops vicodec_qops = { |
| @@ -1204,8 +1565,10 @@ static int vicodec_open(struct file *file) | |||
| 1204 | 1565 | ||
| 1205 | ctx->q_data[V4L2_M2M_SRC].info = | 1566 | ctx->q_data[V4L2_M2M_SRC].info = |
| 1206 | ctx->is_enc ? v4l2_fwht_get_pixfmt(0) : &pixfmt_fwht; | 1567 | ctx->is_enc ? v4l2_fwht_get_pixfmt(0) : &pixfmt_fwht; |
| 1207 | ctx->q_data[V4L2_M2M_SRC].width = 1280; | 1568 | ctx->q_data[V4L2_M2M_SRC].coded_width = 1280; |
| 1208 | ctx->q_data[V4L2_M2M_SRC].height = 720; | 1569 | ctx->q_data[V4L2_M2M_SRC].coded_height = 720; |
| 1570 | ctx->q_data[V4L2_M2M_SRC].visible_width = 1280; | ||
| 1571 | ctx->q_data[V4L2_M2M_SRC].visible_height = 720; | ||
| 1209 | size = 1280 * 720 * ctx->q_data[V4L2_M2M_SRC].info->sizeimage_mult / | 1572 | size = 1280 * 720 * ctx->q_data[V4L2_M2M_SRC].info->sizeimage_mult / |
| 1210 | ctx->q_data[V4L2_M2M_SRC].info->sizeimage_div; | 1573 | ctx->q_data[V4L2_M2M_SRC].info->sizeimage_div; |
| 1211 | if (ctx->is_enc) | 1574 | if (ctx->is_enc) |
| @@ -1213,16 +1576,17 @@ static int vicodec_open(struct file *file) | |||
| 1213 | else | 1576 | else |
| 1214 | ctx->q_data[V4L2_M2M_SRC].sizeimage = | 1577 | ctx->q_data[V4L2_M2M_SRC].sizeimage = |
| 1215 | size + sizeof(struct fwht_cframe_hdr); | 1578 | size + sizeof(struct fwht_cframe_hdr); |
| 1216 | ctx->q_data[V4L2_M2M_DST] = ctx->q_data[V4L2_M2M_SRC]; | 1579 | if (ctx->is_enc) { |
| 1217 | ctx->q_data[V4L2_M2M_DST].info = | 1580 | ctx->q_data[V4L2_M2M_DST] = ctx->q_data[V4L2_M2M_SRC]; |
| 1218 | ctx->is_enc ? &pixfmt_fwht : v4l2_fwht_get_pixfmt(0); | 1581 | ctx->q_data[V4L2_M2M_DST].info = &pixfmt_fwht; |
| 1219 | size = 1280 * 720 * ctx->q_data[V4L2_M2M_DST].info->sizeimage_mult / | 1582 | ctx->q_data[V4L2_M2M_DST].sizeimage = 1280 * 720 * |
| 1220 | ctx->q_data[V4L2_M2M_DST].info->sizeimage_div; | 1583 | ctx->q_data[V4L2_M2M_DST].info->sizeimage_mult / |
| 1221 | if (ctx->is_enc) | 1584 | ctx->q_data[V4L2_M2M_DST].info->sizeimage_div + |
| 1222 | ctx->q_data[V4L2_M2M_DST].sizeimage = | 1585 | sizeof(struct fwht_cframe_hdr); |
| 1223 | size + sizeof(struct fwht_cframe_hdr); | 1586 | } else { |
| 1224 | else | 1587 | ctx->q_data[V4L2_M2M_DST].info = NULL; |
| 1225 | ctx->q_data[V4L2_M2M_DST].sizeimage = size; | 1588 | } |
| 1589 | |||
| 1226 | ctx->state.colorspace = V4L2_COLORSPACE_REC709; | 1590 | ctx->state.colorspace = V4L2_COLORSPACE_REC709; |
| 1227 | 1591 | ||
| 1228 | if (ctx->is_enc) { | 1592 | if (ctx->is_enc) { |
| @@ -1310,6 +1674,8 @@ static int vicodec_probe(struct platform_device *pdev) | |||
| 1310 | #ifdef CONFIG_MEDIA_CONTROLLER | 1674 | #ifdef CONFIG_MEDIA_CONTROLLER |
| 1311 | dev->mdev.dev = &pdev->dev; | 1675 | dev->mdev.dev = &pdev->dev; |
| 1312 | strscpy(dev->mdev.model, "vicodec", sizeof(dev->mdev.model)); | 1676 | strscpy(dev->mdev.model, "vicodec", sizeof(dev->mdev.model)); |
| 1677 | strscpy(dev->mdev.bus_info, "platform:vicodec", | ||
| 1678 | sizeof(dev->mdev.bus_info)); | ||
| 1313 | media_device_init(&dev->mdev); | 1679 | media_device_init(&dev->mdev); |
| 1314 | dev->v4l2_dev.mdev = &dev->mdev; | 1680 | dev->v4l2_dev.mdev = &dev->mdev; |
| 1315 | #endif | 1681 | #endif |
diff --git a/drivers/media/platform/video-mux.c b/drivers/media/platform/video-mux.c index c33900e3c23e..0ba30756e1e4 100644 --- a/drivers/media/platform/video-mux.c +++ b/drivers/media/platform/video-mux.c | |||
| @@ -263,6 +263,26 @@ static int video_mux_set_format(struct v4l2_subdev *sd, | |||
| 263 | case MEDIA_BUS_FMT_UYYVYY16_0_5X48: | 263 | case MEDIA_BUS_FMT_UYYVYY16_0_5X48: |
| 264 | case MEDIA_BUS_FMT_JPEG_1X8: | 264 | case MEDIA_BUS_FMT_JPEG_1X8: |
| 265 | case MEDIA_BUS_FMT_AHSV8888_1X32: | 265 | case MEDIA_BUS_FMT_AHSV8888_1X32: |
| 266 | case MEDIA_BUS_FMT_SBGGR8_1X8: | ||
| 267 | case MEDIA_BUS_FMT_SGBRG8_1X8: | ||
| 268 | case MEDIA_BUS_FMT_SGRBG8_1X8: | ||
| 269 | case MEDIA_BUS_FMT_SRGGB8_1X8: | ||
| 270 | case MEDIA_BUS_FMT_SBGGR10_1X10: | ||
| 271 | case MEDIA_BUS_FMT_SGBRG10_1X10: | ||
| 272 | case MEDIA_BUS_FMT_SGRBG10_1X10: | ||
| 273 | case MEDIA_BUS_FMT_SRGGB10_1X10: | ||
| 274 | case MEDIA_BUS_FMT_SBGGR12_1X12: | ||
| 275 | case MEDIA_BUS_FMT_SGBRG12_1X12: | ||
| 276 | case MEDIA_BUS_FMT_SGRBG12_1X12: | ||
| 277 | case MEDIA_BUS_FMT_SRGGB12_1X12: | ||
| 278 | case MEDIA_BUS_FMT_SBGGR14_1X14: | ||
| 279 | case MEDIA_BUS_FMT_SGBRG14_1X14: | ||
| 280 | case MEDIA_BUS_FMT_SGRBG14_1X14: | ||
| 281 | case MEDIA_BUS_FMT_SRGGB14_1X14: | ||
| 282 | case MEDIA_BUS_FMT_SBGGR16_1X16: | ||
| 283 | case MEDIA_BUS_FMT_SGBRG16_1X16: | ||
| 284 | case MEDIA_BUS_FMT_SGRBG16_1X16: | ||
| 285 | case MEDIA_BUS_FMT_SRGGB16_1X16: | ||
| 266 | break; | 286 | break; |
| 267 | default: | 287 | default: |
| 268 | sdformat->format.code = MEDIA_BUS_FMT_Y8_1X8; | 288 | sdformat->format.code = MEDIA_BUS_FMT_Y8_1X8; |
diff --git a/drivers/media/platform/vim2m.c b/drivers/media/platform/vim2m.c index 89d9c4c21037..34dcaca45d8b 100644 --- a/drivers/media/platform/vim2m.c +++ b/drivers/media/platform/vim2m.c | |||
| @@ -1,3 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 1 | /* | 2 | /* |
| 2 | * A virtual v4l2-mem2mem example device. | 3 | * A virtual v4l2-mem2mem example device. |
| 3 | * | 4 | * |
| @@ -34,22 +35,34 @@ | |||
| 34 | MODULE_DESCRIPTION("Virtual device for mem2mem framework testing"); | 35 | MODULE_DESCRIPTION("Virtual device for mem2mem framework testing"); |
| 35 | MODULE_AUTHOR("Pawel Osciak, <pawel@osciak.com>"); | 36 | MODULE_AUTHOR("Pawel Osciak, <pawel@osciak.com>"); |
| 36 | MODULE_LICENSE("GPL"); | 37 | MODULE_LICENSE("GPL"); |
| 37 | MODULE_VERSION("0.1.1"); | 38 | MODULE_VERSION("0.2"); |
| 38 | MODULE_ALIAS("mem2mem_testdev"); | 39 | MODULE_ALIAS("mem2mem_testdev"); |
| 39 | 40 | ||
| 40 | static unsigned debug; | 41 | static unsigned int debug; |
| 41 | module_param(debug, uint, 0644); | 42 | module_param(debug, uint, 0644); |
| 42 | MODULE_PARM_DESC(debug, "activates debug info"); | 43 | MODULE_PARM_DESC(debug, "debug level"); |
| 44 | |||
| 45 | /* Default transaction time in msec */ | ||
| 46 | static unsigned int default_transtime = 40; /* Max 25 fps */ | ||
| 47 | module_param(default_transtime, uint, 0644); | ||
| 48 | MODULE_PARM_DESC(default_transtime, "default transaction time in ms"); | ||
| 43 | 49 | ||
| 44 | #define MIN_W 32 | 50 | #define MIN_W 32 |
| 45 | #define MIN_H 32 | 51 | #define MIN_H 32 |
| 46 | #define MAX_W 640 | 52 | #define MAX_W 640 |
| 47 | #define MAX_H 480 | 53 | #define MAX_H 480 |
| 48 | #define DIM_ALIGN_MASK 7 /* 8-byte alignment for line length */ | 54 | |
| 55 | /* Pixel alignment for non-bayer formats */ | ||
| 56 | #define WIDTH_ALIGN 2 | ||
| 57 | #define HEIGHT_ALIGN 1 | ||
| 58 | |||
| 59 | /* Pixel alignment for bayer formats */ | ||
| 60 | #define BAYER_WIDTH_ALIGN 2 | ||
| 61 | #define BAYER_HEIGHT_ALIGN 2 | ||
| 49 | 62 | ||
| 50 | /* Flags that indicate a format can be used for capture/output */ | 63 | /* Flags that indicate a format can be used for capture/output */ |
| 51 | #define MEM2MEM_CAPTURE (1 << 0) | 64 | #define MEM2MEM_CAPTURE BIT(0) |
| 52 | #define MEM2MEM_OUTPUT (1 << 1) | 65 | #define MEM2MEM_OUTPUT BIT(1) |
| 53 | 66 | ||
| 54 | #define MEM2MEM_NAME "vim2m" | 67 | #define MEM2MEM_NAME "vim2m" |
| 55 | 68 | ||
| @@ -58,18 +71,12 @@ MODULE_PARM_DESC(debug, "activates debug info"); | |||
| 58 | /* In bytes, per queue */ | 71 | /* In bytes, per queue */ |
| 59 | #define MEM2MEM_VID_MEM_LIMIT (16 * 1024 * 1024) | 72 | #define MEM2MEM_VID_MEM_LIMIT (16 * 1024 * 1024) |
| 60 | 73 | ||
| 61 | /* Default transaction time in msec */ | ||
| 62 | #define MEM2MEM_DEF_TRANSTIME 40 | ||
| 63 | #define MEM2MEM_COLOR_STEP (0xff >> 4) | ||
| 64 | #define MEM2MEM_NUM_TILES 8 | ||
| 65 | |||
| 66 | /* Flags that indicate processing mode */ | 74 | /* Flags that indicate processing mode */ |
| 67 | #define MEM2MEM_HFLIP (1 << 0) | 75 | #define MEM2MEM_HFLIP BIT(0) |
| 68 | #define MEM2MEM_VFLIP (1 << 1) | 76 | #define MEM2MEM_VFLIP BIT(1) |
| 69 | |||
| 70 | #define dprintk(dev, fmt, arg...) \ | ||
| 71 | v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: " fmt, __func__, ## arg) | ||
| 72 | 77 | ||
| 78 | #define dprintk(dev, lvl, fmt, arg...) \ | ||
| 79 | v4l2_dbg(lvl, debug, &(dev)->v4l2_dev, "%s: " fmt, __func__, ## arg) | ||
| 73 | 80 | ||
| 74 | static void vim2m_dev_release(struct device *dev) | 81 | static void vim2m_dev_release(struct device *dev) |
| 75 | {} | 82 | {} |
| @@ -83,21 +90,46 @@ struct vim2m_fmt { | |||
| 83 | u32 fourcc; | 90 | u32 fourcc; |
| 84 | int depth; | 91 | int depth; |
| 85 | /* Types the format can be used for */ | 92 | /* Types the format can be used for */ |
| 86 | u32 types; | 93 | u32 types; |
| 87 | }; | 94 | }; |
| 88 | 95 | ||
| 89 | static struct vim2m_fmt formats[] = { | 96 | static struct vim2m_fmt formats[] = { |
| 90 | { | 97 | { |
| 91 | .fourcc = V4L2_PIX_FMT_RGB565X, /* rrrrrggg gggbbbbb */ | 98 | .fourcc = V4L2_PIX_FMT_RGB565, /* rrrrrggg gggbbbbb */ |
| 92 | .depth = 16, | 99 | .depth = 16, |
| 93 | /* Both capture and output format */ | 100 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, |
| 94 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | 101 | }, { |
| 95 | }, | 102 | .fourcc = V4L2_PIX_FMT_RGB565X, /* gggbbbbb rrrrrggg */ |
| 96 | { | 103 | .depth = 16, |
| 104 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | ||
| 105 | }, { | ||
| 106 | .fourcc = V4L2_PIX_FMT_RGB24, | ||
| 107 | .depth = 24, | ||
| 108 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | ||
| 109 | }, { | ||
| 110 | .fourcc = V4L2_PIX_FMT_BGR24, | ||
| 111 | .depth = 24, | ||
| 112 | .types = MEM2MEM_CAPTURE | MEM2MEM_OUTPUT, | ||
| 113 | }, { | ||
| 97 | .fourcc = V4L2_PIX_FMT_YUYV, | 114 | .fourcc = V4L2_PIX_FMT_YUYV, |
| 98 | .depth = 16, | 115 | .depth = 16, |
| 99 | /* Output-only format */ | 116 | .types = MEM2MEM_CAPTURE, |
| 100 | .types = MEM2MEM_OUTPUT, | 117 | }, { |
| 118 | .fourcc = V4L2_PIX_FMT_SBGGR8, | ||
| 119 | .depth = 8, | ||
| 120 | .types = MEM2MEM_CAPTURE, | ||
| 121 | }, { | ||
| 122 | .fourcc = V4L2_PIX_FMT_SGBRG8, | ||
| 123 | .depth = 8, | ||
| 124 | .types = MEM2MEM_CAPTURE, | ||
| 125 | }, { | ||
| 126 | .fourcc = V4L2_PIX_FMT_SGRBG8, | ||
| 127 | .depth = 8, | ||
| 128 | .types = MEM2MEM_CAPTURE, | ||
| 129 | }, { | ||
| 130 | .fourcc = V4L2_PIX_FMT_SRGGB8, | ||
| 131 | .depth = 8, | ||
| 132 | .types = MEM2MEM_CAPTURE, | ||
| 101 | }, | 133 | }, |
| 102 | }; | 134 | }; |
| 103 | 135 | ||
| @@ -120,14 +152,14 @@ enum { | |||
| 120 | #define V4L2_CID_TRANS_TIME_MSEC (V4L2_CID_USER_BASE + 0x1000) | 152 | #define V4L2_CID_TRANS_TIME_MSEC (V4L2_CID_USER_BASE + 0x1000) |
| 121 | #define V4L2_CID_TRANS_NUM_BUFS (V4L2_CID_USER_BASE + 0x1001) | 153 | #define V4L2_CID_TRANS_NUM_BUFS (V4L2_CID_USER_BASE + 0x1001) |
| 122 | 154 | ||
| 123 | static struct vim2m_fmt *find_format(struct v4l2_format *f) | 155 | static struct vim2m_fmt *find_format(u32 fourcc) |
| 124 | { | 156 | { |
| 125 | struct vim2m_fmt *fmt; | 157 | struct vim2m_fmt *fmt; |
| 126 | unsigned int k; | 158 | unsigned int k; |
| 127 | 159 | ||
| 128 | for (k = 0; k < NUM_FORMATS; k++) { | 160 | for (k = 0; k < NUM_FORMATS; k++) { |
| 129 | fmt = &formats[k]; | 161 | fmt = &formats[k]; |
| 130 | if (fmt->fourcc == f->fmt.pix.pixelformat) | 162 | if (fmt->fourcc == fourcc) |
| 131 | break; | 163 | break; |
| 132 | } | 164 | } |
| 133 | 165 | ||
| @@ -137,6 +169,24 @@ static struct vim2m_fmt *find_format(struct v4l2_format *f) | |||
| 137 | return &formats[k]; | 169 | return &formats[k]; |
| 138 | } | 170 | } |
| 139 | 171 | ||
| 172 | static void get_alignment(u32 fourcc, | ||
| 173 | unsigned int *walign, unsigned int *halign) | ||
| 174 | { | ||
| 175 | switch (fourcc) { | ||
| 176 | case V4L2_PIX_FMT_SBGGR8: | ||
| 177 | case V4L2_PIX_FMT_SGBRG8: | ||
| 178 | case V4L2_PIX_FMT_SGRBG8: | ||
| 179 | case V4L2_PIX_FMT_SRGGB8: | ||
| 180 | *walign = BAYER_WIDTH_ALIGN; | ||
| 181 | *halign = BAYER_HEIGHT_ALIGN; | ||
| 182 | return; | ||
| 183 | default: | ||
| 184 | *walign = WIDTH_ALIGN; | ||
| 185 | *halign = HEIGHT_ALIGN; | ||
| 186 | return; | ||
| 187 | } | ||
| 188 | } | ||
| 189 | |||
| 140 | struct vim2m_dev { | 190 | struct vim2m_dev { |
| 141 | struct v4l2_device v4l2_dev; | 191 | struct v4l2_device v4l2_dev; |
| 142 | struct video_device vfd; | 192 | struct video_device vfd; |
| @@ -146,9 +196,6 @@ struct vim2m_dev { | |||
| 146 | 196 | ||
| 147 | atomic_t num_inst; | 197 | atomic_t num_inst; |
| 148 | struct mutex dev_mutex; | 198 | struct mutex dev_mutex; |
| 149 | spinlock_t irqlock; | ||
| 150 | |||
| 151 | struct delayed_work work_run; | ||
| 152 | 199 | ||
| 153 | struct v4l2_m2m_dev *m2m_dev; | 200 | struct v4l2_m2m_dev *m2m_dev; |
| 154 | }; | 201 | }; |
| @@ -167,6 +214,10 @@ struct vim2m_ctx { | |||
| 167 | /* Transaction time (i.e. simulated processing time) in milliseconds */ | 214 | /* Transaction time (i.e. simulated processing time) in milliseconds */ |
| 168 | u32 transtime; | 215 | u32 transtime; |
| 169 | 216 | ||
| 217 | struct mutex vb_mutex; | ||
| 218 | struct delayed_work work_run; | ||
| 219 | spinlock_t irqlock; | ||
| 220 | |||
| 170 | /* Abort requested by m2m */ | 221 | /* Abort requested by m2m */ |
| 171 | int aborting; | 222 | int aborting; |
| 172 | 223 | ||
| @@ -188,7 +239,7 @@ static inline struct vim2m_ctx *file2ctx(struct file *file) | |||
| 188 | } | 239 | } |
| 189 | 240 | ||
| 190 | static struct vim2m_q_data *get_q_data(struct vim2m_ctx *ctx, | 241 | static struct vim2m_q_data *get_q_data(struct vim2m_ctx *ctx, |
| 191 | enum v4l2_buf_type type) | 242 | enum v4l2_buf_type type) |
| 192 | { | 243 | { |
| 193 | switch (type) { | 244 | switch (type) { |
| 194 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: | 245 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: |
| @@ -196,28 +247,221 @@ static struct vim2m_q_data *get_q_data(struct vim2m_ctx *ctx, | |||
| 196 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | 247 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: |
| 197 | return &ctx->q_data[V4L2_M2M_DST]; | 248 | return &ctx->q_data[V4L2_M2M_DST]; |
| 198 | default: | 249 | default: |
| 199 | BUG(); | 250 | return NULL; |
| 251 | } | ||
| 252 | } | ||
| 253 | |||
| 254 | static const char *type_name(enum v4l2_buf_type type) | ||
| 255 | { | ||
| 256 | switch (type) { | ||
| 257 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: | ||
| 258 | return "Output"; | ||
| 259 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | ||
| 260 | return "Capture"; | ||
| 261 | default: | ||
| 262 | return "Invalid"; | ||
| 263 | } | ||
| 264 | } | ||
| 265 | |||
| 266 | #define CLIP(__color) \ | ||
| 267 | (u8)(((__color) > 0xff) ? 0xff : (((__color) < 0) ? 0 : (__color))) | ||
| 268 | |||
| 269 | static void copy_line(struct vim2m_q_data *q_data_out, | ||
| 270 | u8 *src, u8 *dst, bool reverse) | ||
| 271 | { | ||
| 272 | int x, depth = q_data_out->fmt->depth >> 3; | ||
| 273 | |||
| 274 | if (!reverse) { | ||
| 275 | memcpy(dst, src, q_data_out->width * depth); | ||
| 276 | } else { | ||
| 277 | for (x = 0; x < q_data_out->width >> 1; x++) { | ||
| 278 | memcpy(dst, src, depth); | ||
| 279 | memcpy(dst + depth, src - depth, depth); | ||
| 280 | src -= depth << 1; | ||
| 281 | dst += depth << 1; | ||
| 282 | } | ||
| 283 | return; | ||
| 200 | } | 284 | } |
| 201 | return NULL; | ||
| 202 | } | 285 | } |
| 203 | 286 | ||
| 287 | static void copy_two_pixels(struct vim2m_q_data *q_data_in, | ||
| 288 | struct vim2m_q_data *q_data_out, | ||
| 289 | u8 *src[2], u8 **dst, int ypos, bool reverse) | ||
| 290 | { | ||
| 291 | struct vim2m_fmt *out = q_data_out->fmt; | ||
| 292 | struct vim2m_fmt *in = q_data_in->fmt; | ||
| 293 | u8 _r[2], _g[2], _b[2], *r, *g, *b; | ||
| 294 | int i; | ||
| 295 | |||
| 296 | /* Step 1: read two consecutive pixels from src pointer */ | ||
| 297 | |||
| 298 | r = _r; | ||
| 299 | g = _g; | ||
| 300 | b = _b; | ||
| 301 | |||
| 302 | switch (in->fourcc) { | ||
| 303 | case V4L2_PIX_FMT_RGB565: /* rrrrrggg gggbbbbb */ | ||
| 304 | for (i = 0; i < 2; i++) { | ||
| 305 | u16 pix = *(u16 *)(src[i]); | ||
| 306 | |||
| 307 | *r++ = (u8)(((pix & 0xf800) >> 11) << 3) | 0x07; | ||
| 308 | *g++ = (u8)((((pix & 0x07e0) >> 5)) << 2) | 0x03; | ||
| 309 | *b++ = (u8)((pix & 0x1f) << 3) | 0x07; | ||
| 310 | } | ||
| 311 | break; | ||
| 312 | case V4L2_PIX_FMT_RGB565X: /* gggbbbbb rrrrrggg */ | ||
| 313 | for (i = 0; i < 2; i++) { | ||
| 314 | u16 pix = *(u16 *)(src[i]); | ||
| 315 | |||
| 316 | *r++ = (u8)(((0x00f8 & pix) >> 3) << 3) | 0x07; | ||
| 317 | *g++ = (u8)(((pix & 0x7) << 2) | | ||
| 318 | ((pix & 0xe000) >> 5)) | 0x03; | ||
| 319 | *b++ = (u8)(((pix & 0x1f00) >> 8) << 3) | 0x07; | ||
| 320 | } | ||
| 321 | break; | ||
| 322 | default: | ||
| 323 | case V4L2_PIX_FMT_RGB24: | ||
| 324 | for (i = 0; i < 2; i++) { | ||
| 325 | *r++ = src[i][0]; | ||
| 326 | *g++ = src[i][1]; | ||
| 327 | *b++ = src[i][2]; | ||
| 328 | } | ||
| 329 | break; | ||
| 330 | case V4L2_PIX_FMT_BGR24: | ||
| 331 | for (i = 0; i < 2; i++) { | ||
| 332 | *b++ = src[i][0]; | ||
| 333 | *g++ = src[i][1]; | ||
| 334 | *r++ = src[i][2]; | ||
| 335 | } | ||
| 336 | break; | ||
| 337 | } | ||
| 338 | |||
| 339 | /* Step 2: store two consecutive points, reversing them if needed */ | ||
| 340 | |||
| 341 | r = _r; | ||
| 342 | g = _g; | ||
| 343 | b = _b; | ||
| 344 | |||
| 345 | switch (out->fourcc) { | ||
| 346 | case V4L2_PIX_FMT_RGB565: /* rrrrrggg gggbbbbb */ | ||
| 347 | for (i = 0; i < 2; i++) { | ||
| 348 | u16 *pix = (u16 *)*dst; | ||
| 349 | |||
| 350 | *pix = ((*r << 8) & 0xf800) | ((*g << 3) & 0x07e0) | | ||
| 351 | (*b >> 3); | ||
| 352 | |||
| 353 | *dst += 2; | ||
| 354 | } | ||
| 355 | return; | ||
| 356 | case V4L2_PIX_FMT_RGB565X: /* gggbbbbb rrrrrggg */ | ||
| 357 | for (i = 0; i < 2; i++) { | ||
| 358 | u16 *pix = (u16 *)*dst; | ||
| 359 | u8 green = *g++ >> 2; | ||
| 360 | |||
| 361 | *pix = ((green << 8) & 0xe000) | (green & 0x07) | | ||
| 362 | ((*b++ << 5) & 0x1f00) | ((*r++ & 0xf8)); | ||
| 363 | |||
| 364 | *dst += 2; | ||
| 365 | } | ||
| 366 | return; | ||
| 367 | case V4L2_PIX_FMT_RGB24: | ||
| 368 | for (i = 0; i < 2; i++) { | ||
| 369 | *(*dst)++ = *r++; | ||
| 370 | *(*dst)++ = *g++; | ||
| 371 | *(*dst)++ = *b++; | ||
| 372 | } | ||
| 373 | return; | ||
| 374 | case V4L2_PIX_FMT_BGR24: | ||
| 375 | for (i = 0; i < 2; i++) { | ||
| 376 | *(*dst)++ = *b++; | ||
| 377 | *(*dst)++ = *g++; | ||
| 378 | *(*dst)++ = *r++; | ||
| 379 | } | ||
| 380 | return; | ||
| 381 | case V4L2_PIX_FMT_YUYV: | ||
| 382 | default: | ||
| 383 | { | ||
| 384 | u8 y, y1, u, v; | ||
| 385 | |||
| 386 | y = ((8453 * (*r) + 16594 * (*g) + 3223 * (*b) | ||
| 387 | + 524288) >> 15); | ||
| 388 | u = ((-4878 * (*r) - 9578 * (*g) + 14456 * (*b) | ||
| 389 | + 4210688) >> 15); | ||
| 390 | v = ((14456 * (*r++) - 12105 * (*g++) - 2351 * (*b++) | ||
| 391 | + 4210688) >> 15); | ||
| 392 | y1 = ((8453 * (*r) + 16594 * (*g) + 3223 * (*b) | ||
| 393 | + 524288) >> 15); | ||
| 394 | |||
| 395 | *(*dst)++ = y; | ||
| 396 | *(*dst)++ = u; | ||
| 397 | |||
| 398 | *(*dst)++ = y1; | ||
| 399 | *(*dst)++ = v; | ||
| 400 | return; | ||
| 401 | } | ||
| 402 | case V4L2_PIX_FMT_SBGGR8: | ||
| 403 | if (!(ypos & 1)) { | ||
| 404 | *(*dst)++ = *b; | ||
| 405 | *(*dst)++ = *++g; | ||
| 406 | } else { | ||
| 407 | *(*dst)++ = *g; | ||
| 408 | *(*dst)++ = *++r; | ||
| 409 | } | ||
| 410 | return; | ||
| 411 | case V4L2_PIX_FMT_SGBRG8: | ||
| 412 | if (!(ypos & 1)) { | ||
| 413 | *(*dst)++ = *g; | ||
| 414 | *(*dst)++ = *++b; | ||
| 415 | } else { | ||
| 416 | *(*dst)++ = *r; | ||
| 417 | *(*dst)++ = *++g; | ||
| 418 | } | ||
| 419 | return; | ||
| 420 | case V4L2_PIX_FMT_SGRBG8: | ||
| 421 | if (!(ypos & 1)) { | ||
| 422 | *(*dst)++ = *g; | ||
| 423 | *(*dst)++ = *++r; | ||
| 424 | } else { | ||
| 425 | *(*dst)++ = *b; | ||
| 426 | *(*dst)++ = *++g; | ||
| 427 | } | ||
| 428 | return; | ||
| 429 | case V4L2_PIX_FMT_SRGGB8: | ||
| 430 | if (!(ypos & 1)) { | ||
| 431 | *(*dst)++ = *r; | ||
| 432 | *(*dst)++ = *++g; | ||
| 433 | } else { | ||
| 434 | *(*dst)++ = *g; | ||
| 435 | *(*dst)++ = *++b; | ||
| 436 | } | ||
| 437 | return; | ||
| 438 | } | ||
| 439 | } | ||
| 204 | 440 | ||
| 205 | static int device_process(struct vim2m_ctx *ctx, | 441 | static int device_process(struct vim2m_ctx *ctx, |
| 206 | struct vb2_v4l2_buffer *in_vb, | 442 | struct vb2_v4l2_buffer *in_vb, |
| 207 | struct vb2_v4l2_buffer *out_vb) | 443 | struct vb2_v4l2_buffer *out_vb) |
| 208 | { | 444 | { |
| 209 | struct vim2m_dev *dev = ctx->dev; | 445 | struct vim2m_dev *dev = ctx->dev; |
| 210 | struct vim2m_q_data *q_data; | 446 | struct vim2m_q_data *q_data_in, *q_data_out; |
| 211 | u8 *p_in, *p_out; | 447 | u8 *p_in, *p_line, *p_in_x[2], *p, *p_out; |
| 212 | int x, y, t, w; | 448 | unsigned int width, height, bytesperline, bytes_per_pixel; |
| 213 | int tile_w, bytes_left; | 449 | unsigned int x, y, y_in, y_out, x_int, x_fract, x_err, x_offset; |
| 214 | int width, height, bytesperline; | 450 | int start, end, step; |
| 451 | |||
| 452 | q_data_in = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); | ||
| 453 | if (!q_data_in) | ||
| 454 | return 0; | ||
| 455 | bytesperline = (q_data_in->width * q_data_in->fmt->depth) >> 3; | ||
| 456 | bytes_per_pixel = q_data_in->fmt->depth >> 3; | ||
| 215 | 457 | ||
| 216 | q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); | 458 | q_data_out = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); |
| 459 | if (!q_data_out) | ||
| 460 | return 0; | ||
| 217 | 461 | ||
| 218 | width = q_data->width; | 462 | /* As we're doing scaling, use the output dimensions here */ |
| 219 | height = q_data->height; | 463 | height = q_data_out->height; |
| 220 | bytesperline = (q_data->width * q_data->fmt->depth) >> 3; | 464 | width = q_data_out->width; |
| 221 | 465 | ||
| 222 | p_in = vb2_plane_vaddr(&in_vb->vb2_buf, 0); | 466 | p_in = vb2_plane_vaddr(&in_vb->vb2_buf, 0); |
| 223 | p_out = vb2_plane_vaddr(&out_vb->vb2_buf, 0); | 467 | p_out = vb2_plane_vaddr(&out_vb->vb2_buf, 0); |
| @@ -227,109 +471,86 @@ static int device_process(struct vim2m_ctx *ctx, | |||
| 227 | return -EFAULT; | 471 | return -EFAULT; |
| 228 | } | 472 | } |
| 229 | 473 | ||
| 230 | if (vb2_plane_size(&in_vb->vb2_buf, 0) > | 474 | out_vb->sequence = q_data_out->sequence++; |
| 231 | vb2_plane_size(&out_vb->vb2_buf, 0)) { | 475 | in_vb->sequence = q_data_in->sequence++; |
| 232 | v4l2_err(&dev->v4l2_dev, "Output buffer is too small\n"); | 476 | v4l2_m2m_buf_copy_metadata(in_vb, out_vb, true); |
| 233 | return -EINVAL; | ||
| 234 | } | ||
| 235 | 477 | ||
| 236 | tile_w = (width * (q_data[V4L2_M2M_DST].fmt->depth >> 3)) | 478 | if (ctx->mode & MEM2MEM_VFLIP) { |
| 237 | / MEM2MEM_NUM_TILES; | 479 | start = height - 1; |
| 238 | bytes_left = bytesperline - tile_w * MEM2MEM_NUM_TILES; | 480 | end = -1; |
| 239 | w = 0; | 481 | step = -1; |
| 240 | 482 | } else { | |
| 241 | out_vb->sequence = | 483 | start = 0; |
| 242 | get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE)->sequence++; | 484 | end = height; |
| 243 | in_vb->sequence = q_data->sequence++; | 485 | step = 1; |
| 244 | out_vb->vb2_buf.timestamp = in_vb->vb2_buf.timestamp; | 486 | } |
| 245 | 487 | y_out = 0; | |
| 246 | if (in_vb->flags & V4L2_BUF_FLAG_TIMECODE) | 488 | |
| 247 | out_vb->timecode = in_vb->timecode; | 489 | /* |
| 248 | out_vb->field = in_vb->field; | 490 | * When format and resolution are identical, |
| 249 | out_vb->flags = in_vb->flags & | 491 | * we can use a faster copy logic |
| 250 | (V4L2_BUF_FLAG_TIMECODE | | 492 | */ |
| 251 | V4L2_BUF_FLAG_KEYFRAME | | 493 | if (q_data_in->fmt->fourcc == q_data_out->fmt->fourcc && |
| 252 | V4L2_BUF_FLAG_PFRAME | | 494 | q_data_in->width == q_data_out->width && |
| 253 | V4L2_BUF_FLAG_BFRAME | | 495 | q_data_in->height == q_data_out->height) { |
| 254 | V4L2_BUF_FLAG_TSTAMP_SRC_MASK); | 496 | for (y = start; y != end; y += step, y_out++) { |
| 255 | 497 | p = p_in + (y * bytesperline); | |
| 256 | switch (ctx->mode) { | 498 | if (ctx->mode & MEM2MEM_HFLIP) |
| 257 | case MEM2MEM_HFLIP | MEM2MEM_VFLIP: | 499 | p += bytesperline - (q_data_in->fmt->depth >> 3); |
| 258 | p_out += bytesperline * height - bytes_left; | 500 | |
| 259 | for (y = 0; y < height; ++y) { | 501 | copy_line(q_data_out, p, p_out, |
| 260 | for (t = 0; t < MEM2MEM_NUM_TILES; ++t) { | 502 | ctx->mode & MEM2MEM_HFLIP); |
| 261 | if (w & 0x1) { | ||
| 262 | for (x = 0; x < tile_w; ++x) | ||
| 263 | *--p_out = *p_in++ + | ||
| 264 | MEM2MEM_COLOR_STEP; | ||
| 265 | } else { | ||
| 266 | for (x = 0; x < tile_w; ++x) | ||
| 267 | *--p_out = *p_in++ - | ||
| 268 | MEM2MEM_COLOR_STEP; | ||
| 269 | } | ||
| 270 | ++w; | ||
| 271 | } | ||
| 272 | p_in += bytes_left; | ||
| 273 | p_out -= bytes_left; | ||
| 274 | } | ||
| 275 | break; | ||
| 276 | 503 | ||
| 277 | case MEM2MEM_HFLIP: | ||
| 278 | for (y = 0; y < height; ++y) { | ||
| 279 | p_out += MEM2MEM_NUM_TILES * tile_w; | ||
| 280 | for (t = 0; t < MEM2MEM_NUM_TILES; ++t) { | ||
| 281 | if (w & 0x01) { | ||
| 282 | for (x = 0; x < tile_w; ++x) | ||
| 283 | *--p_out = *p_in++ + | ||
| 284 | MEM2MEM_COLOR_STEP; | ||
| 285 | } else { | ||
| 286 | for (x = 0; x < tile_w; ++x) | ||
| 287 | *--p_out = *p_in++ - | ||
| 288 | MEM2MEM_COLOR_STEP; | ||
| 289 | } | ||
| 290 | ++w; | ||
| 291 | } | ||
| 292 | p_in += bytes_left; | ||
| 293 | p_out += bytesperline; | 504 | p_out += bytesperline; |
| 294 | } | 505 | } |
| 295 | break; | 506 | return 0; |
| 507 | } | ||
| 508 | |||
| 509 | /* Slower algorithm with format conversion, hflip, vflip and scaler */ | ||
| 510 | |||
| 511 | /* To speed scaler up, use Bresenham for X dimension */ | ||
| 512 | x_int = q_data_in->width / q_data_out->width; | ||
| 513 | x_fract = q_data_in->width % q_data_out->width; | ||
| 514 | |||
| 515 | for (y = start; y != end; y += step, y_out++) { | ||
| 516 | y_in = (y * q_data_in->height) / q_data_out->height; | ||
| 517 | x_offset = 0; | ||
| 518 | x_err = 0; | ||
| 296 | 519 | ||
| 297 | case MEM2MEM_VFLIP: | 520 | p_line = p_in + (y_in * bytesperline); |
| 298 | p_out += bytesperline * (height - 1); | 521 | if (ctx->mode & MEM2MEM_HFLIP) |
| 299 | for (y = 0; y < height; ++y) { | 522 | p_line += bytesperline - (q_data_in->fmt->depth >> 3); |
| 300 | for (t = 0; t < MEM2MEM_NUM_TILES; ++t) { | 523 | p_in_x[0] = p_line; |
| 301 | if (w & 0x1) { | 524 | |
| 302 | for (x = 0; x < tile_w; ++x) | 525 | for (x = 0; x < width >> 1; x++) { |
| 303 | *p_out++ = *p_in++ + | 526 | x_offset += x_int; |
| 304 | MEM2MEM_COLOR_STEP; | 527 | x_err += x_fract; |
| 305 | } else { | 528 | if (x_err > width) { |
| 306 | for (x = 0; x < tile_w; ++x) | 529 | x_offset++; |
| 307 | *p_out++ = *p_in++ - | 530 | x_err -= width; |
| 308 | MEM2MEM_COLOR_STEP; | ||
| 309 | } | ||
| 310 | ++w; | ||
| 311 | } | 531 | } |
| 312 | p_in += bytes_left; | ||
| 313 | p_out += bytes_left - 2 * bytesperline; | ||
| 314 | } | ||
| 315 | break; | ||
| 316 | 532 | ||
| 317 | default: | 533 | if (ctx->mode & MEM2MEM_HFLIP) |
| 318 | for (y = 0; y < height; ++y) { | 534 | p_in_x[1] = p_line - x_offset * bytes_per_pixel; |
| 319 | for (t = 0; t < MEM2MEM_NUM_TILES; ++t) { | 535 | else |
| 320 | if (w & 0x1) { | 536 | p_in_x[1] = p_line + x_offset * bytes_per_pixel; |
| 321 | for (x = 0; x < tile_w; ++x) | 537 | |
| 322 | *p_out++ = *p_in++ + | 538 | copy_two_pixels(q_data_in, q_data_out, |
| 323 | MEM2MEM_COLOR_STEP; | 539 | p_in_x, &p_out, y_out, |
| 324 | } else { | 540 | ctx->mode & MEM2MEM_HFLIP); |
| 325 | for (x = 0; x < tile_w; ++x) | 541 | |
| 326 | *p_out++ = *p_in++ - | 542 | /* Calculate the next p_in_x0 */ |
| 327 | MEM2MEM_COLOR_STEP; | 543 | x_offset += x_int; |
| 328 | } | 544 | x_err += x_fract; |
| 329 | ++w; | 545 | if (x_err > width) { |
| 546 | x_offset++; | ||
| 547 | x_err -= width; | ||
| 330 | } | 548 | } |
| 331 | p_in += bytes_left; | 549 | |
| 332 | p_out += bytes_left; | 550 | if (ctx->mode & MEM2MEM_HFLIP) |
| 551 | p_in_x[0] = p_line - x_offset * bytes_per_pixel; | ||
| 552 | else | ||
| 553 | p_in_x[0] = p_line + x_offset * bytes_per_pixel; | ||
| 333 | } | 554 | } |
| 334 | } | 555 | } |
| 335 | 556 | ||
| @@ -349,7 +570,7 @@ static int job_ready(void *priv) | |||
| 349 | 570 | ||
| 350 | if (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) < ctx->translen | 571 | if (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) < ctx->translen |
| 351 | || v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx) < ctx->translen) { | 572 | || v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx) < ctx->translen) { |
| 352 | dprintk(ctx->dev, "Not enough buffers available\n"); | 573 | dprintk(ctx->dev, 1, "Not enough buffers available\n"); |
| 353 | return 0; | 574 | return 0; |
| 354 | } | 575 | } |
| 355 | 576 | ||
| @@ -373,7 +594,6 @@ static void job_abort(void *priv) | |||
| 373 | static void device_run(void *priv) | 594 | static void device_run(void *priv) |
| 374 | { | 595 | { |
| 375 | struct vim2m_ctx *ctx = priv; | 596 | struct vim2m_ctx *ctx = priv; |
| 376 | struct vim2m_dev *dev = ctx->dev; | ||
| 377 | struct vb2_v4l2_buffer *src_buf, *dst_buf; | 597 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 378 | 598 | ||
| 379 | src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); | 599 | src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); |
| @@ -390,37 +610,38 @@ static void device_run(void *priv) | |||
| 390 | &ctx->hdl); | 610 | &ctx->hdl); |
| 391 | 611 | ||
| 392 | /* Run delayed work, which simulates a hardware irq */ | 612 | /* Run delayed work, which simulates a hardware irq */ |
| 393 | schedule_delayed_work(&dev->work_run, msecs_to_jiffies(ctx->transtime)); | 613 | schedule_delayed_work(&ctx->work_run, msecs_to_jiffies(ctx->transtime)); |
| 394 | } | 614 | } |
| 395 | 615 | ||
| 396 | static void device_work(struct work_struct *w) | 616 | static void device_work(struct work_struct *w) |
| 397 | { | 617 | { |
| 398 | struct vim2m_dev *vim2m_dev = | ||
| 399 | container_of(w, struct vim2m_dev, work_run.work); | ||
| 400 | struct vim2m_ctx *curr_ctx; | 618 | struct vim2m_ctx *curr_ctx; |
| 619 | struct vim2m_dev *vim2m_dev; | ||
| 401 | struct vb2_v4l2_buffer *src_vb, *dst_vb; | 620 | struct vb2_v4l2_buffer *src_vb, *dst_vb; |
| 402 | unsigned long flags; | 621 | unsigned long flags; |
| 403 | 622 | ||
| 404 | curr_ctx = v4l2_m2m_get_curr_priv(vim2m_dev->m2m_dev); | 623 | curr_ctx = container_of(w, struct vim2m_ctx, work_run.work); |
| 405 | 624 | ||
| 406 | if (NULL == curr_ctx) { | 625 | if (!curr_ctx) { |
| 407 | pr_err("Instance released before the end of transaction\n"); | 626 | pr_err("Instance released before the end of transaction\n"); |
| 408 | return; | 627 | return; |
| 409 | } | 628 | } |
| 410 | 629 | ||
| 630 | vim2m_dev = curr_ctx->dev; | ||
| 631 | |||
| 411 | src_vb = v4l2_m2m_src_buf_remove(curr_ctx->fh.m2m_ctx); | 632 | src_vb = v4l2_m2m_src_buf_remove(curr_ctx->fh.m2m_ctx); |
| 412 | dst_vb = v4l2_m2m_dst_buf_remove(curr_ctx->fh.m2m_ctx); | 633 | dst_vb = v4l2_m2m_dst_buf_remove(curr_ctx->fh.m2m_ctx); |
| 413 | 634 | ||
| 414 | curr_ctx->num_processed++; | 635 | curr_ctx->num_processed++; |
| 415 | 636 | ||
| 416 | spin_lock_irqsave(&vim2m_dev->irqlock, flags); | 637 | spin_lock_irqsave(&curr_ctx->irqlock, flags); |
| 417 | v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE); | 638 | v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE); |
| 418 | v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE); | 639 | v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE); |
| 419 | spin_unlock_irqrestore(&vim2m_dev->irqlock, flags); | 640 | spin_unlock_irqrestore(&curr_ctx->irqlock, flags); |
| 420 | 641 | ||
| 421 | if (curr_ctx->num_processed == curr_ctx->translen | 642 | if (curr_ctx->num_processed == curr_ctx->translen |
| 422 | || curr_ctx->aborting) { | 643 | || curr_ctx->aborting) { |
| 423 | dprintk(curr_ctx->dev, "Finishing transaction\n"); | 644 | dprintk(curr_ctx->dev, 2, "Finishing capture buffer fill\n"); |
| 424 | curr_ctx->num_processed = 0; | 645 | curr_ctx->num_processed = 0; |
| 425 | v4l2_m2m_job_finish(vim2m_dev->m2m_dev, curr_ctx->fh.m2m_ctx); | 646 | v4l2_m2m_job_finish(vim2m_dev->m2m_dev, curr_ctx->fh.m2m_ctx); |
| 426 | } else { | 647 | } else { |
| @@ -437,7 +658,7 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 437 | strncpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver) - 1); | 658 | strncpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver) - 1); |
| 438 | strncpy(cap->card, MEM2MEM_NAME, sizeof(cap->card) - 1); | 659 | strncpy(cap->card, MEM2MEM_NAME, sizeof(cap->card) - 1); |
| 439 | snprintf(cap->bus_info, sizeof(cap->bus_info), | 660 | snprintf(cap->bus_info, sizeof(cap->bus_info), |
| 440 | "platform:%s", MEM2MEM_NAME); | 661 | "platform:%s", MEM2MEM_NAME); |
| 441 | return 0; | 662 | return 0; |
| 442 | } | 663 | } |
| 443 | 664 | ||
| @@ -453,8 +674,10 @@ static int enum_fmt(struct v4l2_fmtdesc *f, u32 type) | |||
| 453 | /* index-th format of type type found ? */ | 674 | /* index-th format of type type found ? */ |
| 454 | if (num == f->index) | 675 | if (num == f->index) |
| 455 | break; | 676 | break; |
| 456 | /* Correct type but haven't reached our index yet, | 677 | /* |
| 457 | * just increment per-type index */ | 678 | * Correct type but haven't reached our index yet, |
| 679 | * just increment per-type index | ||
| 680 | */ | ||
| 458 | ++num; | 681 | ++num; |
| 459 | } | 682 | } |
| 460 | } | 683 | } |
| @@ -482,6 +705,27 @@ static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, | |||
| 482 | return enum_fmt(f, MEM2MEM_OUTPUT); | 705 | return enum_fmt(f, MEM2MEM_OUTPUT); |
| 483 | } | 706 | } |
| 484 | 707 | ||
| 708 | static int vidioc_enum_framesizes(struct file *file, void *priv, | ||
| 709 | struct v4l2_frmsizeenum *fsize) | ||
| 710 | { | ||
| 711 | if (fsize->index != 0) | ||
| 712 | return -EINVAL; | ||
| 713 | |||
| 714 | if (!find_format(fsize->pixel_format)) | ||
| 715 | return -EINVAL; | ||
| 716 | |||
| 717 | fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; | ||
| 718 | fsize->stepwise.min_width = MIN_W; | ||
| 719 | fsize->stepwise.min_height = MIN_H; | ||
| 720 | fsize->stepwise.max_width = MAX_W; | ||
| 721 | fsize->stepwise.max_height = MAX_H; | ||
| 722 | |||
| 723 | get_alignment(fsize->pixel_format, | ||
| 724 | &fsize->stepwise.step_width, | ||
| 725 | &fsize->stepwise.step_height); | ||
| 726 | return 0; | ||
| 727 | } | ||
| 728 | |||
| 485 | static int vidioc_g_fmt(struct vim2m_ctx *ctx, struct v4l2_format *f) | 729 | static int vidioc_g_fmt(struct vim2m_ctx *ctx, struct v4l2_format *f) |
| 486 | { | 730 | { |
| 487 | struct vb2_queue *vq; | 731 | struct vb2_queue *vq; |
| @@ -492,6 +736,8 @@ static int vidioc_g_fmt(struct vim2m_ctx *ctx, struct v4l2_format *f) | |||
| 492 | return -EINVAL; | 736 | return -EINVAL; |
| 493 | 737 | ||
| 494 | q_data = get_q_data(ctx, f->type); | 738 | q_data = get_q_data(ctx, f->type); |
| 739 | if (!q_data) | ||
| 740 | return -EINVAL; | ||
| 495 | 741 | ||
| 496 | f->fmt.pix.width = q_data->width; | 742 | f->fmt.pix.width = q_data->width; |
| 497 | f->fmt.pix.height = q_data->height; | 743 | f->fmt.pix.height = q_data->height; |
| @@ -521,8 +767,11 @@ static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, | |||
| 521 | 767 | ||
| 522 | static int vidioc_try_fmt(struct v4l2_format *f, struct vim2m_fmt *fmt) | 768 | static int vidioc_try_fmt(struct v4l2_format *f, struct vim2m_fmt *fmt) |
| 523 | { | 769 | { |
| 524 | /* V4L2 specification suggests the driver corrects the format struct | 770 | int walign, halign; |
| 525 | * if any of the dimensions is unsupported */ | 771 | /* |
| 772 | * V4L2 specification specifies the driver corrects the | ||
| 773 | * format struct if any of the dimensions is unsupported | ||
| 774 | */ | ||
| 526 | if (f->fmt.pix.height < MIN_H) | 775 | if (f->fmt.pix.height < MIN_H) |
| 527 | f->fmt.pix.height = MIN_H; | 776 | f->fmt.pix.height = MIN_H; |
| 528 | else if (f->fmt.pix.height > MAX_H) | 777 | else if (f->fmt.pix.height > MAX_H) |
| @@ -533,7 +782,9 @@ static int vidioc_try_fmt(struct v4l2_format *f, struct vim2m_fmt *fmt) | |||
| 533 | else if (f->fmt.pix.width > MAX_W) | 782 | else if (f->fmt.pix.width > MAX_W) |
| 534 | f->fmt.pix.width = MAX_W; | 783 | f->fmt.pix.width = MAX_W; |
| 535 | 784 | ||
| 536 | f->fmt.pix.width &= ~DIM_ALIGN_MASK; | 785 | get_alignment(f->fmt.pix.pixelformat, &walign, &halign); |
| 786 | f->fmt.pix.width &= ~(walign - 1); | ||
| 787 | f->fmt.pix.height &= ~(halign - 1); | ||
| 537 | f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3; | 788 | f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3; |
| 538 | f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline; | 789 | f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline; |
| 539 | f->fmt.pix.field = V4L2_FIELD_NONE; | 790 | f->fmt.pix.field = V4L2_FIELD_NONE; |
| @@ -547,10 +798,10 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, | |||
| 547 | struct vim2m_fmt *fmt; | 798 | struct vim2m_fmt *fmt; |
| 548 | struct vim2m_ctx *ctx = file2ctx(file); | 799 | struct vim2m_ctx *ctx = file2ctx(file); |
| 549 | 800 | ||
| 550 | fmt = find_format(f); | 801 | fmt = find_format(f->fmt.pix.pixelformat); |
| 551 | if (!fmt) { | 802 | if (!fmt) { |
| 552 | f->fmt.pix.pixelformat = formats[0].fourcc; | 803 | f->fmt.pix.pixelformat = formats[0].fourcc; |
| 553 | fmt = find_format(f); | 804 | fmt = find_format(f->fmt.pix.pixelformat); |
| 554 | } | 805 | } |
| 555 | if (!(fmt->types & MEM2MEM_CAPTURE)) { | 806 | if (!(fmt->types & MEM2MEM_CAPTURE)) { |
| 556 | v4l2_err(&ctx->dev->v4l2_dev, | 807 | v4l2_err(&ctx->dev->v4l2_dev, |
| @@ -572,10 +823,10 @@ static int vidioc_try_fmt_vid_out(struct file *file, void *priv, | |||
| 572 | struct vim2m_fmt *fmt; | 823 | struct vim2m_fmt *fmt; |
| 573 | struct vim2m_ctx *ctx = file2ctx(file); | 824 | struct vim2m_ctx *ctx = file2ctx(file); |
| 574 | 825 | ||
| 575 | fmt = find_format(f); | 826 | fmt = find_format(f->fmt.pix.pixelformat); |
| 576 | if (!fmt) { | 827 | if (!fmt) { |
| 577 | f->fmt.pix.pixelformat = formats[0].fourcc; | 828 | f->fmt.pix.pixelformat = formats[0].fourcc; |
| 578 | fmt = find_format(f); | 829 | fmt = find_format(f->fmt.pix.pixelformat); |
| 579 | } | 830 | } |
| 580 | if (!(fmt->types & MEM2MEM_OUTPUT)) { | 831 | if (!(fmt->types & MEM2MEM_OUTPUT)) { |
| 581 | v4l2_err(&ctx->dev->v4l2_dev, | 832 | v4l2_err(&ctx->dev->v4l2_dev, |
| @@ -607,15 +858,20 @@ static int vidioc_s_fmt(struct vim2m_ctx *ctx, struct v4l2_format *f) | |||
| 607 | return -EBUSY; | 858 | return -EBUSY; |
| 608 | } | 859 | } |
| 609 | 860 | ||
| 610 | q_data->fmt = find_format(f); | 861 | q_data->fmt = find_format(f->fmt.pix.pixelformat); |
| 611 | q_data->width = f->fmt.pix.width; | 862 | q_data->width = f->fmt.pix.width; |
| 612 | q_data->height = f->fmt.pix.height; | 863 | q_data->height = f->fmt.pix.height; |
| 613 | q_data->sizeimage = q_data->width * q_data->height | 864 | q_data->sizeimage = q_data->width * q_data->height |
| 614 | * q_data->fmt->depth >> 3; | 865 | * q_data->fmt->depth >> 3; |
| 615 | 866 | ||
| 616 | dprintk(ctx->dev, | 867 | dprintk(ctx->dev, 1, |
| 617 | "Setting format for type %d, wxh: %dx%d, fmt: %d\n", | 868 | "Format for type %s: %dx%d (%d bpp), fmt: %c%c%c%c\n", |
| 618 | f->type, q_data->width, q_data->height, q_data->fmt->fourcc); | 869 | type_name(f->type), q_data->width, q_data->height, |
| 870 | q_data->fmt->depth, | ||
| 871 | (q_data->fmt->fourcc & 0xff), | ||
| 872 | (q_data->fmt->fourcc >> 8) & 0xff, | ||
| 873 | (q_data->fmt->fourcc >> 16) & 0xff, | ||
| 874 | (q_data->fmt->fourcc >> 24) & 0xff); | ||
| 619 | 875 | ||
| 620 | return 0; | 876 | return 0; |
| 621 | } | 877 | } |
| @@ -674,6 +930,8 @@ static int vim2m_s_ctrl(struct v4l2_ctrl *ctrl) | |||
| 674 | 930 | ||
| 675 | case V4L2_CID_TRANS_TIME_MSEC: | 931 | case V4L2_CID_TRANS_TIME_MSEC: |
| 676 | ctx->transtime = ctrl->val; | 932 | ctx->transtime = ctrl->val; |
| 933 | if (ctx->transtime < 1) | ||
| 934 | ctx->transtime = 1; | ||
| 677 | break; | 935 | break; |
| 678 | 936 | ||
| 679 | case V4L2_CID_TRANS_NUM_BUFS: | 937 | case V4L2_CID_TRANS_NUM_BUFS: |
| @@ -692,11 +950,11 @@ static const struct v4l2_ctrl_ops vim2m_ctrl_ops = { | |||
| 692 | .s_ctrl = vim2m_s_ctrl, | 950 | .s_ctrl = vim2m_s_ctrl, |
| 693 | }; | 951 | }; |
| 694 | 952 | ||
| 695 | |||
| 696 | static const struct v4l2_ioctl_ops vim2m_ioctl_ops = { | 953 | static const struct v4l2_ioctl_ops vim2m_ioctl_ops = { |
| 697 | .vidioc_querycap = vidioc_querycap, | 954 | .vidioc_querycap = vidioc_querycap, |
| 698 | 955 | ||
| 699 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, | 956 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, |
| 957 | .vidioc_enum_framesizes = vidioc_enum_framesizes, | ||
| 700 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, | 958 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, |
| 701 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, | 959 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, |
| 702 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, | 960 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, |
| @@ -721,20 +979,23 @@ static const struct v4l2_ioctl_ops vim2m_ioctl_ops = { | |||
| 721 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | 979 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, |
| 722 | }; | 980 | }; |
| 723 | 981 | ||
| 724 | |||
| 725 | /* | 982 | /* |
| 726 | * Queue operations | 983 | * Queue operations |
| 727 | */ | 984 | */ |
| 728 | 985 | ||
| 729 | static int vim2m_queue_setup(struct vb2_queue *vq, | 986 | static int vim2m_queue_setup(struct vb2_queue *vq, |
| 730 | unsigned int *nbuffers, unsigned int *nplanes, | 987 | unsigned int *nbuffers, |
| 731 | unsigned int sizes[], struct device *alloc_devs[]) | 988 | unsigned int *nplanes, |
| 989 | unsigned int sizes[], | ||
| 990 | struct device *alloc_devs[]) | ||
| 732 | { | 991 | { |
| 733 | struct vim2m_ctx *ctx = vb2_get_drv_priv(vq); | 992 | struct vim2m_ctx *ctx = vb2_get_drv_priv(vq); |
| 734 | struct vim2m_q_data *q_data; | 993 | struct vim2m_q_data *q_data; |
| 735 | unsigned int size, count = *nbuffers; | 994 | unsigned int size, count = *nbuffers; |
| 736 | 995 | ||
| 737 | q_data = get_q_data(ctx, vq->type); | 996 | q_data = get_q_data(ctx, vq->type); |
| 997 | if (!q_data) | ||
| 998 | return -EINVAL; | ||
| 738 | 999 | ||
| 739 | size = q_data->width * q_data->height * q_data->fmt->depth >> 3; | 1000 | size = q_data->width * q_data->height * q_data->fmt->depth >> 3; |
| 740 | 1001 | ||
| @@ -748,33 +1009,42 @@ static int vim2m_queue_setup(struct vb2_queue *vq, | |||
| 748 | *nplanes = 1; | 1009 | *nplanes = 1; |
| 749 | sizes[0] = size; | 1010 | sizes[0] = size; |
| 750 | 1011 | ||
| 751 | dprintk(ctx->dev, "get %d buffer(s) of size %d each.\n", count, size); | 1012 | dprintk(ctx->dev, 1, "%s: get %d buffer(s) of size %d each.\n", |
| 1013 | type_name(vq->type), count, size); | ||
| 752 | 1014 | ||
| 753 | return 0; | 1015 | return 0; |
| 754 | } | 1016 | } |
| 755 | 1017 | ||
| 756 | static int vim2m_buf_prepare(struct vb2_buffer *vb) | 1018 | static int vim2m_buf_out_validate(struct vb2_buffer *vb) |
| 757 | { | 1019 | { |
| 758 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | 1020 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 759 | struct vim2m_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); | 1021 | struct vim2m_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); |
| 1022 | |||
| 1023 | if (vbuf->field == V4L2_FIELD_ANY) | ||
| 1024 | vbuf->field = V4L2_FIELD_NONE; | ||
| 1025 | if (vbuf->field != V4L2_FIELD_NONE) { | ||
| 1026 | dprintk(ctx->dev, 1, "%s field isn't supported\n", __func__); | ||
| 1027 | return -EINVAL; | ||
| 1028 | } | ||
| 1029 | |||
| 1030 | return 0; | ||
| 1031 | } | ||
| 1032 | |||
| 1033 | static int vim2m_buf_prepare(struct vb2_buffer *vb) | ||
| 1034 | { | ||
| 1035 | struct vim2m_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); | ||
| 760 | struct vim2m_q_data *q_data; | 1036 | struct vim2m_q_data *q_data; |
| 761 | 1037 | ||
| 762 | dprintk(ctx->dev, "type: %d\n", vb->vb2_queue->type); | 1038 | dprintk(ctx->dev, 2, "type: %s\n", type_name(vb->vb2_queue->type)); |
| 763 | 1039 | ||
| 764 | q_data = get_q_data(ctx, vb->vb2_queue->type); | 1040 | q_data = get_q_data(ctx, vb->vb2_queue->type); |
| 765 | if (V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) { | 1041 | if (!q_data) |
| 766 | if (vbuf->field == V4L2_FIELD_ANY) | 1042 | return -EINVAL; |
| 767 | vbuf->field = V4L2_FIELD_NONE; | ||
| 768 | if (vbuf->field != V4L2_FIELD_NONE) { | ||
| 769 | dprintk(ctx->dev, "%s field isn't supported\n", | ||
| 770 | __func__); | ||
| 771 | return -EINVAL; | ||
| 772 | } | ||
| 773 | } | ||
| 774 | |||
| 775 | if (vb2_plane_size(vb, 0) < q_data->sizeimage) { | 1043 | if (vb2_plane_size(vb, 0) < q_data->sizeimage) { |
| 776 | dprintk(ctx->dev, "%s data will not fit into plane (%lu < %lu)\n", | 1044 | dprintk(ctx->dev, 1, |
| 777 | __func__, vb2_plane_size(vb, 0), (long)q_data->sizeimage); | 1045 | "%s data will not fit into plane (%lu < %lu)\n", |
| 1046 | __func__, vb2_plane_size(vb, 0), | ||
| 1047 | (long)q_data->sizeimage); | ||
| 778 | return -EINVAL; | 1048 | return -EINVAL; |
| 779 | } | 1049 | } |
| 780 | 1050 | ||
| @@ -791,11 +1061,14 @@ static void vim2m_buf_queue(struct vb2_buffer *vb) | |||
| 791 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); | 1061 | v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); |
| 792 | } | 1062 | } |
| 793 | 1063 | ||
| 794 | static int vim2m_start_streaming(struct vb2_queue *q, unsigned count) | 1064 | static int vim2m_start_streaming(struct vb2_queue *q, unsigned int count) |
| 795 | { | 1065 | { |
| 796 | struct vim2m_ctx *ctx = vb2_get_drv_priv(q); | 1066 | struct vim2m_ctx *ctx = vb2_get_drv_priv(q); |
| 797 | struct vim2m_q_data *q_data = get_q_data(ctx, q->type); | 1067 | struct vim2m_q_data *q_data = get_q_data(ctx, q->type); |
| 798 | 1068 | ||
| 1069 | if (!q_data) | ||
| 1070 | return -EINVAL; | ||
| 1071 | |||
| 799 | q_data->sequence = 0; | 1072 | q_data->sequence = 0; |
| 800 | return 0; | 1073 | return 0; |
| 801 | } | 1074 | } |
| @@ -803,25 +1076,23 @@ static int vim2m_start_streaming(struct vb2_queue *q, unsigned count) | |||
| 803 | static void vim2m_stop_streaming(struct vb2_queue *q) | 1076 | static void vim2m_stop_streaming(struct vb2_queue *q) |
| 804 | { | 1077 | { |
| 805 | struct vim2m_ctx *ctx = vb2_get_drv_priv(q); | 1078 | struct vim2m_ctx *ctx = vb2_get_drv_priv(q); |
| 806 | struct vim2m_dev *dev = ctx->dev; | ||
| 807 | struct vb2_v4l2_buffer *vbuf; | 1079 | struct vb2_v4l2_buffer *vbuf; |
| 808 | unsigned long flags; | 1080 | unsigned long flags; |
| 809 | 1081 | ||
| 810 | if (v4l2_m2m_get_curr_priv(dev->m2m_dev) == ctx) | 1082 | cancel_delayed_work_sync(&ctx->work_run); |
| 811 | cancel_delayed_work_sync(&dev->work_run); | ||
| 812 | 1083 | ||
| 813 | for (;;) { | 1084 | for (;;) { |
| 814 | if (V4L2_TYPE_IS_OUTPUT(q->type)) | 1085 | if (V4L2_TYPE_IS_OUTPUT(q->type)) |
| 815 | vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); | 1086 | vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); |
| 816 | else | 1087 | else |
| 817 | vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); | 1088 | vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); |
| 818 | if (vbuf == NULL) | 1089 | if (!vbuf) |
| 819 | return; | 1090 | return; |
| 820 | v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, | 1091 | v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, |
| 821 | &ctx->hdl); | 1092 | &ctx->hdl); |
| 822 | spin_lock_irqsave(&ctx->dev->irqlock, flags); | 1093 | spin_lock_irqsave(&ctx->irqlock, flags); |
| 823 | v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); | 1094 | v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); |
| 824 | spin_unlock_irqrestore(&ctx->dev->irqlock, flags); | 1095 | spin_unlock_irqrestore(&ctx->irqlock, flags); |
| 825 | } | 1096 | } |
| 826 | } | 1097 | } |
| 827 | 1098 | ||
| @@ -834,6 +1105,7 @@ static void vim2m_buf_request_complete(struct vb2_buffer *vb) | |||
| 834 | 1105 | ||
| 835 | static const struct vb2_ops vim2m_qops = { | 1106 | static const struct vb2_ops vim2m_qops = { |
| 836 | .queue_setup = vim2m_queue_setup, | 1107 | .queue_setup = vim2m_queue_setup, |
| 1108 | .buf_out_validate = vim2m_buf_out_validate, | ||
| 837 | .buf_prepare = vim2m_buf_prepare, | 1109 | .buf_prepare = vim2m_buf_prepare, |
| 838 | .buf_queue = vim2m_buf_queue, | 1110 | .buf_queue = vim2m_buf_queue, |
| 839 | .start_streaming = vim2m_start_streaming, | 1111 | .start_streaming = vim2m_start_streaming, |
| @@ -843,7 +1115,8 @@ static const struct vb2_ops vim2m_qops = { | |||
| 843 | .buf_request_complete = vim2m_buf_request_complete, | 1115 | .buf_request_complete = vim2m_buf_request_complete, |
| 844 | }; | 1116 | }; |
| 845 | 1117 | ||
| 846 | static int queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) | 1118 | static int queue_init(void *priv, struct vb2_queue *src_vq, |
| 1119 | struct vb2_queue *dst_vq) | ||
| 847 | { | 1120 | { |
| 848 | struct vim2m_ctx *ctx = priv; | 1121 | struct vim2m_ctx *ctx = priv; |
| 849 | int ret; | 1122 | int ret; |
| @@ -855,7 +1128,7 @@ static int queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *ds | |||
| 855 | src_vq->ops = &vim2m_qops; | 1128 | src_vq->ops = &vim2m_qops; |
| 856 | src_vq->mem_ops = &vb2_vmalloc_memops; | 1129 | src_vq->mem_ops = &vb2_vmalloc_memops; |
| 857 | src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; | 1130 | src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; |
| 858 | src_vq->lock = &ctx->dev->dev_mutex; | 1131 | src_vq->lock = &ctx->vb_mutex; |
| 859 | src_vq->supports_requests = true; | 1132 | src_vq->supports_requests = true; |
| 860 | 1133 | ||
| 861 | ret = vb2_queue_init(src_vq); | 1134 | ret = vb2_queue_init(src_vq); |
| @@ -869,17 +1142,16 @@ static int queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *ds | |||
| 869 | dst_vq->ops = &vim2m_qops; | 1142 | dst_vq->ops = &vim2m_qops; |
| 870 | dst_vq->mem_ops = &vb2_vmalloc_memops; | 1143 | dst_vq->mem_ops = &vb2_vmalloc_memops; |
| 871 | dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; | 1144 | dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; |
| 872 | dst_vq->lock = &ctx->dev->dev_mutex; | 1145 | dst_vq->lock = &ctx->vb_mutex; |
| 873 | 1146 | ||
| 874 | return vb2_queue_init(dst_vq); | 1147 | return vb2_queue_init(dst_vq); |
| 875 | } | 1148 | } |
| 876 | 1149 | ||
| 877 | static const struct v4l2_ctrl_config vim2m_ctrl_trans_time_msec = { | 1150 | static struct v4l2_ctrl_config vim2m_ctrl_trans_time_msec = { |
| 878 | .ops = &vim2m_ctrl_ops, | 1151 | .ops = &vim2m_ctrl_ops, |
| 879 | .id = V4L2_CID_TRANS_TIME_MSEC, | 1152 | .id = V4L2_CID_TRANS_TIME_MSEC, |
| 880 | .name = "Transaction Time (msec)", | 1153 | .name = "Transaction Time (msec)", |
| 881 | .type = V4L2_CTRL_TYPE_INTEGER, | 1154 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 882 | .def = MEM2MEM_DEF_TRANSTIME, | ||
| 883 | .min = 1, | 1155 | .min = 1, |
| 884 | .max = 10001, | 1156 | .max = 10001, |
| 885 | .step = 1, | 1157 | .step = 1, |
| @@ -921,6 +1193,8 @@ static int vim2m_open(struct file *file) | |||
| 921 | v4l2_ctrl_handler_init(hdl, 4); | 1193 | v4l2_ctrl_handler_init(hdl, 4); |
| 922 | v4l2_ctrl_new_std(hdl, &vim2m_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); | 1194 | v4l2_ctrl_new_std(hdl, &vim2m_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); |
| 923 | v4l2_ctrl_new_std(hdl, &vim2m_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); | 1195 | v4l2_ctrl_new_std(hdl, &vim2m_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); |
| 1196 | |||
| 1197 | vim2m_ctrl_trans_time_msec.def = default_transtime; | ||
| 924 | v4l2_ctrl_new_custom(hdl, &vim2m_ctrl_trans_time_msec, NULL); | 1198 | v4l2_ctrl_new_custom(hdl, &vim2m_ctrl_trans_time_msec, NULL); |
| 925 | v4l2_ctrl_new_custom(hdl, &vim2m_ctrl_trans_num_bufs, NULL); | 1199 | v4l2_ctrl_new_custom(hdl, &vim2m_ctrl_trans_num_bufs, NULL); |
| 926 | if (hdl->error) { | 1200 | if (hdl->error) { |
| @@ -944,6 +1218,10 @@ static int vim2m_open(struct file *file) | |||
| 944 | 1218 | ||
| 945 | ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init); | 1219 | ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init); |
| 946 | 1220 | ||
| 1221 | mutex_init(&ctx->vb_mutex); | ||
| 1222 | spin_lock_init(&ctx->irqlock); | ||
| 1223 | INIT_DELAYED_WORK(&ctx->work_run, device_work); | ||
| 1224 | |||
| 947 | if (IS_ERR(ctx->fh.m2m_ctx)) { | 1225 | if (IS_ERR(ctx->fh.m2m_ctx)) { |
| 948 | rc = PTR_ERR(ctx->fh.m2m_ctx); | 1226 | rc = PTR_ERR(ctx->fh.m2m_ctx); |
| 949 | 1227 | ||
| @@ -956,7 +1234,7 @@ static int vim2m_open(struct file *file) | |||
| 956 | v4l2_fh_add(&ctx->fh); | 1234 | v4l2_fh_add(&ctx->fh); |
| 957 | atomic_inc(&dev->num_inst); | 1235 | atomic_inc(&dev->num_inst); |
| 958 | 1236 | ||
| 959 | dprintk(dev, "Created instance: %p, m2m_ctx: %p\n", | 1237 | dprintk(dev, 1, "Created instance: %p, m2m_ctx: %p\n", |
| 960 | ctx, ctx->fh.m2m_ctx); | 1238 | ctx, ctx->fh.m2m_ctx); |
| 961 | 1239 | ||
| 962 | open_unlock: | 1240 | open_unlock: |
| @@ -969,7 +1247,7 @@ static int vim2m_release(struct file *file) | |||
| 969 | struct vim2m_dev *dev = video_drvdata(file); | 1247 | struct vim2m_dev *dev = video_drvdata(file); |
| 970 | struct vim2m_ctx *ctx = file2ctx(file); | 1248 | struct vim2m_ctx *ctx = file2ctx(file); |
| 971 | 1249 | ||
| 972 | dprintk(dev, "Releasing instance %p\n", ctx); | 1250 | dprintk(dev, 1, "Releasing instance %p\n", ctx); |
| 973 | 1251 | ||
| 974 | v4l2_fh_del(&ctx->fh); | 1252 | v4l2_fh_del(&ctx->fh); |
| 975 | v4l2_fh_exit(&ctx->fh); | 1253 | v4l2_fh_exit(&ctx->fh); |
| @@ -1024,8 +1302,6 @@ static int vim2m_probe(struct platform_device *pdev) | |||
| 1024 | if (!dev) | 1302 | if (!dev) |
| 1025 | return -ENOMEM; | 1303 | return -ENOMEM; |
| 1026 | 1304 | ||
| 1027 | spin_lock_init(&dev->irqlock); | ||
| 1028 | |||
| 1029 | ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); | 1305 | ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); |
| 1030 | if (ret) | 1306 | if (ret) |
| 1031 | return ret; | 1307 | return ret; |
| @@ -1037,7 +1313,6 @@ static int vim2m_probe(struct platform_device *pdev) | |||
| 1037 | vfd = &dev->vfd; | 1313 | vfd = &dev->vfd; |
| 1038 | vfd->lock = &dev->dev_mutex; | 1314 | vfd->lock = &dev->dev_mutex; |
| 1039 | vfd->v4l2_dev = &dev->v4l2_dev; | 1315 | vfd->v4l2_dev = &dev->v4l2_dev; |
| 1040 | INIT_DELAYED_WORK(&dev->work_run, device_work); | ||
| 1041 | 1316 | ||
| 1042 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0); | 1317 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0); |
| 1043 | if (ret) { | 1318 | if (ret) { |
| @@ -1047,7 +1322,7 @@ static int vim2m_probe(struct platform_device *pdev) | |||
| 1047 | 1322 | ||
| 1048 | video_set_drvdata(vfd, dev); | 1323 | video_set_drvdata(vfd, dev); |
| 1049 | v4l2_info(&dev->v4l2_dev, | 1324 | v4l2_info(&dev->v4l2_dev, |
| 1050 | "Device registered as /dev/video%d\n", vfd->num); | 1325 | "Device registered as /dev/video%d\n", vfd->num); |
| 1051 | 1326 | ||
| 1052 | platform_set_drvdata(pdev, dev); | 1327 | platform_set_drvdata(pdev, dev); |
| 1053 | 1328 | ||
| @@ -1061,12 +1336,14 @@ static int vim2m_probe(struct platform_device *pdev) | |||
| 1061 | #ifdef CONFIG_MEDIA_CONTROLLER | 1336 | #ifdef CONFIG_MEDIA_CONTROLLER |
| 1062 | dev->mdev.dev = &pdev->dev; | 1337 | dev->mdev.dev = &pdev->dev; |
| 1063 | strscpy(dev->mdev.model, "vim2m", sizeof(dev->mdev.model)); | 1338 | strscpy(dev->mdev.model, "vim2m", sizeof(dev->mdev.model)); |
| 1339 | strscpy(dev->mdev.bus_info, "platform:vim2m", | ||
| 1340 | sizeof(dev->mdev.bus_info)); | ||
| 1064 | media_device_init(&dev->mdev); | 1341 | media_device_init(&dev->mdev); |
| 1065 | dev->mdev.ops = &m2m_media_ops; | 1342 | dev->mdev.ops = &m2m_media_ops; |
| 1066 | dev->v4l2_dev.mdev = &dev->mdev; | 1343 | dev->v4l2_dev.mdev = &dev->mdev; |
| 1067 | 1344 | ||
| 1068 | ret = v4l2_m2m_register_media_controller(dev->m2m_dev, | 1345 | ret = v4l2_m2m_register_media_controller(dev->m2m_dev, vfd, |
| 1069 | vfd, MEDIA_ENT_F_PROC_VIDEO_SCALER); | 1346 | MEDIA_ENT_F_PROC_VIDEO_SCALER); |
| 1070 | if (ret) { | 1347 | if (ret) { |
| 1071 | v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem media controller\n"); | 1348 | v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem media controller\n"); |
| 1072 | goto unreg_m2m; | 1349 | goto unreg_m2m; |
diff --git a/drivers/media/platform/vimc/Makefile b/drivers/media/platform/vimc/Makefile index 4b2e3de7856e..c4fc8e7d365a 100644 --- a/drivers/media/platform/vimc/Makefile +++ b/drivers/media/platform/vimc/Makefile | |||
| @@ -5,6 +5,7 @@ vimc_common-objs := vimc-common.o | |||
| 5 | vimc_debayer-objs := vimc-debayer.o | 5 | vimc_debayer-objs := vimc-debayer.o |
| 6 | vimc_scaler-objs := vimc-scaler.o | 6 | vimc_scaler-objs := vimc-scaler.o |
| 7 | vimc_sensor-objs := vimc-sensor.o | 7 | vimc_sensor-objs := vimc-sensor.o |
| 8 | vimc_streamer-objs := vimc-streamer.o | ||
| 8 | 9 | ||
| 9 | obj-$(CONFIG_VIDEO_VIMC) += vimc.o vimc_capture.o vimc_common.o vimc-debayer.o \ | 10 | obj-$(CONFIG_VIDEO_VIMC) += vimc.o vimc_capture.o vimc_common.o vimc-debayer.o \ |
| 10 | vimc_scaler.o vimc_sensor.o | 11 | vimc_scaler.o vimc_sensor.o vimc_streamer.o |
diff --git a/drivers/media/platform/vimc/vimc-capture.c b/drivers/media/platform/vimc/vimc-capture.c index 3f7e9ed56633..ea869631a3f6 100644 --- a/drivers/media/platform/vimc/vimc-capture.c +++ b/drivers/media/platform/vimc/vimc-capture.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include <media/videobuf2-vmalloc.h> | 24 | #include <media/videobuf2-vmalloc.h> |
| 25 | 25 | ||
| 26 | #include "vimc-common.h" | 26 | #include "vimc-common.h" |
| 27 | #include "vimc-streamer.h" | ||
| 27 | 28 | ||
| 28 | #define VIMC_CAP_DRV_NAME "vimc-capture" | 29 | #define VIMC_CAP_DRV_NAME "vimc-capture" |
| 29 | 30 | ||
| @@ -44,7 +45,7 @@ struct vimc_cap_device { | |||
| 44 | spinlock_t qlock; | 45 | spinlock_t qlock; |
| 45 | struct mutex lock; | 46 | struct mutex lock; |
| 46 | u32 sequence; | 47 | u32 sequence; |
| 47 | struct media_pipeline pipe; | 48 | struct vimc_stream stream; |
| 48 | }; | 49 | }; |
| 49 | 50 | ||
| 50 | static const struct v4l2_pix_format fmt_default = { | 51 | static const struct v4l2_pix_format fmt_default = { |
| @@ -69,12 +70,10 @@ struct vimc_cap_buffer { | |||
| 69 | static int vimc_cap_querycap(struct file *file, void *priv, | 70 | static int vimc_cap_querycap(struct file *file, void *priv, |
| 70 | struct v4l2_capability *cap) | 71 | struct v4l2_capability *cap) |
| 71 | { | 72 | { |
| 72 | struct vimc_cap_device *vcap = video_drvdata(file); | 73 | strscpy(cap->driver, VIMC_PDEV_NAME, sizeof(cap->driver)); |
| 73 | |||
| 74 | strscpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver)); | ||
| 75 | strscpy(cap->card, KBUILD_MODNAME, sizeof(cap->card)); | 74 | strscpy(cap->card, KBUILD_MODNAME, sizeof(cap->card)); |
| 76 | snprintf(cap->bus_info, sizeof(cap->bus_info), | 75 | snprintf(cap->bus_info, sizeof(cap->bus_info), |
| 77 | "platform:%s", vcap->vdev.v4l2_dev->name); | 76 | "platform:%s", VIMC_PDEV_NAME); |
| 78 | 77 | ||
| 79 | return 0; | 78 | return 0; |
| 80 | } | 79 | } |
| @@ -248,14 +247,13 @@ static int vimc_cap_start_streaming(struct vb2_queue *vq, unsigned int count) | |||
| 248 | vcap->sequence = 0; | 247 | vcap->sequence = 0; |
| 249 | 248 | ||
| 250 | /* Start the media pipeline */ | 249 | /* Start the media pipeline */ |
| 251 | ret = media_pipeline_start(entity, &vcap->pipe); | 250 | ret = media_pipeline_start(entity, &vcap->stream.pipe); |
| 252 | if (ret) { | 251 | if (ret) { |
| 253 | vimc_cap_return_all_buffers(vcap, VB2_BUF_STATE_QUEUED); | 252 | vimc_cap_return_all_buffers(vcap, VB2_BUF_STATE_QUEUED); |
| 254 | return ret; | 253 | return ret; |
| 255 | } | 254 | } |
| 256 | 255 | ||
| 257 | /* Enable streaming from the pipe */ | 256 | ret = vimc_streamer_s_stream(&vcap->stream, &vcap->ved, 1); |
| 258 | ret = vimc_pipeline_s_stream(&vcap->vdev.entity, 1); | ||
| 259 | if (ret) { | 257 | if (ret) { |
| 260 | media_pipeline_stop(entity); | 258 | media_pipeline_stop(entity); |
| 261 | vimc_cap_return_all_buffers(vcap, VB2_BUF_STATE_QUEUED); | 259 | vimc_cap_return_all_buffers(vcap, VB2_BUF_STATE_QUEUED); |
| @@ -273,8 +271,7 @@ static void vimc_cap_stop_streaming(struct vb2_queue *vq) | |||
| 273 | { | 271 | { |
| 274 | struct vimc_cap_device *vcap = vb2_get_drv_priv(vq); | 272 | struct vimc_cap_device *vcap = vb2_get_drv_priv(vq); |
| 275 | 273 | ||
| 276 | /* Disable streaming from the pipe */ | 274 | vimc_streamer_s_stream(&vcap->stream, &vcap->ved, 0); |
| 277 | vimc_pipeline_s_stream(&vcap->vdev.entity, 0); | ||
| 278 | 275 | ||
| 279 | /* Stop the media pipeline */ | 276 | /* Stop the media pipeline */ |
| 280 | media_pipeline_stop(&vcap->vdev.entity); | 277 | media_pipeline_stop(&vcap->vdev.entity); |
| @@ -355,8 +352,8 @@ static void vimc_cap_comp_unbind(struct device *comp, struct device *master, | |||
| 355 | kfree(vcap); | 352 | kfree(vcap); |
| 356 | } | 353 | } |
| 357 | 354 | ||
| 358 | static void vimc_cap_process_frame(struct vimc_ent_device *ved, | 355 | static void *vimc_cap_process_frame(struct vimc_ent_device *ved, |
| 359 | struct media_pad *sink, const void *frame) | 356 | const void *frame) |
| 360 | { | 357 | { |
| 361 | struct vimc_cap_device *vcap = container_of(ved, struct vimc_cap_device, | 358 | struct vimc_cap_device *vcap = container_of(ved, struct vimc_cap_device, |
| 362 | ved); | 359 | ved); |
| @@ -370,7 +367,7 @@ static void vimc_cap_process_frame(struct vimc_ent_device *ved, | |||
| 370 | typeof(*vimc_buf), list); | 367 | typeof(*vimc_buf), list); |
| 371 | if (!vimc_buf) { | 368 | if (!vimc_buf) { |
| 372 | spin_unlock(&vcap->qlock); | 369 | spin_unlock(&vcap->qlock); |
| 373 | return; | 370 | return ERR_PTR(-EAGAIN); |
| 374 | } | 371 | } |
| 375 | 372 | ||
| 376 | /* Remove this entry from the list */ | 373 | /* Remove this entry from the list */ |
| @@ -391,6 +388,7 @@ static void vimc_cap_process_frame(struct vimc_ent_device *ved, | |||
| 391 | vb2_set_plane_payload(&vimc_buf->vb2.vb2_buf, 0, | 388 | vb2_set_plane_payload(&vimc_buf->vb2.vb2_buf, 0, |
| 392 | vcap->format.sizeimage); | 389 | vcap->format.sizeimage); |
| 393 | vb2_buffer_done(&vimc_buf->vb2.vb2_buf, VB2_BUF_STATE_DONE); | 390 | vb2_buffer_done(&vimc_buf->vb2.vb2_buf, VB2_BUF_STATE_DONE); |
| 391 | return NULL; | ||
| 394 | } | 392 | } |
| 395 | 393 | ||
| 396 | static int vimc_cap_comp_bind(struct device *comp, struct device *master, | 394 | static int vimc_cap_comp_bind(struct device *comp, struct device *master, |
| @@ -431,7 +429,7 @@ static int vimc_cap_comp_bind(struct device *comp, struct device *master, | |||
| 431 | /* Initialize the vb2 queue */ | 429 | /* Initialize the vb2 queue */ |
| 432 | q = &vcap->queue; | 430 | q = &vcap->queue; |
| 433 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | 431 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 434 | q->io_modes = VB2_MMAP | VB2_DMABUF; | 432 | q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_USERPTR; |
| 435 | q->drv_priv = vcap; | 433 | q->drv_priv = vcap; |
| 436 | q->buf_struct_size = sizeof(struct vimc_cap_buffer); | 434 | q->buf_struct_size = sizeof(struct vimc_cap_buffer); |
| 437 | q->ops = &vimc_cap_qops; | 435 | q->ops = &vimc_cap_qops; |
diff --git a/drivers/media/platform/vimc/vimc-common.c b/drivers/media/platform/vimc/vimc-common.c index 867e24dbd6b5..c1a74bb2df58 100644 --- a/drivers/media/platform/vimc/vimc-common.c +++ b/drivers/media/platform/vimc/vimc-common.c | |||
| @@ -207,41 +207,6 @@ const struct vimc_pix_map *vimc_pix_map_by_pixelformat(u32 pixelformat) | |||
| 207 | } | 207 | } |
| 208 | EXPORT_SYMBOL_GPL(vimc_pix_map_by_pixelformat); | 208 | EXPORT_SYMBOL_GPL(vimc_pix_map_by_pixelformat); |
| 209 | 209 | ||
| 210 | int vimc_propagate_frame(struct media_pad *src, const void *frame) | ||
| 211 | { | ||
| 212 | struct media_link *link; | ||
| 213 | |||
| 214 | if (!(src->flags & MEDIA_PAD_FL_SOURCE)) | ||
| 215 | return -EINVAL; | ||
| 216 | |||
| 217 | /* Send this frame to all sink pads that are direct linked */ | ||
| 218 | list_for_each_entry(link, &src->entity->links, list) { | ||
| 219 | if (link->source == src && | ||
| 220 | (link->flags & MEDIA_LNK_FL_ENABLED)) { | ||
| 221 | struct vimc_ent_device *ved = NULL; | ||
| 222 | struct media_entity *entity = link->sink->entity; | ||
| 223 | |||
| 224 | if (is_media_entity_v4l2_subdev(entity)) { | ||
| 225 | struct v4l2_subdev *sd = | ||
| 226 | container_of(entity, struct v4l2_subdev, | ||
| 227 | entity); | ||
| 228 | ved = v4l2_get_subdevdata(sd); | ||
| 229 | } else if (is_media_entity_v4l2_video_device(entity)) { | ||
| 230 | struct video_device *vdev = | ||
| 231 | container_of(entity, | ||
| 232 | struct video_device, | ||
| 233 | entity); | ||
| 234 | ved = video_get_drvdata(vdev); | ||
| 235 | } | ||
| 236 | if (ved && ved->process_frame) | ||
| 237 | ved->process_frame(ved, link->sink, frame); | ||
| 238 | } | ||
| 239 | } | ||
| 240 | |||
| 241 | return 0; | ||
| 242 | } | ||
| 243 | EXPORT_SYMBOL_GPL(vimc_propagate_frame); | ||
| 244 | |||
| 245 | /* Helper function to allocate and initialize pads */ | 210 | /* Helper function to allocate and initialize pads */ |
| 246 | struct media_pad *vimc_pads_init(u16 num_pads, const unsigned long *pads_flag) | 211 | struct media_pad *vimc_pads_init(u16 num_pads, const unsigned long *pads_flag) |
| 247 | { | 212 | { |
diff --git a/drivers/media/platform/vimc/vimc-common.h b/drivers/media/platform/vimc/vimc-common.h index 2e9981b18166..84539430b5e7 100644 --- a/drivers/media/platform/vimc/vimc-common.h +++ b/drivers/media/platform/vimc/vimc-common.h | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <media/media-device.h> | 22 | #include <media/media-device.h> |
| 23 | #include <media/v4l2-device.h> | 23 | #include <media/v4l2-device.h> |
| 24 | 24 | ||
| 25 | #define VIMC_PDEV_NAME "vimc" | ||
| 26 | |||
| 25 | /* VIMC-specific controls */ | 27 | /* VIMC-specific controls */ |
| 26 | #define VIMC_CID_VIMC_BASE (0x00f00000 | 0xf000) | 28 | #define VIMC_CID_VIMC_BASE (0x00f00000 | 0xf000) |
| 27 | #define VIMC_CID_VIMC_CLASS (0x00f00000 | 1) | 29 | #define VIMC_CID_VIMC_CLASS (0x00f00000 | 1) |
| @@ -113,24 +115,13 @@ struct vimc_pix_map { | |||
| 113 | struct vimc_ent_device { | 115 | struct vimc_ent_device { |
| 114 | struct media_entity *ent; | 116 | struct media_entity *ent; |
| 115 | struct media_pad *pads; | 117 | struct media_pad *pads; |
| 116 | void (*process_frame)(struct vimc_ent_device *ved, | 118 | void * (*process_frame)(struct vimc_ent_device *ved, |
| 117 | struct media_pad *sink, const void *frame); | 119 | const void *frame); |
| 118 | void (*vdev_get_format)(struct vimc_ent_device *ved, | 120 | void (*vdev_get_format)(struct vimc_ent_device *ved, |
| 119 | struct v4l2_pix_format *fmt); | 121 | struct v4l2_pix_format *fmt); |
| 120 | }; | 122 | }; |
| 121 | 123 | ||
| 122 | /** | 124 | /** |
| 123 | * vimc_propagate_frame - propagate a frame through the topology | ||
| 124 | * | ||
| 125 | * @src: the source pad where the frame is being originated | ||
| 126 | * @frame: the frame to be propagated | ||
| 127 | * | ||
| 128 | * This function will call the process_frame callback from the vimc_ent_device | ||
| 129 | * struct of the nodes directly connected to the @src pad | ||
| 130 | */ | ||
| 131 | int vimc_propagate_frame(struct media_pad *src, const void *frame); | ||
| 132 | |||
| 133 | /** | ||
| 134 | * vimc_pads_init - initialize pads | 125 | * vimc_pads_init - initialize pads |
| 135 | * | 126 | * |
| 136 | * @num_pads: number of pads to initialize | 127 | * @num_pads: number of pads to initialize |
diff --git a/drivers/media/platform/vimc/vimc-core.c b/drivers/media/platform/vimc/vimc-core.c index ce809d2e3d53..0fbb7914098f 100644 --- a/drivers/media/platform/vimc/vimc-core.c +++ b/drivers/media/platform/vimc/vimc-core.c | |||
| @@ -24,7 +24,6 @@ | |||
| 24 | 24 | ||
| 25 | #include "vimc-common.h" | 25 | #include "vimc-common.h" |
| 26 | 26 | ||
| 27 | #define VIMC_PDEV_NAME "vimc" | ||
| 28 | #define VIMC_MDEV_MODEL_NAME "VIMC MDEV" | 27 | #define VIMC_MDEV_MODEL_NAME "VIMC MDEV" |
| 29 | 28 | ||
| 30 | #define VIMC_ENT_LINK(src, srcpad, sink, sinkpad, link_flags) { \ | 29 | #define VIMC_ENT_LINK(src, srcpad, sink, sinkpad, link_flags) { \ |
| @@ -221,6 +220,7 @@ static int vimc_comp_bind(struct device *master) | |||
| 221 | 220 | ||
| 222 | err_mdev_unregister: | 221 | err_mdev_unregister: |
| 223 | media_device_unregister(&vimc->mdev); | 222 | media_device_unregister(&vimc->mdev); |
| 223 | media_device_cleanup(&vimc->mdev); | ||
| 224 | err_comp_unbind_all: | 224 | err_comp_unbind_all: |
| 225 | component_unbind_all(master, NULL); | 225 | component_unbind_all(master, NULL); |
| 226 | err_v4l2_unregister: | 226 | err_v4l2_unregister: |
| @@ -237,6 +237,7 @@ static void vimc_comp_unbind(struct device *master) | |||
| 237 | dev_dbg(master, "unbind"); | 237 | dev_dbg(master, "unbind"); |
| 238 | 238 | ||
| 239 | media_device_unregister(&vimc->mdev); | 239 | media_device_unregister(&vimc->mdev); |
| 240 | media_device_cleanup(&vimc->mdev); | ||
| 240 | component_unbind_all(master, NULL); | 241 | component_unbind_all(master, NULL); |
| 241 | v4l2_device_unregister(&vimc->v4l2_dev); | 242 | v4l2_device_unregister(&vimc->v4l2_dev); |
| 242 | } | 243 | } |
| @@ -319,6 +320,8 @@ static int vimc_probe(struct platform_device *pdev) | |||
| 319 | /* Initialize media device */ | 320 | /* Initialize media device */ |
| 320 | strscpy(vimc->mdev.model, VIMC_MDEV_MODEL_NAME, | 321 | strscpy(vimc->mdev.model, VIMC_MDEV_MODEL_NAME, |
| 321 | sizeof(vimc->mdev.model)); | 322 | sizeof(vimc->mdev.model)); |
| 323 | snprintf(vimc->mdev.bus_info, sizeof(vimc->mdev.bus_info), | ||
| 324 | "platform:%s", VIMC_PDEV_NAME); | ||
| 322 | vimc->mdev.dev = &pdev->dev; | 325 | vimc->mdev.dev = &pdev->dev; |
| 323 | media_device_init(&vimc->mdev); | 326 | media_device_init(&vimc->mdev); |
| 324 | 327 | ||
diff --git a/drivers/media/platform/vimc/vimc-debayer.c b/drivers/media/platform/vimc/vimc-debayer.c index 77887f66f323..7d77c63b99d2 100644 --- a/drivers/media/platform/vimc/vimc-debayer.c +++ b/drivers/media/platform/vimc/vimc-debayer.c | |||
| @@ -321,7 +321,6 @@ static void vimc_deb_set_rgb_mbus_fmt_rgb888_1x24(struct vimc_deb_device *vdeb, | |||
| 321 | static int vimc_deb_s_stream(struct v4l2_subdev *sd, int enable) | 321 | static int vimc_deb_s_stream(struct v4l2_subdev *sd, int enable) |
| 322 | { | 322 | { |
| 323 | struct vimc_deb_device *vdeb = v4l2_get_subdevdata(sd); | 323 | struct vimc_deb_device *vdeb = v4l2_get_subdevdata(sd); |
| 324 | int ret; | ||
| 325 | 324 | ||
| 326 | if (enable) { | 325 | if (enable) { |
| 327 | const struct vimc_pix_map *vpix; | 326 | const struct vimc_pix_map *vpix; |
| @@ -351,22 +350,10 @@ static int vimc_deb_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 351 | if (!vdeb->src_frame) | 350 | if (!vdeb->src_frame) |
| 352 | return -ENOMEM; | 351 | return -ENOMEM; |
| 353 | 352 | ||
| 354 | /* Turn the stream on in the subdevices directly connected */ | ||
| 355 | ret = vimc_pipeline_s_stream(&vdeb->sd.entity, 1); | ||
| 356 | if (ret) { | ||
| 357 | vfree(vdeb->src_frame); | ||
| 358 | vdeb->src_frame = NULL; | ||
| 359 | return ret; | ||
| 360 | } | ||
| 361 | } else { | 353 | } else { |
| 362 | if (!vdeb->src_frame) | 354 | if (!vdeb->src_frame) |
| 363 | return 0; | 355 | return 0; |
| 364 | 356 | ||
| 365 | /* Disable streaming from the pipe */ | ||
| 366 | ret = vimc_pipeline_s_stream(&vdeb->sd.entity, 0); | ||
| 367 | if (ret) | ||
| 368 | return ret; | ||
| 369 | |||
| 370 | vfree(vdeb->src_frame); | 357 | vfree(vdeb->src_frame); |
| 371 | vdeb->src_frame = NULL; | 358 | vdeb->src_frame = NULL; |
| 372 | } | 359 | } |
| @@ -480,9 +467,8 @@ static void vimc_deb_calc_rgb_sink(struct vimc_deb_device *vdeb, | |||
| 480 | } | 467 | } |
| 481 | } | 468 | } |
| 482 | 469 | ||
| 483 | static void vimc_deb_process_frame(struct vimc_ent_device *ved, | 470 | static void *vimc_deb_process_frame(struct vimc_ent_device *ved, |
| 484 | struct media_pad *sink, | 471 | const void *sink_frame) |
| 485 | const void *sink_frame) | ||
| 486 | { | 472 | { |
| 487 | struct vimc_deb_device *vdeb = container_of(ved, struct vimc_deb_device, | 473 | struct vimc_deb_device *vdeb = container_of(ved, struct vimc_deb_device, |
| 488 | ved); | 474 | ved); |
| @@ -491,7 +477,7 @@ static void vimc_deb_process_frame(struct vimc_ent_device *ved, | |||
| 491 | 477 | ||
| 492 | /* If the stream in this node is not active, just return */ | 478 | /* If the stream in this node is not active, just return */ |
| 493 | if (!vdeb->src_frame) | 479 | if (!vdeb->src_frame) |
| 494 | return; | 480 | return ERR_PTR(-EINVAL); |
| 495 | 481 | ||
| 496 | for (i = 0; i < vdeb->sink_fmt.height; i++) | 482 | for (i = 0; i < vdeb->sink_fmt.height; i++) |
| 497 | for (j = 0; j < vdeb->sink_fmt.width; j++) { | 483 | for (j = 0; j < vdeb->sink_fmt.width; j++) { |
| @@ -499,12 +485,8 @@ static void vimc_deb_process_frame(struct vimc_ent_device *ved, | |||
| 499 | vdeb->set_rgb_src(vdeb, i, j, rgb); | 485 | vdeb->set_rgb_src(vdeb, i, j, rgb); |
| 500 | } | 486 | } |
| 501 | 487 | ||
| 502 | /* Propagate the frame through all source pads */ | 488 | return vdeb->src_frame; |
| 503 | for (i = 1; i < vdeb->sd.entity.num_pads; i++) { | ||
| 504 | struct media_pad *pad = &vdeb->sd.entity.pads[i]; | ||
| 505 | 489 | ||
| 506 | vimc_propagate_frame(pad, vdeb->src_frame); | ||
| 507 | } | ||
| 508 | } | 490 | } |
| 509 | 491 | ||
| 510 | static void vimc_deb_comp_unbind(struct device *comp, struct device *master, | 492 | static void vimc_deb_comp_unbind(struct device *comp, struct device *master, |
diff --git a/drivers/media/platform/vimc/vimc-scaler.c b/drivers/media/platform/vimc/vimc-scaler.c index b0952ee86296..39b2a73dfcc1 100644 --- a/drivers/media/platform/vimc/vimc-scaler.c +++ b/drivers/media/platform/vimc/vimc-scaler.c | |||
| @@ -217,7 +217,6 @@ static const struct v4l2_subdev_pad_ops vimc_sca_pad_ops = { | |||
| 217 | static int vimc_sca_s_stream(struct v4l2_subdev *sd, int enable) | 217 | static int vimc_sca_s_stream(struct v4l2_subdev *sd, int enable) |
| 218 | { | 218 | { |
| 219 | struct vimc_sca_device *vsca = v4l2_get_subdevdata(sd); | 219 | struct vimc_sca_device *vsca = v4l2_get_subdevdata(sd); |
| 220 | int ret; | ||
| 221 | 220 | ||
| 222 | if (enable) { | 221 | if (enable) { |
| 223 | const struct vimc_pix_map *vpix; | 222 | const struct vimc_pix_map *vpix; |
| @@ -245,22 +244,10 @@ static int vimc_sca_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 245 | if (!vsca->src_frame) | 244 | if (!vsca->src_frame) |
| 246 | return -ENOMEM; | 245 | return -ENOMEM; |
| 247 | 246 | ||
| 248 | /* Turn the stream on in the subdevices directly connected */ | ||
| 249 | ret = vimc_pipeline_s_stream(&vsca->sd.entity, 1); | ||
| 250 | if (ret) { | ||
| 251 | vfree(vsca->src_frame); | ||
| 252 | vsca->src_frame = NULL; | ||
| 253 | return ret; | ||
| 254 | } | ||
| 255 | } else { | 247 | } else { |
| 256 | if (!vsca->src_frame) | 248 | if (!vsca->src_frame) |
| 257 | return 0; | 249 | return 0; |
| 258 | 250 | ||
| 259 | /* Disable streaming from the pipe */ | ||
| 260 | ret = vimc_pipeline_s_stream(&vsca->sd.entity, 0); | ||
| 261 | if (ret) | ||
| 262 | return ret; | ||
| 263 | |||
| 264 | vfree(vsca->src_frame); | 251 | vfree(vsca->src_frame); |
| 265 | vsca->src_frame = NULL; | 252 | vsca->src_frame = NULL; |
| 266 | } | 253 | } |
| @@ -346,26 +333,19 @@ static void vimc_sca_fill_src_frame(const struct vimc_sca_device *const vsca, | |||
| 346 | vimc_sca_scale_pix(vsca, i, j, sink_frame); | 333 | vimc_sca_scale_pix(vsca, i, j, sink_frame); |
| 347 | } | 334 | } |
| 348 | 335 | ||
| 349 | static void vimc_sca_process_frame(struct vimc_ent_device *ved, | 336 | static void *vimc_sca_process_frame(struct vimc_ent_device *ved, |
| 350 | struct media_pad *sink, | 337 | const void *sink_frame) |
| 351 | const void *sink_frame) | ||
| 352 | { | 338 | { |
| 353 | struct vimc_sca_device *vsca = container_of(ved, struct vimc_sca_device, | 339 | struct vimc_sca_device *vsca = container_of(ved, struct vimc_sca_device, |
| 354 | ved); | 340 | ved); |
| 355 | unsigned int i; | ||
| 356 | 341 | ||
| 357 | /* If the stream in this node is not active, just return */ | 342 | /* If the stream in this node is not active, just return */ |
| 358 | if (!vsca->src_frame) | 343 | if (!vsca->src_frame) |
| 359 | return; | 344 | return ERR_PTR(-EINVAL); |
| 360 | 345 | ||
| 361 | vimc_sca_fill_src_frame(vsca, sink_frame); | 346 | vimc_sca_fill_src_frame(vsca, sink_frame); |
| 362 | 347 | ||
| 363 | /* Propagate the frame through all source pads */ | 348 | return vsca->src_frame; |
| 364 | for (i = 1; i < vsca->sd.entity.num_pads; i++) { | ||
| 365 | struct media_pad *pad = &vsca->sd.entity.pads[i]; | ||
| 366 | |||
| 367 | vimc_propagate_frame(pad, vsca->src_frame); | ||
| 368 | } | ||
| 369 | }; | 349 | }; |
| 370 | 350 | ||
| 371 | static void vimc_sca_comp_unbind(struct device *comp, struct device *master, | 351 | static void vimc_sca_comp_unbind(struct device *comp, struct device *master, |
diff --git a/drivers/media/platform/vimc/vimc-sensor.c b/drivers/media/platform/vimc/vimc-sensor.c index 32ca9c6172b1..59195f262623 100644 --- a/drivers/media/platform/vimc/vimc-sensor.c +++ b/drivers/media/platform/vimc/vimc-sensor.c | |||
| @@ -16,8 +16,6 @@ | |||
| 16 | */ | 16 | */ |
| 17 | 17 | ||
| 18 | #include <linux/component.h> | 18 | #include <linux/component.h> |
| 19 | #include <linux/freezer.h> | ||
| 20 | #include <linux/kthread.h> | ||
| 21 | #include <linux/module.h> | 19 | #include <linux/module.h> |
| 22 | #include <linux/mod_devicetable.h> | 20 | #include <linux/mod_devicetable.h> |
| 23 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| @@ -201,38 +199,20 @@ static const struct v4l2_subdev_pad_ops vimc_sen_pad_ops = { | |||
| 201 | .set_fmt = vimc_sen_set_fmt, | 199 | .set_fmt = vimc_sen_set_fmt, |
| 202 | }; | 200 | }; |
| 203 | 201 | ||
| 204 | static int vimc_sen_tpg_thread(void *data) | 202 | static void *vimc_sen_process_frame(struct vimc_ent_device *ved, |
| 203 | const void *sink_frame) | ||
| 205 | { | 204 | { |
| 206 | struct vimc_sen_device *vsen = data; | 205 | struct vimc_sen_device *vsen = container_of(ved, struct vimc_sen_device, |
| 207 | unsigned int i; | 206 | ved); |
| 208 | |||
| 209 | set_freezable(); | ||
| 210 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
| 211 | |||
| 212 | for (;;) { | ||
| 213 | try_to_freeze(); | ||
| 214 | if (kthread_should_stop()) | ||
| 215 | break; | ||
| 216 | 207 | ||
| 217 | tpg_fill_plane_buffer(&vsen->tpg, 0, 0, vsen->frame); | 208 | tpg_fill_plane_buffer(&vsen->tpg, 0, 0, vsen->frame); |
| 218 | 209 | return vsen->frame; | |
| 219 | /* Send the frame to all source pads */ | ||
| 220 | for (i = 0; i < vsen->sd.entity.num_pads; i++) | ||
| 221 | vimc_propagate_frame(&vsen->sd.entity.pads[i], | ||
| 222 | vsen->frame); | ||
| 223 | |||
| 224 | /* 60 frames per second */ | ||
| 225 | schedule_timeout(HZ/60); | ||
| 226 | } | ||
| 227 | |||
| 228 | return 0; | ||
| 229 | } | 210 | } |
| 230 | 211 | ||
| 231 | static int vimc_sen_s_stream(struct v4l2_subdev *sd, int enable) | 212 | static int vimc_sen_s_stream(struct v4l2_subdev *sd, int enable) |
| 232 | { | 213 | { |
| 233 | struct vimc_sen_device *vsen = | 214 | struct vimc_sen_device *vsen = |
| 234 | container_of(sd, struct vimc_sen_device, sd); | 215 | container_of(sd, struct vimc_sen_device, sd); |
| 235 | int ret; | ||
| 236 | 216 | ||
| 237 | if (enable) { | 217 | if (enable) { |
| 238 | const struct vimc_pix_map *vpix; | 218 | const struct vimc_pix_map *vpix; |
| @@ -258,26 +238,8 @@ static int vimc_sen_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 258 | /* configure the test pattern generator */ | 238 | /* configure the test pattern generator */ |
| 259 | vimc_sen_tpg_s_format(vsen); | 239 | vimc_sen_tpg_s_format(vsen); |
| 260 | 240 | ||
| 261 | /* Initialize the image generator thread */ | ||
| 262 | vsen->kthread_sen = kthread_run(vimc_sen_tpg_thread, vsen, | ||
| 263 | "%s-sen", vsen->sd.v4l2_dev->name); | ||
| 264 | if (IS_ERR(vsen->kthread_sen)) { | ||
| 265 | dev_err(vsen->dev, "%s: kernel_thread() failed\n", | ||
| 266 | vsen->sd.name); | ||
| 267 | vfree(vsen->frame); | ||
| 268 | vsen->frame = NULL; | ||
| 269 | return PTR_ERR(vsen->kthread_sen); | ||
| 270 | } | ||
| 271 | } else { | 241 | } else { |
| 272 | if (!vsen->kthread_sen) | ||
| 273 | return 0; | ||
| 274 | |||
| 275 | /* Stop image generator */ | ||
| 276 | ret = kthread_stop(vsen->kthread_sen); | ||
| 277 | if (ret) | ||
| 278 | return ret; | ||
| 279 | 242 | ||
| 280 | vsen->kthread_sen = NULL; | ||
| 281 | vfree(vsen->frame); | 243 | vfree(vsen->frame); |
| 282 | vsen->frame = NULL; | 244 | vsen->frame = NULL; |
| 283 | return 0; | 245 | return 0; |
| @@ -413,6 +375,7 @@ static int vimc_sen_comp_bind(struct device *comp, struct device *master, | |||
| 413 | if (ret) | 375 | if (ret) |
| 414 | goto err_free_hdl; | 376 | goto err_free_hdl; |
| 415 | 377 | ||
| 378 | vsen->ved.process_frame = vimc_sen_process_frame; | ||
| 416 | dev_set_drvdata(comp, &vsen->ved); | 379 | dev_set_drvdata(comp, &vsen->ved); |
| 417 | vsen->dev = comp; | 380 | vsen->dev = comp; |
| 418 | 381 | ||
diff --git a/drivers/media/platform/vimc/vimc-streamer.c b/drivers/media/platform/vimc/vimc-streamer.c new file mode 100644 index 000000000000..fcc897fb247b --- /dev/null +++ b/drivers/media/platform/vimc/vimc-streamer.c | |||
| @@ -0,0 +1,188 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 2 | /* | ||
| 3 | * vimc-streamer.c Virtual Media Controller Driver | ||
| 4 | * | ||
| 5 | * Copyright (C) 2018 Lucas A. M. Magalhães <lucmaga@gmail.com> | ||
| 6 | * | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/init.h> | ||
| 10 | #include <linux/module.h> | ||
| 11 | #include <linux/freezer.h> | ||
| 12 | #include <linux/kthread.h> | ||
| 13 | |||
| 14 | #include "vimc-streamer.h" | ||
| 15 | |||
| 16 | /** | ||
| 17 | * vimc_get_source_entity - get the entity connected with the first sink pad | ||
| 18 | * | ||
| 19 | * @ent: reference media_entity | ||
| 20 | * | ||
| 21 | * Helper function that returns the media entity containing the source pad | ||
| 22 | * linked with the first sink pad from the given media entity pad list. | ||
| 23 | */ | ||
| 24 | static struct media_entity *vimc_get_source_entity(struct media_entity *ent) | ||
| 25 | { | ||
| 26 | struct media_pad *pad; | ||
| 27 | int i; | ||
| 28 | |||
| 29 | for (i = 0; i < ent->num_pads; i++) { | ||
| 30 | if (ent->pads[i].flags & MEDIA_PAD_FL_SOURCE) | ||
| 31 | continue; | ||
| 32 | pad = media_entity_remote_pad(&ent->pads[i]); | ||
| 33 | return pad ? pad->entity : NULL; | ||
| 34 | } | ||
| 35 | return NULL; | ||
| 36 | } | ||
| 37 | |||
| 38 | /* | ||
| 39 | * vimc_streamer_pipeline_terminate - Disable stream in all ved in stream | ||
| 40 | * | ||
| 41 | * @stream: the pointer to the stream structure with the pipeline to be | ||
| 42 | * disabled. | ||
| 43 | * | ||
| 44 | * Calls s_stream to disable the stream in each entity of the pipeline | ||
| 45 | * | ||
| 46 | */ | ||
| 47 | static void vimc_streamer_pipeline_terminate(struct vimc_stream *stream) | ||
| 48 | { | ||
| 49 | struct media_entity *entity; | ||
| 50 | struct v4l2_subdev *sd; | ||
| 51 | |||
| 52 | while (stream->pipe_size) { | ||
| 53 | stream->pipe_size--; | ||
| 54 | entity = stream->ved_pipeline[stream->pipe_size]->ent; | ||
| 55 | entity = vimc_get_source_entity(entity); | ||
| 56 | stream->ved_pipeline[stream->pipe_size] = NULL; | ||
| 57 | |||
| 58 | if (!is_media_entity_v4l2_subdev(entity)) | ||
| 59 | continue; | ||
| 60 | |||
| 61 | sd = media_entity_to_v4l2_subdev(entity); | ||
| 62 | v4l2_subdev_call(sd, video, s_stream, 0); | ||
| 63 | } | ||
| 64 | } | ||
| 65 | |||
| 66 | /* | ||
| 67 | * vimc_streamer_pipeline_init - initializes the stream structure | ||
| 68 | * | ||
| 69 | * @stream: the pointer to the stream structure to be initialized | ||
| 70 | * @ved: the pointer to the vimc entity initializing the stream | ||
| 71 | * | ||
| 72 | * Initializes the stream structure. Walks through the entity graph to | ||
| 73 | * construct the pipeline used later on the streamer thread. | ||
| 74 | * Calls s_stream to enable stream in all entities of the pipeline. | ||
| 75 | */ | ||
| 76 | static int vimc_streamer_pipeline_init(struct vimc_stream *stream, | ||
| 77 | struct vimc_ent_device *ved) | ||
| 78 | { | ||
| 79 | struct media_entity *entity; | ||
| 80 | struct video_device *vdev; | ||
| 81 | struct v4l2_subdev *sd; | ||
| 82 | int ret = 0; | ||
| 83 | |||
| 84 | stream->pipe_size = 0; | ||
| 85 | while (stream->pipe_size < VIMC_STREAMER_PIPELINE_MAX_SIZE) { | ||
| 86 | if (!ved) { | ||
| 87 | vimc_streamer_pipeline_terminate(stream); | ||
| 88 | return -EINVAL; | ||
| 89 | } | ||
| 90 | stream->ved_pipeline[stream->pipe_size++] = ved; | ||
| 91 | |||
| 92 | entity = vimc_get_source_entity(ved->ent); | ||
| 93 | /* Check if the end of the pipeline was reached*/ | ||
| 94 | if (!entity) | ||
| 95 | return 0; | ||
| 96 | |||
| 97 | if (is_media_entity_v4l2_subdev(entity)) { | ||
| 98 | sd = media_entity_to_v4l2_subdev(entity); | ||
| 99 | ret = v4l2_subdev_call(sd, video, s_stream, 1); | ||
| 100 | if (ret && ret != -ENOIOCTLCMD) { | ||
| 101 | vimc_streamer_pipeline_terminate(stream); | ||
| 102 | return ret; | ||
| 103 | } | ||
| 104 | ved = v4l2_get_subdevdata(sd); | ||
| 105 | } else { | ||
| 106 | vdev = container_of(entity, | ||
| 107 | struct video_device, | ||
| 108 | entity); | ||
| 109 | ved = video_get_drvdata(vdev); | ||
| 110 | } | ||
| 111 | } | ||
| 112 | |||
| 113 | vimc_streamer_pipeline_terminate(stream); | ||
| 114 | return -EINVAL; | ||
| 115 | } | ||
| 116 | |||
| 117 | static int vimc_streamer_thread(void *data) | ||
| 118 | { | ||
| 119 | struct vimc_stream *stream = data; | ||
| 120 | int i; | ||
| 121 | |||
| 122 | set_freezable(); | ||
| 123 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
| 124 | |||
| 125 | for (;;) { | ||
| 126 | try_to_freeze(); | ||
| 127 | if (kthread_should_stop()) | ||
| 128 | break; | ||
| 129 | |||
| 130 | for (i = stream->pipe_size - 1; i >= 0; i--) { | ||
| 131 | stream->frame = stream->ved_pipeline[i]->process_frame( | ||
| 132 | stream->ved_pipeline[i], | ||
| 133 | stream->frame); | ||
| 134 | if (!stream->frame) | ||
| 135 | break; | ||
| 136 | if (IS_ERR(stream->frame)) | ||
| 137 | break; | ||
| 138 | } | ||
| 139 | //wait for 60hz | ||
| 140 | schedule_timeout(HZ / 60); | ||
| 141 | } | ||
| 142 | |||
| 143 | return 0; | ||
| 144 | } | ||
| 145 | |||
| 146 | int vimc_streamer_s_stream(struct vimc_stream *stream, | ||
| 147 | struct vimc_ent_device *ved, | ||
| 148 | int enable) | ||
| 149 | { | ||
| 150 | int ret; | ||
| 151 | |||
| 152 | if (!stream || !ved) | ||
| 153 | return -EINVAL; | ||
| 154 | |||
| 155 | if (enable) { | ||
| 156 | if (stream->kthread) | ||
| 157 | return 0; | ||
| 158 | |||
| 159 | ret = vimc_streamer_pipeline_init(stream, ved); | ||
| 160 | if (ret) | ||
| 161 | return ret; | ||
| 162 | |||
| 163 | stream->kthread = kthread_run(vimc_streamer_thread, stream, | ||
| 164 | "vimc-streamer thread"); | ||
| 165 | |||
| 166 | if (IS_ERR(stream->kthread)) | ||
| 167 | return PTR_ERR(stream->kthread); | ||
| 168 | |||
| 169 | } else { | ||
| 170 | if (!stream->kthread) | ||
| 171 | return 0; | ||
| 172 | |||
| 173 | ret = kthread_stop(stream->kthread); | ||
| 174 | if (ret) | ||
| 175 | return ret; | ||
| 176 | |||
| 177 | stream->kthread = NULL; | ||
| 178 | |||
| 179 | vimc_streamer_pipeline_terminate(stream); | ||
| 180 | } | ||
| 181 | |||
| 182 | return 0; | ||
| 183 | } | ||
| 184 | EXPORT_SYMBOL_GPL(vimc_streamer_s_stream); | ||
| 185 | |||
| 186 | MODULE_DESCRIPTION("Virtual Media Controller Driver (VIMC) Streamer"); | ||
| 187 | MODULE_AUTHOR("Lucas A. M. Magalhães <lucmaga@gmail.com>"); | ||
| 188 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/platform/vimc/vimc-streamer.h b/drivers/media/platform/vimc/vimc-streamer.h new file mode 100644 index 000000000000..752af2e2d5a2 --- /dev/null +++ b/drivers/media/platform/vimc/vimc-streamer.h | |||
| @@ -0,0 +1,38 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0+ */ | ||
| 2 | /* | ||
| 3 | * vimc-streamer.h Virtual Media Controller Driver | ||
| 4 | * | ||
| 5 | * Copyright (C) 2018 Lucas A. M. Magalhães <lucmaga@gmail.com> | ||
| 6 | * | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef _VIMC_STREAMER_H_ | ||
| 10 | #define _VIMC_STREAMER_H_ | ||
| 11 | |||
| 12 | #include <media/media-device.h> | ||
| 13 | |||
| 14 | #include "vimc-common.h" | ||
| 15 | |||
| 16 | #define VIMC_STREAMER_PIPELINE_MAX_SIZE 16 | ||
| 17 | |||
| 18 | struct vimc_stream { | ||
| 19 | struct media_pipeline pipe; | ||
| 20 | struct vimc_ent_device *ved_pipeline[VIMC_STREAMER_PIPELINE_MAX_SIZE]; | ||
| 21 | unsigned int pipe_size; | ||
| 22 | u8 *frame; | ||
| 23 | struct task_struct *kthread; | ||
| 24 | }; | ||
| 25 | |||
| 26 | /** | ||
| 27 | * vimc_streamer_s_streamer - start/stop the stream | ||
| 28 | * | ||
| 29 | * @stream: the pointer to the stream to start or stop | ||
| 30 | * @ved: The last entity of the streamer pipeline | ||
| 31 | * @enable: any non-zero number start the stream, zero stop | ||
| 32 | * | ||
| 33 | */ | ||
| 34 | int vimc_streamer_s_stream(struct vimc_stream *stream, | ||
| 35 | struct vimc_ent_device *ved, | ||
| 36 | int enable); | ||
| 37 | |||
| 38 | #endif //_VIMC_STREAMER_H_ | ||
diff --git a/drivers/media/platform/vivid/vivid-core.c b/drivers/media/platform/vivid/vivid-core.c index c931f007e5b0..342e0e6c103b 100644 --- a/drivers/media/platform/vivid/vivid-core.c +++ b/drivers/media/platform/vivid/vivid-core.c | |||
| @@ -371,7 +371,7 @@ static int vidioc_s_parm(struct file *file, void *fh, | |||
| 371 | 371 | ||
| 372 | if (vdev->vfl_dir == VFL_DIR_RX) | 372 | if (vdev->vfl_dir == VFL_DIR_RX) |
| 373 | return vivid_vid_cap_s_parm(file, fh, parm); | 373 | return vivid_vid_cap_s_parm(file, fh, parm); |
| 374 | return vivid_vid_out_g_parm(file, fh, parm); | 374 | return -ENOTTY; |
| 375 | } | 375 | } |
| 376 | 376 | ||
| 377 | static int vidioc_log_status(struct file *file, void *fh) | 377 | static int vidioc_log_status(struct file *file, void *fh) |
| @@ -1094,7 +1094,9 @@ static int vivid_create_instance(struct platform_device *pdev, int inst) | |||
| 1094 | q = &dev->vb_vid_cap_q; | 1094 | q = &dev->vb_vid_cap_q; |
| 1095 | q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE : | 1095 | q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE : |
| 1096 | V4L2_BUF_TYPE_VIDEO_CAPTURE; | 1096 | V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 1097 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; | 1097 | q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; |
| 1098 | if (!allocator) | ||
| 1099 | q->io_modes |= VB2_USERPTR; | ||
| 1098 | q->drv_priv = dev; | 1100 | q->drv_priv = dev; |
| 1099 | q->buf_struct_size = sizeof(struct vivid_buffer); | 1101 | q->buf_struct_size = sizeof(struct vivid_buffer); |
| 1100 | q->ops = &vivid_vid_cap_qops; | 1102 | q->ops = &vivid_vid_cap_qops; |
| @@ -1115,7 +1117,9 @@ static int vivid_create_instance(struct platform_device *pdev, int inst) | |||
| 1115 | q = &dev->vb_vid_out_q; | 1117 | q = &dev->vb_vid_out_q; |
| 1116 | q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE : | 1118 | q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE : |
| 1117 | V4L2_BUF_TYPE_VIDEO_OUTPUT; | 1119 | V4L2_BUF_TYPE_VIDEO_OUTPUT; |
| 1118 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_WRITE; | 1120 | q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_WRITE; |
| 1121 | if (!allocator) | ||
| 1122 | q->io_modes |= VB2_USERPTR; | ||
| 1119 | q->drv_priv = dev; | 1123 | q->drv_priv = dev; |
| 1120 | q->buf_struct_size = sizeof(struct vivid_buffer); | 1124 | q->buf_struct_size = sizeof(struct vivid_buffer); |
| 1121 | q->ops = &vivid_vid_out_qops; | 1125 | q->ops = &vivid_vid_out_qops; |
| @@ -1136,7 +1140,9 @@ static int vivid_create_instance(struct platform_device *pdev, int inst) | |||
| 1136 | q = &dev->vb_vbi_cap_q; | 1140 | q = &dev->vb_vbi_cap_q; |
| 1137 | q->type = dev->has_raw_vbi_cap ? V4L2_BUF_TYPE_VBI_CAPTURE : | 1141 | q->type = dev->has_raw_vbi_cap ? V4L2_BUF_TYPE_VBI_CAPTURE : |
| 1138 | V4L2_BUF_TYPE_SLICED_VBI_CAPTURE; | 1142 | V4L2_BUF_TYPE_SLICED_VBI_CAPTURE; |
| 1139 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; | 1143 | q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; |
| 1144 | if (!allocator) | ||
| 1145 | q->io_modes |= VB2_USERPTR; | ||
| 1140 | q->drv_priv = dev; | 1146 | q->drv_priv = dev; |
| 1141 | q->buf_struct_size = sizeof(struct vivid_buffer); | 1147 | q->buf_struct_size = sizeof(struct vivid_buffer); |
| 1142 | q->ops = &vivid_vbi_cap_qops; | 1148 | q->ops = &vivid_vbi_cap_qops; |
| @@ -1157,7 +1163,9 @@ static int vivid_create_instance(struct platform_device *pdev, int inst) | |||
| 1157 | q = &dev->vb_vbi_out_q; | 1163 | q = &dev->vb_vbi_out_q; |
| 1158 | q->type = dev->has_raw_vbi_out ? V4L2_BUF_TYPE_VBI_OUTPUT : | 1164 | q->type = dev->has_raw_vbi_out ? V4L2_BUF_TYPE_VBI_OUTPUT : |
| 1159 | V4L2_BUF_TYPE_SLICED_VBI_OUTPUT; | 1165 | V4L2_BUF_TYPE_SLICED_VBI_OUTPUT; |
| 1160 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_WRITE; | 1166 | q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_WRITE; |
| 1167 | if (!allocator) | ||
| 1168 | q->io_modes |= VB2_USERPTR; | ||
| 1161 | q->drv_priv = dev; | 1169 | q->drv_priv = dev; |
| 1162 | q->buf_struct_size = sizeof(struct vivid_buffer); | 1170 | q->buf_struct_size = sizeof(struct vivid_buffer); |
| 1163 | q->ops = &vivid_vbi_out_qops; | 1171 | q->ops = &vivid_vbi_out_qops; |
| @@ -1177,7 +1185,9 @@ static int vivid_create_instance(struct platform_device *pdev, int inst) | |||
| 1177 | /* initialize sdr_cap queue */ | 1185 | /* initialize sdr_cap queue */ |
| 1178 | q = &dev->vb_sdr_cap_q; | 1186 | q = &dev->vb_sdr_cap_q; |
| 1179 | q->type = V4L2_BUF_TYPE_SDR_CAPTURE; | 1187 | q->type = V4L2_BUF_TYPE_SDR_CAPTURE; |
| 1180 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; | 1188 | q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; |
| 1189 | if (!allocator) | ||
| 1190 | q->io_modes |= VB2_USERPTR; | ||
| 1181 | q->drv_priv = dev; | 1191 | q->drv_priv = dev; |
| 1182 | q->buf_struct_size = sizeof(struct vivid_buffer); | 1192 | q->buf_struct_size = sizeof(struct vivid_buffer); |
| 1183 | q->ops = &vivid_sdr_cap_qops; | 1193 | q->ops = &vivid_sdr_cap_qops; |
| @@ -1468,9 +1478,6 @@ static int vivid_create_instance(struct platform_device *pdev, int inst) | |||
| 1468 | return 0; | 1478 | return 0; |
| 1469 | 1479 | ||
| 1470 | unreg_dev: | 1480 | unreg_dev: |
| 1471 | #ifdef CONFIG_MEDIA_CONTROLLER | ||
| 1472 | media_device_unregister(&dev->mdev); | ||
| 1473 | #endif | ||
| 1474 | video_unregister_device(&dev->radio_tx_dev); | 1481 | video_unregister_device(&dev->radio_tx_dev); |
| 1475 | video_unregister_device(&dev->radio_rx_dev); | 1482 | video_unregister_device(&dev->radio_rx_dev); |
| 1476 | video_unregister_device(&dev->sdr_cap_dev); | 1483 | video_unregister_device(&dev->sdr_cap_dev); |
| @@ -1543,6 +1550,7 @@ static int vivid_remove(struct platform_device *pdev) | |||
| 1543 | 1550 | ||
| 1544 | #ifdef CONFIG_MEDIA_CONTROLLER | 1551 | #ifdef CONFIG_MEDIA_CONTROLLER |
| 1545 | media_device_unregister(&dev->mdev); | 1552 | media_device_unregister(&dev->mdev); |
| 1553 | media_device_cleanup(&dev->mdev); | ||
| 1546 | #endif | 1554 | #endif |
| 1547 | 1555 | ||
| 1548 | if (dev->has_vid_cap) { | 1556 | if (dev->has_vid_cap) { |
diff --git a/drivers/media/platform/vivid/vivid-vid-cap.c b/drivers/media/platform/vivid/vivid-vid-cap.c index c059fc12668a..52eeda624d7e 100644 --- a/drivers/media/platform/vivid/vivid-vid-cap.c +++ b/drivers/media/platform/vivid/vivid-vid-cap.c | |||
| @@ -124,7 +124,8 @@ static int vid_cap_queue_setup(struct vb2_queue *vq, | |||
| 124 | } | 124 | } |
| 125 | } else { | 125 | } else { |
| 126 | for (p = 0; p < buffers; p++) | 126 | for (p = 0; p < buffers; p++) |
| 127 | sizes[p] = tpg_g_line_width(&dev->tpg, p) * h + | 127 | sizes[p] = (tpg_g_line_width(&dev->tpg, p) * h) / |
| 128 | dev->fmt_cap->vdownsampling[p] + | ||
| 128 | dev->fmt_cap->data_offset[p]; | 129 | dev->fmt_cap->data_offset[p]; |
| 129 | } | 130 | } |
| 130 | 131 | ||
| @@ -161,7 +162,9 @@ static int vid_cap_buf_prepare(struct vb2_buffer *vb) | |||
| 161 | return -EINVAL; | 162 | return -EINVAL; |
| 162 | } | 163 | } |
| 163 | for (p = 0; p < buffers; p++) { | 164 | for (p = 0; p < buffers; p++) { |
| 164 | size = tpg_g_line_width(&dev->tpg, p) * dev->fmt_cap_rect.height + | 165 | size = (tpg_g_line_width(&dev->tpg, p) * |
| 166 | dev->fmt_cap_rect.height) / | ||
| 167 | dev->fmt_cap->vdownsampling[p] + | ||
| 165 | dev->fmt_cap->data_offset[p]; | 168 | dev->fmt_cap->data_offset[p]; |
| 166 | 169 | ||
| 167 | if (vb2_plane_size(vb, p) < size) { | 170 | if (vb2_plane_size(vb, p) < size) { |
| @@ -545,7 +548,8 @@ int vivid_g_fmt_vid_cap(struct file *file, void *priv, | |||
| 545 | for (p = 0; p < mp->num_planes; p++) { | 548 | for (p = 0; p < mp->num_planes; p++) { |
| 546 | mp->plane_fmt[p].bytesperline = tpg_g_bytesperline(&dev->tpg, p); | 549 | mp->plane_fmt[p].bytesperline = tpg_g_bytesperline(&dev->tpg, p); |
| 547 | mp->plane_fmt[p].sizeimage = | 550 | mp->plane_fmt[p].sizeimage = |
| 548 | tpg_g_line_width(&dev->tpg, p) * mp->height + | 551 | (tpg_g_line_width(&dev->tpg, p) * mp->height) / |
| 552 | dev->fmt_cap->vdownsampling[p] + | ||
| 549 | dev->fmt_cap->data_offset[p]; | 553 | dev->fmt_cap->data_offset[p]; |
| 550 | } | 554 | } |
| 551 | return 0; | 555 | return 0; |
diff --git a/drivers/media/platform/vivid/vivid-vid-common.c b/drivers/media/platform/vivid/vivid-vid-common.c index 661f4015fba1..74b83bcc6119 100644 --- a/drivers/media/platform/vivid/vivid-vid-common.c +++ b/drivers/media/platform/vivid/vivid-vid-common.c | |||
| @@ -169,6 +169,36 @@ struct vivid_fmt vivid_formats[] = { | |||
| 169 | .alpha_mask = 0x000000ff, | 169 | .alpha_mask = 0x000000ff, |
| 170 | }, | 170 | }, |
| 171 | { | 171 | { |
| 172 | .fourcc = V4L2_PIX_FMT_AYUV32, | ||
| 173 | .vdownsampling = { 1 }, | ||
| 174 | .bit_depth = { 32 }, | ||
| 175 | .planes = 1, | ||
| 176 | .buffers = 1, | ||
| 177 | .alpha_mask = 0x000000ff, | ||
| 178 | }, | ||
| 179 | { | ||
| 180 | .fourcc = V4L2_PIX_FMT_XYUV32, | ||
| 181 | .vdownsampling = { 1 }, | ||
| 182 | .bit_depth = { 32 }, | ||
| 183 | .planes = 1, | ||
| 184 | .buffers = 1, | ||
| 185 | }, | ||
| 186 | { | ||
| 187 | .fourcc = V4L2_PIX_FMT_VUYA32, | ||
| 188 | .vdownsampling = { 1 }, | ||
| 189 | .bit_depth = { 32 }, | ||
| 190 | .planes = 1, | ||
| 191 | .buffers = 1, | ||
| 192 | .alpha_mask = 0xff000000, | ||
| 193 | }, | ||
| 194 | { | ||
| 195 | .fourcc = V4L2_PIX_FMT_VUYX32, | ||
| 196 | .vdownsampling = { 1 }, | ||
| 197 | .bit_depth = { 32 }, | ||
| 198 | .planes = 1, | ||
| 199 | .buffers = 1, | ||
| 200 | }, | ||
| 201 | { | ||
| 172 | .fourcc = V4L2_PIX_FMT_GREY, | 202 | .fourcc = V4L2_PIX_FMT_GREY, |
| 173 | .vdownsampling = { 1 }, | 203 | .vdownsampling = { 1 }, |
| 174 | .bit_depth = { 8 }, | 204 | .bit_depth = { 8 }, |
diff --git a/drivers/media/platform/vivid/vivid-vid-out.c b/drivers/media/platform/vivid/vivid-vid-out.c index ea250aee2b2e..e61b91b414f9 100644 --- a/drivers/media/platform/vivid/vivid-vid-out.c +++ b/drivers/media/platform/vivid/vivid-vid-out.c | |||
| @@ -28,11 +28,12 @@ static int vid_out_queue_setup(struct vb2_queue *vq, | |||
| 28 | const struct vivid_fmt *vfmt = dev->fmt_out; | 28 | const struct vivid_fmt *vfmt = dev->fmt_out; |
| 29 | unsigned planes = vfmt->buffers; | 29 | unsigned planes = vfmt->buffers; |
| 30 | unsigned h = dev->fmt_out_rect.height; | 30 | unsigned h = dev->fmt_out_rect.height; |
| 31 | unsigned size = dev->bytesperline_out[0] * h; | 31 | unsigned int size = dev->bytesperline_out[0] * h + vfmt->data_offset[0]; |
| 32 | unsigned p; | 32 | unsigned p; |
| 33 | 33 | ||
| 34 | for (p = vfmt->buffers; p < vfmt->planes; p++) | 34 | for (p = vfmt->buffers; p < vfmt->planes; p++) |
| 35 | size += dev->bytesperline_out[p] * h / vfmt->vdownsampling[p]; | 35 | size += dev->bytesperline_out[p] * h / vfmt->vdownsampling[p] + |
| 36 | vfmt->data_offset[p]; | ||
| 36 | 37 | ||
| 37 | if (dev->field_out == V4L2_FIELD_ALTERNATE) { | 38 | if (dev->field_out == V4L2_FIELD_ALTERNATE) { |
| 38 | /* | 39 | /* |
| @@ -62,12 +63,14 @@ static int vid_out_queue_setup(struct vb2_queue *vq, | |||
| 62 | if (sizes[0] < size) | 63 | if (sizes[0] < size) |
| 63 | return -EINVAL; | 64 | return -EINVAL; |
| 64 | for (p = 1; p < planes; p++) { | 65 | for (p = 1; p < planes; p++) { |
| 65 | if (sizes[p] < dev->bytesperline_out[p] * h) | 66 | if (sizes[p] < dev->bytesperline_out[p] * h + |
| 67 | vfmt->data_offset[p]) | ||
| 66 | return -EINVAL; | 68 | return -EINVAL; |
| 67 | } | 69 | } |
| 68 | } else { | 70 | } else { |
| 69 | for (p = 0; p < planes; p++) | 71 | for (p = 0; p < planes; p++) |
| 70 | sizes[p] = p ? dev->bytesperline_out[p] * h : size; | 72 | sizes[p] = p ? dev->bytesperline_out[p] * h + |
| 73 | vfmt->data_offset[p] : size; | ||
| 71 | } | 74 | } |
| 72 | 75 | ||
| 73 | if (vq->num_buffers + *nbuffers < 2) | 76 | if (vq->num_buffers + *nbuffers < 2) |
| @@ -81,21 +84,38 @@ static int vid_out_queue_setup(struct vb2_queue *vq, | |||
| 81 | return 0; | 84 | return 0; |
| 82 | } | 85 | } |
| 83 | 86 | ||
| 84 | static int vid_out_buf_prepare(struct vb2_buffer *vb) | 87 | static int vid_out_buf_out_validate(struct vb2_buffer *vb) |
| 85 | { | 88 | { |
| 86 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | 89 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 87 | struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue); | 90 | struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue); |
| 88 | unsigned long size; | 91 | |
| 89 | unsigned planes; | 92 | dprintk(dev, 1, "%s\n", __func__); |
| 93 | |||
| 94 | if (dev->field_out != V4L2_FIELD_ALTERNATE) | ||
| 95 | vbuf->field = dev->field_out; | ||
| 96 | else if (vbuf->field != V4L2_FIELD_TOP && | ||
| 97 | vbuf->field != V4L2_FIELD_BOTTOM) | ||
| 98 | return -EINVAL; | ||
| 99 | return 0; | ||
| 100 | } | ||
| 101 | |||
| 102 | static int vid_out_buf_prepare(struct vb2_buffer *vb) | ||
| 103 | { | ||
| 104 | struct vivid_dev *dev = vb2_get_drv_priv(vb->vb2_queue); | ||
| 105 | const struct vivid_fmt *vfmt = dev->fmt_out; | ||
| 106 | unsigned int planes = vfmt->buffers; | ||
| 107 | unsigned int h = dev->fmt_out_rect.height; | ||
| 108 | unsigned int size = dev->bytesperline_out[0] * h; | ||
| 90 | unsigned p; | 109 | unsigned p; |
| 91 | 110 | ||
| 111 | for (p = vfmt->buffers; p < vfmt->planes; p++) | ||
| 112 | size += dev->bytesperline_out[p] * h / vfmt->vdownsampling[p]; | ||
| 113 | |||
| 92 | dprintk(dev, 1, "%s\n", __func__); | 114 | dprintk(dev, 1, "%s\n", __func__); |
| 93 | 115 | ||
| 94 | if (WARN_ON(NULL == dev->fmt_out)) | 116 | if (WARN_ON(NULL == dev->fmt_out)) |
| 95 | return -EINVAL; | 117 | return -EINVAL; |
| 96 | 118 | ||
| 97 | planes = dev->fmt_out->planes; | ||
| 98 | |||
| 99 | if (dev->buf_prepare_error) { | 119 | if (dev->buf_prepare_error) { |
| 100 | /* | 120 | /* |
| 101 | * Error injection: test what happens if buf_prepare() returns | 121 | * Error injection: test what happens if buf_prepare() returns |
| @@ -105,18 +125,13 @@ static int vid_out_buf_prepare(struct vb2_buffer *vb) | |||
| 105 | return -EINVAL; | 125 | return -EINVAL; |
| 106 | } | 126 | } |
| 107 | 127 | ||
| 108 | if (dev->field_out != V4L2_FIELD_ALTERNATE) | ||
| 109 | vbuf->field = dev->field_out; | ||
| 110 | else if (vbuf->field != V4L2_FIELD_TOP && | ||
| 111 | vbuf->field != V4L2_FIELD_BOTTOM) | ||
| 112 | return -EINVAL; | ||
| 113 | |||
| 114 | for (p = 0; p < planes; p++) { | 128 | for (p = 0; p < planes; p++) { |
| 115 | size = dev->bytesperline_out[p] * dev->fmt_out_rect.height + | 129 | if (p) |
| 116 | vb->planes[p].data_offset; | 130 | size = dev->bytesperline_out[p] * h; |
| 131 | size += vb->planes[p].data_offset; | ||
| 117 | 132 | ||
| 118 | if (vb2_get_plane_payload(vb, p) < size) { | 133 | if (vb2_get_plane_payload(vb, p) < size) { |
| 119 | dprintk(dev, 1, "%s the payload is too small for plane %u (%lu < %lu)\n", | 134 | dprintk(dev, 1, "%s the payload is too small for plane %u (%lu < %u)\n", |
| 120 | __func__, p, vb2_get_plane_payload(vb, p), size); | 135 | __func__, p, vb2_get_plane_payload(vb, p), size); |
| 121 | return -EINVAL; | 136 | return -EINVAL; |
| 122 | } | 137 | } |
| @@ -188,6 +203,7 @@ static void vid_out_buf_request_complete(struct vb2_buffer *vb) | |||
| 188 | 203 | ||
| 189 | const struct vb2_ops vivid_vid_out_qops = { | 204 | const struct vb2_ops vivid_vid_out_qops = { |
| 190 | .queue_setup = vid_out_queue_setup, | 205 | .queue_setup = vid_out_queue_setup, |
| 206 | .buf_out_validate = vid_out_buf_out_validate, | ||
| 191 | .buf_prepare = vid_out_buf_prepare, | 207 | .buf_prepare = vid_out_buf_prepare, |
| 192 | .buf_queue = vid_out_buf_queue, | 208 | .buf_queue = vid_out_buf_queue, |
| 193 | .start_streaming = vid_out_start_streaming, | 209 | .start_streaming = vid_out_start_streaming, |
| @@ -321,7 +337,8 @@ int vivid_g_fmt_vid_out(struct file *file, void *priv, | |||
| 321 | for (p = 0; p < mp->num_planes; p++) { | 337 | for (p = 0; p < mp->num_planes; p++) { |
| 322 | mp->plane_fmt[p].bytesperline = dev->bytesperline_out[p]; | 338 | mp->plane_fmt[p].bytesperline = dev->bytesperline_out[p]; |
| 323 | mp->plane_fmt[p].sizeimage = | 339 | mp->plane_fmt[p].sizeimage = |
| 324 | mp->plane_fmt[p].bytesperline * mp->height; | 340 | mp->plane_fmt[p].bytesperline * mp->height + |
| 341 | fmt->data_offset[p]; | ||
| 325 | } | 342 | } |
| 326 | for (p = fmt->buffers; p < fmt->planes; p++) { | 343 | for (p = fmt->buffers; p < fmt->planes; p++) { |
| 327 | unsigned stride = dev->bytesperline_out[p]; | 344 | unsigned stride = dev->bytesperline_out[p]; |
| @@ -399,7 +416,7 @@ int vivid_try_fmt_vid_out(struct file *file, void *priv, | |||
| 399 | pfmt[p].bytesperline = bytesperline; | 416 | pfmt[p].bytesperline = bytesperline; |
| 400 | 417 | ||
| 401 | pfmt[p].sizeimage = (pfmt[p].bytesperline * mp->height) / | 418 | pfmt[p].sizeimage = (pfmt[p].bytesperline * mp->height) / |
| 402 | fmt->vdownsampling[p]; | 419 | fmt->vdownsampling[p] + fmt->data_offset[p]; |
| 403 | 420 | ||
| 404 | memset(pfmt[p].reserved, 0, sizeof(pfmt[p].reserved)); | 421 | memset(pfmt[p].reserved, 0, sizeof(pfmt[p].reserved)); |
| 405 | } | 422 | } |
diff --git a/drivers/media/platform/vsp1/vsp1_brx.c b/drivers/media/platform/vsp1/vsp1_brx.c index 5e50178b057d..58ad248cd7f7 100644 --- a/drivers/media/platform/vsp1/vsp1_brx.c +++ b/drivers/media/platform/vsp1/vsp1_brx.c | |||
| @@ -296,7 +296,7 @@ static void brx_configure_stream(struct vsp1_entity *entity, | |||
| 296 | /* | 296 | /* |
| 297 | * The hardware is extremely flexible but we have no userspace API to | 297 | * The hardware is extremely flexible but we have no userspace API to |
| 298 | * expose all the parameters, nor is it clear whether we would have use | 298 | * expose all the parameters, nor is it clear whether we would have use |
| 299 | * cases for all the supported modes. Let's just harcode the parameters | 299 | * cases for all the supported modes. Let's just hardcode the parameters |
| 300 | * to sane default values for now. | 300 | * to sane default values for now. |
| 301 | */ | 301 | */ |
| 302 | 302 | ||
| @@ -373,7 +373,7 @@ static void brx_configure_stream(struct vsp1_entity *entity, | |||
| 373 | vsp1_brx_write(brx, dlb, VI6_BRU_CTRL(i), ctrl); | 373 | vsp1_brx_write(brx, dlb, VI6_BRU_CTRL(i), ctrl); |
| 374 | 374 | ||
| 375 | /* | 375 | /* |
| 376 | * Harcode the blending formula to | 376 | * Hardcode the blending formula to |
| 377 | * | 377 | * |
| 378 | * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa | 378 | * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa |
| 379 | * DSTa = DSTa * (1 - SRCa) + SRCa | 379 | * DSTa = DSTa * (1 - SRCa) + SRCa |
diff --git a/drivers/media/platform/vsp1/vsp1_drm.c b/drivers/media/platform/vsp1/vsp1_drm.c index 8d86f618ec77..84895385d2e5 100644 --- a/drivers/media/platform/vsp1/vsp1_drm.c +++ b/drivers/media/platform/vsp1/vsp1_drm.c | |||
| @@ -333,19 +333,19 @@ static int vsp1_du_pipeline_setup_brx(struct vsp1_device *vsp1, | |||
| 333 | * on the BRx sink pad 0 and propagated inside the entity, not on the | 333 | * on the BRx sink pad 0 and propagated inside the entity, not on the |
| 334 | * source pad. | 334 | * source pad. |
| 335 | */ | 335 | */ |
| 336 | format.pad = pipe->brx->source_pad; | 336 | format.pad = brx->source_pad; |
| 337 | format.format.width = drm_pipe->width; | 337 | format.format.width = drm_pipe->width; |
| 338 | format.format.height = drm_pipe->height; | 338 | format.format.height = drm_pipe->height; |
| 339 | format.format.field = V4L2_FIELD_NONE; | 339 | format.format.field = V4L2_FIELD_NONE; |
| 340 | 340 | ||
| 341 | ret = v4l2_subdev_call(&pipe->brx->subdev, pad, set_fmt, NULL, | 341 | ret = v4l2_subdev_call(&brx->subdev, pad, set_fmt, NULL, |
| 342 | &format); | 342 | &format); |
| 343 | if (ret < 0) | 343 | if (ret < 0) |
| 344 | return ret; | 344 | return ret; |
| 345 | 345 | ||
| 346 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on %s pad %u\n", | 346 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on %s pad %u\n", |
| 347 | __func__, format.format.width, format.format.height, | 347 | __func__, format.format.width, format.format.height, |
| 348 | format.format.code, BRX_NAME(pipe->brx), pipe->brx->source_pad); | 348 | format.format.code, BRX_NAME(brx), brx->source_pad); |
| 349 | 349 | ||
| 350 | if (format.format.width != drm_pipe->width || | 350 | if (format.format.width != drm_pipe->width || |
| 351 | format.format.height != drm_pipe->height) { | 351 | format.format.height != drm_pipe->height) { |
diff --git a/drivers/media/platform/vsp1/vsp1_video.c b/drivers/media/platform/vsp1/vsp1_video.c index 771dfe1f7c20..7ceaf3222145 100644 --- a/drivers/media/platform/vsp1/vsp1_video.c +++ b/drivers/media/platform/vsp1/vsp1_video.c | |||
| @@ -223,7 +223,7 @@ static void vsp1_video_calculate_partition(struct vsp1_pipeline *pipe, | |||
| 223 | * If the modulus is less than half of the partition size, | 223 | * If the modulus is less than half of the partition size, |
| 224 | * the penultimate partition is reduced to half, which is added | 224 | * the penultimate partition is reduced to half, which is added |
| 225 | * to the final partition: |1234|1234|1234|12|341| | 225 | * to the final partition: |1234|1234|1234|12|341| |
| 226 | * to prevents this: |1234|1234|1234|1234|1|. | 226 | * to prevent this: |1234|1234|1234|1234|1|. |
| 227 | */ | 227 | */ |
| 228 | if (modulus) { | 228 | if (modulus) { |
| 229 | /* | 229 | /* |
diff --git a/drivers/media/platform/xilinx/xilinx-vip.c b/drivers/media/platform/xilinx/xilinx-vip.c index 18f98838111b..08a825c3a3f6 100644 --- a/drivers/media/platform/xilinx/xilinx-vip.c +++ b/drivers/media/platform/xilinx/xilinx-vip.c | |||
| @@ -166,7 +166,7 @@ EXPORT_SYMBOL_GPL(xvip_set_format_size); | |||
| 166 | * the register, otherwise the bitmask is cleared from the register | 166 | * the register, otherwise the bitmask is cleared from the register |
| 167 | * when the flag @set is false. | 167 | * when the flag @set is false. |
| 168 | * | 168 | * |
| 169 | * Fox eample, this function can be used to set a control with a boolean value | 169 | * Fox example, this function can be used to set a control with a boolean value |
| 170 | * requested by users. If the caller knows whether to set or clear in the first | 170 | * requested by users. If the caller knows whether to set or clear in the first |
| 171 | * place, the caller should call xvip_clr() or xvip_set() directly instead of | 171 | * place, the caller should call xvip_clr() or xvip_set() directly instead of |
| 172 | * using this function. | 172 | * using this function. |
diff --git a/drivers/media/radio/radio-si476x.c b/drivers/media/radio/radio-si476x.c index 269971145f88..0261f4d28f16 100644 --- a/drivers/media/radio/radio-si476x.c +++ b/drivers/media/radio/radio-si476x.c | |||
| @@ -1550,7 +1550,7 @@ static int si476x_radio_probe(struct platform_device *pdev) | |||
| 1550 | 1550 | ||
| 1551 | rval = si476x_radio_init_debugfs(radio); | 1551 | rval = si476x_radio_init_debugfs(radio); |
| 1552 | if (rval < 0) { | 1552 | if (rval < 0) { |
| 1553 | dev_err(&pdev->dev, "Could not creat debugfs interface\n"); | 1553 | dev_err(&pdev->dev, "Could not create debugfs interface\n"); |
| 1554 | goto exit; | 1554 | goto exit; |
| 1555 | } | 1555 | } |
| 1556 | 1556 | ||
diff --git a/drivers/media/radio/si470x/radio-si470x-i2c.c b/drivers/media/radio/si470x/radio-si470x-i2c.c index 9751ea1d80be..15eea2b2c90f 100644 --- a/drivers/media/radio/si470x/radio-si470x-i2c.c +++ b/drivers/media/radio/si470x/radio-si470x-i2c.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #include <linux/i2c.h> | 28 | #include <linux/i2c.h> |
| 29 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
| 30 | #include <linux/delay.h> | 30 | #include <linux/delay.h> |
| 31 | #include <linux/gpio/consumer.h> | ||
| 31 | #include <linux/interrupt.h> | 32 | #include <linux/interrupt.h> |
| 32 | 33 | ||
| 33 | #include "radio-si470x.h" | 34 | #include "radio-si470x.h" |
| @@ -350,7 +351,7 @@ static int si470x_i2c_probe(struct i2c_client *client, | |||
| 350 | unsigned char version_warning = 0; | 351 | unsigned char version_warning = 0; |
| 351 | 352 | ||
| 352 | /* private data allocation and initialization */ | 353 | /* private data allocation and initialization */ |
| 353 | radio = kzalloc(sizeof(struct si470x_device), GFP_KERNEL); | 354 | radio = devm_kzalloc(&client->dev, sizeof(*radio), GFP_KERNEL); |
| 354 | if (!radio) { | 355 | if (!radio) { |
| 355 | retval = -ENOMEM; | 356 | retval = -ENOMEM; |
| 356 | goto err_initial; | 357 | goto err_initial; |
| @@ -370,7 +371,7 @@ static int si470x_i2c_probe(struct i2c_client *client, | |||
| 370 | retval = v4l2_device_register(&client->dev, &radio->v4l2_dev); | 371 | retval = v4l2_device_register(&client->dev, &radio->v4l2_dev); |
| 371 | if (retval < 0) { | 372 | if (retval < 0) { |
| 372 | dev_err(&client->dev, "couldn't register v4l2_device\n"); | 373 | dev_err(&client->dev, "couldn't register v4l2_device\n"); |
| 373 | goto err_radio; | 374 | goto err_initial; |
| 374 | } | 375 | } |
| 375 | 376 | ||
| 376 | v4l2_ctrl_handler_init(&radio->hdl, 2); | 377 | v4l2_ctrl_handler_init(&radio->hdl, 2); |
| @@ -392,18 +393,29 @@ static int si470x_i2c_probe(struct i2c_client *client, | |||
| 392 | radio->videodev.release = video_device_release_empty; | 393 | radio->videodev.release = video_device_release_empty; |
| 393 | video_set_drvdata(&radio->videodev, radio); | 394 | video_set_drvdata(&radio->videodev, radio); |
| 394 | 395 | ||
| 396 | radio->gpio_reset = devm_gpiod_get_optional(&client->dev, "reset", | ||
| 397 | GPIOD_OUT_LOW); | ||
| 398 | if (IS_ERR(radio->gpio_reset)) { | ||
| 399 | retval = PTR_ERR(radio->gpio_reset); | ||
| 400 | dev_err(&client->dev, "Failed to request gpio: %d\n", retval); | ||
| 401 | goto err_all; | ||
| 402 | } | ||
| 403 | |||
| 404 | if (radio->gpio_reset) | ||
| 405 | gpiod_set_value(radio->gpio_reset, 1); | ||
| 406 | |||
| 395 | /* power up : need 110ms */ | 407 | /* power up : need 110ms */ |
| 396 | radio->registers[POWERCFG] = POWERCFG_ENABLE; | 408 | radio->registers[POWERCFG] = POWERCFG_ENABLE; |
| 397 | if (si470x_set_register(radio, POWERCFG) < 0) { | 409 | if (si470x_set_register(radio, POWERCFG) < 0) { |
| 398 | retval = -EIO; | 410 | retval = -EIO; |
| 399 | goto err_ctrl; | 411 | goto err_all; |
| 400 | } | 412 | } |
| 401 | msleep(110); | 413 | msleep(110); |
| 402 | 414 | ||
| 403 | /* get device and chip versions */ | 415 | /* get device and chip versions */ |
| 404 | if (si470x_get_all_registers(radio) < 0) { | 416 | if (si470x_get_all_registers(radio) < 0) { |
| 405 | retval = -EIO; | 417 | retval = -EIO; |
| 406 | goto err_ctrl; | 418 | goto err_all; |
| 407 | } | 419 | } |
| 408 | dev_info(&client->dev, "DeviceID=0x%4.4hx ChipID=0x%4.4hx\n", | 420 | dev_info(&client->dev, "DeviceID=0x%4.4hx ChipID=0x%4.4hx\n", |
| 409 | radio->registers[DEVICEID], radio->registers[SI_CHIPID]); | 421 | radio->registers[DEVICEID], radio->registers[SI_CHIPID]); |
| @@ -430,10 +442,10 @@ static int si470x_i2c_probe(struct i2c_client *client, | |||
| 430 | 442 | ||
| 431 | /* rds buffer allocation */ | 443 | /* rds buffer allocation */ |
| 432 | radio->buf_size = rds_buf * 3; | 444 | radio->buf_size = rds_buf * 3; |
| 433 | radio->buffer = kmalloc(radio->buf_size, GFP_KERNEL); | 445 | radio->buffer = devm_kmalloc(&client->dev, radio->buf_size, GFP_KERNEL); |
| 434 | if (!radio->buffer) { | 446 | if (!radio->buffer) { |
| 435 | retval = -EIO; | 447 | retval = -EIO; |
| 436 | goto err_ctrl; | 448 | goto err_all; |
| 437 | } | 449 | } |
| 438 | 450 | ||
| 439 | /* rds buffer configuration */ | 451 | /* rds buffer configuration */ |
| @@ -441,12 +453,13 @@ static int si470x_i2c_probe(struct i2c_client *client, | |||
| 441 | radio->rd_index = 0; | 453 | radio->rd_index = 0; |
| 442 | init_waitqueue_head(&radio->read_queue); | 454 | init_waitqueue_head(&radio->read_queue); |
| 443 | 455 | ||
| 444 | retval = request_threaded_irq(client->irq, NULL, si470x_i2c_interrupt, | 456 | retval = devm_request_threaded_irq(&client->dev, client->irq, NULL, |
| 445 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, DRIVER_NAME, | 457 | si470x_i2c_interrupt, |
| 446 | radio); | 458 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
| 459 | DRIVER_NAME, radio); | ||
| 447 | if (retval) { | 460 | if (retval) { |
| 448 | dev_err(&client->dev, "Failed to register interrupt\n"); | 461 | dev_err(&client->dev, "Failed to register interrupt\n"); |
| 449 | goto err_rds; | 462 | goto err_all; |
| 450 | } | 463 | } |
| 451 | 464 | ||
| 452 | /* register video device */ | 465 | /* register video device */ |
| @@ -460,15 +473,9 @@ static int si470x_i2c_probe(struct i2c_client *client, | |||
| 460 | 473 | ||
| 461 | return 0; | 474 | return 0; |
| 462 | err_all: | 475 | err_all: |
| 463 | free_irq(client->irq, radio); | ||
| 464 | err_rds: | ||
| 465 | kfree(radio->buffer); | ||
| 466 | err_ctrl: | ||
| 467 | v4l2_ctrl_handler_free(&radio->hdl); | 476 | v4l2_ctrl_handler_free(&radio->hdl); |
| 468 | err_dev: | 477 | err_dev: |
| 469 | v4l2_device_unregister(&radio->v4l2_dev); | 478 | v4l2_device_unregister(&radio->v4l2_dev); |
| 470 | err_radio: | ||
| 471 | kfree(radio); | ||
| 472 | err_initial: | 479 | err_initial: |
| 473 | return retval; | 480 | return retval; |
| 474 | } | 481 | } |
| @@ -481,9 +488,10 @@ static int si470x_i2c_remove(struct i2c_client *client) | |||
| 481 | { | 488 | { |
| 482 | struct si470x_device *radio = i2c_get_clientdata(client); | 489 | struct si470x_device *radio = i2c_get_clientdata(client); |
| 483 | 490 | ||
| 484 | free_irq(client->irq, radio); | ||
| 485 | video_unregister_device(&radio->videodev); | 491 | video_unregister_device(&radio->videodev); |
| 486 | kfree(radio); | 492 | |
| 493 | if (radio->gpio_reset) | ||
| 494 | gpiod_set_value(radio->gpio_reset, 0); | ||
| 487 | 495 | ||
| 488 | return 0; | 496 | return 0; |
| 489 | } | 497 | } |
| @@ -527,6 +535,13 @@ static int si470x_i2c_resume(struct device *dev) | |||
| 527 | static SIMPLE_DEV_PM_OPS(si470x_i2c_pm, si470x_i2c_suspend, si470x_i2c_resume); | 535 | static SIMPLE_DEV_PM_OPS(si470x_i2c_pm, si470x_i2c_suspend, si470x_i2c_resume); |
| 528 | #endif | 536 | #endif |
| 529 | 537 | ||
| 538 | #if IS_ENABLED(CONFIG_OF) | ||
| 539 | static const struct of_device_id si470x_of_match[] = { | ||
| 540 | { .compatible = "silabs,si470x" }, | ||
| 541 | { }, | ||
| 542 | }; | ||
| 543 | MODULE_DEVICE_TABLE(of, si470x_of_match); | ||
| 544 | #endif | ||
| 530 | 545 | ||
| 531 | /* | 546 | /* |
| 532 | * si470x_i2c_driver - i2c driver interface | 547 | * si470x_i2c_driver - i2c driver interface |
| @@ -534,6 +549,7 @@ static SIMPLE_DEV_PM_OPS(si470x_i2c_pm, si470x_i2c_suspend, si470x_i2c_resume); | |||
| 534 | static struct i2c_driver si470x_i2c_driver = { | 549 | static struct i2c_driver si470x_i2c_driver = { |
| 535 | .driver = { | 550 | .driver = { |
| 536 | .name = "si470x", | 551 | .name = "si470x", |
| 552 | .of_match_table = of_match_ptr(si470x_of_match), | ||
| 537 | #ifdef CONFIG_PM_SLEEP | 553 | #ifdef CONFIG_PM_SLEEP |
| 538 | .pm = &si470x_i2c_pm, | 554 | .pm = &si470x_i2c_pm, |
| 539 | #endif | 555 | #endif |
diff --git a/drivers/media/radio/si470x/radio-si470x.h b/drivers/media/radio/si470x/radio-si470x.h index 35fa0f3bbdd2..6fd6a399cb77 100644 --- a/drivers/media/radio/si470x/radio-si470x.h +++ b/drivers/media/radio/si470x/radio-si470x.h | |||
| @@ -189,6 +189,7 @@ struct si470x_device { | |||
| 189 | 189 | ||
| 190 | #if IS_ENABLED(CONFIG_I2C_SI470X) | 190 | #if IS_ENABLED(CONFIG_I2C_SI470X) |
| 191 | struct i2c_client *client; | 191 | struct i2c_client *client; |
| 192 | struct gpio_desc *gpio_reset; | ||
| 192 | #endif | 193 | #endif |
| 193 | }; | 194 | }; |
| 194 | 195 | ||
diff --git a/drivers/media/radio/wl128x/fmdrv.h b/drivers/media/radio/wl128x/fmdrv.h index 1ff2eec4ed52..4c0d13539988 100644 --- a/drivers/media/radio/wl128x/fmdrv.h +++ b/drivers/media/radio/wl128x/fmdrv.h | |||
| @@ -133,7 +133,7 @@ struct fm_rds { | |||
| 133 | /* | 133 | /* |
| 134 | * Current RX channel Alternate Frequency cache. | 134 | * Current RX channel Alternate Frequency cache. |
| 135 | * This info is used to switch to other freq (AF) | 135 | * This info is used to switch to other freq (AF) |
| 136 | * when current channel signal strengh is below RSSI threshold. | 136 | * when current channel signal strength is below RSSI threshold. |
| 137 | */ | 137 | */ |
| 138 | struct tuned_station_info { | 138 | struct tuned_station_info { |
| 139 | u16 picode; | 139 | u16 picode; |
| @@ -228,7 +228,7 @@ struct fmdev { | |||
| 228 | struct fm_rx rx; /* FM receiver info */ | 228 | struct fm_rx rx; /* FM receiver info */ |
| 229 | struct fmtx_data tx_data; | 229 | struct fmtx_data tx_data; |
| 230 | 230 | ||
| 231 | /* V4L2 ctrl framwork handler*/ | 231 | /* V4L2 ctrl framework handler*/ |
| 232 | struct v4l2_ctrl_handler ctrl_handler; | 232 | struct v4l2_ctrl_handler ctrl_handler; |
| 233 | 233 | ||
| 234 | /* For core assisted locking */ | 234 | /* For core assisted locking */ |
diff --git a/drivers/media/radio/wl128x/fmdrv_common.c b/drivers/media/radio/wl128x/fmdrv_common.c index 800d69c3f80b..3c8987af3772 100644 --- a/drivers/media/radio/wl128x/fmdrv_common.c +++ b/drivers/media/radio/wl128x/fmdrv_common.c | |||
| @@ -908,7 +908,7 @@ static void fm_irq_afjump_setfreq(struct fmdev *fmdev) | |||
| 908 | u16 frq_index; | 908 | u16 frq_index; |
| 909 | u16 payload; | 909 | u16 payload; |
| 910 | 910 | ||
| 911 | fmdbg("Swtich to %d KHz\n", fmdev->rx.stat_info.af_cache[fmdev->rx.afjump_idx]); | 911 | fmdbg("Switch to %d KHz\n", fmdev->rx.stat_info.af_cache[fmdev->rx.afjump_idx]); |
| 912 | frq_index = (fmdev->rx.stat_info.af_cache[fmdev->rx.afjump_idx] - | 912 | frq_index = (fmdev->rx.stat_info.af_cache[fmdev->rx.afjump_idx] - |
| 913 | fmdev->rx.region.bot_freq) / FM_FREQ_MUL; | 913 | fmdev->rx.region.bot_freq) / FM_FREQ_MUL; |
| 914 | 914 | ||
| @@ -1047,7 +1047,7 @@ static void fm_irq_handle_intmsk_cmd_resp(struct fmdev *fmdev) | |||
| 1047 | clear_bit(FM_INTTASK_RUNNING, &fmdev->flag); | 1047 | clear_bit(FM_INTTASK_RUNNING, &fmdev->flag); |
| 1048 | } | 1048 | } |
| 1049 | 1049 | ||
| 1050 | /* Returns availability of RDS data in internel buffer */ | 1050 | /* Returns availability of RDS data in internal buffer */ |
| 1051 | int fmc_is_rds_data_available(struct fmdev *fmdev, struct file *file, | 1051 | int fmc_is_rds_data_available(struct fmdev *fmdev, struct file *file, |
| 1052 | struct poll_table_struct *pts) | 1052 | struct poll_table_struct *pts) |
| 1053 | { | 1053 | { |
diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig index 8a216068a35a..96ce3e5524e0 100644 --- a/drivers/media/rc/Kconfig +++ b/drivers/media/rc/Kconfig | |||
| @@ -133,6 +133,19 @@ config IR_IMON_DECODER | |||
| 133 | remote control and you would like to use it with a raw IR | 133 | remote control and you would like to use it with a raw IR |
| 134 | receiver, or if you wish to use an encoder to transmit this IR. | 134 | receiver, or if you wish to use an encoder to transmit this IR. |
| 135 | 135 | ||
| 136 | config IR_RCMM_DECODER | ||
| 137 | tristate "Enable IR raw decoder for the RC-MM protocol" | ||
| 138 | depends on RC_CORE | ||
| 139 | help | ||
| 140 | Enable this option when you have IR with RC-MM protocol, and | ||
| 141 | you need the software decoder. The driver supports 12, | ||
| 142 | 24 and 32 bits RC-MM variants. You can enable or disable the | ||
| 143 | different modes using the following RC protocol keywords: | ||
| 144 | 'rc-mm-12', 'rc-mm-24' and 'rc-mm-32'. | ||
| 145 | |||
| 146 | To compile this driver as a module, choose M here: the module | ||
| 147 | will be called ir-rcmm-decoder. | ||
| 148 | |||
| 136 | endif #RC_DECODERS | 149 | endif #RC_DECODERS |
| 137 | 150 | ||
| 138 | menuconfig RC_DEVICES | 151 | menuconfig RC_DEVICES |
| @@ -240,7 +253,7 @@ config IR_FINTEK | |||
| 240 | depends on RC_CORE | 253 | depends on RC_CORE |
| 241 | ---help--- | 254 | ---help--- |
| 242 | Say Y here to enable support for integrated infrared receiver | 255 | Say Y here to enable support for integrated infrared receiver |
| 243 | /transciever made by Fintek. This chip is found on assorted | 256 | /transceiver made by Fintek. This chip is found on assorted |
| 244 | Jetway motherboards (and of course, possibly others). | 257 | Jetway motherboards (and of course, possibly others). |
| 245 | 258 | ||
| 246 | To compile this driver as a module, choose M here: the | 259 | To compile this driver as a module, choose M here: the |
| @@ -274,7 +287,7 @@ config IR_NUVOTON | |||
| 274 | depends on RC_CORE | 287 | depends on RC_CORE |
| 275 | ---help--- | 288 | ---help--- |
| 276 | Say Y here to enable support for integrated infrared receiver | 289 | Say Y here to enable support for integrated infrared receiver |
| 277 | /transciever made by Nuvoton (formerly Winbond). This chip is | 290 | /transceiver made by Nuvoton (formerly Winbond). This chip is |
| 278 | found in the ASRock ION 330HT, as well as assorted Intel | 291 | found in the ASRock ION 330HT, as well as assorted Intel |
| 279 | DP55-series motherboards (and of course, possibly others). | 292 | DP55-series motherboards (and of course, possibly others). |
| 280 | 293 | ||
diff --git a/drivers/media/rc/Makefile b/drivers/media/rc/Makefile index 92c163816849..48d23433b3c0 100644 --- a/drivers/media/rc/Makefile +++ b/drivers/media/rc/Makefile | |||
| @@ -16,6 +16,7 @@ obj-$(CONFIG_IR_SHARP_DECODER) += ir-sharp-decoder.o | |||
| 16 | obj-$(CONFIG_IR_MCE_KBD_DECODER) += ir-mce_kbd-decoder.o | 16 | obj-$(CONFIG_IR_MCE_KBD_DECODER) += ir-mce_kbd-decoder.o |
| 17 | obj-$(CONFIG_IR_XMP_DECODER) += ir-xmp-decoder.o | 17 | obj-$(CONFIG_IR_XMP_DECODER) += ir-xmp-decoder.o |
| 18 | obj-$(CONFIG_IR_IMON_DECODER) += ir-imon-decoder.o | 18 | obj-$(CONFIG_IR_IMON_DECODER) += ir-imon-decoder.o |
| 19 | obj-$(CONFIG_IR_RCMM_DECODER) += ir-rcmm-decoder.o | ||
| 19 | 20 | ||
| 20 | # stand-alone IR receivers/transmitters | 21 | # stand-alone IR receivers/transmitters |
| 21 | obj-$(CONFIG_RC_ATI_REMOTE) += ati_remote.o | 22 | obj-$(CONFIG_RC_ATI_REMOTE) += ati_remote.o |
diff --git a/drivers/media/rc/ati_remote.c b/drivers/media/rc/ati_remote.c index 265e91a2a70d..bc2da64858c3 100644 --- a/drivers/media/rc/ati_remote.c +++ b/drivers/media/rc/ati_remote.c | |||
| @@ -304,7 +304,7 @@ static const struct { | |||
| 304 | {KIND_LITERAL, 0x7c, BTN_RIGHT},/* right btn down */ | 304 | {KIND_LITERAL, 0x7c, BTN_RIGHT},/* right btn down */ |
| 305 | {KIND_LITERAL, 0x7d, BTN_RIGHT},/* right btn up */ | 305 | {KIND_LITERAL, 0x7d, BTN_RIGHT},/* right btn up */ |
| 306 | 306 | ||
| 307 | /* Artificial "doubleclick" events are generated by the hardware. | 307 | /* Artificial "double-click" events are generated by the hardware. |
| 308 | * They are mapped to the "side" and "extra" mouse buttons here. */ | 308 | * They are mapped to the "side" and "extra" mouse buttons here. */ |
| 309 | {KIND_FILTERED, 0x7a, BTN_SIDE}, /* left dblclick */ | 309 | {KIND_FILTERED, 0x7a, BTN_SIDE}, /* left dblclick */ |
| 310 | {KIND_FILTERED, 0x7e, BTN_EXTRA},/* right dblclick */ | 310 | {KIND_FILTERED, 0x7e, BTN_EXTRA},/* right dblclick */ |
diff --git a/drivers/media/rc/ene_ir.c b/drivers/media/rc/ene_ir.c index dd2fd307ef85..293ccee2c05e 100644 --- a/drivers/media/rc/ene_ir.c +++ b/drivers/media/rc/ene_ir.c | |||
| @@ -184,7 +184,7 @@ static int ene_hw_detect(struct ene_device *dev) | |||
| 184 | return 0; | 184 | return 0; |
| 185 | } | 185 | } |
| 186 | 186 | ||
| 187 | /* Read properities of hw sample buffer */ | 187 | /* Read properties of hw sample buffer */ |
| 188 | static void ene_rx_setup_hw_buffer(struct ene_device *dev) | 188 | static void ene_rx_setup_hw_buffer(struct ene_device *dev) |
| 189 | { | 189 | { |
| 190 | u16 tmp; | 190 | u16 tmp; |
diff --git a/drivers/media/rc/ene_ir.h b/drivers/media/rc/ene_ir.h index 494646b2a284..0a45352efe40 100644 --- a/drivers/media/rc/ene_ir.h +++ b/drivers/media/rc/ene_ir.h | |||
| @@ -118,7 +118,7 @@ | |||
| 118 | #define ENE_CIRDAT_IN 0xFEC7 | 118 | #define ENE_CIRDAT_IN 0xFEC7 |
| 119 | 119 | ||
| 120 | 120 | ||
| 121 | /* RLC configuration - sample period (1us resulution) + idle mode */ | 121 | /* RLC configuration - sample period (1us resolution) + idle mode */ |
| 122 | #define ENE_CIRRLC_CFG 0xFEC8 | 122 | #define ENE_CIRRLC_CFG 0xFEC8 |
| 123 | #define ENE_CIRRLC_CFG_OVERFLOW 0x80 /* interrupt on overflows if set */ | 123 | #define ENE_CIRRLC_CFG_OVERFLOW 0x80 /* interrupt on overflows if set */ |
| 124 | #define ENE_DEFAULT_SAMPLE_PERIOD 50 | 124 | #define ENE_DEFAULT_SAMPLE_PERIOD 50 |
diff --git a/drivers/media/rc/fintek-cir.h b/drivers/media/rc/fintek-cir.h index ac34a774d018..dffe0bbfc6eb 100644 --- a/drivers/media/rc/fintek-cir.h +++ b/drivers/media/rc/fintek-cir.h | |||
| @@ -176,7 +176,7 @@ struct fintek_dev { | |||
| 176 | #define CIR_CR_IRCS 0x05 /* Before host writes command to IR, host | 176 | #define CIR_CR_IRCS 0x05 /* Before host writes command to IR, host |
| 177 | must set to 1. When host finshes write | 177 | must set to 1. When host finshes write |
| 178 | command to IR, host must clear to 0. */ | 178 | command to IR, host must clear to 0. */ |
| 179 | #define CIR_CR_COMMAND_DATA 0x06 /* Host read or write comand data */ | 179 | #define CIR_CR_COMMAND_DATA 0x06 /* Host read or write command data */ |
| 180 | #define CIR_CR_CLASS 0x07 /* 0xff = rx-only, 0x66 = rx + 2 tx, | 180 | #define CIR_CR_CLASS 0x07 /* 0xff = rx-only, 0x66 = rx + 2 tx, |
| 181 | 0x33 = rx + 1 tx */ | 181 | 0x33 = rx + 1 tx */ |
| 182 | #define CIR_CR_DEV_EN 0x30 /* bit0 = 1 enables CIR */ | 182 | #define CIR_CR_DEV_EN 0x30 /* bit0 = 1 enables CIR */ |
diff --git a/drivers/media/rc/ir-rc6-decoder.c b/drivers/media/rc/ir-rc6-decoder.c index d96aed1343e4..5cc302fa4daa 100644 --- a/drivers/media/rc/ir-rc6-decoder.c +++ b/drivers/media/rc/ir-rc6-decoder.c | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | #define RC6_6A_MCE_TOGGLE_MASK 0x8000 /* for the body bits */ | 40 | #define RC6_6A_MCE_TOGGLE_MASK 0x8000 /* for the body bits */ |
| 41 | #define RC6_6A_LCC_MASK 0xffff0000 /* RC6-6A-32 long customer code mask */ | 41 | #define RC6_6A_LCC_MASK 0xffff0000 /* RC6-6A-32 long customer code mask */ |
| 42 | #define RC6_6A_MCE_CC 0x800f0000 /* MCE customer code */ | 42 | #define RC6_6A_MCE_CC 0x800f0000 /* MCE customer code */ |
| 43 | #define RC6_6A_ZOTAC_CC 0x80340000 /* Zotac customer code */ | ||
| 43 | #define RC6_6A_KATHREIN_CC 0x80460000 /* Kathrein RCU-676 customer code */ | 44 | #define RC6_6A_KATHREIN_CC 0x80460000 /* Kathrein RCU-676 customer code */ |
| 44 | #ifndef CHAR_BIT | 45 | #ifndef CHAR_BIT |
| 45 | #define CHAR_BIT 8 /* Normally in <limits.h> */ | 46 | #define CHAR_BIT 8 /* Normally in <limits.h> */ |
| @@ -246,6 +247,7 @@ again: | |||
| 246 | switch (scancode & RC6_6A_LCC_MASK) { | 247 | switch (scancode & RC6_6A_LCC_MASK) { |
| 247 | case RC6_6A_MCE_CC: | 248 | case RC6_6A_MCE_CC: |
| 248 | case RC6_6A_KATHREIN_CC: | 249 | case RC6_6A_KATHREIN_CC: |
| 250 | case RC6_6A_ZOTAC_CC: | ||
| 249 | protocol = RC_PROTO_RC6_MCE; | 251 | protocol = RC_PROTO_RC6_MCE; |
| 250 | toggle = !!(scancode & RC6_6A_MCE_TOGGLE_MASK); | 252 | toggle = !!(scancode & RC6_6A_MCE_TOGGLE_MASK); |
| 251 | scancode &= ~RC6_6A_MCE_TOGGLE_MASK; | 253 | scancode &= ~RC6_6A_MCE_TOGGLE_MASK; |
diff --git a/drivers/media/rc/ir-rcmm-decoder.c b/drivers/media/rc/ir-rcmm-decoder.c new file mode 100644 index 000000000000..f1096ac1e5c5 --- /dev/null +++ b/drivers/media/rc/ir-rcmm-decoder.c | |||
| @@ -0,0 +1,254 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 2 | // ir-rcmm-decoder.c - A decoder for the RCMM IR protocol | ||
| 3 | // | ||
| 4 | // Copyright (C) 2018 by Patrick Lerda <patrick9876@free.fr> | ||
| 5 | |||
| 6 | #include "rc-core-priv.h" | ||
| 7 | #include <linux/module.h> | ||
| 8 | #include <linux/version.h> | ||
| 9 | |||
| 10 | #define RCMM_UNIT 166667 /* nanosecs */ | ||
| 11 | #define RCMM_PREFIX_PULSE 416666 /* 166666.666666666*2.5 */ | ||
| 12 | #define RCMM_PULSE_0 277777 /* 166666.666666666*(1+2/3) */ | ||
| 13 | #define RCMM_PULSE_1 444444 /* 166666.666666666*(2+2/3) */ | ||
| 14 | #define RCMM_PULSE_2 611111 /* 166666.666666666*(3+2/3) */ | ||
| 15 | #define RCMM_PULSE_3 777778 /* 166666.666666666*(4+2/3) */ | ||
| 16 | |||
| 17 | enum rcmm_state { | ||
| 18 | STATE_INACTIVE, | ||
| 19 | STATE_LOW, | ||
| 20 | STATE_BUMP, | ||
| 21 | STATE_VALUE, | ||
| 22 | STATE_FINISHED, | ||
| 23 | }; | ||
| 24 | |||
| 25 | static bool rcmm_mode(const struct rcmm_dec *data) | ||
| 26 | { | ||
| 27 | return !((0x000c0000 & data->bits) == 0x000c0000); | ||
| 28 | } | ||
| 29 | |||
| 30 | static int rcmm_miscmode(struct rc_dev *dev, struct rcmm_dec *data) | ||
| 31 | { | ||
| 32 | switch (data->count) { | ||
| 33 | case 24: | ||
| 34 | if (dev->enabled_protocols & RC_PROTO_BIT_RCMM24) { | ||
| 35 | rc_keydown(dev, RC_PROTO_RCMM24, data->bits, 0); | ||
| 36 | data->state = STATE_INACTIVE; | ||
| 37 | return 0; | ||
| 38 | } | ||
| 39 | return -1; | ||
| 40 | |||
| 41 | case 12: | ||
| 42 | if (dev->enabled_protocols & RC_PROTO_BIT_RCMM12) { | ||
| 43 | rc_keydown(dev, RC_PROTO_RCMM12, data->bits, 0); | ||
| 44 | data->state = STATE_INACTIVE; | ||
| 45 | return 0; | ||
| 46 | } | ||
| 47 | return -1; | ||
| 48 | } | ||
| 49 | |||
| 50 | return -1; | ||
| 51 | } | ||
| 52 | |||
| 53 | /** | ||
| 54 | * ir_rcmm_decode() - Decode one RCMM pulse or space | ||
| 55 | * @dev: the struct rc_dev descriptor of the device | ||
| 56 | * @ev: the struct ir_raw_event descriptor of the pulse/space | ||
| 57 | * | ||
| 58 | * This function returns -EINVAL if the pulse violates the state machine | ||
| 59 | */ | ||
| 60 | static int ir_rcmm_decode(struct rc_dev *dev, struct ir_raw_event ev) | ||
| 61 | { | ||
| 62 | struct rcmm_dec *data = &dev->raw->rcmm; | ||
| 63 | u32 scancode; | ||
| 64 | u8 toggle; | ||
| 65 | int value; | ||
| 66 | |||
| 67 | if (!(dev->enabled_protocols & (RC_PROTO_BIT_RCMM32 | | ||
| 68 | RC_PROTO_BIT_RCMM24 | | ||
| 69 | RC_PROTO_BIT_RCMM12))) | ||
| 70 | return 0; | ||
| 71 | |||
| 72 | if (!is_timing_event(ev)) { | ||
| 73 | if (ev.reset) | ||
| 74 | data->state = STATE_INACTIVE; | ||
| 75 | return 0; | ||
| 76 | } | ||
| 77 | |||
| 78 | switch (data->state) { | ||
| 79 | case STATE_INACTIVE: | ||
| 80 | if (!ev.pulse) | ||
| 81 | break; | ||
| 82 | |||
| 83 | if (!eq_margin(ev.duration, RCMM_PREFIX_PULSE, RCMM_UNIT / 2)) | ||
| 84 | break; | ||
| 85 | |||
| 86 | data->state = STATE_LOW; | ||
| 87 | data->count = 0; | ||
| 88 | data->bits = 0; | ||
| 89 | return 0; | ||
| 90 | |||
| 91 | case STATE_LOW: | ||
| 92 | if (ev.pulse) | ||
| 93 | break; | ||
| 94 | |||
| 95 | if (!eq_margin(ev.duration, RCMM_PULSE_0, RCMM_UNIT / 2)) | ||
| 96 | break; | ||
| 97 | |||
| 98 | data->state = STATE_BUMP; | ||
| 99 | return 0; | ||
| 100 | |||
| 101 | case STATE_BUMP: | ||
| 102 | if (!ev.pulse) | ||
| 103 | break; | ||
| 104 | |||
| 105 | if (!eq_margin(ev.duration, RCMM_UNIT, RCMM_UNIT / 2)) | ||
| 106 | break; | ||
| 107 | |||
| 108 | data->state = STATE_VALUE; | ||
| 109 | return 0; | ||
| 110 | |||
| 111 | case STATE_VALUE: | ||
| 112 | if (ev.pulse) | ||
| 113 | break; | ||
| 114 | |||
| 115 | if (eq_margin(ev.duration, RCMM_PULSE_0, RCMM_UNIT / 2)) | ||
| 116 | value = 0; | ||
| 117 | else if (eq_margin(ev.duration, RCMM_PULSE_1, RCMM_UNIT / 2)) | ||
| 118 | value = 1; | ||
| 119 | else if (eq_margin(ev.duration, RCMM_PULSE_2, RCMM_UNIT / 2)) | ||
| 120 | value = 2; | ||
| 121 | else if (eq_margin(ev.duration, RCMM_PULSE_3, RCMM_UNIT / 2)) | ||
| 122 | value = 3; | ||
| 123 | else | ||
| 124 | value = -1; | ||
| 125 | |||
| 126 | if (value == -1) { | ||
| 127 | if (!rcmm_miscmode(dev, data)) | ||
| 128 | return 0; | ||
| 129 | break; | ||
| 130 | } | ||
| 131 | |||
| 132 | data->bits <<= 2; | ||
| 133 | data->bits |= value; | ||
| 134 | |||
| 135 | data->count += 2; | ||
| 136 | |||
| 137 | if (data->count < 32) | ||
| 138 | data->state = STATE_BUMP; | ||
| 139 | else | ||
| 140 | data->state = STATE_FINISHED; | ||
| 141 | |||
| 142 | return 0; | ||
| 143 | |||
| 144 | case STATE_FINISHED: | ||
| 145 | if (!ev.pulse) | ||
| 146 | break; | ||
| 147 | |||
| 148 | if (!eq_margin(ev.duration, RCMM_UNIT, RCMM_UNIT / 2)) | ||
| 149 | break; | ||
| 150 | |||
| 151 | if (rcmm_mode(data)) { | ||
| 152 | toggle = !!(0x8000 & data->bits); | ||
| 153 | scancode = data->bits & ~0x8000; | ||
| 154 | } else { | ||
| 155 | toggle = 0; | ||
| 156 | scancode = data->bits; | ||
| 157 | } | ||
| 158 | |||
| 159 | if (dev->enabled_protocols & RC_PROTO_BIT_RCMM32) { | ||
| 160 | rc_keydown(dev, RC_PROTO_RCMM32, scancode, toggle); | ||
| 161 | data->state = STATE_INACTIVE; | ||
| 162 | return 0; | ||
| 163 | } | ||
| 164 | |||
| 165 | break; | ||
| 166 | } | ||
| 167 | |||
| 168 | data->state = STATE_INACTIVE; | ||
| 169 | return -EINVAL; | ||
| 170 | } | ||
| 171 | |||
| 172 | static const int rcmmspace[] = { | ||
| 173 | RCMM_PULSE_0, | ||
| 174 | RCMM_PULSE_1, | ||
| 175 | RCMM_PULSE_2, | ||
| 176 | RCMM_PULSE_3, | ||
| 177 | }; | ||
| 178 | |||
| 179 | static int ir_rcmm_rawencoder(struct ir_raw_event **ev, unsigned int max, | ||
| 180 | unsigned int n, u32 data) | ||
| 181 | { | ||
| 182 | int i; | ||
| 183 | int ret; | ||
| 184 | |||
| 185 | ret = ir_raw_gen_pulse_space(ev, &max, RCMM_PREFIX_PULSE, RCMM_PULSE_0); | ||
| 186 | if (ret) | ||
| 187 | return ret; | ||
| 188 | |||
| 189 | for (i = n - 2; i >= 0; i -= 2) { | ||
| 190 | const unsigned int space = rcmmspace[(data >> i) & 3]; | ||
| 191 | |||
| 192 | ret = ir_raw_gen_pulse_space(ev, &max, RCMM_UNIT, space); | ||
| 193 | if (ret) | ||
| 194 | return ret; | ||
| 195 | } | ||
| 196 | |||
| 197 | return ir_raw_gen_pulse_space(ev, &max, RCMM_UNIT, RCMM_PULSE_3 * 2); | ||
| 198 | } | ||
| 199 | |||
| 200 | static int ir_rcmm_encode(enum rc_proto protocol, u32 scancode, | ||
| 201 | struct ir_raw_event *events, unsigned int max) | ||
| 202 | { | ||
| 203 | struct ir_raw_event *e = events; | ||
| 204 | int ret; | ||
| 205 | |||
| 206 | switch (protocol) { | ||
| 207 | case RC_PROTO_RCMM32: | ||
| 208 | ret = ir_rcmm_rawencoder(&e, max, 32, scancode); | ||
| 209 | break; | ||
| 210 | case RC_PROTO_RCMM24: | ||
| 211 | ret = ir_rcmm_rawencoder(&e, max, 24, scancode); | ||
| 212 | break; | ||
| 213 | case RC_PROTO_RCMM12: | ||
| 214 | ret = ir_rcmm_rawencoder(&e, max, 12, scancode); | ||
| 215 | break; | ||
| 216 | default: | ||
| 217 | ret = -EINVAL; | ||
| 218 | } | ||
| 219 | |||
| 220 | if (ret < 0) | ||
| 221 | return ret; | ||
| 222 | |||
| 223 | return e - events; | ||
| 224 | } | ||
| 225 | |||
| 226 | static struct ir_raw_handler rcmm_handler = { | ||
| 227 | .protocols = RC_PROTO_BIT_RCMM32 | | ||
| 228 | RC_PROTO_BIT_RCMM24 | | ||
| 229 | RC_PROTO_BIT_RCMM12, | ||
| 230 | .decode = ir_rcmm_decode, | ||
| 231 | .encode = ir_rcmm_encode, | ||
| 232 | .carrier = 36000, | ||
| 233 | .min_timeout = RCMM_PULSE_3 + RCMM_UNIT, | ||
| 234 | }; | ||
| 235 | |||
| 236 | static int __init ir_rcmm_decode_init(void) | ||
| 237 | { | ||
| 238 | ir_raw_handler_register(&rcmm_handler); | ||
| 239 | |||
| 240 | pr_info("IR RCMM protocol handler initialized\n"); | ||
| 241 | return 0; | ||
| 242 | } | ||
| 243 | |||
| 244 | static void __exit ir_rcmm_decode_exit(void) | ||
| 245 | { | ||
| 246 | ir_raw_handler_unregister(&rcmm_handler); | ||
| 247 | } | ||
| 248 | |||
| 249 | module_init(ir_rcmm_decode_init); | ||
| 250 | module_exit(ir_rcmm_decode_exit); | ||
| 251 | |||
| 252 | MODULE_LICENSE("GPL"); | ||
| 253 | MODULE_AUTHOR("Patrick Lerda"); | ||
| 254 | MODULE_DESCRIPTION("RCMM IR protocol decoder"); | ||
diff --git a/drivers/media/rc/ir-xmp-decoder.c b/drivers/media/rc/ir-xmp-decoder.c index c965f51df1c1..2639b0b6d2f8 100644 --- a/drivers/media/rc/ir-xmp-decoder.c +++ b/drivers/media/rc/ir-xmp-decoder.c | |||
| @@ -94,7 +94,7 @@ static int ir_xmp_decode(struct rc_dev *dev, struct ir_raw_event ev) | |||
| 94 | n = data->durations; | 94 | n = data->durations; |
| 95 | /* | 95 | /* |
| 96 | * the 4th nibble should be 15 so base the divider on this | 96 | * the 4th nibble should be 15 so base the divider on this |
| 97 | * to transform durations into nibbles. Substract 2000 from | 97 | * to transform durations into nibbles. Subtract 2000 from |
| 98 | * the divider to compensate for fluctuations in the signal | 98 | * the divider to compensate for fluctuations in the signal |
| 99 | */ | 99 | */ |
| 100 | divider = (n[3] - XMP_NIBBLE_PREFIX) / 15 - 2000; | 100 | divider = (n[3] - XMP_NIBBLE_PREFIX) / 15 - 2000; |
diff --git a/drivers/media/rc/ite-cir.c b/drivers/media/rc/ite-cir.c index cd3c60ba8519..1d48a9e59f93 100644 --- a/drivers/media/rc/ite-cir.c +++ b/drivers/media/rc/ite-cir.c | |||
| @@ -515,7 +515,7 @@ static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n) | |||
| 515 | /* and set the carrier values for reception */ | 515 | /* and set the carrier values for reception */ |
| 516 | ite_set_carrier_params(dev); | 516 | ite_set_carrier_params(dev); |
| 517 | 517 | ||
| 518 | /* reenable the receiver */ | 518 | /* re-enable the receiver */ |
| 519 | if (dev->in_use) | 519 | if (dev->in_use) |
| 520 | dev->params.enable_rx(dev); | 520 | dev->params.enable_rx(dev); |
| 521 | 521 | ||
diff --git a/drivers/media/rc/keymaps/rc-behold-columbus.c b/drivers/media/rc/keymaps/rc-behold-columbus.c index e73057945bd1..b68380a76010 100644 --- a/drivers/media/rc/keymaps/rc-behold-columbus.c +++ b/drivers/media/rc/keymaps/rc-behold-columbus.c | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | * The "ascii-art picture" below (in comments, first row | 14 | * The "ascii-art picture" below (in comments, first row |
| 15 | * is the keycode in hex, and subsequent row(s) shows | 15 | * is the keycode in hex, and subsequent row(s) shows |
| 16 | * the button labels (several variants when appropriate) | 16 | * the button labels (several variants when appropriate) |
| 17 | * helps to descide which keycodes to assign to the buttons. | 17 | * helps to decide which keycodes to assign to the buttons. |
| 18 | */ | 18 | */ |
| 19 | 19 | ||
| 20 | static struct rc_map_table behold_columbus[] = { | 20 | static struct rc_map_table behold_columbus[] = { |
| @@ -68,7 +68,7 @@ static struct rc_map_table behold_columbus[] = { | |||
| 68 | { 0x18, KEY_VOLUMEDOWN }, | 68 | { 0x18, KEY_VOLUMEDOWN }, |
| 69 | 69 | ||
| 70 | /* 0x0E 0x1E 0x0F 0x1A * | 70 | /* 0x0E 0x1E 0x0F 0x1A * |
| 71 | * Stop Pause Previouse Next * | 71 | * Stop Pause Previous Next * |
| 72 | * */ | 72 | * */ |
| 73 | 73 | ||
| 74 | { 0x0E, KEY_STOP }, | 74 | { 0x0E, KEY_STOP }, |
diff --git a/drivers/media/rc/keymaps/rc-behold.c b/drivers/media/rc/keymaps/rc-behold.c index e1b2c8e26883..2b7cddb2f36d 100644 --- a/drivers/media/rc/keymaps/rc-behold.c +++ b/drivers/media/rc/keymaps/rc-behold.c | |||
| @@ -17,7 +17,7 @@ | |||
| 17 | * The "ascii-art picture" below (in comments, first row | 17 | * The "ascii-art picture" below (in comments, first row |
| 18 | * is the keycode in hex, and subsequent row(s) shows | 18 | * is the keycode in hex, and subsequent row(s) shows |
| 19 | * the button labels (several variants when appropriate) | 19 | * the button labels (several variants when appropriate) |
| 20 | * helps to descide which keycodes to assign to the buttons. | 20 | * helps to decide which keycodes to assign to the buttons. |
| 21 | */ | 21 | */ |
| 22 | 22 | ||
| 23 | static struct rc_map_table behold[] = { | 23 | static struct rc_map_table behold[] = { |
diff --git a/drivers/media/rc/keymaps/rc-manli.c b/drivers/media/rc/keymaps/rc-manli.c index 29c9feaf413b..5e9a49e2dd6a 100644 --- a/drivers/media/rc/keymaps/rc-manli.c +++ b/drivers/media/rc/keymaps/rc-manli.c | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | The "ascii-art picture" below (in comments, first row | 14 | The "ascii-art picture" below (in comments, first row |
| 15 | is the keycode in hex, and subsequent row(s) shows | 15 | is the keycode in hex, and subsequent row(s) shows |
| 16 | the button labels (several variants when appropriate) | 16 | the button labels (several variants when appropriate) |
| 17 | helps to descide which keycodes to assign to the buttons. | 17 | helps to decide which keycodes to assign to the buttons. |
| 18 | */ | 18 | */ |
| 19 | 19 | ||
| 20 | static struct rc_map_table manli[] = { | 20 | static struct rc_map_table manli[] = { |
diff --git a/drivers/media/rc/keymaps/rc-powercolor-real-angel.c b/drivers/media/rc/keymaps/rc-powercolor-real-angel.c index 4988e71c524c..cf98cf8dc13c 100644 --- a/drivers/media/rc/keymaps/rc-powercolor-real-angel.c +++ b/drivers/media/rc/keymaps/rc-powercolor-real-angel.c | |||
| @@ -26,7 +26,7 @@ static struct rc_map_table powercolor_real_angel[] = { | |||
| 26 | { 0x07, KEY_7 }, | 26 | { 0x07, KEY_7 }, |
| 27 | { 0x08, KEY_8 }, | 27 | { 0x08, KEY_8 }, |
| 28 | { 0x09, KEY_9 }, | 28 | { 0x09, KEY_9 }, |
| 29 | { 0x0a, KEY_DIGITS }, /* single, double, tripple digit */ | 29 | { 0x0a, KEY_DIGITS }, /* single, double, triple digit */ |
| 30 | { 0x29, KEY_PREVIOUS }, /* previous channel */ | 30 | { 0x29, KEY_PREVIOUS }, /* previous channel */ |
| 31 | { 0x12, KEY_BRIGHTNESSUP }, | 31 | { 0x12, KEY_BRIGHTNESSUP }, |
| 32 | { 0x13, KEY_BRIGHTNESSDOWN }, | 32 | { 0x13, KEY_BRIGHTNESSDOWN }, |
diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c index 8d7d3ef88862..fa4840940486 100644 --- a/drivers/media/rc/mceusb.c +++ b/drivers/media/rc/mceusb.c | |||
| @@ -79,7 +79,7 @@ | |||
| 79 | #define MCE_CMD 0x1f | 79 | #define MCE_CMD 0x1f |
| 80 | #define MCE_PORT_IR 0x4 /* (0x4 << 5) | MCE_CMD = 0x9f */ | 80 | #define MCE_PORT_IR 0x4 /* (0x4 << 5) | MCE_CMD = 0x9f */ |
| 81 | #define MCE_PORT_SYS 0x7 /* (0x7 << 5) | MCE_CMD = 0xff */ | 81 | #define MCE_PORT_SYS 0x7 /* (0x7 << 5) | MCE_CMD = 0xff */ |
| 82 | #define MCE_PORT_SER 0x6 /* 0xc0 thru 0xdf flush & 0x1f bytes */ | 82 | #define MCE_PORT_SER 0x6 /* 0xc0 through 0xdf flush & 0x1f bytes */ |
| 83 | #define MCE_PORT_MASK 0xe0 /* Mask out command bits */ | 83 | #define MCE_PORT_MASK 0xe0 /* Mask out command bits */ |
| 84 | 84 | ||
| 85 | /* Command port headers */ | 85 | /* Command port headers */ |
diff --git a/drivers/media/rc/rc-core-priv.h b/drivers/media/rc/rc-core-priv.h index c2cbe7f6266c..9f21b3e8b377 100644 --- a/drivers/media/rc/rc-core-priv.h +++ b/drivers/media/rc/rc-core-priv.h | |||
| @@ -131,6 +131,11 @@ struct ir_raw_event_ctrl { | |||
| 131 | unsigned int bits; | 131 | unsigned int bits; |
| 132 | bool stick_keyboard; | 132 | bool stick_keyboard; |
| 133 | } imon; | 133 | } imon; |
| 134 | struct rcmm_dec { | ||
| 135 | int state; | ||
| 136 | unsigned int count; | ||
| 137 | u32 bits; | ||
| 138 | } rcmm; | ||
| 134 | }; | 139 | }; |
| 135 | 140 | ||
| 136 | /* Mutex for locking raw IR processing and handler change */ | 141 | /* Mutex for locking raw IR processing and handler change */ |
diff --git a/drivers/media/rc/rc-ir-raw.c b/drivers/media/rc/rc-ir-raw.c index e10b4644a442..39dd46bbd0c1 100644 --- a/drivers/media/rc/rc-ir-raw.c +++ b/drivers/media/rc/rc-ir-raw.c | |||
| @@ -186,7 +186,7 @@ int ir_raw_event_store_with_filter(struct rc_dev *dev, struct ir_raw_event *ev) | |||
| 186 | dev->raw->this_ev = *ev; | 186 | dev->raw->this_ev = *ev; |
| 187 | } | 187 | } |
| 188 | 188 | ||
| 189 | /* Enter idle mode if nessesary */ | 189 | /* Enter idle mode if necessary */ |
| 190 | if (!ev->pulse && dev->timeout && | 190 | if (!ev->pulse && dev->timeout && |
| 191 | dev->raw->this_ev.duration >= dev->timeout) | 191 | dev->raw->this_ev.duration >= dev->timeout) |
| 192 | ir_raw_event_set_idle(dev, true); | 192 | ir_raw_event_set_idle(dev, true); |
diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c index 66a174979b3c..e8fa28e20192 100644 --- a/drivers/media/rc/rc-main.c +++ b/drivers/media/rc/rc-main.c | |||
| @@ -70,6 +70,12 @@ static const struct { | |||
| 70 | [RC_PROTO_CEC] = { .name = "cec", .repeat_period = 0 }, | 70 | [RC_PROTO_CEC] = { .name = "cec", .repeat_period = 0 }, |
| 71 | [RC_PROTO_IMON] = { .name = "imon", | 71 | [RC_PROTO_IMON] = { .name = "imon", |
| 72 | .scancode_bits = 0x7fffffff, .repeat_period = 114 }, | 72 | .scancode_bits = 0x7fffffff, .repeat_period = 114 }, |
| 73 | [RC_PROTO_RCMM12] = { .name = "rc-mm-12", | ||
| 74 | .scancode_bits = 0x00000fff, .repeat_period = 114 }, | ||
| 75 | [RC_PROTO_RCMM24] = { .name = "rc-mm-24", | ||
| 76 | .scancode_bits = 0x00ffffff, .repeat_period = 114 }, | ||
| 77 | [RC_PROTO_RCMM32] = { .name = "rc-mm-32", | ||
| 78 | .scancode_bits = 0xffffffff, .repeat_period = 114 }, | ||
| 73 | }; | 79 | }; |
| 74 | 80 | ||
| 75 | /* Used to keep track of known keymaps */ | 81 | /* Used to keep track of known keymaps */ |
| @@ -274,6 +280,7 @@ static unsigned int ir_update_mapping(struct rc_dev *dev, | |||
| 274 | unsigned int new_keycode) | 280 | unsigned int new_keycode) |
| 275 | { | 281 | { |
| 276 | int old_keycode = rc_map->scan[index].keycode; | 282 | int old_keycode = rc_map->scan[index].keycode; |
| 283 | int i; | ||
| 277 | 284 | ||
| 278 | /* Did the user wish to remove the mapping? */ | 285 | /* Did the user wish to remove the mapping? */ |
| 279 | if (new_keycode == KEY_RESERVED || new_keycode == KEY_UNKNOWN) { | 286 | if (new_keycode == KEY_RESERVED || new_keycode == KEY_UNKNOWN) { |
| @@ -288,9 +295,20 @@ static unsigned int ir_update_mapping(struct rc_dev *dev, | |||
| 288 | old_keycode == KEY_RESERVED ? "New" : "Replacing", | 295 | old_keycode == KEY_RESERVED ? "New" : "Replacing", |
| 289 | rc_map->scan[index].scancode, new_keycode); | 296 | rc_map->scan[index].scancode, new_keycode); |
| 290 | rc_map->scan[index].keycode = new_keycode; | 297 | rc_map->scan[index].keycode = new_keycode; |
| 298 | __set_bit(new_keycode, dev->input_dev->keybit); | ||
| 291 | } | 299 | } |
| 292 | 300 | ||
| 293 | if (old_keycode != KEY_RESERVED) { | 301 | if (old_keycode != KEY_RESERVED) { |
| 302 | /* A previous mapping was updated... */ | ||
| 303 | __clear_bit(old_keycode, dev->input_dev->keybit); | ||
| 304 | /* ... but another scancode might use the same keycode */ | ||
| 305 | for (i = 0; i < rc_map->len; i++) { | ||
| 306 | if (rc_map->scan[i].keycode == old_keycode) { | ||
| 307 | __set_bit(old_keycode, dev->input_dev->keybit); | ||
| 308 | break; | ||
| 309 | } | ||
| 310 | } | ||
| 311 | |||
| 294 | /* Possibly shrink the keytable, failure is not a problem */ | 312 | /* Possibly shrink the keytable, failure is not a problem */ |
| 295 | ir_resize_table(dev, rc_map, GFP_ATOMIC); | 313 | ir_resize_table(dev, rc_map, GFP_ATOMIC); |
| 296 | } | 314 | } |
| @@ -1006,6 +1024,9 @@ static const struct { | |||
| 1006 | { RC_PROTO_BIT_XMP, "xmp", "ir-xmp-decoder" }, | 1024 | { RC_PROTO_BIT_XMP, "xmp", "ir-xmp-decoder" }, |
| 1007 | { RC_PROTO_BIT_CEC, "cec", NULL }, | 1025 | { RC_PROTO_BIT_CEC, "cec", NULL }, |
| 1008 | { RC_PROTO_BIT_IMON, "imon", "ir-imon-decoder" }, | 1026 | { RC_PROTO_BIT_IMON, "imon", "ir-imon-decoder" }, |
| 1027 | { RC_PROTO_BIT_RCMM12 | | ||
| 1028 | RC_PROTO_BIT_RCMM24 | | ||
| 1029 | RC_PROTO_BIT_RCMM32, "rc-mm", "ir-rcmm-decoder" }, | ||
| 1009 | }; | 1030 | }; |
| 1010 | 1031 | ||
| 1011 | /** | 1032 | /** |
| @@ -1035,7 +1056,7 @@ struct rc_filter_attribute { | |||
| 1035 | * @buf: a pointer to the output buffer | 1056 | * @buf: a pointer to the output buffer |
| 1036 | * | 1057 | * |
| 1037 | * This routine is a callback routine for input read the IR protocol type(s). | 1058 | * This routine is a callback routine for input read the IR protocol type(s). |
| 1038 | * it is trigged by reading /sys/class/rc/rc?/protocols. | 1059 | * it is triggered by reading /sys/class/rc/rc?/protocols. |
| 1039 | * It returns the protocol names of supported protocols. | 1060 | * It returns the protocol names of supported protocols. |
| 1040 | * Enabled protocols are printed in brackets. | 1061 | * Enabled protocols are printed in brackets. |
| 1041 | * | 1062 | * |
| @@ -1206,7 +1227,7 @@ void ir_raw_load_modules(u64 *protocols) | |||
| 1206 | * @len: length of the input buffer | 1227 | * @len: length of the input buffer |
| 1207 | * | 1228 | * |
| 1208 | * This routine is for changing the IR protocol type. | 1229 | * This routine is for changing the IR protocol type. |
| 1209 | * It is trigged by writing to /sys/class/rc/rc?/[wakeup_]protocols. | 1230 | * It is triggered by writing to /sys/class/rc/rc?/[wakeup_]protocols. |
| 1210 | * See parse_protocol_change() for the valid commands. | 1231 | * See parse_protocol_change() for the valid commands. |
| 1211 | * Returns @len on success or a negative error code. | 1232 | * Returns @len on success or a negative error code. |
| 1212 | * | 1233 | * |
| @@ -1290,7 +1311,7 @@ out: | |||
| 1290 | * @buf: a pointer to the output buffer | 1311 | * @buf: a pointer to the output buffer |
| 1291 | * | 1312 | * |
| 1292 | * This routine is a callback routine to read a scancode filter value or mask. | 1313 | * This routine is a callback routine to read a scancode filter value or mask. |
| 1293 | * It is trigged by reading /sys/class/rc/rc?/[wakeup_]filter[_mask]. | 1314 | * It is triggered by reading /sys/class/rc/rc?/[wakeup_]filter[_mask]. |
| 1294 | * It prints the current scancode filter value or mask of the appropriate filter | 1315 | * It prints the current scancode filter value or mask of the appropriate filter |
| 1295 | * type in hexadecimal into @buf and returns the size of the buffer. | 1316 | * type in hexadecimal into @buf and returns the size of the buffer. |
| 1296 | * | 1317 | * |
| @@ -1333,7 +1354,7 @@ static ssize_t show_filter(struct device *device, | |||
| 1333 | * @len: length of the input buffer | 1354 | * @len: length of the input buffer |
| 1334 | * | 1355 | * |
| 1335 | * This routine is for changing a scancode filter value or mask. | 1356 | * This routine is for changing a scancode filter value or mask. |
| 1336 | * It is trigged by writing to /sys/class/rc/rc?/[wakeup_]filter[_mask]. | 1357 | * It is triggered by writing to /sys/class/rc/rc?/[wakeup_]filter[_mask]. |
| 1337 | * Returns -EINVAL if an invalid filter value for the current protocol was | 1358 | * Returns -EINVAL if an invalid filter value for the current protocol was |
| 1338 | * specified or if scancode filtering is not supported by the driver, otherwise | 1359 | * specified or if scancode filtering is not supported by the driver, otherwise |
| 1339 | * returns @len. | 1360 | * returns @len. |
| @@ -1417,7 +1438,7 @@ unlock: | |||
| 1417 | * @buf: a pointer to the output buffer | 1438 | * @buf: a pointer to the output buffer |
| 1418 | * | 1439 | * |
| 1419 | * This routine is a callback routine for input read the IR protocol type(s). | 1440 | * This routine is a callback routine for input read the IR protocol type(s). |
| 1420 | * it is trigged by reading /sys/class/rc/rc?/wakeup_protocols. | 1441 | * it is triggered by reading /sys/class/rc/rc?/wakeup_protocols. |
| 1421 | * It returns the protocol names of supported protocols. | 1442 | * It returns the protocol names of supported protocols. |
| 1422 | * The enabled protocols are printed in brackets. | 1443 | * The enabled protocols are printed in brackets. |
| 1423 | * | 1444 | * |
| @@ -1468,7 +1489,7 @@ static ssize_t show_wakeup_protocols(struct device *device, | |||
| 1468 | * @len: length of the input buffer | 1489 | * @len: length of the input buffer |
| 1469 | * | 1490 | * |
| 1470 | * This routine is for changing the IR protocol type. | 1491 | * This routine is for changing the IR protocol type. |
| 1471 | * It is trigged by writing to /sys/class/rc/rc?/wakeup_protocols. | 1492 | * It is triggered by writing to /sys/class/rc/rc?/wakeup_protocols. |
| 1472 | * Returns @len on success or a negative error code. | 1493 | * Returns @len on success or a negative error code. |
| 1473 | * | 1494 | * |
| 1474 | * dev->lock is taken to guard against races between | 1495 | * dev->lock is taken to guard against races between |
| @@ -1750,7 +1771,6 @@ static int rc_prepare_rx_device(struct rc_dev *dev) | |||
| 1750 | set_bit(EV_REP, dev->input_dev->evbit); | 1771 | set_bit(EV_REP, dev->input_dev->evbit); |
| 1751 | set_bit(EV_MSC, dev->input_dev->evbit); | 1772 | set_bit(EV_MSC, dev->input_dev->evbit); |
| 1752 | set_bit(MSC_SCAN, dev->input_dev->mscbit); | 1773 | set_bit(MSC_SCAN, dev->input_dev->mscbit); |
| 1753 | bitmap_fill(dev->input_dev->keybit, KEY_CNT); | ||
| 1754 | 1774 | ||
| 1755 | /* Pointer/mouse events */ | 1775 | /* Pointer/mouse events */ |
| 1756 | set_bit(EV_REL, dev->input_dev->evbit); | 1776 | set_bit(EV_REL, dev->input_dev->evbit); |
diff --git a/drivers/media/rc/redrat3.c b/drivers/media/rc/redrat3.c index 08c51ffd74a0..b82a5c9db12c 100644 --- a/drivers/media/rc/redrat3.c +++ b/drivers/media/rc/redrat3.c | |||
| @@ -140,7 +140,7 @@ MODULE_PARM_DESC(length_fuzz, "Length Fuzz (0-127)"); | |||
| 140 | * When receiving a continuous ir stream (for example when a user is | 140 | * When receiving a continuous ir stream (for example when a user is |
| 141 | * holding a button down on a remote), this specifies the minimum size | 141 | * holding a button down on a remote), this specifies the minimum size |
| 142 | * of a space when the redrat3 sends a irdata packet to the host. Specified | 142 | * of a space when the redrat3 sends a irdata packet to the host. Specified |
| 143 | * in miliseconds. Default value 18ms. | 143 | * in milliseconds. Default value 18ms. |
| 144 | * The value can be between 2 and 30 inclusive. | 144 | * The value can be between 2 and 30 inclusive. |
| 145 | */ | 145 | */ |
| 146 | static int minimum_pause = 18; | 146 | static int minimum_pause = 18; |
diff --git a/drivers/media/spi/cxd2880-spi.c b/drivers/media/spi/cxd2880-spi.c index d5c433e20d4a..4077217777f9 100644 --- a/drivers/media/spi/cxd2880-spi.c +++ b/drivers/media/spi/cxd2880-spi.c | |||
| @@ -522,13 +522,15 @@ cxd2880_spi_probe(struct spi_device *spi) | |||
| 522 | 522 | ||
| 523 | dvb_spi->vcc_supply = devm_regulator_get_optional(&spi->dev, "vcc"); | 523 | dvb_spi->vcc_supply = devm_regulator_get_optional(&spi->dev, "vcc"); |
| 524 | if (IS_ERR(dvb_spi->vcc_supply)) { | 524 | if (IS_ERR(dvb_spi->vcc_supply)) { |
| 525 | if (PTR_ERR(dvb_spi->vcc_supply) == -EPROBE_DEFER) | 525 | if (PTR_ERR(dvb_spi->vcc_supply) == -EPROBE_DEFER) { |
| 526 | return -EPROBE_DEFER; | 526 | ret = -EPROBE_DEFER; |
| 527 | goto fail_adapter; | ||
| 528 | } | ||
| 527 | dvb_spi->vcc_supply = NULL; | 529 | dvb_spi->vcc_supply = NULL; |
| 528 | } else { | 530 | } else { |
| 529 | ret = regulator_enable(dvb_spi->vcc_supply); | 531 | ret = regulator_enable(dvb_spi->vcc_supply); |
| 530 | if (ret) | 532 | if (ret) |
| 531 | return ret; | 533 | goto fail_adapter; |
| 532 | } | 534 | } |
| 533 | 535 | ||
| 534 | dvb_spi->spi = spi; | 536 | dvb_spi->spi = spi; |
diff --git a/drivers/media/tuners/mxl5005s.c b/drivers/media/tuners/mxl5005s.c index ec584316c812..1c07e2225fb3 100644 --- a/drivers/media/tuners/mxl5005s.c +++ b/drivers/media/tuners/mxl5005s.c | |||
| @@ -3584,7 +3584,7 @@ static u32 MXL_Ceiling(u32 value, u32 resolution) | |||
| 3584 | return value / resolution + (value % resolution > 0 ? 1 : 0); | 3584 | return value / resolution + (value % resolution > 0 ? 1 : 0); |
| 3585 | } | 3585 | } |
| 3586 | 3586 | ||
| 3587 | /* Retrieve the Initialzation Registers */ | 3587 | /* Retrieve the Initialization Registers */ |
| 3588 | static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, | 3588 | static u16 MXL_GetInitRegister(struct dvb_frontend *fe, u8 *RegNum, |
| 3589 | u8 *RegVal, int *count) | 3589 | u8 *RegVal, int *count) |
| 3590 | { | 3590 | { |
diff --git a/drivers/media/tuners/qm1d1b0004.h b/drivers/media/tuners/qm1d1b0004.h index 7734ed109a22..7950ecd56430 100644 --- a/drivers/media/tuners/qm1d1b0004.h +++ b/drivers/media/tuners/qm1d1b0004.h | |||
| @@ -14,7 +14,7 @@ struct qm1d1b0004_config { | |||
| 14 | struct dvb_frontend *fe; | 14 | struct dvb_frontend *fe; |
| 15 | 15 | ||
| 16 | u32 lpf_freq; /* LPF frequency[kHz]. Default: symbol rate */ | 16 | u32 lpf_freq; /* LPF frequency[kHz]. Default: symbol rate */ |
| 17 | bool half_step; /* use PLL frequency step of 500Hz istead of 1000Hz */ | 17 | bool half_step; /* use PLL frequency step of 500Hz instead of 1000Hz */ |
| 18 | }; | 18 | }; |
| 19 | 19 | ||
| 20 | /* special values indicating to use the default in qm1d1b0004_config */ | 20 | /* special values indicating to use the default in qm1d1b0004_config */ |
diff --git a/drivers/media/tuners/r820t.c b/drivers/media/tuners/r820t.c index ba4be08a8551..aed2f130ec74 100644 --- a/drivers/media/tuners/r820t.c +++ b/drivers/media/tuners/r820t.c | |||
| @@ -1664,7 +1664,7 @@ static int r820t_iq_tree(struct r820t_priv *priv, | |||
| 1664 | 1664 | ||
| 1665 | /* | 1665 | /* |
| 1666 | * record IMC results by input gain/phase location then adjust | 1666 | * record IMC results by input gain/phase location then adjust |
| 1667 | * gain or phase positive 1 step and negtive 1 step, | 1667 | * gain or phase positive 1 step and negative 1 step, |
| 1668 | * both record results | 1668 | * both record results |
| 1669 | */ | 1669 | */ |
| 1670 | 1670 | ||
| @@ -2066,7 +2066,7 @@ static int r820t_imr_callibrate(struct r820t_priv *priv) | |||
| 2066 | } | 2066 | } |
| 2067 | 2067 | ||
| 2068 | /* | 2068 | /* |
| 2069 | * Disables IMR callibration. That emulates the same behaviour | 2069 | * Disables IMR calibration. That emulates the same behaviour |
| 2070 | * as what is done by rtl-sdr userspace library. Useful for testing | 2070 | * as what is done by rtl-sdr userspace library. Useful for testing |
| 2071 | */ | 2071 | */ |
| 2072 | if (no_imr_cal) { | 2072 | if (no_imr_cal) { |
diff --git a/drivers/media/tuners/tda18271-common.c b/drivers/media/tuners/tda18271-common.c index 054b3b747dae..d46a2e775e82 100644 --- a/drivers/media/tuners/tda18271-common.c +++ b/drivers/media/tuners/tda18271-common.c | |||
| @@ -528,14 +528,14 @@ int tda18271_init_regs(struct dvb_frontend *fe) | |||
| 528 | * Standby modes, EP3 [7:5] | 528 | * Standby modes, EP3 [7:5] |
| 529 | * | 529 | * |
| 530 | * | SM || SM_LT || SM_XT || mode description | 530 | * | SM || SM_LT || SM_XT || mode description |
| 531 | * |=====\\=======\\=======\\=================================== | 531 | * |=====\\=======\\=======\\==================================== |
| 532 | * | 0 || 0 || 0 || normal mode | 532 | * | 0 || 0 || 0 || normal mode |
| 533 | * |-----||-------||-------||----------------------------------- | 533 | * |-----||-------||-------||------------------------------------ |
| 534 | * | || || || standby mode w/ slave tuner output | 534 | * | || || || standby mode w/ slave tuner output |
| 535 | * | 1 || 0 || 0 || & loop thru & xtal oscillator on | 535 | * | 1 || 0 || 0 || & loop through & xtal oscillator on |
| 536 | * |-----||-------||-------||----------------------------------- | 536 | * |-----||-------||-------||------------------------------------ |
| 537 | * | 1 || 1 || 0 || standby mode w/ xtal oscillator on | 537 | * | 1 || 1 || 0 || standby mode w/ xtal oscillator on |
| 538 | * |-----||-------||-------||----------------------------------- | 538 | * |-----||-------||-------||------------------------------------ |
| 539 | * | 1 || 1 || 1 || power off | 539 | * | 1 || 1 || 1 || power off |
| 540 | * | 540 | * |
| 541 | */ | 541 | */ |
diff --git a/drivers/media/tuners/tda18271-fe.c b/drivers/media/tuners/tda18271-fe.c index 4d69029229e4..cac6b8e62b73 100644 --- a/drivers/media/tuners/tda18271-fe.c +++ b/drivers/media/tuners/tda18271-fe.c | |||
| @@ -48,7 +48,7 @@ static int tda18271_toggle_output(struct dvb_frontend *fe, int standby) | |||
| 48 | if (tda_fail(ret)) | 48 | if (tda_fail(ret)) |
| 49 | goto fail; | 49 | goto fail; |
| 50 | 50 | ||
| 51 | tda_dbg("%s mode: xtal oscillator %s, slave tuner loop thru %s\n", | 51 | tda_dbg("%s mode: xtal oscillator %s, slave tuner loop through %s\n", |
| 52 | standby ? "standby" : "active", | 52 | standby ? "standby" : "active", |
| 53 | priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on", | 53 | priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on", |
| 54 | priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on"); | 54 | priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on"); |
diff --git a/drivers/media/tuners/tda18271.h b/drivers/media/tuners/tda18271.h index 7e07966c5ace..1a23532586ef 100644 --- a/drivers/media/tuners/tda18271.h +++ b/drivers/media/tuners/tda18271.h | |||
| @@ -69,10 +69,10 @@ enum tda18271_i2c_gate { | |||
| 69 | }; | 69 | }; |
| 70 | 70 | ||
| 71 | enum tda18271_output_options { | 71 | enum tda18271_output_options { |
| 72 | /* slave tuner output & loop thru & xtal oscillator always on */ | 72 | /* slave tuner output & loop through & xtal oscillator always on */ |
| 73 | TDA18271_OUTPUT_LT_XT_ON = 0, | 73 | TDA18271_OUTPUT_LT_XT_ON = 0, |
| 74 | 74 | ||
| 75 | /* slave tuner output loop thru off */ | 75 | /* slave tuner output loop through off */ |
| 76 | TDA18271_OUTPUT_LT_OFF = 1, | 76 | TDA18271_OUTPUT_LT_OFF = 1, |
| 77 | 77 | ||
| 78 | /* xtal oscillator off */ | 78 | /* xtal oscillator off */ |
diff --git a/drivers/media/tuners/xc4000.c b/drivers/media/tuners/xc4000.c index eb6d65dae748..a351390ee744 100644 --- a/drivers/media/tuners/xc4000.c +++ b/drivers/media/tuners/xc4000.c | |||
| @@ -1471,8 +1471,8 @@ static int xc4000_get_signal(struct dvb_frontend *fe, u16 *strength) | |||
| 1471 | if (rc < 0) | 1471 | if (rc < 0) |
| 1472 | goto ret; | 1472 | goto ret; |
| 1473 | 1473 | ||
| 1474 | /* Informations from real testing of DVB-T and radio part, | 1474 | /* Information from real testing of DVB-T and radio part, |
| 1475 | coeficient for one dB is 0xff. | 1475 | coefficient for one dB is 0xff. |
| 1476 | */ | 1476 | */ |
| 1477 | tuner_dbg("Signal strength: -%ddB (%05d)\n", value >> 8, value); | 1477 | tuner_dbg("Signal strength: -%ddB (%05d)\n", value >> 8, value); |
| 1478 | 1478 | ||
diff --git a/drivers/media/usb/au0828/au0828-core.c b/drivers/media/usb/au0828/au0828-core.c index 1fdb1601dc65..3f8c92a70116 100644 --- a/drivers/media/usb/au0828/au0828-core.c +++ b/drivers/media/usb/au0828/au0828-core.c | |||
| @@ -234,7 +234,7 @@ static void au0828_media_graph_notify(struct media_entity *new, | |||
| 234 | if (!new) { | 234 | if (!new) { |
| 235 | /* | 235 | /* |
| 236 | * Called during au0828 probe time to connect | 236 | * Called during au0828 probe time to connect |
| 237 | * entites that were created prior to registering | 237 | * entities that were created prior to registering |
| 238 | * the notify handler. Find mixer and decoder. | 238 | * the notify handler. Find mixer and decoder. |
| 239 | */ | 239 | */ |
| 240 | media_device_for_each_entity(entity, dev->media_dev) { | 240 | media_device_for_each_entity(entity, dev->media_dev) { |
diff --git a/drivers/media/usb/au0828/au0828-dvb.c b/drivers/media/usb/au0828/au0828-dvb.c index d9093a3c57c5..6e43028112d1 100644 --- a/drivers/media/usb/au0828/au0828-dvb.c +++ b/drivers/media/usb/au0828/au0828-dvb.c | |||
| @@ -566,7 +566,7 @@ void au0828_dvb_unregister(struct au0828_dev *dev) | |||
| 566 | dvb->frontend = NULL; | 566 | dvb->frontend = NULL; |
| 567 | } | 567 | } |
| 568 | 568 | ||
| 569 | /* All the DVB attach calls go here, this function get's modified | 569 | /* All the DVB attach calls go here, this function gets modified |
| 570 | * for each new card. No other function in this file needs | 570 | * for each new card. No other function in this file needs |
| 571 | * to change. | 571 | * to change. |
| 572 | */ | 572 | */ |
diff --git a/drivers/media/usb/au0828/au0828.h b/drivers/media/usb/au0828/au0828.h index 004eadef55c7..425c35d16057 100644 --- a/drivers/media/usb/au0828/au0828.h +++ b/drivers/media/usb/au0828/au0828.h | |||
| @@ -52,7 +52,7 @@ | |||
| 52 | 52 | ||
| 53 | #define AU0828_INTERLACED_DEFAULT 1 | 53 | #define AU0828_INTERLACED_DEFAULT 1 |
| 54 | 54 | ||
| 55 | /* Defination for AU0828 USB transfer */ | 55 | /* Definition for AU0828 USB transfer */ |
| 56 | #define AU0828_MAX_ISO_BUFS 12 /* maybe resize this value in the future */ | 56 | #define AU0828_MAX_ISO_BUFS 12 /* maybe resize this value in the future */ |
| 57 | #define AU0828_ISO_PACKETS_PER_URB 128 | 57 | #define AU0828_ISO_PACKETS_PER_URB 128 |
| 58 | 58 | ||
diff --git a/drivers/media/usb/cpia2/cpia2.h b/drivers/media/usb/cpia2/cpia2.h index ab238ac8bfc0..d0a464882510 100644 --- a/drivers/media/usb/cpia2/cpia2.h +++ b/drivers/media/usb/cpia2/cpia2.h | |||
| @@ -350,7 +350,7 @@ struct cpia2_sbuf { | |||
| 350 | }; | 350 | }; |
| 351 | 351 | ||
| 352 | struct framebuf { | 352 | struct framebuf { |
| 353 | struct timeval timestamp; | 353 | u64 ts; |
| 354 | unsigned long seq; | 354 | unsigned long seq; |
| 355 | int num; | 355 | int num; |
| 356 | int length; | 356 | int length; |
diff --git a/drivers/media/usb/cpia2/cpia2_usb.c b/drivers/media/usb/cpia2/cpia2_usb.c index a771e0a52610..e5d8dee38fe4 100644 --- a/drivers/media/usb/cpia2/cpia2_usb.c +++ b/drivers/media/usb/cpia2/cpia2_usb.c | |||
| @@ -324,7 +324,7 @@ static void cpia2_usb_complete(struct urb *urb) | |||
| 324 | continue; | 324 | continue; |
| 325 | } | 325 | } |
| 326 | DBG("Start of frame pattern found\n"); | 326 | DBG("Start of frame pattern found\n"); |
| 327 | v4l2_get_timestamp(&cam->workbuff->timestamp); | 327 | cam->workbuff->ts = ktime_get_ns(); |
| 328 | cam->workbuff->seq = cam->frame_count++; | 328 | cam->workbuff->seq = cam->frame_count++; |
| 329 | cam->workbuff->data[0] = 0xFF; | 329 | cam->workbuff->data[0] = 0xFF; |
| 330 | cam->workbuff->data[1] = 0xD8; | 330 | cam->workbuff->data[1] = 0xD8; |
diff --git a/drivers/media/usb/cpia2/cpia2_v4l.c b/drivers/media/usb/cpia2/cpia2_v4l.c index 748739c2b8b2..95c0bd4a19dc 100644 --- a/drivers/media/usb/cpia2/cpia2_v4l.c +++ b/drivers/media/usb/cpia2/cpia2_v4l.c | |||
| @@ -833,7 +833,7 @@ static int cpia2_querybuf(struct file *file, void *fh, struct v4l2_buffer *buf) | |||
| 833 | break; | 833 | break; |
| 834 | case FRAME_READY: | 834 | case FRAME_READY: |
| 835 | buf->bytesused = cam->buffers[buf->index].length; | 835 | buf->bytesused = cam->buffers[buf->index].length; |
| 836 | buf->timestamp = cam->buffers[buf->index].timestamp; | 836 | buf->timestamp = ns_to_timeval(cam->buffers[buf->index].ts); |
| 837 | buf->sequence = cam->buffers[buf->index].seq; | 837 | buf->sequence = cam->buffers[buf->index].seq; |
| 838 | buf->flags = V4L2_BUF_FLAG_DONE; | 838 | buf->flags = V4L2_BUF_FLAG_DONE; |
| 839 | break; | 839 | break; |
| @@ -889,12 +889,7 @@ static int find_earliest_filled_buffer(struct camera_data *cam) | |||
| 889 | found = i; | 889 | found = i; |
| 890 | } else { | 890 | } else { |
| 891 | /* find which buffer is earlier */ | 891 | /* find which buffer is earlier */ |
| 892 | struct timeval *tv1, *tv2; | 892 | if (cam->buffers[i].ts < cam->buffers[found].ts) |
| 893 | tv1 = &cam->buffers[i].timestamp; | ||
| 894 | tv2 = &cam->buffers[found].timestamp; | ||
| 895 | if(tv1->tv_sec < tv2->tv_sec || | ||
| 896 | (tv1->tv_sec == tv2->tv_sec && | ||
| 897 | tv1->tv_usec < tv2->tv_usec)) | ||
| 898 | found = i; | 893 | found = i; |
| 899 | } | 894 | } |
| 900 | } | 895 | } |
| @@ -945,7 +940,7 @@ static int cpia2_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) | |||
| 945 | buf->flags = V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_DONE | 940 | buf->flags = V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_DONE |
| 946 | | V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | 941 | | V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
| 947 | buf->field = V4L2_FIELD_NONE; | 942 | buf->field = V4L2_FIELD_NONE; |
| 948 | buf->timestamp = cam->buffers[buf->index].timestamp; | 943 | buf->timestamp = ns_to_timeval(cam->buffers[buf->index].ts); |
| 949 | buf->sequence = cam->buffers[buf->index].seq; | 944 | buf->sequence = cam->buffers[buf->index].seq; |
| 950 | buf->m.offset = cam->buffers[buf->index].data - cam->frame_buffer; | 945 | buf->m.offset = cam->buffers[buf->index].data - cam->frame_buffer; |
| 951 | buf->length = cam->frame_size; | 946 | buf->length = cam->frame_size; |
diff --git a/drivers/media/usb/cx231xx/cx231xx-417.c b/drivers/media/usb/cx231xx/cx231xx-417.c index 1c48c497bd6a..0f8ae81f4820 100644 --- a/drivers/media/usb/cx231xx/cx231xx-417.c +++ b/drivers/media/usb/cx231xx/cx231xx-417.c | |||
| @@ -1316,7 +1316,7 @@ static void buffer_copy(struct cx231xx *dev, char *data, int len, struct urb *ur | |||
| 1316 | 1316 | ||
| 1317 | buf->vb.state = VIDEOBUF_DONE; | 1317 | buf->vb.state = VIDEOBUF_DONE; |
| 1318 | buf->vb.field_count++; | 1318 | buf->vb.field_count++; |
| 1319 | v4l2_get_timestamp(&buf->vb.ts); | 1319 | buf->vb.ts = ktime_get_ns(); |
| 1320 | list_del(&buf->vb.queue); | 1320 | list_del(&buf->vb.queue); |
| 1321 | wake_up(&buf->vb.done); | 1321 | wake_up(&buf->vb.done); |
| 1322 | dma_q->mpeg_buffer_completed = 0; | 1322 | dma_q->mpeg_buffer_completed = 0; |
| @@ -1347,7 +1347,7 @@ static void buffer_filled(char *data, int len, struct urb *urb, | |||
| 1347 | memcpy(vbuf, data, len); | 1347 | memcpy(vbuf, data, len); |
| 1348 | buf->vb.state = VIDEOBUF_DONE; | 1348 | buf->vb.state = VIDEOBUF_DONE; |
| 1349 | buf->vb.field_count++; | 1349 | buf->vb.field_count++; |
| 1350 | v4l2_get_timestamp(&buf->vb.ts); | 1350 | buf->vb.ts = ktime_get_ns(); |
| 1351 | list_del(&buf->vb.queue); | 1351 | list_del(&buf->vb.queue); |
| 1352 | wake_up(&buf->vb.done); | 1352 | wake_up(&buf->vb.done); |
| 1353 | } | 1353 | } |
diff --git a/drivers/media/usb/cx231xx/cx231xx-avcore.c b/drivers/media/usb/cx231xx/cx231xx-avcore.c index fdd3c221fa0d..3374888b3021 100644 --- a/drivers/media/usb/cx231xx/cx231xx-avcore.c +++ b/drivers/media/usb/cx231xx/cx231xx-avcore.c | |||
| @@ -2987,7 +2987,7 @@ int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev) | |||
| 2987 | { | 2987 | { |
| 2988 | int status = 0; | 2988 | int status = 0; |
| 2989 | 2989 | ||
| 2990 | /* set SDA to ouput */ | 2990 | /* set SDA to output */ |
| 2991 | dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; | 2991 | dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; |
| 2992 | status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); | 2992 | status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); |
| 2993 | 2993 | ||
diff --git a/drivers/media/usb/cx231xx/cx231xx-pcb-cfg.h b/drivers/media/usb/cx231xx/cx231xx-pcb-cfg.h index 8f00b1d38277..bb4f817be0c5 100644 --- a/drivers/media/usb/cx231xx/cx231xx-pcb-cfg.h +++ b/drivers/media/usb/cx231xx/cx231xx-pcb-cfg.h | |||
| @@ -86,7 +86,7 @@ enum TS_PORT{ | |||
| 86 | #define EAVP_MASK 0x8 | 86 | #define EAVP_MASK 0x8 |
| 87 | enum EAV_PRESENT{ | 87 | enum EAV_PRESENT{ |
| 88 | NO_EXTERNAL_AV = 0x0, /* 0: No External A/V inputs | 88 | NO_EXTERNAL_AV = 0x0, /* 0: No External A/V inputs |
| 89 | (no need for i2s blcok), | 89 | (no need for i2s block), |
| 90 | Analog Tuner must be present */ | 90 | Analog Tuner must be present */ |
| 91 | EXTERNAL_AV = 0x8 /* 1: External A/V inputs | 91 | EXTERNAL_AV = 0x8 /* 1: External A/V inputs |
| 92 | present (requires i2s blk) */ | 92 | present (requires i2s blk) */ |
diff --git a/drivers/media/usb/cx231xx/cx231xx-vbi.c b/drivers/media/usb/cx231xx/cx231xx-vbi.c index 10b2eb7338ad..d16b73c04445 100644 --- a/drivers/media/usb/cx231xx/cx231xx-vbi.c +++ b/drivers/media/usb/cx231xx/cx231xx-vbi.c | |||
| @@ -528,7 +528,7 @@ static inline void vbi_buffer_filled(struct cx231xx *dev, | |||
| 528 | 528 | ||
| 529 | buf->vb.state = VIDEOBUF_DONE; | 529 | buf->vb.state = VIDEOBUF_DONE; |
| 530 | buf->vb.field_count++; | 530 | buf->vb.field_count++; |
| 531 | v4l2_get_timestamp(&buf->vb.ts); | 531 | buf->vb.ts = ktime_get_ns(); |
| 532 | 532 | ||
| 533 | dev->vbi_mode.bulk_ctl.buf = NULL; | 533 | dev->vbi_mode.bulk_ctl.buf = NULL; |
| 534 | 534 | ||
diff --git a/drivers/media/usb/cx231xx/cx231xx-video.c b/drivers/media/usb/cx231xx/cx231xx-video.c index 0d451c4ea3b9..aebbaf9d92a6 100644 --- a/drivers/media/usb/cx231xx/cx231xx-video.c +++ b/drivers/media/usb/cx231xx/cx231xx-video.c | |||
| @@ -182,7 +182,7 @@ static inline void buffer_filled(struct cx231xx *dev, | |||
| 182 | cx231xx_isocdbg("[%p/%d] wakeup\n", buf, buf->vb.i); | 182 | cx231xx_isocdbg("[%p/%d] wakeup\n", buf, buf->vb.i); |
| 183 | buf->vb.state = VIDEOBUF_DONE; | 183 | buf->vb.state = VIDEOBUF_DONE; |
| 184 | buf->vb.field_count++; | 184 | buf->vb.field_count++; |
| 185 | v4l2_get_timestamp(&buf->vb.ts); | 185 | buf->vb.ts = ktime_get_ns(); |
| 186 | 186 | ||
| 187 | if (dev->USE_ISO) | 187 | if (dev->USE_ISO) |
| 188 | dev->video_mode.isoc_ctl.buf = NULL; | 188 | dev->video_mode.isoc_ctl.buf = NULL; |
diff --git a/drivers/media/usb/cx231xx/cx231xx.h b/drivers/media/usb/cx231xx/cx231xx.h index fa640bf20111..86b7f57492b1 100644 --- a/drivers/media/usb/cx231xx/cx231xx.h +++ b/drivers/media/usb/cx231xx/cx231xx.h | |||
| @@ -646,7 +646,7 @@ struct cx231xx { | |||
| 646 | /* frame properties */ | 646 | /* frame properties */ |
| 647 | int width; /* current frame width */ | 647 | int width; /* current frame width */ |
| 648 | int height; /* current frame height */ | 648 | int height; /* current frame height */ |
| 649 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ | 649 | int interlaced; /* 1=interlace fields, 0=just top fields */ |
| 650 | 650 | ||
| 651 | struct cx231xx_audio adev; | 651 | struct cx231xx_audio adev; |
| 652 | 652 | ||
diff --git a/drivers/media/usb/dvb-usb-v2/dvb_usb.h b/drivers/media/usb/dvb-usb-v2/dvb_usb.h index 3fd6cc0d6340..728ef5f3ada2 100644 --- a/drivers/media/usb/dvb-usb-v2/dvb_usb.h +++ b/drivers/media/usb/dvb-usb-v2/dvb_usb.h | |||
| @@ -146,7 +146,7 @@ struct dvb_usb_rc { | |||
| 146 | }; | 146 | }; |
| 147 | 147 | ||
| 148 | /** | 148 | /** |
| 149 | * usb streaming configration for adapter | 149 | * usb streaming configuration for adapter |
| 150 | * @type: urb type | 150 | * @type: urb type |
| 151 | * @count: count of used urbs | 151 | * @count: count of used urbs |
| 152 | * @endpoint: stream usb endpoint number | 152 | * @endpoint: stream usb endpoint number |
diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.c b/drivers/media/usb/dvb-usb-v2/lmedm04.c index 602013cf3e69..15944b95970f 100644 --- a/drivers/media/usb/dvb-usb-v2/lmedm04.c +++ b/drivers/media/usb/dvb-usb-v2/lmedm04.c | |||
| @@ -308,7 +308,7 @@ static void lme2510_int_response(struct urb *lme_urb) | |||
| 308 | 308 | ||
| 309 | switch (ibuf[0]) { | 309 | switch (ibuf[0]) { |
| 310 | case 0xaa: | 310 | case 0xaa: |
| 311 | debug_data_snipet(1, "INT Remote data snipet", ibuf); | 311 | debug_data_snipet(1, "INT Remote data snippet", ibuf); |
| 312 | if (!adap_to_d(adap)->rc_dev) | 312 | if (!adap_to_d(adap)->rc_dev) |
| 313 | break; | 313 | break; |
| 314 | 314 | ||
| @@ -358,13 +358,13 @@ static void lme2510_int_response(struct urb *lme_urb) | |||
| 358 | 358 | ||
| 359 | lme2510_update_stats(adap); | 359 | lme2510_update_stats(adap); |
| 360 | 360 | ||
| 361 | debug_data_snipet(5, "INT Remote data snipet in", ibuf); | 361 | debug_data_snipet(5, "INT Remote data snippet in", ibuf); |
| 362 | break; | 362 | break; |
| 363 | case 0xcc: | 363 | case 0xcc: |
| 364 | debug_data_snipet(1, "INT Control data snipet", ibuf); | 364 | debug_data_snipet(1, "INT Control data snippet", ibuf); |
| 365 | break; | 365 | break; |
| 366 | default: | 366 | default: |
| 367 | debug_data_snipet(1, "INT Unknown data snipet", ibuf); | 367 | debug_data_snipet(1, "INT Unknown data snippet", ibuf); |
| 368 | break; | 368 | break; |
| 369 | } | 369 | } |
| 370 | } | 370 | } |
diff --git a/drivers/media/usb/dvb-usb-v2/mxl111sf.c b/drivers/media/usb/dvb-usb-v2/mxl111sf.c index 85cdf593a9ad..5e2d53af68c7 100644 --- a/drivers/media/usb/dvb-usb-v2/mxl111sf.c +++ b/drivers/media/usb/dvb-usb-v2/mxl111sf.c | |||
| @@ -140,7 +140,7 @@ int mxl111sf_write_reg_mask(struct mxl111sf_state *state, | |||
| 140 | if (mask != 0xff) { | 140 | if (mask != 0xff) { |
| 141 | ret = mxl111sf_read_reg(state, addr, &val); | 141 | ret = mxl111sf_read_reg(state, addr, &val); |
| 142 | #if 1 | 142 | #if 1 |
| 143 | /* dont know why this usually errors out on the first try */ | 143 | /* don't know why this usually errors out on the first try */ |
| 144 | if (mxl_fail(ret)) | 144 | if (mxl_fail(ret)) |
| 145 | pr_err("error writing addr: 0x%02x, mask: 0x%02x, data: 0x%02x, retrying...", | 145 | pr_err("error writing addr: 0x%02x, mask: 0x%02x, data: 0x%02x, retrying...", |
| 146 | addr, mask, data); | 146 | addr, mask, data); |
| @@ -783,7 +783,7 @@ static int mxl111sf_attach_demod(struct dvb_usb_adapter *adap, u8 fe_id) | |||
| 783 | if (mxl_fail(ret)) | 783 | if (mxl_fail(ret)) |
| 784 | goto fail; | 784 | goto fail; |
| 785 | 785 | ||
| 786 | /* dont care if this fails */ | 786 | /* don't care if this fails */ |
| 787 | mxl111sf_init_port_expander(state); | 787 | mxl111sf_init_port_expander(state); |
| 788 | 788 | ||
| 789 | adap->fe[fe_id] = dvb_attach(mxl111sf_demod_attach, state, | 789 | adap->fe[fe_id] = dvb_attach(mxl111sf_demod_attach, state, |
diff --git a/drivers/media/usb/dvb-usb/af9005.c b/drivers/media/usb/dvb-usb/af9005.c index 16e946e01d2c..0638d907c73e 100644 --- a/drivers/media/usb/dvb-usb/af9005.c +++ b/drivers/media/usb/dvb-usb/af9005.c | |||
| @@ -845,7 +845,7 @@ static int af9005_rc_query(struct dvb_usb_device *d, u32 * event, int *state) | |||
| 845 | 845 | ||
| 846 | /* deb_info("rc_query\n"); */ | 846 | /* deb_info("rc_query\n"); */ |
| 847 | st->data[0] = 3; /* rest of packet length low */ | 847 | st->data[0] = 3; /* rest of packet length low */ |
| 848 | st->data[1] = 0; /* rest of packet lentgh high */ | 848 | st->data[1] = 0; /* rest of packet length high */ |
| 849 | st->data[2] = 0x40; /* read remote */ | 849 | st->data[2] = 0x40; /* read remote */ |
| 850 | st->data[3] = 1; /* rest of packet length */ | 850 | st->data[3] = 1; /* rest of packet length */ |
| 851 | st->data[4] = seq = st->sequence++; /* sequence number */ | 851 | st->data[4] = seq = st->sequence++; /* sequence number */ |
diff --git a/drivers/media/usb/dvb-usb/cinergyT2-fe.c b/drivers/media/usb/dvb-usb/cinergyT2-fe.c index df71df7ed524..4c9f83ba260d 100644 --- a/drivers/media/usb/dvb-usb/cinergyT2-fe.c +++ b/drivers/media/usb/dvb-usb/cinergyT2-fe.c | |||
| @@ -33,7 +33,7 @@ | |||
| 33 | * This function is probably reusable and may better get placed in a support | 33 | * This function is probably reusable and may better get placed in a support |
| 34 | * library. | 34 | * library. |
| 35 | * | 35 | * |
| 36 | * We replace errornous fields by default TPS fields (the ones with value 0). | 36 | * We replace erroneous fields by default TPS fields (the ones with value 0). |
| 37 | */ | 37 | */ |
| 38 | 38 | ||
| 39 | static uint16_t compute_tps(struct dtv_frontend_properties *op) | 39 | static uint16_t compute_tps(struct dtv_frontend_properties *op) |
diff --git a/drivers/media/usb/dvb-usb/cxusb.c b/drivers/media/usb/dvb-usb/cxusb.c index a51a45c60233..9ddb2000249e 100644 --- a/drivers/media/usb/dvb-usb/cxusb.c +++ b/drivers/media/usb/dvb-usb/cxusb.c | |||
| @@ -1016,7 +1016,7 @@ static int cxusb_dualdig4_rev2_tuner_attach(struct dvb_usb_adapter *adap) | |||
| 1016 | /* | 1016 | /* |
| 1017 | * No need to call dvb7000p_attach here, as it was called | 1017 | * No need to call dvb7000p_attach here, as it was called |
| 1018 | * already, as frontend_attach method is called first, and | 1018 | * already, as frontend_attach method is called first, and |
| 1019 | * tuner_attach is only called on sucess. | 1019 | * tuner_attach is only called on success. |
| 1020 | */ | 1020 | */ |
| 1021 | tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, | 1021 | tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, |
| 1022 | DIBX000_I2C_INTERFACE_TUNER, 1); | 1022 | DIBX000_I2C_INTERFACE_TUNER, 1); |
diff --git a/drivers/media/usb/dvb-usb/dvb-usb-init.c b/drivers/media/usb/dvb-usb/dvb-usb-init.c index 40ca4eafb137..99951e02a880 100644 --- a/drivers/media/usb/dvb-usb/dvb-usb-init.c +++ b/drivers/media/usb/dvb-usb/dvb-usb-init.c | |||
| @@ -98,7 +98,7 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs) | |||
| 98 | 98 | ||
| 99 | /* | 99 | /* |
| 100 | * when reloading the driver w/o replugging the device | 100 | * when reloading the driver w/o replugging the device |
| 101 | * sometimes a timeout occures, this helps | 101 | * sometimes a timeout occurs, this helps |
| 102 | */ | 102 | */ |
| 103 | if (d->props.generic_bulk_ctrl_endpoint != 0) { | 103 | if (d->props.generic_bulk_ctrl_endpoint != 0) { |
| 104 | usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint)); | 104 | usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint)); |
diff --git a/drivers/media/usb/dvb-usb/dvb-usb.h b/drivers/media/usb/dvb-usb/dvb-usb.h index 317ed6a82d19..32829bdd5f22 100644 --- a/drivers/media/usb/dvb-usb/dvb-usb.h +++ b/drivers/media/usb/dvb-usb/dvb-usb.h | |||
| @@ -336,7 +336,7 @@ struct usb_data_stream { | |||
| 336 | * struct dvb_usb_adapter - a DVB adapter on a USB device | 336 | * struct dvb_usb_adapter - a DVB adapter on a USB device |
| 337 | * @id: index of this adapter (starting with 0). | 337 | * @id: index of this adapter (starting with 0). |
| 338 | * | 338 | * |
| 339 | * @feedcount: number of reqested feeds (used for streaming-activation) | 339 | * @feedcount: number of requested feeds (used for streaming-activation) |
| 340 | * @pid_filtering: is hardware pid_filtering used or not. | 340 | * @pid_filtering: is hardware pid_filtering used or not. |
| 341 | * | 341 | * |
| 342 | * @pll_addr: I2C address of the tuner for programming | 342 | * @pll_addr: I2C address of the tuner for programming |
diff --git a/drivers/media/usb/dvb-usb/pctv452e.c b/drivers/media/usb/dvb-usb/pctv452e.c index 0af74383083d..150081128196 100644 --- a/drivers/media/usb/dvb-usb/pctv452e.c +++ b/drivers/media/usb/dvb-usb/pctv452e.c | |||
| @@ -528,13 +528,13 @@ static int pctv452e_power_ctrl(struct dvb_usb_device *d, int i) | |||
| 528 | 528 | ||
| 529 | rx = b0 + 5; | 529 | rx = b0 + 5; |
| 530 | 530 | ||
| 531 | /* hmm where shoud this should go? */ | 531 | /* hmm where should this should go? */ |
| 532 | ret = usb_set_interface(d->udev, 0, ISOC_INTERFACE_ALTERNATIVE); | 532 | ret = usb_set_interface(d->udev, 0, ISOC_INTERFACE_ALTERNATIVE); |
| 533 | if (ret != 0) | 533 | if (ret != 0) |
| 534 | info("%s: Warning set interface returned: %d\n", | 534 | info("%s: Warning set interface returned: %d\n", |
| 535 | __func__, ret); | 535 | __func__, ret); |
| 536 | 536 | ||
| 537 | /* this is a one-time initialization, dont know where to put */ | 537 | /* this is a one-time initialization, don't know where to put */ |
| 538 | b0[0] = 0xaa; | 538 | b0[0] = 0xaa; |
| 539 | b0[1] = state->c++; | 539 | b0[1] = state->c++; |
| 540 | b0[2] = PCTV_CMD_RESET; | 540 | b0[2] = PCTV_CMD_RESET; |
diff --git a/drivers/media/usb/em28xx/em28xx-i2c.c b/drivers/media/usb/em28xx/em28xx-i2c.c index 02c13d71e6c1..a3155ec196cc 100644 --- a/drivers/media/usb/em28xx/em28xx-i2c.c +++ b/drivers/media/usb/em28xx/em28xx-i2c.c | |||
| @@ -296,7 +296,7 @@ static int em28xx_i2c_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len) | |||
| 296 | return ret; | 296 | return ret; |
| 297 | } | 297 | } |
| 298 | /* | 298 | /* |
| 299 | * NOTE: some devices with two i2c busses have the bad habit to return 0 | 299 | * NOTE: some devices with two i2c buses have the bad habit to return 0 |
| 300 | * bytes if we are on bus B AND there was no write attempt to the | 300 | * bytes if we are on bus B AND there was no write attempt to the |
| 301 | * specified slave address before AND no device is present at the | 301 | * specified slave address before AND no device is present at the |
| 302 | * requested slave address. | 302 | * requested slave address. |
| @@ -427,7 +427,7 @@ static int em25xx_bus_B_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, | |||
| 427 | return ret; | 427 | return ret; |
| 428 | } | 428 | } |
| 429 | /* | 429 | /* |
| 430 | * NOTE: some devices with two i2c busses have the bad habit to return 0 | 430 | * NOTE: some devices with two i2c buses have the bad habit to return 0 |
| 431 | * bytes if we are on bus B AND there was no write attempt to the | 431 | * bytes if we are on bus B AND there was no write attempt to the |
| 432 | * specified slave address before AND no device is present at the | 432 | * specified slave address before AND no device is present at the |
| 433 | * requested slave address. | 433 | * requested slave address. |
diff --git a/drivers/media/usb/em28xx/em28xx-reg.h b/drivers/media/usb/em28xx/em28xx-reg.h index f53afe18e92d..d7c60862874a 100644 --- a/drivers/media/usb/em28xx/em28xx-reg.h +++ b/drivers/media/usb/em28xx/em28xx-reg.h | |||
| @@ -67,7 +67,7 @@ | |||
| 67 | #define EM28XX_I2C_CLK_WAIT_ENABLE 0x40 | 67 | #define EM28XX_I2C_CLK_WAIT_ENABLE 0x40 |
| 68 | #define EM28XX_I2C_EEPROM_ON_BOARD 0x08 | 68 | #define EM28XX_I2C_EEPROM_ON_BOARD 0x08 |
| 69 | #define EM28XX_I2C_EEPROM_KEY_VALID 0x04 | 69 | #define EM28XX_I2C_EEPROM_KEY_VALID 0x04 |
| 70 | #define EM2874_I2C_SECONDARY_BUS_SELECT 0x04 /* em2874 has two i2c busses */ | 70 | #define EM2874_I2C_SECONDARY_BUS_SELECT 0x04 /* em2874 has two i2c buses */ |
| 71 | #define EM28XX_I2C_FREQ_1_5_MHZ 0x03 /* bus frequency (bits [1-0]) */ | 71 | #define EM28XX_I2C_FREQ_1_5_MHZ 0x03 /* bus frequency (bits [1-0]) */ |
| 72 | #define EM28XX_I2C_FREQ_25_KHZ 0x02 | 72 | #define EM28XX_I2C_FREQ_25_KHZ 0x02 |
| 73 | #define EM28XX_I2C_FREQ_400_KHZ 0x01 | 73 | #define EM28XX_I2C_FREQ_400_KHZ 0x01 |
diff --git a/drivers/media/usb/gspca/Kconfig b/drivers/media/usb/gspca/Kconfig index d3b6665c342d..088566e88467 100644 --- a/drivers/media/usb/gspca/Kconfig +++ b/drivers/media/usb/gspca/Kconfig | |||
| @@ -46,7 +46,7 @@ config USB_GSPCA_CPIA1 | |||
| 46 | depends on VIDEO_V4L2 && USB_GSPCA | 46 | depends on VIDEO_V4L2 && USB_GSPCA |
| 47 | help | 47 | help |
| 48 | Say Y here if you want support for USB cameras based on the cpia | 48 | Say Y here if you want support for USB cameras based on the cpia |
| 49 | CPiA chip. Note that you need atleast version 0.6.4 of libv4l for | 49 | CPiA chip. Note that you need at least version 0.6.4 of libv4l for |
| 50 | applications to understand the videoformat generated by this driver. | 50 | applications to understand the videoformat generated by this driver. |
| 51 | 51 | ||
| 52 | To compile this driver as a module, choose M here: the | 52 | To compile this driver as a module, choose M here: the |
diff --git a/drivers/media/usb/gspca/autogain_functions.c b/drivers/media/usb/gspca/autogain_functions.c index 6dfab2b077f7..f915cc7c0c63 100644 --- a/drivers/media/usb/gspca/autogain_functions.c +++ b/drivers/media/usb/gspca/autogain_functions.c | |||
| @@ -98,7 +98,7 @@ EXPORT_SYMBOL(gspca_expo_autogain); | |||
| 98 | 80 %) and if that does not help, only then changes exposure. This leads | 98 | 80 %) and if that does not help, only then changes exposure. This leads |
| 99 | to a much more stable image then using the knee algorithm which at | 99 | to a much more stable image then using the knee algorithm which at |
| 100 | certain points of the knee graph will only try to adjust exposure, | 100 | certain points of the knee graph will only try to adjust exposure, |
| 101 | which leads to oscilating as one exposure step is huge. | 101 | which leads to oscillating as one exposure step is huge. |
| 102 | 102 | ||
| 103 | Returns 0 if no changes were made, 1 if the gain and or exposure settings | 103 | Returns 0 if no changes were made, 1 if the gain and or exposure settings |
| 104 | where changed. */ | 104 | where changed. */ |
diff --git a/drivers/media/usb/gspca/benq.c b/drivers/media/usb/gspca/benq.c index 8a8db5eb6d5f..1744591b8ba0 100644 --- a/drivers/media/usb/gspca/benq.c +++ b/drivers/media/usb/gspca/benq.c | |||
| @@ -205,12 +205,12 @@ static void sd_isoc_irq(struct urb *urb) | |||
| 205 | * - 80 ba/bb 00 00 = start of image followed by 'ff d8' | 205 | * - 80 ba/bb 00 00 = start of image followed by 'ff d8' |
| 206 | * - 04 ba/bb oo oo = image piece | 206 | * - 04 ba/bb oo oo = image piece |
| 207 | * where 'oo oo' is the image offset | 207 | * where 'oo oo' is the image offset |
| 208 | (not cheked) | 208 | (not checked) |
| 209 | * - (other -> bad frame) | 209 | * - (other -> bad frame) |
| 210 | * The images are JPEG encoded with full header and | 210 | * The images are JPEG encoded with full header and |
| 211 | * normal ff escape. | 211 | * normal ff escape. |
| 212 | * The end of image ('ff d9') may occur in any URB. | 212 | * The end of image ('ff d9') may occur in any URB. |
| 213 | * (not cheked) | 213 | * (not checked) |
| 214 | */ | 214 | */ |
| 215 | data = (u8 *) urb0->transfer_buffer | 215 | data = (u8 *) urb0->transfer_buffer |
| 216 | + urb0->iso_frame_desc[i].offset; | 216 | + urb0->iso_frame_desc[i].offset; |
diff --git a/drivers/media/usb/gspca/cpia1.c b/drivers/media/usb/gspca/cpia1.c index 2b09af8865f4..7c817a4a93c4 100644 --- a/drivers/media/usb/gspca/cpia1.c +++ b/drivers/media/usb/gspca/cpia1.c | |||
| @@ -547,10 +547,14 @@ static int do_command(struct gspca_dev *gspca_dev, u16 command, | |||
| 547 | } | 547 | } |
| 548 | if (sd->params.qx3.button) { | 548 | if (sd->params.qx3.button) { |
| 549 | /* button pressed - unlock the latch */ | 549 | /* button pressed - unlock the latch */ |
| 550 | do_command(gspca_dev, CPIA_COMMAND_WriteMCPort, | 550 | ret = do_command(gspca_dev, CPIA_COMMAND_WriteMCPort, |
| 551 | 3, 0xdf, 0xdf, 0); | 551 | 3, 0xdf, 0xdf, 0); |
| 552 | do_command(gspca_dev, CPIA_COMMAND_WriteMCPort, | 552 | if (ret) |
| 553 | return ret; | ||
| 554 | ret = do_command(gspca_dev, CPIA_COMMAND_WriteMCPort, | ||
| 553 | 3, 0xff, 0xff, 0); | 555 | 3, 0xff, 0xff, 0); |
| 556 | if (ret) | ||
| 557 | return ret; | ||
| 554 | } | 558 | } |
| 555 | 559 | ||
| 556 | /* test whether microscope is cradled */ | 560 | /* test whether microscope is cradled */ |
| @@ -1430,6 +1434,7 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
| 1430 | { | 1434 | { |
| 1431 | struct sd *sd = (struct sd *) gspca_dev; | 1435 | struct sd *sd = (struct sd *) gspca_dev; |
| 1432 | struct cam *cam; | 1436 | struct cam *cam; |
| 1437 | int ret; | ||
| 1433 | 1438 | ||
| 1434 | sd->mainsFreq = FREQ_DEF == V4L2_CID_POWER_LINE_FREQUENCY_60HZ; | 1439 | sd->mainsFreq = FREQ_DEF == V4L2_CID_POWER_LINE_FREQUENCY_60HZ; |
| 1435 | reset_camera_params(gspca_dev); | 1440 | reset_camera_params(gspca_dev); |
| @@ -1441,7 +1446,10 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
| 1441 | cam->cam_mode = mode; | 1446 | cam->cam_mode = mode; |
| 1442 | cam->nmodes = ARRAY_SIZE(mode); | 1447 | cam->nmodes = ARRAY_SIZE(mode); |
| 1443 | 1448 | ||
| 1444 | goto_low_power(gspca_dev); | 1449 | ret = goto_low_power(gspca_dev); |
| 1450 | if (ret) | ||
| 1451 | gspca_err(gspca_dev, "Cannot go to low power mode: %d\n", | ||
| 1452 | ret); | ||
| 1445 | /* Check the firmware version. */ | 1453 | /* Check the firmware version. */ |
| 1446 | sd->params.version.firmwareVersion = 0; | 1454 | sd->params.version.firmwareVersion = 0; |
| 1447 | get_version_information(gspca_dev); | 1455 | get_version_information(gspca_dev); |
diff --git a/drivers/media/usb/gspca/gspca.c b/drivers/media/usb/gspca/gspca.c index 3137f5d89d80..ac70b36d67b7 100644 --- a/drivers/media/usb/gspca/gspca.c +++ b/drivers/media/usb/gspca/gspca.c | |||
| @@ -912,25 +912,32 @@ static void gspca_set_default_mode(struct gspca_dev *gspca_dev) | |||
| 912 | } | 912 | } |
| 913 | 913 | ||
| 914 | static int wxh_to_mode(struct gspca_dev *gspca_dev, | 914 | static int wxh_to_mode(struct gspca_dev *gspca_dev, |
| 915 | int width, int height) | 915 | int width, int height, u32 pixelformat) |
| 916 | { | 916 | { |
| 917 | int i; | 917 | int i; |
| 918 | 918 | ||
| 919 | for (i = 0; i < gspca_dev->cam.nmodes; i++) { | 919 | for (i = 0; i < gspca_dev->cam.nmodes; i++) { |
| 920 | if (width == gspca_dev->cam.cam_mode[i].width | 920 | if (width == gspca_dev->cam.cam_mode[i].width |
| 921 | && height == gspca_dev->cam.cam_mode[i].height) | 921 | && height == gspca_dev->cam.cam_mode[i].height |
| 922 | && pixelformat == gspca_dev->cam.cam_mode[i].pixelformat) | ||
| 922 | return i; | 923 | return i; |
| 923 | } | 924 | } |
| 924 | return -EINVAL; | 925 | return -EINVAL; |
| 925 | } | 926 | } |
| 926 | 927 | ||
| 927 | static int wxh_to_nearest_mode(struct gspca_dev *gspca_dev, | 928 | static int wxh_to_nearest_mode(struct gspca_dev *gspca_dev, |
| 928 | int width, int height) | 929 | int width, int height, u32 pixelformat) |
| 929 | { | 930 | { |
| 930 | int i; | 931 | int i; |
| 931 | 932 | ||
| 932 | for (i = gspca_dev->cam.nmodes; --i > 0; ) { | 933 | for (i = gspca_dev->cam.nmodes; --i > 0; ) { |
| 933 | if (width >= gspca_dev->cam.cam_mode[i].width | 934 | if (width >= gspca_dev->cam.cam_mode[i].width |
| 935 | && height >= gspca_dev->cam.cam_mode[i].height | ||
| 936 | && pixelformat == gspca_dev->cam.cam_mode[i].pixelformat) | ||
| 937 | return i; | ||
| 938 | } | ||
| 939 | for (i = gspca_dev->cam.nmodes; --i > 0; ) { | ||
| 940 | if (width >= gspca_dev->cam.cam_mode[i].width | ||
| 934 | && height >= gspca_dev->cam.cam_mode[i].height) | 941 | && height >= gspca_dev->cam.cam_mode[i].height) |
| 935 | break; | 942 | break; |
| 936 | } | 943 | } |
| @@ -1058,7 +1065,7 @@ static int try_fmt_vid_cap(struct gspca_dev *gspca_dev, | |||
| 1058 | fmt->fmt.pix.pixelformat, w, h); | 1065 | fmt->fmt.pix.pixelformat, w, h); |
| 1059 | 1066 | ||
| 1060 | /* search the nearest mode for width and height */ | 1067 | /* search the nearest mode for width and height */ |
| 1061 | mode = wxh_to_nearest_mode(gspca_dev, w, h); | 1068 | mode = wxh_to_nearest_mode(gspca_dev, w, h, fmt->fmt.pix.pixelformat); |
| 1062 | 1069 | ||
| 1063 | /* OK if right palette */ | 1070 | /* OK if right palette */ |
| 1064 | if (gspca_dev->cam.cam_mode[mode].pixelformat | 1071 | if (gspca_dev->cam.cam_mode[mode].pixelformat |
| @@ -1152,7 +1159,8 @@ static int vidioc_enum_frameintervals(struct file *filp, void *priv, | |||
| 1152 | int mode; | 1159 | int mode; |
| 1153 | __u32 i; | 1160 | __u32 i; |
| 1154 | 1161 | ||
| 1155 | mode = wxh_to_mode(gspca_dev, fival->width, fival->height); | 1162 | mode = wxh_to_mode(gspca_dev, fival->width, fival->height, |
| 1163 | fival->pixel_format); | ||
| 1156 | if (mode < 0) | 1164 | if (mode < 0) |
| 1157 | return -EINVAL; | 1165 | return -EINVAL; |
| 1158 | 1166 | ||
diff --git a/drivers/media/usb/gspca/m5602/m5602_mt9m111.c b/drivers/media/usb/gspca/m5602/m5602_mt9m111.c index c9947c4a0f63..8fac814f4779 100644 --- a/drivers/media/usb/gspca/m5602/m5602_mt9m111.c +++ b/drivers/media/usb/gspca/m5602/m5602_mt9m111.c | |||
| @@ -199,7 +199,7 @@ static const struct v4l2_ctrl_config mt9m111_greenbal_cfg = { | |||
| 199 | int mt9m111_probe(struct sd *sd) | 199 | int mt9m111_probe(struct sd *sd) |
| 200 | { | 200 | { |
| 201 | u8 data[2] = {0x00, 0x00}; | 201 | u8 data[2] = {0x00, 0x00}; |
| 202 | int i; | 202 | int i, rc = 0; |
| 203 | struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; | 203 | struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; |
| 204 | 204 | ||
| 205 | if (force_sensor) { | 205 | if (force_sensor) { |
| @@ -217,16 +217,18 @@ int mt9m111_probe(struct sd *sd) | |||
| 217 | /* Do the preinit */ | 217 | /* Do the preinit */ |
| 218 | for (i = 0; i < ARRAY_SIZE(preinit_mt9m111); i++) { | 218 | for (i = 0; i < ARRAY_SIZE(preinit_mt9m111); i++) { |
| 219 | if (preinit_mt9m111[i][0] == BRIDGE) { | 219 | if (preinit_mt9m111[i][0] == BRIDGE) { |
| 220 | m5602_write_bridge(sd, | 220 | rc |= m5602_write_bridge(sd, |
| 221 | preinit_mt9m111[i][1], | 221 | preinit_mt9m111[i][1], |
| 222 | preinit_mt9m111[i][2]); | 222 | preinit_mt9m111[i][2]); |
| 223 | } else { | 223 | } else { |
| 224 | data[0] = preinit_mt9m111[i][2]; | 224 | data[0] = preinit_mt9m111[i][2]; |
| 225 | data[1] = preinit_mt9m111[i][3]; | 225 | data[1] = preinit_mt9m111[i][3]; |
| 226 | m5602_write_sensor(sd, | 226 | rc |= m5602_write_sensor(sd, |
| 227 | preinit_mt9m111[i][1], data, 2); | 227 | preinit_mt9m111[i][1], data, 2); |
| 228 | } | 228 | } |
| 229 | } | 229 | } |
| 230 | if (rc < 0) | ||
| 231 | return rc; | ||
| 230 | 232 | ||
| 231 | if (m5602_read_sensor(sd, MT9M111_SC_CHIPVER, data, 2)) | 233 | if (m5602_read_sensor(sd, MT9M111_SC_CHIPVER, data, 2)) |
| 232 | return -ENODEV; | 234 | return -ENODEV; |
diff --git a/drivers/media/usb/gspca/m5602/m5602_po1030.c b/drivers/media/usb/gspca/m5602/m5602_po1030.c index 37d2891e5f5b..5e43b4782f02 100644 --- a/drivers/media/usb/gspca/m5602/m5602_po1030.c +++ b/drivers/media/usb/gspca/m5602/m5602_po1030.c | |||
| @@ -158,6 +158,7 @@ static const struct v4l2_ctrl_config po1030_greenbal_cfg = { | |||
| 158 | 158 | ||
| 159 | int po1030_probe(struct sd *sd) | 159 | int po1030_probe(struct sd *sd) |
| 160 | { | 160 | { |
| 161 | int rc = 0; | ||
| 161 | u8 dev_id_h = 0, i; | 162 | u8 dev_id_h = 0, i; |
| 162 | struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; | 163 | struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; |
| 163 | 164 | ||
| @@ -177,11 +178,14 @@ int po1030_probe(struct sd *sd) | |||
| 177 | for (i = 0; i < ARRAY_SIZE(preinit_po1030); i++) { | 178 | for (i = 0; i < ARRAY_SIZE(preinit_po1030); i++) { |
| 178 | u8 data = preinit_po1030[i][2]; | 179 | u8 data = preinit_po1030[i][2]; |
| 179 | if (preinit_po1030[i][0] == SENSOR) | 180 | if (preinit_po1030[i][0] == SENSOR) |
| 180 | m5602_write_sensor(sd, | 181 | rc |= m5602_write_sensor(sd, |
| 181 | preinit_po1030[i][1], &data, 1); | 182 | preinit_po1030[i][1], &data, 1); |
| 182 | else | 183 | else |
| 183 | m5602_write_bridge(sd, preinit_po1030[i][1], data); | 184 | rc |= m5602_write_bridge(sd, preinit_po1030[i][1], |
| 185 | data); | ||
| 184 | } | 186 | } |
| 187 | if (rc < 0) | ||
| 188 | return rc; | ||
| 185 | 189 | ||
| 186 | if (m5602_read_sensor(sd, PO1030_DEVID_H, &dev_id_h, 1)) | 190 | if (m5602_read_sensor(sd, PO1030_DEVID_H, &dev_id_h, 1)) |
| 187 | return -ENODEV; | 191 | return -ENODEV; |
diff --git a/drivers/media/usb/gspca/mr97310a.c b/drivers/media/usb/gspca/mr97310a.c index bea196361215..af454663e295 100644 --- a/drivers/media/usb/gspca/mr97310a.c +++ b/drivers/media/usb/gspca/mr97310a.c | |||
| @@ -520,7 +520,7 @@ static int start_cif_cam(struct gspca_dev *gspca_dev) | |||
| 520 | switch (gspca_dev->pixfmt.width) { | 520 | switch (gspca_dev->pixfmt.width) { |
| 521 | case 160: | 521 | case 160: |
| 522 | data[9] |= 0x04; /* reg 8, 2:1 scale down from 320 */ | 522 | data[9] |= 0x04; /* reg 8, 2:1 scale down from 320 */ |
| 523 | /* fall thru */ | 523 | /* fall through */ |
| 524 | case 320: | 524 | case 320: |
| 525 | default: | 525 | default: |
| 526 | data[3] = 0x28; /* reg 2, H size/8 */ | 526 | data[3] = 0x28; /* reg 2, H size/8 */ |
| @@ -530,7 +530,7 @@ static int start_cif_cam(struct gspca_dev *gspca_dev) | |||
| 530 | break; | 530 | break; |
| 531 | case 176: | 531 | case 176: |
| 532 | data[9] |= 0x04; /* reg 8, 2:1 scale down from 352 */ | 532 | data[9] |= 0x04; /* reg 8, 2:1 scale down from 352 */ |
| 533 | /* fall thru */ | 533 | /* fall through */ |
| 534 | case 352: | 534 | case 352: |
| 535 | data[3] = 0x2c; /* reg 2, H size/8 */ | 535 | data[3] = 0x2c; /* reg 2, H size/8 */ |
| 536 | data[4] = 0x48; /* reg 3, V size/4 */ | 536 | data[4] = 0x48; /* reg 3, V size/4 */ |
| @@ -617,10 +617,10 @@ static int start_vga_cam(struct gspca_dev *gspca_dev) | |||
| 617 | switch (gspca_dev->pixfmt.width) { | 617 | switch (gspca_dev->pixfmt.width) { |
| 618 | case 160: | 618 | case 160: |
| 619 | data[9] |= 0x0c; /* reg 8, 4:1 scale down */ | 619 | data[9] |= 0x0c; /* reg 8, 4:1 scale down */ |
| 620 | /* fall thru */ | 620 | /* fall through */ |
| 621 | case 320: | 621 | case 320: |
| 622 | data[9] |= 0x04; /* reg 8, 2:1 scale down */ | 622 | data[9] |= 0x04; /* reg 8, 2:1 scale down */ |
| 623 | /* fall thru */ | 623 | /* fall through */ |
| 624 | case 640: | 624 | case 640: |
| 625 | default: | 625 | default: |
| 626 | data[3] = 0x50; /* reg 2, H size/8 */ | 626 | data[3] = 0x50; /* reg 2, H size/8 */ |
| @@ -637,7 +637,7 @@ static int start_vga_cam(struct gspca_dev *gspca_dev) | |||
| 637 | 637 | ||
| 638 | case 176: | 638 | case 176: |
| 639 | data[9] |= 0x04; /* reg 8, 2:1 scale down */ | 639 | data[9] |= 0x04; /* reg 8, 2:1 scale down */ |
| 640 | /* fall thru */ | 640 | /* fall through */ |
| 641 | case 352: | 641 | case 352: |
| 642 | data[3] = 0x2c; /* reg 2, H size */ | 642 | data[3] = 0x2c; /* reg 2, H size */ |
| 643 | data[4] = 0x48; /* reg 3, V size */ | 643 | data[4] = 0x48; /* reg 3, V size */ |
diff --git a/drivers/media/usb/gspca/ov519.c b/drivers/media/usb/gspca/ov519.c index 10fcbe9e8614..f2799e8cb8e7 100644 --- a/drivers/media/usb/gspca/ov519.c +++ b/drivers/media/usb/gspca/ov519.c | |||
| @@ -1945,7 +1945,7 @@ static const struct ov_i2c_regvals norm_8610[] = { | |||
| 1945 | { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */ | 1945 | { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */ |
| 1946 | { 0x63, 0xff }, | 1946 | { 0x63, 0xff }, |
| 1947 | { 0x64, 0x53 }, /* new windrv 090403 says 0x57, | 1947 | { 0x64, 0x53 }, /* new windrv 090403 says 0x57, |
| 1948 | * maybe thats wrong */ | 1948 | * maybe that's wrong */ |
| 1949 | { 0x65, 0x00 }, | 1949 | { 0x65, 0x00 }, |
| 1950 | { 0x66, 0x55 }, | 1950 | { 0x66, 0x55 }, |
| 1951 | { 0x67, 0xb0 }, | 1951 | { 0x67, 0xb0 }, |
| @@ -3658,7 +3658,7 @@ static void ov518_mode_init_regs(struct sd *sd) | |||
| 3658 | case SEN_OV7620AE: | 3658 | case SEN_OV7620AE: |
| 3659 | /* | 3659 | /* |
| 3660 | * HdG: 640x480 needs special handling on device | 3660 | * HdG: 640x480 needs special handling on device |
| 3661 | * revision 2, we check for device revison > 0 to | 3661 | * revision 2, we check for device revision > 0 to |
| 3662 | * avoid regressions, as we don't know the correct | 3662 | * avoid regressions, as we don't know the correct |
| 3663 | * thing todo for revision 1. | 3663 | * thing todo for revision 1. |
| 3664 | * | 3664 | * |
diff --git a/drivers/media/usb/gspca/ov534.c b/drivers/media/usb/gspca/ov534.c index d06dc0755b9a..02c90ad96b76 100644 --- a/drivers/media/usb/gspca/ov534.c +++ b/drivers/media/usb/gspca/ov534.c | |||
| @@ -103,6 +103,16 @@ static const struct v4l2_pix_format ov772x_mode[] = { | |||
| 103 | .sizeimage = 640 * 480 * 2, | 103 | .sizeimage = 640 * 480 * 2, |
| 104 | .colorspace = V4L2_COLORSPACE_SRGB, | 104 | .colorspace = V4L2_COLORSPACE_SRGB, |
| 105 | .priv = 0}, | 105 | .priv = 0}, |
| 106 | {320, 240, V4L2_PIX_FMT_SGRBG8, V4L2_FIELD_NONE, | ||
| 107 | .bytesperline = 320, | ||
| 108 | .sizeimage = 320 * 240, | ||
| 109 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 110 | .priv = 1}, | ||
| 111 | {640, 480, V4L2_PIX_FMT_SGRBG8, V4L2_FIELD_NONE, | ||
| 112 | .bytesperline = 640, | ||
| 113 | .sizeimage = 640 * 480, | ||
| 114 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 115 | .priv = 0}, | ||
| 106 | }; | 116 | }; |
| 107 | static const struct v4l2_pix_format ov767x_mode[] = { | 117 | static const struct v4l2_pix_format ov767x_mode[] = { |
| 108 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | 118 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
| @@ -127,6 +137,14 @@ static const struct framerates ov772x_framerates[] = { | |||
| 127 | .rates = vga_rates, | 137 | .rates = vga_rates, |
| 128 | .nrates = ARRAY_SIZE(vga_rates), | 138 | .nrates = ARRAY_SIZE(vga_rates), |
| 129 | }, | 139 | }, |
| 140 | { /* 320x240 SGBRG8 */ | ||
| 141 | .rates = qvga_rates, | ||
| 142 | .nrates = ARRAY_SIZE(qvga_rates), | ||
| 143 | }, | ||
| 144 | { /* 640x480 SGBRG8 */ | ||
| 145 | .rates = vga_rates, | ||
| 146 | .nrates = ARRAY_SIZE(vga_rates), | ||
| 147 | }, | ||
| 130 | }; | 148 | }; |
| 131 | 149 | ||
| 132 | struct reg_array { | 150 | struct reg_array { |
| @@ -411,9 +429,7 @@ static const u8 sensor_start_qvga_767x[][2] = { | |||
| 411 | }; | 429 | }; |
| 412 | 430 | ||
| 413 | static const u8 bridge_init_772x[][2] = { | 431 | static const u8 bridge_init_772x[][2] = { |
| 414 | { 0xc2, 0x0c }, | ||
| 415 | { 0x88, 0xf8 }, | 432 | { 0x88, 0xf8 }, |
| 416 | { 0xc3, 0x69 }, | ||
| 417 | { 0x89, 0xff }, | 433 | { 0x89, 0xff }, |
| 418 | { 0x76, 0x03 }, | 434 | { 0x76, 0x03 }, |
| 419 | { 0x92, 0x01 }, | 435 | { 0x92, 0x01 }, |
| @@ -439,7 +455,6 @@ static const u8 bridge_init_772x[][2] = { | |||
| 439 | { 0x1f, 0x81 }, | 455 | { 0x1f, 0x81 }, |
| 440 | { 0x34, 0x05 }, | 456 | { 0x34, 0x05 }, |
| 441 | { 0xe3, 0x04 }, | 457 | { 0xe3, 0x04 }, |
| 442 | { 0x88, 0x00 }, | ||
| 443 | { 0x89, 0x00 }, | 458 | { 0x89, 0x00 }, |
| 444 | { 0x76, 0x00 }, | 459 | { 0x76, 0x00 }, |
| 445 | { 0xe7, 0x2e }, | 460 | { 0xe7, 0x2e }, |
| @@ -447,26 +462,9 @@ static const u8 bridge_init_772x[][2] = { | |||
| 447 | { 0x25, 0x42 }, | 462 | { 0x25, 0x42 }, |
| 448 | { 0x21, 0xf0 }, | 463 | { 0x21, 0xf0 }, |
| 449 | 464 | ||
| 450 | { 0x1c, 0x00 }, | ||
| 451 | { 0x1d, 0x40 }, | ||
| 452 | { 0x1d, 0x02 }, /* payload size 0x0200 * 4 = 2048 bytes */ | ||
| 453 | { 0x1d, 0x00 }, /* payload size */ | ||
| 454 | |||
| 455 | { 0x1d, 0x02 }, /* frame size 0x025800 * 4 = 614400 */ | ||
| 456 | { 0x1d, 0x58 }, /* frame size */ | ||
| 457 | { 0x1d, 0x00 }, /* frame size */ | ||
| 458 | |||
| 459 | { 0x1c, 0x0a }, | 465 | { 0x1c, 0x0a }, |
| 460 | { 0x1d, 0x08 }, /* turn on UVC header */ | 466 | { 0x1d, 0x08 }, /* turn on UVC header */ |
| 461 | { 0x1d, 0x0e }, /* .. */ | 467 | { 0x1d, 0x0e }, /* .. */ |
| 462 | |||
| 463 | { 0x8d, 0x1c }, | ||
| 464 | { 0x8e, 0x80 }, | ||
| 465 | { 0xe5, 0x04 }, | ||
| 466 | |||
| 467 | { 0xc0, 0x50 }, | ||
| 468 | { 0xc1, 0x3c }, | ||
| 469 | { 0xc2, 0x0c }, | ||
| 470 | }; | 468 | }; |
| 471 | static const u8 sensor_init_772x[][2] = { | 469 | static const u8 sensor_init_772x[][2] = { |
| 472 | { 0x12, 0x80 }, | 470 | { 0x12, 0x80 }, |
| @@ -545,13 +543,10 @@ static const u8 sensor_init_772x[][2] = { | |||
| 545 | { 0x8c, 0xe8 }, | 543 | { 0x8c, 0xe8 }, |
| 546 | { 0x8d, 0x20 }, | 544 | { 0x8d, 0x20 }, |
| 547 | 545 | ||
| 548 | { 0x0c, 0x90 }, | ||
| 549 | |||
| 550 | { 0x2b, 0x00 }, | 546 | { 0x2b, 0x00 }, |
| 551 | { 0x22, 0x7f }, | 547 | { 0x22, 0x7f }, |
| 552 | { 0x23, 0x03 }, | 548 | { 0x23, 0x03 }, |
| 553 | { 0x11, 0x01 }, | 549 | { 0x11, 0x01 }, |
| 554 | { 0x0c, 0xd0 }, | ||
| 555 | { 0x64, 0xff }, | 550 | { 0x64, 0xff }, |
| 556 | { 0x0d, 0x41 }, | 551 | { 0x0d, 0x41 }, |
| 557 | 552 | ||
| @@ -559,9 +554,9 @@ static const u8 sensor_init_772x[][2] = { | |||
| 559 | { 0x0e, 0xcd }, | 554 | { 0x0e, 0xcd }, |
| 560 | { 0xac, 0xbf }, | 555 | { 0xac, 0xbf }, |
| 561 | { 0x8e, 0x00 }, /* De-noise threshold */ | 556 | { 0x8e, 0x00 }, /* De-noise threshold */ |
| 562 | { 0x0c, 0xd0 } | ||
| 563 | }; | 557 | }; |
| 564 | static const u8 bridge_start_vga_772x[][2] = { | 558 | static const u8 bridge_start_vga_yuyv_772x[][2] = { |
| 559 | {0x88, 0x00}, | ||
| 565 | {0x1c, 0x00}, | 560 | {0x1c, 0x00}, |
| 566 | {0x1d, 0x40}, | 561 | {0x1d, 0x40}, |
| 567 | {0x1d, 0x02}, | 562 | {0x1d, 0x02}, |
| @@ -569,10 +564,14 @@ static const u8 bridge_start_vga_772x[][2] = { | |||
| 569 | {0x1d, 0x02}, | 564 | {0x1d, 0x02}, |
| 570 | {0x1d, 0x58}, | 565 | {0x1d, 0x58}, |
| 571 | {0x1d, 0x00}, | 566 | {0x1d, 0x00}, |
| 567 | {0x8d, 0x1c}, | ||
| 568 | {0x8e, 0x80}, | ||
| 572 | {0xc0, 0x50}, | 569 | {0xc0, 0x50}, |
| 573 | {0xc1, 0x3c}, | 570 | {0xc1, 0x3c}, |
| 571 | {0xc2, 0x0c}, | ||
| 572 | {0xc3, 0x69}, | ||
| 574 | }; | 573 | }; |
| 575 | static const u8 sensor_start_vga_772x[][2] = { | 574 | static const u8 sensor_start_vga_yuyv_772x[][2] = { |
| 576 | {0x12, 0x00}, | 575 | {0x12, 0x00}, |
| 577 | {0x17, 0x26}, | 576 | {0x17, 0x26}, |
| 578 | {0x18, 0xa0}, | 577 | {0x18, 0xa0}, |
| @@ -581,8 +580,10 @@ static const u8 sensor_start_vga_772x[][2] = { | |||
| 581 | {0x29, 0xa0}, | 580 | {0x29, 0xa0}, |
| 582 | {0x2c, 0xf0}, | 581 | {0x2c, 0xf0}, |
| 583 | {0x65, 0x20}, | 582 | {0x65, 0x20}, |
| 583 | {0x67, 0x00}, | ||
| 584 | }; | 584 | }; |
| 585 | static const u8 bridge_start_qvga_772x[][2] = { | 585 | static const u8 bridge_start_qvga_yuyv_772x[][2] = { |
| 586 | {0x88, 0x00}, | ||
| 586 | {0x1c, 0x00}, | 587 | {0x1c, 0x00}, |
| 587 | {0x1d, 0x40}, | 588 | {0x1d, 0x40}, |
| 588 | {0x1d, 0x02}, | 589 | {0x1d, 0x02}, |
| @@ -590,10 +591,14 @@ static const u8 bridge_start_qvga_772x[][2] = { | |||
| 590 | {0x1d, 0x01}, | 591 | {0x1d, 0x01}, |
| 591 | {0x1d, 0x4b}, | 592 | {0x1d, 0x4b}, |
| 592 | {0x1d, 0x00}, | 593 | {0x1d, 0x00}, |
| 594 | {0x8d, 0x1c}, | ||
| 595 | {0x8e, 0x80}, | ||
| 593 | {0xc0, 0x28}, | 596 | {0xc0, 0x28}, |
| 594 | {0xc1, 0x1e}, | 597 | {0xc1, 0x1e}, |
| 598 | {0xc2, 0x0c}, | ||
| 599 | {0xc3, 0x69}, | ||
| 595 | }; | 600 | }; |
| 596 | static const u8 sensor_start_qvga_772x[][2] = { | 601 | static const u8 sensor_start_qvga_yuyv_772x[][2] = { |
| 597 | {0x12, 0x40}, | 602 | {0x12, 0x40}, |
| 598 | {0x17, 0x3f}, | 603 | {0x17, 0x3f}, |
| 599 | {0x18, 0x50}, | 604 | {0x18, 0x50}, |
| @@ -602,6 +607,61 @@ static const u8 sensor_start_qvga_772x[][2] = { | |||
| 602 | {0x29, 0x50}, | 607 | {0x29, 0x50}, |
| 603 | {0x2c, 0x78}, | 608 | {0x2c, 0x78}, |
| 604 | {0x65, 0x2f}, | 609 | {0x65, 0x2f}, |
| 610 | {0x67, 0x00}, | ||
| 611 | }; | ||
| 612 | static const u8 bridge_start_vga_gbrg_772x[][2] = { | ||
| 613 | {0x88, 0x08}, | ||
| 614 | {0x1c, 0x00}, | ||
| 615 | {0x1d, 0x00}, | ||
| 616 | {0x1d, 0x02}, | ||
| 617 | {0x1d, 0x00}, | ||
| 618 | {0x1d, 0x01}, | ||
| 619 | {0x1d, 0x2c}, | ||
| 620 | {0x1d, 0x00}, | ||
| 621 | {0x8d, 0x00}, | ||
| 622 | {0x8e, 0x00}, | ||
| 623 | {0xc0, 0x50}, | ||
| 624 | {0xc1, 0x3c}, | ||
| 625 | {0xc2, 0x01}, | ||
| 626 | {0xc3, 0x01}, | ||
| 627 | }; | ||
| 628 | static const u8 sensor_start_vga_gbrg_772x[][2] = { | ||
| 629 | {0x12, 0x01}, | ||
| 630 | {0x17, 0x26}, | ||
| 631 | {0x18, 0xa0}, | ||
| 632 | {0x19, 0x07}, | ||
| 633 | {0x1a, 0xf0}, | ||
| 634 | {0x29, 0xa0}, | ||
| 635 | {0x2c, 0xf0}, | ||
| 636 | {0x65, 0x20}, | ||
| 637 | {0x67, 0x02}, | ||
| 638 | }; | ||
| 639 | static const u8 bridge_start_qvga_gbrg_772x[][2] = { | ||
| 640 | {0x88, 0x08}, | ||
| 641 | {0x1c, 0x00}, | ||
| 642 | {0x1d, 0x00}, | ||
| 643 | {0x1d, 0x02}, | ||
| 644 | {0x1d, 0x00}, | ||
| 645 | {0x1d, 0x00}, | ||
| 646 | {0x1d, 0x4b}, | ||
| 647 | {0x1d, 0x00}, | ||
| 648 | {0x8d, 0x00}, | ||
| 649 | {0x8e, 0x00}, | ||
| 650 | {0xc0, 0x28}, | ||
| 651 | {0xc1, 0x1e}, | ||
| 652 | {0xc2, 0x01}, | ||
| 653 | {0xc3, 0x01}, | ||
| 654 | }; | ||
| 655 | static const u8 sensor_start_qvga_gbrg_772x[][2] = { | ||
| 656 | {0x12, 0x41}, | ||
| 657 | {0x17, 0x3f}, | ||
| 658 | {0x18, 0x50}, | ||
| 659 | {0x19, 0x03}, | ||
| 660 | {0x1a, 0x78}, | ||
| 661 | {0x29, 0x50}, | ||
| 662 | {0x2c, 0x78}, | ||
| 663 | {0x65, 0x2f}, | ||
| 664 | {0x67, 0x02}, | ||
| 605 | }; | 665 | }; |
| 606 | 666 | ||
| 607 | static void ov534_reg_write(struct gspca_dev *gspca_dev, u16 reg, u8 val) | 667 | static void ov534_reg_write(struct gspca_dev *gspca_dev, u16 reg, u8 val) |
| @@ -679,7 +739,7 @@ static int sccb_check_status(struct gspca_dev *gspca_dev) | |||
| 679 | int i; | 739 | int i; |
| 680 | 740 | ||
| 681 | for (i = 0; i < 5; i++) { | 741 | for (i = 0; i < 5; i++) { |
| 682 | msleep(10); | 742 | usleep_range(10000, 20000); |
| 683 | data = ov534_reg_read(gspca_dev, OV534_REG_STATUS); | 743 | data = ov534_reg_read(gspca_dev, OV534_REG_STATUS); |
| 684 | 744 | ||
| 685 | switch (data) { | 745 | switch (data) { |
| @@ -1277,7 +1337,7 @@ static int sd_init(struct gspca_dev *gspca_dev) | |||
| 1277 | 1337 | ||
| 1278 | /* reset sensor */ | 1338 | /* reset sensor */ |
| 1279 | sccb_reg_write(gspca_dev, 0x12, 0x80); | 1339 | sccb_reg_write(gspca_dev, 0x12, 0x80); |
| 1280 | msleep(10); | 1340 | usleep_range(10000, 20000); |
| 1281 | 1341 | ||
| 1282 | /* probe the sensor */ | 1342 | /* probe the sensor */ |
| 1283 | sccb_reg_read(gspca_dev, 0x0a); | 1343 | sccb_reg_read(gspca_dev, 0x0a); |
| @@ -1315,25 +1375,33 @@ static int sd_start(struct gspca_dev *gspca_dev) | |||
| 1315 | { | 1375 | { |
| 1316 | struct sd *sd = (struct sd *) gspca_dev; | 1376 | struct sd *sd = (struct sd *) gspca_dev; |
| 1317 | int mode; | 1377 | int mode; |
| 1318 | static const struct reg_array bridge_start[NSENSORS][2] = { | 1378 | static const struct reg_array bridge_start[NSENSORS][4] = { |
| 1319 | [SENSOR_OV767x] = {{bridge_start_qvga_767x, | 1379 | [SENSOR_OV767x] = {{bridge_start_qvga_767x, |
| 1320 | ARRAY_SIZE(bridge_start_qvga_767x)}, | 1380 | ARRAY_SIZE(bridge_start_qvga_767x)}, |
| 1321 | {bridge_start_vga_767x, | 1381 | {bridge_start_vga_767x, |
| 1322 | ARRAY_SIZE(bridge_start_vga_767x)}}, | 1382 | ARRAY_SIZE(bridge_start_vga_767x)}}, |
| 1323 | [SENSOR_OV772x] = {{bridge_start_qvga_772x, | 1383 | [SENSOR_OV772x] = {{bridge_start_qvga_yuyv_772x, |
| 1324 | ARRAY_SIZE(bridge_start_qvga_772x)}, | 1384 | ARRAY_SIZE(bridge_start_qvga_yuyv_772x)}, |
| 1325 | {bridge_start_vga_772x, | 1385 | {bridge_start_vga_yuyv_772x, |
| 1326 | ARRAY_SIZE(bridge_start_vga_772x)}}, | 1386 | ARRAY_SIZE(bridge_start_vga_yuyv_772x)}, |
| 1387 | {bridge_start_qvga_gbrg_772x, | ||
| 1388 | ARRAY_SIZE(bridge_start_qvga_gbrg_772x)}, | ||
| 1389 | {bridge_start_vga_gbrg_772x, | ||
| 1390 | ARRAY_SIZE(bridge_start_vga_gbrg_772x)} }, | ||
| 1327 | }; | 1391 | }; |
| 1328 | static const struct reg_array sensor_start[NSENSORS][2] = { | 1392 | static const struct reg_array sensor_start[NSENSORS][4] = { |
| 1329 | [SENSOR_OV767x] = {{sensor_start_qvga_767x, | 1393 | [SENSOR_OV767x] = {{sensor_start_qvga_767x, |
| 1330 | ARRAY_SIZE(sensor_start_qvga_767x)}, | 1394 | ARRAY_SIZE(sensor_start_qvga_767x)}, |
| 1331 | {sensor_start_vga_767x, | 1395 | {sensor_start_vga_767x, |
| 1332 | ARRAY_SIZE(sensor_start_vga_767x)}}, | 1396 | ARRAY_SIZE(sensor_start_vga_767x)}}, |
| 1333 | [SENSOR_OV772x] = {{sensor_start_qvga_772x, | 1397 | [SENSOR_OV772x] = {{sensor_start_qvga_yuyv_772x, |
| 1334 | ARRAY_SIZE(sensor_start_qvga_772x)}, | 1398 | ARRAY_SIZE(sensor_start_qvga_yuyv_772x)}, |
| 1335 | {sensor_start_vga_772x, | 1399 | {sensor_start_vga_yuyv_772x, |
| 1336 | ARRAY_SIZE(sensor_start_vga_772x)}}, | 1400 | ARRAY_SIZE(sensor_start_vga_yuyv_772x)}, |
| 1401 | {sensor_start_qvga_gbrg_772x, | ||
| 1402 | ARRAY_SIZE(sensor_start_qvga_gbrg_772x)}, | ||
| 1403 | {sensor_start_vga_gbrg_772x, | ||
| 1404 | ARRAY_SIZE(sensor_start_vga_gbrg_772x)} }, | ||
| 1337 | }; | 1405 | }; |
| 1338 | 1406 | ||
| 1339 | /* (from ms-win trace) */ | 1407 | /* (from ms-win trace) */ |
| @@ -1439,10 +1507,9 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev, | |||
| 1439 | /* If this packet is marked as EOF, end the frame */ | 1507 | /* If this packet is marked as EOF, end the frame */ |
| 1440 | } else if (data[1] & UVC_STREAM_EOF) { | 1508 | } else if (data[1] & UVC_STREAM_EOF) { |
| 1441 | sd->last_pts = 0; | 1509 | sd->last_pts = 0; |
| 1442 | if (gspca_dev->pixfmt.pixelformat == V4L2_PIX_FMT_YUYV | 1510 | if (gspca_dev->pixfmt.pixelformat != V4L2_PIX_FMT_JPEG |
| 1443 | && gspca_dev->image_len + len - 12 != | 1511 | && gspca_dev->image_len + len - 12 != |
| 1444 | gspca_dev->pixfmt.width * | 1512 | gspca_dev->pixfmt.sizeimage) { |
| 1445 | gspca_dev->pixfmt.height * 2) { | ||
| 1446 | gspca_dbg(gspca_dev, D_PACK, "wrong sized frame\n"); | 1513 | gspca_dbg(gspca_dev, D_PACK, "wrong sized frame\n"); |
| 1447 | goto discard; | 1514 | goto discard; |
| 1448 | } | 1515 | } |
diff --git a/drivers/media/usb/gspca/pac_common.h b/drivers/media/usb/gspca/pac_common.h index 31f2a42af4dd..aae97a5534e3 100644 --- a/drivers/media/usb/gspca/pac_common.h +++ b/drivers/media/usb/gspca/pac_common.h | |||
| @@ -21,7 +21,7 @@ | |||
| 21 | 21 | ||
| 22 | /* We calculate the autogain at the end of the transfer of a frame, at this | 22 | /* We calculate the autogain at the end of the transfer of a frame, at this |
| 23 | moment a frame with the old settings is being captured and transmitted. So | 23 | moment a frame with the old settings is being captured and transmitted. So |
| 24 | if we adjust the gain or exposure we must ignore atleast the next frame for | 24 | if we adjust the gain or exposure we must ignore at least the next frame for |
| 25 | the new settings to come into effect before doing any other adjustments. */ | 25 | the new settings to come into effect before doing any other adjustments. */ |
| 26 | #define PAC_AUTOGAIN_IGNORE_FRAMES 2 | 26 | #define PAC_AUTOGAIN_IGNORE_FRAMES 2 |
| 27 | 27 | ||
diff --git a/drivers/media/usb/gspca/sn9c20x.c b/drivers/media/usb/gspca/sn9c20x.c index 5984bb12bcff..ab912903f8d7 100644 --- a/drivers/media/usb/gspca/sn9c20x.c +++ b/drivers/media/usb/gspca/sn9c20x.c | |||
| @@ -1634,7 +1634,7 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
| 1634 | break; | 1634 | break; |
| 1635 | case SENSOR_HV7131R: | 1635 | case SENSOR_HV7131R: |
| 1636 | sd->i2c_intf = 0x81; /* i2c 400 Kb/s */ | 1636 | sd->i2c_intf = 0x81; /* i2c 400 Kb/s */ |
| 1637 | /* fall thru */ | 1637 | /* fall through */ |
| 1638 | default: | 1638 | default: |
| 1639 | cam->cam_mode = vga_mode; | 1639 | cam->cam_mode = vga_mode; |
| 1640 | cam->nmodes = ARRAY_SIZE(vga_mode); | 1640 | cam->nmodes = ARRAY_SIZE(vga_mode); |
diff --git a/drivers/media/usb/gspca/sonixb.c b/drivers/media/usb/gspca/sonixb.c index 5f3f2979540a..583c9f10198c 100644 --- a/drivers/media/usb/gspca/sonixb.c +++ b/drivers/media/usb/gspca/sonixb.c | |||
| @@ -121,7 +121,7 @@ struct sensor_data { | |||
| 121 | 121 | ||
| 122 | /* We calculate the autogain at the end of the transfer of a frame, at this | 122 | /* We calculate the autogain at the end of the transfer of a frame, at this |
| 123 | moment a frame with the old settings is being captured and transmitted. So | 123 | moment a frame with the old settings is being captured and transmitted. So |
| 124 | if we adjust the gain or exposure we must ignore atleast the next frame for | 124 | if we adjust the gain or exposure we must ignore at least the next frame for |
| 125 | the new settings to come into effect before doing any other adjustments. */ | 125 | the new settings to come into effect before doing any other adjustments. */ |
| 126 | #define AUTOGAIN_IGNORE_FRAMES 1 | 126 | #define AUTOGAIN_IGNORE_FRAMES 1 |
| 127 | 127 | ||
| @@ -757,7 +757,7 @@ static void setexposure(struct gspca_dev *gspca_dev) | |||
| 757 | 757 | ||
| 758 | /* Don't allow this to get below 10 when using autogain, the | 758 | /* Don't allow this to get below 10 when using autogain, the |
| 759 | steps become very large (relatively) when below 10 causing | 759 | steps become very large (relatively) when below 10 causing |
| 760 | the image to oscilate from much too dark, to much too bright | 760 | the image to oscillate from much too dark, to much too bright |
| 761 | and back again. */ | 761 | and back again. */ |
| 762 | if (gspca_dev->autogain->val && reg10 < 10) | 762 | if (gspca_dev->autogain->val && reg10 < 10) |
| 763 | reg10 = 10; | 763 | reg10 = 10; |
diff --git a/drivers/media/usb/gspca/sonixj.c b/drivers/media/usb/gspca/sonixj.c index df8d8482b795..a63f155f1515 100644 --- a/drivers/media/usb/gspca/sonixj.c +++ b/drivers/media/usb/gspca/sonixj.c | |||
| @@ -2677,7 +2677,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev, | |||
| 2677 | * which is 62 bytes long and is followed by various information | 2677 | * which is 62 bytes long and is followed by various information |
| 2678 | * including statuses and luminosity. | 2678 | * including statuses and luminosity. |
| 2679 | * | 2679 | * |
| 2680 | * A marker may be splitted on two packets. | 2680 | * A marker may be split on two packets. |
| 2681 | * | 2681 | * |
| 2682 | * The 6th byte of a marker contains the bits: | 2682 | * The 6th byte of a marker contains the bits: |
| 2683 | * 0x08: USB full | 2683 | * 0x08: USB full |
diff --git a/drivers/media/usb/gspca/spca501.c b/drivers/media/usb/gspca/spca501.c index 2cce74b166d8..3d215952af18 100644 --- a/drivers/media/usb/gspca/spca501.c +++ b/drivers/media/usb/gspca/spca501.c | |||
| @@ -574,7 +574,7 @@ static const __u16 spca501_3com_open_data[][3] = { | |||
| 574 | {0x0, 0x0001, 0x0010}, /* TG Start Clock */ | 574 | {0x0, 0x0001, 0x0010}, /* TG Start Clock */ |
| 575 | 575 | ||
| 576 | /* {0x2, 0x006a, 0x0001}, * C/S Enable ISOSYNCH Packet Engine */ | 576 | /* {0x2, 0x006a, 0x0001}, * C/S Enable ISOSYNCH Packet Engine */ |
| 577 | {0x2, 0x0068, 0x0001}, /* C/S Diable ISOSYNCH Packet Engine */ | 577 | {0x2, 0x0068, 0x0001}, /* C/S Disable ISOSYNCH Packet Engine */ |
| 578 | {0x2, 0x0000, 0x0005}, | 578 | {0x2, 0x0000, 0x0005}, |
| 579 | {0x2, 0x0043, 0x0000}, /* C/S Set Timing Mode, Disable TG soft reset */ | 579 | {0x2, 0x0043, 0x0000}, /* C/S Set Timing Mode, Disable TG soft reset */ |
| 580 | {0x2, 0x0043, 0x0000}, /* C/S Set Timing Mode, Disable TG soft reset */ | 580 | {0x2, 0x0043, 0x0000}, /* C/S Set Timing Mode, Disable TG soft reset */ |
diff --git a/drivers/media/usb/gspca/sq905.c b/drivers/media/usb/gspca/sq905.c index ffea9c35b0a0..d5c48216deb7 100644 --- a/drivers/media/usb/gspca/sq905.c +++ b/drivers/media/usb/gspca/sq905.c | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | * History and Acknowledgments | 18 | * History and Acknowledgments |
| 19 | * | 19 | * |
| 20 | * The original Linux driver for SQ905 based cameras was written by | 20 | * The original Linux driver for SQ905 based cameras was written by |
| 21 | * Marcell Lengyel and furter developed by many other contributors | 21 | * Marcell Lengyel and further developed by many other contributors |
| 22 | * and is available from http://sourceforge.net/projects/sqcam/ | 22 | * and is available from http://sourceforge.net/projects/sqcam/ |
| 23 | * | 23 | * |
| 24 | * This driver takes advantage of the reverse engineering work done for | 24 | * This driver takes advantage of the reverse engineering work done for |
diff --git a/drivers/media/usb/gspca/sunplus.c b/drivers/media/usb/gspca/sunplus.c index 437a3367ab97..e1e2a605a46c 100644 --- a/drivers/media/usb/gspca/sunplus.c +++ b/drivers/media/usb/gspca/sunplus.c | |||
| @@ -555,7 +555,7 @@ static void init_ctl_reg(struct gspca_dev *gspca_dev) | |||
| 555 | case BRIDGE_SPCA504: | 555 | case BRIDGE_SPCA504: |
| 556 | case BRIDGE_SPCA504C: | 556 | case BRIDGE_SPCA504C: |
| 557 | pollreg = 0; | 557 | pollreg = 0; |
| 558 | /* fall thru */ | 558 | /* fall through */ |
| 559 | default: | 559 | default: |
| 560 | /* case BRIDGE_SPCA533: */ | 560 | /* case BRIDGE_SPCA533: */ |
| 561 | /* case BRIDGE_SPCA504B: */ | 561 | /* case BRIDGE_SPCA504B: */ |
| @@ -638,7 +638,7 @@ static int sd_init(struct gspca_dev *gspca_dev) | |||
| 638 | reg_w_riv(gspca_dev, 0x00, 0x2000, 0x00); | 638 | reg_w_riv(gspca_dev, 0x00, 0x2000, 0x00); |
| 639 | reg_w_riv(gspca_dev, 0x00, 0x2301, 0x13); | 639 | reg_w_riv(gspca_dev, 0x00, 0x2301, 0x13); |
| 640 | reg_w_riv(gspca_dev, 0x00, 0x2306, 0x00); | 640 | reg_w_riv(gspca_dev, 0x00, 0x2306, 0x00); |
| 641 | /* fall thru */ | 641 | /* fall through */ |
| 642 | case BRIDGE_SPCA533: | 642 | case BRIDGE_SPCA533: |
| 643 | spca504B_PollingDataReady(gspca_dev); | 643 | spca504B_PollingDataReady(gspca_dev); |
| 644 | spca50x_GetFirmware(gspca_dev); | 644 | spca50x_GetFirmware(gspca_dev); |
diff --git a/drivers/media/usb/gspca/t613.c b/drivers/media/usb/gspca/t613.c index 445782919446..ed9b925b723e 100644 --- a/drivers/media/usb/gspca/t613.c +++ b/drivers/media/usb/gspca/t613.c | |||
| @@ -966,7 +966,7 @@ static int sd_init_controls(struct gspca_dev *gspca_dev) | |||
| 966 | V4L2_CID_SATURATION, 0, 0xf, 1, 5); | 966 | V4L2_CID_SATURATION, 0, 0xf, 1, 5); |
| 967 | v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, | 967 | v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, |
| 968 | V4L2_CID_GAMMA, 0, GAMMA_MAX, 1, 10); | 968 | V4L2_CID_GAMMA, 0, GAMMA_MAX, 1, 10); |
| 969 | /* Activate lowlight, some apps dont bring up the | 969 | /* Activate lowlight, some apps don't bring up the |
| 970 | backlight_compensation control) */ | 970 | backlight_compensation control) */ |
| 971 | v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, | 971 | v4l2_ctrl_new_std(hdl, &sd_ctrl_ops, |
| 972 | V4L2_CID_BACKLIGHT_COMPENSATION, 0, 1, 1, 1); | 972 | V4L2_CID_BACKLIGHT_COMPENSATION, 0, 1, 1, 1); |
diff --git a/drivers/media/usb/gspca/touptek.c b/drivers/media/usb/gspca/touptek.c index d1b9032d7863..6c056a448231 100644 --- a/drivers/media/usb/gspca/touptek.c +++ b/drivers/media/usb/gspca/touptek.c | |||
| @@ -185,7 +185,7 @@ static const struct v4l2_pix_format vga_mode[] = { | |||
| 185 | }; | 185 | }; |
| 186 | 186 | ||
| 187 | /* | 187 | /* |
| 188 | * As theres no known frame sync, the only way to keep synced is to try hard | 188 | * As there's no known frame sync, the only way to keep synced is to try hard |
| 189 | * to never miss any packets | 189 | * to never miss any packets |
| 190 | */ | 190 | */ |
| 191 | #if MAX_NURBS < 4 | 191 | #if MAX_NURBS < 4 |
| @@ -259,7 +259,7 @@ static void setexposure(struct gspca_dev *gspca_dev, s32 val) | |||
| 259 | return; | 259 | return; |
| 260 | } | 260 | } |
| 261 | gspca_dbg(gspca_dev, D_STREAM, "exposure: 0x%04X ms\n\n", value); | 261 | gspca_dbg(gspca_dev, D_STREAM, "exposure: 0x%04X ms\n\n", value); |
| 262 | /* Wonder if theres a good reason for sending it twice */ | 262 | /* Wonder if there's a good reason for sending it twice */ |
| 263 | /* probably not but leave it in because...why not */ | 263 | /* probably not but leave it in because...why not */ |
| 264 | reg_w(gspca_dev, value, REG_COARSE_INTEGRATION_TIME_); | 264 | reg_w(gspca_dev, value, REG_COARSE_INTEGRATION_TIME_); |
| 265 | reg_w(gspca_dev, value, REG_COARSE_INTEGRATION_TIME_); | 265 | reg_w(gspca_dev, value, REG_COARSE_INTEGRATION_TIME_); |
diff --git a/drivers/media/usb/gspca/w996Xcf.c b/drivers/media/usb/gspca/w996Xcf.c index abfab3de1866..36cc5a5ce77a 100644 --- a/drivers/media/usb/gspca/w996Xcf.c +++ b/drivers/media/usb/gspca/w996Xcf.c | |||
| @@ -431,7 +431,7 @@ static void w9968cf_set_crop_window(struct sd *sd) | |||
| 431 | start_cropy = 35; | 431 | start_cropy = 35; |
| 432 | } | 432 | } |
| 433 | 433 | ||
| 434 | /* Work around to avoid FP arithmetics */ | 434 | /* Work around to avoid FP arithmetic */ |
| 435 | #define SC(x) ((x) << 10) | 435 | #define SC(x) ((x) << 10) |
| 436 | 436 | ||
| 437 | /* Scaling factors */ | 437 | /* Scaling factors */ |
diff --git a/drivers/media/usb/gspca/zc3xx-reg.h b/drivers/media/usb/gspca/zc3xx-reg.h index 71fda38e85e0..26f6153b687f 100644 --- a/drivers/media/usb/gspca/zc3xx-reg.h +++ b/drivers/media/usb/gspca/zc3xx-reg.h | |||
| @@ -26,7 +26,7 @@ | |||
| 26 | /* Test mode */ | 26 | /* Test mode */ |
| 27 | #define ZC3XX_R00B_TESTMODECONTROL 0x000b | 27 | #define ZC3XX_R00B_TESTMODECONTROL 0x000b |
| 28 | 28 | ||
| 29 | /* Frame retreiving */ | 29 | /* Frame retrieving */ |
| 30 | #define ZC3XX_R00C_LASTACQTIME 0x000c | 30 | #define ZC3XX_R00C_LASTACQTIME 0x000c |
| 31 | #define ZC3XX_R00D_MONITORRES 0x000d | 31 | #define ZC3XX_R00D_MONITORRES 0x000d |
| 32 | #define ZC3XX_R00E_TIMESTAMPHIGH 0x000e | 32 | #define ZC3XX_R00E_TIMESTAMPHIGH 0x000e |
diff --git a/drivers/media/usb/gspca/zc3xx.c b/drivers/media/usb/gspca/zc3xx.c index cf21991e3d99..ad7194029031 100644 --- a/drivers/media/usb/gspca/zc3xx.c +++ b/drivers/media/usb/gspca/zc3xx.c | |||
| @@ -3602,7 +3602,7 @@ static const struct usb_action pas106b_InitialScale[] = { /* 176x144 */ | |||
| 3602 | {0xaa, 0x14, 0x0081}, | 3602 | {0xaa, 0x14, 0x0081}, |
| 3603 | /* Other registers */ | 3603 | /* Other registers */ |
| 3604 | {0xa0, 0x37, ZC3XX_R101_SENSORCORRECTION}, | 3604 | {0xa0, 0x37, ZC3XX_R101_SENSORCORRECTION}, |
| 3605 | /* Frame retreiving */ | 3605 | /* Frame retrieving */ |
| 3606 | {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, | 3606 | {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, |
| 3607 | /* Gains */ | 3607 | /* Gains */ |
| 3608 | {0xa0, 0xa0, ZC3XX_R1A8_DIGITALGAIN}, | 3608 | {0xa0, 0xa0, ZC3XX_R1A8_DIGITALGAIN}, |
| @@ -3718,7 +3718,7 @@ static const struct usb_action pas106b_Initial[] = { /* 352x288 */ | |||
| 3718 | {0xaa, 0x14, 0x0081}, | 3718 | {0xaa, 0x14, 0x0081}, |
| 3719 | /* Other registers */ | 3719 | /* Other registers */ |
| 3720 | {0xa0, 0x37, ZC3XX_R101_SENSORCORRECTION}, | 3720 | {0xa0, 0x37, ZC3XX_R101_SENSORCORRECTION}, |
| 3721 | /* Frame retreiving */ | 3721 | /* Frame retrieving */ |
| 3722 | {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, | 3722 | {0xa0, 0x00, ZC3XX_R019_AUTOADJUSTFPS}, |
| 3723 | /* Gains */ | 3723 | /* Gains */ |
| 3724 | {0xa0, 0xa0, ZC3XX_R1A8_DIGITALGAIN}, | 3724 | {0xa0, 0xa0, ZC3XX_R1A8_DIGITALGAIN}, |
| @@ -6775,7 +6775,7 @@ static int sd_start(struct gspca_dev *gspca_dev) | |||
| 6775 | case SENSOR_HV7131R: | 6775 | case SENSOR_HV7131R: |
| 6776 | case SENSOR_TAS5130C: | 6776 | case SENSOR_TAS5130C: |
| 6777 | reg_r(gspca_dev, 0x0008); | 6777 | reg_r(gspca_dev, 0x0008); |
| 6778 | /* fall thru */ | 6778 | /* fall through */ |
| 6779 | case SENSOR_PO2030: | 6779 | case SENSOR_PO2030: |
| 6780 | reg_w(gspca_dev, 0x03, 0x0008); | 6780 | reg_w(gspca_dev, 0x03, 0x0008); |
| 6781 | break; | 6781 | break; |
| @@ -6824,7 +6824,7 @@ static int sd_start(struct gspca_dev *gspca_dev) | |||
| 6824 | case SENSOR_TAS5130C: | 6824 | case SENSOR_TAS5130C: |
| 6825 | reg_w(gspca_dev, 0x09, 0x01ad); /* (from win traces) */ | 6825 | reg_w(gspca_dev, 0x09, 0x01ad); /* (from win traces) */ |
| 6826 | reg_w(gspca_dev, 0x15, 0x01ae); | 6826 | reg_w(gspca_dev, 0x15, 0x01ae); |
| 6827 | /* fall thru */ | 6827 | /* fall through */ |
| 6828 | case SENSOR_PAS202B: | 6828 | case SENSOR_PAS202B: |
| 6829 | case SENSOR_PO2030: | 6829 | case SENSOR_PO2030: |
| 6830 | /* reg_w(gspca_dev, 0x40, ZC3XX_R117_GGAIN); in win traces */ | 6830 | /* reg_w(gspca_dev, 0x40, ZC3XX_R117_GGAIN); in win traces */ |
diff --git a/drivers/media/usb/hdpvr/hdpvr-i2c.c b/drivers/media/usb/hdpvr/hdpvr-i2c.c index 5a3cb614a211..d76173f1ced1 100644 --- a/drivers/media/usb/hdpvr/hdpvr-i2c.c +++ b/drivers/media/usb/hdpvr/hdpvr-i2c.c | |||
| @@ -61,10 +61,10 @@ static int hdpvr_i2c_read(struct hdpvr_device *dev, int bus, | |||
| 61 | return -EINVAL; | 61 | return -EINVAL; |
| 62 | 62 | ||
| 63 | if (wlen) { | 63 | if (wlen) { |
| 64 | memcpy(&dev->i2c_buf, wdata, wlen); | 64 | memcpy(dev->i2c_buf, wdata, wlen); |
| 65 | ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), | 65 | ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), |
| 66 | REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST, | 66 | REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST, |
| 67 | (bus << 8) | addr, 0, &dev->i2c_buf, | 67 | (bus << 8) | addr, 0, dev->i2c_buf, |
| 68 | wlen, 1000); | 68 | wlen, 1000); |
| 69 | if (ret < 0) | 69 | if (ret < 0) |
| 70 | return ret; | 70 | return ret; |
| @@ -72,10 +72,10 @@ static int hdpvr_i2c_read(struct hdpvr_device *dev, int bus, | |||
| 72 | 72 | ||
| 73 | ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), | 73 | ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), |
| 74 | REQTYPE_I2C_READ, CTRL_READ_REQUEST, | 74 | REQTYPE_I2C_READ, CTRL_READ_REQUEST, |
| 75 | (bus << 8) | addr, 0, &dev->i2c_buf, len, 1000); | 75 | (bus << 8) | addr, 0, dev->i2c_buf, len, 1000); |
| 76 | 76 | ||
| 77 | if (ret == len) { | 77 | if (ret == len) { |
| 78 | memcpy(data, &dev->i2c_buf, len); | 78 | memcpy(data, dev->i2c_buf, len); |
| 79 | ret = 0; | 79 | ret = 0; |
| 80 | } else if (ret >= 0) | 80 | } else if (ret >= 0) |
| 81 | ret = -EIO; | 81 | ret = -EIO; |
| @@ -91,17 +91,17 @@ static int hdpvr_i2c_write(struct hdpvr_device *dev, int bus, | |||
| 91 | if (len > sizeof(dev->i2c_buf)) | 91 | if (len > sizeof(dev->i2c_buf)) |
| 92 | return -EINVAL; | 92 | return -EINVAL; |
| 93 | 93 | ||
| 94 | memcpy(&dev->i2c_buf, data, len); | 94 | memcpy(dev->i2c_buf, data, len); |
| 95 | ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), | 95 | ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), |
| 96 | REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST, | 96 | REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST, |
| 97 | (bus << 8) | addr, 0, &dev->i2c_buf, len, 1000); | 97 | (bus << 8) | addr, 0, dev->i2c_buf, len, 1000); |
| 98 | 98 | ||
| 99 | if (ret < 0) | 99 | if (ret < 0) |
| 100 | return ret; | 100 | return ret; |
| 101 | 101 | ||
| 102 | ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), | 102 | ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), |
| 103 | REQTYPE_I2C_WRITE_STATT, CTRL_READ_REQUEST, | 103 | REQTYPE_I2C_WRITE_STATT, CTRL_READ_REQUEST, |
| 104 | 0, 0, &dev->i2c_buf, 2, 1000); | 104 | 0, 0, dev->i2c_buf, 2, 1000); |
| 105 | 105 | ||
| 106 | if ((ret == 2) && (dev->i2c_buf[1] == (len - 1))) | 106 | if ((ret == 2) && (dev->i2c_buf[1] == (len - 1))) |
| 107 | ret = 0; | 107 | ret = 0; |
diff --git a/drivers/media/usb/hdpvr/hdpvr.h b/drivers/media/usb/hdpvr/hdpvr.h index 1d65b4185f57..fa43e1d45ea9 100644 --- a/drivers/media/usb/hdpvr/hdpvr.h +++ b/drivers/media/usb/hdpvr/hdpvr.h | |||
| @@ -215,7 +215,7 @@ enum { | |||
| 215 | */ | 215 | */ |
| 216 | 216 | ||
| 217 | /* :0 s 38 01 1700 0003 0001 1 = 00 | 217 | /* :0 s 38 01 1700 0003 0001 1 = 00 |
| 218 | * VIDEO STANDARD or FREQUNCY 0 = 60hz, 1 = 50hz | 218 | * VIDEO STANDARD or FREQUENCY 0 = 60hz, 1 = 50hz |
| 219 | */ | 219 | */ |
| 220 | 220 | ||
| 221 | /* :0 s 38 01 3100 0003 0004 4 = 03030000 | 221 | /* :0 s 38 01 3100 0003 0004 4 = 03030000 |
diff --git a/drivers/media/usb/pwc/pwc-dec23.c b/drivers/media/usb/pwc/pwc-dec23.c index 1283b3bd9800..854c36a5dec9 100644 --- a/drivers/media/usb/pwc/pwc-dec23.c +++ b/drivers/media/usb/pwc/pwc-dec23.c | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | * UNROLL_LOOP_FOR_COPYING_BLOCK | 41 | * UNROLL_LOOP_FOR_COPYING_BLOCK |
| 42 | * 0: use a loop for a smaller code (but little slower) | 42 | * 0: use a loop for a smaller code (but little slower) |
| 43 | * 1: when unrolling the loop, gcc produces some faster code (perhaps only | 43 | * 1: when unrolling the loop, gcc produces some faster code (perhaps only |
| 44 | * valid for intel processor class). Activating this option, automaticaly | 44 | * valid for intel processor class). Activating this option, automatically |
| 45 | * activate USE_LOOKUP_TABLE_TO_CLAMP | 45 | * activate USE_LOOKUP_TABLE_TO_CLAMP |
| 46 | */ | 46 | */ |
| 47 | #define UNROLL_LOOP_FOR_COPY 1 | 47 | #define UNROLL_LOOP_FOR_COPY 1 |
| @@ -332,7 +332,7 @@ void pwc_dec23_init(struct pwc_device *pdev, const unsigned char *cmd) | |||
| 332 | build_table_color(TimonRomTable[version][1], pdec->table_0004_pass2, pdec->table_8004_pass2); | 332 | build_table_color(TimonRomTable[version][1], pdec->table_0004_pass2, pdec->table_8004_pass2); |
| 333 | } | 333 | } |
| 334 | 334 | ||
| 335 | /* Informations can be coded on a variable number of bits but never less than 8 */ | 335 | /* Information can be coded on a variable number of bits but never less than 8 */ |
| 336 | shift = 8 - pdec->nbits; | 336 | shift = 8 - pdec->nbits; |
| 337 | pdec->scalebits = SCALEBITS - shift; | 337 | pdec->scalebits = SCALEBITS - shift; |
| 338 | pdec->nbitsmask = 0xFF >> shift; | 338 | pdec->nbitsmask = 0xFF >> shift; |
diff --git a/drivers/media/usb/pwc/pwc-if.c b/drivers/media/usb/pwc/pwc-if.c index 72704f4d5330..4e94197094ad 100644 --- a/drivers/media/usb/pwc/pwc-if.c +++ b/drivers/media/usb/pwc/pwc-if.c | |||
| @@ -76,6 +76,9 @@ | |||
| 76 | #include "pwc-dec23.h" | 76 | #include "pwc-dec23.h" |
| 77 | #include "pwc-dec1.h" | 77 | #include "pwc-dec1.h" |
| 78 | 78 | ||
| 79 | #define CREATE_TRACE_POINTS | ||
| 80 | #include <trace/events/pwc.h> | ||
| 81 | |||
| 79 | /* Function prototypes and driver templates */ | 82 | /* Function prototypes and driver templates */ |
| 80 | 83 | ||
| 81 | /* hotplug device table support */ | 84 | /* hotplug device table support */ |
| @@ -156,6 +159,32 @@ static const struct video_device pwc_template = { | |||
| 156 | /***************************************************************************/ | 159 | /***************************************************************************/ |
| 157 | /* Private functions */ | 160 | /* Private functions */ |
| 158 | 161 | ||
| 162 | static void *pwc_alloc_urb_buffer(struct device *dev, | ||
| 163 | size_t size, dma_addr_t *dma_handle) | ||
| 164 | { | ||
| 165 | void *buffer = kmalloc(size, GFP_KERNEL); | ||
| 166 | |||
| 167 | if (!buffer) | ||
| 168 | return NULL; | ||
| 169 | |||
| 170 | *dma_handle = dma_map_single(dev, buffer, size, DMA_FROM_DEVICE); | ||
| 171 | if (dma_mapping_error(dev, *dma_handle)) { | ||
| 172 | kfree(buffer); | ||
| 173 | return NULL; | ||
| 174 | } | ||
| 175 | |||
| 176 | return buffer; | ||
| 177 | } | ||
| 178 | |||
| 179 | static void pwc_free_urb_buffer(struct device *dev, | ||
| 180 | size_t size, | ||
| 181 | void *buffer, | ||
| 182 | dma_addr_t dma_handle) | ||
| 183 | { | ||
| 184 | dma_unmap_single(dev, dma_handle, size, DMA_FROM_DEVICE); | ||
| 185 | kfree(buffer); | ||
| 186 | } | ||
| 187 | |||
| 159 | static struct pwc_frame_buf *pwc_get_next_fill_buf(struct pwc_device *pdev) | 188 | static struct pwc_frame_buf *pwc_get_next_fill_buf(struct pwc_device *pdev) |
| 160 | { | 189 | { |
| 161 | unsigned long flags = 0; | 190 | unsigned long flags = 0; |
| @@ -260,6 +289,8 @@ static void pwc_isoc_handler(struct urb *urb) | |||
| 260 | int i, fst, flen; | 289 | int i, fst, flen; |
| 261 | unsigned char *iso_buf = NULL; | 290 | unsigned char *iso_buf = NULL; |
| 262 | 291 | ||
| 292 | trace_pwc_handler_enter(urb, pdev); | ||
| 293 | |||
| 263 | if (urb->status == -ENOENT || urb->status == -ECONNRESET || | 294 | if (urb->status == -ENOENT || urb->status == -ECONNRESET || |
| 264 | urb->status == -ESHUTDOWN) { | 295 | urb->status == -ESHUTDOWN) { |
| 265 | PWC_DEBUG_OPEN("URB (%p) unlinked %ssynchronously.\n", | 296 | PWC_DEBUG_OPEN("URB (%p) unlinked %ssynchronously.\n", |
| @@ -301,6 +332,11 @@ static void pwc_isoc_handler(struct urb *urb) | |||
| 301 | /* Reset ISOC error counter. We did get here, after all. */ | 332 | /* Reset ISOC error counter. We did get here, after all. */ |
| 302 | pdev->visoc_errors = 0; | 333 | pdev->visoc_errors = 0; |
| 303 | 334 | ||
| 335 | dma_sync_single_for_cpu(&urb->dev->dev, | ||
| 336 | urb->transfer_dma, | ||
| 337 | urb->transfer_buffer_length, | ||
| 338 | DMA_FROM_DEVICE); | ||
| 339 | |||
| 304 | /* vsync: 0 = don't copy data | 340 | /* vsync: 0 = don't copy data |
| 305 | 1 = sync-hunt | 341 | 1 = sync-hunt |
| 306 | 2 = synched | 342 | 2 = synched |
| @@ -347,7 +383,14 @@ static void pwc_isoc_handler(struct urb *urb) | |||
| 347 | pdev->vlast_packet_size = flen; | 383 | pdev->vlast_packet_size = flen; |
| 348 | } | 384 | } |
| 349 | 385 | ||
| 386 | dma_sync_single_for_device(&urb->dev->dev, | ||
| 387 | urb->transfer_dma, | ||
| 388 | urb->transfer_buffer_length, | ||
| 389 | DMA_FROM_DEVICE); | ||
| 390 | |||
| 350 | handler_end: | 391 | handler_end: |
| 392 | trace_pwc_handler_exit(urb, pdev); | ||
| 393 | |||
| 351 | i = usb_submit_urb(urb, GFP_ATOMIC); | 394 | i = usb_submit_urb(urb, GFP_ATOMIC); |
| 352 | if (i != 0) | 395 | if (i != 0) |
| 353 | PWC_ERROR("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i); | 396 | PWC_ERROR("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i); |
| @@ -421,16 +464,15 @@ retry: | |||
| 421 | urb->dev = udev; | 464 | urb->dev = udev; |
| 422 | urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint); | 465 | urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint); |
| 423 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; | 466 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; |
| 424 | urb->transfer_buffer = usb_alloc_coherent(udev, | 467 | urb->transfer_buffer_length = ISO_BUFFER_SIZE; |
| 425 | ISO_BUFFER_SIZE, | 468 | urb->transfer_buffer = pwc_alloc_urb_buffer(&udev->dev, |
| 426 | GFP_KERNEL, | 469 | urb->transfer_buffer_length, |
| 427 | &urb->transfer_dma); | 470 | &urb->transfer_dma); |
| 428 | if (urb->transfer_buffer == NULL) { | 471 | if (urb->transfer_buffer == NULL) { |
| 429 | PWC_ERROR("Failed to allocate urb buffer %d\n", i); | 472 | PWC_ERROR("Failed to allocate urb buffer %d\n", i); |
| 430 | pwc_isoc_cleanup(pdev); | 473 | pwc_isoc_cleanup(pdev); |
| 431 | return -ENOMEM; | 474 | return -ENOMEM; |
| 432 | } | 475 | } |
| 433 | urb->transfer_buffer_length = ISO_BUFFER_SIZE; | ||
| 434 | urb->complete = pwc_isoc_handler; | 476 | urb->complete = pwc_isoc_handler; |
| 435 | urb->context = pdev; | 477 | urb->context = pdev; |
| 436 | urb->start_frame = 0; | 478 | urb->start_frame = 0; |
| @@ -481,15 +523,16 @@ static void pwc_iso_free(struct pwc_device *pdev) | |||
| 481 | 523 | ||
| 482 | /* Freeing ISOC buffers one by one */ | 524 | /* Freeing ISOC buffers one by one */ |
| 483 | for (i = 0; i < MAX_ISO_BUFS; i++) { | 525 | for (i = 0; i < MAX_ISO_BUFS; i++) { |
| 484 | if (pdev->urbs[i]) { | 526 | struct urb *urb = pdev->urbs[i]; |
| 527 | |||
| 528 | if (urb) { | ||
| 485 | PWC_DEBUG_MEMORY("Freeing URB\n"); | 529 | PWC_DEBUG_MEMORY("Freeing URB\n"); |
| 486 | if (pdev->urbs[i]->transfer_buffer) { | 530 | if (urb->transfer_buffer) |
| 487 | usb_free_coherent(pdev->udev, | 531 | pwc_free_urb_buffer(&urb->dev->dev, |
| 488 | pdev->urbs[i]->transfer_buffer_length, | 532 | urb->transfer_buffer_length, |
| 489 | pdev->urbs[i]->transfer_buffer, | 533 | urb->transfer_buffer, |
| 490 | pdev->urbs[i]->transfer_dma); | 534 | urb->transfer_dma); |
| 491 | } | 535 | usb_free_urb(urb); |
| 492 | usb_free_urb(pdev->urbs[i]); | ||
| 493 | pdev->urbs[i] = NULL; | 536 | pdev->urbs[i] = NULL; |
| 494 | } | 537 | } |
| 495 | } | 538 | } |
| @@ -610,7 +653,7 @@ static int buffer_prepare(struct vb2_buffer *vb) | |||
| 610 | { | 653 | { |
| 611 | struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue); | 654 | struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue); |
| 612 | 655 | ||
| 613 | /* Don't allow queing new buffers after device disconnection */ | 656 | /* Don't allow queueing new buffers after device disconnection */ |
| 614 | if (!pdev->udev) | 657 | if (!pdev->udev) |
| 615 | return -ENODEV; | 658 | return -ENODEV; |
| 616 | 659 | ||
diff --git a/drivers/media/usb/pwc/pwc-misc.c b/drivers/media/usb/pwc/pwc-misc.c index 9be5adffa874..03888fc3804d 100644 --- a/drivers/media/usb/pwc/pwc-misc.c +++ b/drivers/media/usb/pwc/pwc-misc.c | |||
| @@ -59,7 +59,7 @@ int pwc_get_size(struct pwc_device *pdev, int width, int height) | |||
| 59 | return i; | 59 | return i; |
| 60 | } | 60 | } |
| 61 | 61 | ||
| 62 | /* Never reached there always is atleast one supported mode */ | 62 | /* Never reached there always is at least one supported mode */ |
| 63 | return 0; | 63 | return 0; |
| 64 | } | 64 | } |
| 65 | 65 | ||
diff --git a/drivers/media/usb/siano/smsusb.c b/drivers/media/usb/siano/smsusb.c index 2ffded08407b..4fc03ec8a4f1 100644 --- a/drivers/media/usb/siano/smsusb.c +++ b/drivers/media/usb/siano/smsusb.c | |||
| @@ -75,7 +75,7 @@ static int smsusb_submit_urb(struct smsusb_device_t *dev, | |||
| 75 | struct smsusb_urb_t *surb); | 75 | struct smsusb_urb_t *surb); |
| 76 | 76 | ||
| 77 | /* | 77 | /* |
| 78 | * Completing URB's callback handler - bottom half (proccess context) | 78 | * Completing URB's callback handler - bottom half (process context) |
| 79 | * submits the URB prepared on smsusb_onresponse() | 79 | * submits the URB prepared on smsusb_onresponse() |
| 80 | */ | 80 | */ |
| 81 | static void do_submit_urb(struct work_struct *work) | 81 | static void do_submit_urb(struct work_struct *work) |
diff --git a/drivers/media/usb/stk1160/stk1160-core.c b/drivers/media/usb/stk1160/stk1160-core.c index 468f5ccf4ae6..a44a44ff3bb1 100644 --- a/drivers/media/usb/stk1160/stk1160-core.c +++ b/drivers/media/usb/stk1160/stk1160-core.c | |||
| @@ -297,7 +297,7 @@ static int stk1160_probe(struct usb_interface *interface, | |||
| 297 | return -ENOMEM; | 297 | return -ENOMEM; |
| 298 | 298 | ||
| 299 | /* | 299 | /* |
| 300 | * Scan usb posibilities and populate alt_max_pkt_size array. | 300 | * Scan usb possibilities and populate alt_max_pkt_size array. |
| 301 | * Also, check if device speed is fast enough. | 301 | * Also, check if device speed is fast enough. |
| 302 | */ | 302 | */ |
| 303 | rc = stk1160_scan_usb(interface, udev, alt_max_pkt_size); | 303 | rc = stk1160_scan_usb(interface, udev, alt_max_pkt_size); |
| @@ -426,7 +426,7 @@ static void stk1160_disconnect(struct usb_interface *interface) | |||
| 426 | 426 | ||
| 427 | /* | 427 | /* |
| 428 | * This calls stk1160_release if it's the last reference. | 428 | * This calls stk1160_release if it's the last reference. |
| 429 | * Otherwise, release is posponed until there are no users left. | 429 | * Otherwise, release is postponed until there are no users left. |
| 430 | */ | 430 | */ |
| 431 | v4l2_device_put(&dev->v4l2_dev); | 431 | v4l2_device_put(&dev->v4l2_dev); |
| 432 | } | 432 | } |
diff --git a/drivers/media/usb/stk1160/stk1160-reg.h b/drivers/media/usb/stk1160/stk1160-reg.h index 7b08a3cc4504..2e400db0ad0e 100644 --- a/drivers/media/usb/stk1160/stk1160-reg.h +++ b/drivers/media/usb/stk1160/stk1160-reg.h | |||
| @@ -23,7 +23,7 @@ | |||
| 23 | /* GPIO Control */ | 23 | /* GPIO Control */ |
| 24 | #define STK1160_GCTRL 0x000 | 24 | #define STK1160_GCTRL 0x000 |
| 25 | 25 | ||
| 26 | /* Remote Wakup Control */ | 26 | /* Remote Wakeup Control */ |
| 27 | #define STK1160_RMCTL 0x00c | 27 | #define STK1160_RMCTL 0x00c |
| 28 | 28 | ||
| 29 | /* Power-on Strapping Data */ | 29 | /* Power-on Strapping Data */ |
| @@ -104,7 +104,7 @@ | |||
| 104 | #define STK1160_SBUSR_RA 0x208 | 104 | #define STK1160_SBUSR_RA 0x208 |
| 105 | #define STK1160_SBUSR_RD 0x209 | 105 | #define STK1160_SBUSR_RD 0x209 |
| 106 | 106 | ||
| 107 | /* Alternate Serial Inteface Control */ | 107 | /* Alternate Serial Interface Control */ |
| 108 | #define STK1160_ASIC 0x2fc | 108 | #define STK1160_ASIC 0x2fc |
| 109 | 109 | ||
| 110 | /* PLL Select Options */ | 110 | /* PLL Select Options */ |
diff --git a/drivers/media/usb/stkwebcam/stk-webcam.c b/drivers/media/usb/stkwebcam/stk-webcam.c index b8ec74d98e8d..8f545861471e 100644 --- a/drivers/media/usb/stkwebcam/stk-webcam.c +++ b/drivers/media/usb/stkwebcam/stk-webcam.c | |||
| @@ -1006,7 +1006,7 @@ static int stk_setup_format(struct stk_camera *dev) | |||
| 1006 | stk_camera_write_reg(dev, 0x001c, 0x46); | 1006 | stk_camera_write_reg(dev, 0x001c, 0x46); |
| 1007 | /* | 1007 | /* |
| 1008 | * Registers 0x0115 0x0114 are the size of each line (bytes), | 1008 | * Registers 0x0115 0x0114 are the size of each line (bytes), |
| 1009 | * regs 0x0117 0x0116 are the heigth of the image. | 1009 | * regs 0x0117 0x0116 are the height of the image. |
| 1010 | */ | 1010 | */ |
| 1011 | stk_camera_write_reg(dev, 0x0115, | 1011 | stk_camera_write_reg(dev, 0x0115, |
| 1012 | ((stk_sizes[i].w * depth) >> 8) & 0xff); | 1012 | ((stk_sizes[i].w * depth) >> 8) & 0xff); |
| @@ -1144,7 +1144,7 @@ static int stk_vidioc_dqbuf(struct file *filp, | |||
| 1144 | sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_QUEUED; | 1144 | sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_QUEUED; |
| 1145 | sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_DONE; | 1145 | sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_DONE; |
| 1146 | sbuf->v4lbuf.sequence = ++dev->sequence; | 1146 | sbuf->v4lbuf.sequence = ++dev->sequence; |
| 1147 | v4l2_get_timestamp(&sbuf->v4lbuf.timestamp); | 1147 | sbuf->v4lbuf.timestamp = ns_to_timeval(ktime_get_ns()); |
| 1148 | 1148 | ||
| 1149 | *buf = sbuf->v4lbuf; | 1149 | *buf = sbuf->v4lbuf; |
| 1150 | return 0; | 1150 | return 0; |
diff --git a/drivers/media/usb/tm6000/tm6000-alsa.c b/drivers/media/usb/tm6000/tm6000-alsa.c index b965931793b5..d6c79c13b332 100644 --- a/drivers/media/usb/tm6000/tm6000-alsa.c +++ b/drivers/media/usb/tm6000/tm6000-alsa.c | |||
| @@ -58,7 +58,7 @@ module_param(debug, int, 0644); | |||
| 58 | MODULE_PARM_DESC(debug, "enable debug messages"); | 58 | MODULE_PARM_DESC(debug, "enable debug messages"); |
| 59 | 59 | ||
| 60 | /**************************************************************************** | 60 | /**************************************************************************** |
| 61 | Module specific funtions | 61 | Module specific functions |
| 62 | ****************************************************************************/ | 62 | ****************************************************************************/ |
| 63 | 63 | ||
| 64 | /* | 64 | /* |
diff --git a/drivers/media/usb/tm6000/tm6000-core.c b/drivers/media/usb/tm6000/tm6000-core.c index d3229aa45fcb..2c723706f8c8 100644 --- a/drivers/media/usb/tm6000/tm6000-core.c +++ b/drivers/media/usb/tm6000/tm6000-core.c | |||
| @@ -668,7 +668,7 @@ int tm6000_set_audio_rinput(struct tm6000_core *dev) | |||
| 668 | areg_f0 = 0x04; | 668 | areg_f0 = 0x04; |
| 669 | break; | 669 | break; |
| 670 | default: | 670 | default: |
| 671 | printk(KERN_INFO "%s: audio input dosn't support\n", | 671 | printk(KERN_INFO "%s: audio input doesn't support\n", |
| 672 | dev->name); | 672 | dev->name); |
| 673 | return 0; | 673 | return 0; |
| 674 | break; | 674 | break; |
| @@ -690,7 +690,7 @@ int tm6000_set_audio_rinput(struct tm6000_core *dev) | |||
| 690 | areg_eb = 0x04; | 690 | areg_eb = 0x04; |
| 691 | break; | 691 | break; |
| 692 | default: | 692 | default: |
| 693 | printk(KERN_INFO "%s: audio input dosn't support\n", | 693 | printk(KERN_INFO "%s: audio input doesn't support\n", |
| 694 | dev->name); | 694 | dev->name); |
| 695 | return 0; | 695 | return 0; |
| 696 | break; | 696 | break; |
diff --git a/drivers/media/usb/tm6000/tm6000-dvb.c b/drivers/media/usb/tm6000/tm6000-dvb.c index 3a4e545c6037..36eea1950e77 100644 --- a/drivers/media/usb/tm6000/tm6000-dvb.c +++ b/drivers/media/usb/tm6000/tm6000-dvb.c | |||
| @@ -149,7 +149,7 @@ static int tm6000_start_stream(struct tm6000_core *dev) | |||
| 149 | ret, __func__); | 149 | ret, __func__); |
| 150 | return ret; | 150 | return ret; |
| 151 | } else | 151 | } else |
| 152 | printk(KERN_ERR "tm6000: pipe resetted\n"); | 152 | printk(KERN_ERR "tm6000: pipe reset\n"); |
| 153 | 153 | ||
| 154 | /* mutex_lock(&tm6000_driver.open_close_mutex); */ | 154 | /* mutex_lock(&tm6000_driver.open_close_mutex); */ |
| 155 | ret = usb_submit_urb(dvb->bulk_urb, GFP_ATOMIC); | 155 | ret = usb_submit_urb(dvb->bulk_urb, GFP_ATOMIC); |
diff --git a/drivers/media/usb/tm6000/tm6000-i2c.c b/drivers/media/usb/tm6000/tm6000-i2c.c index 8c0476dfe54f..b37782d6f79c 100644 --- a/drivers/media/usb/tm6000/tm6000-i2c.c +++ b/drivers/media/usb/tm6000/tm6000-i2c.c | |||
| @@ -155,7 +155,7 @@ static int tm6000_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
| 155 | /* | 155 | /* |
| 156 | * The TM6000 only supports a read transaction | 156 | * The TM6000 only supports a read transaction |
| 157 | * immediately after a 1 or 2 byte write to select | 157 | * immediately after a 1 or 2 byte write to select |
| 158 | * a register. We cannot fulfil this request. | 158 | * a register. We cannot fulfill this request. |
| 159 | */ | 159 | */ |
| 160 | i2c_dprintk(2, " read without preceding write not supported"); | 160 | i2c_dprintk(2, " read without preceding write not supported"); |
| 161 | rc = -EOPNOTSUPP; | 161 | rc = -EOPNOTSUPP; |
diff --git a/drivers/media/usb/tm6000/tm6000-stds.c b/drivers/media/usb/tm6000/tm6000-stds.c index c0c75951246b..858cb4f3a9ca 100644 --- a/drivers/media/usb/tm6000/tm6000-stds.c +++ b/drivers/media/usb/tm6000/tm6000-stds.c | |||
| @@ -323,7 +323,7 @@ static int tm6000_set_audio_std(struct tm6000_core *dev) | |||
| 323 | { | 323 | { |
| 324 | uint8_t areg_02 = 0x04; /* GC1 Fixed gain 0dB */ | 324 | uint8_t areg_02 = 0x04; /* GC1 Fixed gain 0dB */ |
| 325 | uint8_t areg_05 = 0x01; /* Auto 4.5 = M Japan, Auto 6.5 = DK */ | 325 | uint8_t areg_05 = 0x01; /* Auto 4.5 = M Japan, Auto 6.5 = DK */ |
| 326 | uint8_t areg_06 = 0x02; /* Auto de-emphasis, mannual channel mode */ | 326 | uint8_t areg_06 = 0x02; /* Auto de-emphasis, manual channel mode */ |
| 327 | 327 | ||
| 328 | if (dev->radio) { | 328 | if (dev->radio) { |
| 329 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); | 329 | tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00); |
diff --git a/drivers/media/usb/tm6000/tm6000-video.c b/drivers/media/usb/tm6000/tm6000-video.c index ee7b5318b351..072210f5f92f 100644 --- a/drivers/media/usb/tm6000/tm6000-video.c +++ b/drivers/media/usb/tm6000/tm6000-video.c | |||
| @@ -106,7 +106,7 @@ static inline void buffer_filled(struct tm6000_core *dev, | |||
| 106 | dprintk(dev, V4L2_DEBUG_ISOC, "[%p/%d] wakeup\n", buf, buf->vb.i); | 106 | dprintk(dev, V4L2_DEBUG_ISOC, "[%p/%d] wakeup\n", buf, buf->vb.i); |
| 107 | buf->vb.state = VIDEOBUF_DONE; | 107 | buf->vb.state = VIDEOBUF_DONE; |
| 108 | buf->vb.field_count++; | 108 | buf->vb.field_count++; |
| 109 | v4l2_get_timestamp(&buf->vb.ts); | 109 | buf->vb.ts = ktime_get_ns(); |
| 110 | 110 | ||
| 111 | list_del(&buf->vb.queue); | 111 | list_del(&buf->vb.queue); |
| 112 | wake_up(&buf->vb.done); | 112 | wake_up(&buf->vb.done); |
| @@ -180,7 +180,7 @@ static int copy_streams(u8 *data, unsigned long len, | |||
| 180 | field = (header >> 11) & 0x1; | 180 | field = (header >> 11) & 0x1; |
| 181 | line = (header >> 12) & 0x1ff; | 181 | line = (header >> 12) & 0x1ff; |
| 182 | cmd = (header >> 21) & 0x7; | 182 | cmd = (header >> 21) & 0x7; |
| 183 | /* Validates haeder fields */ | 183 | /* Validates header fields */ |
| 184 | if (size > TM6000_URB_MSG_LEN) | 184 | if (size > TM6000_URB_MSG_LEN) |
| 185 | size = TM6000_URB_MSG_LEN; | 185 | size = TM6000_URB_MSG_LEN; |
| 186 | pktsize = TM6000_URB_MSG_LEN; | 186 | pktsize = TM6000_URB_MSG_LEN; |
diff --git a/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c index 6eb84cf007b4..4db7a013e049 100644 --- a/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c +++ b/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c | |||
| @@ -306,7 +306,7 @@ static int ttusb_boot_dsp(struct ttusb *ttusb) | |||
| 306 | b[3] = 28; | 306 | b[3] = 28; |
| 307 | 307 | ||
| 308 | /* upload dsp code in 32 byte steps (36 didn't work for me ...) */ | 308 | /* upload dsp code in 32 byte steps (36 didn't work for me ...) */ |
| 309 | /* 32 is max packet size, no messages should be splitted. */ | 309 | /* 32 is max packet size, no messages should be split. */ |
| 310 | for (i = 0; i < fw->size; i += 28) { | 310 | for (i = 0; i < fw->size; i += 28) { |
| 311 | memcpy(&b[4], &fw->data[i], 28); | 311 | memcpy(&b[4], &fw->data[i], 28); |
| 312 | 312 | ||
diff --git a/drivers/media/usb/ttusb-dec/ttusb_dec.c b/drivers/media/usb/ttusb-dec/ttusb_dec.c index 44ca66cb9b8f..897ef5e1da71 100644 --- a/drivers/media/usb/ttusb-dec/ttusb_dec.c +++ b/drivers/media/usb/ttusb-dec/ttusb_dec.c | |||
| @@ -284,7 +284,7 @@ static void ttusb_dec_handle_irq( struct urb *urb) | |||
| 284 | * | 284 | * |
| 285 | * this is an fact a bit too simple implementation; | 285 | * this is an fact a bit too simple implementation; |
| 286 | * the box also reports a keyrepeat signal | 286 | * the box also reports a keyrepeat signal |
| 287 | * (with buffer[3] == 0x40) in an intervall of ~100ms. | 287 | * (with buffer[3] == 0x40) in an interval of ~100ms. |
| 288 | * But to handle this correctly we had to imlemenent some | 288 | * But to handle this correctly we had to imlemenent some |
| 289 | * kind of timer which signals a 'key up' event if no | 289 | * kind of timer which signals a 'key up' event if no |
| 290 | * keyrepeat signal is received for lets say 200ms. | 290 | * keyrepeat signal is received for lets say 200ms. |
diff --git a/drivers/media/usb/usbvision/usbvision-core.c b/drivers/media/usb/usbvision/usbvision-core.c index 31e0e98d6daf..92d166bf8c12 100644 --- a/drivers/media/usb/usbvision/usbvision-core.c +++ b/drivers/media/usb/usbvision/usbvision-core.c | |||
| @@ -900,7 +900,7 @@ static enum parse_state usbvision_parse_lines_420(struct usb_usbvision *usbvisio | |||
| 900 | if ((frame->curline + 1) >= frame->frmheight) | 900 | if ((frame->curline + 1) >= frame->frmheight) |
| 901 | return parse_state_next_frame; | 901 | return parse_state_next_frame; |
| 902 | 902 | ||
| 903 | block_split = (pixel_per_line%y_block_size) ? 1 : 0; /* are some blocks splitted into different lines? */ | 903 | block_split = (pixel_per_line%y_block_size) ? 1 : 0; /* are some blocks split into different lines? */ |
| 904 | 904 | ||
| 905 | y_odd_offset = (pixel_per_line / y_block_size) * (y_block_size + uv_block_size) | 905 | y_odd_offset = (pixel_per_line / y_block_size) * (y_block_size + uv_block_size) |
| 906 | + block_split * uv_block_size; | 906 | + block_split * uv_block_size; |
| @@ -1160,7 +1160,7 @@ static void usbvision_parse_data(struct usb_usbvision *usbvision) | |||
| 1160 | 1160 | ||
| 1161 | if (newstate == parse_state_next_frame) { | 1161 | if (newstate == parse_state_next_frame) { |
| 1162 | frame->grabstate = frame_state_done; | 1162 | frame->grabstate = frame_state_done; |
| 1163 | v4l2_get_timestamp(&(frame->timestamp)); | 1163 | frame->ts = ktime_get_ns(); |
| 1164 | frame->sequence = usbvision->frame_num; | 1164 | frame->sequence = usbvision->frame_num; |
| 1165 | 1165 | ||
| 1166 | spin_lock_irqsave(&usbvision->queue_lock, lock_flags); | 1166 | spin_lock_irqsave(&usbvision->queue_lock, lock_flags); |
| @@ -1865,7 +1865,7 @@ static int usbvision_set_compress_params(struct usb_usbvision *usbvision) | |||
| 1865 | value[4] = 0xA2; /* Reg.48 BUF_THR I'm not sure if this does something in not compressed mode. */ | 1865 | value[4] = 0xA2; /* Reg.48 BUF_THR I'm not sure if this does something in not compressed mode. */ |
| 1866 | value[5] = 0x00; /* Reg.49 DVI_YUV This has nothing to do with compression */ | 1866 | value[5] = 0x00; /* Reg.49 DVI_YUV This has nothing to do with compression */ |
| 1867 | 1867 | ||
| 1868 | /* catched values for NT1004 */ | 1868 | /* caught values for NT1004 */ |
| 1869 | /* value[0] = 0xFF; Never apply intra mode automatically */ | 1869 | /* value[0] = 0xFF; Never apply intra mode automatically */ |
| 1870 | /* value[1] = 0xF1; Use full frame height for virtual strip width; One line per strip */ | 1870 | /* value[1] = 0xF1; Use full frame height for virtual strip width; One line per strip */ |
| 1871 | /* value[2] = 0x01; Force intra mode on all new frames */ | 1871 | /* value[2] = 0x01; Force intra mode on all new frames */ |
| @@ -1943,7 +1943,7 @@ int usbvision_set_input(struct usb_usbvision *usbvision) | |||
| 1943 | /* SAA7113 uses 8 bit output */ | 1943 | /* SAA7113 uses 8 bit output */ |
| 1944 | value[0] = USBVISION_8_422_SYNC; | 1944 | value[0] = USBVISION_8_422_SYNC; |
| 1945 | } else { | 1945 | } else { |
| 1946 | /* I'm sure only about d2-d0 [010] 16 bit 4:2:2 usin sync pulses | 1946 | /* I'm sure only about d2-d0 [010] 16 bit 4:2:2 using sync pulses |
| 1947 | * as that is how saa7111 is configured */ | 1947 | * as that is how saa7111 is configured */ |
| 1948 | value[0] = USBVISION_16_422_SYNC; | 1948 | value[0] = USBVISION_16_422_SYNC; |
| 1949 | /* | USBVISION_VSNC_POL | USBVISION_VCLK_POL);*/ | 1949 | /* | USBVISION_VSNC_POL | USBVISION_VCLK_POL);*/ |
| @@ -2146,7 +2146,7 @@ int usbvision_power_on(struct usb_usbvision *usbvision) | |||
| 2146 | 2146 | ||
| 2147 | /* | 2147 | /* |
| 2148 | * usbvision_begin_streaming() | 2148 | * usbvision_begin_streaming() |
| 2149 | * Sure you have to put bit 7 to 0, if not incoming frames are droped, but no | 2149 | * Sure you have to put bit 7 to 0, if not incoming frames are dropped, but no |
| 2150 | * idea about the rest | 2150 | * idea about the rest |
| 2151 | */ | 2151 | */ |
| 2152 | int usbvision_begin_streaming(struct usb_usbvision *usbvision) | 2152 | int usbvision_begin_streaming(struct usb_usbvision *usbvision) |
diff --git a/drivers/media/usb/usbvision/usbvision-video.c b/drivers/media/usb/usbvision/usbvision-video.c index dd2ff8ed6c6a..e611052ebf59 100644 --- a/drivers/media/usb/usbvision/usbvision-video.c +++ b/drivers/media/usb/usbvision/usbvision-video.c | |||
| @@ -706,7 +706,7 @@ static int vidioc_querybuf(struct file *file, | |||
| 706 | vb->length = usbvision->curwidth * | 706 | vb->length = usbvision->curwidth * |
| 707 | usbvision->curheight * | 707 | usbvision->curheight * |
| 708 | usbvision->palette.bytes_per_pixel; | 708 | usbvision->palette.bytes_per_pixel; |
| 709 | vb->timestamp = usbvision->frame[vb->index].timestamp; | 709 | vb->timestamp = ns_to_timeval(usbvision->frame[vb->index].ts); |
| 710 | vb->sequence = usbvision->frame[vb->index].sequence; | 710 | vb->sequence = usbvision->frame[vb->index].sequence; |
| 711 | return 0; | 711 | return 0; |
| 712 | } | 712 | } |
| @@ -775,7 +775,7 @@ static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *vb) | |||
| 775 | V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | 775 | V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
| 776 | vb->index = f->index; | 776 | vb->index = f->index; |
| 777 | vb->sequence = f->sequence; | 777 | vb->sequence = f->sequence; |
| 778 | vb->timestamp = f->timestamp; | 778 | vb->timestamp = ns_to_timeval(f->ts); |
| 779 | vb->field = V4L2_FIELD_NONE; | 779 | vb->field = V4L2_FIELD_NONE; |
| 780 | vb->bytesused = f->scanlength; | 780 | vb->bytesused = f->scanlength; |
| 781 | 781 | ||
diff --git a/drivers/media/usb/usbvision/usbvision.h b/drivers/media/usb/usbvision/usbvision.h index 017e7baf5747..668167f8951d 100644 --- a/drivers/media/usb/usbvision/usbvision.h +++ b/drivers/media/usb/usbvision/usbvision.h | |||
| @@ -135,11 +135,11 @@ | |||
| 135 | 135 | ||
| 136 | #define MIN_FRAME_WIDTH 64 | 136 | #define MIN_FRAME_WIDTH 64 |
| 137 | #define MAX_USB_WIDTH 320 /* 384 */ | 137 | #define MAX_USB_WIDTH 320 /* 384 */ |
| 138 | #define MAX_FRAME_WIDTH 320 /* 384 */ /* streching sometimes causes crashes*/ | 138 | #define MAX_FRAME_WIDTH 320 /* 384 */ /* stretching sometimes causes crashes*/ |
| 139 | 139 | ||
| 140 | #define MIN_FRAME_HEIGHT 48 | 140 | #define MIN_FRAME_HEIGHT 48 |
| 141 | #define MAX_USB_HEIGHT 240 /* 288 */ | 141 | #define MAX_USB_HEIGHT 240 /* 288 */ |
| 142 | #define MAX_FRAME_HEIGHT 240 /* 288 */ /* Streching sometimes causes crashes*/ | 142 | #define MAX_FRAME_HEIGHT 240 /* 288 */ /* Stretching sometimes causes crashes*/ |
| 143 | 143 | ||
| 144 | #define MAX_FRAME_SIZE (MAX_FRAME_WIDTH * MAX_FRAME_HEIGHT * MAX_BYTES_PER_PIXEL) | 144 | #define MAX_FRAME_SIZE (MAX_FRAME_WIDTH * MAX_FRAME_HEIGHT * MAX_BYTES_PER_PIXEL) |
| 145 | #define USBVISION_CLIPMASK_SIZE (MAX_FRAME_WIDTH * MAX_FRAME_HEIGHT / 8) /* bytesize of clipmask */ | 145 | #define USBVISION_CLIPMASK_SIZE (MAX_FRAME_WIDTH * MAX_FRAME_HEIGHT / 8) /* bytesize of clipmask */ |
| @@ -177,7 +177,7 @@ enum { | |||
| 177 | * G = 1.164*(Y-16) - 0.813*(U-128) - 0.391*(V-128) | 177 | * G = 1.164*(Y-16) - 0.813*(U-128) - 0.391*(V-128) |
| 178 | * R = 1.164*(Y-16) + 1.596*(U-128) | 178 | * R = 1.164*(Y-16) + 1.596*(U-128) |
| 179 | * | 179 | * |
| 180 | * If you fancy integer arithmetics (as you should), hear this: | 180 | * If you fancy integer arithmetic (as you should), hear this: |
| 181 | * | 181 | * |
| 182 | * 65536*B = 76284*(Y-16) + 132252*(V-128) | 182 | * 65536*B = 76284*(Y-16) + 132252*(V-128) |
| 183 | * 65536*G = 76284*(Y-16) - 53281*(U-128) - 25625*(V-128) | 183 | * 65536*G = 76284*(Y-16) - 53281*(U-128) - 25625*(V-128) |
| @@ -316,7 +316,7 @@ struct usbvision_frame { | |||
| 316 | long bytes_read; /* amount of scanlength that has been read from data */ | 316 | long bytes_read; /* amount of scanlength that has been read from data */ |
| 317 | struct usbvision_v4l2_format_st v4l2_format; /* format the user needs*/ | 317 | struct usbvision_v4l2_format_st v4l2_format; /* format the user needs*/ |
| 318 | int v4l2_linesize; /* bytes for one videoline*/ | 318 | int v4l2_linesize; /* bytes for one videoline*/ |
| 319 | struct timeval timestamp; | 319 | u64 ts; |
| 320 | int sequence; /* How many video frames we send to user */ | 320 | int sequence; /* How many video frames we send to user */ |
| 321 | }; | 321 | }; |
| 322 | 322 | ||
| @@ -438,7 +438,7 @@ struct usb_usbvision { | |||
| 438 | int last_compr_level; /* How strong (100) or weak (0) was compression */ | 438 | int last_compr_level; /* How strong (100) or weak (0) was compression */ |
| 439 | int usb_bandwidth; /* Mbit/s */ | 439 | int usb_bandwidth; /* Mbit/s */ |
| 440 | 440 | ||
| 441 | /* Statistics that can be overlayed on the screen */ | 441 | /* Statistics that can be overlaid on the screen */ |
| 442 | unsigned long isoc_urb_count; /* How many URBs we received so far */ | 442 | unsigned long isoc_urb_count; /* How many URBs we received so far */ |
| 443 | unsigned long urb_length; /* Length of last URB */ | 443 | unsigned long urb_length; /* Length of last URB */ |
| 444 | unsigned long isoc_data_count; /* How many bytes we received */ | 444 | unsigned long isoc_data_count; /* How many bytes we received */ |
diff --git a/drivers/media/usb/uvc/uvc_ctrl.c b/drivers/media/usb/uvc/uvc_ctrl.c index d45415cbe6e7..14cff91b7aea 100644 --- a/drivers/media/usb/uvc/uvc_ctrl.c +++ b/drivers/media/usb/uvc/uvc_ctrl.c | |||
| @@ -1212,7 +1212,7 @@ static void uvc_ctrl_fill_event(struct uvc_video_chain *chain, | |||
| 1212 | 1212 | ||
| 1213 | __uvc_query_v4l2_ctrl(chain, ctrl, mapping, &v4l2_ctrl); | 1213 | __uvc_query_v4l2_ctrl(chain, ctrl, mapping, &v4l2_ctrl); |
| 1214 | 1214 | ||
| 1215 | memset(ev->reserved, 0, sizeof(ev->reserved)); | 1215 | memset(ev, 0, sizeof(*ev)); |
| 1216 | ev->type = V4L2_EVENT_CTRL; | 1216 | ev->type = V4L2_EVENT_CTRL; |
| 1217 | ev->id = v4l2_ctrl.id; | 1217 | ev->id = v4l2_ctrl.id; |
| 1218 | ev->u.ctrl.value = value; | 1218 | ev->u.ctrl.value = value; |
diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c index b62cbd800111..10cfe8e51626 100644 --- a/drivers/media/usb/uvc/uvc_driver.c +++ b/drivers/media/usb/uvc/uvc_driver.c | |||
| @@ -1106,11 +1106,19 @@ static int uvc_parse_standard_control(struct uvc_device *dev, | |||
| 1106 | return -EINVAL; | 1106 | return -EINVAL; |
| 1107 | } | 1107 | } |
| 1108 | 1108 | ||
| 1109 | /* Make sure the terminal type MSB is not null, otherwise it | 1109 | /* |
| 1110 | * could be confused with a unit. | 1110 | * Reject invalid terminal types that would cause issues: |
| 1111 | * | ||
| 1112 | * - The high byte must be non-zero, otherwise it would be | ||
| 1113 | * confused with a unit. | ||
| 1114 | * | ||
| 1115 | * - Bit 15 must be 0, as we use it internally as a terminal | ||
| 1116 | * direction flag. | ||
| 1117 | * | ||
| 1118 | * Other unknown types are accepted. | ||
| 1111 | */ | 1119 | */ |
| 1112 | type = get_unaligned_le16(&buffer[4]); | 1120 | type = get_unaligned_le16(&buffer[4]); |
| 1113 | if ((type & 0xff00) == 0) { | 1121 | if ((type & 0x7f00) == 0 || (type & 0x8000) != 0) { |
| 1114 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | 1122 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " |
| 1115 | "interface %d INPUT_TERMINAL %d has invalid " | 1123 | "interface %d INPUT_TERMINAL %d has invalid " |
| 1116 | "type 0x%04x, skipping\n", udev->devnum, | 1124 | "type 0x%04x, skipping\n", udev->devnum, |
| @@ -2175,7 +2183,7 @@ static int uvc_probe(struct usb_interface *intf, | |||
| 2175 | if (udev->serial) | 2183 | if (udev->serial) |
| 2176 | strscpy(dev->mdev.serial, udev->serial, | 2184 | strscpy(dev->mdev.serial, udev->serial, |
| 2177 | sizeof(dev->mdev.serial)); | 2185 | sizeof(dev->mdev.serial)); |
| 2178 | strscpy(dev->mdev.bus_info, udev->devpath, sizeof(dev->mdev.bus_info)); | 2186 | usb_make_path(udev, dev->mdev.bus_info, sizeof(dev->mdev.bus_info)); |
| 2179 | dev->mdev.hw_revision = le16_to_cpu(udev->descriptor.bcdDevice); | 2187 | dev->mdev.hw_revision = le16_to_cpu(udev->descriptor.bcdDevice); |
| 2180 | media_device_init(&dev->mdev); | 2188 | media_device_init(&dev->mdev); |
| 2181 | 2189 | ||
diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c index 84525ff04745..182dcac49aa3 100644 --- a/drivers/media/usb/uvc/uvc_video.c +++ b/drivers/media/usb/uvc/uvc_video.c | |||
| @@ -676,6 +676,14 @@ void uvc_video_clock_update(struct uvc_streaming *stream, | |||
| 676 | if (!uvc_hw_timestamps_param) | 676 | if (!uvc_hw_timestamps_param) |
| 677 | return; | 677 | return; |
| 678 | 678 | ||
| 679 | /* | ||
| 680 | * We will get called from __vb2_queue_cancel() if there are buffers | ||
| 681 | * done but not dequeued by the user, but the sample array has already | ||
| 682 | * been released at that time. Just bail out in that case. | ||
| 683 | */ | ||
| 684 | if (!clock->samples) | ||
| 685 | return; | ||
| 686 | |||
| 679 | spin_lock_irqsave(&clock->lock, flags); | 687 | spin_lock_irqsave(&clock->lock, flags); |
| 680 | 688 | ||
| 681 | if (clock->count < clock->size) | 689 | if (clock->count < clock->size) |
| @@ -2000,7 +2008,7 @@ int uvc_video_init(struct uvc_streaming *stream) | |||
| 2000 | usb_set_interface(stream->dev->udev, stream->intfnum, 0); | 2008 | usb_set_interface(stream->dev->udev, stream->intfnum, 0); |
| 2001 | 2009 | ||
| 2002 | /* Set the streaming probe control with default streaming parameters | 2010 | /* Set the streaming probe control with default streaming parameters |
| 2003 | * retrieved from the device. Webcams that don't suport GET_DEF | 2011 | * retrieved from the device. Webcams that don't support GET_DEF |
| 2004 | * requests on the probe control will just keep their current streaming | 2012 | * requests on the probe control will just keep their current streaming |
| 2005 | * parameters. | 2013 | * parameters. |
| 2006 | */ | 2014 | */ |
diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h index 9b41b14ce076..c7c1baa90dea 100644 --- a/drivers/media/usb/uvc/uvcvideo.h +++ b/drivers/media/usb/uvc/uvcvideo.h | |||
| @@ -620,8 +620,10 @@ struct uvc_streaming { | |||
| 620 | (uvc_urb) < &(uvc_streaming)->uvc_urb[UVC_URBS]; \ | 620 | (uvc_urb) < &(uvc_streaming)->uvc_urb[UVC_URBS]; \ |
| 621 | ++(uvc_urb)) | 621 | ++(uvc_urb)) |
| 622 | 622 | ||
| 623 | #define uvc_urb_index(uvc_urb) \ | 623 | static inline u32 uvc_urb_index(const struct uvc_urb *uvc_urb) |
| 624 | (unsigned int)((uvc_urb) - (&(uvc_urb)->stream->uvc_urb[0])) | 624 | { |
| 625 | return uvc_urb - &uvc_urb->stream->uvc_urb[0]; | ||
| 626 | } | ||
| 625 | 627 | ||
| 626 | struct uvc_device_info { | 628 | struct uvc_device_info { |
| 627 | u32 quirks; | 629 | u32 quirks; |
diff --git a/drivers/media/usb/zr364xx/zr364xx.c b/drivers/media/usb/zr364xx/zr364xx.c index ab35554cbffa..96fee8d5b865 100644 --- a/drivers/media/usb/zr364xx/zr364xx.c +++ b/drivers/media/usb/zr364xx/zr364xx.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * Zoran 364xx based USB webcam module version 0.73 | 2 | * Zoran 364xx based USB webcam module version 0.73 |
| 3 | * | 3 | * |
| 4 | * Allows you to use your USB webcam with V4L2 applications | 4 | * Allows you to use your USB webcam with V4L2 applications |
| 5 | * This is still in heavy developpement ! | 5 | * This is still in heavy development ! |
| 6 | * | 6 | * |
| 7 | * Copyright (C) 2004 Antoine Jacquet <royale@zerezo.com> | 7 | * Copyright (C) 2004 Antoine Jacquet <royale@zerezo.com> |
| 8 | * http://royale.zerezo.com/zr364xx/ | 8 | * http://royale.zerezo.com/zr364xx/ |
| @@ -521,7 +521,7 @@ static void zr364xx_fillbuff(struct zr364xx_camera *cam, | |||
| 521 | /* tell v4l buffer was filled */ | 521 | /* tell v4l buffer was filled */ |
| 522 | 522 | ||
| 523 | buf->vb.field_count = cam->frame_count * 2; | 523 | buf->vb.field_count = cam->frame_count * 2; |
| 524 | v4l2_get_timestamp(&buf->vb.ts); | 524 | buf->vb.ts = ktime_get_ns(); |
| 525 | buf->vb.state = VIDEOBUF_DONE; | 525 | buf->vb.state = VIDEOBUF_DONE; |
| 526 | } | 526 | } |
| 527 | 527 | ||
| @@ -549,7 +549,7 @@ static int zr364xx_got_frame(struct zr364xx_camera *cam, int jpgsize) | |||
| 549 | goto unlock; | 549 | goto unlock; |
| 550 | } | 550 | } |
| 551 | list_del(&buf->vb.queue); | 551 | list_del(&buf->vb.queue); |
| 552 | v4l2_get_timestamp(&buf->vb.ts); | 552 | buf->vb.ts = ktime_get_ns(); |
| 553 | DBG("[%p/%d] wakeup\n", buf, buf->vb.i); | 553 | DBG("[%p/%d] wakeup\n", buf, buf->vb.i); |
| 554 | zr364xx_fillbuff(cam, buf, jpgsize); | 554 | zr364xx_fillbuff(cam, buf, jpgsize); |
| 555 | wake_up(&buf->vb.done); | 555 | wake_up(&buf->vb.done); |
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 50763fb42a1b..663730f088cd 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c | |||
| @@ -398,16 +398,6 @@ __v4l2_find_nearest_size(const void *array, size_t array_size, | |||
| 398 | } | 398 | } |
| 399 | EXPORT_SYMBOL_GPL(__v4l2_find_nearest_size); | 399 | EXPORT_SYMBOL_GPL(__v4l2_find_nearest_size); |
| 400 | 400 | ||
| 401 | void v4l2_get_timestamp(struct timeval *tv) | ||
| 402 | { | ||
| 403 | struct timespec ts; | ||
| 404 | |||
| 405 | ktime_get_ts(&ts); | ||
| 406 | tv->tv_sec = ts.tv_sec; | ||
| 407 | tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC; | ||
| 408 | } | ||
| 409 | EXPORT_SYMBOL_GPL(v4l2_get_timestamp); | ||
| 410 | |||
| 411 | int v4l2_g_parm_cap(struct video_device *vdev, | 401 | int v4l2_g_parm_cap(struct video_device *vdev, |
| 412 | struct v4l2_subdev *sd, struct v4l2_streamparm *a) | 402 | struct v4l2_subdev *sd, struct v4l2_streamparm *a) |
| 413 | { | 403 | { |
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 5e3806feb5d7..b79d3bbd8350 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c | |||
| @@ -825,6 +825,9 @@ const char *v4l2_ctrl_get_name(u32 id) | |||
| 825 | case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER:return "H264 Number of HC Layers"; | 825 | case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER:return "H264 Number of HC Layers"; |
| 826 | case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP: | 826 | case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP: |
| 827 | return "H264 Set QP Value for HC Layers"; | 827 | return "H264 Set QP Value for HC Layers"; |
| 828 | case V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION: | ||
| 829 | return "H264 Constrained Intra Pred"; | ||
| 830 | case V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET: return "H264 Chroma QP Index Offset"; | ||
| 828 | case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP: return "MPEG4 I-Frame QP Value"; | 831 | case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP: return "MPEG4 I-Frame QP Value"; |
| 829 | case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP: return "MPEG4 P-Frame QP Value"; | 832 | case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP: return "MPEG4 P-Frame QP Value"; |
| 830 | case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP: return "MPEG4 B-Frame QP Value"; | 833 | case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP: return "MPEG4 B-Frame QP Value"; |
| @@ -1387,7 +1390,7 @@ static u32 user_flags(const struct v4l2_ctrl *ctrl) | |||
| 1387 | 1390 | ||
| 1388 | static void fill_event(struct v4l2_event *ev, struct v4l2_ctrl *ctrl, u32 changes) | 1391 | static void fill_event(struct v4l2_event *ev, struct v4l2_ctrl *ctrl, u32 changes) |
| 1389 | { | 1392 | { |
| 1390 | memset(ev->reserved, 0, sizeof(ev->reserved)); | 1393 | memset(ev, 0, sizeof(*ev)); |
| 1391 | ev->type = V4L2_EVENT_CTRL; | 1394 | ev->type = V4L2_EVENT_CTRL; |
| 1392 | ev->id = ctrl->id; | 1395 | ev->id = ctrl->id; |
| 1393 | ev->u.ctrl.changes = changes; | 1396 | ev->u.ctrl.changes = changes; |
| @@ -1661,15 +1664,6 @@ static int std_validate(const struct v4l2_ctrl *ctrl, u32 idx, | |||
| 1661 | return -EINVAL; | 1664 | return -EINVAL; |
| 1662 | } | 1665 | } |
| 1663 | 1666 | ||
| 1664 | if (p_mpeg2_slice_params->backward_ref_index >= VIDEO_MAX_FRAME || | ||
| 1665 | p_mpeg2_slice_params->forward_ref_index >= VIDEO_MAX_FRAME) | ||
| 1666 | return -EINVAL; | ||
| 1667 | |||
| 1668 | if (p_mpeg2_slice_params->pad || | ||
| 1669 | p_mpeg2_slice_params->picture.pad || | ||
| 1670 | p_mpeg2_slice_params->sequence.pad) | ||
| 1671 | return -EINVAL; | ||
| 1672 | |||
| 1673 | return 0; | 1667 | return 0; |
| 1674 | 1668 | ||
| 1675 | case V4L2_CTRL_TYPE_MPEG2_QUANTIZATION: | 1669 | case V4L2_CTRL_TYPE_MPEG2_QUANTIZATION: |
| @@ -4172,9 +4166,9 @@ __poll_t v4l2_ctrl_poll(struct file *file, struct poll_table_struct *wait) | |||
| 4172 | { | 4166 | { |
| 4173 | struct v4l2_fh *fh = file->private_data; | 4167 | struct v4l2_fh *fh = file->private_data; |
| 4174 | 4168 | ||
| 4169 | poll_wait(file, &fh->wait, wait); | ||
| 4175 | if (v4l2_event_pending(fh)) | 4170 | if (v4l2_event_pending(fh)) |
| 4176 | return EPOLLPRI; | 4171 | return EPOLLPRI; |
| 4177 | poll_wait(file, &fh->wait, wait); | ||
| 4178 | return 0; | 4172 | return 0; |
| 4179 | } | 4173 | } |
| 4180 | EXPORT_SYMBOL(v4l2_ctrl_poll); | 4174 | EXPORT_SYMBOL(v4l2_ctrl_poll); |
diff --git a/drivers/media/v4l2-core/v4l2-event.c b/drivers/media/v4l2-core/v4l2-event.c index 481e3c65cf97..c46d14c996fc 100644 --- a/drivers/media/v4l2-core/v4l2-event.c +++ b/drivers/media/v4l2-core/v4l2-event.c | |||
| @@ -52,6 +52,7 @@ static int __v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event) | |||
| 52 | 52 | ||
| 53 | kev->event.pending = fh->navailable; | 53 | kev->event.pending = fh->navailable; |
| 54 | *event = kev->event; | 54 | *event = kev->event; |
| 55 | event->timestamp = ns_to_timespec(kev->ts); | ||
| 55 | kev->sev->first = sev_pos(kev->sev, 1); | 56 | kev->sev->first = sev_pos(kev->sev, 1); |
| 56 | kev->sev->in_use--; | 57 | kev->sev->in_use--; |
| 57 | 58 | ||
| @@ -103,8 +104,8 @@ static struct v4l2_subscribed_event *v4l2_event_subscribed( | |||
| 103 | return NULL; | 104 | return NULL; |
| 104 | } | 105 | } |
| 105 | 106 | ||
| 106 | static void __v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev, | 107 | static void __v4l2_event_queue_fh(struct v4l2_fh *fh, |
| 107 | const struct timespec *ts) | 108 | const struct v4l2_event *ev, u64 ts) |
| 108 | { | 109 | { |
| 109 | struct v4l2_subscribed_event *sev; | 110 | struct v4l2_subscribed_event *sev; |
| 110 | struct v4l2_kevent *kev; | 111 | struct v4l2_kevent *kev; |
| @@ -144,7 +145,7 @@ static void __v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *e | |||
| 144 | if (copy_payload) | 145 | if (copy_payload) |
| 145 | kev->event.u = ev->u; | 146 | kev->event.u = ev->u; |
| 146 | kev->event.id = ev->id; | 147 | kev->event.id = ev->id; |
| 147 | kev->event.timestamp = *ts; | 148 | kev->ts = ts; |
| 148 | kev->event.sequence = fh->sequence; | 149 | kev->event.sequence = fh->sequence; |
| 149 | sev->in_use++; | 150 | sev->in_use++; |
| 150 | list_add_tail(&kev->list, &fh->available); | 151 | list_add_tail(&kev->list, &fh->available); |
| @@ -158,17 +159,17 @@ void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev) | |||
| 158 | { | 159 | { |
| 159 | struct v4l2_fh *fh; | 160 | struct v4l2_fh *fh; |
| 160 | unsigned long flags; | 161 | unsigned long flags; |
| 161 | struct timespec timestamp; | 162 | u64 ts; |
| 162 | 163 | ||
| 163 | if (vdev == NULL) | 164 | if (vdev == NULL) |
| 164 | return; | 165 | return; |
| 165 | 166 | ||
| 166 | ktime_get_ts(×tamp); | 167 | ts = ktime_get_ns(); |
| 167 | 168 | ||
| 168 | spin_lock_irqsave(&vdev->fh_lock, flags); | 169 | spin_lock_irqsave(&vdev->fh_lock, flags); |
| 169 | 170 | ||
| 170 | list_for_each_entry(fh, &vdev->fh_list, list) | 171 | list_for_each_entry(fh, &vdev->fh_list, list) |
| 171 | __v4l2_event_queue_fh(fh, ev, ×tamp); | 172 | __v4l2_event_queue_fh(fh, ev, ts); |
| 172 | 173 | ||
| 173 | spin_unlock_irqrestore(&vdev->fh_lock, flags); | 174 | spin_unlock_irqrestore(&vdev->fh_lock, flags); |
| 174 | } | 175 | } |
| @@ -177,12 +178,10 @@ EXPORT_SYMBOL_GPL(v4l2_event_queue); | |||
| 177 | void v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev) | 178 | void v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev) |
| 178 | { | 179 | { |
| 179 | unsigned long flags; | 180 | unsigned long flags; |
| 180 | struct timespec timestamp; | 181 | u64 ts = ktime_get_ns(); |
| 181 | |||
| 182 | ktime_get_ts(×tamp); | ||
| 183 | 182 | ||
| 184 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); | 183 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); |
| 185 | __v4l2_event_queue_fh(fh, ev, ×tamp); | 184 | __v4l2_event_queue_fh(fh, ev, ts); |
| 186 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | 185 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
| 187 | } | 186 | } |
| 188 | EXPORT_SYMBOL_GPL(v4l2_event_queue_fh); | 187 | EXPORT_SYMBOL_GPL(v4l2_event_queue_fh); |
diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c index 9bfedd7596a1..20571846e636 100644 --- a/drivers/media/v4l2-core/v4l2-fwnode.c +++ b/drivers/media/v4l2-core/v4l2-fwnode.c | |||
| @@ -46,7 +46,7 @@ static const struct v4l2_fwnode_bus_conv { | |||
| 46 | enum v4l2_fwnode_bus_type fwnode_bus_type; | 46 | enum v4l2_fwnode_bus_type fwnode_bus_type; |
| 47 | enum v4l2_mbus_type mbus_type; | 47 | enum v4l2_mbus_type mbus_type; |
| 48 | const char *name; | 48 | const char *name; |
| 49 | } busses[] = { | 49 | } buses[] = { |
| 50 | { | 50 | { |
| 51 | V4L2_FWNODE_BUS_TYPE_GUESS, | 51 | V4L2_FWNODE_BUS_TYPE_GUESS, |
| 52 | V4L2_MBUS_UNKNOWN, | 52 | V4L2_MBUS_UNKNOWN, |
| @@ -83,9 +83,9 @@ get_v4l2_fwnode_bus_conv_by_fwnode_bus(enum v4l2_fwnode_bus_type type) | |||
| 83 | { | 83 | { |
| 84 | unsigned int i; | 84 | unsigned int i; |
| 85 | 85 | ||
| 86 | for (i = 0; i < ARRAY_SIZE(busses); i++) | 86 | for (i = 0; i < ARRAY_SIZE(buses); i++) |
| 87 | if (busses[i].fwnode_bus_type == type) | 87 | if (buses[i].fwnode_bus_type == type) |
| 88 | return &busses[i]; | 88 | return &buses[i]; |
| 89 | 89 | ||
| 90 | return NULL; | 90 | return NULL; |
| 91 | } | 91 | } |
| @@ -113,9 +113,9 @@ get_v4l2_fwnode_bus_conv_by_mbus(enum v4l2_mbus_type type) | |||
| 113 | { | 113 | { |
| 114 | unsigned int i; | 114 | unsigned int i; |
| 115 | 115 | ||
| 116 | for (i = 0; i < ARRAY_SIZE(busses); i++) | 116 | for (i = 0; i < ARRAY_SIZE(buses); i++) |
| 117 | if (busses[i].mbus_type == type) | 117 | if (buses[i].mbus_type == type) |
| 118 | return &busses[i]; | 118 | return &buses[i]; |
| 119 | 119 | ||
| 120 | return NULL; | 120 | return NULL; |
| 121 | } | 121 | } |
| @@ -809,7 +809,7 @@ error: | |||
| 809 | * root node and the value of that property matching with the integer argument | 809 | * root node and the value of that property matching with the integer argument |
| 810 | * of the reference, at the same index. | 810 | * of the reference, at the same index. |
| 811 | * | 811 | * |
| 812 | * The child fwnode reched at the end of the iteration is then returned to the | 812 | * The child fwnode reached at the end of the iteration is then returned to the |
| 813 | * caller. | 813 | * caller. |
| 814 | * | 814 | * |
| 815 | * The core reason for this is that you cannot refer to just any node in ACPI. | 815 | * The core reason for this is that you cannot refer to just any node in ACPI. |
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 90aad465f9ed..f6d663934648 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c | |||
| @@ -88,7 +88,7 @@ const char *v4l2_norm_to_name(v4l2_std_id id) | |||
| 88 | int i; | 88 | int i; |
| 89 | 89 | ||
| 90 | /* HACK: ppc32 architecture doesn't have __ucmpdi2 function to handle | 90 | /* HACK: ppc32 architecture doesn't have __ucmpdi2 function to handle |
| 91 | 64 bit comparations. So, on that architecture, with some gcc | 91 | 64 bit comparisons. So, on that architecture, with some gcc |
| 92 | variants, compilation fails. Currently, the max value is 30bit wide. | 92 | variants, compilation fails. Currently, the max value is 30bit wide. |
| 93 | */ | 93 | */ |
| 94 | BUG_ON(myid != id); | 94 | BUG_ON(myid != id); |
| @@ -1017,6 +1017,12 @@ static void v4l_sanitize_format(struct v4l2_format *fmt) | |||
| 1017 | { | 1017 | { |
| 1018 | unsigned int offset; | 1018 | unsigned int offset; |
| 1019 | 1019 | ||
| 1020 | /* Make sure num_planes is not bogus */ | ||
| 1021 | if (fmt->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE || | ||
| 1022 | fmt->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 1023 | fmt->fmt.pix_mp.num_planes = min_t(u32, fmt->fmt.pix_mp.num_planes, | ||
| 1024 | VIDEO_MAX_PLANES); | ||
| 1025 | |||
| 1020 | /* | 1026 | /* |
| 1021 | * The v4l2_pix_format structure has been extended with fields that were | 1027 | * The v4l2_pix_format structure has been extended with fields that were |
| 1022 | * not previously required to be set to zero by applications. The priv | 1028 | * not previously required to be set to zero by applications. The priv |
| @@ -1214,6 +1220,10 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) | |||
| 1214 | case V4L2_PIX_FMT_YUV555: descr = "16-bit A/XYUV 1-5-5-5"; break; | 1220 | case V4L2_PIX_FMT_YUV555: descr = "16-bit A/XYUV 1-5-5-5"; break; |
| 1215 | case V4L2_PIX_FMT_YUV565: descr = "16-bit YUV 5-6-5"; break; | 1221 | case V4L2_PIX_FMT_YUV565: descr = "16-bit YUV 5-6-5"; break; |
| 1216 | case V4L2_PIX_FMT_YUV32: descr = "32-bit A/XYUV 8-8-8-8"; break; | 1222 | case V4L2_PIX_FMT_YUV32: descr = "32-bit A/XYUV 8-8-8-8"; break; |
| 1223 | case V4L2_PIX_FMT_AYUV32: descr = "32-bit AYUV 8-8-8-8"; break; | ||
| 1224 | case V4L2_PIX_FMT_XYUV32: descr = "32-bit XYUV 8-8-8-8"; break; | ||
| 1225 | case V4L2_PIX_FMT_VUYA32: descr = "32-bit VUYA 8-8-8-8"; break; | ||
| 1226 | case V4L2_PIX_FMT_VUYX32: descr = "32-bit VUYX 8-8-8-8"; break; | ||
| 1217 | case V4L2_PIX_FMT_YUV410: descr = "Planar YUV 4:1:0"; break; | 1227 | case V4L2_PIX_FMT_YUV410: descr = "Planar YUV 4:1:0"; break; |
| 1218 | case V4L2_PIX_FMT_YUV420: descr = "Planar YUV 4:2:0"; break; | 1228 | case V4L2_PIX_FMT_YUV420: descr = "Planar YUV 4:2:0"; break; |
| 1219 | case V4L2_PIX_FMT_HI240: descr = "8-bit Dithered RGB (BTTV)"; break; | 1229 | case V4L2_PIX_FMT_HI240: descr = "8-bit Dithered RGB (BTTV)"; break; |
| @@ -1553,8 +1563,6 @@ static int v4l_s_fmt(const struct v4l2_ioctl_ops *ops, | |||
| 1553 | if (unlikely(!ops->vidioc_s_fmt_vid_cap_mplane)) | 1563 | if (unlikely(!ops->vidioc_s_fmt_vid_cap_mplane)) |
| 1554 | break; | 1564 | break; |
| 1555 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); | 1565 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); |
| 1556 | if (p->fmt.pix_mp.num_planes > VIDEO_MAX_PLANES) | ||
| 1557 | break; | ||
| 1558 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) | 1566 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) |
| 1559 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], | 1567 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], |
| 1560 | bytesperline); | 1568 | bytesperline); |
| @@ -1586,8 +1594,6 @@ static int v4l_s_fmt(const struct v4l2_ioctl_ops *ops, | |||
| 1586 | if (unlikely(!ops->vidioc_s_fmt_vid_out_mplane)) | 1594 | if (unlikely(!ops->vidioc_s_fmt_vid_out_mplane)) |
| 1587 | break; | 1595 | break; |
| 1588 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); | 1596 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); |
| 1589 | if (p->fmt.pix_mp.num_planes > VIDEO_MAX_PLANES) | ||
| 1590 | break; | ||
| 1591 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) | 1597 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) |
| 1592 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], | 1598 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], |
| 1593 | bytesperline); | 1599 | bytesperline); |
| @@ -1656,8 +1662,6 @@ static int v4l_try_fmt(const struct v4l2_ioctl_ops *ops, | |||
| 1656 | if (unlikely(!ops->vidioc_try_fmt_vid_cap_mplane)) | 1662 | if (unlikely(!ops->vidioc_try_fmt_vid_cap_mplane)) |
| 1657 | break; | 1663 | break; |
| 1658 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); | 1664 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); |
| 1659 | if (p->fmt.pix_mp.num_planes > VIDEO_MAX_PLANES) | ||
| 1660 | break; | ||
| 1661 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) | 1665 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) |
| 1662 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], | 1666 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], |
| 1663 | bytesperline); | 1667 | bytesperline); |
| @@ -1689,8 +1693,6 @@ static int v4l_try_fmt(const struct v4l2_ioctl_ops *ops, | |||
| 1689 | if (unlikely(!ops->vidioc_try_fmt_vid_out_mplane)) | 1693 | if (unlikely(!ops->vidioc_try_fmt_vid_out_mplane)) |
| 1690 | break; | 1694 | break; |
| 1691 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); | 1695 | CLEAR_AFTER_FIELD(p, fmt.pix_mp.xfer_func); |
| 1692 | if (p->fmt.pix_mp.num_planes > VIDEO_MAX_PLANES) | ||
| 1693 | break; | ||
| 1694 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) | 1696 | for (i = 0; i < p->fmt.pix_mp.num_planes; i++) |
| 1695 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], | 1697 | CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i], |
| 1696 | bytesperline); | 1698 | bytesperline); |
diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c index 5bbdec55b7d7..3392833d9541 100644 --- a/drivers/media/v4l2-core/v4l2-mem2mem.c +++ b/drivers/media/v4l2-core/v4l2-mem2mem.c | |||
| @@ -131,7 +131,7 @@ struct vb2_queue *v4l2_m2m_get_vq(struct v4l2_m2m_ctx *m2m_ctx, | |||
| 131 | } | 131 | } |
| 132 | EXPORT_SYMBOL(v4l2_m2m_get_vq); | 132 | EXPORT_SYMBOL(v4l2_m2m_get_vq); |
| 133 | 133 | ||
| 134 | void *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx) | 134 | struct vb2_v4l2_buffer *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx) |
| 135 | { | 135 | { |
| 136 | struct v4l2_m2m_buffer *b; | 136 | struct v4l2_m2m_buffer *b; |
| 137 | unsigned long flags; | 137 | unsigned long flags; |
| @@ -149,7 +149,7 @@ void *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx) | |||
| 149 | } | 149 | } |
| 150 | EXPORT_SYMBOL_GPL(v4l2_m2m_next_buf); | 150 | EXPORT_SYMBOL_GPL(v4l2_m2m_next_buf); |
| 151 | 151 | ||
| 152 | void *v4l2_m2m_last_buf(struct v4l2_m2m_queue_ctx *q_ctx) | 152 | struct vb2_v4l2_buffer *v4l2_m2m_last_buf(struct v4l2_m2m_queue_ctx *q_ctx) |
| 153 | { | 153 | { |
| 154 | struct v4l2_m2m_buffer *b; | 154 | struct v4l2_m2m_buffer *b; |
| 155 | unsigned long flags; | 155 | unsigned long flags; |
| @@ -167,7 +167,7 @@ void *v4l2_m2m_last_buf(struct v4l2_m2m_queue_ctx *q_ctx) | |||
| 167 | } | 167 | } |
| 168 | EXPORT_SYMBOL_GPL(v4l2_m2m_last_buf); | 168 | EXPORT_SYMBOL_GPL(v4l2_m2m_last_buf); |
| 169 | 169 | ||
| 170 | void *v4l2_m2m_buf_remove(struct v4l2_m2m_queue_ctx *q_ctx) | 170 | struct vb2_v4l2_buffer *v4l2_m2m_buf_remove(struct v4l2_m2m_queue_ctx *q_ctx) |
| 171 | { | 171 | { |
| 172 | struct v4l2_m2m_buffer *b; | 172 | struct v4l2_m2m_buffer *b; |
| 173 | unsigned long flags; | 173 | unsigned long flags; |
| @@ -617,36 +617,35 @@ __poll_t v4l2_m2m_poll(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, | |||
| 617 | __poll_t rc = 0; | 617 | __poll_t rc = 0; |
| 618 | unsigned long flags; | 618 | unsigned long flags; |
| 619 | 619 | ||
| 620 | src_q = v4l2_m2m_get_src_vq(m2m_ctx); | ||
| 621 | dst_q = v4l2_m2m_get_dst_vq(m2m_ctx); | ||
| 622 | |||
| 623 | poll_wait(file, &src_q->done_wq, wait); | ||
| 624 | poll_wait(file, &dst_q->done_wq, wait); | ||
| 625 | |||
| 620 | if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags)) { | 626 | if (test_bit(V4L2_FL_USES_V4L2_FH, &vfd->flags)) { |
| 621 | struct v4l2_fh *fh = file->private_data; | 627 | struct v4l2_fh *fh = file->private_data; |
| 622 | 628 | ||
| 629 | poll_wait(file, &fh->wait, wait); | ||
| 623 | if (v4l2_event_pending(fh)) | 630 | if (v4l2_event_pending(fh)) |
| 624 | rc = EPOLLPRI; | 631 | rc = EPOLLPRI; |
| 625 | else if (req_events & EPOLLPRI) | ||
| 626 | poll_wait(file, &fh->wait, wait); | ||
| 627 | if (!(req_events & (EPOLLOUT | EPOLLWRNORM | EPOLLIN | EPOLLRDNORM))) | 632 | if (!(req_events & (EPOLLOUT | EPOLLWRNORM | EPOLLIN | EPOLLRDNORM))) |
| 628 | return rc; | 633 | return rc; |
| 629 | } | 634 | } |
| 630 | 635 | ||
| 631 | src_q = v4l2_m2m_get_src_vq(m2m_ctx); | ||
| 632 | dst_q = v4l2_m2m_get_dst_vq(m2m_ctx); | ||
| 633 | |||
| 634 | /* | 636 | /* |
| 635 | * There has to be at least one buffer queued on each queued_list, which | 637 | * There has to be at least one buffer queued on each queued_list, which |
| 636 | * means either in driver already or waiting for driver to claim it | 638 | * means either in driver already or waiting for driver to claim it |
| 637 | * and start processing. | 639 | * and start processing. |
| 638 | */ | 640 | */ |
| 639 | if ((!src_q->streaming || list_empty(&src_q->queued_list)) | 641 | if ((!src_q->streaming || src_q->error || |
| 640 | && (!dst_q->streaming || list_empty(&dst_q->queued_list))) { | 642 | list_empty(&src_q->queued_list)) && |
| 643 | (!dst_q->streaming || dst_q->error || | ||
| 644 | list_empty(&dst_q->queued_list))) { | ||
| 641 | rc |= EPOLLERR; | 645 | rc |= EPOLLERR; |
| 642 | goto end; | 646 | goto end; |
| 643 | } | 647 | } |
| 644 | 648 | ||
| 645 | spin_lock_irqsave(&src_q->done_lock, flags); | ||
| 646 | if (list_empty(&src_q->done_list)) | ||
| 647 | poll_wait(file, &src_q->done_wq, wait); | ||
| 648 | spin_unlock_irqrestore(&src_q->done_lock, flags); | ||
| 649 | |||
| 650 | spin_lock_irqsave(&dst_q->done_lock, flags); | 649 | spin_lock_irqsave(&dst_q->done_lock, flags); |
| 651 | if (list_empty(&dst_q->done_list)) { | 650 | if (list_empty(&dst_q->done_list)) { |
| 652 | /* | 651 | /* |
| @@ -657,8 +656,6 @@ __poll_t v4l2_m2m_poll(struct file *file, struct v4l2_m2m_ctx *m2m_ctx, | |||
| 657 | spin_unlock_irqrestore(&dst_q->done_lock, flags); | 656 | spin_unlock_irqrestore(&dst_q->done_lock, flags); |
| 658 | return rc | EPOLLIN | EPOLLRDNORM; | 657 | return rc | EPOLLIN | EPOLLRDNORM; |
| 659 | } | 658 | } |
| 660 | |||
| 661 | poll_wait(file, &dst_q->done_wq, wait); | ||
| 662 | } | 659 | } |
| 663 | spin_unlock_irqrestore(&dst_q->done_lock, flags); | 660 | spin_unlock_irqrestore(&dst_q->done_lock, flags); |
| 664 | 661 | ||
| @@ -975,6 +972,27 @@ void v4l2_m2m_buf_queue(struct v4l2_m2m_ctx *m2m_ctx, | |||
| 975 | } | 972 | } |
| 976 | EXPORT_SYMBOL_GPL(v4l2_m2m_buf_queue); | 973 | EXPORT_SYMBOL_GPL(v4l2_m2m_buf_queue); |
| 977 | 974 | ||
| 975 | void v4l2_m2m_buf_copy_metadata(const struct vb2_v4l2_buffer *out_vb, | ||
| 976 | struct vb2_v4l2_buffer *cap_vb, | ||
| 977 | bool copy_frame_flags) | ||
| 978 | { | ||
| 979 | u32 mask = V4L2_BUF_FLAG_TIMECODE | V4L2_BUF_FLAG_TSTAMP_SRC_MASK; | ||
| 980 | |||
| 981 | if (copy_frame_flags) | ||
| 982 | mask |= V4L2_BUF_FLAG_KEYFRAME | V4L2_BUF_FLAG_PFRAME | | ||
| 983 | V4L2_BUF_FLAG_BFRAME; | ||
| 984 | |||
| 985 | cap_vb->vb2_buf.timestamp = out_vb->vb2_buf.timestamp; | ||
| 986 | |||
| 987 | if (out_vb->flags & V4L2_BUF_FLAG_TIMECODE) | ||
| 988 | cap_vb->timecode = out_vb->timecode; | ||
| 989 | cap_vb->field = out_vb->field; | ||
| 990 | cap_vb->flags &= ~mask; | ||
| 991 | cap_vb->flags |= out_vb->flags & mask; | ||
| 992 | cap_vb->vb2_buf.copied_timestamp = 1; | ||
| 993 | } | ||
| 994 | EXPORT_SYMBOL_GPL(v4l2_m2m_buf_copy_metadata); | ||
| 995 | |||
| 978 | void v4l2_m2m_request_queue(struct media_request *req) | 996 | void v4l2_m2m_request_queue(struct media_request *req) |
| 979 | { | 997 | { |
| 980 | struct media_request_object *obj, *obj_safe; | 998 | struct media_request_object *obj, *obj_safe; |
diff --git a/drivers/media/v4l2-core/videobuf-core.c b/drivers/media/v4l2-core/videobuf-core.c index 7491b337002c..bf7dfb2a34af 100644 --- a/drivers/media/v4l2-core/videobuf-core.c +++ b/drivers/media/v4l2-core/videobuf-core.c | |||
| @@ -214,7 +214,7 @@ int videobuf_queue_is_busy(struct videobuf_queue *q) | |||
| 214 | return 1; | 214 | return 1; |
| 215 | } | 215 | } |
| 216 | if (q->bufs[i]->state == VIDEOBUF_ACTIVE) { | 216 | if (q->bufs[i]->state == VIDEOBUF_ACTIVE) { |
| 217 | dprintk(1, "busy: buffer #%d avtive\n", i); | 217 | dprintk(1, "busy: buffer #%d active\n", i); |
| 218 | return 1; | 218 | return 1; |
| 219 | } | 219 | } |
| 220 | } | 220 | } |
| @@ -367,7 +367,7 @@ static void videobuf_status(struct videobuf_queue *q, struct v4l2_buffer *b, | |||
| 367 | } | 367 | } |
| 368 | 368 | ||
| 369 | b->field = vb->field; | 369 | b->field = vb->field; |
| 370 | b->timestamp = vb->ts; | 370 | b->timestamp = ns_to_timeval(vb->ts); |
| 371 | b->bytesused = vb->size; | 371 | b->bytesused = vb->size; |
| 372 | b->sequence = vb->field_count >> 1; | 372 | b->sequence = vb->field_count >> 1; |
| 373 | } | 373 | } |
| @@ -581,7 +581,7 @@ int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b) | |||
| 581 | || q->type == V4L2_BUF_TYPE_SDR_OUTPUT) { | 581 | || q->type == V4L2_BUF_TYPE_SDR_OUTPUT) { |
| 582 | buf->size = b->bytesused; | 582 | buf->size = b->bytesused; |
| 583 | buf->field = b->field; | 583 | buf->field = b->field; |
| 584 | buf->ts = b->timestamp; | 584 | buf->ts = v4l2_timeval_to_ns(&b->timestamp); |
| 585 | } | 585 | } |
| 586 | break; | 586 | break; |
| 587 | case V4L2_MEMORY_USERPTR: | 587 | case V4L2_MEMORY_USERPTR: |
| @@ -1119,13 +1119,14 @@ done: | |||
| 1119 | EXPORT_SYMBOL_GPL(videobuf_read_stream); | 1119 | EXPORT_SYMBOL_GPL(videobuf_read_stream); |
| 1120 | 1120 | ||
| 1121 | __poll_t videobuf_poll_stream(struct file *file, | 1121 | __poll_t videobuf_poll_stream(struct file *file, |
| 1122 | struct videobuf_queue *q, | 1122 | struct videobuf_queue *q, |
| 1123 | poll_table *wait) | 1123 | poll_table *wait) |
| 1124 | { | 1124 | { |
| 1125 | __poll_t req_events = poll_requested_events(wait); | 1125 | __poll_t req_events = poll_requested_events(wait); |
| 1126 | struct videobuf_buffer *buf = NULL; | 1126 | struct videobuf_buffer *buf = NULL; |
| 1127 | __poll_t rc = 0; | 1127 | __poll_t rc = 0; |
| 1128 | 1128 | ||
| 1129 | poll_wait(file, &buf->done, wait); | ||
| 1129 | videobuf_queue_lock(q); | 1130 | videobuf_queue_lock(q); |
| 1130 | if (q->streaming) { | 1131 | if (q->streaming) { |
| 1131 | if (!list_empty(&q->stream)) | 1132 | if (!list_empty(&q->stream)) |
| @@ -1149,7 +1150,6 @@ __poll_t videobuf_poll_stream(struct file *file, | |||
| 1149 | rc = EPOLLERR; | 1150 | rc = EPOLLERR; |
| 1150 | 1151 | ||
| 1151 | if (0 == rc) { | 1152 | if (0 == rc) { |
| 1152 | poll_wait(file, &buf->done, wait); | ||
| 1153 | if (buf->state == VIDEOBUF_DONE || | 1153 | if (buf->state == VIDEOBUF_DONE || |
| 1154 | buf->state == VIDEOBUF_ERROR) { | 1154 | buf->state == VIDEOBUF_ERROR) { |
| 1155 | switch (q->type) { | 1155 | switch (q->type) { |
diff --git a/drivers/media/v4l2-core/videobuf-dma-contig.c b/drivers/media/v4l2-core/videobuf-dma-contig.c index f46132504d88..e1bf50df4c70 100644 --- a/drivers/media/v4l2-core/videobuf-dma-contig.c +++ b/drivers/media/v4l2-core/videobuf-dma-contig.c | |||
| @@ -248,7 +248,7 @@ static int __videobuf_iolock(struct videobuf_queue *q, | |||
| 248 | 248 | ||
| 249 | /* All handling should be done by __videobuf_mmap_mapper() */ | 249 | /* All handling should be done by __videobuf_mmap_mapper() */ |
| 250 | if (!mem->vaddr) { | 250 | if (!mem->vaddr) { |
| 251 | dev_err(q->dev, "memory is not alloced/mmapped.\n"); | 251 | dev_err(q->dev, "memory is not allocated/mmapped.\n"); |
| 252 | return -EINVAL; | 252 | return -EINVAL; |
| 253 | } | 253 | } |
| 254 | break; | 254 | break; |
diff --git a/drivers/media/v4l2-core/videobuf-vmalloc.c b/drivers/media/v4l2-core/videobuf-vmalloc.c index 45fe781aeeec..cb50f1957828 100644 --- a/drivers/media/v4l2-core/videobuf-vmalloc.c +++ b/drivers/media/v4l2-core/videobuf-vmalloc.c | |||
| @@ -171,7 +171,7 @@ static int __videobuf_iolock(struct videobuf_queue *q, | |||
| 171 | 171 | ||
| 172 | /* All handling should be done by __videobuf_mmap_mapper() */ | 172 | /* All handling should be done by __videobuf_mmap_mapper() */ |
| 173 | if (!mem->vaddr) { | 173 | if (!mem->vaddr) { |
| 174 | printk(KERN_ERR "memory is not alloced/mmapped.\n"); | 174 | printk(KERN_ERR "memory is not allocated/mmapped.\n"); |
| 175 | return -EINVAL; | 175 | return -EINVAL; |
| 176 | } | 176 | } |
| 177 | break; | 177 | break; |
| @@ -196,26 +196,6 @@ static int __videobuf_iolock(struct videobuf_queue *q, | |||
| 196 | } | 196 | } |
| 197 | dprintk(1, "vmalloc is at addr %p (%d pages)\n", | 197 | dprintk(1, "vmalloc is at addr %p (%d pages)\n", |
| 198 | mem->vaddr, pages); | 198 | mem->vaddr, pages); |
| 199 | |||
| 200 | #if 0 | ||
| 201 | int rc; | ||
| 202 | /* Kernel userptr is used also by read() method. In this case, | ||
| 203 | there's no need to remap, since data will be copied to user | ||
| 204 | */ | ||
| 205 | if (!vb->baddr) | ||
| 206 | return 0; | ||
| 207 | |||
| 208 | /* FIXME: to properly support USERPTR, remap should occur. | ||
| 209 | The code below won't work, since mem->vma = NULL | ||
| 210 | */ | ||
| 211 | /* Try to remap memory */ | ||
| 212 | rc = remap_vmalloc_range(mem->vma, (void *)vb->baddr, 0); | ||
| 213 | if (rc < 0) { | ||
| 214 | printk(KERN_ERR "mmap: remap failed with error %d", rc); | ||
| 215 | return -ENOMEM; | ||
| 216 | } | ||
| 217 | #endif | ||
| 218 | |||
| 219 | break; | 199 | break; |
| 220 | case V4L2_MEMORY_OVERLAY: | 200 | case V4L2_MEMORY_OVERLAY: |
| 221 | default: | 201 | default: |
diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index 19cadd17e542..1da5c20d65c0 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig | |||
| @@ -25,10 +25,6 @@ source "drivers/staging/media/davinci_vpfe/Kconfig" | |||
| 25 | 25 | ||
| 26 | source "drivers/staging/media/imx/Kconfig" | 26 | source "drivers/staging/media/imx/Kconfig" |
| 27 | 27 | ||
| 28 | source "drivers/staging/media/imx074/Kconfig" | ||
| 29 | |||
| 30 | source "drivers/staging/media/mt9t031/Kconfig" | ||
| 31 | |||
| 32 | source "drivers/staging/media/omap4iss/Kconfig" | 28 | source "drivers/staging/media/omap4iss/Kconfig" |
| 33 | 29 | ||
| 34 | source "drivers/staging/media/rockchip/vpu/Kconfig" | 30 | source "drivers/staging/media/rockchip/vpu/Kconfig" |
| @@ -41,4 +37,6 @@ source "drivers/staging/media/zoran/Kconfig" | |||
| 41 | 37 | ||
| 42 | source "drivers/staging/media/ipu3/Kconfig" | 38 | source "drivers/staging/media/ipu3/Kconfig" |
| 43 | 39 | ||
| 40 | source "drivers/staging/media/soc_camera/Kconfig" | ||
| 41 | |||
| 44 | endif | 42 | endif |
diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index edde1960b030..0355e3030504 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile | |||
| @@ -1,8 +1,6 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | obj-$(CONFIG_I2C_BCM2048) += bcm2048/ | 2 | obj-$(CONFIG_I2C_BCM2048) += bcm2048/ |
| 3 | obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ | 3 | obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ |
| 4 | obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074/ | ||
| 5 | obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031/ | ||
| 6 | obj-$(CONFIG_VIDEO_DM365_VPFE) += davinci_vpfe/ | 4 | obj-$(CONFIG_VIDEO_DM365_VPFE) += davinci_vpfe/ |
| 7 | obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ | 5 | obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ |
| 8 | obj-$(CONFIG_VIDEO_SUNXI) += sunxi/ | 6 | obj-$(CONFIG_VIDEO_SUNXI) += sunxi/ |
| @@ -10,3 +8,4 @@ obj-$(CONFIG_TEGRA_VDE) += tegra-vde/ | |||
| 10 | obj-$(CONFIG_VIDEO_ZORAN) += zoran/ | 8 | obj-$(CONFIG_VIDEO_ZORAN) += zoran/ |
| 11 | obj-$(CONFIG_VIDEO_ROCKCHIP_VPU) += rockchip/vpu/ | 9 | obj-$(CONFIG_VIDEO_ROCKCHIP_VPU) += rockchip/vpu/ |
| 12 | obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/ | 10 | obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/ |
| 11 | obj-$(CONFIG_SOC_CAMERA) += soc_camera/ | ||
diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c index 5618c804c7e4..565a3dc5bed1 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipe_hw.c | |||
| @@ -781,7 +781,7 @@ ipipe_set_3d_lut_regs(void __iomem *base_addr, void __iomem *isp5_base_addr, | |||
| 781 | if (!lut_3d->en) | 781 | if (!lut_3d->en) |
| 782 | return; | 782 | return; |
| 783 | 783 | ||
| 784 | /* valied table */ | 784 | /* valid table */ |
| 785 | tbl = lut_3d->table; | 785 | tbl = lut_3d->table; |
| 786 | for (i = 0; i < VPFE_IPIPE_MAX_SIZE_3D_LUT; i++) { | 786 | for (i = 0; i < VPFE_IPIPE_MAX_SIZE_3D_LUT; i++) { |
| 787 | /* | 787 | /* |
diff --git a/drivers/staging/media/davinci_vpfe/dm365_isif.c b/drivers/staging/media/davinci_vpfe/dm365_isif.c index 625d0aa8367f..0a6d038fcec9 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_isif.c +++ b/drivers/staging/media/davinci_vpfe/dm365_isif.c | |||
| @@ -675,7 +675,7 @@ static void isif_config_bclamp(struct vpfe_isif_device *isif, | |||
| 675 | val = (bc->bc_mode_color & ISIF_BC_MODE_COLOR_MASK) << | 675 | val = (bc->bc_mode_color & ISIF_BC_MODE_COLOR_MASK) << |
| 676 | ISIF_BC_MODE_COLOR_SHIFT; | 676 | ISIF_BC_MODE_COLOR_SHIFT; |
| 677 | 677 | ||
| 678 | /* Enable BC and horizontal clamp calculation paramaters */ | 678 | /* Enable BC and horizontal clamp calculation parameters */ |
| 679 | val = val | 1 | ((bc->horz.mode & ISIF_HORZ_BC_MODE_MASK) << | 679 | val = val | 1 | ((bc->horz.mode & ISIF_HORZ_BC_MODE_MASK) << |
| 680 | ISIF_HORZ_BC_MODE_SHIFT); | 680 | ISIF_HORZ_BC_MODE_SHIFT); |
| 681 | 681 | ||
| @@ -712,7 +712,7 @@ static void isif_config_bclamp(struct vpfe_isif_device *isif, | |||
| 712 | isif_write(isif->isif_cfg.base_addr, val, CLHWIN2); | 712 | isif_write(isif->isif_cfg.base_addr, val, CLHWIN2); |
| 713 | } | 713 | } |
| 714 | 714 | ||
| 715 | /* vertical clamp calculation paramaters */ | 715 | /* vertical clamp calculation parameters */ |
| 716 | /* OB H Valid */ | 716 | /* OB H Valid */ |
| 717 | val = bc->vert.ob_h_sz_calc & ISIF_VERT_BC_OB_H_SZ_MASK; | 717 | val = bc->vert.ob_h_sz_calc & ISIF_VERT_BC_OB_H_SZ_MASK; |
| 718 | 718 | ||
diff --git a/drivers/staging/media/davinci_vpfe/dm365_resizer.c b/drivers/staging/media/davinci_vpfe/dm365_resizer.c index 6098f43ac51b..9d726298b406 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_resizer.c +++ b/drivers/staging/media/davinci_vpfe/dm365_resizer.c | |||
| @@ -1284,7 +1284,7 @@ static int resizer_set_stream(struct v4l2_subdev *sd, int enable) | |||
| 1284 | * @cfg: V4L2 subdev pad config | 1284 | * @cfg: V4L2 subdev pad config |
| 1285 | * @pad: pad number. | 1285 | * @pad: pad number. |
| 1286 | * @which: wanted subdev format. | 1286 | * @which: wanted subdev format. |
| 1287 | * Retun wanted mbus frame format. | 1287 | * Return wanted mbus frame format. |
| 1288 | */ | 1288 | */ |
| 1289 | static struct v4l2_mbus_framefmt * | 1289 | static struct v4l2_mbus_framefmt * |
| 1290 | __resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, | 1290 | __resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, |
| @@ -1785,7 +1785,7 @@ void vpfe_resizer_unregister_entities(struct vpfe_resizer_device *vpfe_rsz) | |||
| 1785 | 1785 | ||
| 1786 | /* | 1786 | /* |
| 1787 | * vpfe_resizer_register_entities() - Register entity | 1787 | * vpfe_resizer_register_entities() - Register entity |
| 1788 | * @resizer - pointer to resizer devive. | 1788 | * @resizer - pointer to resizer device. |
| 1789 | * @vdev: pointer to v4l2 device structure. | 1789 | * @vdev: pointer to v4l2 device structure. |
| 1790 | */ | 1790 | */ |
| 1791 | int vpfe_resizer_register_entities(struct vpfe_resizer_device *resizer, | 1791 | int vpfe_resizer_register_entities(struct vpfe_resizer_device *resizer, |
diff --git a/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c b/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c index 34d63c2e9199..57b93605bc58 100644 --- a/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c +++ b/drivers/staging/media/davinci_vpfe/vpfe_mc_capture.c | |||
| @@ -528,7 +528,7 @@ static void vpfe_cleanup_modules(struct vpfe_device *vpfe_dev, | |||
| 528 | * @vpfe_dev - ptr to vpfe capture device | 528 | * @vpfe_dev - ptr to vpfe capture device |
| 529 | * @pdev - pointer to platform device | 529 | * @pdev - pointer to platform device |
| 530 | * | 530 | * |
| 531 | * intialize all v4l2 subdevs and media entities | 531 | * initialize all v4l2 subdevs and media entities |
| 532 | */ | 532 | */ |
| 533 | static int vpfe_initialize_modules(struct vpfe_device *vpfe_dev, | 533 | static int vpfe_initialize_modules(struct vpfe_device *vpfe_dev, |
| 534 | struct platform_device *pdev) | 534 | struct platform_device *pdev) |
diff --git a/drivers/staging/media/imx/Kconfig b/drivers/staging/media/imx/Kconfig index bfc17de56b17..36b276ea2ecc 100644 --- a/drivers/staging/media/imx/Kconfig +++ b/drivers/staging/media/imx/Kconfig | |||
| @@ -11,7 +11,7 @@ config VIDEO_IMX_MEDIA | |||
| 11 | driver for the i.MX5/6 SOC. | 11 | driver for the i.MX5/6 SOC. |
| 12 | 12 | ||
| 13 | if VIDEO_IMX_MEDIA | 13 | if VIDEO_IMX_MEDIA |
| 14 | menu "i.MX5/6 Media Sub devices" | 14 | menu "i.MX5/6/7 Media Sub devices" |
| 15 | 15 | ||
| 16 | config VIDEO_IMX_CSI | 16 | config VIDEO_IMX_CSI |
| 17 | tristate "i.MX5/6 Camera Sensor Interface driver" | 17 | tristate "i.MX5/6 Camera Sensor Interface driver" |
| @@ -20,5 +20,12 @@ config VIDEO_IMX_CSI | |||
| 20 | ---help--- | 20 | ---help--- |
| 21 | A video4linux camera sensor interface driver for i.MX5/6. | 21 | A video4linux camera sensor interface driver for i.MX5/6. |
| 22 | 22 | ||
| 23 | config VIDEO_IMX7_CSI | ||
| 24 | tristate "i.MX7 Camera Sensor Interface driver" | ||
| 25 | depends on VIDEO_IMX_MEDIA && VIDEO_DEV && I2C | ||
| 26 | default y | ||
| 27 | help | ||
| 28 | Enable support for video4linux camera sensor interface driver for | ||
| 29 | i.MX7. | ||
| 23 | endmenu | 30 | endmenu |
| 24 | endif | 31 | endif |
diff --git a/drivers/staging/media/imx/Makefile b/drivers/staging/media/imx/Makefile index 698a4210316e..d2d909a36239 100644 --- a/drivers/staging/media/imx/Makefile +++ b/drivers/staging/media/imx/Makefile | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | imx-media-objs := imx-media-dev.o imx-media-internal-sd.o imx-media-of.o | 2 | imx-media-objs := imx-media-dev.o imx-media-internal-sd.o imx-media-of.o |
| 3 | imx-media-objs += imx-media-dev-common.o | ||
| 3 | imx-media-common-objs := imx-media-utils.o imx-media-fim.o | 4 | imx-media-common-objs := imx-media-utils.o imx-media-fim.o |
| 4 | imx-media-ic-objs := imx-ic-common.o imx-ic-prp.o imx-ic-prpencvf.o | 5 | imx-media-ic-objs := imx-ic-common.o imx-ic-prp.o imx-ic-prpencvf.o |
| 5 | 6 | ||
| @@ -11,3 +12,6 @@ obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx-media-ic.o | |||
| 11 | 12 | ||
| 12 | obj-$(CONFIG_VIDEO_IMX_CSI) += imx-media-csi.o | 13 | obj-$(CONFIG_VIDEO_IMX_CSI) += imx-media-csi.o |
| 13 | obj-$(CONFIG_VIDEO_IMX_CSI) += imx6-mipi-csi2.o | 14 | obj-$(CONFIG_VIDEO_IMX_CSI) += imx6-mipi-csi2.o |
| 15 | |||
| 16 | obj-$(CONFIG_VIDEO_IMX7_CSI) += imx7-media-csi.o | ||
| 17 | obj-$(CONFIG_VIDEO_IMX7_CSI) += imx7-mipi-csis.o | ||
diff --git a/drivers/staging/media/imx/TODO b/drivers/staging/media/imx/TODO index aeeb15494a49..6f29b5ca5324 100644 --- a/drivers/staging/media/imx/TODO +++ b/drivers/staging/media/imx/TODO | |||
| @@ -45,3 +45,12 @@ | |||
| 45 | 45 | ||
| 46 | Which means a port must not contain mixed-use endpoints, they | 46 | Which means a port must not contain mixed-use endpoints, they |
| 47 | must all refer to media links between V4L2 subdevices. | 47 | must all refer to media links between V4L2 subdevices. |
| 48 | |||
| 49 | - i.MX7: all of the above, since it uses the imx media core | ||
| 50 | |||
| 51 | - i.MX7: use Frame Interval Monitor | ||
| 52 | |||
| 53 | - i.MX7: runtime testing with parallel sensor, links setup and streaming | ||
| 54 | |||
| 55 | - i.MX7: runtime testing with different formats, for the time only 10-bit bayer | ||
| 56 | is tested | ||
diff --git a/drivers/staging/media/imx/imx-ic-common.c b/drivers/staging/media/imx/imx-ic-common.c index cfdd4900a3be..765919487a73 100644 --- a/drivers/staging/media/imx/imx-ic-common.c +++ b/drivers/staging/media/imx/imx-ic-common.c | |||
| @@ -41,13 +41,13 @@ static int imx_ic_probe(struct platform_device *pdev) | |||
| 41 | pdata = priv->dev->platform_data; | 41 | pdata = priv->dev->platform_data; |
| 42 | priv->ipu_id = pdata->ipu_id; | 42 | priv->ipu_id = pdata->ipu_id; |
| 43 | switch (pdata->grp_id) { | 43 | switch (pdata->grp_id) { |
| 44 | case IMX_MEDIA_GRP_ID_IC_PRP: | 44 | case IMX_MEDIA_GRP_ID_IPU_IC_PRP: |
| 45 | priv->task_id = IC_TASK_PRP; | 45 | priv->task_id = IC_TASK_PRP; |
| 46 | break; | 46 | break; |
| 47 | case IMX_MEDIA_GRP_ID_IC_PRPENC: | 47 | case IMX_MEDIA_GRP_ID_IPU_IC_PRPENC: |
| 48 | priv->task_id = IC_TASK_ENCODER; | 48 | priv->task_id = IC_TASK_ENCODER; |
| 49 | break; | 49 | break; |
| 50 | case IMX_MEDIA_GRP_ID_IC_PRPVF: | 50 | case IMX_MEDIA_GRP_ID_IPU_IC_PRPVF: |
| 51 | priv->task_id = IC_TASK_VIEWFINDER; | 51 | priv->task_id = IC_TASK_VIEWFINDER; |
| 52 | break; | 52 | break; |
| 53 | default: | 53 | default: |
diff --git a/drivers/staging/media/imx/imx-ic-prp.c b/drivers/staging/media/imx/imx-ic-prp.c index 98923fc844ce..3d43cdcb4bb9 100644 --- a/drivers/staging/media/imx/imx-ic-prp.c +++ b/drivers/staging/media/imx/imx-ic-prp.c | |||
| @@ -77,7 +77,7 @@ static int prp_start(struct prp_priv *priv) | |||
| 77 | priv->ipu = priv->md->ipu[ic_priv->ipu_id]; | 77 | priv->ipu = priv->md->ipu[ic_priv->ipu_id]; |
| 78 | 78 | ||
| 79 | /* set IC to receive from CSI or VDI depending on source */ | 79 | /* set IC to receive from CSI or VDI depending on source */ |
| 80 | src_is_vdic = !!(priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_VDIC); | 80 | src_is_vdic = !!(priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_IPU_VDIC); |
| 81 | 81 | ||
| 82 | ipu_set_ic_src_mux(priv->ipu, priv->csi_id, src_is_vdic); | 82 | ipu_set_ic_src_mux(priv->ipu, priv->csi_id, src_is_vdic); |
| 83 | 83 | ||
| @@ -237,8 +237,8 @@ static int prp_link_setup(struct media_entity *entity, | |||
| 237 | ret = -EBUSY; | 237 | ret = -EBUSY; |
| 238 | goto out; | 238 | goto out; |
| 239 | } | 239 | } |
| 240 | if (priv->sink_sd_prpenc && (remote_sd->grp_id & | 240 | if (priv->sink_sd_prpenc && |
| 241 | IMX_MEDIA_GRP_ID_VDIC)) { | 241 | (remote_sd->grp_id & IMX_MEDIA_GRP_ID_IPU_VDIC)) { |
| 242 | ret = -EINVAL; | 242 | ret = -EINVAL; |
| 243 | goto out; | 243 | goto out; |
| 244 | } | 244 | } |
| @@ -259,7 +259,7 @@ static int prp_link_setup(struct media_entity *entity, | |||
| 259 | goto out; | 259 | goto out; |
| 260 | } | 260 | } |
| 261 | if (priv->src_sd && (priv->src_sd->grp_id & | 261 | if (priv->src_sd && (priv->src_sd->grp_id & |
| 262 | IMX_MEDIA_GRP_ID_VDIC)) { | 262 | IMX_MEDIA_GRP_ID_IPU_VDIC)) { |
| 263 | ret = -EINVAL; | 263 | ret = -EINVAL; |
| 264 | goto out; | 264 | goto out; |
| 265 | } | 265 | } |
| @@ -309,13 +309,13 @@ static int prp_link_validate(struct v4l2_subdev *sd, | |||
| 309 | return ret; | 309 | return ret; |
| 310 | 310 | ||
| 311 | csi = imx_media_find_upstream_subdev(priv->md, &ic_priv->sd.entity, | 311 | csi = imx_media_find_upstream_subdev(priv->md, &ic_priv->sd.entity, |
| 312 | IMX_MEDIA_GRP_ID_CSI); | 312 | IMX_MEDIA_GRP_ID_IPU_CSI); |
| 313 | if (IS_ERR(csi)) | 313 | if (IS_ERR(csi)) |
| 314 | csi = NULL; | 314 | csi = NULL; |
| 315 | 315 | ||
| 316 | mutex_lock(&priv->lock); | 316 | mutex_lock(&priv->lock); |
| 317 | 317 | ||
| 318 | if (priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_VDIC) { | 318 | if (priv->src_sd->grp_id & IMX_MEDIA_GRP_ID_IPU_VDIC) { |
| 319 | /* | 319 | /* |
| 320 | * the ->PRPENC link cannot be enabled if the source | 320 | * the ->PRPENC link cannot be enabled if the source |
| 321 | * is the VDIC | 321 | * is the VDIC |
| @@ -334,10 +334,10 @@ static int prp_link_validate(struct v4l2_subdev *sd, | |||
| 334 | 334 | ||
| 335 | if (csi) { | 335 | if (csi) { |
| 336 | switch (csi->grp_id) { | 336 | switch (csi->grp_id) { |
| 337 | case IMX_MEDIA_GRP_ID_CSI0: | 337 | case IMX_MEDIA_GRP_ID_IPU_CSI0: |
| 338 | priv->csi_id = 0; | 338 | priv->csi_id = 0; |
| 339 | break; | 339 | break; |
| 340 | case IMX_MEDIA_GRP_ID_CSI1: | 340 | case IMX_MEDIA_GRP_ID_IPU_CSI1: |
| 341 | priv->csi_id = 1; | 341 | priv->csi_id = 1; |
| 342 | break; | 342 | break; |
| 343 | default: | 343 | default: |
| @@ -422,9 +422,14 @@ static int prp_s_frame_interval(struct v4l2_subdev *sd, | |||
| 422 | if (fi->pad >= PRP_NUM_PADS) | 422 | if (fi->pad >= PRP_NUM_PADS) |
| 423 | return -EINVAL; | 423 | return -EINVAL; |
| 424 | 424 | ||
| 425 | /* No limits on frame interval */ | ||
| 426 | mutex_lock(&priv->lock); | 425 | mutex_lock(&priv->lock); |
| 427 | priv->frame_interval = fi->interval; | 426 | |
| 427 | /* No limits on valid frame intervals */ | ||
| 428 | if (fi->interval.numerator == 0 || fi->interval.denominator == 0) | ||
| 429 | fi->interval = priv->frame_interval; | ||
| 430 | else | ||
| 431 | priv->frame_interval = fi->interval; | ||
| 432 | |||
| 428 | mutex_unlock(&priv->lock); | 433 | mutex_unlock(&priv->lock); |
| 429 | 434 | ||
| 430 | return 0; | 435 | return 0; |
diff --git a/drivers/staging/media/imx/imx-ic-prpencvf.c b/drivers/staging/media/imx/imx-ic-prpencvf.c index 28f41caba05d..5c8e6ad8c025 100644 --- a/drivers/staging/media/imx/imx-ic-prpencvf.c +++ b/drivers/staging/media/imx/imx-ic-prpencvf.c | |||
| @@ -48,7 +48,7 @@ | |||
| 48 | 48 | ||
| 49 | #define MAX_W_SRC 1024 | 49 | #define MAX_W_SRC 1024 |
| 50 | #define MAX_H_SRC 1024 | 50 | #define MAX_H_SRC 1024 |
| 51 | #define W_ALIGN_SRC 4 /* multiple of 16 pixels */ | 51 | #define W_ALIGN_SRC 1 /* multiple of 2 pixels */ |
| 52 | #define H_ALIGN_SRC 1 /* multiple of 2 lines */ | 52 | #define H_ALIGN_SRC 1 /* multiple of 2 lines */ |
| 53 | 53 | ||
| 54 | #define S_ALIGN 1 /* multiple of 2 */ | 54 | #define S_ALIGN 1 /* multiple of 2 */ |
| @@ -106,6 +106,7 @@ struct prp_priv { | |||
| 106 | u32 frame_sequence; /* frame sequence counter */ | 106 | u32 frame_sequence; /* frame sequence counter */ |
| 107 | bool last_eof; /* waiting for last EOF at stream off */ | 107 | bool last_eof; /* waiting for last EOF at stream off */ |
| 108 | bool nfb4eof; /* NFB4EOF encountered during streaming */ | 108 | bool nfb4eof; /* NFB4EOF encountered during streaming */ |
| 109 | bool interweave_swap; /* swap top/bottom lines when interweaving */ | ||
| 109 | struct completion last_eof_comp; | 110 | struct completion last_eof_comp; |
| 110 | }; | 111 | }; |
| 111 | 112 | ||
| @@ -235,6 +236,9 @@ static void prp_vb2_buf_done(struct prp_priv *priv, struct ipuv3_channel *ch) | |||
| 235 | if (ipu_idmac_buffer_is_ready(ch, priv->ipu_buf_num)) | 236 | if (ipu_idmac_buffer_is_ready(ch, priv->ipu_buf_num)) |
| 236 | ipu_idmac_clear_buffer(ch, priv->ipu_buf_num); | 237 | ipu_idmac_clear_buffer(ch, priv->ipu_buf_num); |
| 237 | 238 | ||
| 239 | if (priv->interweave_swap && ch == priv->out_ch) | ||
| 240 | phys += vdev->fmt.fmt.pix.bytesperline; | ||
| 241 | |||
| 238 | ipu_cpmem_set_buffer(ch, priv->ipu_buf_num, phys); | 242 | ipu_cpmem_set_buffer(ch, priv->ipu_buf_num, phys); |
| 239 | } | 243 | } |
| 240 | 244 | ||
| @@ -354,20 +358,30 @@ static int prp_setup_channel(struct prp_priv *priv, | |||
| 354 | { | 358 | { |
| 355 | struct imx_media_video_dev *vdev = priv->vdev; | 359 | struct imx_media_video_dev *vdev = priv->vdev; |
| 356 | const struct imx_media_pixfmt *outcc; | 360 | const struct imx_media_pixfmt *outcc; |
| 357 | struct v4l2_mbus_framefmt *infmt; | 361 | struct v4l2_mbus_framefmt *outfmt; |
| 358 | unsigned int burst_size; | 362 | unsigned int burst_size; |
| 359 | struct ipu_image image; | 363 | struct ipu_image image; |
| 364 | bool interweave; | ||
| 360 | int ret; | 365 | int ret; |
| 361 | 366 | ||
| 362 | infmt = &priv->format_mbus[PRPENCVF_SINK_PAD]; | 367 | outfmt = &priv->format_mbus[PRPENCVF_SRC_PAD]; |
| 363 | outcc = vdev->cc; | 368 | outcc = vdev->cc; |
| 364 | 369 | ||
| 365 | ipu_cpmem_zero(channel); | 370 | ipu_cpmem_zero(channel); |
| 366 | 371 | ||
| 367 | memset(&image, 0, sizeof(image)); | 372 | memset(&image, 0, sizeof(image)); |
| 368 | image.pix = vdev->fmt.fmt.pix; | 373 | image.pix = vdev->fmt.fmt.pix; |
| 369 | image.rect.width = image.pix.width; | 374 | image.rect = vdev->compose; |
| 370 | image.rect.height = image.pix.height; | 375 | |
| 376 | /* | ||
| 377 | * If the field type at capture interface is interlaced, and | ||
| 378 | * the output IDMAC pad is sequential, enable interweave at | ||
| 379 | * the IDMAC output channel. | ||
| 380 | */ | ||
| 381 | interweave = V4L2_FIELD_IS_INTERLACED(image.pix.field) && | ||
| 382 | V4L2_FIELD_IS_SEQUENTIAL(outfmt->field); | ||
| 383 | priv->interweave_swap = interweave && | ||
| 384 | image.pix.field == V4L2_FIELD_INTERLACED_BT; | ||
| 371 | 385 | ||
| 372 | if (rot_swap_width_height) { | 386 | if (rot_swap_width_height) { |
| 373 | swap(image.pix.width, image.pix.height); | 387 | swap(image.pix.width, image.pix.height); |
| @@ -378,15 +392,25 @@ static int prp_setup_channel(struct prp_priv *priv, | |||
| 378 | (image.pix.width * outcc->bpp) >> 3; | 392 | (image.pix.width * outcc->bpp) >> 3; |
| 379 | } | 393 | } |
| 380 | 394 | ||
| 395 | if (priv->interweave_swap && channel == priv->out_ch) { | ||
| 396 | /* start interweave scan at 1st top line (2nd line) */ | ||
| 397 | image.rect.top = 1; | ||
| 398 | } | ||
| 399 | |||
| 381 | image.phys0 = addr0; | 400 | image.phys0 = addr0; |
| 382 | image.phys1 = addr1; | 401 | image.phys1 = addr1; |
| 383 | 402 | ||
| 384 | if (channel == priv->out_ch || channel == priv->rot_out_ch) { | 403 | /* |
| 404 | * Skip writing U and V components to odd rows in the output | ||
| 405 | * channels for planar 4:2:0 (but not when enabling IDMAC | ||
| 406 | * interweaving, they are incompatible). | ||
| 407 | */ | ||
| 408 | if ((channel == priv->out_ch && !interweave) || | ||
| 409 | channel == priv->rot_out_ch) { | ||
| 385 | switch (image.pix.pixelformat) { | 410 | switch (image.pix.pixelformat) { |
| 386 | case V4L2_PIX_FMT_YUV420: | 411 | case V4L2_PIX_FMT_YUV420: |
| 387 | case V4L2_PIX_FMT_YVU420: | 412 | case V4L2_PIX_FMT_YVU420: |
| 388 | case V4L2_PIX_FMT_NV12: | 413 | case V4L2_PIX_FMT_NV12: |
| 389 | /* Skip writing U and V components to odd rows */ | ||
| 390 | ipu_cpmem_skip_odd_chroma_rows(channel); | 414 | ipu_cpmem_skip_odd_chroma_rows(channel); |
| 391 | break; | 415 | break; |
| 392 | } | 416 | } |
| @@ -409,10 +433,12 @@ static int prp_setup_channel(struct prp_priv *priv, | |||
| 409 | if (rot_mode) | 433 | if (rot_mode) |
| 410 | ipu_cpmem_set_rotation(channel, rot_mode); | 434 | ipu_cpmem_set_rotation(channel, rot_mode); |
| 411 | 435 | ||
| 412 | if (image.pix.field == V4L2_FIELD_NONE && | 436 | if (interweave && channel == priv->out_ch) |
| 413 | V4L2_FIELD_HAS_BOTH(infmt->field) && | 437 | ipu_cpmem_interlaced_scan(channel, |
| 414 | channel == priv->out_ch) | 438 | priv->interweave_swap ? |
| 415 | ipu_cpmem_interlaced_scan(channel, image.pix.bytesperline); | 439 | -image.pix.bytesperline : |
| 440 | image.pix.bytesperline, | ||
| 441 | image.pix.pixelformat); | ||
| 416 | 442 | ||
| 417 | ret = ipu_ic_task_idma_init(priv->ic, channel, | 443 | ret = ipu_ic_task_idma_init(priv->ic, channel, |
| 418 | image.pix.width, image.pix.height, | 444 | image.pix.width, image.pix.height, |
| @@ -680,12 +706,23 @@ static int prp_start(struct prp_priv *priv) | |||
| 680 | goto out_free_nfb4eof_irq; | 706 | goto out_free_nfb4eof_irq; |
| 681 | } | 707 | } |
| 682 | 708 | ||
| 709 | /* start upstream */ | ||
| 710 | ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1); | ||
| 711 | ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; | ||
| 712 | if (ret) { | ||
| 713 | v4l2_err(&ic_priv->sd, | ||
| 714 | "upstream stream on failed: %d\n", ret); | ||
| 715 | goto out_free_eof_irq; | ||
| 716 | } | ||
| 717 | |||
| 683 | /* start the EOF timeout timer */ | 718 | /* start the EOF timeout timer */ |
| 684 | mod_timer(&priv->eof_timeout_timer, | 719 | mod_timer(&priv->eof_timeout_timer, |
| 685 | jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT)); | 720 | jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT)); |
| 686 | 721 | ||
| 687 | return 0; | 722 | return 0; |
| 688 | 723 | ||
| 724 | out_free_eof_irq: | ||
| 725 | devm_free_irq(ic_priv->dev, priv->eof_irq, priv); | ||
| 689 | out_free_nfb4eof_irq: | 726 | out_free_nfb4eof_irq: |
| 690 | devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv); | 727 | devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv); |
| 691 | out_unsetup: | 728 | out_unsetup: |
| @@ -717,6 +754,12 @@ static void prp_stop(struct prp_priv *priv) | |||
| 717 | if (ret == 0) | 754 | if (ret == 0) |
| 718 | v4l2_warn(&ic_priv->sd, "wait last EOF timeout\n"); | 755 | v4l2_warn(&ic_priv->sd, "wait last EOF timeout\n"); |
| 719 | 756 | ||
| 757 | /* stop upstream */ | ||
| 758 | ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 0); | ||
| 759 | if (ret && ret != -ENOIOCTLCMD) | ||
| 760 | v4l2_warn(&ic_priv->sd, | ||
| 761 | "upstream stream off failed: %d\n", ret); | ||
| 762 | |||
| 720 | devm_free_irq(ic_priv->dev, priv->eof_irq, priv); | 763 | devm_free_irq(ic_priv->dev, priv->eof_irq, priv); |
| 721 | devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv); | 764 | devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv); |
| 722 | 765 | ||
| @@ -838,8 +881,7 @@ static void prp_try_fmt(struct prp_priv *priv, | |||
| 838 | infmt = __prp_get_fmt(priv, cfg, PRPENCVF_SINK_PAD, sdformat->which); | 881 | infmt = __prp_get_fmt(priv, cfg, PRPENCVF_SINK_PAD, sdformat->which); |
| 839 | 882 | ||
| 840 | if (sdformat->pad == PRPENCVF_SRC_PAD) { | 883 | if (sdformat->pad == PRPENCVF_SRC_PAD) { |
| 841 | if (sdformat->format.field != V4L2_FIELD_NONE) | 884 | sdformat->format.field = infmt->field; |
| 842 | sdformat->format.field = infmt->field; | ||
| 843 | 885 | ||
| 844 | prp_bound_align_output(&sdformat->format, infmt, | 886 | prp_bound_align_output(&sdformat->format, infmt, |
| 845 | priv->rot_mode); | 887 | priv->rot_mode); |
| @@ -870,6 +912,7 @@ static int prp_set_fmt(struct v4l2_subdev *sd, | |||
| 870 | const struct imx_media_pixfmt *cc; | 912 | const struct imx_media_pixfmt *cc; |
| 871 | struct v4l2_pix_format vdev_fmt; | 913 | struct v4l2_pix_format vdev_fmt; |
| 872 | struct v4l2_mbus_framefmt *fmt; | 914 | struct v4l2_mbus_framefmt *fmt; |
| 915 | struct v4l2_rect vdev_compose; | ||
| 873 | int ret = 0; | 916 | int ret = 0; |
| 874 | 917 | ||
| 875 | if (sdformat->pad >= PRPENCVF_NUM_PADS) | 918 | if (sdformat->pad >= PRPENCVF_NUM_PADS) |
| @@ -911,11 +954,11 @@ static int prp_set_fmt(struct v4l2_subdev *sd, | |||
| 911 | priv->cc[sdformat->pad] = cc; | 954 | priv->cc[sdformat->pad] = cc; |
| 912 | 955 | ||
| 913 | /* propagate output pad format to capture device */ | 956 | /* propagate output pad format to capture device */ |
| 914 | imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, | 957 | imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, &vdev_compose, |
| 915 | &priv->format_mbus[PRPENCVF_SRC_PAD], | 958 | &priv->format_mbus[PRPENCVF_SRC_PAD], |
| 916 | priv->cc[PRPENCVF_SRC_PAD]); | 959 | priv->cc[PRPENCVF_SRC_PAD]); |
| 917 | mutex_unlock(&priv->lock); | 960 | mutex_unlock(&priv->lock); |
| 918 | imx_media_capture_device_set_format(vdev, &vdev_fmt); | 961 | imx_media_capture_device_set_format(vdev, &vdev_fmt, &vdev_compose); |
| 919 | 962 | ||
| 920 | return 0; | 963 | return 0; |
| 921 | out: | 964 | out: |
| @@ -1148,15 +1191,6 @@ static int prp_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 1148 | if (ret) | 1191 | if (ret) |
| 1149 | goto out; | 1192 | goto out; |
| 1150 | 1193 | ||
| 1151 | /* start/stop upstream */ | ||
| 1152 | ret = v4l2_subdev_call(priv->src_sd, video, s_stream, enable); | ||
| 1153 | ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; | ||
| 1154 | if (ret) { | ||
| 1155 | if (enable) | ||
| 1156 | prp_stop(priv); | ||
| 1157 | goto out; | ||
| 1158 | } | ||
| 1159 | |||
| 1160 | update_count: | 1194 | update_count: |
| 1161 | priv->stream_count += enable ? 1 : -1; | 1195 | priv->stream_count += enable ? 1 : -1; |
| 1162 | if (priv->stream_count < 0) | 1196 | if (priv->stream_count < 0) |
| @@ -1189,9 +1223,14 @@ static int prp_s_frame_interval(struct v4l2_subdev *sd, | |||
| 1189 | if (fi->pad >= PRPENCVF_NUM_PADS) | 1223 | if (fi->pad >= PRPENCVF_NUM_PADS) |
| 1190 | return -EINVAL; | 1224 | return -EINVAL; |
| 1191 | 1225 | ||
| 1192 | /* No limits on frame interval */ | ||
| 1193 | mutex_lock(&priv->lock); | 1226 | mutex_lock(&priv->lock); |
| 1194 | priv->frame_interval = fi->interval; | 1227 | |
| 1228 | /* No limits on valid frame intervals */ | ||
| 1229 | if (fi->interval.numerator == 0 || fi->interval.denominator == 0) | ||
| 1230 | fi->interval = priv->frame_interval; | ||
| 1231 | else | ||
| 1232 | priv->frame_interval = fi->interval; | ||
| 1233 | |||
| 1195 | mutex_unlock(&priv->lock); | 1234 | mutex_unlock(&priv->lock); |
| 1196 | 1235 | ||
| 1197 | return 0; | 1236 | return 0; |
diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index b37e1186eb2f..9703c85b19c4 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c | |||
| @@ -203,21 +203,14 @@ static int capture_g_fmt_vid_cap(struct file *file, void *fh, | |||
| 203 | return 0; | 203 | return 0; |
| 204 | } | 204 | } |
| 205 | 205 | ||
| 206 | static int capture_try_fmt_vid_cap(struct file *file, void *fh, | 206 | static int __capture_try_fmt_vid_cap(struct capture_priv *priv, |
| 207 | struct v4l2_format *f) | 207 | struct v4l2_subdev_format *fmt_src, |
| 208 | struct v4l2_format *f, | ||
| 209 | struct v4l2_rect *compose) | ||
| 208 | { | 210 | { |
| 209 | struct capture_priv *priv = video_drvdata(file); | ||
| 210 | struct v4l2_subdev_format fmt_src; | ||
| 211 | const struct imx_media_pixfmt *cc, *cc_src; | 211 | const struct imx_media_pixfmt *cc, *cc_src; |
| 212 | int ret; | ||
| 213 | |||
| 214 | fmt_src.pad = priv->src_sd_pad; | ||
| 215 | fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE; | ||
| 216 | ret = v4l2_subdev_call(priv->src_sd, pad, get_fmt, NULL, &fmt_src); | ||
| 217 | if (ret) | ||
| 218 | return ret; | ||
| 219 | 212 | ||
| 220 | cc_src = imx_media_find_ipu_format(fmt_src.format.code, CS_SEL_ANY); | 213 | cc_src = imx_media_find_ipu_format(fmt_src->format.code, CS_SEL_ANY); |
| 221 | if (cc_src) { | 214 | if (cc_src) { |
| 222 | u32 fourcc, cs_sel; | 215 | u32 fourcc, cs_sel; |
| 223 | 216 | ||
| @@ -231,7 +224,7 @@ static int capture_try_fmt_vid_cap(struct file *file, void *fh, | |||
| 231 | cc = imx_media_find_format(fourcc, cs_sel, false); | 224 | cc = imx_media_find_format(fourcc, cs_sel, false); |
| 232 | } | 225 | } |
| 233 | } else { | 226 | } else { |
| 234 | cc_src = imx_media_find_mbus_format(fmt_src.format.code, | 227 | cc_src = imx_media_find_mbus_format(fmt_src->format.code, |
| 235 | CS_SEL_ANY, true); | 228 | CS_SEL_ANY, true); |
| 236 | if (WARN_ON(!cc_src)) | 229 | if (WARN_ON(!cc_src)) |
| 237 | return -EINVAL; | 230 | return -EINVAL; |
| @@ -239,15 +232,48 @@ static int capture_try_fmt_vid_cap(struct file *file, void *fh, | |||
| 239 | cc = cc_src; | 232 | cc = cc_src; |
| 240 | } | 233 | } |
| 241 | 234 | ||
| 242 | imx_media_mbus_fmt_to_pix_fmt(&f->fmt.pix, &fmt_src.format, cc); | 235 | /* allow IDMAC interweave but enforce field order from source */ |
| 236 | if (V4L2_FIELD_IS_INTERLACED(f->fmt.pix.field)) { | ||
| 237 | switch (fmt_src->format.field) { | ||
| 238 | case V4L2_FIELD_SEQ_TB: | ||
| 239 | fmt_src->format.field = V4L2_FIELD_INTERLACED_TB; | ||
| 240 | break; | ||
| 241 | case V4L2_FIELD_SEQ_BT: | ||
| 242 | fmt_src->format.field = V4L2_FIELD_INTERLACED_BT; | ||
| 243 | break; | ||
| 244 | default: | ||
| 245 | break; | ||
| 246 | } | ||
| 247 | } | ||
| 248 | |||
| 249 | imx_media_mbus_fmt_to_pix_fmt(&f->fmt.pix, compose, | ||
| 250 | &fmt_src->format, cc); | ||
| 243 | 251 | ||
| 244 | return 0; | 252 | return 0; |
| 245 | } | 253 | } |
| 246 | 254 | ||
| 255 | static int capture_try_fmt_vid_cap(struct file *file, void *fh, | ||
| 256 | struct v4l2_format *f) | ||
| 257 | { | ||
| 258 | struct capture_priv *priv = video_drvdata(file); | ||
| 259 | struct v4l2_subdev_format fmt_src; | ||
| 260 | int ret; | ||
| 261 | |||
| 262 | fmt_src.pad = priv->src_sd_pad; | ||
| 263 | fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE; | ||
| 264 | ret = v4l2_subdev_call(priv->src_sd, pad, get_fmt, NULL, &fmt_src); | ||
| 265 | if (ret) | ||
| 266 | return ret; | ||
| 267 | |||
| 268 | return __capture_try_fmt_vid_cap(priv, &fmt_src, f, NULL); | ||
| 269 | } | ||
| 270 | |||
| 247 | static int capture_s_fmt_vid_cap(struct file *file, void *fh, | 271 | static int capture_s_fmt_vid_cap(struct file *file, void *fh, |
| 248 | struct v4l2_format *f) | 272 | struct v4l2_format *f) |
| 249 | { | 273 | { |
| 250 | struct capture_priv *priv = video_drvdata(file); | 274 | struct capture_priv *priv = video_drvdata(file); |
| 275 | struct v4l2_subdev_format fmt_src; | ||
| 276 | struct v4l2_rect compose; | ||
| 251 | int ret; | 277 | int ret; |
| 252 | 278 | ||
| 253 | if (vb2_is_busy(&priv->q)) { | 279 | if (vb2_is_busy(&priv->q)) { |
| @@ -255,13 +281,20 @@ static int capture_s_fmt_vid_cap(struct file *file, void *fh, | |||
| 255 | return -EBUSY; | 281 | return -EBUSY; |
| 256 | } | 282 | } |
| 257 | 283 | ||
| 258 | ret = capture_try_fmt_vid_cap(file, priv, f); | 284 | fmt_src.pad = priv->src_sd_pad; |
| 285 | fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE; | ||
| 286 | ret = v4l2_subdev_call(priv->src_sd, pad, get_fmt, NULL, &fmt_src); | ||
| 287 | if (ret) | ||
| 288 | return ret; | ||
| 289 | |||
| 290 | ret = __capture_try_fmt_vid_cap(priv, &fmt_src, f, &compose); | ||
| 259 | if (ret) | 291 | if (ret) |
| 260 | return ret; | 292 | return ret; |
| 261 | 293 | ||
| 262 | priv->vdev.fmt.fmt.pix = f->fmt.pix; | 294 | priv->vdev.fmt.fmt.pix = f->fmt.pix; |
| 263 | priv->vdev.cc = imx_media_find_format(f->fmt.pix.pixelformat, | 295 | priv->vdev.cc = imx_media_find_format(f->fmt.pix.pixelformat, |
| 264 | CS_SEL_ANY, true); | 296 | CS_SEL_ANY, true); |
| 297 | priv->vdev.compose = compose; | ||
| 265 | 298 | ||
| 266 | return 0; | 299 | return 0; |
| 267 | } | 300 | } |
| @@ -290,6 +323,36 @@ static int capture_s_std(struct file *file, void *fh, v4l2_std_id std) | |||
| 290 | return v4l2_subdev_call(priv->src_sd, video, s_std, std); | 323 | return v4l2_subdev_call(priv->src_sd, video, s_std, std); |
| 291 | } | 324 | } |
| 292 | 325 | ||
| 326 | static int capture_g_selection(struct file *file, void *fh, | ||
| 327 | struct v4l2_selection *s) | ||
| 328 | { | ||
| 329 | struct capture_priv *priv = video_drvdata(file); | ||
| 330 | |||
| 331 | switch (s->target) { | ||
| 332 | case V4L2_SEL_TGT_COMPOSE: | ||
| 333 | case V4L2_SEL_TGT_COMPOSE_DEFAULT: | ||
| 334 | case V4L2_SEL_TGT_COMPOSE_BOUNDS: | ||
| 335 | /* The compose rectangle is fixed to the source format. */ | ||
| 336 | s->r = priv->vdev.compose; | ||
| 337 | break; | ||
| 338 | case V4L2_SEL_TGT_COMPOSE_PADDED: | ||
| 339 | /* | ||
| 340 | * The hardware writes with a configurable but fixed DMA burst | ||
| 341 | * size. If the source format width is not burst size aligned, | ||
| 342 | * the written frame contains padding to the right. | ||
| 343 | */ | ||
| 344 | s->r.left = 0; | ||
| 345 | s->r.top = 0; | ||
| 346 | s->r.width = priv->vdev.fmt.fmt.pix.width; | ||
| 347 | s->r.height = priv->vdev.fmt.fmt.pix.height; | ||
| 348 | break; | ||
| 349 | default: | ||
| 350 | return -EINVAL; | ||
| 351 | } | ||
| 352 | |||
| 353 | return 0; | ||
| 354 | } | ||
| 355 | |||
| 293 | static int capture_g_parm(struct file *file, void *fh, | 356 | static int capture_g_parm(struct file *file, void *fh, |
| 294 | struct v4l2_streamparm *a) | 357 | struct v4l2_streamparm *a) |
| 295 | { | 358 | { |
| @@ -335,6 +398,21 @@ static int capture_s_parm(struct file *file, void *fh, | |||
| 335 | return 0; | 398 | return 0; |
| 336 | } | 399 | } |
| 337 | 400 | ||
| 401 | static int capture_subscribe_event(struct v4l2_fh *fh, | ||
| 402 | const struct v4l2_event_subscription *sub) | ||
| 403 | { | ||
| 404 | switch (sub->type) { | ||
| 405 | case V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR: | ||
| 406 | return v4l2_event_subscribe(fh, sub, 0, NULL); | ||
| 407 | case V4L2_EVENT_SOURCE_CHANGE: | ||
| 408 | return v4l2_src_change_event_subscribe(fh, sub); | ||
| 409 | case V4L2_EVENT_CTRL: | ||
| 410 | return v4l2_ctrl_subscribe_event(fh, sub); | ||
| 411 | default: | ||
| 412 | return -EINVAL; | ||
| 413 | } | ||
| 414 | } | ||
| 415 | |||
| 338 | static const struct v4l2_ioctl_ops capture_ioctl_ops = { | 416 | static const struct v4l2_ioctl_ops capture_ioctl_ops = { |
| 339 | .vidioc_querycap = vidioc_querycap, | 417 | .vidioc_querycap = vidioc_querycap, |
| 340 | 418 | ||
| @@ -350,6 +428,8 @@ static const struct v4l2_ioctl_ops capture_ioctl_ops = { | |||
| 350 | .vidioc_g_std = capture_g_std, | 428 | .vidioc_g_std = capture_g_std, |
| 351 | .vidioc_s_std = capture_s_std, | 429 | .vidioc_s_std = capture_s_std, |
| 352 | 430 | ||
| 431 | .vidioc_g_selection = capture_g_selection, | ||
| 432 | |||
| 353 | .vidioc_g_parm = capture_g_parm, | 433 | .vidioc_g_parm = capture_g_parm, |
| 354 | .vidioc_s_parm = capture_s_parm, | 434 | .vidioc_s_parm = capture_s_parm, |
| 355 | 435 | ||
| @@ -362,6 +442,9 @@ static const struct v4l2_ioctl_ops capture_ioctl_ops = { | |||
| 362 | .vidioc_expbuf = vb2_ioctl_expbuf, | 442 | .vidioc_expbuf = vb2_ioctl_expbuf, |
| 363 | .vidioc_streamon = vb2_ioctl_streamon, | 443 | .vidioc_streamon = vb2_ioctl_streamon, |
| 364 | .vidioc_streamoff = vb2_ioctl_streamoff, | 444 | .vidioc_streamoff = vb2_ioctl_streamoff, |
| 445 | |||
| 446 | .vidioc_subscribe_event = capture_subscribe_event, | ||
| 447 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | ||
| 365 | }; | 448 | }; |
| 366 | 449 | ||
| 367 | /* | 450 | /* |
| @@ -572,7 +655,8 @@ static struct video_device capture_videodev = { | |||
| 572 | }; | 655 | }; |
| 573 | 656 | ||
| 574 | void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, | 657 | void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, |
| 575 | struct v4l2_pix_format *pix) | 658 | const struct v4l2_pix_format *pix, |
| 659 | const struct v4l2_rect *compose) | ||
| 576 | { | 660 | { |
| 577 | struct capture_priv *priv = to_capture_priv(vdev); | 661 | struct capture_priv *priv = to_capture_priv(vdev); |
| 578 | 662 | ||
| @@ -580,6 +664,7 @@ void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, | |||
| 580 | priv->vdev.fmt.fmt.pix = *pix; | 664 | priv->vdev.fmt.fmt.pix = *pix; |
| 581 | priv->vdev.cc = imx_media_find_format(pix->pixelformat, CS_SEL_ANY, | 665 | priv->vdev.cc = imx_media_find_format(pix->pixelformat, CS_SEL_ANY, |
| 582 | true); | 666 | true); |
| 667 | priv->vdev.compose = *compose; | ||
| 583 | mutex_unlock(&priv->mutex); | 668 | mutex_unlock(&priv->mutex); |
| 584 | } | 669 | } |
| 585 | EXPORT_SYMBOL_GPL(imx_media_capture_device_set_format); | 670 | EXPORT_SYMBOL_GPL(imx_media_capture_device_set_format); |
| @@ -685,7 +770,7 @@ int imx_media_capture_device_register(struct imx_media_video_dev *vdev) | |||
| 685 | } | 770 | } |
| 686 | 771 | ||
| 687 | vdev->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | 772 | vdev->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 688 | imx_media_mbus_fmt_to_pix_fmt(&vdev->fmt.fmt.pix, | 773 | imx_media_mbus_fmt_to_pix_fmt(&vdev->fmt.fmt.pix, &vdev->compose, |
| 689 | &fmt_src.format, NULL); | 774 | &fmt_src.format, NULL); |
| 690 | vdev->cc = imx_media_find_format(vdev->fmt.fmt.pix.pixelformat, | 775 | vdev->cc = imx_media_find_format(vdev->fmt.fmt.pix.pixelformat, |
| 691 | CS_SEL_ANY, false); | 776 | CS_SEL_ANY, false); |
diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 4223f8d418ae..3b7517348666 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | #define MIN_H 144 | 41 | #define MIN_H 144 |
| 42 | #define MAX_W 4096 | 42 | #define MAX_W 4096 |
| 43 | #define MAX_H 4096 | 43 | #define MAX_H 4096 |
| 44 | #define W_ALIGN 4 /* multiple of 16 pixels */ | 44 | #define W_ALIGN 1 /* multiple of 2 pixels */ |
| 45 | #define H_ALIGN 1 /* multiple of 2 lines */ | 45 | #define H_ALIGN 1 /* multiple of 2 lines */ |
| 46 | #define S_ALIGN 1 /* multiple of 2 */ | 46 | #define S_ALIGN 1 /* multiple of 2 */ |
| 47 | 47 | ||
| @@ -114,6 +114,7 @@ struct csi_priv { | |||
| 114 | u32 frame_sequence; /* frame sequence counter */ | 114 | u32 frame_sequence; /* frame sequence counter */ |
| 115 | bool last_eof; /* waiting for last EOF at stream off */ | 115 | bool last_eof; /* waiting for last EOF at stream off */ |
| 116 | bool nfb4eof; /* NFB4EOF encountered during streaming */ | 116 | bool nfb4eof; /* NFB4EOF encountered during streaming */ |
| 117 | bool interweave_swap; /* swap top/bottom lines when interweaving */ | ||
| 117 | struct completion last_eof_comp; | 118 | struct completion last_eof_comp; |
| 118 | }; | 119 | }; |
| 119 | 120 | ||
| @@ -286,6 +287,9 @@ static void csi_vb2_buf_done(struct csi_priv *priv) | |||
| 286 | if (ipu_idmac_buffer_is_ready(priv->idmac_ch, priv->ipu_buf_num)) | 287 | if (ipu_idmac_buffer_is_ready(priv->idmac_ch, priv->ipu_buf_num)) |
| 287 | ipu_idmac_clear_buffer(priv->idmac_ch, priv->ipu_buf_num); | 288 | ipu_idmac_clear_buffer(priv->idmac_ch, priv->ipu_buf_num); |
| 288 | 289 | ||
| 290 | if (priv->interweave_swap) | ||
| 291 | phys += vdev->fmt.fmt.pix.bytesperline; | ||
| 292 | |||
| 289 | ipu_cpmem_set_buffer(priv->idmac_ch, priv->ipu_buf_num, phys); | 293 | ipu_cpmem_set_buffer(priv->idmac_ch, priv->ipu_buf_num, phys); |
| 290 | } | 294 | } |
| 291 | 295 | ||
| @@ -398,23 +402,24 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) | |||
| 398 | struct imx_media_video_dev *vdev = priv->vdev; | 402 | struct imx_media_video_dev *vdev = priv->vdev; |
| 399 | const struct imx_media_pixfmt *incc; | 403 | const struct imx_media_pixfmt *incc; |
| 400 | struct v4l2_mbus_framefmt *infmt; | 404 | struct v4l2_mbus_framefmt *infmt; |
| 405 | struct v4l2_mbus_framefmt *outfmt; | ||
| 406 | bool passthrough, interweave; | ||
| 401 | struct ipu_image image; | 407 | struct ipu_image image; |
| 402 | u32 passthrough_bits; | 408 | u32 passthrough_bits; |
| 403 | u32 passthrough_cycles; | 409 | u32 passthrough_cycles; |
| 404 | dma_addr_t phys[2]; | 410 | dma_addr_t phys[2]; |
| 405 | bool passthrough; | ||
| 406 | u32 burst_size; | 411 | u32 burst_size; |
| 407 | int ret; | 412 | int ret; |
| 408 | 413 | ||
| 409 | infmt = &priv->format_mbus[CSI_SINK_PAD]; | 414 | infmt = &priv->format_mbus[CSI_SINK_PAD]; |
| 410 | incc = priv->cc[CSI_SINK_PAD]; | 415 | incc = priv->cc[CSI_SINK_PAD]; |
| 416 | outfmt = &priv->format_mbus[CSI_SRC_PAD_IDMAC]; | ||
| 411 | 417 | ||
| 412 | ipu_cpmem_zero(priv->idmac_ch); | 418 | ipu_cpmem_zero(priv->idmac_ch); |
| 413 | 419 | ||
| 414 | memset(&image, 0, sizeof(image)); | 420 | memset(&image, 0, sizeof(image)); |
| 415 | image.pix = vdev->fmt.fmt.pix; | 421 | image.pix = vdev->fmt.fmt.pix; |
| 416 | image.rect.width = image.pix.width; | 422 | image.rect = vdev->compose; |
| 417 | image.rect.height = image.pix.height; | ||
| 418 | 423 | ||
| 419 | csi_idmac_setup_vb2_buf(priv, phys); | 424 | csi_idmac_setup_vb2_buf(priv, phys); |
| 420 | 425 | ||
| @@ -424,6 +429,16 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) | |||
| 424 | passthrough = requires_passthrough(&priv->upstream_ep, infmt, incc); | 429 | passthrough = requires_passthrough(&priv->upstream_ep, infmt, incc); |
| 425 | passthrough_cycles = 1; | 430 | passthrough_cycles = 1; |
| 426 | 431 | ||
| 432 | /* | ||
| 433 | * If the field type at capture interface is interlaced, and | ||
| 434 | * the output IDMAC pad is sequential, enable interweave at | ||
| 435 | * the IDMAC output channel. | ||
| 436 | */ | ||
| 437 | interweave = V4L2_FIELD_IS_INTERLACED(image.pix.field) && | ||
| 438 | V4L2_FIELD_IS_SEQUENTIAL(outfmt->field); | ||
| 439 | priv->interweave_swap = interweave && | ||
| 440 | image.pix.field == V4L2_FIELD_INTERLACED_BT; | ||
| 441 | |||
| 427 | switch (image.pix.pixelformat) { | 442 | switch (image.pix.pixelformat) { |
| 428 | case V4L2_PIX_FMT_SBGGR8: | 443 | case V4L2_PIX_FMT_SBGGR8: |
| 429 | case V4L2_PIX_FMT_SGBRG8: | 444 | case V4L2_PIX_FMT_SGBRG8: |
| @@ -442,13 +457,18 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) | |||
| 442 | passthrough_bits = 16; | 457 | passthrough_bits = 16; |
| 443 | break; | 458 | break; |
| 444 | case V4L2_PIX_FMT_YUV420: | 459 | case V4L2_PIX_FMT_YUV420: |
| 460 | case V4L2_PIX_FMT_YVU420: | ||
| 445 | case V4L2_PIX_FMT_NV12: | 461 | case V4L2_PIX_FMT_NV12: |
| 446 | burst_size = (image.pix.width & 0x3f) ? | 462 | burst_size = (image.pix.width & 0x3f) ? |
| 447 | ((image.pix.width & 0x1f) ? | 463 | ((image.pix.width & 0x1f) ? |
| 448 | ((image.pix.width & 0xf) ? 8 : 16) : 32) : 64; | 464 | ((image.pix.width & 0xf) ? 8 : 16) : 32) : 64; |
| 449 | passthrough_bits = 16; | 465 | passthrough_bits = 16; |
| 450 | /* Skip writing U and V components to odd rows */ | 466 | /* |
| 451 | ipu_cpmem_skip_odd_chroma_rows(priv->idmac_ch); | 467 | * Skip writing U and V components to odd rows (but not |
| 468 | * when enabling IDMAC interweaving, they are incompatible). | ||
| 469 | */ | ||
| 470 | if (!interweave) | ||
| 471 | ipu_cpmem_skip_odd_chroma_rows(priv->idmac_ch); | ||
| 452 | break; | 472 | break; |
| 453 | case V4L2_PIX_FMT_YUYV: | 473 | case V4L2_PIX_FMT_YUYV: |
| 454 | case V4L2_PIX_FMT_UYVY: | 474 | case V4L2_PIX_FMT_UYVY: |
| @@ -471,6 +491,12 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) | |||
| 471 | } | 491 | } |
| 472 | 492 | ||
| 473 | if (passthrough) { | 493 | if (passthrough) { |
| 494 | if (priv->interweave_swap) { | ||
| 495 | /* start interweave scan at 1st top line (2nd line) */ | ||
| 496 | image.phys0 += image.pix.bytesperline; | ||
| 497 | image.phys1 += image.pix.bytesperline; | ||
| 498 | } | ||
| 499 | |||
| 474 | ipu_cpmem_set_resolution(priv->idmac_ch, | 500 | ipu_cpmem_set_resolution(priv->idmac_ch, |
| 475 | image.rect.width * passthrough_cycles, | 501 | image.rect.width * passthrough_cycles, |
| 476 | image.rect.height); | 502 | image.rect.height); |
| @@ -480,6 +506,11 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) | |||
| 480 | ipu_cpmem_set_format_passthrough(priv->idmac_ch, | 506 | ipu_cpmem_set_format_passthrough(priv->idmac_ch, |
| 481 | passthrough_bits); | 507 | passthrough_bits); |
| 482 | } else { | 508 | } else { |
| 509 | if (priv->interweave_swap) { | ||
| 510 | /* start interweave scan at 1st top line (2nd line) */ | ||
| 511 | image.rect.top = 1; | ||
| 512 | } | ||
| 513 | |||
| 483 | ret = ipu_cpmem_set_image(priv->idmac_ch, &image); | 514 | ret = ipu_cpmem_set_image(priv->idmac_ch, &image); |
| 484 | if (ret) | 515 | if (ret) |
| 485 | goto unsetup_vb2; | 516 | goto unsetup_vb2; |
| @@ -509,10 +540,12 @@ static int csi_idmac_setup_channel(struct csi_priv *priv) | |||
| 509 | 540 | ||
| 510 | ipu_smfc_set_burstsize(priv->smfc, burst_size); | 541 | ipu_smfc_set_burstsize(priv->smfc, burst_size); |
| 511 | 542 | ||
| 512 | if (image.pix.field == V4L2_FIELD_NONE && | 543 | if (interweave) |
| 513 | V4L2_FIELD_HAS_BOTH(infmt->field)) | ||
| 514 | ipu_cpmem_interlaced_scan(priv->idmac_ch, | 544 | ipu_cpmem_interlaced_scan(priv->idmac_ch, |
| 515 | image.pix.bytesperline); | 545 | priv->interweave_swap ? |
| 546 | -image.pix.bytesperline : | ||
| 547 | image.pix.bytesperline, | ||
| 548 | image.pix.pixelformat); | ||
| 516 | 549 | ||
| 517 | ipu_idmac_set_double_buffer(priv->idmac_ch, true); | 550 | ipu_idmac_set_double_buffer(priv->idmac_ch, true); |
| 518 | 551 | ||
| @@ -629,7 +662,7 @@ out_put_ipu: | |||
| 629 | return ret; | 662 | return ret; |
| 630 | } | 663 | } |
| 631 | 664 | ||
| 632 | static void csi_idmac_stop(struct csi_priv *priv) | 665 | static void csi_idmac_wait_last_eof(struct csi_priv *priv) |
| 633 | { | 666 | { |
| 634 | unsigned long flags; | 667 | unsigned long flags; |
| 635 | int ret; | 668 | int ret; |
| @@ -646,7 +679,10 @@ static void csi_idmac_stop(struct csi_priv *priv) | |||
| 646 | &priv->last_eof_comp, msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT)); | 679 | &priv->last_eof_comp, msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT)); |
| 647 | if (ret == 0) | 680 | if (ret == 0) |
| 648 | v4l2_warn(&priv->sd, "wait last EOF timeout\n"); | 681 | v4l2_warn(&priv->sd, "wait last EOF timeout\n"); |
| 682 | } | ||
| 649 | 683 | ||
| 684 | static void csi_idmac_stop(struct csi_priv *priv) | ||
| 685 | { | ||
| 650 | devm_free_irq(priv->dev, priv->eof_irq, priv); | 686 | devm_free_irq(priv->dev, priv->eof_irq, priv); |
| 651 | devm_free_irq(priv->dev, priv->nfb4eof_irq, priv); | 687 | devm_free_irq(priv->dev, priv->nfb4eof_irq, priv); |
| 652 | 688 | ||
| @@ -679,12 +715,7 @@ static int csi_setup(struct csi_priv *priv) | |||
| 679 | priv->upstream_ep.bus.parallel.flags : | 715 | priv->upstream_ep.bus.parallel.flags : |
| 680 | priv->upstream_ep.bus.mipi_csi2.flags; | 716 | priv->upstream_ep.bus.mipi_csi2.flags; |
| 681 | 717 | ||
| 682 | /* | ||
| 683 | * we need to pass input frame to CSI interface, but | ||
| 684 | * with translated field type from output format | ||
| 685 | */ | ||
| 686 | if_fmt = *infmt; | 718 | if_fmt = *infmt; |
| 687 | if_fmt.field = outfmt->field; | ||
| 688 | crop = priv->crop; | 719 | crop = priv->crop; |
| 689 | 720 | ||
| 690 | /* | 721 | /* |
| @@ -702,7 +733,7 @@ static int csi_setup(struct csi_priv *priv) | |||
| 702 | priv->crop.width == 2 * priv->compose.width, | 733 | priv->crop.width == 2 * priv->compose.width, |
| 703 | priv->crop.height == 2 * priv->compose.height); | 734 | priv->crop.height == 2 * priv->compose.height); |
| 704 | 735 | ||
| 705 | ipu_csi_init_interface(priv->csi, &mbus_cfg, &if_fmt); | 736 | ipu_csi_init_interface(priv->csi, &mbus_cfg, &if_fmt, outfmt); |
| 706 | 737 | ||
| 707 | ipu_csi_set_dest(priv->csi, priv->dest); | 738 | ipu_csi_set_dest(priv->csi, priv->dest); |
| 708 | 739 | ||
| @@ -722,10 +753,16 @@ static int csi_start(struct csi_priv *priv) | |||
| 722 | 753 | ||
| 723 | output_fi = &priv->frame_interval[priv->active_output_pad]; | 754 | output_fi = &priv->frame_interval[priv->active_output_pad]; |
| 724 | 755 | ||
| 756 | /* start upstream */ | ||
| 757 | ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1); | ||
| 758 | ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; | ||
| 759 | if (ret) | ||
| 760 | return ret; | ||
| 761 | |||
| 725 | if (priv->dest == IPU_CSI_DEST_IDMAC) { | 762 | if (priv->dest == IPU_CSI_DEST_IDMAC) { |
| 726 | ret = csi_idmac_start(priv); | 763 | ret = csi_idmac_start(priv); |
| 727 | if (ret) | 764 | if (ret) |
| 728 | return ret; | 765 | goto stop_upstream; |
| 729 | } | 766 | } |
| 730 | 767 | ||
| 731 | ret = csi_setup(priv); | 768 | ret = csi_setup(priv); |
| @@ -753,11 +790,26 @@ fim_off: | |||
| 753 | idmac_stop: | 790 | idmac_stop: |
| 754 | if (priv->dest == IPU_CSI_DEST_IDMAC) | 791 | if (priv->dest == IPU_CSI_DEST_IDMAC) |
| 755 | csi_idmac_stop(priv); | 792 | csi_idmac_stop(priv); |
| 793 | stop_upstream: | ||
| 794 | v4l2_subdev_call(priv->src_sd, video, s_stream, 0); | ||
| 756 | return ret; | 795 | return ret; |
| 757 | } | 796 | } |
| 758 | 797 | ||
| 759 | static void csi_stop(struct csi_priv *priv) | 798 | static void csi_stop(struct csi_priv *priv) |
| 760 | { | 799 | { |
| 800 | if (priv->dest == IPU_CSI_DEST_IDMAC) | ||
| 801 | csi_idmac_wait_last_eof(priv); | ||
| 802 | |||
| 803 | /* | ||
| 804 | * Disable the CSI asap, after syncing with the last EOF. | ||
| 805 | * Doing so after the IDMA channel is disabled has shown to | ||
| 806 | * create hard system-wide hangs. | ||
| 807 | */ | ||
| 808 | ipu_csi_disable(priv->csi); | ||
| 809 | |||
| 810 | /* stop upstream */ | ||
| 811 | v4l2_subdev_call(priv->src_sd, video, s_stream, 0); | ||
| 812 | |||
| 761 | if (priv->dest == IPU_CSI_DEST_IDMAC) { | 813 | if (priv->dest == IPU_CSI_DEST_IDMAC) { |
| 762 | csi_idmac_stop(priv); | 814 | csi_idmac_stop(priv); |
| 763 | 815 | ||
| @@ -765,8 +817,6 @@ static void csi_stop(struct csi_priv *priv) | |||
| 765 | if (priv->fim) | 817 | if (priv->fim) |
| 766 | imx_media_fim_set_stream(priv->fim, NULL, false); | 818 | imx_media_fim_set_stream(priv->fim, NULL, false); |
| 767 | } | 819 | } |
| 768 | |||
| 769 | ipu_csi_disable(priv->csi); | ||
| 770 | } | 820 | } |
| 771 | 821 | ||
| 772 | static const struct csi_skip_desc csi_skip[12] = { | 822 | static const struct csi_skip_desc csi_skip[12] = { |
| @@ -876,7 +926,10 @@ static int csi_s_frame_interval(struct v4l2_subdev *sd, | |||
| 876 | 926 | ||
| 877 | switch (fi->pad) { | 927 | switch (fi->pad) { |
| 878 | case CSI_SINK_PAD: | 928 | case CSI_SINK_PAD: |
| 879 | /* No limits on input frame interval */ | 929 | /* No limits on valid input frame intervals */ |
| 930 | if (fi->interval.numerator == 0 || | ||
| 931 | fi->interval.denominator == 0) | ||
| 932 | fi->interval = *input_fi; | ||
| 880 | /* Reset output intervals and frame skipping ratio to 1:1 */ | 933 | /* Reset output intervals and frame skipping ratio to 1:1 */ |
| 881 | priv->frame_interval[CSI_SRC_PAD_IDMAC] = fi->interval; | 934 | priv->frame_interval[CSI_SRC_PAD_IDMAC] = fi->interval; |
| 882 | priv->frame_interval[CSI_SRC_PAD_DIRECT] = fi->interval; | 935 | priv->frame_interval[CSI_SRC_PAD_DIRECT] = fi->interval; |
| @@ -927,23 +980,13 @@ static int csi_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 927 | goto update_count; | 980 | goto update_count; |
| 928 | 981 | ||
| 929 | if (enable) { | 982 | if (enable) { |
| 930 | /* upstream must be started first, before starting CSI */ | ||
| 931 | ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1); | ||
| 932 | ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0; | ||
| 933 | if (ret) | ||
| 934 | goto out; | ||
| 935 | |||
| 936 | dev_dbg(priv->dev, "stream ON\n"); | 983 | dev_dbg(priv->dev, "stream ON\n"); |
| 937 | ret = csi_start(priv); | 984 | ret = csi_start(priv); |
| 938 | if (ret) { | 985 | if (ret) |
| 939 | v4l2_subdev_call(priv->src_sd, video, s_stream, 0); | ||
| 940 | goto out; | 986 | goto out; |
| 941 | } | ||
| 942 | } else { | 987 | } else { |
| 943 | dev_dbg(priv->dev, "stream OFF\n"); | 988 | dev_dbg(priv->dev, "stream OFF\n"); |
| 944 | /* CSI must be stopped first, then stop upstream */ | ||
| 945 | csi_stop(priv); | 989 | csi_stop(priv); |
| 946 | v4l2_subdev_call(priv->src_sd, video, s_stream, 0); | ||
| 947 | } | 990 | } |
| 948 | 991 | ||
| 949 | update_count: | 992 | update_count: |
| @@ -1001,6 +1044,8 @@ static int csi_link_setup(struct media_entity *entity, | |||
| 1001 | v4l2_ctrl_handler_free(&priv->ctrl_hdlr); | 1044 | v4l2_ctrl_handler_free(&priv->ctrl_hdlr); |
| 1002 | v4l2_ctrl_handler_init(&priv->ctrl_hdlr, 0); | 1045 | v4l2_ctrl_handler_init(&priv->ctrl_hdlr, 0); |
| 1003 | priv->sink = NULL; | 1046 | priv->sink = NULL; |
| 1047 | /* do not apply IC burst alignment in csi_try_crop */ | ||
| 1048 | priv->active_output_pad = CSI_SRC_PAD_IDMAC; | ||
| 1004 | goto out; | 1049 | goto out; |
| 1005 | } | 1050 | } |
| 1006 | 1051 | ||
| @@ -1029,10 +1074,10 @@ static int csi_link_setup(struct media_entity *entity, | |||
| 1029 | 1074 | ||
| 1030 | remote_sd = media_entity_to_v4l2_subdev(remote->entity); | 1075 | remote_sd = media_entity_to_v4l2_subdev(remote->entity); |
| 1031 | switch (remote_sd->grp_id) { | 1076 | switch (remote_sd->grp_id) { |
| 1032 | case IMX_MEDIA_GRP_ID_VDIC: | 1077 | case IMX_MEDIA_GRP_ID_IPU_VDIC: |
| 1033 | priv->dest = IPU_CSI_DEST_VDIC; | 1078 | priv->dest = IPU_CSI_DEST_VDIC; |
| 1034 | break; | 1079 | break; |
| 1035 | case IMX_MEDIA_GRP_ID_IC_PRP: | 1080 | case IMX_MEDIA_GRP_ID_IPU_IC_PRP: |
| 1036 | priv->dest = IPU_CSI_DEST_IC; | 1081 | priv->dest = IPU_CSI_DEST_IC; |
| 1037 | break; | 1082 | break; |
| 1038 | default: | 1083 | default: |
| @@ -1137,12 +1182,21 @@ static void csi_try_crop(struct csi_priv *priv, | |||
| 1137 | struct v4l2_mbus_framefmt *infmt, | 1182 | struct v4l2_mbus_framefmt *infmt, |
| 1138 | struct v4l2_fwnode_endpoint *upstream_ep) | 1183 | struct v4l2_fwnode_endpoint *upstream_ep) |
| 1139 | { | 1184 | { |
| 1185 | u32 in_height; | ||
| 1186 | |||
| 1140 | crop->width = min_t(__u32, infmt->width, crop->width); | 1187 | crop->width = min_t(__u32, infmt->width, crop->width); |
| 1141 | if (crop->left + crop->width > infmt->width) | 1188 | if (crop->left + crop->width > infmt->width) |
| 1142 | crop->left = infmt->width - crop->width; | 1189 | crop->left = infmt->width - crop->width; |
| 1143 | /* adjust crop left/width to h/w alignment restrictions */ | 1190 | /* adjust crop left/width to h/w alignment restrictions */ |
| 1144 | crop->left &= ~0x3; | 1191 | crop->left &= ~0x3; |
| 1145 | crop->width &= ~0x7; | 1192 | if (priv->active_output_pad == CSI_SRC_PAD_DIRECT) |
| 1193 | crop->width &= ~0x7; /* multiple of 8 pixels (IC burst) */ | ||
| 1194 | else | ||
| 1195 | crop->width &= ~0x1; /* multiple of 2 pixels */ | ||
| 1196 | |||
| 1197 | in_height = infmt->height; | ||
| 1198 | if (infmt->field == V4L2_FIELD_ALTERNATE) | ||
| 1199 | in_height *= 2; | ||
| 1146 | 1200 | ||
| 1147 | /* | 1201 | /* |
| 1148 | * FIXME: not sure why yet, but on interlaced bt.656, | 1202 | * FIXME: not sure why yet, but on interlaced bt.656, |
| @@ -1153,12 +1207,12 @@ static void csi_try_crop(struct csi_priv *priv, | |||
| 1153 | if (upstream_ep->bus_type == V4L2_MBUS_BT656 && | 1207 | if (upstream_ep->bus_type == V4L2_MBUS_BT656 && |
| 1154 | (V4L2_FIELD_HAS_BOTH(infmt->field) || | 1208 | (V4L2_FIELD_HAS_BOTH(infmt->field) || |
| 1155 | infmt->field == V4L2_FIELD_ALTERNATE)) { | 1209 | infmt->field == V4L2_FIELD_ALTERNATE)) { |
| 1156 | crop->height = infmt->height; | 1210 | crop->height = in_height; |
| 1157 | crop->top = (infmt->height == 480) ? 2 : 0; | 1211 | crop->top = (in_height == 480) ? 2 : 0; |
| 1158 | } else { | 1212 | } else { |
| 1159 | crop->height = min_t(__u32, infmt->height, crop->height); | 1213 | crop->height = min_t(__u32, in_height, crop->height); |
| 1160 | if (crop->top + crop->height > infmt->height) | 1214 | if (crop->top + crop->height > in_height) |
| 1161 | crop->top = infmt->height - crop->height; | 1215 | crop->top = in_height - crop->height; |
| 1162 | } | 1216 | } |
| 1163 | } | 1217 | } |
| 1164 | 1218 | ||
| @@ -1308,6 +1362,49 @@ out: | |||
| 1308 | return ret; | 1362 | return ret; |
| 1309 | } | 1363 | } |
| 1310 | 1364 | ||
| 1365 | static void csi_try_field(struct csi_priv *priv, | ||
| 1366 | struct v4l2_subdev_pad_config *cfg, | ||
| 1367 | struct v4l2_subdev_format *sdformat) | ||
| 1368 | { | ||
| 1369 | struct v4l2_mbus_framefmt *infmt = | ||
| 1370 | __csi_get_fmt(priv, cfg, CSI_SINK_PAD, sdformat->which); | ||
| 1371 | |||
| 1372 | /* no restrictions on sink pad field type */ | ||
| 1373 | if (sdformat->pad == CSI_SINK_PAD) | ||
| 1374 | return; | ||
| 1375 | |||
| 1376 | switch (infmt->field) { | ||
| 1377 | case V4L2_FIELD_SEQ_TB: | ||
| 1378 | case V4L2_FIELD_SEQ_BT: | ||
| 1379 | /* | ||
| 1380 | * If the user requests sequential at the source pad, | ||
| 1381 | * allow it (along with possibly inverting field order). | ||
| 1382 | * Otherwise passthrough the field type. | ||
| 1383 | */ | ||
| 1384 | if (!V4L2_FIELD_IS_SEQUENTIAL(sdformat->format.field)) | ||
| 1385 | sdformat->format.field = infmt->field; | ||
| 1386 | break; | ||
| 1387 | case V4L2_FIELD_ALTERNATE: | ||
| 1388 | /* | ||
| 1389 | * This driver does not support alternate field mode, and | ||
| 1390 | * the CSI captures a whole frame, so the CSI never presents | ||
| 1391 | * alternate mode at its source pads. If user has not | ||
| 1392 | * already requested sequential, translate ALTERNATE at | ||
| 1393 | * sink pad to SEQ_TB or SEQ_BT at the source pad depending | ||
| 1394 | * on input height (assume NTSC BT order if 480 total active | ||
| 1395 | * frame lines, otherwise PAL TB order). | ||
| 1396 | */ | ||
| 1397 | if (!V4L2_FIELD_IS_SEQUENTIAL(sdformat->format.field)) | ||
| 1398 | sdformat->format.field = (infmt->height == 480 / 2) ? | ||
| 1399 | V4L2_FIELD_SEQ_BT : V4L2_FIELD_SEQ_TB; | ||
| 1400 | break; | ||
| 1401 | default: | ||
| 1402 | /* Passthrough for all other input field types */ | ||
| 1403 | sdformat->format.field = infmt->field; | ||
| 1404 | break; | ||
| 1405 | } | ||
| 1406 | } | ||
| 1407 | |||
| 1311 | static void csi_try_fmt(struct csi_priv *priv, | 1408 | static void csi_try_fmt(struct csi_priv *priv, |
| 1312 | struct v4l2_fwnode_endpoint *upstream_ep, | 1409 | struct v4l2_fwnode_endpoint *upstream_ep, |
| 1313 | struct v4l2_subdev_pad_config *cfg, | 1410 | struct v4l2_subdev_pad_config *cfg, |
| @@ -1347,42 +1444,20 @@ static void csi_try_fmt(struct csi_priv *priv, | |||
| 1347 | } | 1444 | } |
| 1348 | } | 1445 | } |
| 1349 | 1446 | ||
| 1350 | if (sdformat->pad == CSI_SRC_PAD_DIRECT || | 1447 | csi_try_field(priv, cfg, sdformat); |
| 1351 | sdformat->format.field != V4L2_FIELD_NONE) | ||
| 1352 | sdformat->format.field = infmt->field; | ||
| 1353 | |||
| 1354 | /* | ||
| 1355 | * translate V4L2_FIELD_ALTERNATE to SEQ_TB or SEQ_BT | ||
| 1356 | * depending on input height (assume NTSC top-bottom | ||
| 1357 | * order if 480 lines, otherwise PAL bottom-top order). | ||
| 1358 | */ | ||
| 1359 | if (sdformat->format.field == V4L2_FIELD_ALTERNATE) { | ||
| 1360 | sdformat->format.field = (infmt->height == 480) ? | ||
| 1361 | V4L2_FIELD_SEQ_TB : V4L2_FIELD_SEQ_BT; | ||
| 1362 | } | ||
| 1363 | 1448 | ||
| 1364 | /* propagate colorimetry from sink */ | 1449 | /* propagate colorimetry from sink */ |
| 1365 | sdformat->format.colorspace = infmt->colorspace; | 1450 | sdformat->format.colorspace = infmt->colorspace; |
| 1366 | sdformat->format.xfer_func = infmt->xfer_func; | 1451 | sdformat->format.xfer_func = infmt->xfer_func; |
| 1367 | sdformat->format.quantization = infmt->quantization; | 1452 | sdformat->format.quantization = infmt->quantization; |
| 1368 | sdformat->format.ycbcr_enc = infmt->ycbcr_enc; | 1453 | sdformat->format.ycbcr_enc = infmt->ycbcr_enc; |
| 1454 | |||
| 1369 | break; | 1455 | break; |
| 1370 | case CSI_SINK_PAD: | 1456 | case CSI_SINK_PAD: |
| 1371 | v4l_bound_align_image(&sdformat->format.width, MIN_W, MAX_W, | 1457 | v4l_bound_align_image(&sdformat->format.width, MIN_W, MAX_W, |
| 1372 | W_ALIGN, &sdformat->format.height, | 1458 | W_ALIGN, &sdformat->format.height, |
| 1373 | MIN_H, MAX_H, H_ALIGN, S_ALIGN); | 1459 | MIN_H, MAX_H, H_ALIGN, S_ALIGN); |
| 1374 | 1460 | ||
| 1375 | /* Reset crop and compose rectangles */ | ||
| 1376 | crop->left = 0; | ||
| 1377 | crop->top = 0; | ||
| 1378 | crop->width = sdformat->format.width; | ||
| 1379 | crop->height = sdformat->format.height; | ||
| 1380 | csi_try_crop(priv, crop, cfg, &sdformat->format, upstream_ep); | ||
| 1381 | compose->left = 0; | ||
| 1382 | compose->top = 0; | ||
| 1383 | compose->width = crop->width; | ||
| 1384 | compose->height = crop->height; | ||
| 1385 | |||
| 1386 | *cc = imx_media_find_mbus_format(sdformat->format.code, | 1461 | *cc = imx_media_find_mbus_format(sdformat->format.code, |
| 1387 | CS_SEL_ANY, true); | 1462 | CS_SEL_ANY, true); |
| 1388 | if (!*cc) { | 1463 | if (!*cc) { |
| @@ -1393,9 +1468,25 @@ static void csi_try_fmt(struct csi_priv *priv, | |||
| 1393 | sdformat->format.code = (*cc)->codes[0]; | 1468 | sdformat->format.code = (*cc)->codes[0]; |
| 1394 | } | 1469 | } |
| 1395 | 1470 | ||
| 1471 | csi_try_field(priv, cfg, sdformat); | ||
| 1472 | |||
| 1396 | imx_media_fill_default_mbus_fields( | 1473 | imx_media_fill_default_mbus_fields( |
| 1397 | &sdformat->format, infmt, | 1474 | &sdformat->format, infmt, |
| 1398 | priv->active_output_pad == CSI_SRC_PAD_DIRECT); | 1475 | priv->active_output_pad == CSI_SRC_PAD_DIRECT); |
| 1476 | |||
| 1477 | /* Reset crop and compose rectangles */ | ||
| 1478 | crop->left = 0; | ||
| 1479 | crop->top = 0; | ||
| 1480 | crop->width = sdformat->format.width; | ||
| 1481 | crop->height = sdformat->format.height; | ||
| 1482 | if (sdformat->format.field == V4L2_FIELD_ALTERNATE) | ||
| 1483 | crop->height *= 2; | ||
| 1484 | csi_try_crop(priv, crop, cfg, &sdformat->format, upstream_ep); | ||
| 1485 | compose->left = 0; | ||
| 1486 | compose->top = 0; | ||
| 1487 | compose->width = crop->width; | ||
| 1488 | compose->height = crop->height; | ||
| 1489 | |||
| 1399 | break; | 1490 | break; |
| 1400 | } | 1491 | } |
| 1401 | } | 1492 | } |
| @@ -1411,6 +1502,7 @@ static int csi_set_fmt(struct v4l2_subdev *sd, | |||
| 1411 | struct v4l2_pix_format vdev_fmt; | 1502 | struct v4l2_pix_format vdev_fmt; |
| 1412 | struct v4l2_mbus_framefmt *fmt; | 1503 | struct v4l2_mbus_framefmt *fmt; |
| 1413 | struct v4l2_rect *crop, *compose; | 1504 | struct v4l2_rect *crop, *compose; |
| 1505 | struct v4l2_rect vdev_compose; | ||
| 1414 | int ret; | 1506 | int ret; |
| 1415 | 1507 | ||
| 1416 | if (sdformat->pad >= CSI_NUM_PADS) | 1508 | if (sdformat->pad >= CSI_NUM_PADS) |
| @@ -1466,11 +1558,11 @@ static int csi_set_fmt(struct v4l2_subdev *sd, | |||
| 1466 | priv->cc[sdformat->pad] = cc; | 1558 | priv->cc[sdformat->pad] = cc; |
| 1467 | 1559 | ||
| 1468 | /* propagate IDMAC output pad format to capture device */ | 1560 | /* propagate IDMAC output pad format to capture device */ |
| 1469 | imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, | 1561 | imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, &vdev_compose, |
| 1470 | &priv->format_mbus[CSI_SRC_PAD_IDMAC], | 1562 | &priv->format_mbus[CSI_SRC_PAD_IDMAC], |
| 1471 | priv->cc[CSI_SRC_PAD_IDMAC]); | 1563 | priv->cc[CSI_SRC_PAD_IDMAC]); |
| 1472 | mutex_unlock(&priv->lock); | 1564 | mutex_unlock(&priv->lock); |
| 1473 | imx_media_capture_device_set_format(vdev, &vdev_fmt); | 1565 | imx_media_capture_device_set_format(vdev, &vdev_fmt, &vdev_compose); |
| 1474 | 1566 | ||
| 1475 | return 0; | 1567 | return 0; |
| 1476 | out: | 1568 | out: |
| @@ -1502,6 +1594,8 @@ static int csi_get_selection(struct v4l2_subdev *sd, | |||
| 1502 | sel->r.top = 0; | 1594 | sel->r.top = 0; |
| 1503 | sel->r.width = infmt->width; | 1595 | sel->r.width = infmt->width; |
| 1504 | sel->r.height = infmt->height; | 1596 | sel->r.height = infmt->height; |
| 1597 | if (infmt->field == V4L2_FIELD_ALTERNATE) | ||
| 1598 | sel->r.height *= 2; | ||
| 1505 | break; | 1599 | break; |
| 1506 | case V4L2_SEL_TGT_CROP: | 1600 | case V4L2_SEL_TGT_CROP: |
| 1507 | sel->r = *crop; | 1601 | sel->r = *crop; |
| @@ -1787,7 +1881,7 @@ static int imx_csi_parse_endpoint(struct device *dev, | |||
| 1787 | struct v4l2_fwnode_endpoint *vep, | 1881 | struct v4l2_fwnode_endpoint *vep, |
| 1788 | struct v4l2_async_subdev *asd) | 1882 | struct v4l2_async_subdev *asd) |
| 1789 | { | 1883 | { |
| 1790 | return fwnode_device_is_available(asd->match.fwnode) ? 0 : -EINVAL; | 1884 | return fwnode_device_is_available(asd->match.fwnode) ? 0 : -ENOTCONN; |
| 1791 | } | 1885 | } |
| 1792 | 1886 | ||
| 1793 | static int imx_csi_async_register(struct csi_priv *priv) | 1887 | static int imx_csi_async_register(struct csi_priv *priv) |
| @@ -1864,6 +1958,8 @@ static int imx_csi_probe(struct platform_device *pdev) | |||
| 1864 | priv->csi_id = pdata->csi; | 1958 | priv->csi_id = pdata->csi; |
| 1865 | priv->smfc_id = (priv->csi_id == 0) ? 0 : 2; | 1959 | priv->smfc_id = (priv->csi_id == 0) ? 0 : 2; |
| 1866 | 1960 | ||
| 1961 | priv->active_output_pad = CSI_SRC_PAD_IDMAC; | ||
| 1962 | |||
| 1867 | timer_setup(&priv->eof_timeout_timer, csi_idmac_eof_timeout, 0); | 1963 | timer_setup(&priv->eof_timeout_timer, csi_idmac_eof_timeout, 0); |
| 1868 | spin_lock_init(&priv->irqlock); | 1964 | spin_lock_init(&priv->irqlock); |
| 1869 | 1965 | ||
| @@ -1877,7 +1973,7 @@ static int imx_csi_probe(struct platform_device *pdev) | |||
| 1877 | priv->sd.owner = THIS_MODULE; | 1973 | priv->sd.owner = THIS_MODULE; |
| 1878 | priv->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; | 1974 | priv->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; |
| 1879 | priv->sd.grp_id = priv->csi_id ? | 1975 | priv->sd.grp_id = priv->csi_id ? |
| 1880 | IMX_MEDIA_GRP_ID_CSI1 : IMX_MEDIA_GRP_ID_CSI0; | 1976 | IMX_MEDIA_GRP_ID_IPU_CSI1 : IMX_MEDIA_GRP_ID_IPU_CSI0; |
| 1881 | imx_media_grp_id_to_sd_name(priv->sd.name, sizeof(priv->sd.name), | 1977 | imx_media_grp_id_to_sd_name(priv->sd.name, sizeof(priv->sd.name), |
| 1882 | priv->sd.grp_id, ipu_get_num(priv->ipu)); | 1978 | priv->sd.grp_id, ipu_get_num(priv->ipu)); |
| 1883 | 1979 | ||
diff --git a/drivers/staging/media/imx/imx-media-dev-common.c b/drivers/staging/media/imx/imx-media-dev-common.c new file mode 100644 index 000000000000..910594125889 --- /dev/null +++ b/drivers/staging/media/imx/imx-media-dev-common.c | |||
| @@ -0,0 +1,90 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* | ||
| 3 | * V4L2 Media Controller Driver for Freescale common i.MX5/6/7 SOC | ||
| 4 | * | ||
| 5 | * Copyright (c) 2019 Linaro Ltd | ||
| 6 | * Copyright (c) 2016 Mentor Graphics Inc. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/of_graph.h> | ||
| 10 | #include <linux/of_platform.h> | ||
| 11 | #include "imx-media.h" | ||
| 12 | |||
| 13 | static const struct v4l2_async_notifier_operations imx_media_subdev_ops = { | ||
| 14 | .bound = imx_media_subdev_bound, | ||
| 15 | .complete = imx_media_probe_complete, | ||
| 16 | }; | ||
| 17 | |||
| 18 | static const struct media_device_ops imx_media_md_ops = { | ||
| 19 | .link_notify = imx_media_link_notify, | ||
| 20 | }; | ||
| 21 | |||
| 22 | struct imx_media_dev *imx_media_dev_init(struct device *dev) | ||
| 23 | { | ||
| 24 | struct imx_media_dev *imxmd; | ||
| 25 | int ret; | ||
| 26 | |||
| 27 | imxmd = devm_kzalloc(dev, sizeof(*imxmd), GFP_KERNEL); | ||
| 28 | if (!imxmd) | ||
| 29 | return ERR_PTR(-ENOMEM); | ||
| 30 | |||
| 31 | dev_set_drvdata(dev, imxmd); | ||
| 32 | |||
| 33 | strlcpy(imxmd->md.model, "imx-media", sizeof(imxmd->md.model)); | ||
| 34 | imxmd->md.ops = &imx_media_md_ops; | ||
| 35 | imxmd->md.dev = dev; | ||
| 36 | |||
| 37 | mutex_init(&imxmd->mutex); | ||
| 38 | |||
| 39 | imxmd->v4l2_dev.mdev = &imxmd->md; | ||
| 40 | imxmd->v4l2_dev.notify = imx_media_notify; | ||
| 41 | strlcpy(imxmd->v4l2_dev.name, "imx-media", | ||
| 42 | sizeof(imxmd->v4l2_dev.name)); | ||
| 43 | |||
| 44 | media_device_init(&imxmd->md); | ||
| 45 | |||
| 46 | ret = v4l2_device_register(dev, &imxmd->v4l2_dev); | ||
| 47 | if (ret < 0) { | ||
| 48 | v4l2_err(&imxmd->v4l2_dev, | ||
| 49 | "Failed to register v4l2_device: %d\n", ret); | ||
| 50 | goto cleanup; | ||
| 51 | } | ||
| 52 | |||
| 53 | dev_set_drvdata(imxmd->v4l2_dev.dev, imxmd); | ||
| 54 | |||
| 55 | INIT_LIST_HEAD(&imxmd->vdev_list); | ||
| 56 | |||
| 57 | v4l2_async_notifier_init(&imxmd->notifier); | ||
| 58 | |||
| 59 | return imxmd; | ||
| 60 | |||
| 61 | cleanup: | ||
| 62 | media_device_cleanup(&imxmd->md); | ||
| 63 | |||
| 64 | return ERR_PTR(ret); | ||
| 65 | } | ||
| 66 | EXPORT_SYMBOL_GPL(imx_media_dev_init); | ||
| 67 | |||
| 68 | int imx_media_dev_notifier_register(struct imx_media_dev *imxmd) | ||
| 69 | { | ||
| 70 | int ret; | ||
| 71 | |||
| 72 | /* no subdevs? just bail */ | ||
| 73 | if (list_empty(&imxmd->notifier.asd_list)) { | ||
| 74 | v4l2_err(&imxmd->v4l2_dev, "no subdevs\n"); | ||
| 75 | return -ENODEV; | ||
| 76 | } | ||
| 77 | |||
| 78 | /* prepare the async subdev notifier and register it */ | ||
| 79 | imxmd->notifier.ops = &imx_media_subdev_ops; | ||
| 80 | ret = v4l2_async_notifier_register(&imxmd->v4l2_dev, | ||
| 81 | &imxmd->notifier); | ||
| 82 | if (ret) { | ||
| 83 | v4l2_err(&imxmd->v4l2_dev, | ||
| 84 | "v4l2_async_notifier_register failed with %d\n", ret); | ||
| 85 | return ret; | ||
| 86 | } | ||
| 87 | |||
| 88 | return 0; | ||
| 89 | } | ||
| 90 | EXPORT_SYMBOL_GPL(imx_media_dev_notifier_register); | ||
diff --git a/drivers/staging/media/imx/imx-media-dev.c b/drivers/staging/media/imx/imx-media-dev.c index 4b344a4a3706..28a3d23aad5b 100644 --- a/drivers/staging/media/imx/imx-media-dev.c +++ b/drivers/staging/media/imx/imx-media-dev.c | |||
| @@ -116,16 +116,16 @@ static int imx_media_get_ipu(struct imx_media_dev *imxmd, | |||
| 116 | } | 116 | } |
| 117 | 117 | ||
| 118 | /* async subdev bound notifier */ | 118 | /* async subdev bound notifier */ |
| 119 | static int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, | 119 | int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, |
| 120 | struct v4l2_subdev *sd, | 120 | struct v4l2_subdev *sd, |
| 121 | struct v4l2_async_subdev *asd) | 121 | struct v4l2_async_subdev *asd) |
| 122 | { | 122 | { |
| 123 | struct imx_media_dev *imxmd = notifier2dev(notifier); | 123 | struct imx_media_dev *imxmd = notifier2dev(notifier); |
| 124 | int ret = 0; | 124 | int ret = 0; |
| 125 | 125 | ||
| 126 | mutex_lock(&imxmd->mutex); | 126 | mutex_lock(&imxmd->mutex); |
| 127 | 127 | ||
| 128 | if (sd->grp_id & IMX_MEDIA_GRP_ID_CSI) { | 128 | if (sd->grp_id & IMX_MEDIA_GRP_ID_IPU_CSI) { |
| 129 | ret = imx_media_get_ipu(imxmd, sd); | 129 | ret = imx_media_get_ipu(imxmd, sd); |
| 130 | if (ret) | 130 | if (ret) |
| 131 | goto out; | 131 | goto out; |
| @@ -149,13 +149,13 @@ static int imx_media_create_links(struct v4l2_async_notifier *notifier) | |||
| 149 | 149 | ||
| 150 | list_for_each_entry(sd, &imxmd->v4l2_dev.subdevs, list) { | 150 | list_for_each_entry(sd, &imxmd->v4l2_dev.subdevs, list) { |
| 151 | switch (sd->grp_id) { | 151 | switch (sd->grp_id) { |
| 152 | case IMX_MEDIA_GRP_ID_VDIC: | 152 | case IMX_MEDIA_GRP_ID_IPU_VDIC: |
| 153 | case IMX_MEDIA_GRP_ID_IC_PRP: | 153 | case IMX_MEDIA_GRP_ID_IPU_IC_PRP: |
| 154 | case IMX_MEDIA_GRP_ID_IC_PRPENC: | 154 | case IMX_MEDIA_GRP_ID_IPU_IC_PRPENC: |
| 155 | case IMX_MEDIA_GRP_ID_IC_PRPVF: | 155 | case IMX_MEDIA_GRP_ID_IPU_IC_PRPVF: |
| 156 | case IMX_MEDIA_GRP_ID_CSI0: | 156 | case IMX_MEDIA_GRP_ID_IPU_CSI0: |
| 157 | case IMX_MEDIA_GRP_ID_CSI1: | 157 | case IMX_MEDIA_GRP_ID_IPU_CSI1: |
| 158 | ret = imx_media_create_internal_links(imxmd, sd); | 158 | ret = imx_media_create_ipu_internal_links(imxmd, sd); |
| 159 | if (ret) | 159 | if (ret) |
| 160 | return ret; | 160 | return ret; |
| 161 | /* | 161 | /* |
| @@ -163,9 +163,13 @@ static int imx_media_create_links(struct v4l2_async_notifier *notifier) | |||
| 163 | * internal entities, so create the external links | 163 | * internal entities, so create the external links |
| 164 | * to the CSI sink pads. | 164 | * to the CSI sink pads. |
| 165 | */ | 165 | */ |
| 166 | if (sd->grp_id & IMX_MEDIA_GRP_ID_CSI) | 166 | if (sd->grp_id & IMX_MEDIA_GRP_ID_IPU_CSI) |
| 167 | imx_media_create_csi_of_links(imxmd, sd); | 167 | imx_media_create_csi_of_links(imxmd, sd); |
| 168 | break; | 168 | break; |
| 169 | case IMX_MEDIA_GRP_ID_CSI: | ||
| 170 | imx_media_create_csi_of_links(imxmd, sd); | ||
| 171 | |||
| 172 | break; | ||
| 169 | default: | 173 | default: |
| 170 | /* | 174 | /* |
| 171 | * if this subdev has fwnode links, create media | 175 | * if this subdev has fwnode links, create media |
| @@ -302,7 +306,7 @@ static int imx_media_create_pad_vdev_lists(struct imx_media_dev *imxmd) | |||
| 302 | } | 306 | } |
| 303 | 307 | ||
| 304 | /* async subdev complete notifier */ | 308 | /* async subdev complete notifier */ |
| 305 | static int imx_media_probe_complete(struct v4l2_async_notifier *notifier) | 309 | int imx_media_probe_complete(struct v4l2_async_notifier *notifier) |
| 306 | { | 310 | { |
| 307 | struct imx_media_dev *imxmd = notifier2dev(notifier); | 311 | struct imx_media_dev *imxmd = notifier2dev(notifier); |
| 308 | int ret; | 312 | int ret; |
| @@ -326,11 +330,6 @@ unlock: | |||
| 326 | return media_device_register(&imxmd->md); | 330 | return media_device_register(&imxmd->md); |
| 327 | } | 331 | } |
| 328 | 332 | ||
| 329 | static const struct v4l2_async_notifier_operations imx_media_subdev_ops = { | ||
| 330 | .bound = imx_media_subdev_bound, | ||
| 331 | .complete = imx_media_probe_complete, | ||
| 332 | }; | ||
| 333 | |||
| 334 | /* | 333 | /* |
| 335 | * adds controls to a video device from an entity subdevice. | 334 | * adds controls to a video device from an entity subdevice. |
| 336 | * Continues upstream from the entity's sink pads. | 335 | * Continues upstream from the entity's sink pads. |
| @@ -374,8 +373,8 @@ static int imx_media_inherit_controls(struct imx_media_dev *imxmd, | |||
| 374 | return ret; | 373 | return ret; |
| 375 | } | 374 | } |
| 376 | 375 | ||
| 377 | static int imx_media_link_notify(struct media_link *link, u32 flags, | 376 | int imx_media_link_notify(struct media_link *link, u32 flags, |
| 378 | unsigned int notification) | 377 | unsigned int notification) |
| 379 | { | 378 | { |
| 380 | struct media_entity *source = link->source->entity; | 379 | struct media_entity *source = link->source->entity; |
| 381 | struct imx_media_pad_vdev *pad_vdev; | 380 | struct imx_media_pad_vdev *pad_vdev; |
| @@ -438,9 +437,27 @@ static int imx_media_link_notify(struct media_link *link, u32 flags, | |||
| 438 | return ret; | 437 | return ret; |
| 439 | } | 438 | } |
| 440 | 439 | ||
| 441 | static const struct media_device_ops imx_media_md_ops = { | 440 | void imx_media_notify(struct v4l2_subdev *sd, unsigned int notification, |
| 442 | .link_notify = imx_media_link_notify, | 441 | void *arg) |
| 443 | }; | 442 | { |
| 443 | struct media_entity *entity = &sd->entity; | ||
| 444 | int i; | ||
| 445 | |||
| 446 | if (notification != V4L2_DEVICE_NOTIFY_EVENT) | ||
| 447 | return; | ||
| 448 | |||
| 449 | for (i = 0; i < entity->num_pads; i++) { | ||
| 450 | struct media_pad *pad = &entity->pads[i]; | ||
| 451 | struct imx_media_pad_vdev *pad_vdev; | ||
| 452 | struct list_head *pad_vdev_list; | ||
| 453 | |||
| 454 | pad_vdev_list = to_pad_vdev_list(sd, pad->index); | ||
| 455 | if (!pad_vdev_list) | ||
| 456 | continue; | ||
| 457 | list_for_each_entry(pad_vdev, pad_vdev_list, list) | ||
| 458 | v4l2_event_queue(pad_vdev->vdev->vfd, arg); | ||
| 459 | } | ||
| 460 | } | ||
| 444 | 461 | ||
| 445 | static int imx_media_probe(struct platform_device *pdev) | 462 | static int imx_media_probe(struct platform_device *pdev) |
| 446 | { | 463 | { |
| @@ -449,76 +466,37 @@ static int imx_media_probe(struct platform_device *pdev) | |||
| 449 | struct imx_media_dev *imxmd; | 466 | struct imx_media_dev *imxmd; |
| 450 | int ret; | 467 | int ret; |
| 451 | 468 | ||
| 452 | imxmd = devm_kzalloc(dev, sizeof(*imxmd), GFP_KERNEL); | 469 | imxmd = imx_media_dev_init(dev); |
| 453 | if (!imxmd) | 470 | if (IS_ERR(imxmd)) |
| 454 | return -ENOMEM; | 471 | return PTR_ERR(imxmd); |
| 455 | |||
| 456 | dev_set_drvdata(dev, imxmd); | ||
| 457 | |||
| 458 | strscpy(imxmd->md.model, "imx-media", sizeof(imxmd->md.model)); | ||
| 459 | imxmd->md.ops = &imx_media_md_ops; | ||
| 460 | imxmd->md.dev = dev; | ||
| 461 | |||
| 462 | mutex_init(&imxmd->mutex); | ||
| 463 | |||
| 464 | imxmd->v4l2_dev.mdev = &imxmd->md; | ||
| 465 | strscpy(imxmd->v4l2_dev.name, "imx-media", | ||
| 466 | sizeof(imxmd->v4l2_dev.name)); | ||
| 467 | |||
| 468 | media_device_init(&imxmd->md); | ||
| 469 | |||
| 470 | ret = v4l2_device_register(dev, &imxmd->v4l2_dev); | ||
| 471 | if (ret < 0) { | ||
| 472 | v4l2_err(&imxmd->v4l2_dev, | ||
| 473 | "Failed to register v4l2_device: %d\n", ret); | ||
| 474 | goto cleanup; | ||
| 475 | } | ||
| 476 | |||
| 477 | dev_set_drvdata(imxmd->v4l2_dev.dev, imxmd); | ||
| 478 | |||
| 479 | INIT_LIST_HEAD(&imxmd->vdev_list); | ||
| 480 | |||
| 481 | v4l2_async_notifier_init(&imxmd->notifier); | ||
| 482 | 472 | ||
| 483 | ret = imx_media_add_of_subdevs(imxmd, node); | 473 | ret = imx_media_add_of_subdevs(imxmd, node); |
| 484 | if (ret) { | 474 | if (ret) { |
| 485 | v4l2_err(&imxmd->v4l2_dev, | 475 | v4l2_err(&imxmd->v4l2_dev, |
| 486 | "add_of_subdevs failed with %d\n", ret); | 476 | "add_of_subdevs failed with %d\n", ret); |
| 487 | goto notifier_cleanup; | 477 | goto cleanup; |
| 488 | } | 478 | } |
| 489 | 479 | ||
| 490 | ret = imx_media_add_internal_subdevs(imxmd); | 480 | ret = imx_media_add_internal_subdevs(imxmd); |
| 491 | if (ret) { | 481 | if (ret) { |
| 492 | v4l2_err(&imxmd->v4l2_dev, | 482 | v4l2_err(&imxmd->v4l2_dev, |
| 493 | "add_internal_subdevs failed with %d\n", ret); | 483 | "add_internal_subdevs failed with %d\n", ret); |
| 494 | goto notifier_cleanup; | 484 | goto cleanup; |
| 495 | } | ||
| 496 | |||
| 497 | /* no subdevs? just bail */ | ||
| 498 | if (list_empty(&imxmd->notifier.asd_list)) { | ||
| 499 | ret = -ENODEV; | ||
| 500 | goto notifier_cleanup; | ||
| 501 | } | 485 | } |
| 502 | 486 | ||
| 503 | /* prepare the async subdev notifier and register it */ | 487 | ret = imx_media_dev_notifier_register(imxmd); |
| 504 | imxmd->notifier.ops = &imx_media_subdev_ops; | 488 | if (ret) |
| 505 | ret = v4l2_async_notifier_register(&imxmd->v4l2_dev, | ||
| 506 | &imxmd->notifier); | ||
| 507 | if (ret) { | ||
| 508 | v4l2_err(&imxmd->v4l2_dev, | ||
| 509 | "v4l2_async_notifier_register failed with %d\n", ret); | ||
| 510 | goto del_int; | 489 | goto del_int; |
| 511 | } | ||
| 512 | 490 | ||
| 513 | return 0; | 491 | return 0; |
| 514 | 492 | ||
| 515 | del_int: | 493 | del_int: |
| 516 | imx_media_remove_internal_subdevs(imxmd); | 494 | imx_media_remove_internal_subdevs(imxmd); |
| 517 | notifier_cleanup: | 495 | cleanup: |
| 518 | v4l2_async_notifier_cleanup(&imxmd->notifier); | 496 | v4l2_async_notifier_cleanup(&imxmd->notifier); |
| 519 | v4l2_device_unregister(&imxmd->v4l2_dev); | 497 | v4l2_device_unregister(&imxmd->v4l2_dev); |
| 520 | cleanup: | ||
| 521 | media_device_cleanup(&imxmd->md); | 498 | media_device_cleanup(&imxmd->md); |
| 499 | |||
| 522 | return ret; | 500 | return ret; |
| 523 | } | 501 | } |
| 524 | 502 | ||
| @@ -532,8 +510,8 @@ static int imx_media_remove(struct platform_device *pdev) | |||
| 532 | v4l2_async_notifier_unregister(&imxmd->notifier); | 510 | v4l2_async_notifier_unregister(&imxmd->notifier); |
| 533 | imx_media_remove_internal_subdevs(imxmd); | 511 | imx_media_remove_internal_subdevs(imxmd); |
| 534 | v4l2_async_notifier_cleanup(&imxmd->notifier); | 512 | v4l2_async_notifier_cleanup(&imxmd->notifier); |
| 535 | v4l2_device_unregister(&imxmd->v4l2_dev); | ||
| 536 | media_device_unregister(&imxmd->md); | 513 | media_device_unregister(&imxmd->md); |
| 514 | v4l2_device_unregister(&imxmd->v4l2_dev); | ||
| 537 | media_device_cleanup(&imxmd->md); | 515 | media_device_cleanup(&imxmd->md); |
| 538 | 516 | ||
| 539 | return 0; | 517 | return 0; |
diff --git a/drivers/staging/media/imx/imx-media-internal-sd.c b/drivers/staging/media/imx/imx-media-internal-sd.c index 0fdc45dbfb76..5e10d95e5529 100644 --- a/drivers/staging/media/imx/imx-media-internal-sd.c +++ b/drivers/staging/media/imx/imx-media-internal-sd.c | |||
| @@ -30,32 +30,32 @@ static const struct internal_subdev_id { | |||
| 30 | } isd_id[num_isd] = { | 30 | } isd_id[num_isd] = { |
| 31 | [isd_csi0] = { | 31 | [isd_csi0] = { |
| 32 | .index = isd_csi0, | 32 | .index = isd_csi0, |
| 33 | .grp_id = IMX_MEDIA_GRP_ID_CSI0, | 33 | .grp_id = IMX_MEDIA_GRP_ID_IPU_CSI0, |
| 34 | .name = "imx-ipuv3-csi", | 34 | .name = "imx-ipuv3-csi", |
| 35 | }, | 35 | }, |
| 36 | [isd_csi1] = { | 36 | [isd_csi1] = { |
| 37 | .index = isd_csi1, | 37 | .index = isd_csi1, |
| 38 | .grp_id = IMX_MEDIA_GRP_ID_CSI1, | 38 | .grp_id = IMX_MEDIA_GRP_ID_IPU_CSI1, |
| 39 | .name = "imx-ipuv3-csi", | 39 | .name = "imx-ipuv3-csi", |
| 40 | }, | 40 | }, |
| 41 | [isd_vdic] = { | 41 | [isd_vdic] = { |
| 42 | .index = isd_vdic, | 42 | .index = isd_vdic, |
| 43 | .grp_id = IMX_MEDIA_GRP_ID_VDIC, | 43 | .grp_id = IMX_MEDIA_GRP_ID_IPU_VDIC, |
| 44 | .name = "imx-ipuv3-vdic", | 44 | .name = "imx-ipuv3-vdic", |
| 45 | }, | 45 | }, |
| 46 | [isd_ic_prp] = { | 46 | [isd_ic_prp] = { |
| 47 | .index = isd_ic_prp, | 47 | .index = isd_ic_prp, |
| 48 | .grp_id = IMX_MEDIA_GRP_ID_IC_PRP, | 48 | .grp_id = IMX_MEDIA_GRP_ID_IPU_IC_PRP, |
| 49 | .name = "imx-ipuv3-ic", | 49 | .name = "imx-ipuv3-ic", |
| 50 | }, | 50 | }, |
| 51 | [isd_ic_prpenc] = { | 51 | [isd_ic_prpenc] = { |
| 52 | .index = isd_ic_prpenc, | 52 | .index = isd_ic_prpenc, |
| 53 | .grp_id = IMX_MEDIA_GRP_ID_IC_PRPENC, | 53 | .grp_id = IMX_MEDIA_GRP_ID_IPU_IC_PRPENC, |
| 54 | .name = "imx-ipuv3-ic", | 54 | .name = "imx-ipuv3-ic", |
| 55 | }, | 55 | }, |
| 56 | [isd_ic_prpvf] = { | 56 | [isd_ic_prpvf] = { |
| 57 | .index = isd_ic_prpvf, | 57 | .index = isd_ic_prpvf, |
| 58 | .grp_id = IMX_MEDIA_GRP_ID_IC_PRPVF, | 58 | .grp_id = IMX_MEDIA_GRP_ID_IPU_IC_PRPVF, |
| 59 | .name = "imx-ipuv3-ic", | 59 | .name = "imx-ipuv3-ic", |
| 60 | }, | 60 | }, |
| 61 | }; | 61 | }; |
| @@ -229,8 +229,8 @@ static int create_ipu_internal_link(struct imx_media_dev *imxmd, | |||
| 229 | return ret; | 229 | return ret; |
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | int imx_media_create_internal_links(struct imx_media_dev *imxmd, | 232 | int imx_media_create_ipu_internal_links(struct imx_media_dev *imxmd, |
| 233 | struct v4l2_subdev *sd) | 233 | struct v4l2_subdev *sd) |
| 234 | { | 234 | { |
| 235 | const struct internal_subdev *intsd; | 235 | const struct internal_subdev *intsd; |
| 236 | const struct internal_pad *intpad; | 236 | const struct internal_pad *intpad; |
| @@ -312,8 +312,8 @@ static int add_ipu_internal_subdevs(struct imx_media_dev *imxmd, int ipu_id) | |||
| 312 | * of_parse_subdev(). | 312 | * of_parse_subdev(). |
| 313 | */ | 313 | */ |
| 314 | switch (isd->id->grp_id) { | 314 | switch (isd->id->grp_id) { |
| 315 | case IMX_MEDIA_GRP_ID_CSI0: | 315 | case IMX_MEDIA_GRP_ID_IPU_CSI0: |
| 316 | case IMX_MEDIA_GRP_ID_CSI1: | 316 | case IMX_MEDIA_GRP_ID_IPU_CSI1: |
| 317 | ret = 0; | 317 | ret = 0; |
| 318 | break; | 318 | break; |
| 319 | default: | 319 | default: |
diff --git a/drivers/staging/media/imx/imx-media-of.c b/drivers/staging/media/imx/imx-media-of.c index a01327f6e045..03446335ac03 100644 --- a/drivers/staging/media/imx/imx-media-of.c +++ b/drivers/staging/media/imx/imx-media-of.c | |||
| @@ -20,7 +20,8 @@ | |||
| 20 | #include <video/imx-ipu-v3.h> | 20 | #include <video/imx-ipu-v3.h> |
| 21 | #include "imx-media.h" | 21 | #include "imx-media.h" |
| 22 | 22 | ||
| 23 | static int of_add_csi(struct imx_media_dev *imxmd, struct device_node *csi_np) | 23 | int imx_media_of_add_csi(struct imx_media_dev *imxmd, |
| 24 | struct device_node *csi_np) | ||
| 24 | { | 25 | { |
| 25 | int ret; | 26 | int ret; |
| 26 | 27 | ||
| @@ -45,6 +46,7 @@ static int of_add_csi(struct imx_media_dev *imxmd, struct device_node *csi_np) | |||
| 45 | 46 | ||
| 46 | return 0; | 47 | return 0; |
| 47 | } | 48 | } |
| 49 | EXPORT_SYMBOL_GPL(imx_media_of_add_csi); | ||
| 48 | 50 | ||
| 49 | int imx_media_add_of_subdevs(struct imx_media_dev *imxmd, | 51 | int imx_media_add_of_subdevs(struct imx_media_dev *imxmd, |
| 50 | struct device_node *np) | 52 | struct device_node *np) |
| @@ -57,7 +59,7 @@ int imx_media_add_of_subdevs(struct imx_media_dev *imxmd, | |||
| 57 | if (!csi_np) | 59 | if (!csi_np) |
| 58 | break; | 60 | break; |
| 59 | 61 | ||
| 60 | ret = of_add_csi(imxmd, csi_np); | 62 | ret = imx_media_of_add_csi(imxmd, csi_np); |
| 61 | of_node_put(csi_np); | 63 | of_node_put(csi_np); |
| 62 | if (ret) | 64 | if (ret) |
| 63 | return ret; | 65 | return ret; |
diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 0eaa353d5cb3..1c63a2765a81 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c | |||
| @@ -577,9 +577,11 @@ void imx_media_fill_default_mbus_fields(struct v4l2_mbus_framefmt *tryfmt, | |||
| 577 | EXPORT_SYMBOL_GPL(imx_media_fill_default_mbus_fields); | 577 | EXPORT_SYMBOL_GPL(imx_media_fill_default_mbus_fields); |
| 578 | 578 | ||
| 579 | int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, | 579 | int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, |
| 580 | struct v4l2_mbus_framefmt *mbus, | 580 | struct v4l2_rect *compose, |
| 581 | const struct v4l2_mbus_framefmt *mbus, | ||
| 581 | const struct imx_media_pixfmt *cc) | 582 | const struct imx_media_pixfmt *cc) |
| 582 | { | 583 | { |
| 584 | u32 width; | ||
| 583 | u32 stride; | 585 | u32 stride; |
| 584 | 586 | ||
| 585 | if (!cc) { | 587 | if (!cc) { |
| @@ -602,9 +604,16 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, | |||
| 602 | cc = imx_media_find_mbus_format(code, CS_SEL_YUV, false); | 604 | cc = imx_media_find_mbus_format(code, CS_SEL_YUV, false); |
| 603 | } | 605 | } |
| 604 | 606 | ||
| 605 | stride = cc->planar ? mbus->width : (mbus->width * cc->bpp) >> 3; | 607 | /* Round up width for minimum burst size */ |
| 608 | width = round_up(mbus->width, 8); | ||
| 606 | 609 | ||
| 607 | pix->width = mbus->width; | 610 | /* Round up stride for IDMAC line start address alignment */ |
| 611 | if (cc->planar) | ||
| 612 | stride = round_up(width, 16); | ||
| 613 | else | ||
| 614 | stride = round_up((width * cc->bpp) >> 3, 8); | ||
| 615 | |||
| 616 | pix->width = width; | ||
| 608 | pix->height = mbus->height; | 617 | pix->height = mbus->height; |
| 609 | pix->pixelformat = cc->fourcc; | 618 | pix->pixelformat = cc->fourcc; |
| 610 | pix->colorspace = mbus->colorspace; | 619 | pix->colorspace = mbus->colorspace; |
| @@ -613,7 +622,19 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, | |||
| 613 | pix->quantization = mbus->quantization; | 622 | pix->quantization = mbus->quantization; |
| 614 | pix->field = mbus->field; | 623 | pix->field = mbus->field; |
| 615 | pix->bytesperline = stride; | 624 | pix->bytesperline = stride; |
| 616 | pix->sizeimage = (pix->width * pix->height * cc->bpp) >> 3; | 625 | pix->sizeimage = cc->planar ? ((stride * pix->height * cc->bpp) >> 3) : |
| 626 | stride * pix->height; | ||
| 627 | |||
| 628 | /* | ||
| 629 | * set capture compose rectangle, which is fixed to the | ||
| 630 | * source subdevice mbus format. | ||
| 631 | */ | ||
| 632 | if (compose) { | ||
| 633 | compose->left = 0; | ||
| 634 | compose->top = 0; | ||
| 635 | compose->width = mbus->width; | ||
| 636 | compose->height = mbus->height; | ||
| 637 | } | ||
| 617 | 638 | ||
| 618 | return 0; | 639 | return 0; |
| 619 | } | 640 | } |
| @@ -626,13 +647,11 @@ int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, | |||
| 626 | 647 | ||
| 627 | memset(image, 0, sizeof(*image)); | 648 | memset(image, 0, sizeof(*image)); |
| 628 | 649 | ||
| 629 | ret = imx_media_mbus_fmt_to_pix_fmt(&image->pix, mbus, NULL); | 650 | ret = imx_media_mbus_fmt_to_pix_fmt(&image->pix, &image->rect, |
| 651 | mbus, NULL); | ||
| 630 | if (ret) | 652 | if (ret) |
| 631 | return ret; | 653 | return ret; |
| 632 | 654 | ||
| 633 | image->rect.width = mbus->width; | ||
| 634 | image->rect.height = mbus->height; | ||
| 635 | |||
| 636 | return 0; | 655 | return 0; |
| 637 | } | 656 | } |
| 638 | EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_ipu_image); | 657 | EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_ipu_image); |
| @@ -696,20 +715,20 @@ void imx_media_grp_id_to_sd_name(char *sd_name, int sz, u32 grp_id, int ipu_id) | |||
| 696 | int id; | 715 | int id; |
| 697 | 716 | ||
| 698 | switch (grp_id) { | 717 | switch (grp_id) { |
| 699 | case IMX_MEDIA_GRP_ID_CSI0...IMX_MEDIA_GRP_ID_CSI1: | 718 | case IMX_MEDIA_GRP_ID_IPU_CSI0...IMX_MEDIA_GRP_ID_IPU_CSI1: |
| 700 | id = (grp_id >> IMX_MEDIA_GRP_ID_CSI_BIT) - 1; | 719 | id = (grp_id >> IMX_MEDIA_GRP_ID_IPU_CSI_BIT) - 1; |
| 701 | snprintf(sd_name, sz, "ipu%d_csi%d", ipu_id + 1, id); | 720 | snprintf(sd_name, sz, "ipu%d_csi%d", ipu_id + 1, id); |
| 702 | break; | 721 | break; |
| 703 | case IMX_MEDIA_GRP_ID_VDIC: | 722 | case IMX_MEDIA_GRP_ID_IPU_VDIC: |
| 704 | snprintf(sd_name, sz, "ipu%d_vdic", ipu_id + 1); | 723 | snprintf(sd_name, sz, "ipu%d_vdic", ipu_id + 1); |
| 705 | break; | 724 | break; |
| 706 | case IMX_MEDIA_GRP_ID_IC_PRP: | 725 | case IMX_MEDIA_GRP_ID_IPU_IC_PRP: |
| 707 | snprintf(sd_name, sz, "ipu%d_ic_prp", ipu_id + 1); | 726 | snprintf(sd_name, sz, "ipu%d_ic_prp", ipu_id + 1); |
| 708 | break; | 727 | break; |
| 709 | case IMX_MEDIA_GRP_ID_IC_PRPENC: | 728 | case IMX_MEDIA_GRP_ID_IPU_IC_PRPENC: |
| 710 | snprintf(sd_name, sz, "ipu%d_ic_prpenc", ipu_id + 1); | 729 | snprintf(sd_name, sz, "ipu%d_ic_prpenc", ipu_id + 1); |
| 711 | break; | 730 | break; |
| 712 | case IMX_MEDIA_GRP_ID_IC_PRPVF: | 731 | case IMX_MEDIA_GRP_ID_IPU_IC_PRPVF: |
| 713 | snprintf(sd_name, sz, "ipu%d_ic_prpvf", ipu_id + 1); | 732 | snprintf(sd_name, sz, "ipu%d_ic_prpvf", ipu_id + 1); |
| 714 | break; | 733 | break; |
| 715 | default: | 734 | default: |
diff --git a/drivers/staging/media/imx/imx-media-vdic.c b/drivers/staging/media/imx/imx-media-vdic.c index 482250d47e7c..2808662e2597 100644 --- a/drivers/staging/media/imx/imx-media-vdic.c +++ b/drivers/staging/media/imx/imx-media-vdic.c | |||
| @@ -219,26 +219,18 @@ static void __maybe_unused prepare_vdi_in_buffers(struct vdic_priv *priv, | |||
| 219 | 219 | ||
| 220 | switch (priv->fieldtype) { | 220 | switch (priv->fieldtype) { |
| 221 | case V4L2_FIELD_SEQ_TB: | 221 | case V4L2_FIELD_SEQ_TB: |
| 222 | prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0); | ||
| 223 | curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + fs; | ||
| 224 | next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); | ||
| 225 | break; | ||
| 226 | case V4L2_FIELD_SEQ_BT: | 222 | case V4L2_FIELD_SEQ_BT: |
| 227 | prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0) + fs; | 223 | prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0) + fs; |
| 228 | curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); | 224 | curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); |
| 229 | next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + fs; | 225 | next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + fs; |
| 230 | break; | 226 | break; |
| 227 | case V4L2_FIELD_INTERLACED_TB: | ||
| 231 | case V4L2_FIELD_INTERLACED_BT: | 228 | case V4L2_FIELD_INTERLACED_BT: |
| 229 | case V4L2_FIELD_INTERLACED: | ||
| 232 | prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0) + is; | 230 | prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0) + is; |
| 233 | curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); | 231 | curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); |
| 234 | next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + is; | 232 | next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + is; |
| 235 | break; | 233 | break; |
| 236 | default: | ||
| 237 | /* assume V4L2_FIELD_INTERLACED_TB */ | ||
| 238 | prev_phys = vb2_dma_contig_plane_dma_addr(prev_vb, 0); | ||
| 239 | curr_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0) + is; | ||
| 240 | next_phys = vb2_dma_contig_plane_dma_addr(curr_vb, 0); | ||
| 241 | break; | ||
| 242 | } | 234 | } |
| 243 | 235 | ||
| 244 | ipu_cpmem_set_buffer(priv->vdi_in_ch_p, 0, prev_phys); | 236 | ipu_cpmem_set_buffer(priv->vdi_in_ch_p, 0, prev_phys); |
| @@ -263,10 +255,10 @@ static int setup_vdi_channel(struct vdic_priv *priv, | |||
| 263 | 255 | ||
| 264 | memset(&image, 0, sizeof(image)); | 256 | memset(&image, 0, sizeof(image)); |
| 265 | image.pix = vdev->fmt.fmt.pix; | 257 | image.pix = vdev->fmt.fmt.pix; |
| 258 | image.rect = vdev->compose; | ||
| 266 | /* one field to VDIC channels */ | 259 | /* one field to VDIC channels */ |
| 267 | image.pix.height /= 2; | 260 | image.pix.height /= 2; |
| 268 | image.rect.width = image.pix.width; | 261 | image.rect.height /= 2; |
| 269 | image.rect.height = image.pix.height; | ||
| 270 | image.phys0 = phys0; | 262 | image.phys0 = phys0; |
| 271 | image.phys1 = phys1; | 263 | image.phys1 = phys1; |
| 272 | 264 | ||
| @@ -826,7 +818,10 @@ static int vdic_s_frame_interval(struct v4l2_subdev *sd, | |||
| 826 | switch (fi->pad) { | 818 | switch (fi->pad) { |
| 827 | case VDIC_SINK_PAD_DIRECT: | 819 | case VDIC_SINK_PAD_DIRECT: |
| 828 | case VDIC_SINK_PAD_IDMAC: | 820 | case VDIC_SINK_PAD_IDMAC: |
| 829 | /* No limits on input frame interval */ | 821 | /* No limits on valid input frame intervals */ |
| 822 | if (fi->interval.numerator == 0 || | ||
| 823 | fi->interval.denominator == 0) | ||
| 824 | fi->interval = priv->frame_interval[fi->pad]; | ||
| 830 | /* Reset output interval */ | 825 | /* Reset output interval */ |
| 831 | *output_fi = fi->interval; | 826 | *output_fi = fi->interval; |
| 832 | if (priv->csi_direct) | 827 | if (priv->csi_direct) |
diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index bc7feb81937c..ae964c8d5be1 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h | |||
| @@ -80,6 +80,8 @@ struct imx_media_video_dev { | |||
| 80 | 80 | ||
| 81 | /* the user format */ | 81 | /* the user format */ |
| 82 | struct v4l2_format fmt; | 82 | struct v4l2_format fmt; |
| 83 | /* the compose rectangle */ | ||
| 84 | struct v4l2_rect compose; | ||
| 83 | const struct imx_media_pixfmt *cc; | 85 | const struct imx_media_pixfmt *cc; |
| 84 | 86 | ||
| 85 | /* links this vdev to master list */ | 87 | /* links this vdev to master list */ |
| @@ -178,7 +180,8 @@ void imx_media_fill_default_mbus_fields(struct v4l2_mbus_framefmt *tryfmt, | |||
| 178 | struct v4l2_mbus_framefmt *fmt, | 180 | struct v4l2_mbus_framefmt *fmt, |
| 179 | bool ic_route); | 181 | bool ic_route); |
| 180 | int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, | 182 | int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, |
| 181 | struct v4l2_mbus_framefmt *mbus, | 183 | struct v4l2_rect *compose, |
| 184 | const struct v4l2_mbus_framefmt *mbus, | ||
| 182 | const struct imx_media_pixfmt *cc); | 185 | const struct imx_media_pixfmt *cc); |
| 183 | int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, | 186 | int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, |
| 184 | struct v4l2_mbus_framefmt *mbus); | 187 | struct v4l2_mbus_framefmt *mbus); |
| @@ -226,6 +229,18 @@ int imx_media_add_async_subdev(struct imx_media_dev *imxmd, | |||
| 226 | struct fwnode_handle *fwnode, | 229 | struct fwnode_handle *fwnode, |
| 227 | struct platform_device *pdev); | 230 | struct platform_device *pdev); |
| 228 | 231 | ||
| 232 | int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, | ||
| 233 | struct v4l2_subdev *sd, | ||
| 234 | struct v4l2_async_subdev *asd); | ||
| 235 | int imx_media_link_notify(struct media_link *link, u32 flags, | ||
| 236 | unsigned int notification); | ||
| 237 | void imx_media_notify(struct v4l2_subdev *sd, unsigned int notification, | ||
| 238 | void *arg); | ||
| 239 | int imx_media_probe_complete(struct v4l2_async_notifier *notifier); | ||
| 240 | |||
| 241 | struct imx_media_dev *imx_media_dev_init(struct device *dev); | ||
| 242 | int imx_media_dev_notifier_register(struct imx_media_dev *imxmd); | ||
| 243 | |||
| 229 | /* imx-media-fim.c */ | 244 | /* imx-media-fim.c */ |
| 230 | struct imx_media_fim; | 245 | struct imx_media_fim; |
| 231 | void imx_media_fim_eof_monitor(struct imx_media_fim *fim, ktime_t timestamp); | 246 | void imx_media_fim_eof_monitor(struct imx_media_fim *fim, ktime_t timestamp); |
| @@ -238,8 +253,8 @@ void imx_media_fim_free(struct imx_media_fim *fim); | |||
| 238 | 253 | ||
| 239 | /* imx-media-internal-sd.c */ | 254 | /* imx-media-internal-sd.c */ |
| 240 | int imx_media_add_internal_subdevs(struct imx_media_dev *imxmd); | 255 | int imx_media_add_internal_subdevs(struct imx_media_dev *imxmd); |
| 241 | int imx_media_create_internal_links(struct imx_media_dev *imxmd, | 256 | int imx_media_create_ipu_internal_links(struct imx_media_dev *imxmd, |
| 242 | struct v4l2_subdev *sd); | 257 | struct v4l2_subdev *sd); |
| 243 | void imx_media_remove_internal_subdevs(struct imx_media_dev *imxmd); | 258 | void imx_media_remove_internal_subdevs(struct imx_media_dev *imxmd); |
| 244 | 259 | ||
| 245 | /* imx-media-of.c */ | 260 | /* imx-media-of.c */ |
| @@ -249,6 +264,8 @@ int imx_media_create_of_links(struct imx_media_dev *imxmd, | |||
| 249 | struct v4l2_subdev *sd); | 264 | struct v4l2_subdev *sd); |
| 250 | int imx_media_create_csi_of_links(struct imx_media_dev *imxmd, | 265 | int imx_media_create_csi_of_links(struct imx_media_dev *imxmd, |
| 251 | struct v4l2_subdev *csi); | 266 | struct v4l2_subdev *csi); |
| 267 | int imx_media_of_add_csi(struct imx_media_dev *imxmd, | ||
| 268 | struct device_node *csi_np); | ||
| 252 | 269 | ||
| 253 | /* imx-media-capture.c */ | 270 | /* imx-media-capture.c */ |
| 254 | struct imx_media_video_dev * | 271 | struct imx_media_video_dev * |
| @@ -259,18 +276,20 @@ void imx_media_capture_device_unregister(struct imx_media_video_dev *vdev); | |||
| 259 | struct imx_media_buffer * | 276 | struct imx_media_buffer * |
| 260 | imx_media_capture_device_next_buf(struct imx_media_video_dev *vdev); | 277 | imx_media_capture_device_next_buf(struct imx_media_video_dev *vdev); |
| 261 | void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, | 278 | void imx_media_capture_device_set_format(struct imx_media_video_dev *vdev, |
| 262 | struct v4l2_pix_format *pix); | 279 | const struct v4l2_pix_format *pix, |
| 280 | const struct v4l2_rect *compose); | ||
| 263 | void imx_media_capture_device_error(struct imx_media_video_dev *vdev); | 281 | void imx_media_capture_device_error(struct imx_media_video_dev *vdev); |
| 264 | 282 | ||
| 265 | /* subdev group ids */ | 283 | /* subdev group ids */ |
| 266 | #define IMX_MEDIA_GRP_ID_CSI2 BIT(8) | 284 | #define IMX_MEDIA_GRP_ID_CSI2 BIT(8) |
| 267 | #define IMX_MEDIA_GRP_ID_CSI_BIT 9 | 285 | #define IMX_MEDIA_GRP_ID_CSI BIT(9) |
| 268 | #define IMX_MEDIA_GRP_ID_CSI (0x3 << IMX_MEDIA_GRP_ID_CSI_BIT) | 286 | #define IMX_MEDIA_GRP_ID_IPU_CSI_BIT 10 |
| 269 | #define IMX_MEDIA_GRP_ID_CSI0 BIT(IMX_MEDIA_GRP_ID_CSI_BIT) | 287 | #define IMX_MEDIA_GRP_ID_IPU_CSI (0x3 << IMX_MEDIA_GRP_ID_IPU_CSI_BIT) |
| 270 | #define IMX_MEDIA_GRP_ID_CSI1 (2 << IMX_MEDIA_GRP_ID_CSI_BIT) | 288 | #define IMX_MEDIA_GRP_ID_IPU_CSI0 BIT(IMX_MEDIA_GRP_ID_IPU_CSI_BIT) |
| 271 | #define IMX_MEDIA_GRP_ID_VDIC BIT(11) | 289 | #define IMX_MEDIA_GRP_ID_IPU_CSI1 (2 << IMX_MEDIA_GRP_ID_IPU_CSI_BIT) |
| 272 | #define IMX_MEDIA_GRP_ID_IC_PRP BIT(12) | 290 | #define IMX_MEDIA_GRP_ID_IPU_VDIC BIT(12) |
| 273 | #define IMX_MEDIA_GRP_ID_IC_PRPENC BIT(13) | 291 | #define IMX_MEDIA_GRP_ID_IPU_IC_PRP BIT(13) |
| 274 | #define IMX_MEDIA_GRP_ID_IC_PRPVF BIT(14) | 292 | #define IMX_MEDIA_GRP_ID_IPU_IC_PRPENC BIT(14) |
| 293 | #define IMX_MEDIA_GRP_ID_IPU_IC_PRPVF BIT(15) | ||
| 275 | 294 | ||
| 276 | #endif | 295 | #endif |
diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c new file mode 100644 index 000000000000..3fba7c27c0ec --- /dev/null +++ b/drivers/staging/media/imx/imx7-media-csi.c | |||
| @@ -0,0 +1,1369 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* | ||
| 3 | * V4L2 Capture CSI Subdev for Freescale i.MX7 SOC | ||
| 4 | * | ||
| 5 | * Copyright (c) 2019 Linaro Ltd | ||
| 6 | * | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/clk.h> | ||
| 10 | #include <linux/delay.h> | ||
| 11 | #include <linux/gcd.h> | ||
| 12 | #include <linux/interrupt.h> | ||
| 13 | #include <linux/mfd/syscon.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/of_graph.h> | ||
| 16 | #include <linux/pinctrl/consumer.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/regmap.h> | ||
| 19 | #include <linux/types.h> | ||
| 20 | |||
| 21 | #include <media/v4l2-ctrls.h> | ||
| 22 | #include <media/v4l2-device.h> | ||
| 23 | #include <media/v4l2-event.h> | ||
| 24 | #include <media/v4l2-fwnode.h> | ||
| 25 | #include <media/v4l2-mc.h> | ||
| 26 | #include <media/v4l2-subdev.h> | ||
| 27 | #include <media/videobuf2-dma-contig.h> | ||
| 28 | |||
| 29 | #include <media/imx.h> | ||
| 30 | #include "imx-media.h" | ||
| 31 | |||
| 32 | #define IMX7_CSI_PAD_SINK 0 | ||
| 33 | #define IMX7_CSI_PAD_SRC 1 | ||
| 34 | #define IMX7_CSI_PADS_NUM 2 | ||
| 35 | |||
| 36 | /* reset values */ | ||
| 37 | #define CSICR1_RESET_VAL 0x40000800 | ||
| 38 | #define CSICR2_RESET_VAL 0x0 | ||
| 39 | #define CSICR3_RESET_VAL 0x0 | ||
| 40 | |||
| 41 | /* csi control reg 1 */ | ||
| 42 | #define BIT_SWAP16_EN BIT(31) | ||
| 43 | #define BIT_EXT_VSYNC BIT(30) | ||
| 44 | #define BIT_EOF_INT_EN BIT(29) | ||
| 45 | #define BIT_PRP_IF_EN BIT(28) | ||
| 46 | #define BIT_CCIR_MODE BIT(27) | ||
| 47 | #define BIT_COF_INT_EN BIT(26) | ||
| 48 | #define BIT_SF_OR_INTEN BIT(25) | ||
| 49 | #define BIT_RF_OR_INTEN BIT(24) | ||
| 50 | #define BIT_SFF_DMA_DONE_INTEN BIT(22) | ||
| 51 | #define BIT_STATFF_INTEN BIT(21) | ||
| 52 | #define BIT_FB2_DMA_DONE_INTEN BIT(20) | ||
| 53 | #define BIT_FB1_DMA_DONE_INTEN BIT(19) | ||
| 54 | #define BIT_RXFF_INTEN BIT(18) | ||
| 55 | #define BIT_SOF_POL BIT(17) | ||
| 56 | #define BIT_SOF_INTEN BIT(16) | ||
| 57 | #define BIT_MCLKDIV (0xF << 12) | ||
| 58 | #define BIT_HSYNC_POL BIT(11) | ||
| 59 | #define BIT_CCIR_EN BIT(10) | ||
| 60 | #define BIT_MCLKEN BIT(9) | ||
| 61 | #define BIT_FCC BIT(8) | ||
| 62 | #define BIT_PACK_DIR BIT(7) | ||
| 63 | #define BIT_CLR_STATFIFO BIT(6) | ||
| 64 | #define BIT_CLR_RXFIFO BIT(5) | ||
| 65 | #define BIT_GCLK_MODE BIT(4) | ||
| 66 | #define BIT_INV_DATA BIT(3) | ||
| 67 | #define BIT_INV_PCLK BIT(2) | ||
| 68 | #define BIT_REDGE BIT(1) | ||
| 69 | #define BIT_PIXEL_BIT BIT(0) | ||
| 70 | |||
| 71 | #define SHIFT_MCLKDIV 12 | ||
| 72 | |||
| 73 | /* control reg 3 */ | ||
| 74 | #define BIT_FRMCNT (0xFFFF << 16) | ||
| 75 | #define BIT_FRMCNT_RST BIT(15) | ||
| 76 | #define BIT_DMA_REFLASH_RFF BIT(14) | ||
| 77 | #define BIT_DMA_REFLASH_SFF BIT(13) | ||
| 78 | #define BIT_DMA_REQ_EN_RFF BIT(12) | ||
| 79 | #define BIT_DMA_REQ_EN_SFF BIT(11) | ||
| 80 | #define BIT_STATFF_LEVEL (0x7 << 8) | ||
| 81 | #define BIT_HRESP_ERR_EN BIT(7) | ||
| 82 | #define BIT_RXFF_LEVEL (0x7 << 4) | ||
| 83 | #define BIT_TWO_8BIT_SENSOR BIT(3) | ||
| 84 | #define BIT_ZERO_PACK_EN BIT(2) | ||
| 85 | #define BIT_ECC_INT_EN BIT(1) | ||
| 86 | #define BIT_ECC_AUTO_EN BIT(0) | ||
| 87 | |||
| 88 | #define SHIFT_FRMCNT 16 | ||
| 89 | #define SHIFT_RXFIFO_LEVEL 4 | ||
| 90 | |||
| 91 | /* csi status reg */ | ||
| 92 | #define BIT_ADDR_CH_ERR_INT BIT(28) | ||
| 93 | #define BIT_FIELD0_INT BIT(27) | ||
| 94 | #define BIT_FIELD1_INT BIT(26) | ||
| 95 | #define BIT_SFF_OR_INT BIT(25) | ||
| 96 | #define BIT_RFF_OR_INT BIT(24) | ||
| 97 | #define BIT_DMA_TSF_DONE_SFF BIT(22) | ||
| 98 | #define BIT_STATFF_INT BIT(21) | ||
| 99 | #define BIT_DMA_TSF_DONE_FB2 BIT(20) | ||
| 100 | #define BIT_DMA_TSF_DONE_FB1 BIT(19) | ||
| 101 | #define BIT_RXFF_INT BIT(18) | ||
| 102 | #define BIT_EOF_INT BIT(17) | ||
| 103 | #define BIT_SOF_INT BIT(16) | ||
| 104 | #define BIT_F2_INT BIT(15) | ||
| 105 | #define BIT_F1_INT BIT(14) | ||
| 106 | #define BIT_COF_INT BIT(13) | ||
| 107 | #define BIT_HRESP_ERR_INT BIT(7) | ||
| 108 | #define BIT_ECC_INT BIT(1) | ||
| 109 | #define BIT_DRDY BIT(0) | ||
| 110 | |||
| 111 | /* csi control reg 18 */ | ||
| 112 | #define BIT_CSI_HW_ENABLE BIT(31) | ||
| 113 | #define BIT_MIPI_DATA_FORMAT_RAW8 (0x2a << 25) | ||
| 114 | #define BIT_MIPI_DATA_FORMAT_RAW10 (0x2b << 25) | ||
| 115 | #define BIT_MIPI_DATA_FORMAT_RAW12 (0x2c << 25) | ||
| 116 | #define BIT_MIPI_DATA_FORMAT_RAW14 (0x2d << 25) | ||
| 117 | #define BIT_MIPI_DATA_FORMAT_YUV422_8B (0x1e << 25) | ||
| 118 | #define BIT_MIPI_DATA_FORMAT_MASK (0x3F << 25) | ||
| 119 | #define BIT_MIPI_DATA_FORMAT_OFFSET 25 | ||
| 120 | #define BIT_DATA_FROM_MIPI BIT(22) | ||
| 121 | #define BIT_MIPI_YU_SWAP BIT(21) | ||
| 122 | #define BIT_MIPI_DOUBLE_CMPNT BIT(20) | ||
| 123 | #define BIT_BASEADDR_CHG_ERR_EN BIT(9) | ||
| 124 | #define BIT_BASEADDR_SWITCH_SEL BIT(5) | ||
| 125 | #define BIT_BASEADDR_SWITCH_EN BIT(4) | ||
| 126 | #define BIT_PARALLEL24_EN BIT(3) | ||
| 127 | #define BIT_DEINTERLACE_EN BIT(2) | ||
| 128 | #define BIT_TVDECODER_IN_EN BIT(1) | ||
| 129 | #define BIT_NTSC_EN BIT(0) | ||
| 130 | |||
| 131 | #define CSI_MCLK_VF 1 | ||
| 132 | #define CSI_MCLK_ENC 2 | ||
| 133 | #define CSI_MCLK_RAW 4 | ||
| 134 | #define CSI_MCLK_I2C 8 | ||
| 135 | |||
| 136 | #define CSI_CSICR1 0x0 | ||
| 137 | #define CSI_CSICR2 0x4 | ||
| 138 | #define CSI_CSICR3 0x8 | ||
| 139 | #define CSI_STATFIFO 0xC | ||
| 140 | #define CSI_CSIRXFIFO 0x10 | ||
| 141 | #define CSI_CSIRXCNT 0x14 | ||
| 142 | #define CSI_CSISR 0x18 | ||
| 143 | |||
| 144 | #define CSI_CSIDBG 0x1C | ||
| 145 | #define CSI_CSIDMASA_STATFIFO 0x20 | ||
| 146 | #define CSI_CSIDMATS_STATFIFO 0x24 | ||
| 147 | #define CSI_CSIDMASA_FB1 0x28 | ||
| 148 | #define CSI_CSIDMASA_FB2 0x2C | ||
| 149 | #define CSI_CSIFBUF_PARA 0x30 | ||
| 150 | #define CSI_CSIIMAG_PARA 0x34 | ||
| 151 | |||
| 152 | #define CSI_CSICR18 0x48 | ||
| 153 | #define CSI_CSICR19 0x4c | ||
| 154 | |||
| 155 | static const char * const imx7_csi_clk_id[] = {"axi", "dcic", "mclk"}; | ||
| 156 | |||
| 157 | struct imx7_csi { | ||
| 158 | struct device *dev; | ||
| 159 | struct v4l2_subdev sd; | ||
| 160 | struct imx_media_video_dev *vdev; | ||
| 161 | struct imx_media_dev *imxmd; | ||
| 162 | struct media_pad pad[IMX7_CSI_PADS_NUM]; | ||
| 163 | |||
| 164 | /* lock to protect members below */ | ||
| 165 | struct mutex lock; | ||
| 166 | /* lock to protect irq handler when stop streaming */ | ||
| 167 | spinlock_t irqlock; | ||
| 168 | |||
| 169 | struct v4l2_subdev *src_sd; | ||
| 170 | |||
| 171 | struct media_entity *sink; | ||
| 172 | |||
| 173 | struct v4l2_fwnode_endpoint upstream_ep; | ||
| 174 | |||
| 175 | struct v4l2_mbus_framefmt format_mbus[IMX7_CSI_PADS_NUM]; | ||
| 176 | const struct imx_media_pixfmt *cc[IMX7_CSI_PADS_NUM]; | ||
| 177 | struct v4l2_fract frame_interval[IMX7_CSI_PADS_NUM]; | ||
| 178 | |||
| 179 | struct v4l2_ctrl_handler ctrl_hdlr; | ||
| 180 | |||
| 181 | void __iomem *regbase; | ||
| 182 | int irq; | ||
| 183 | |||
| 184 | int num_clks; | ||
| 185 | struct clk_bulk_data *clks; | ||
| 186 | |||
| 187 | /* active vb2 buffers to send to video dev sink */ | ||
| 188 | struct imx_media_buffer *active_vb2_buf[2]; | ||
| 189 | struct imx_media_dma_buf underrun_buf; | ||
| 190 | |||
| 191 | int buf_num; | ||
| 192 | u32 frame_sequence; | ||
| 193 | |||
| 194 | bool last_eof; | ||
| 195 | bool is_init; | ||
| 196 | bool is_streaming; | ||
| 197 | bool is_csi2; | ||
| 198 | |||
| 199 | struct completion last_eof_completion; | ||
| 200 | }; | ||
| 201 | |||
| 202 | #define imx7_csi_reg_read(_csi, _offset) \ | ||
| 203 | __raw_readl((_csi)->regbase + (_offset)) | ||
| 204 | #define imx7_csi_reg_write(_csi, _val, _offset) \ | ||
| 205 | __raw_writel(_val, (_csi)->regbase + (_offset)) | ||
| 206 | |||
| 207 | static void imx7_csi_clk_enable(struct imx7_csi *csi) | ||
| 208 | { | ||
| 209 | int ret; | ||
| 210 | |||
| 211 | ret = clk_bulk_prepare_enable(csi->num_clks, csi->clks); | ||
| 212 | if (ret < 0) | ||
| 213 | dev_err(csi->dev, "failed to enable clocks\n"); | ||
| 214 | } | ||
| 215 | |||
| 216 | static void imx7_csi_clk_disable(struct imx7_csi *csi) | ||
| 217 | { | ||
| 218 | clk_bulk_disable_unprepare(csi->num_clks, csi->clks); | ||
| 219 | } | ||
| 220 | |||
| 221 | static void imx7_csi_hw_reset(struct imx7_csi *csi) | ||
| 222 | { | ||
| 223 | imx7_csi_reg_write(csi, | ||
| 224 | imx7_csi_reg_read(csi, CSI_CSICR3) | BIT_FRMCNT_RST, | ||
| 225 | CSI_CSICR3); | ||
| 226 | |||
| 227 | imx7_csi_reg_write(csi, CSICR1_RESET_VAL, CSI_CSICR1); | ||
| 228 | imx7_csi_reg_write(csi, CSICR2_RESET_VAL, CSI_CSICR2); | ||
| 229 | imx7_csi_reg_write(csi, CSICR3_RESET_VAL, CSI_CSICR3); | ||
| 230 | } | ||
| 231 | |||
| 232 | static unsigned long imx7_csi_irq_clear(struct imx7_csi *csi) | ||
| 233 | { | ||
| 234 | unsigned long isr; | ||
| 235 | |||
| 236 | isr = imx7_csi_reg_read(csi, CSI_CSISR); | ||
| 237 | imx7_csi_reg_write(csi, isr, CSI_CSISR); | ||
| 238 | |||
| 239 | return isr; | ||
| 240 | } | ||
| 241 | |||
| 242 | static void imx7_csi_init_interface(struct imx7_csi *csi) | ||
| 243 | { | ||
| 244 | unsigned int val = 0; | ||
| 245 | unsigned int imag_para; | ||
| 246 | |||
| 247 | val = BIT_SOF_POL | BIT_REDGE | BIT_GCLK_MODE | BIT_HSYNC_POL | | ||
| 248 | BIT_FCC | 1 << SHIFT_MCLKDIV | BIT_MCLKEN; | ||
| 249 | imx7_csi_reg_write(csi, val, CSI_CSICR1); | ||
| 250 | |||
| 251 | imag_para = (800 << 16) | 600; | ||
| 252 | imx7_csi_reg_write(csi, imag_para, CSI_CSIIMAG_PARA); | ||
| 253 | |||
| 254 | val = BIT_DMA_REFLASH_RFF; | ||
| 255 | imx7_csi_reg_write(csi, val, CSI_CSICR3); | ||
| 256 | } | ||
| 257 | |||
| 258 | static void imx7_csi_hw_enable_irq(struct imx7_csi *csi) | ||
| 259 | { | ||
| 260 | unsigned long cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); | ||
| 261 | |||
| 262 | cr1 |= BIT_SOF_INTEN; | ||
| 263 | cr1 |= BIT_RFF_OR_INT; | ||
| 264 | |||
| 265 | /* still capture needs DMA interrupt */ | ||
| 266 | cr1 |= BIT_FB1_DMA_DONE_INTEN; | ||
| 267 | cr1 |= BIT_FB2_DMA_DONE_INTEN; | ||
| 268 | |||
| 269 | cr1 |= BIT_EOF_INT_EN; | ||
| 270 | |||
| 271 | imx7_csi_reg_write(csi, cr1, CSI_CSICR1); | ||
| 272 | } | ||
| 273 | |||
| 274 | static void imx7_csi_hw_disable_irq(struct imx7_csi *csi) | ||
| 275 | { | ||
| 276 | unsigned long cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); | ||
| 277 | |||
| 278 | cr1 &= ~BIT_SOF_INTEN; | ||
| 279 | cr1 &= ~BIT_RFF_OR_INT; | ||
| 280 | cr1 &= ~BIT_FB1_DMA_DONE_INTEN; | ||
| 281 | cr1 &= ~BIT_FB2_DMA_DONE_INTEN; | ||
| 282 | cr1 &= ~BIT_EOF_INT_EN; | ||
| 283 | |||
| 284 | imx7_csi_reg_write(csi, cr1, CSI_CSICR1); | ||
| 285 | } | ||
| 286 | |||
| 287 | static void imx7_csi_hw_enable(struct imx7_csi *csi) | ||
| 288 | { | ||
| 289 | unsigned long cr = imx7_csi_reg_read(csi, CSI_CSICR18); | ||
| 290 | |||
| 291 | cr |= BIT_CSI_HW_ENABLE; | ||
| 292 | |||
| 293 | imx7_csi_reg_write(csi, cr, CSI_CSICR18); | ||
| 294 | } | ||
| 295 | |||
| 296 | static void imx7_csi_hw_disable(struct imx7_csi *csi) | ||
| 297 | { | ||
| 298 | unsigned long cr = imx7_csi_reg_read(csi, CSI_CSICR18); | ||
| 299 | |||
| 300 | cr &= ~BIT_CSI_HW_ENABLE; | ||
| 301 | |||
| 302 | imx7_csi_reg_write(csi, cr, CSI_CSICR18); | ||
| 303 | } | ||
| 304 | |||
| 305 | static void imx7_csi_dma_reflash(struct imx7_csi *csi) | ||
| 306 | { | ||
| 307 | unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR18); | ||
| 308 | |||
| 309 | cr3 = imx7_csi_reg_read(csi, CSI_CSICR3); | ||
| 310 | cr3 |= BIT_DMA_REFLASH_RFF; | ||
| 311 | imx7_csi_reg_write(csi, cr3, CSI_CSICR3); | ||
| 312 | } | ||
| 313 | |||
| 314 | static void imx7_csi_rx_fifo_clear(struct imx7_csi *csi) | ||
| 315 | { | ||
| 316 | unsigned long cr1; | ||
| 317 | |||
| 318 | cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); | ||
| 319 | imx7_csi_reg_write(csi, cr1 & ~BIT_FCC, CSI_CSICR1); | ||
| 320 | cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); | ||
| 321 | imx7_csi_reg_write(csi, cr1 | BIT_CLR_RXFIFO, CSI_CSICR1); | ||
| 322 | |||
| 323 | cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); | ||
| 324 | imx7_csi_reg_write(csi, cr1 | BIT_FCC, CSI_CSICR1); | ||
| 325 | } | ||
| 326 | |||
| 327 | static void imx7_csi_buf_stride_set(struct imx7_csi *csi, u32 stride) | ||
| 328 | { | ||
| 329 | imx7_csi_reg_write(csi, stride, CSI_CSIFBUF_PARA); | ||
| 330 | } | ||
| 331 | |||
| 332 | static void imx7_csi_deinterlace_enable(struct imx7_csi *csi, bool enable) | ||
| 333 | { | ||
| 334 | unsigned long cr18 = imx7_csi_reg_read(csi, CSI_CSICR18); | ||
| 335 | |||
| 336 | if (enable) | ||
| 337 | cr18 |= BIT_DEINTERLACE_EN; | ||
| 338 | else | ||
| 339 | cr18 &= ~BIT_DEINTERLACE_EN; | ||
| 340 | |||
| 341 | imx7_csi_reg_write(csi, cr18, CSI_CSICR18); | ||
| 342 | } | ||
| 343 | |||
| 344 | static void imx7_csi_dmareq_rff_enable(struct imx7_csi *csi) | ||
| 345 | { | ||
| 346 | unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR3); | ||
| 347 | unsigned long cr2 = imx7_csi_reg_read(csi, CSI_CSICR2); | ||
| 348 | |||
| 349 | /* Burst Type of DMA Transfer from RxFIFO. INCR16 */ | ||
| 350 | cr2 |= 0xC0000000; | ||
| 351 | |||
| 352 | cr3 |= BIT_DMA_REQ_EN_RFF; | ||
| 353 | cr3 |= BIT_HRESP_ERR_EN; | ||
| 354 | cr3 &= ~BIT_RXFF_LEVEL; | ||
| 355 | cr3 |= 0x2 << 4; | ||
| 356 | |||
| 357 | imx7_csi_reg_write(csi, cr3, CSI_CSICR3); | ||
| 358 | imx7_csi_reg_write(csi, cr2, CSI_CSICR2); | ||
| 359 | } | ||
| 360 | |||
| 361 | static void imx7_csi_dmareq_rff_disable(struct imx7_csi *csi) | ||
| 362 | { | ||
| 363 | unsigned long cr3 = imx7_csi_reg_read(csi, CSI_CSICR3); | ||
| 364 | |||
| 365 | cr3 &= ~BIT_DMA_REQ_EN_RFF; | ||
| 366 | cr3 &= ~BIT_HRESP_ERR_EN; | ||
| 367 | imx7_csi_reg_write(csi, cr3, CSI_CSICR3); | ||
| 368 | } | ||
| 369 | |||
| 370 | static void imx7_csi_set_imagpara(struct imx7_csi *csi, int width, int height) | ||
| 371 | { | ||
| 372 | int imag_para; | ||
| 373 | int rx_count; | ||
| 374 | |||
| 375 | rx_count = (width * height) >> 2; | ||
| 376 | imx7_csi_reg_write(csi, rx_count, CSI_CSIRXCNT); | ||
| 377 | |||
| 378 | imag_para = (width << 16) | height; | ||
| 379 | imx7_csi_reg_write(csi, imag_para, CSI_CSIIMAG_PARA); | ||
| 380 | |||
| 381 | /* reflash the embedded DMA controller */ | ||
| 382 | imx7_csi_dma_reflash(csi); | ||
| 383 | } | ||
| 384 | |||
| 385 | static void imx7_csi_sw_reset(struct imx7_csi *csi) | ||
| 386 | { | ||
| 387 | imx7_csi_hw_disable(csi); | ||
| 388 | |||
| 389 | imx7_csi_rx_fifo_clear(csi); | ||
| 390 | |||
| 391 | imx7_csi_dma_reflash(csi); | ||
| 392 | |||
| 393 | usleep_range(2000, 3000); | ||
| 394 | |||
| 395 | imx7_csi_irq_clear(csi); | ||
| 396 | |||
| 397 | imx7_csi_hw_enable(csi); | ||
| 398 | } | ||
| 399 | |||
| 400 | static void imx7_csi_error_recovery(struct imx7_csi *csi) | ||
| 401 | { | ||
| 402 | imx7_csi_hw_disable(csi); | ||
| 403 | |||
| 404 | imx7_csi_rx_fifo_clear(csi); | ||
| 405 | |||
| 406 | imx7_csi_dma_reflash(csi); | ||
| 407 | |||
| 408 | imx7_csi_hw_enable(csi); | ||
| 409 | } | ||
| 410 | |||
| 411 | static void imx7_csi_init(struct imx7_csi *csi) | ||
| 412 | { | ||
| 413 | if (csi->is_init) | ||
| 414 | return; | ||
| 415 | |||
| 416 | imx7_csi_clk_enable(csi); | ||
| 417 | imx7_csi_hw_reset(csi); | ||
| 418 | imx7_csi_init_interface(csi); | ||
| 419 | imx7_csi_dmareq_rff_enable(csi); | ||
| 420 | |||
| 421 | csi->is_init = true; | ||
| 422 | } | ||
| 423 | |||
| 424 | static void imx7_csi_deinit(struct imx7_csi *csi) | ||
| 425 | { | ||
| 426 | if (!csi->is_init) | ||
| 427 | return; | ||
| 428 | |||
| 429 | imx7_csi_hw_reset(csi); | ||
| 430 | imx7_csi_init_interface(csi); | ||
| 431 | imx7_csi_dmareq_rff_disable(csi); | ||
| 432 | imx7_csi_clk_disable(csi); | ||
| 433 | |||
| 434 | csi->is_init = false; | ||
| 435 | } | ||
| 436 | |||
| 437 | static int imx7_csi_get_upstream_endpoint(struct imx7_csi *csi, | ||
| 438 | struct v4l2_fwnode_endpoint *ep, | ||
| 439 | bool skip_mux) | ||
| 440 | { | ||
| 441 | struct device_node *endpoint, *port; | ||
| 442 | struct media_entity *src; | ||
| 443 | struct v4l2_subdev *sd; | ||
| 444 | struct media_pad *pad; | ||
| 445 | |||
| 446 | if (!csi->src_sd) | ||
| 447 | return -EPIPE; | ||
| 448 | |||
| 449 | src = &csi->src_sd->entity; | ||
| 450 | |||
| 451 | skip_video_mux: | ||
| 452 | /* get source pad of entity directly upstream from src */ | ||
| 453 | pad = imx_media_find_upstream_pad(csi->imxmd, src, 0); | ||
| 454 | if (IS_ERR(pad)) | ||
| 455 | return PTR_ERR(pad); | ||
| 456 | |||
| 457 | sd = media_entity_to_v4l2_subdev(pad->entity); | ||
| 458 | |||
| 459 | /* To get bus type we may need to skip video mux */ | ||
| 460 | if (skip_mux && src->function == MEDIA_ENT_F_VID_MUX) { | ||
| 461 | src = &sd->entity; | ||
| 462 | goto skip_video_mux; | ||
| 463 | } | ||
| 464 | |||
| 465 | /* | ||
| 466 | * NOTE: this assumes an OF-graph port id is the same as a | ||
| 467 | * media pad index. | ||
| 468 | */ | ||
| 469 | port = of_graph_get_port_by_id(sd->dev->of_node, pad->index); | ||
| 470 | if (!port) | ||
| 471 | return -ENODEV; | ||
| 472 | |||
| 473 | endpoint = of_get_next_child(port, NULL); | ||
| 474 | of_node_put(port); | ||
| 475 | if (!endpoint) | ||
| 476 | return -ENODEV; | ||
| 477 | |||
| 478 | v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), ep); | ||
| 479 | of_node_put(endpoint); | ||
| 480 | |||
| 481 | return 0; | ||
| 482 | } | ||
| 483 | |||
| 484 | static int imx7_csi_link_setup(struct media_entity *entity, | ||
| 485 | const struct media_pad *local, | ||
| 486 | const struct media_pad *remote, u32 flags) | ||
| 487 | { | ||
| 488 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); | ||
| 489 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 490 | struct v4l2_subdev *remote_sd; | ||
| 491 | int ret = 0; | ||
| 492 | |||
| 493 | dev_dbg(csi->dev, "link setup %s -> %s\n", remote->entity->name, | ||
| 494 | local->entity->name); | ||
| 495 | |||
| 496 | mutex_lock(&csi->lock); | ||
| 497 | |||
| 498 | if (local->flags & MEDIA_PAD_FL_SINK) { | ||
| 499 | if (!is_media_entity_v4l2_subdev(remote->entity)) { | ||
| 500 | ret = -EINVAL; | ||
| 501 | goto unlock; | ||
| 502 | } | ||
| 503 | |||
| 504 | remote_sd = media_entity_to_v4l2_subdev(remote->entity); | ||
| 505 | |||
| 506 | if (flags & MEDIA_LNK_FL_ENABLED) { | ||
| 507 | if (csi->src_sd) { | ||
| 508 | ret = -EBUSY; | ||
| 509 | goto unlock; | ||
| 510 | } | ||
| 511 | csi->src_sd = remote_sd; | ||
| 512 | } else { | ||
| 513 | csi->src_sd = NULL; | ||
| 514 | } | ||
| 515 | |||
| 516 | goto init; | ||
| 517 | } | ||
| 518 | |||
| 519 | /* source pad */ | ||
| 520 | if (flags & MEDIA_LNK_FL_ENABLED) { | ||
| 521 | if (csi->sink) { | ||
| 522 | ret = -EBUSY; | ||
| 523 | goto unlock; | ||
| 524 | } | ||
| 525 | csi->sink = remote->entity; | ||
| 526 | } else { | ||
| 527 | v4l2_ctrl_handler_free(&csi->ctrl_hdlr); | ||
| 528 | v4l2_ctrl_handler_init(&csi->ctrl_hdlr, 0); | ||
| 529 | csi->sink = NULL; | ||
| 530 | } | ||
| 531 | |||
| 532 | init: | ||
| 533 | if (csi->sink || csi->src_sd) | ||
| 534 | imx7_csi_init(csi); | ||
| 535 | else | ||
| 536 | imx7_csi_deinit(csi); | ||
| 537 | |||
| 538 | unlock: | ||
| 539 | mutex_unlock(&csi->lock); | ||
| 540 | |||
| 541 | return ret; | ||
| 542 | } | ||
| 543 | |||
| 544 | static int imx7_csi_pad_link_validate(struct v4l2_subdev *sd, | ||
| 545 | struct media_link *link, | ||
| 546 | struct v4l2_subdev_format *source_fmt, | ||
| 547 | struct v4l2_subdev_format *sink_fmt) | ||
| 548 | { | ||
| 549 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 550 | struct v4l2_fwnode_endpoint upstream_ep = {}; | ||
| 551 | int ret; | ||
| 552 | |||
| 553 | ret = v4l2_subdev_link_validate_default(sd, link, source_fmt, sink_fmt); | ||
| 554 | if (ret) | ||
| 555 | return ret; | ||
| 556 | |||
| 557 | ret = imx7_csi_get_upstream_endpoint(csi, &upstream_ep, true); | ||
| 558 | if (ret) { | ||
| 559 | v4l2_err(&csi->sd, "failed to find upstream endpoint\n"); | ||
| 560 | return ret; | ||
| 561 | } | ||
| 562 | |||
| 563 | mutex_lock(&csi->lock); | ||
| 564 | |||
| 565 | csi->upstream_ep = upstream_ep; | ||
| 566 | csi->is_csi2 = (upstream_ep.bus_type == V4L2_MBUS_CSI2_DPHY); | ||
| 567 | |||
| 568 | mutex_unlock(&csi->lock); | ||
| 569 | |||
| 570 | return 0; | ||
| 571 | } | ||
| 572 | |||
| 573 | static void imx7_csi_update_buf(struct imx7_csi *csi, dma_addr_t phys, | ||
| 574 | int buf_num) | ||
| 575 | { | ||
| 576 | if (buf_num == 1) | ||
| 577 | imx7_csi_reg_write(csi, phys, CSI_CSIDMASA_FB2); | ||
| 578 | else | ||
| 579 | imx7_csi_reg_write(csi, phys, CSI_CSIDMASA_FB1); | ||
| 580 | } | ||
| 581 | |||
| 582 | static void imx7_csi_setup_vb2_buf(struct imx7_csi *csi) | ||
| 583 | { | ||
| 584 | struct imx_media_video_dev *vdev = csi->vdev; | ||
| 585 | struct imx_media_buffer *buf; | ||
| 586 | struct vb2_buffer *vb2_buf; | ||
| 587 | dma_addr_t phys[2]; | ||
| 588 | int i; | ||
| 589 | |||
| 590 | for (i = 0; i < 2; i++) { | ||
| 591 | buf = imx_media_capture_device_next_buf(vdev); | ||
| 592 | if (buf) { | ||
| 593 | csi->active_vb2_buf[i] = buf; | ||
| 594 | vb2_buf = &buf->vbuf.vb2_buf; | ||
| 595 | phys[i] = vb2_dma_contig_plane_dma_addr(vb2_buf, 0); | ||
| 596 | } else { | ||
| 597 | csi->active_vb2_buf[i] = NULL; | ||
| 598 | phys[i] = csi->underrun_buf.phys; | ||
| 599 | } | ||
| 600 | |||
| 601 | imx7_csi_update_buf(csi, phys[i], i); | ||
| 602 | } | ||
| 603 | } | ||
| 604 | |||
| 605 | static void imx7_csi_dma_unsetup_vb2_buf(struct imx7_csi *csi, | ||
| 606 | enum vb2_buffer_state return_status) | ||
| 607 | { | ||
| 608 | struct imx_media_buffer *buf; | ||
| 609 | int i; | ||
| 610 | |||
| 611 | /* return any remaining active frames with return_status */ | ||
| 612 | for (i = 0; i < 2; i++) { | ||
| 613 | buf = csi->active_vb2_buf[i]; | ||
| 614 | if (buf) { | ||
| 615 | struct vb2_buffer *vb = &buf->vbuf.vb2_buf; | ||
| 616 | |||
| 617 | vb->timestamp = ktime_get_ns(); | ||
| 618 | vb2_buffer_done(vb, return_status); | ||
| 619 | } | ||
| 620 | } | ||
| 621 | } | ||
| 622 | |||
| 623 | static void imx7_csi_vb2_buf_done(struct imx7_csi *csi) | ||
| 624 | { | ||
| 625 | struct imx_media_video_dev *vdev = csi->vdev; | ||
| 626 | struct imx_media_buffer *done, *next; | ||
| 627 | struct vb2_buffer *vb; | ||
| 628 | dma_addr_t phys; | ||
| 629 | |||
| 630 | done = csi->active_vb2_buf[csi->buf_num]; | ||
| 631 | if (done) { | ||
| 632 | done->vbuf.field = vdev->fmt.fmt.pix.field; | ||
| 633 | done->vbuf.sequence = csi->frame_sequence; | ||
| 634 | vb = &done->vbuf.vb2_buf; | ||
| 635 | vb->timestamp = ktime_get_ns(); | ||
| 636 | vb2_buffer_done(vb, VB2_BUF_STATE_DONE); | ||
| 637 | } | ||
| 638 | csi->frame_sequence++; | ||
| 639 | |||
| 640 | /* get next queued buffer */ | ||
| 641 | next = imx_media_capture_device_next_buf(vdev); | ||
| 642 | if (next) { | ||
| 643 | phys = vb2_dma_contig_plane_dma_addr(&next->vbuf.vb2_buf, 0); | ||
| 644 | csi->active_vb2_buf[csi->buf_num] = next; | ||
| 645 | } else { | ||
| 646 | phys = csi->underrun_buf.phys; | ||
| 647 | csi->active_vb2_buf[csi->buf_num] = NULL; | ||
| 648 | } | ||
| 649 | |||
| 650 | imx7_csi_update_buf(csi, phys, csi->buf_num); | ||
| 651 | } | ||
| 652 | |||
| 653 | static irqreturn_t imx7_csi_irq_handler(int irq, void *data) | ||
| 654 | { | ||
| 655 | struct imx7_csi *csi = data; | ||
| 656 | unsigned long status; | ||
| 657 | |||
| 658 | spin_lock(&csi->irqlock); | ||
| 659 | |||
| 660 | status = imx7_csi_irq_clear(csi); | ||
| 661 | |||
| 662 | if (status & BIT_RFF_OR_INT) { | ||
| 663 | dev_warn(csi->dev, "Rx fifo overflow\n"); | ||
| 664 | imx7_csi_error_recovery(csi); | ||
| 665 | } | ||
| 666 | |||
| 667 | if (status & BIT_HRESP_ERR_INT) { | ||
| 668 | dev_warn(csi->dev, "Hresponse error detected\n"); | ||
| 669 | imx7_csi_error_recovery(csi); | ||
| 670 | } | ||
| 671 | |||
| 672 | if (status & BIT_ADDR_CH_ERR_INT) { | ||
| 673 | imx7_csi_hw_disable(csi); | ||
| 674 | |||
| 675 | imx7_csi_dma_reflash(csi); | ||
| 676 | |||
| 677 | imx7_csi_hw_enable(csi); | ||
| 678 | } | ||
| 679 | |||
| 680 | if ((status & BIT_DMA_TSF_DONE_FB1) && | ||
| 681 | (status & BIT_DMA_TSF_DONE_FB2)) { | ||
| 682 | /* | ||
| 683 | * For both FB1 and FB2 interrupter bits set case, | ||
| 684 | * CSI DMA is work in one of FB1 and FB2 buffer, | ||
| 685 | * but software can not know the state. | ||
| 686 | * Skip it to avoid base address updated | ||
| 687 | * when csi work in field0 and field1 will write to | ||
| 688 | * new base address. | ||
| 689 | */ | ||
| 690 | } else if (status & BIT_DMA_TSF_DONE_FB1) { | ||
| 691 | csi->buf_num = 0; | ||
| 692 | } else if (status & BIT_DMA_TSF_DONE_FB2) { | ||
| 693 | csi->buf_num = 1; | ||
| 694 | } | ||
| 695 | |||
| 696 | if ((status & BIT_DMA_TSF_DONE_FB1) || | ||
| 697 | (status & BIT_DMA_TSF_DONE_FB2)) { | ||
| 698 | imx7_csi_vb2_buf_done(csi); | ||
| 699 | |||
| 700 | if (csi->last_eof) { | ||
| 701 | complete(&csi->last_eof_completion); | ||
| 702 | csi->last_eof = false; | ||
| 703 | } | ||
| 704 | } | ||
| 705 | |||
| 706 | spin_unlock(&csi->irqlock); | ||
| 707 | |||
| 708 | return IRQ_HANDLED; | ||
| 709 | } | ||
| 710 | |||
| 711 | static int imx7_csi_dma_start(struct imx7_csi *csi) | ||
| 712 | { | ||
| 713 | struct imx_media_video_dev *vdev = csi->vdev; | ||
| 714 | struct v4l2_pix_format *out_pix = &vdev->fmt.fmt.pix; | ||
| 715 | int ret; | ||
| 716 | |||
| 717 | ret = imx_media_alloc_dma_buf(csi->imxmd, &csi->underrun_buf, | ||
| 718 | out_pix->sizeimage); | ||
| 719 | if (ret < 0) { | ||
| 720 | v4l2_warn(&csi->sd, "consider increasing the CMA area\n"); | ||
| 721 | return ret; | ||
| 722 | } | ||
| 723 | |||
| 724 | csi->frame_sequence = 0; | ||
| 725 | csi->last_eof = false; | ||
| 726 | init_completion(&csi->last_eof_completion); | ||
| 727 | |||
| 728 | imx7_csi_setup_vb2_buf(csi); | ||
| 729 | |||
| 730 | return 0; | ||
| 731 | } | ||
| 732 | |||
| 733 | static void imx7_csi_dma_stop(struct imx7_csi *csi) | ||
| 734 | { | ||
| 735 | unsigned long timeout_jiffies; | ||
| 736 | unsigned long flags; | ||
| 737 | int ret; | ||
| 738 | |||
| 739 | /* mark next EOF interrupt as the last before stream off */ | ||
| 740 | spin_lock_irqsave(&csi->irqlock, flags); | ||
| 741 | csi->last_eof = true; | ||
| 742 | spin_unlock_irqrestore(&csi->irqlock, flags); | ||
| 743 | |||
| 744 | /* | ||
| 745 | * and then wait for interrupt handler to mark completion. | ||
| 746 | */ | ||
| 747 | timeout_jiffies = msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT); | ||
| 748 | ret = wait_for_completion_timeout(&csi->last_eof_completion, | ||
| 749 | timeout_jiffies); | ||
| 750 | if (ret == 0) | ||
| 751 | v4l2_warn(&csi->sd, "wait last EOF timeout\n"); | ||
| 752 | |||
| 753 | imx7_csi_hw_disable_irq(csi); | ||
| 754 | |||
| 755 | imx7_csi_dma_unsetup_vb2_buf(csi, VB2_BUF_STATE_ERROR); | ||
| 756 | |||
| 757 | imx_media_free_dma_buf(csi->imxmd, &csi->underrun_buf); | ||
| 758 | } | ||
| 759 | |||
| 760 | static int imx7_csi_configure(struct imx7_csi *csi) | ||
| 761 | { | ||
| 762 | struct imx_media_video_dev *vdev = csi->vdev; | ||
| 763 | struct v4l2_pix_format *out_pix = &vdev->fmt.fmt.pix; | ||
| 764 | __u32 in_code = csi->format_mbus[IMX7_CSI_PAD_SINK].code; | ||
| 765 | u32 cr1, cr18; | ||
| 766 | |||
| 767 | if (out_pix->field == V4L2_FIELD_INTERLACED) { | ||
| 768 | imx7_csi_deinterlace_enable(csi, true); | ||
| 769 | imx7_csi_buf_stride_set(csi, out_pix->width); | ||
| 770 | } else { | ||
| 771 | imx7_csi_deinterlace_enable(csi, false); | ||
| 772 | imx7_csi_buf_stride_set(csi, 0); | ||
| 773 | } | ||
| 774 | |||
| 775 | imx7_csi_set_imagpara(csi, out_pix->width, out_pix->height); | ||
| 776 | |||
| 777 | if (!csi->is_csi2) | ||
| 778 | return 0; | ||
| 779 | |||
| 780 | cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); | ||
| 781 | cr1 &= ~BIT_GCLK_MODE; | ||
| 782 | |||
| 783 | cr18 = imx7_csi_reg_read(csi, CSI_CSICR18); | ||
| 784 | cr18 &= BIT_MIPI_DATA_FORMAT_MASK; | ||
| 785 | cr18 |= BIT_DATA_FROM_MIPI; | ||
| 786 | |||
| 787 | switch (out_pix->pixelformat) { | ||
| 788 | case V4L2_PIX_FMT_UYVY: | ||
| 789 | case V4L2_PIX_FMT_YUYV: | ||
| 790 | cr18 |= BIT_MIPI_DATA_FORMAT_YUV422_8B; | ||
| 791 | break; | ||
| 792 | case V4L2_PIX_FMT_SBGGR8: | ||
| 793 | cr18 |= BIT_MIPI_DATA_FORMAT_RAW8; | ||
| 794 | break; | ||
| 795 | case V4L2_PIX_FMT_SBGGR16: | ||
| 796 | if (in_code == MEDIA_BUS_FMT_SBGGR10_1X10) | ||
| 797 | cr18 |= BIT_MIPI_DATA_FORMAT_RAW10; | ||
| 798 | else if (in_code == MEDIA_BUS_FMT_SBGGR12_1X12) | ||
| 799 | cr18 |= BIT_MIPI_DATA_FORMAT_RAW12; | ||
| 800 | else if (in_code == MEDIA_BUS_FMT_SBGGR14_1X14) | ||
| 801 | cr18 |= BIT_MIPI_DATA_FORMAT_RAW14; | ||
| 802 | cr1 |= BIT_PIXEL_BIT; | ||
| 803 | break; | ||
| 804 | default: | ||
| 805 | return -EINVAL; | ||
| 806 | } | ||
| 807 | |||
| 808 | imx7_csi_reg_write(csi, cr1, CSI_CSICR1); | ||
| 809 | imx7_csi_reg_write(csi, cr18, CSI_CSICR18); | ||
| 810 | |||
| 811 | return 0; | ||
| 812 | } | ||
| 813 | |||
| 814 | static int imx7_csi_enable(struct imx7_csi *csi) | ||
| 815 | { | ||
| 816 | imx7_csi_sw_reset(csi); | ||
| 817 | |||
| 818 | if (csi->is_csi2) { | ||
| 819 | imx7_csi_dmareq_rff_enable(csi); | ||
| 820 | imx7_csi_hw_enable_irq(csi); | ||
| 821 | imx7_csi_hw_enable(csi); | ||
| 822 | return 0; | ||
| 823 | } | ||
| 824 | |||
| 825 | return 0; | ||
| 826 | } | ||
| 827 | |||
| 828 | static void imx7_csi_disable(struct imx7_csi *csi) | ||
| 829 | { | ||
| 830 | imx7_csi_dmareq_rff_disable(csi); | ||
| 831 | |||
| 832 | imx7_csi_hw_disable_irq(csi); | ||
| 833 | |||
| 834 | imx7_csi_buf_stride_set(csi, 0); | ||
| 835 | |||
| 836 | imx7_csi_hw_disable(csi); | ||
| 837 | } | ||
| 838 | |||
| 839 | static int imx7_csi_streaming_start(struct imx7_csi *csi) | ||
| 840 | { | ||
| 841 | int ret; | ||
| 842 | |||
| 843 | ret = imx7_csi_dma_start(csi); | ||
| 844 | if (ret < 0) | ||
| 845 | return ret; | ||
| 846 | |||
| 847 | ret = imx7_csi_configure(csi); | ||
| 848 | if (ret < 0) | ||
| 849 | goto dma_stop; | ||
| 850 | |||
| 851 | imx7_csi_enable(csi); | ||
| 852 | |||
| 853 | return 0; | ||
| 854 | |||
| 855 | dma_stop: | ||
| 856 | imx7_csi_dma_stop(csi); | ||
| 857 | |||
| 858 | return ret; | ||
| 859 | } | ||
| 860 | |||
| 861 | static int imx7_csi_streaming_stop(struct imx7_csi *csi) | ||
| 862 | { | ||
| 863 | imx7_csi_dma_stop(csi); | ||
| 864 | |||
| 865 | imx7_csi_disable(csi); | ||
| 866 | |||
| 867 | return 0; | ||
| 868 | } | ||
| 869 | |||
| 870 | static int imx7_csi_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 871 | { | ||
| 872 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 873 | int ret = 0; | ||
| 874 | |||
| 875 | mutex_lock(&csi->lock); | ||
| 876 | |||
| 877 | if (!csi->src_sd || !csi->sink) { | ||
| 878 | ret = -EPIPE; | ||
| 879 | goto out_unlock; | ||
| 880 | } | ||
| 881 | |||
| 882 | if (csi->is_streaming == !!enable) | ||
| 883 | goto out_unlock; | ||
| 884 | |||
| 885 | if (enable) { | ||
| 886 | ret = v4l2_subdev_call(csi->src_sd, video, s_stream, 1); | ||
| 887 | if (ret < 0) | ||
| 888 | goto out_unlock; | ||
| 889 | |||
| 890 | ret = imx7_csi_streaming_start(csi); | ||
| 891 | if (ret < 0) { | ||
| 892 | v4l2_subdev_call(csi->src_sd, video, s_stream, 0); | ||
| 893 | goto out_unlock; | ||
| 894 | } | ||
| 895 | } else { | ||
| 896 | imx7_csi_streaming_stop(csi); | ||
| 897 | |||
| 898 | v4l2_subdev_call(csi->src_sd, video, s_stream, 0); | ||
| 899 | } | ||
| 900 | |||
| 901 | csi->is_streaming = !!enable; | ||
| 902 | |||
| 903 | out_unlock: | ||
| 904 | mutex_unlock(&csi->lock); | ||
| 905 | |||
| 906 | return ret; | ||
| 907 | } | ||
| 908 | |||
| 909 | static struct v4l2_mbus_framefmt * | ||
| 910 | imx7_csi_get_format(struct imx7_csi *csi, | ||
| 911 | struct v4l2_subdev_pad_config *cfg, | ||
| 912 | unsigned int pad, | ||
| 913 | enum v4l2_subdev_format_whence which) | ||
| 914 | { | ||
| 915 | if (which == V4L2_SUBDEV_FORMAT_TRY) | ||
| 916 | return v4l2_subdev_get_try_format(&csi->sd, cfg, pad); | ||
| 917 | |||
| 918 | return &csi->format_mbus[pad]; | ||
| 919 | } | ||
| 920 | |||
| 921 | static int imx7_csi_enum_mbus_code(struct v4l2_subdev *sd, | ||
| 922 | struct v4l2_subdev_pad_config *cfg, | ||
| 923 | struct v4l2_subdev_mbus_code_enum *code) | ||
| 924 | { | ||
| 925 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 926 | struct v4l2_mbus_framefmt *in_fmt; | ||
| 927 | int ret = 0; | ||
| 928 | |||
| 929 | mutex_lock(&csi->lock); | ||
| 930 | |||
| 931 | in_fmt = imx7_csi_get_format(csi, cfg, IMX7_CSI_PAD_SINK, code->which); | ||
| 932 | |||
| 933 | switch (code->pad) { | ||
| 934 | case IMX7_CSI_PAD_SINK: | ||
| 935 | ret = imx_media_enum_mbus_format(&code->code, code->index, | ||
| 936 | CS_SEL_ANY, true); | ||
| 937 | break; | ||
| 938 | case IMX7_CSI_PAD_SRC: | ||
| 939 | if (code->index != 0) { | ||
| 940 | ret = -EINVAL; | ||
| 941 | goto out_unlock; | ||
| 942 | } | ||
| 943 | |||
| 944 | code->code = in_fmt->code; | ||
| 945 | break; | ||
| 946 | default: | ||
| 947 | ret = -EINVAL; | ||
| 948 | } | ||
| 949 | |||
| 950 | out_unlock: | ||
| 951 | mutex_unlock(&csi->lock); | ||
| 952 | |||
| 953 | return ret; | ||
| 954 | } | ||
| 955 | |||
| 956 | static int imx7_csi_get_fmt(struct v4l2_subdev *sd, | ||
| 957 | struct v4l2_subdev_pad_config *cfg, | ||
| 958 | struct v4l2_subdev_format *sdformat) | ||
| 959 | { | ||
| 960 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 961 | struct v4l2_mbus_framefmt *fmt; | ||
| 962 | int ret = 0; | ||
| 963 | |||
| 964 | mutex_lock(&csi->lock); | ||
| 965 | |||
| 966 | fmt = imx7_csi_get_format(csi, cfg, sdformat->pad, sdformat->which); | ||
| 967 | if (!fmt) { | ||
| 968 | ret = -EINVAL; | ||
| 969 | goto out_unlock; | ||
| 970 | } | ||
| 971 | |||
| 972 | sdformat->format = *fmt; | ||
| 973 | |||
| 974 | out_unlock: | ||
| 975 | mutex_unlock(&csi->lock); | ||
| 976 | |||
| 977 | return ret; | ||
| 978 | } | ||
| 979 | |||
| 980 | static int imx7_csi_try_fmt(struct imx7_csi *csi, | ||
| 981 | struct v4l2_subdev_pad_config *cfg, | ||
| 982 | struct v4l2_subdev_format *sdformat, | ||
| 983 | const struct imx_media_pixfmt **cc) | ||
| 984 | { | ||
| 985 | const struct imx_media_pixfmt *in_cc; | ||
| 986 | struct v4l2_mbus_framefmt *in_fmt; | ||
| 987 | u32 code; | ||
| 988 | |||
| 989 | in_fmt = imx7_csi_get_format(csi, cfg, IMX7_CSI_PAD_SINK, | ||
| 990 | sdformat->which); | ||
| 991 | if (!in_fmt) | ||
| 992 | return -EINVAL; | ||
| 993 | |||
| 994 | switch (sdformat->pad) { | ||
| 995 | case IMX7_CSI_PAD_SRC: | ||
| 996 | in_cc = imx_media_find_mbus_format(in_fmt->code, CS_SEL_ANY, | ||
| 997 | true); | ||
| 998 | |||
| 999 | sdformat->format.width = in_fmt->width; | ||
| 1000 | sdformat->format.height = in_fmt->height; | ||
| 1001 | sdformat->format.code = in_fmt->code; | ||
| 1002 | *cc = in_cc; | ||
| 1003 | |||
| 1004 | sdformat->format.colorspace = in_fmt->colorspace; | ||
| 1005 | sdformat->format.xfer_func = in_fmt->xfer_func; | ||
| 1006 | sdformat->format.quantization = in_fmt->quantization; | ||
| 1007 | sdformat->format.ycbcr_enc = in_fmt->ycbcr_enc; | ||
| 1008 | break; | ||
| 1009 | case IMX7_CSI_PAD_SINK: | ||
| 1010 | *cc = imx_media_find_mbus_format(sdformat->format.code, | ||
| 1011 | CS_SEL_ANY, true); | ||
| 1012 | if (!*cc) { | ||
| 1013 | imx_media_enum_mbus_format(&code, 0, CS_SEL_ANY, false); | ||
| 1014 | *cc = imx_media_find_mbus_format(code, CS_SEL_ANY, | ||
| 1015 | false); | ||
| 1016 | sdformat->format.code = (*cc)->codes[0]; | ||
| 1017 | } | ||
| 1018 | |||
| 1019 | imx_media_fill_default_mbus_fields(&sdformat->format, in_fmt, | ||
| 1020 | false); | ||
| 1021 | break; | ||
| 1022 | default: | ||
| 1023 | return -EINVAL; | ||
| 1024 | break; | ||
| 1025 | } | ||
| 1026 | return 0; | ||
| 1027 | } | ||
| 1028 | |||
| 1029 | static int imx7_csi_set_fmt(struct v4l2_subdev *sd, | ||
| 1030 | struct v4l2_subdev_pad_config *cfg, | ||
| 1031 | struct v4l2_subdev_format *sdformat) | ||
| 1032 | { | ||
| 1033 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 1034 | struct imx_media_video_dev *vdev = csi->vdev; | ||
| 1035 | const struct imx_media_pixfmt *outcc; | ||
| 1036 | struct v4l2_mbus_framefmt *outfmt; | ||
| 1037 | struct v4l2_pix_format vdev_fmt; | ||
| 1038 | struct v4l2_rect vdev_compose; | ||
| 1039 | const struct imx_media_pixfmt *cc; | ||
| 1040 | struct v4l2_mbus_framefmt *fmt; | ||
| 1041 | struct v4l2_subdev_format format; | ||
| 1042 | int ret = 0; | ||
| 1043 | |||
| 1044 | if (sdformat->pad >= IMX7_CSI_PADS_NUM) | ||
| 1045 | return -EINVAL; | ||
| 1046 | |||
| 1047 | mutex_lock(&csi->lock); | ||
| 1048 | |||
| 1049 | if (csi->is_streaming) { | ||
| 1050 | ret = -EBUSY; | ||
| 1051 | goto out_unlock; | ||
| 1052 | } | ||
| 1053 | |||
| 1054 | imx7_csi_try_fmt(csi, cfg, sdformat, &cc); | ||
| 1055 | |||
| 1056 | fmt = imx7_csi_get_format(csi, cfg, sdformat->pad, sdformat->which); | ||
| 1057 | if (!fmt) { | ||
| 1058 | ret = -EINVAL; | ||
| 1059 | goto out_unlock; | ||
| 1060 | } | ||
| 1061 | |||
| 1062 | *fmt = sdformat->format; | ||
| 1063 | |||
| 1064 | if (sdformat->pad == IMX7_CSI_PAD_SINK) { | ||
| 1065 | /* propagate format to source pads */ | ||
| 1066 | format.pad = IMX7_CSI_PAD_SRC; | ||
| 1067 | format.which = sdformat->which; | ||
| 1068 | format.format = sdformat->format; | ||
| 1069 | if (imx7_csi_try_fmt(csi, cfg, &format, &outcc)) { | ||
| 1070 | ret = -EINVAL; | ||
| 1071 | goto out_unlock; | ||
| 1072 | } | ||
| 1073 | outfmt = imx7_csi_get_format(csi, cfg, IMX7_CSI_PAD_SRC, | ||
| 1074 | sdformat->which); | ||
| 1075 | *outfmt = format.format; | ||
| 1076 | |||
| 1077 | if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 1078 | csi->cc[IMX7_CSI_PAD_SRC] = outcc; | ||
| 1079 | } | ||
| 1080 | |||
| 1081 | if (sdformat->which == V4L2_SUBDEV_FORMAT_TRY) | ||
| 1082 | goto out_unlock; | ||
| 1083 | |||
| 1084 | csi->cc[sdformat->pad] = cc; | ||
| 1085 | |||
| 1086 | /* propagate output pad format to capture device */ | ||
| 1087 | imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt, &vdev_compose, | ||
| 1088 | &csi->format_mbus[IMX7_CSI_PAD_SRC], | ||
| 1089 | csi->cc[IMX7_CSI_PAD_SRC]); | ||
| 1090 | mutex_unlock(&csi->lock); | ||
| 1091 | imx_media_capture_device_set_format(vdev, &vdev_fmt, &vdev_compose); | ||
| 1092 | |||
| 1093 | return 0; | ||
| 1094 | |||
| 1095 | out_unlock: | ||
| 1096 | mutex_unlock(&csi->lock); | ||
| 1097 | |||
| 1098 | return ret; | ||
| 1099 | } | ||
| 1100 | |||
| 1101 | static int imx7_csi_registered(struct v4l2_subdev *sd) | ||
| 1102 | { | ||
| 1103 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 1104 | int ret; | ||
| 1105 | int i; | ||
| 1106 | |||
| 1107 | for (i = 0; i < IMX7_CSI_PADS_NUM; i++) { | ||
| 1108 | csi->pad[i].flags = (i == IMX7_CSI_PAD_SINK) ? | ||
| 1109 | MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE; | ||
| 1110 | |||
| 1111 | /* set a default mbus format */ | ||
| 1112 | ret = imx_media_init_mbus_fmt(&csi->format_mbus[i], | ||
| 1113 | 800, 600, 0, V4L2_FIELD_NONE, | ||
| 1114 | &csi->cc[i]); | ||
| 1115 | if (ret < 0) | ||
| 1116 | return ret; | ||
| 1117 | |||
| 1118 | /* init default frame interval */ | ||
| 1119 | csi->frame_interval[i].numerator = 1; | ||
| 1120 | csi->frame_interval[i].denominator = 30; | ||
| 1121 | } | ||
| 1122 | |||
| 1123 | ret = media_entity_pads_init(&sd->entity, IMX7_CSI_PADS_NUM, csi->pad); | ||
| 1124 | if (ret < 0) | ||
| 1125 | return ret; | ||
| 1126 | |||
| 1127 | ret = imx_media_capture_device_register(csi->vdev); | ||
| 1128 | if (ret < 0) | ||
| 1129 | return ret; | ||
| 1130 | |||
| 1131 | ret = imx_media_add_video_device(csi->imxmd, csi->vdev); | ||
| 1132 | if (ret < 0) { | ||
| 1133 | imx_media_capture_device_unregister(csi->vdev); | ||
| 1134 | return ret; | ||
| 1135 | } | ||
| 1136 | |||
| 1137 | return 0; | ||
| 1138 | } | ||
| 1139 | |||
| 1140 | static void imx7_csi_unregistered(struct v4l2_subdev *sd) | ||
| 1141 | { | ||
| 1142 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 1143 | |||
| 1144 | imx_media_capture_device_unregister(csi->vdev); | ||
| 1145 | } | ||
| 1146 | |||
| 1147 | static int imx7_csi_init_cfg(struct v4l2_subdev *sd, | ||
| 1148 | struct v4l2_subdev_pad_config *cfg) | ||
| 1149 | { | ||
| 1150 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 1151 | struct v4l2_mbus_framefmt *mf; | ||
| 1152 | int ret; | ||
| 1153 | int i; | ||
| 1154 | |||
| 1155 | for (i = 0; i < IMX7_CSI_PADS_NUM; i++) { | ||
| 1156 | mf = v4l2_subdev_get_try_format(sd, cfg, i); | ||
| 1157 | |||
| 1158 | ret = imx_media_init_mbus_fmt(mf, 800, 600, 0, V4L2_FIELD_NONE, | ||
| 1159 | &csi->cc[i]); | ||
| 1160 | if (ret < 0) | ||
| 1161 | return ret; | ||
| 1162 | } | ||
| 1163 | |||
| 1164 | return 0; | ||
| 1165 | } | ||
| 1166 | |||
| 1167 | static const struct media_entity_operations imx7_csi_entity_ops = { | ||
| 1168 | .link_setup = imx7_csi_link_setup, | ||
| 1169 | .link_validate = v4l2_subdev_link_validate, | ||
| 1170 | }; | ||
| 1171 | |||
| 1172 | static const struct v4l2_subdev_video_ops imx7_csi_video_ops = { | ||
| 1173 | .s_stream = imx7_csi_s_stream, | ||
| 1174 | }; | ||
| 1175 | |||
| 1176 | static const struct v4l2_subdev_pad_ops imx7_csi_pad_ops = { | ||
| 1177 | .init_cfg = imx7_csi_init_cfg, | ||
| 1178 | .enum_mbus_code = imx7_csi_enum_mbus_code, | ||
| 1179 | .get_fmt = imx7_csi_get_fmt, | ||
| 1180 | .set_fmt = imx7_csi_set_fmt, | ||
| 1181 | .link_validate = imx7_csi_pad_link_validate, | ||
| 1182 | }; | ||
| 1183 | |||
| 1184 | static const struct v4l2_subdev_ops imx7_csi_subdev_ops = { | ||
| 1185 | .video = &imx7_csi_video_ops, | ||
| 1186 | .pad = &imx7_csi_pad_ops, | ||
| 1187 | }; | ||
| 1188 | |||
| 1189 | static const struct v4l2_subdev_internal_ops imx7_csi_internal_ops = { | ||
| 1190 | .registered = imx7_csi_registered, | ||
| 1191 | .unregistered = imx7_csi_unregistered, | ||
| 1192 | }; | ||
| 1193 | |||
| 1194 | static int imx7_csi_parse_endpoint(struct device *dev, | ||
| 1195 | struct v4l2_fwnode_endpoint *vep, | ||
| 1196 | struct v4l2_async_subdev *asd) | ||
| 1197 | { | ||
| 1198 | return fwnode_device_is_available(asd->match.fwnode) ? 0 : -EINVAL; | ||
| 1199 | } | ||
| 1200 | |||
| 1201 | static int imx7_csi_clocks_get(struct imx7_csi *csi) | ||
| 1202 | { | ||
| 1203 | struct device *dev = csi->dev; | ||
| 1204 | int i; | ||
| 1205 | |||
| 1206 | csi->num_clks = ARRAY_SIZE(imx7_csi_clk_id); | ||
| 1207 | csi->clks = devm_kcalloc(dev, csi->num_clks, sizeof(*csi->clks), | ||
| 1208 | GFP_KERNEL); | ||
| 1209 | |||
| 1210 | if (!csi->clks) | ||
| 1211 | return -ENOMEM; | ||
| 1212 | |||
| 1213 | for (i = 0; i < csi->num_clks; i++) | ||
| 1214 | csi->clks[i].id = imx7_csi_clk_id[i]; | ||
| 1215 | |||
| 1216 | return devm_clk_bulk_get(dev, csi->num_clks, csi->clks); | ||
| 1217 | } | ||
| 1218 | |||
| 1219 | static int imx7_csi_probe(struct platform_device *pdev) | ||
| 1220 | { | ||
| 1221 | struct device *dev = &pdev->dev; | ||
| 1222 | struct device_node *node = dev->of_node; | ||
| 1223 | struct imx_media_dev *imxmd; | ||
| 1224 | struct imx7_csi *csi; | ||
| 1225 | struct resource *res; | ||
| 1226 | int ret; | ||
| 1227 | |||
| 1228 | csi = devm_kzalloc(&pdev->dev, sizeof(*csi), GFP_KERNEL); | ||
| 1229 | if (!csi) | ||
| 1230 | return -ENOMEM; | ||
| 1231 | |||
| 1232 | csi->dev = dev; | ||
| 1233 | |||
| 1234 | ret = imx7_csi_clocks_get(csi); | ||
| 1235 | if (ret < 0) { | ||
| 1236 | dev_err(dev, "Failed to get clocks"); | ||
| 1237 | return -ENODEV; | ||
| 1238 | } | ||
| 1239 | |||
| 1240 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 1241 | csi->irq = platform_get_irq(pdev, 0); | ||
| 1242 | if (!res || csi->irq < 0) { | ||
| 1243 | dev_err(dev, "Missing platform resources data\n"); | ||
| 1244 | return -ENODEV; | ||
| 1245 | } | ||
| 1246 | |||
| 1247 | csi->regbase = devm_ioremap_resource(dev, res); | ||
| 1248 | if (IS_ERR(csi->regbase)) { | ||
| 1249 | dev_err(dev, "Failed platform resources map\n"); | ||
| 1250 | return -ENODEV; | ||
| 1251 | } | ||
| 1252 | |||
| 1253 | spin_lock_init(&csi->irqlock); | ||
| 1254 | mutex_init(&csi->lock); | ||
| 1255 | |||
| 1256 | /* install interrupt handler */ | ||
| 1257 | ret = devm_request_irq(dev, csi->irq, imx7_csi_irq_handler, 0, "csi", | ||
| 1258 | (void *)csi); | ||
| 1259 | if (ret < 0) { | ||
| 1260 | dev_err(dev, "Request CSI IRQ failed.\n"); | ||
| 1261 | ret = -ENODEV; | ||
| 1262 | goto destroy_mutex; | ||
| 1263 | } | ||
| 1264 | |||
| 1265 | /* add media device */ | ||
| 1266 | imxmd = imx_media_dev_init(dev); | ||
| 1267 | if (IS_ERR(imxmd)) { | ||
| 1268 | ret = PTR_ERR(imxmd); | ||
| 1269 | goto destroy_mutex; | ||
| 1270 | } | ||
| 1271 | platform_set_drvdata(pdev, &csi->sd); | ||
| 1272 | |||
| 1273 | ret = imx_media_of_add_csi(imxmd, node); | ||
| 1274 | if (ret < 0) | ||
| 1275 | goto cleanup; | ||
| 1276 | |||
| 1277 | ret = imx_media_dev_notifier_register(imxmd); | ||
| 1278 | if (ret < 0) | ||
| 1279 | goto cleanup; | ||
| 1280 | |||
| 1281 | csi->imxmd = imxmd; | ||
| 1282 | v4l2_subdev_init(&csi->sd, &imx7_csi_subdev_ops); | ||
| 1283 | v4l2_set_subdevdata(&csi->sd, csi); | ||
| 1284 | csi->sd.internal_ops = &imx7_csi_internal_ops; | ||
| 1285 | csi->sd.entity.ops = &imx7_csi_entity_ops; | ||
| 1286 | csi->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; | ||
| 1287 | csi->sd.dev = &pdev->dev; | ||
| 1288 | csi->sd.owner = THIS_MODULE; | ||
| 1289 | csi->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE; | ||
| 1290 | csi->sd.grp_id = IMX_MEDIA_GRP_ID_CSI; | ||
| 1291 | snprintf(csi->sd.name, sizeof(csi->sd.name), "csi"); | ||
| 1292 | |||
| 1293 | csi->vdev = imx_media_capture_device_init(&csi->sd, IMX7_CSI_PAD_SRC); | ||
| 1294 | if (IS_ERR(csi->vdev)) | ||
| 1295 | return PTR_ERR(csi->vdev); | ||
| 1296 | |||
| 1297 | v4l2_ctrl_handler_init(&csi->ctrl_hdlr, 0); | ||
| 1298 | csi->sd.ctrl_handler = &csi->ctrl_hdlr; | ||
| 1299 | |||
| 1300 | ret = v4l2_async_register_fwnode_subdev(&csi->sd, | ||
| 1301 | sizeof(struct v4l2_async_subdev), | ||
| 1302 | NULL, 0, | ||
| 1303 | imx7_csi_parse_endpoint); | ||
| 1304 | if (ret) | ||
| 1305 | goto free; | ||
| 1306 | |||
| 1307 | return 0; | ||
| 1308 | |||
| 1309 | free: | ||
| 1310 | imx_media_capture_device_unregister(csi->vdev); | ||
| 1311 | imx_media_capture_device_remove(csi->vdev); | ||
| 1312 | v4l2_ctrl_handler_free(&csi->ctrl_hdlr); | ||
| 1313 | |||
| 1314 | cleanup: | ||
| 1315 | v4l2_async_notifier_cleanup(&imxmd->notifier); | ||
| 1316 | v4l2_device_unregister(&imxmd->v4l2_dev); | ||
| 1317 | media_device_unregister(&imxmd->md); | ||
| 1318 | media_device_cleanup(&imxmd->md); | ||
| 1319 | |||
| 1320 | destroy_mutex: | ||
| 1321 | mutex_destroy(&csi->lock); | ||
| 1322 | |||
| 1323 | return ret; | ||
| 1324 | } | ||
| 1325 | |||
| 1326 | static int imx7_csi_remove(struct platform_device *pdev) | ||
| 1327 | { | ||
| 1328 | struct v4l2_subdev *sd = platform_get_drvdata(pdev); | ||
| 1329 | struct imx7_csi *csi = v4l2_get_subdevdata(sd); | ||
| 1330 | struct imx_media_dev *imxmd = csi->imxmd; | ||
| 1331 | |||
| 1332 | v4l2_async_notifier_unregister(&imxmd->notifier); | ||
| 1333 | v4l2_async_notifier_cleanup(&imxmd->notifier); | ||
| 1334 | |||
| 1335 | media_device_unregister(&imxmd->md); | ||
| 1336 | v4l2_device_unregister(&imxmd->v4l2_dev); | ||
| 1337 | media_device_cleanup(&imxmd->md); | ||
| 1338 | |||
| 1339 | imx_media_capture_device_unregister(csi->vdev); | ||
| 1340 | imx_media_capture_device_remove(csi->vdev); | ||
| 1341 | |||
| 1342 | v4l2_async_unregister_subdev(sd); | ||
| 1343 | v4l2_ctrl_handler_free(&csi->ctrl_hdlr); | ||
| 1344 | |||
| 1345 | mutex_destroy(&csi->lock); | ||
| 1346 | |||
| 1347 | return 0; | ||
| 1348 | } | ||
| 1349 | |||
| 1350 | static const struct of_device_id imx7_csi_of_match[] = { | ||
| 1351 | { .compatible = "fsl,imx7-csi" }, | ||
| 1352 | { }, | ||
| 1353 | }; | ||
| 1354 | MODULE_DEVICE_TABLE(of, imx7_csi_of_match); | ||
| 1355 | |||
| 1356 | static struct platform_driver imx7_csi_driver = { | ||
| 1357 | .probe = imx7_csi_probe, | ||
| 1358 | .remove = imx7_csi_remove, | ||
| 1359 | .driver = { | ||
| 1360 | .of_match_table = imx7_csi_of_match, | ||
| 1361 | .name = "imx7-csi", | ||
| 1362 | }, | ||
| 1363 | }; | ||
| 1364 | module_platform_driver(imx7_csi_driver); | ||
| 1365 | |||
| 1366 | MODULE_DESCRIPTION("i.MX7 CSI subdev driver"); | ||
| 1367 | MODULE_AUTHOR("Rui Miguel Silva <rui.silva@linaro.org>"); | ||
| 1368 | MODULE_LICENSE("GPL v2"); | ||
| 1369 | MODULE_ALIAS("platform:imx7-csi"); | ||
diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c new file mode 100644 index 000000000000..2ddcc42ab8ff --- /dev/null +++ b/drivers/staging/media/imx/imx7-mipi-csis.c | |||
| @@ -0,0 +1,1160 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* | ||
| 3 | * Freescale i.MX7 SoC series MIPI-CSI V3.3 receiver driver | ||
| 4 | * | ||
| 5 | * Copyright (C) 2019 Linaro Ltd | ||
| 6 | * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. All Rights Reserved. | ||
| 7 | * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. | ||
| 8 | * | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/clk.h> | ||
| 12 | #include <linux/delay.h> | ||
| 13 | #include <linux/errno.h> | ||
| 14 | #include <linux/interrupt.h> | ||
| 15 | #include <linux/io.h> | ||
| 16 | #include <linux/irq.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/mfd/syscon.h> | ||
| 19 | #include <linux/module.h> | ||
| 20 | #include <linux/of_graph.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/pm_runtime.h> | ||
| 23 | #include <linux/reset.h> | ||
| 24 | #include <linux/regulator/consumer.h> | ||
| 25 | #include <linux/spinlock.h> | ||
| 26 | |||
| 27 | #include <media/v4l2-device.h> | ||
| 28 | #include <media/v4l2-fwnode.h> | ||
| 29 | #include <media/v4l2-subdev.h> | ||
| 30 | |||
| 31 | #include "imx-media.h" | ||
| 32 | |||
| 33 | #define CSIS_DRIVER_NAME "imx7-mipi-csis" | ||
| 34 | #define CSIS_SUBDEV_NAME CSIS_DRIVER_NAME | ||
| 35 | |||
| 36 | #define CSIS_PAD_SINK 0 | ||
| 37 | #define CSIS_PAD_SOURCE 1 | ||
| 38 | #define CSIS_PADS_NUM 2 | ||
| 39 | |||
| 40 | #define MIPI_CSIS_DEF_PIX_WIDTH 640 | ||
| 41 | #define MIPI_CSIS_DEF_PIX_HEIGHT 480 | ||
| 42 | |||
| 43 | /* Register map definition */ | ||
| 44 | |||
| 45 | /* CSIS common control */ | ||
| 46 | #define MIPI_CSIS_CMN_CTRL 0x04 | ||
| 47 | #define MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW BIT(16) | ||
| 48 | #define MIPI_CSIS_CMN_CTRL_INTER_MODE BIT(10) | ||
| 49 | #define MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL BIT(2) | ||
| 50 | #define MIPI_CSIS_CMN_CTRL_RESET BIT(1) | ||
| 51 | #define MIPI_CSIS_CMN_CTRL_ENABLE BIT(0) | ||
| 52 | |||
| 53 | #define MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET 8 | ||
| 54 | #define MIPI_CSIS_CMN_CTRL_LANE_NR_MASK (3 << 8) | ||
| 55 | |||
| 56 | /* CSIS clock control */ | ||
| 57 | #define MIPI_CSIS_CLK_CTRL 0x08 | ||
| 58 | #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH3(x) ((x) << 28) | ||
| 59 | #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH2(x) ((x) << 24) | ||
| 60 | #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH1(x) ((x) << 20) | ||
| 61 | #define MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH0(x) ((x) << 16) | ||
| 62 | #define MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK (0xf << 4) | ||
| 63 | #define MIPI_CSIS_CLK_CTRL_WCLK_SRC BIT(0) | ||
| 64 | |||
| 65 | /* CSIS Interrupt mask */ | ||
| 66 | #define MIPI_CSIS_INTMSK 0x10 | ||
| 67 | #define MIPI_CSIS_INTMSK_EVEN_BEFORE BIT(31) | ||
| 68 | #define MIPI_CSIS_INTMSK_EVEN_AFTER BIT(30) | ||
| 69 | #define MIPI_CSIS_INTMSK_ODD_BEFORE BIT(29) | ||
| 70 | #define MIPI_CSIS_INTMSK_ODD_AFTER BIT(28) | ||
| 71 | #define MIPI_CSIS_INTMSK_FRAME_START BIT(24) | ||
| 72 | #define MIPI_CSIS_INTMSK_FRAME_END BIT(20) | ||
| 73 | #define MIPI_CSIS_INTMSK_ERR_SOT_HS BIT(16) | ||
| 74 | #define MIPI_CSIS_INTMSK_ERR_LOST_FS BIT(12) | ||
| 75 | #define MIPI_CSIS_INTMSK_ERR_LOST_FE BIT(8) | ||
| 76 | #define MIPI_CSIS_INTMSK_ERR_OVER BIT(4) | ||
| 77 | #define MIPI_CSIS_INTMSK_ERR_WRONG_CFG BIT(3) | ||
| 78 | #define MIPI_CSIS_INTMSK_ERR_ECC BIT(2) | ||
| 79 | #define MIPI_CSIS_INTMSK_ERR_CRC BIT(1) | ||
| 80 | #define MIPI_CSIS_INTMSK_ERR_UNKNOWN BIT(0) | ||
| 81 | |||
| 82 | /* CSIS Interrupt source */ | ||
| 83 | #define MIPI_CSIS_INTSRC 0x14 | ||
| 84 | #define MIPI_CSIS_INTSRC_EVEN_BEFORE BIT(31) | ||
| 85 | #define MIPI_CSIS_INTSRC_EVEN_AFTER BIT(30) | ||
| 86 | #define MIPI_CSIS_INTSRC_EVEN BIT(30) | ||
| 87 | #define MIPI_CSIS_INTSRC_ODD_BEFORE BIT(29) | ||
| 88 | #define MIPI_CSIS_INTSRC_ODD_AFTER BIT(28) | ||
| 89 | #define MIPI_CSIS_INTSRC_ODD (0x3 << 28) | ||
| 90 | #define MIPI_CSIS_INTSRC_NON_IMAGE_DATA (0xf << 28) | ||
| 91 | #define MIPI_CSIS_INTSRC_FRAME_START BIT(24) | ||
| 92 | #define MIPI_CSIS_INTSRC_FRAME_END BIT(20) | ||
| 93 | #define MIPI_CSIS_INTSRC_ERR_SOT_HS BIT(16) | ||
| 94 | #define MIPI_CSIS_INTSRC_ERR_LOST_FS BIT(12) | ||
| 95 | #define MIPI_CSIS_INTSRC_ERR_LOST_FE BIT(8) | ||
| 96 | #define MIPI_CSIS_INTSRC_ERR_OVER BIT(4) | ||
| 97 | #define MIPI_CSIS_INTSRC_ERR_WRONG_CFG BIT(3) | ||
| 98 | #define MIPI_CSIS_INTSRC_ERR_ECC BIT(2) | ||
| 99 | #define MIPI_CSIS_INTSRC_ERR_CRC BIT(1) | ||
| 100 | #define MIPI_CSIS_INTSRC_ERR_UNKNOWN BIT(0) | ||
| 101 | #define MIPI_CSIS_INTSRC_ERRORS 0xfffff | ||
| 102 | |||
| 103 | /* D-PHY status control */ | ||
| 104 | #define MIPI_CSIS_DPHYSTATUS 0x20 | ||
| 105 | #define MIPI_CSIS_DPHYSTATUS_ULPS_DAT BIT(8) | ||
| 106 | #define MIPI_CSIS_DPHYSTATUS_STOPSTATE_DAT BIT(4) | ||
| 107 | #define MIPI_CSIS_DPHYSTATUS_ULPS_CLK BIT(1) | ||
| 108 | #define MIPI_CSIS_DPHYSTATUS_STOPSTATE_CLK BIT(0) | ||
| 109 | |||
| 110 | /* D-PHY common control */ | ||
| 111 | #define MIPI_CSIS_DPHYCTRL 0x24 | ||
| 112 | #define MIPI_CSIS_DPHYCTRL_HSS_MASK (0xff << 24) | ||
| 113 | #define MIPI_CSIS_DPHYCTRL_HSS_OFFSET 24 | ||
| 114 | #define MIPI_CSIS_DPHYCTRL_SCLKS_MASK (0x3 << 22) | ||
| 115 | #define MIPI_CSIS_DPHYCTRL_SCLKS_OFFSET 22 | ||
| 116 | #define MIPI_CSIS_DPHYCTRL_DPDN_SWAP_CLK BIT(6) | ||
| 117 | #define MIPI_CSIS_DPHYCTRL_DPDN_SWAP_DAT BIT(5) | ||
| 118 | #define MIPI_CSIS_DPHYCTRL_ENABLE_DAT BIT(1) | ||
| 119 | #define MIPI_CSIS_DPHYCTRL_ENABLE_CLK BIT(0) | ||
| 120 | #define MIPI_CSIS_DPHYCTRL_ENABLE (0x1f << 0) | ||
| 121 | |||
| 122 | /* D-PHY Master and Slave Control register Low */ | ||
| 123 | #define MIPI_CSIS_DPHYBCTRL_L 0x30 | ||
| 124 | /* D-PHY Master and Slave Control register High */ | ||
| 125 | #define MIPI_CSIS_DPHYBCTRL_H 0x34 | ||
| 126 | /* D-PHY Slave Control register Low */ | ||
| 127 | #define MIPI_CSIS_DPHYSCTRL_L 0x38 | ||
| 128 | /* D-PHY Slave Control register High */ | ||
| 129 | #define MIPI_CSIS_DPHYSCTRL_H 0x3c | ||
| 130 | |||
| 131 | /* ISP Configuration register */ | ||
| 132 | #define MIPI_CSIS_ISPCONFIG_CH0 0x40 | ||
| 133 | #define MIPI_CSIS_ISPCONFIG_CH1 0x50 | ||
| 134 | #define MIPI_CSIS_ISPCONFIG_CH2 0x60 | ||
| 135 | #define MIPI_CSIS_ISPCONFIG_CH3 0x70 | ||
| 136 | |||
| 137 | #define MIPI_CSIS_ISPCFG_MEM_FULL_GAP_MSK (0xff << 24) | ||
| 138 | #define MIPI_CSIS_ISPCFG_MEM_FULL_GAP(x) ((x) << 24) | ||
| 139 | #define MIPI_CSIS_ISPCFG_DOUBLE_CMPNT BIT(12) | ||
| 140 | #define MIPI_CSIS_ISPCFG_ALIGN_32BIT BIT(11) | ||
| 141 | #define MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT (0x1e << 2) | ||
| 142 | #define MIPI_CSIS_ISPCFG_FMT_RAW8 (0x2a << 2) | ||
| 143 | #define MIPI_CSIS_ISPCFG_FMT_RAW10 (0x2b << 2) | ||
| 144 | #define MIPI_CSIS_ISPCFG_FMT_RAW12 (0x2c << 2) | ||
| 145 | |||
| 146 | /* User defined formats, x = 1...4 */ | ||
| 147 | #define MIPI_CSIS_ISPCFG_FMT_USER(x) ((0x30 + (x) - 1) << 2) | ||
| 148 | #define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2) | ||
| 149 | |||
| 150 | /* ISP Image Resolution register */ | ||
| 151 | #define MIPI_CSIS_ISPRESOL_CH0 0x44 | ||
| 152 | #define MIPI_CSIS_ISPRESOL_CH1 0x54 | ||
| 153 | #define MIPI_CSIS_ISPRESOL_CH2 0x64 | ||
| 154 | #define MIPI_CSIS_ISPRESOL_CH3 0x74 | ||
| 155 | #define CSIS_MAX_PIX_WIDTH 0xffff | ||
| 156 | #define CSIS_MAX_PIX_HEIGHT 0xffff | ||
| 157 | |||
| 158 | /* ISP SYNC register */ | ||
| 159 | #define MIPI_CSIS_ISPSYNC_CH0 0x48 | ||
| 160 | #define MIPI_CSIS_ISPSYNC_CH1 0x58 | ||
| 161 | #define MIPI_CSIS_ISPSYNC_CH2 0x68 | ||
| 162 | #define MIPI_CSIS_ISPSYNC_CH3 0x78 | ||
| 163 | |||
| 164 | #define MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET 18 | ||
| 165 | #define MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET 12 | ||
| 166 | #define MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET 0 | ||
| 167 | |||
| 168 | /* Non-image packet data buffers */ | ||
| 169 | #define MIPI_CSIS_PKTDATA_ODD 0x2000 | ||
| 170 | #define MIPI_CSIS_PKTDATA_EVEN 0x3000 | ||
| 171 | #define MIPI_CSIS_PKTDATA_SIZE SZ_4K | ||
| 172 | |||
| 173 | #define DEFAULT_SCLK_CSIS_FREQ 166000000UL | ||
| 174 | |||
| 175 | enum { | ||
| 176 | ST_POWERED = 1, | ||
| 177 | ST_STREAMING = 2, | ||
| 178 | ST_SUSPENDED = 4, | ||
| 179 | }; | ||
| 180 | |||
| 181 | struct mipi_csis_event { | ||
| 182 | u32 mask; | ||
| 183 | const char * const name; | ||
| 184 | unsigned int counter; | ||
| 185 | }; | ||
| 186 | |||
| 187 | static const struct mipi_csis_event mipi_csis_events[] = { | ||
| 188 | /* Errors */ | ||
| 189 | { MIPI_CSIS_INTSRC_ERR_SOT_HS, "SOT Error" }, | ||
| 190 | { MIPI_CSIS_INTSRC_ERR_LOST_FS, "Lost Frame Start Error" }, | ||
| 191 | { MIPI_CSIS_INTSRC_ERR_LOST_FE, "Lost Frame End Error" }, | ||
| 192 | { MIPI_CSIS_INTSRC_ERR_OVER, "FIFO Overflow Error" }, | ||
| 193 | { MIPI_CSIS_INTSRC_ERR_WRONG_CFG, "Wrong Configuration Error" }, | ||
| 194 | { MIPI_CSIS_INTSRC_ERR_ECC, "ECC Error" }, | ||
| 195 | { MIPI_CSIS_INTSRC_ERR_CRC, "CRC Error" }, | ||
| 196 | { MIPI_CSIS_INTSRC_ERR_UNKNOWN, "Unknown Error" }, | ||
| 197 | /* Non-image data receive events */ | ||
| 198 | { MIPI_CSIS_INTSRC_EVEN_BEFORE, "Non-image data before even frame" }, | ||
| 199 | { MIPI_CSIS_INTSRC_EVEN_AFTER, "Non-image data after even frame" }, | ||
| 200 | { MIPI_CSIS_INTSRC_ODD_BEFORE, "Non-image data before odd frame" }, | ||
| 201 | { MIPI_CSIS_INTSRC_ODD_AFTER, "Non-image data after odd frame" }, | ||
| 202 | /* Frame start/end */ | ||
| 203 | { MIPI_CSIS_INTSRC_FRAME_START, "Frame Start" }, | ||
| 204 | { MIPI_CSIS_INTSRC_FRAME_END, "Frame End" }, | ||
| 205 | }; | ||
| 206 | |||
| 207 | #define MIPI_CSIS_NUM_EVENTS ARRAY_SIZE(mipi_csis_events) | ||
| 208 | |||
| 209 | static const char * const mipi_csis_clk_id[] = {"pclk", "wrap", "phy"}; | ||
| 210 | |||
| 211 | struct csis_hw_reset { | ||
| 212 | struct regmap *src; | ||
| 213 | u8 req_src; | ||
| 214 | u8 rst_bit; | ||
| 215 | }; | ||
| 216 | |||
| 217 | struct csi_state { | ||
| 218 | /* lock elements below */ | ||
| 219 | struct mutex lock; | ||
| 220 | /* lock for event handler */ | ||
| 221 | spinlock_t slock; | ||
| 222 | struct device *dev; | ||
| 223 | struct media_pad pads[CSIS_PADS_NUM]; | ||
| 224 | struct v4l2_subdev mipi_sd; | ||
| 225 | struct v4l2_subdev *src_sd; | ||
| 226 | |||
| 227 | u8 index; | ||
| 228 | struct platform_device *pdev; | ||
| 229 | struct phy *phy; | ||
| 230 | void __iomem *regs; | ||
| 231 | struct clk *wrap_clk; | ||
| 232 | int irq; | ||
| 233 | u32 flags; | ||
| 234 | |||
| 235 | struct dentry *debugfs_root; | ||
| 236 | bool debug; | ||
| 237 | |||
| 238 | int num_clks; | ||
| 239 | struct clk_bulk_data *clks; | ||
| 240 | |||
| 241 | u32 clk_frequency; | ||
| 242 | u32 hs_settle; | ||
| 243 | |||
| 244 | struct reset_control *mrst; | ||
| 245 | |||
| 246 | const struct csis_pix_format *csis_fmt; | ||
| 247 | struct v4l2_mbus_framefmt format_mbus; | ||
| 248 | |||
| 249 | struct v4l2_fwnode_bus_mipi_csi2 bus; | ||
| 250 | |||
| 251 | struct mipi_csis_event events[MIPI_CSIS_NUM_EVENTS]; | ||
| 252 | |||
| 253 | struct v4l2_async_notifier subdev_notifier; | ||
| 254 | |||
| 255 | struct csis_hw_reset hw_reset; | ||
| 256 | struct regulator *mipi_phy_regulator; | ||
| 257 | bool sink_linked; | ||
| 258 | }; | ||
| 259 | |||
| 260 | struct csis_pix_format { | ||
| 261 | unsigned int pix_width_alignment; | ||
| 262 | u32 code; | ||
| 263 | u32 fmt_reg; | ||
| 264 | u8 data_alignment; | ||
| 265 | }; | ||
| 266 | |||
| 267 | static const struct csis_pix_format mipi_csis_formats[] = { | ||
| 268 | { | ||
| 269 | .code = MEDIA_BUS_FMT_SBGGR10_1X10, | ||
| 270 | .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, | ||
| 271 | .data_alignment = 16, | ||
| 272 | }, { | ||
| 273 | .code = MEDIA_BUS_FMT_VYUY8_2X8, | ||
| 274 | .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, | ||
| 275 | .data_alignment = 16, | ||
| 276 | }, { | ||
| 277 | .code = MEDIA_BUS_FMT_SBGGR8_1X8, | ||
| 278 | .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, | ||
| 279 | .data_alignment = 8, | ||
| 280 | }, { | ||
| 281 | .code = MEDIA_BUS_FMT_YUYV8_2X8, | ||
| 282 | .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, | ||
| 283 | .data_alignment = 16, | ||
| 284 | } | ||
| 285 | }; | ||
| 286 | |||
| 287 | #define mipi_csis_write(__csis, __r, __v) writel(__v, (__csis)->regs + (__r)) | ||
| 288 | #define mipi_csis_read(__csis, __r) readl((__csis)->regs + (__r)) | ||
| 289 | |||
| 290 | static int mipi_csis_dump_regs(struct csi_state *state) | ||
| 291 | { | ||
| 292 | struct device *dev = &state->pdev->dev; | ||
| 293 | unsigned int i; | ||
| 294 | u32 cfg; | ||
| 295 | struct { | ||
| 296 | u32 offset; | ||
| 297 | const char * const name; | ||
| 298 | } registers[] = { | ||
| 299 | { 0x04, "CTRL" }, | ||
| 300 | { 0x24, "DPHYCTRL" }, | ||
| 301 | { 0x08, "CLKCTRL" }, | ||
| 302 | { 0x20, "DPHYSTS" }, | ||
| 303 | { 0x10, "INTMSK" }, | ||
| 304 | { 0x40, "CONFIG_CH0" }, | ||
| 305 | { 0xC0, "DBG_CONFIG" }, | ||
| 306 | { 0x38, "DPHYSLAVE_L" }, | ||
| 307 | { 0x3C, "DPHYSLAVE_H" }, | ||
| 308 | }; | ||
| 309 | |||
| 310 | dev_info(dev, "--- REGISTERS ---\n"); | ||
| 311 | |||
| 312 | for (i = 0; i < ARRAY_SIZE(registers); i++) { | ||
| 313 | cfg = mipi_csis_read(state, registers[i].offset); | ||
| 314 | dev_info(dev, "%12s: 0x%08x\n", registers[i].name, cfg); | ||
| 315 | } | ||
| 316 | |||
| 317 | return 0; | ||
| 318 | } | ||
| 319 | |||
| 320 | static struct csi_state *mipi_sd_to_csis_state(struct v4l2_subdev *sdev) | ||
| 321 | { | ||
| 322 | return container_of(sdev, struct csi_state, mipi_sd); | ||
| 323 | } | ||
| 324 | |||
| 325 | static const struct csis_pix_format *find_csis_format(u32 code) | ||
| 326 | { | ||
| 327 | unsigned int i; | ||
| 328 | |||
| 329 | for (i = 0; i < ARRAY_SIZE(mipi_csis_formats); i++) | ||
| 330 | if (code == mipi_csis_formats[i].code) | ||
| 331 | return &mipi_csis_formats[i]; | ||
| 332 | return NULL; | ||
| 333 | } | ||
| 334 | |||
| 335 | static void mipi_csis_enable_interrupts(struct csi_state *state, bool on) | ||
| 336 | { | ||
| 337 | mipi_csis_write(state, MIPI_CSIS_INTMSK, on ? 0xffffffff : 0); | ||
| 338 | } | ||
| 339 | |||
| 340 | static void mipi_csis_sw_reset(struct csi_state *state) | ||
| 341 | { | ||
| 342 | u32 val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); | ||
| 343 | |||
| 344 | mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, | ||
| 345 | val | MIPI_CSIS_CMN_CTRL_RESET); | ||
| 346 | usleep_range(10, 20); | ||
| 347 | } | ||
| 348 | |||
| 349 | static int mipi_csis_phy_init(struct csi_state *state) | ||
| 350 | { | ||
| 351 | state->mipi_phy_regulator = devm_regulator_get(state->dev, "phy"); | ||
| 352 | |||
| 353 | return regulator_set_voltage(state->mipi_phy_regulator, 1000000, | ||
| 354 | 1000000); | ||
| 355 | } | ||
| 356 | |||
| 357 | static void mipi_csis_phy_reset(struct csi_state *state) | ||
| 358 | { | ||
| 359 | reset_control_assert(state->mrst); | ||
| 360 | |||
| 361 | msleep(20); | ||
| 362 | |||
| 363 | reset_control_deassert(state->mrst); | ||
| 364 | } | ||
| 365 | |||
| 366 | static void mipi_csis_system_enable(struct csi_state *state, int on) | ||
| 367 | { | ||
| 368 | u32 val, mask; | ||
| 369 | |||
| 370 | val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); | ||
| 371 | if (on) | ||
| 372 | val |= MIPI_CSIS_CMN_CTRL_ENABLE; | ||
| 373 | else | ||
| 374 | val &= ~MIPI_CSIS_CMN_CTRL_ENABLE; | ||
| 375 | mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, val); | ||
| 376 | |||
| 377 | val = mipi_csis_read(state, MIPI_CSIS_DPHYCTRL); | ||
| 378 | val &= ~MIPI_CSIS_DPHYCTRL_ENABLE; | ||
| 379 | if (on) { | ||
| 380 | mask = (1 << (state->bus.num_data_lanes + 1)) - 1; | ||
| 381 | val |= (mask & MIPI_CSIS_DPHYCTRL_ENABLE); | ||
| 382 | } | ||
| 383 | mipi_csis_write(state, MIPI_CSIS_DPHYCTRL, val); | ||
| 384 | } | ||
| 385 | |||
| 386 | /* Called with the state.lock mutex held */ | ||
| 387 | static void __mipi_csis_set_format(struct csi_state *state) | ||
| 388 | { | ||
| 389 | struct v4l2_mbus_framefmt *mf = &state->format_mbus; | ||
| 390 | u32 val; | ||
| 391 | |||
| 392 | /* Color format */ | ||
| 393 | val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH0); | ||
| 394 | val = (val & ~MIPI_CSIS_ISPCFG_FMT_MASK) | state->csis_fmt->fmt_reg; | ||
| 395 | mipi_csis_write(state, MIPI_CSIS_ISPCONFIG_CH0, val); | ||
| 396 | |||
| 397 | /* Pixel resolution */ | ||
| 398 | val = mf->width | (mf->height << 16); | ||
| 399 | mipi_csis_write(state, MIPI_CSIS_ISPRESOL_CH0, val); | ||
| 400 | } | ||
| 401 | |||
| 402 | static void mipi_csis_set_hsync_settle(struct csi_state *state, int hs_settle) | ||
| 403 | { | ||
| 404 | u32 val = mipi_csis_read(state, MIPI_CSIS_DPHYCTRL); | ||
| 405 | |||
| 406 | val = ((val & ~MIPI_CSIS_DPHYCTRL_HSS_MASK) | (hs_settle << 24)); | ||
| 407 | |||
| 408 | mipi_csis_write(state, MIPI_CSIS_DPHYCTRL, val); | ||
| 409 | } | ||
| 410 | |||
| 411 | static void mipi_csis_set_params(struct csi_state *state) | ||
| 412 | { | ||
| 413 | int lanes = state->bus.num_data_lanes; | ||
| 414 | u32 val; | ||
| 415 | |||
| 416 | val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); | ||
| 417 | val &= ~MIPI_CSIS_CMN_CTRL_LANE_NR_MASK; | ||
| 418 | val |= (lanes - 1) << MIPI_CSIS_CMN_CTRL_LANE_NR_OFFSET; | ||
| 419 | mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, val); | ||
| 420 | |||
| 421 | __mipi_csis_set_format(state); | ||
| 422 | |||
| 423 | mipi_csis_set_hsync_settle(state, state->hs_settle); | ||
| 424 | |||
| 425 | val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH0); | ||
| 426 | if (state->csis_fmt->data_alignment == 32) | ||
| 427 | val |= MIPI_CSIS_ISPCFG_ALIGN_32BIT; | ||
| 428 | else | ||
| 429 | val &= ~MIPI_CSIS_ISPCFG_ALIGN_32BIT; | ||
| 430 | mipi_csis_write(state, MIPI_CSIS_ISPCONFIG_CH0, val); | ||
| 431 | |||
| 432 | val = (0 << MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET) | | ||
| 433 | (0 << MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET) | | ||
| 434 | (0 << MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET); | ||
| 435 | mipi_csis_write(state, MIPI_CSIS_ISPSYNC_CH0, val); | ||
| 436 | |||
| 437 | val = mipi_csis_read(state, MIPI_CSIS_CLK_CTRL); | ||
| 438 | val &= ~MIPI_CSIS_CLK_CTRL_WCLK_SRC; | ||
| 439 | if (state->wrap_clk) | ||
| 440 | val |= MIPI_CSIS_CLK_CTRL_WCLK_SRC; | ||
| 441 | else | ||
| 442 | val &= ~MIPI_CSIS_CLK_CTRL_WCLK_SRC; | ||
| 443 | |||
| 444 | val |= MIPI_CSIS_CLK_CTRL_CLKGATE_TRAIL_CH0(15); | ||
| 445 | val &= ~MIPI_CSIS_CLK_CTRL_CLKGATE_EN_MSK; | ||
| 446 | mipi_csis_write(state, MIPI_CSIS_CLK_CTRL, val); | ||
| 447 | |||
| 448 | mipi_csis_write(state, MIPI_CSIS_DPHYBCTRL_L, 0x1f4); | ||
| 449 | mipi_csis_write(state, MIPI_CSIS_DPHYBCTRL_H, 0); | ||
| 450 | |||
| 451 | /* Update the shadow register. */ | ||
| 452 | val = mipi_csis_read(state, MIPI_CSIS_CMN_CTRL); | ||
| 453 | mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, | ||
| 454 | val | MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW | | ||
| 455 | MIPI_CSIS_CMN_CTRL_UPDATE_SHADOW_CTRL); | ||
| 456 | } | ||
| 457 | |||
| 458 | static void mipi_csis_clk_enable(struct csi_state *state) | ||
| 459 | { | ||
| 460 | int ret; | ||
| 461 | |||
| 462 | ret = clk_bulk_prepare_enable(state->num_clks, state->clks); | ||
| 463 | if (ret < 0) | ||
| 464 | dev_err(state->dev, "failed to enable clocks\n"); | ||
| 465 | } | ||
| 466 | |||
| 467 | static void mipi_csis_clk_disable(struct csi_state *state) | ||
| 468 | { | ||
| 469 | clk_bulk_disable_unprepare(state->num_clks, state->clks); | ||
| 470 | } | ||
| 471 | |||
| 472 | static int mipi_csis_clk_get(struct csi_state *state) | ||
| 473 | { | ||
| 474 | struct device *dev = &state->pdev->dev; | ||
| 475 | unsigned int i; | ||
| 476 | int ret; | ||
| 477 | |||
| 478 | state->num_clks = ARRAY_SIZE(mipi_csis_clk_id); | ||
| 479 | state->clks = devm_kcalloc(dev, state->num_clks, sizeof(*state->clks), | ||
| 480 | GFP_KERNEL); | ||
| 481 | |||
| 482 | if (!state->clks) | ||
| 483 | return -ENOMEM; | ||
| 484 | |||
| 485 | for (i = 0; i < state->num_clks; i++) | ||
| 486 | state->clks[i].id = mipi_csis_clk_id[i]; | ||
| 487 | |||
| 488 | ret = devm_clk_bulk_get(dev, state->num_clks, state->clks); | ||
| 489 | if (ret < 0) | ||
| 490 | return ret; | ||
| 491 | |||
| 492 | state->wrap_clk = devm_clk_get(dev, "wrap"); | ||
| 493 | if (IS_ERR(state->wrap_clk)) | ||
| 494 | return IS_ERR(state->wrap_clk); | ||
| 495 | |||
| 496 | /* Set clock rate */ | ||
| 497 | ret = clk_set_rate(state->wrap_clk, state->clk_frequency); | ||
| 498 | if (ret < 0) | ||
| 499 | dev_err(dev, "set rate=%d failed: %d\n", state->clk_frequency, | ||
| 500 | ret); | ||
| 501 | |||
| 502 | return ret; | ||
| 503 | } | ||
| 504 | |||
| 505 | static void mipi_csis_start_stream(struct csi_state *state) | ||
| 506 | { | ||
| 507 | mipi_csis_sw_reset(state); | ||
| 508 | mipi_csis_set_params(state); | ||
| 509 | mipi_csis_system_enable(state, true); | ||
| 510 | mipi_csis_enable_interrupts(state, true); | ||
| 511 | } | ||
| 512 | |||
| 513 | static void mipi_csis_stop_stream(struct csi_state *state) | ||
| 514 | { | ||
| 515 | mipi_csis_enable_interrupts(state, false); | ||
| 516 | mipi_csis_system_enable(state, false); | ||
| 517 | } | ||
| 518 | |||
| 519 | static void mipi_csis_clear_counters(struct csi_state *state) | ||
| 520 | { | ||
| 521 | unsigned long flags; | ||
| 522 | unsigned int i; | ||
| 523 | |||
| 524 | spin_lock_irqsave(&state->slock, flags); | ||
| 525 | for (i = 0; i < MIPI_CSIS_NUM_EVENTS; i++) | ||
| 526 | state->events[i].counter = 0; | ||
| 527 | spin_unlock_irqrestore(&state->slock, flags); | ||
| 528 | } | ||
| 529 | |||
| 530 | static void mipi_csis_log_counters(struct csi_state *state, bool non_errors) | ||
| 531 | { | ||
| 532 | int i = non_errors ? MIPI_CSIS_NUM_EVENTS : MIPI_CSIS_NUM_EVENTS - 4; | ||
| 533 | struct device *dev = &state->pdev->dev; | ||
| 534 | unsigned long flags; | ||
| 535 | |||
| 536 | spin_lock_irqsave(&state->slock, flags); | ||
| 537 | |||
| 538 | for (i--; i >= 0; i--) { | ||
| 539 | if (state->events[i].counter > 0 || state->debug) | ||
| 540 | dev_info(dev, "%s events: %d\n", state->events[i].name, | ||
| 541 | state->events[i].counter); | ||
| 542 | } | ||
| 543 | spin_unlock_irqrestore(&state->slock, flags); | ||
| 544 | } | ||
| 545 | |||
| 546 | /* | ||
| 547 | * V4L2 subdev operations | ||
| 548 | */ | ||
| 549 | static int mipi_csis_s_stream(struct v4l2_subdev *mipi_sd, int enable) | ||
| 550 | { | ||
| 551 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 552 | int ret = 0; | ||
| 553 | |||
| 554 | if (enable) { | ||
| 555 | mipi_csis_clear_counters(state); | ||
| 556 | ret = pm_runtime_get_sync(&state->pdev->dev); | ||
| 557 | if (ret < 0) { | ||
| 558 | pm_runtime_put_noidle(&state->pdev->dev); | ||
| 559 | return ret; | ||
| 560 | } | ||
| 561 | ret = v4l2_subdev_call(state->src_sd, core, s_power, 1); | ||
| 562 | if (ret < 0) | ||
| 563 | return ret; | ||
| 564 | } | ||
| 565 | |||
| 566 | mutex_lock(&state->lock); | ||
| 567 | if (enable) { | ||
| 568 | if (state->flags & ST_SUSPENDED) { | ||
| 569 | ret = -EBUSY; | ||
| 570 | goto unlock; | ||
| 571 | } | ||
| 572 | |||
| 573 | mipi_csis_start_stream(state); | ||
| 574 | ret = v4l2_subdev_call(state->src_sd, video, s_stream, 1); | ||
| 575 | if (ret < 0) | ||
| 576 | goto unlock; | ||
| 577 | |||
| 578 | mipi_csis_log_counters(state, true); | ||
| 579 | |||
| 580 | state->flags |= ST_STREAMING; | ||
| 581 | } else { | ||
| 582 | v4l2_subdev_call(state->src_sd, video, s_stream, 0); | ||
| 583 | ret = v4l2_subdev_call(state->src_sd, core, s_power, 1); | ||
| 584 | mipi_csis_stop_stream(state); | ||
| 585 | state->flags &= ~ST_STREAMING; | ||
| 586 | if (state->debug) | ||
| 587 | mipi_csis_log_counters(state, true); | ||
| 588 | } | ||
| 589 | |||
| 590 | unlock: | ||
| 591 | mutex_unlock(&state->lock); | ||
| 592 | if (!enable) | ||
| 593 | pm_runtime_put(&state->pdev->dev); | ||
| 594 | |||
| 595 | return ret; | ||
| 596 | } | ||
| 597 | |||
| 598 | static int mipi_csis_link_setup(struct media_entity *entity, | ||
| 599 | const struct media_pad *local_pad, | ||
| 600 | const struct media_pad *remote_pad, u32 flags) | ||
| 601 | { | ||
| 602 | struct v4l2_subdev *mipi_sd = media_entity_to_v4l2_subdev(entity); | ||
| 603 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 604 | struct v4l2_subdev *remote_sd; | ||
| 605 | int ret = 0; | ||
| 606 | |||
| 607 | dev_dbg(state->dev, "link setup %s -> %s", remote_pad->entity->name, | ||
| 608 | local_pad->entity->name); | ||
| 609 | |||
| 610 | remote_sd = media_entity_to_v4l2_subdev(remote_pad->entity); | ||
| 611 | |||
| 612 | mutex_lock(&state->lock); | ||
| 613 | |||
| 614 | if (local_pad->flags & MEDIA_PAD_FL_SOURCE) { | ||
| 615 | if (flags & MEDIA_LNK_FL_ENABLED) { | ||
| 616 | if (state->sink_linked) { | ||
| 617 | ret = -EBUSY; | ||
| 618 | goto out; | ||
| 619 | } | ||
| 620 | state->sink_linked = true; | ||
| 621 | } else { | ||
| 622 | state->sink_linked = false; | ||
| 623 | } | ||
| 624 | } else { | ||
| 625 | if (flags & MEDIA_LNK_FL_ENABLED) { | ||
| 626 | if (state->src_sd) { | ||
| 627 | ret = -EBUSY; | ||
| 628 | goto out; | ||
| 629 | } | ||
| 630 | state->src_sd = remote_sd; | ||
| 631 | } else { | ||
| 632 | state->src_sd = NULL; | ||
| 633 | } | ||
| 634 | } | ||
| 635 | |||
| 636 | out: | ||
| 637 | mutex_unlock(&state->lock); | ||
| 638 | return ret; | ||
| 639 | } | ||
| 640 | |||
| 641 | static int mipi_csis_init_cfg(struct v4l2_subdev *mipi_sd, | ||
| 642 | struct v4l2_subdev_pad_config *cfg) | ||
| 643 | { | ||
| 644 | struct v4l2_mbus_framefmt *mf; | ||
| 645 | unsigned int i; | ||
| 646 | int ret; | ||
| 647 | |||
| 648 | for (i = 0; i < CSIS_PADS_NUM; i++) { | ||
| 649 | mf = v4l2_subdev_get_try_format(mipi_sd, cfg, i); | ||
| 650 | |||
| 651 | ret = imx_media_init_mbus_fmt(mf, MIPI_CSIS_DEF_PIX_HEIGHT, | ||
| 652 | MIPI_CSIS_DEF_PIX_WIDTH, 0, | ||
| 653 | V4L2_FIELD_NONE, NULL); | ||
| 654 | if (ret < 0) | ||
| 655 | return ret; | ||
| 656 | } | ||
| 657 | |||
| 658 | return 0; | ||
| 659 | } | ||
| 660 | |||
| 661 | static struct csis_pix_format const * | ||
| 662 | mipi_csis_try_format(struct v4l2_subdev *mipi_sd, struct v4l2_mbus_framefmt *mf) | ||
| 663 | { | ||
| 664 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 665 | struct csis_pix_format const *csis_fmt; | ||
| 666 | |||
| 667 | csis_fmt = find_csis_format(mf->code); | ||
| 668 | if (!csis_fmt) | ||
| 669 | csis_fmt = &mipi_csis_formats[0]; | ||
| 670 | |||
| 671 | v4l_bound_align_image(&mf->width, 1, CSIS_MAX_PIX_WIDTH, | ||
| 672 | csis_fmt->pix_width_alignment, | ||
| 673 | &mf->height, 1, CSIS_MAX_PIX_HEIGHT, 1, | ||
| 674 | 0); | ||
| 675 | |||
| 676 | state->format_mbus.code = csis_fmt->code; | ||
| 677 | state->format_mbus.width = mf->width; | ||
| 678 | state->format_mbus.height = mf->height; | ||
| 679 | |||
| 680 | return csis_fmt; | ||
| 681 | } | ||
| 682 | |||
| 683 | static struct v4l2_mbus_framefmt * | ||
| 684 | mipi_csis_get_format(struct csi_state *state, | ||
| 685 | struct v4l2_subdev_pad_config *cfg, | ||
| 686 | enum v4l2_subdev_format_whence which, | ||
| 687 | unsigned int pad) | ||
| 688 | { | ||
| 689 | if (which == V4L2_SUBDEV_FORMAT_TRY) | ||
| 690 | return v4l2_subdev_get_try_format(&state->mipi_sd, cfg, pad); | ||
| 691 | |||
| 692 | return &state->format_mbus; | ||
| 693 | } | ||
| 694 | |||
| 695 | static int mipi_csis_set_fmt(struct v4l2_subdev *mipi_sd, | ||
| 696 | struct v4l2_subdev_pad_config *cfg, | ||
| 697 | struct v4l2_subdev_format *sdformat) | ||
| 698 | { | ||
| 699 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 700 | struct csis_pix_format const *csis_fmt; | ||
| 701 | struct v4l2_mbus_framefmt *fmt; | ||
| 702 | |||
| 703 | if (sdformat->pad >= CSIS_PADS_NUM) | ||
| 704 | return -EINVAL; | ||
| 705 | |||
| 706 | fmt = mipi_csis_get_format(state, cfg, sdformat->which, sdformat->pad); | ||
| 707 | |||
| 708 | mutex_lock(&state->lock); | ||
| 709 | if (fmt && sdformat->pad == CSIS_PAD_SOURCE) { | ||
| 710 | sdformat->format = *fmt; | ||
| 711 | goto unlock; | ||
| 712 | } | ||
| 713 | |||
| 714 | csis_fmt = mipi_csis_try_format(mipi_sd, &sdformat->format); | ||
| 715 | |||
| 716 | sdformat->format = *fmt; | ||
| 717 | |||
| 718 | if (csis_fmt && sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE) | ||
| 719 | state->csis_fmt = csis_fmt; | ||
| 720 | else | ||
| 721 | cfg->try_fmt = sdformat->format; | ||
| 722 | |||
| 723 | unlock: | ||
| 724 | mutex_unlock(&state->lock); | ||
| 725 | |||
| 726 | return 0; | ||
| 727 | } | ||
| 728 | |||
| 729 | static int mipi_csis_get_fmt(struct v4l2_subdev *mipi_sd, | ||
| 730 | struct v4l2_subdev_pad_config *cfg, | ||
| 731 | struct v4l2_subdev_format *sdformat) | ||
| 732 | { | ||
| 733 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 734 | struct v4l2_mbus_framefmt *fmt; | ||
| 735 | |||
| 736 | mutex_lock(&state->lock); | ||
| 737 | |||
| 738 | fmt = mipi_csis_get_format(state, cfg, sdformat->which, sdformat->pad); | ||
| 739 | |||
| 740 | sdformat->format = *fmt; | ||
| 741 | |||
| 742 | mutex_unlock(&state->lock); | ||
| 743 | |||
| 744 | return 0; | ||
| 745 | } | ||
| 746 | |||
| 747 | static int mipi_csis_log_status(struct v4l2_subdev *mipi_sd) | ||
| 748 | { | ||
| 749 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 750 | |||
| 751 | mutex_lock(&state->lock); | ||
| 752 | mipi_csis_log_counters(state, true); | ||
| 753 | if (state->debug && (state->flags & ST_POWERED)) | ||
| 754 | mipi_csis_dump_regs(state); | ||
| 755 | mutex_unlock(&state->lock); | ||
| 756 | |||
| 757 | return 0; | ||
| 758 | } | ||
| 759 | |||
| 760 | static irqreturn_t mipi_csis_irq_handler(int irq, void *dev_id) | ||
| 761 | { | ||
| 762 | struct csi_state *state = dev_id; | ||
| 763 | unsigned long flags; | ||
| 764 | unsigned int i; | ||
| 765 | u32 status; | ||
| 766 | |||
| 767 | status = mipi_csis_read(state, MIPI_CSIS_INTSRC); | ||
| 768 | |||
| 769 | spin_lock_irqsave(&state->slock, flags); | ||
| 770 | |||
| 771 | /* Update the event/error counters */ | ||
| 772 | if ((status & MIPI_CSIS_INTSRC_ERRORS) || state->debug) { | ||
| 773 | for (i = 0; i < MIPI_CSIS_NUM_EVENTS; i++) { | ||
| 774 | if (!(status & state->events[i].mask)) | ||
| 775 | continue; | ||
| 776 | state->events[i].counter++; | ||
| 777 | } | ||
| 778 | } | ||
| 779 | spin_unlock_irqrestore(&state->slock, flags); | ||
| 780 | |||
| 781 | mipi_csis_write(state, MIPI_CSIS_INTSRC, status); | ||
| 782 | |||
| 783 | return IRQ_HANDLED; | ||
| 784 | } | ||
| 785 | |||
| 786 | static const struct v4l2_subdev_core_ops mipi_csis_core_ops = { | ||
| 787 | .log_status = mipi_csis_log_status, | ||
| 788 | }; | ||
| 789 | |||
| 790 | static const struct media_entity_operations mipi_csis_entity_ops = { | ||
| 791 | .link_setup = mipi_csis_link_setup, | ||
| 792 | .link_validate = v4l2_subdev_link_validate, | ||
| 793 | }; | ||
| 794 | |||
| 795 | static const struct v4l2_subdev_video_ops mipi_csis_video_ops = { | ||
| 796 | .s_stream = mipi_csis_s_stream, | ||
| 797 | }; | ||
| 798 | |||
| 799 | static const struct v4l2_subdev_pad_ops mipi_csis_pad_ops = { | ||
| 800 | .init_cfg = mipi_csis_init_cfg, | ||
| 801 | .get_fmt = mipi_csis_get_fmt, | ||
| 802 | .set_fmt = mipi_csis_set_fmt, | ||
| 803 | }; | ||
| 804 | |||
| 805 | static const struct v4l2_subdev_ops mipi_csis_subdev_ops = { | ||
| 806 | .core = &mipi_csis_core_ops, | ||
| 807 | .video = &mipi_csis_video_ops, | ||
| 808 | .pad = &mipi_csis_pad_ops, | ||
| 809 | }; | ||
| 810 | |||
| 811 | static int mipi_csis_parse_dt(struct platform_device *pdev, | ||
| 812 | struct csi_state *state) | ||
| 813 | { | ||
| 814 | struct device_node *node = pdev->dev.of_node; | ||
| 815 | |||
| 816 | if (of_property_read_u32(node, "clock-frequency", | ||
| 817 | &state->clk_frequency)) | ||
| 818 | state->clk_frequency = DEFAULT_SCLK_CSIS_FREQ; | ||
| 819 | |||
| 820 | /* Get MIPI PHY resets */ | ||
| 821 | state->mrst = devm_reset_control_get_exclusive(&pdev->dev, "mrst"); | ||
| 822 | if (IS_ERR(state->mrst)) | ||
| 823 | return PTR_ERR(state->mrst); | ||
| 824 | |||
| 825 | /* Get MIPI CSI-2 bus configuration from the endpoint node. */ | ||
| 826 | of_property_read_u32(node, "fsl,csis-hs-settle", &state->hs_settle); | ||
| 827 | |||
| 828 | return 0; | ||
| 829 | } | ||
| 830 | |||
| 831 | static int mipi_csis_pm_resume(struct device *dev, bool runtime); | ||
| 832 | |||
| 833 | static int mipi_csis_parse_endpoint(struct device *dev, | ||
| 834 | struct v4l2_fwnode_endpoint *ep, | ||
| 835 | struct v4l2_async_subdev *asd) | ||
| 836 | { | ||
| 837 | struct v4l2_subdev *mipi_sd = dev_get_drvdata(dev); | ||
| 838 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 839 | |||
| 840 | if (ep->bus_type != V4L2_MBUS_CSI2_DPHY) { | ||
| 841 | dev_err(dev, "invalid bus type, must be MIPI CSI2\n"); | ||
| 842 | return -EINVAL; | ||
| 843 | } | ||
| 844 | |||
| 845 | state->bus = ep->bus.mipi_csi2; | ||
| 846 | |||
| 847 | dev_dbg(state->dev, "data lanes: %d\n", state->bus.num_data_lanes); | ||
| 848 | dev_dbg(state->dev, "flags: 0x%08x\n", state->bus.flags); | ||
| 849 | |||
| 850 | return 0; | ||
| 851 | } | ||
| 852 | |||
| 853 | static int mipi_csis_subdev_init(struct v4l2_subdev *mipi_sd, | ||
| 854 | struct platform_device *pdev, | ||
| 855 | const struct v4l2_subdev_ops *ops) | ||
| 856 | { | ||
| 857 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 858 | unsigned int sink_port = 0; | ||
| 859 | int ret; | ||
| 860 | |||
| 861 | v4l2_subdev_init(mipi_sd, ops); | ||
| 862 | mipi_sd->owner = THIS_MODULE; | ||
| 863 | snprintf(mipi_sd->name, sizeof(mipi_sd->name), "%s.%d", | ||
| 864 | CSIS_SUBDEV_NAME, state->index); | ||
| 865 | |||
| 866 | mipi_sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; | ||
| 867 | mipi_sd->ctrl_handler = NULL; | ||
| 868 | |||
| 869 | mipi_sd->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; | ||
| 870 | mipi_sd->entity.ops = &mipi_csis_entity_ops; | ||
| 871 | |||
| 872 | mipi_sd->dev = &pdev->dev; | ||
| 873 | |||
| 874 | state->csis_fmt = &mipi_csis_formats[0]; | ||
| 875 | state->format_mbus.code = mipi_csis_formats[0].code; | ||
| 876 | state->format_mbus.width = MIPI_CSIS_DEF_PIX_WIDTH; | ||
| 877 | state->format_mbus.height = MIPI_CSIS_DEF_PIX_HEIGHT; | ||
| 878 | state->format_mbus.field = V4L2_FIELD_NONE; | ||
| 879 | |||
| 880 | v4l2_set_subdevdata(mipi_sd, &pdev->dev); | ||
| 881 | |||
| 882 | ret = v4l2_async_register_fwnode_subdev(mipi_sd, | ||
| 883 | sizeof(struct v4l2_async_subdev), | ||
| 884 | &sink_port, 1, | ||
| 885 | mipi_csis_parse_endpoint); | ||
| 886 | if (ret < 0) | ||
| 887 | dev_err(&pdev->dev, "async fwnode register failed: %d\n", ret); | ||
| 888 | |||
| 889 | return ret; | ||
| 890 | } | ||
| 891 | |||
| 892 | #ifdef CONFIG_DEBUG_FS | ||
| 893 | #include <linux/debugfs.h> | ||
| 894 | |||
| 895 | static int mipi_csis_dump_regs_show(struct seq_file *m, void *private) | ||
| 896 | { | ||
| 897 | struct csi_state *state = m->private; | ||
| 898 | |||
| 899 | return mipi_csis_dump_regs(state); | ||
| 900 | } | ||
| 901 | DEFINE_SHOW_ATTRIBUTE(mipi_csis_dump_regs); | ||
| 902 | |||
| 903 | static int __init_or_module mipi_csis_debugfs_init(struct csi_state *state) | ||
| 904 | { | ||
| 905 | struct dentry *d; | ||
| 906 | |||
| 907 | if (!debugfs_initialized()) | ||
| 908 | return -ENODEV; | ||
| 909 | |||
| 910 | state->debugfs_root = debugfs_create_dir(dev_name(state->dev), NULL); | ||
| 911 | if (!state->debugfs_root) | ||
| 912 | return -ENOMEM; | ||
| 913 | |||
| 914 | d = debugfs_create_bool("debug_enable", 0600, state->debugfs_root, | ||
| 915 | &state->debug); | ||
| 916 | if (!d) | ||
| 917 | goto remove_debugfs; | ||
| 918 | |||
| 919 | d = debugfs_create_file("dump_regs", 0600, state->debugfs_root, | ||
| 920 | state, &mipi_csis_dump_regs_fops); | ||
| 921 | if (!d) | ||
| 922 | goto remove_debugfs; | ||
| 923 | |||
| 924 | return 0; | ||
| 925 | |||
| 926 | remove_debugfs: | ||
| 927 | debugfs_remove_recursive(state->debugfs_root); | ||
| 928 | |||
| 929 | return -ENOMEM; | ||
| 930 | } | ||
| 931 | |||
| 932 | static void mipi_csis_debugfs_exit(struct csi_state *state) | ||
| 933 | { | ||
| 934 | debugfs_remove_recursive(state->debugfs_root); | ||
| 935 | } | ||
| 936 | |||
| 937 | #else | ||
| 938 | static int mipi_csis_debugfs_init(struct csi_state *state __maybe_unused) | ||
| 939 | { | ||
| 940 | return 0; | ||
| 941 | } | ||
| 942 | |||
| 943 | static void mipi_csis_debugfs_exit(struct csi_state *state __maybe_unused) | ||
| 944 | { | ||
| 945 | } | ||
| 946 | #endif | ||
| 947 | |||
| 948 | static int mipi_csis_probe(struct platform_device *pdev) | ||
| 949 | { | ||
| 950 | struct device *dev = &pdev->dev; | ||
| 951 | struct resource *mem_res; | ||
| 952 | struct csi_state *state; | ||
| 953 | int ret = -ENOMEM; | ||
| 954 | |||
| 955 | state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); | ||
| 956 | if (!state) | ||
| 957 | return -ENOMEM; | ||
| 958 | |||
| 959 | spin_lock_init(&state->slock); | ||
| 960 | |||
| 961 | state->pdev = pdev; | ||
| 962 | state->dev = dev; | ||
| 963 | |||
| 964 | ret = mipi_csis_parse_dt(pdev, state); | ||
| 965 | if (ret < 0) { | ||
| 966 | dev_err(dev, "Failed to parse device tree: %d\n", ret); | ||
| 967 | return ret; | ||
| 968 | } | ||
| 969 | |||
| 970 | mipi_csis_phy_init(state); | ||
| 971 | mipi_csis_phy_reset(state); | ||
| 972 | |||
| 973 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 974 | state->regs = devm_ioremap_resource(dev, mem_res); | ||
| 975 | if (IS_ERR(state->regs)) | ||
| 976 | return PTR_ERR(state->regs); | ||
| 977 | |||
| 978 | state->irq = platform_get_irq(pdev, 0); | ||
| 979 | if (state->irq < 0) { | ||
| 980 | dev_err(dev, "Failed to get irq\n"); | ||
| 981 | return state->irq; | ||
| 982 | } | ||
| 983 | |||
| 984 | ret = mipi_csis_clk_get(state); | ||
| 985 | if (ret < 0) | ||
| 986 | return ret; | ||
| 987 | |||
| 988 | mipi_csis_clk_enable(state); | ||
| 989 | |||
| 990 | ret = devm_request_irq(dev, state->irq, mipi_csis_irq_handler, | ||
| 991 | 0, dev_name(dev), state); | ||
| 992 | if (ret) { | ||
| 993 | dev_err(dev, "Interrupt request failed\n"); | ||
| 994 | goto disable_clock; | ||
| 995 | } | ||
| 996 | |||
| 997 | platform_set_drvdata(pdev, &state->mipi_sd); | ||
| 998 | |||
| 999 | mutex_init(&state->lock); | ||
| 1000 | ret = mipi_csis_subdev_init(&state->mipi_sd, pdev, | ||
| 1001 | &mipi_csis_subdev_ops); | ||
| 1002 | if (ret < 0) | ||
| 1003 | goto disable_clock; | ||
| 1004 | |||
| 1005 | state->pads[CSIS_PAD_SINK].flags = MEDIA_PAD_FL_SINK; | ||
| 1006 | state->pads[CSIS_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; | ||
| 1007 | ret = media_entity_pads_init(&state->mipi_sd.entity, CSIS_PADS_NUM, | ||
| 1008 | state->pads); | ||
| 1009 | if (ret < 0) | ||
| 1010 | goto unregister_subdev; | ||
| 1011 | |||
| 1012 | memcpy(state->events, mipi_csis_events, sizeof(state->events)); | ||
| 1013 | |||
| 1014 | mipi_csis_debugfs_init(state); | ||
| 1015 | pm_runtime_enable(dev); | ||
| 1016 | if (!pm_runtime_enabled(dev)) { | ||
| 1017 | ret = mipi_csis_pm_resume(dev, true); | ||
| 1018 | if (ret < 0) | ||
| 1019 | goto unregister_all; | ||
| 1020 | } | ||
| 1021 | |||
| 1022 | dev_info(&pdev->dev, "lanes: %d, hs_settle: %d, wclk: %d, freq: %u\n", | ||
| 1023 | state->bus.num_data_lanes, state->hs_settle, | ||
| 1024 | state->wrap_clk ? 1 : 0, state->clk_frequency); | ||
| 1025 | |||
| 1026 | return 0; | ||
| 1027 | |||
| 1028 | unregister_all: | ||
| 1029 | mipi_csis_debugfs_exit(state); | ||
| 1030 | media_entity_cleanup(&state->mipi_sd.entity); | ||
| 1031 | unregister_subdev: | ||
| 1032 | v4l2_async_unregister_subdev(&state->mipi_sd); | ||
| 1033 | disable_clock: | ||
| 1034 | mipi_csis_clk_disable(state); | ||
| 1035 | mutex_destroy(&state->lock); | ||
| 1036 | |||
| 1037 | return ret; | ||
| 1038 | } | ||
| 1039 | |||
| 1040 | static int mipi_csis_pm_suspend(struct device *dev, bool runtime) | ||
| 1041 | { | ||
| 1042 | struct platform_device *pdev = to_platform_device(dev); | ||
| 1043 | struct v4l2_subdev *mipi_sd = platform_get_drvdata(pdev); | ||
| 1044 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 1045 | int ret = 0; | ||
| 1046 | |||
| 1047 | mutex_lock(&state->lock); | ||
| 1048 | if (state->flags & ST_POWERED) { | ||
| 1049 | mipi_csis_stop_stream(state); | ||
| 1050 | ret = regulator_disable(state->mipi_phy_regulator); | ||
| 1051 | if (ret) | ||
| 1052 | goto unlock; | ||
| 1053 | mipi_csis_clk_disable(state); | ||
| 1054 | state->flags &= ~ST_POWERED; | ||
| 1055 | if (!runtime) | ||
| 1056 | state->flags |= ST_SUSPENDED; | ||
| 1057 | } | ||
| 1058 | |||
| 1059 | unlock: | ||
| 1060 | mutex_unlock(&state->lock); | ||
| 1061 | |||
| 1062 | return ret ? -EAGAIN : 0; | ||
| 1063 | } | ||
| 1064 | |||
| 1065 | static int mipi_csis_pm_resume(struct device *dev, bool runtime) | ||
| 1066 | { | ||
| 1067 | struct platform_device *pdev = to_platform_device(dev); | ||
| 1068 | struct v4l2_subdev *mipi_sd = platform_get_drvdata(pdev); | ||
| 1069 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 1070 | int ret = 0; | ||
| 1071 | |||
| 1072 | mutex_lock(&state->lock); | ||
| 1073 | if (!runtime && !(state->flags & ST_SUSPENDED)) | ||
| 1074 | goto unlock; | ||
| 1075 | |||
| 1076 | if (!(state->flags & ST_POWERED)) { | ||
| 1077 | ret = regulator_enable(state->mipi_phy_regulator); | ||
| 1078 | if (ret) | ||
| 1079 | goto unlock; | ||
| 1080 | |||
| 1081 | state->flags |= ST_POWERED; | ||
| 1082 | mipi_csis_clk_enable(state); | ||
| 1083 | } | ||
| 1084 | if (state->flags & ST_STREAMING) | ||
| 1085 | mipi_csis_start_stream(state); | ||
| 1086 | |||
| 1087 | state->flags &= ~ST_SUSPENDED; | ||
| 1088 | |||
| 1089 | unlock: | ||
| 1090 | mutex_unlock(&state->lock); | ||
| 1091 | |||
| 1092 | return ret ? -EAGAIN : 0; | ||
| 1093 | } | ||
| 1094 | |||
| 1095 | static int __maybe_unused mipi_csis_suspend(struct device *dev) | ||
| 1096 | { | ||
| 1097 | return mipi_csis_pm_suspend(dev, false); | ||
| 1098 | } | ||
| 1099 | |||
| 1100 | static int __maybe_unused mipi_csis_resume(struct device *dev) | ||
| 1101 | { | ||
| 1102 | return mipi_csis_pm_resume(dev, false); | ||
| 1103 | } | ||
| 1104 | |||
| 1105 | static int __maybe_unused mipi_csis_runtime_suspend(struct device *dev) | ||
| 1106 | { | ||
| 1107 | return mipi_csis_pm_suspend(dev, true); | ||
| 1108 | } | ||
| 1109 | |||
| 1110 | static int __maybe_unused mipi_csis_runtime_resume(struct device *dev) | ||
| 1111 | { | ||
| 1112 | return mipi_csis_pm_resume(dev, true); | ||
| 1113 | } | ||
| 1114 | |||
| 1115 | static int mipi_csis_remove(struct platform_device *pdev) | ||
| 1116 | { | ||
| 1117 | struct v4l2_subdev *mipi_sd = platform_get_drvdata(pdev); | ||
| 1118 | struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); | ||
| 1119 | |||
| 1120 | mipi_csis_debugfs_exit(state); | ||
| 1121 | v4l2_async_unregister_subdev(&state->mipi_sd); | ||
| 1122 | v4l2_async_notifier_unregister(&state->subdev_notifier); | ||
| 1123 | |||
| 1124 | pm_runtime_disable(&pdev->dev); | ||
| 1125 | mipi_csis_pm_suspend(&pdev->dev, true); | ||
| 1126 | mipi_csis_clk_disable(state); | ||
| 1127 | media_entity_cleanup(&state->mipi_sd.entity); | ||
| 1128 | mutex_destroy(&state->lock); | ||
| 1129 | pm_runtime_set_suspended(&pdev->dev); | ||
| 1130 | |||
| 1131 | return 0; | ||
| 1132 | } | ||
| 1133 | |||
| 1134 | static const struct dev_pm_ops mipi_csis_pm_ops = { | ||
| 1135 | SET_RUNTIME_PM_OPS(mipi_csis_runtime_suspend, mipi_csis_runtime_resume, | ||
| 1136 | NULL) | ||
| 1137 | SET_SYSTEM_SLEEP_PM_OPS(mipi_csis_suspend, mipi_csis_resume) | ||
| 1138 | }; | ||
| 1139 | |||
| 1140 | static const struct of_device_id mipi_csis_of_match[] = { | ||
| 1141 | { .compatible = "fsl,imx7-mipi-csi2", }, | ||
| 1142 | { /* sentinel */ }, | ||
| 1143 | }; | ||
| 1144 | MODULE_DEVICE_TABLE(of, mipi_csis_of_match); | ||
| 1145 | |||
| 1146 | static struct platform_driver mipi_csis_driver = { | ||
| 1147 | .probe = mipi_csis_probe, | ||
| 1148 | .remove = mipi_csis_remove, | ||
| 1149 | .driver = { | ||
| 1150 | .of_match_table = mipi_csis_of_match, | ||
| 1151 | .name = CSIS_DRIVER_NAME, | ||
| 1152 | .pm = &mipi_csis_pm_ops, | ||
| 1153 | }, | ||
| 1154 | }; | ||
| 1155 | |||
| 1156 | module_platform_driver(mipi_csis_driver); | ||
| 1157 | |||
| 1158 | MODULE_DESCRIPTION("i.MX7 MIPI CSI-2 Receiver driver"); | ||
| 1159 | MODULE_LICENSE("GPL v2"); | ||
| 1160 | MODULE_ALIAS("platform:imx7-mipi-csi2"); | ||
diff --git a/drivers/staging/media/imx074/Kconfig b/drivers/staging/media/imx074/Kconfig deleted file mode 100644 index 229cbeea580b..000000000000 --- a/drivers/staging/media/imx074/Kconfig +++ /dev/null | |||
| @@ -1,5 +0,0 @@ | |||
| 1 | config SOC_CAMERA_IMX074 | ||
| 2 | tristate "imx074 support (DEPRECATED)" | ||
| 3 | depends on SOC_CAMERA && I2C | ||
| 4 | help | ||
| 5 | This driver supports IMX074 cameras from Sony | ||
diff --git a/drivers/staging/media/imx074/Makefile b/drivers/staging/media/imx074/Makefile deleted file mode 100644 index 7d183574aa84..000000000000 --- a/drivers/staging/media/imx074/Makefile +++ /dev/null | |||
| @@ -1 +0,0 @@ | |||
| 1 | obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o | ||
diff --git a/drivers/staging/media/imx074/TODO b/drivers/staging/media/imx074/TODO deleted file mode 100644 index 15580a4f950c..000000000000 --- a/drivers/staging/media/imx074/TODO +++ /dev/null | |||
| @@ -1,5 +0,0 @@ | |||
| 1 | This sensor driver needs to be converted to a regular | ||
| 2 | v4l2 subdev driver. The soc_camera framework is deprecated and | ||
| 3 | will be removed in the future. Unless someone does this work this | ||
| 4 | sensor driver will be deleted when the soc_camera framework is | ||
| 5 | deleted. | ||
diff --git a/drivers/staging/media/ipu3/Makefile b/drivers/staging/media/ipu3/Makefile index fb146d178bd4..fa7fa3372bcb 100644 --- a/drivers/staging/media/ipu3/Makefile +++ b/drivers/staging/media/ipu3/Makefile | |||
| @@ -9,3 +9,9 @@ ipu3-imgu-objs += \ | |||
| 9 | ipu3-css.o ipu3-v4l2.o ipu3.o | 9 | ipu3-css.o ipu3-v4l2.o ipu3.o |
| 10 | 10 | ||
| 11 | obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3-imgu.o | 11 | obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3-imgu.o |
| 12 | |||
| 13 | # HACK! While this driver is in bad shape, don't enable several warnings | ||
| 14 | # that would be otherwise enabled with W=1 | ||
| 15 | ccflags-y += $(call cc-disable-warning, packed-not-aligned) | ||
| 16 | ccflags-y += $(call cc-disable-warning, type-limits) | ||
| 17 | ccflags-y += $(call cc-disable-warning, unused-const-variable) | ||
diff --git a/drivers/staging/media/ipu3/TODO b/drivers/staging/media/ipu3/TODO index 905bbb190217..5e55baeaea1a 100644 --- a/drivers/staging/media/ipu3/TODO +++ b/drivers/staging/media/ipu3/TODO | |||
| @@ -8,11 +8,6 @@ staging directory. | |||
| 8 | - Using ENABLED and IMMUTABLE link flags for the links where those are | 8 | - Using ENABLED and IMMUTABLE link flags for the links where those are |
| 9 | relevant. (Sakari) | 9 | relevant. (Sakari) |
| 10 | 10 | ||
| 11 | - Prefix imgu for all public APIs, i.e. change ipu3_v4l2_register() to | ||
| 12 | imgu_v4l2_register(). (Sakari) | ||
| 13 | |||
| 14 | - Use V4L2_CTRL_TYPE_MENU for dual-pipe mode control. (Sakari) | ||
| 15 | |||
| 16 | - IPU3 driver documentation (Laurent) | 11 | - IPU3 driver documentation (Laurent) |
| 17 | Add diagram in driver rst to describe output capability. | 12 | Add diagram in driver rst to describe output capability. |
| 18 | Comments on configuring v4l2 subdevs for CIO2 and ImgU. | 13 | Comments on configuring v4l2 subdevs for CIO2 and ImgU. |
| @@ -32,3 +27,5 @@ staging directory. | |||
| 32 | - Document different operation modes, and which buffer queues are relevant | 27 | - Document different operation modes, and which buffer queues are relevant |
| 33 | in each mode. To process an image, which queues require a buffer an in | 28 | in each mode. To process an image, which queues require a buffer an in |
| 34 | which ones is it optional? | 29 | which ones is it optional? |
| 30 | |||
| 31 | - Make sure it builds fine with no warnings with W=1 | ||
diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index ec0b74829351..1e7184e4311d 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h | |||
| @@ -16,12 +16,6 @@ | |||
| 16 | #define V4L2_CID_INTEL_IPU3_BASE (V4L2_CID_USER_BASE + 0x10c0) | 16 | #define V4L2_CID_INTEL_IPU3_BASE (V4L2_CID_USER_BASE + 0x10c0) |
| 17 | #define V4L2_CID_INTEL_IPU3_MODE (V4L2_CID_INTEL_IPU3_BASE + 1) | 17 | #define V4L2_CID_INTEL_IPU3_MODE (V4L2_CID_INTEL_IPU3_BASE + 1) |
| 18 | 18 | ||
| 19 | /* custom ctrl to set pipe mode */ | ||
| 20 | enum ipu3_running_mode { | ||
| 21 | IPU3_RUNNING_MODE_VIDEO = 0, | ||
| 22 | IPU3_RUNNING_MODE_STILL = 1, | ||
| 23 | }; | ||
| 24 | |||
| 25 | /******************* ipu3_uapi_stats_3a *******************/ | 19 | /******************* ipu3_uapi_stats_3a *******************/ |
| 26 | 20 | ||
| 27 | #define IPU3_UAPI_MAX_STRIPES 2 | 21 | #define IPU3_UAPI_MAX_STRIPES 2 |
| @@ -438,11 +432,11 @@ struct ipu3_uapi_awb_fr_raw_buffer { | |||
| 438 | * | 432 | * |
| 439 | * @grid_cfg: grid config, default 16x16. | 433 | * @grid_cfg: grid config, default 16x16. |
| 440 | * @bayer_coeff: 1D Filter 1x11 center symmetry/anti-symmetry. | 434 | * @bayer_coeff: 1D Filter 1x11 center symmetry/anti-symmetry. |
| 441 | * coeffcients defaults { 0, 0, 0, 0, 0, 128 }. | 435 | * coefficients defaults { 0, 0, 0, 0, 0, 128 }. |
| 442 | * Applied on whole image for each Bayer channel separately | 436 | * Applied on whole image for each Bayer channel separately |
| 443 | * by a weighted sum of its 11x1 neighbors. | 437 | * by a weighted sum of its 11x1 neighbors. |
| 444 | * @reserved1: reserved | 438 | * @reserved1: reserved |
| 445 | * @bayer_sign: sign of filter coeffcients, default 0. | 439 | * @bayer_sign: sign of filter coefficients, default 0. |
| 446 | * @bayer_nf: normalization factor for the convolution coeffs, to make sure | 440 | * @bayer_nf: normalization factor for the convolution coeffs, to make sure |
| 447 | * total memory needed is within pre-determined range. | 441 | * total memory needed is within pre-determined range. |
| 448 | * NF should be the log2 of the sum of the abs values of the | 442 | * NF should be the log2 of the sum of the abs values of the |
diff --git a/drivers/staging/media/ipu3/ipu3-abi.h b/drivers/staging/media/ipu3/ipu3-abi.h index 25be56ff01c8..e1185602c7fd 100644 --- a/drivers/staging/media/ipu3/ipu3-abi.h +++ b/drivers/staging/media/ipu3/ipu3-abi.h | |||
| @@ -1510,7 +1510,7 @@ struct imgu_abi_blob_info { | |||
| 1510 | /* offset wrt hdr in bytes */ | 1510 | /* offset wrt hdr in bytes */ |
| 1511 | u32 prog_name_offset; /* offset wrt hdr in bytes */ | 1511 | u32 prog_name_offset; /* offset wrt hdr in bytes */ |
| 1512 | u32 size; /* Size of blob */ | 1512 | u32 size; /* Size of blob */ |
| 1513 | u32 padding_size; /* total cummulative of bytes added | 1513 | u32 padding_size; /* total cumulative of bytes added |
| 1514 | * due to section alignment | 1514 | * due to section alignment |
| 1515 | */ | 1515 | */ |
| 1516 | u32 icache_source; /* Position of icache in blob */ | 1516 | u32 icache_source; /* Position of icache in blob */ |
diff --git a/drivers/staging/media/ipu3/ipu3-css-fw.c b/drivers/staging/media/ipu3/ipu3-css-fw.c index 55861aa8fb03..4122d4e42db6 100644 --- a/drivers/staging/media/ipu3/ipu3-css-fw.c +++ b/drivers/staging/media/ipu3/ipu3-css-fw.c | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | #include "ipu3-css-fw.h" | 10 | #include "ipu3-css-fw.h" |
| 11 | #include "ipu3-dmamap.h" | 11 | #include "ipu3-dmamap.h" |
| 12 | 12 | ||
| 13 | static void ipu3_css_fw_show_binary(struct device *dev, struct imgu_fw_info *bi, | 13 | static void imgu_css_fw_show_binary(struct device *dev, struct imgu_fw_info *bi, |
| 14 | const char *name) | 14 | const char *name) |
| 15 | { | 15 | { |
| 16 | unsigned int i; | 16 | unsigned int i; |
| @@ -54,7 +54,7 @@ static void ipu3_css_fw_show_binary(struct device *dev, struct imgu_fw_info *bi, | |||
| 54 | dev_dbg(dev, "\n"); | 54 | dev_dbg(dev, "\n"); |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | unsigned int ipu3_css_fw_obgrid_size(const struct imgu_fw_info *bi) | 57 | unsigned int imgu_css_fw_obgrid_size(const struct imgu_fw_info *bi) |
| 58 | { | 58 | { |
| 59 | unsigned int width = DIV_ROUND_UP(bi->info.isp.sp.internal.max_width, | 59 | unsigned int width = DIV_ROUND_UP(bi->info.isp.sp.internal.max_width, |
| 60 | IMGU_OBGRID_TILE_SIZE * 2) + 1; | 60 | IMGU_OBGRID_TILE_SIZE * 2) + 1; |
| @@ -69,7 +69,7 @@ unsigned int ipu3_css_fw_obgrid_size(const struct imgu_fw_info *bi) | |||
| 69 | return obgrid_size; | 69 | return obgrid_size; |
| 70 | } | 70 | } |
| 71 | 71 | ||
| 72 | void *ipu3_css_fw_pipeline_params(struct ipu3_css *css, unsigned int pipe, | 72 | void *imgu_css_fw_pipeline_params(struct imgu_css *css, unsigned int pipe, |
| 73 | enum imgu_abi_param_class cls, | 73 | enum imgu_abi_param_class cls, |
| 74 | enum imgu_abi_memories mem, | 74 | enum imgu_abi_memories mem, |
| 75 | struct imgu_fw_isp_parameter *par, | 75 | struct imgu_fw_isp_parameter *par, |
| @@ -91,7 +91,7 @@ void *ipu3_css_fw_pipeline_params(struct ipu3_css *css, unsigned int pipe, | |||
| 91 | return binary_params + par->offset; | 91 | return binary_params + par->offset; |
| 92 | } | 92 | } |
| 93 | 93 | ||
| 94 | void ipu3_css_fw_cleanup(struct ipu3_css *css) | 94 | void imgu_css_fw_cleanup(struct imgu_css *css) |
| 95 | { | 95 | { |
| 96 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 96 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 97 | 97 | ||
| @@ -99,7 +99,7 @@ void ipu3_css_fw_cleanup(struct ipu3_css *css) | |||
| 99 | unsigned int i; | 99 | unsigned int i; |
| 100 | 100 | ||
| 101 | for (i = 0; i < css->fwp->file_header.binary_nr; i++) | 101 | for (i = 0; i < css->fwp->file_header.binary_nr; i++) |
| 102 | ipu3_dmamap_free(imgu, &css->binary[i]); | 102 | imgu_dmamap_free(imgu, &css->binary[i]); |
| 103 | kfree(css->binary); | 103 | kfree(css->binary); |
| 104 | } | 104 | } |
| 105 | if (css->fw) | 105 | if (css->fw) |
| @@ -109,7 +109,7 @@ void ipu3_css_fw_cleanup(struct ipu3_css *css) | |||
| 109 | css->fw = NULL; | 109 | css->fw = NULL; |
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | int ipu3_css_fw_init(struct ipu3_css *css) | 112 | int imgu_css_fw_init(struct imgu_css *css) |
| 113 | { | 113 | { |
| 114 | static const u32 BLOCK_MAX = 65536; | 114 | static const u32 BLOCK_MAX = 65536; |
| 115 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 115 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| @@ -227,7 +227,7 @@ int ipu3_css_fw_init(struct ipu3_css *css) | |||
| 227 | css->fw->size) | 227 | css->fw->size) |
| 228 | goto bad_fw; | 228 | goto bad_fw; |
| 229 | 229 | ||
| 230 | ipu3_css_fw_show_binary(dev, bi, name); | 230 | imgu_css_fw_show_binary(dev, bi, name); |
| 231 | } | 231 | } |
| 232 | 232 | ||
| 233 | if (css->fw_bl == -1 || css->fw_sp[0] == -1 || css->fw_sp[1] == -1) | 233 | if (css->fw_bl == -1 || css->fw_sp[0] == -1 || css->fw_sp[1] == -1) |
| @@ -246,7 +246,7 @@ int ipu3_css_fw_init(struct ipu3_css *css) | |||
| 246 | void *blob = (void *)css->fwp + bi->blob.offset; | 246 | void *blob = (void *)css->fwp + bi->blob.offset; |
| 247 | size_t size = bi->blob.size; | 247 | size_t size = bi->blob.size; |
| 248 | 248 | ||
| 249 | if (!ipu3_dmamap_alloc(imgu, &css->binary[i], size)) { | 249 | if (!imgu_dmamap_alloc(imgu, &css->binary[i], size)) { |
| 250 | r = -ENOMEM; | 250 | r = -ENOMEM; |
| 251 | goto error_out; | 251 | goto error_out; |
| 252 | } | 252 | } |
| @@ -260,6 +260,6 @@ bad_fw: | |||
| 260 | r = -ENODEV; | 260 | r = -ENODEV; |
| 261 | 261 | ||
| 262 | error_out: | 262 | error_out: |
| 263 | ipu3_css_fw_cleanup(css); | 263 | imgu_css_fw_cleanup(css); |
| 264 | return r; | 264 | return r; |
| 265 | } | 265 | } |
diff --git a/drivers/staging/media/ipu3/ipu3-css-fw.h b/drivers/staging/media/ipu3/ipu3-css-fw.h index 07d8bb8b25f3..79ffa7045139 100644 --- a/drivers/staging/media/ipu3/ipu3-css-fw.h +++ b/drivers/staging/media/ipu3/ipu3-css-fw.h | |||
| @@ -175,11 +175,11 @@ struct imgu_fw_header { | |||
| 175 | 175 | ||
| 176 | /******************* Firmware functions *******************/ | 176 | /******************* Firmware functions *******************/ |
| 177 | 177 | ||
| 178 | int ipu3_css_fw_init(struct ipu3_css *css); | 178 | int imgu_css_fw_init(struct imgu_css *css); |
| 179 | void ipu3_css_fw_cleanup(struct ipu3_css *css); | 179 | void imgu_css_fw_cleanup(struct imgu_css *css); |
| 180 | 180 | ||
| 181 | unsigned int ipu3_css_fw_obgrid_size(const struct imgu_fw_info *bi); | 181 | unsigned int imgu_css_fw_obgrid_size(const struct imgu_fw_info *bi); |
| 182 | void *ipu3_css_fw_pipeline_params(struct ipu3_css *css, unsigned int pipe, | 182 | void *imgu_css_fw_pipeline_params(struct imgu_css *css, unsigned int pipe, |
| 183 | enum imgu_abi_param_class cls, | 183 | enum imgu_abi_param_class cls, |
| 184 | enum imgu_abi_memories mem, | 184 | enum imgu_abi_memories mem, |
| 185 | struct imgu_fw_isp_parameter *par, | 185 | struct imgu_fw_isp_parameter *par, |
diff --git a/drivers/staging/media/ipu3/ipu3-css-params.c b/drivers/staging/media/ipu3/ipu3-css-params.c index 776206ded83b..4533dacad4be 100644 --- a/drivers/staging/media/ipu3/ipu3-css-params.c +++ b/drivers/staging/media/ipu3/ipu3-css-params.c | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | #include "ipu3-css.h" | 6 | #include "ipu3-css.h" |
| 7 | #include "ipu3-css-fw.h" | 7 | #include "ipu3-css-fw.h" |
| 8 | #include "ipu3-tables.h" | 8 | #include "ipu3-tables.h" |
| 9 | #include "ipu3-css-params.h" | ||
| 9 | 10 | ||
| 10 | #define DIV_ROUND_CLOSEST_DOWN(a, b) (((a) + ((b) / 2) - 1) / (b)) | 11 | #define DIV_ROUND_CLOSEST_DOWN(a, b) (((a) + ((b) / 2) - 1) / (b)) |
| 11 | #define roundclosest_down(a, b) (DIV_ROUND_CLOSEST_DOWN(a, b) * (b)) | 12 | #define roundclosest_down(a, b) (DIV_ROUND_CLOSEST_DOWN(a, b) * (b)) |
| @@ -13,7 +14,7 @@ | |||
| 13 | #define IPU3_UAPI_ANR_MAX_RESET ((1 << 12) - 1) | 14 | #define IPU3_UAPI_ANR_MAX_RESET ((1 << 12) - 1) |
| 14 | #define IPU3_UAPI_ANR_MIN_RESET (((-1) << 12) + 1) | 15 | #define IPU3_UAPI_ANR_MIN_RESET (((-1) << 12) + 1) |
| 15 | 16 | ||
| 16 | struct ipu3_css_scaler_info { | 17 | struct imgu_css_scaler_info { |
| 17 | unsigned int phase_step; /* Same for luma/chroma */ | 18 | unsigned int phase_step; /* Same for luma/chroma */ |
| 18 | int exp_shift; | 19 | int exp_shift; |
| 19 | 20 | ||
| @@ -24,7 +25,7 @@ struct ipu3_css_scaler_info { | |||
| 24 | int crop_top; | 25 | int crop_top; |
| 25 | }; | 26 | }; |
| 26 | 27 | ||
| 27 | static unsigned int ipu3_css_scaler_get_exp(unsigned int counter, | 28 | static unsigned int imgu_css_scaler_get_exp(unsigned int counter, |
| 28 | unsigned int divider) | 29 | unsigned int divider) |
| 29 | { | 30 | { |
| 30 | int i = fls(divider) - fls(counter); | 31 | int i = fls(divider) - fls(counter); |
| @@ -40,13 +41,13 @@ static unsigned int ipu3_css_scaler_get_exp(unsigned int counter, | |||
| 40 | 41 | ||
| 41 | /* Set up the CSS scaler look up table */ | 42 | /* Set up the CSS scaler look up table */ |
| 42 | static void | 43 | static void |
| 43 | ipu3_css_scaler_setup_lut(unsigned int taps, unsigned int input_width, | 44 | imgu_css_scaler_setup_lut(unsigned int taps, unsigned int input_width, |
| 44 | unsigned int output_width, int phase_step_correction, | 45 | unsigned int output_width, int phase_step_correction, |
| 45 | const int *coeffs, unsigned int coeffs_size, | 46 | const int *coeffs, unsigned int coeffs_size, |
| 46 | s8 coeff_lut[], struct ipu3_css_scaler_info *info) | 47 | s8 coeff_lut[], struct imgu_css_scaler_info *info) |
| 47 | { | 48 | { |
| 48 | int tap, phase, phase_sum_left, phase_sum_right; | 49 | int tap, phase, phase_sum_left, phase_sum_right; |
| 49 | int exponent = ipu3_css_scaler_get_exp(output_width, input_width); | 50 | int exponent = imgu_css_scaler_get_exp(output_width, input_width); |
| 50 | int mantissa = (1 << exponent) * output_width; | 51 | int mantissa = (1 << exponent) * output_width; |
| 51 | unsigned int phase_step; | 52 | unsigned int phase_step; |
| 52 | 53 | ||
| @@ -113,8 +114,8 @@ ipu3_css_scaler_setup_lut(unsigned int taps, unsigned int input_width, | |||
| 113 | * (must be perfectly aligned with hardware). | 114 | * (must be perfectly aligned with hardware). |
| 114 | */ | 115 | */ |
| 115 | static unsigned int | 116 | static unsigned int |
| 116 | ipu3_css_scaler_calc_scaled_output(unsigned int input, | 117 | imgu_css_scaler_calc_scaled_output(unsigned int input, |
| 117 | struct ipu3_css_scaler_info *info) | 118 | struct imgu_css_scaler_info *info) |
| 118 | { | 119 | { |
| 119 | unsigned int arg1 = input * info->phase_step + | 120 | unsigned int arg1 = input * info->phase_step + |
| 120 | (1 - IMGU_SCALER_TAPS_Y / 2) * IMGU_SCALER_FIR_PHASES - | 121 | (1 - IMGU_SCALER_TAPS_Y / 2) * IMGU_SCALER_FIR_PHASES - |
| @@ -132,10 +133,10 @@ ipu3_css_scaler_calc_scaled_output(unsigned int input, | |||
| 132 | * and chroma details of a scaler | 133 | * and chroma details of a scaler |
| 133 | */ | 134 | */ |
| 134 | static void | 135 | static void |
| 135 | ipu3_css_scaler_calc(u32 input_width, u32 input_height, u32 target_width, | 136 | imgu_css_scaler_calc(u32 input_width, u32 input_height, u32 target_width, |
| 136 | u32 target_height, struct imgu_abi_osys_config *cfg, | 137 | u32 target_height, struct imgu_abi_osys_config *cfg, |
| 137 | struct ipu3_css_scaler_info *info_luma, | 138 | struct imgu_css_scaler_info *info_luma, |
| 138 | struct ipu3_css_scaler_info *info_chroma, | 139 | struct imgu_css_scaler_info *info_chroma, |
| 139 | unsigned int *output_width, unsigned int *output_height, | 140 | unsigned int *output_width, unsigned int *output_height, |
| 140 | unsigned int *procmode) | 141 | unsigned int *procmode) |
| 141 | { | 142 | { |
| @@ -164,24 +165,24 @@ ipu3_css_scaler_calc(u32 input_width, u32 input_height, u32 target_width, | |||
| 164 | do { | 165 | do { |
| 165 | phase_step_correction++; | 166 | phase_step_correction++; |
| 166 | 167 | ||
| 167 | ipu3_css_scaler_setup_lut(IMGU_SCALER_TAPS_Y, | 168 | imgu_css_scaler_setup_lut(IMGU_SCALER_TAPS_Y, |
| 168 | input_width, target_width, | 169 | input_width, target_width, |
| 169 | phase_step_correction, | 170 | phase_step_correction, |
| 170 | ipu3_css_downscale_4taps, | 171 | imgu_css_downscale_4taps, |
| 171 | IMGU_SCALER_DOWNSCALE_4TAPS_LEN, | 172 | IMGU_SCALER_DOWNSCALE_4TAPS_LEN, |
| 172 | cfg->scaler_coeffs_luma, info_luma); | 173 | cfg->scaler_coeffs_luma, info_luma); |
| 173 | 174 | ||
| 174 | ipu3_css_scaler_setup_lut(IMGU_SCALER_TAPS_UV, | 175 | imgu_css_scaler_setup_lut(IMGU_SCALER_TAPS_UV, |
| 175 | input_width, target_width, | 176 | input_width, target_width, |
| 176 | phase_step_correction, | 177 | phase_step_correction, |
| 177 | ipu3_css_downscale_2taps, | 178 | imgu_css_downscale_2taps, |
| 178 | IMGU_SCALER_DOWNSCALE_2TAPS_LEN, | 179 | IMGU_SCALER_DOWNSCALE_2TAPS_LEN, |
| 179 | cfg->scaler_coeffs_chroma, | 180 | cfg->scaler_coeffs_chroma, |
| 180 | info_chroma); | 181 | info_chroma); |
| 181 | 182 | ||
| 182 | out_width = ipu3_css_scaler_calc_scaled_output(input_width, | 183 | out_width = imgu_css_scaler_calc_scaled_output(input_width, |
| 183 | info_luma); | 184 | info_luma); |
| 184 | out_height = ipu3_css_scaler_calc_scaled_output(input_height, | 185 | out_height = imgu_css_scaler_calc_scaled_output(input_height, |
| 185 | info_luma); | 186 | info_luma); |
| 186 | } while ((out_width < target_width || out_height < target_height || | 187 | } while ((out_width < target_width || out_height < target_height || |
| 187 | !IS_ALIGNED(out_height, height_alignment)) && | 188 | !IS_ALIGNED(out_height, height_alignment)) && |
| @@ -193,7 +194,7 @@ ipu3_css_scaler_calc(u32 input_width, u32 input_height, u32 target_width, | |||
| 193 | 194 | ||
| 194 | /********************** Osys routines for scaler****************************/ | 195 | /********************** Osys routines for scaler****************************/ |
| 195 | 196 | ||
| 196 | static void ipu3_css_osys_set_format(enum imgu_abi_frame_format host_format, | 197 | static void imgu_css_osys_set_format(enum imgu_abi_frame_format host_format, |
| 197 | unsigned int *osys_format, | 198 | unsigned int *osys_format, |
| 198 | unsigned int *osys_tiling) | 199 | unsigned int *osys_tiling) |
| 199 | { | 200 | { |
| @@ -230,7 +231,7 @@ static void ipu3_css_osys_set_format(enum imgu_abi_frame_format host_format, | |||
| 230 | * Function calculates input frame stripe offset, based | 231 | * Function calculates input frame stripe offset, based |
| 231 | * on output frame stripe offset and filter parameters. | 232 | * on output frame stripe offset and filter parameters. |
| 232 | */ | 233 | */ |
| 233 | static int ipu3_css_osys_calc_stripe_offset(int stripe_offset_out, | 234 | static int imgu_css_osys_calc_stripe_offset(int stripe_offset_out, |
| 234 | int fir_phases, int phase_init, | 235 | int fir_phases, int phase_init, |
| 235 | int phase_step, int pad_left) | 236 | int phase_step, int pad_left) |
| 236 | { | 237 | { |
| @@ -244,12 +245,12 @@ static int ipu3_css_osys_calc_stripe_offset(int stripe_offset_out, | |||
| 244 | * Calculate input frame phase, given the output frame | 245 | * Calculate input frame phase, given the output frame |
| 245 | * stripe offset and filter parameters | 246 | * stripe offset and filter parameters |
| 246 | */ | 247 | */ |
| 247 | static int ipu3_css_osys_calc_stripe_phase_init(int stripe_offset_out, | 248 | static int imgu_css_osys_calc_stripe_phase_init(int stripe_offset_out, |
| 248 | int fir_phases, int phase_init, | 249 | int fir_phases, int phase_init, |
| 249 | int phase_step, int pad_left) | 250 | int phase_step, int pad_left) |
| 250 | { | 251 | { |
| 251 | int stripe_offset_inp = | 252 | int stripe_offset_inp = |
| 252 | ipu3_css_osys_calc_stripe_offset(stripe_offset_out, | 253 | imgu_css_osys_calc_stripe_offset(stripe_offset_out, |
| 253 | fir_phases, phase_init, | 254 | fir_phases, phase_init, |
| 254 | phase_step, pad_left); | 255 | phase_step, pad_left); |
| 255 | 256 | ||
| @@ -261,7 +262,7 @@ static int ipu3_css_osys_calc_stripe_phase_init(int stripe_offset_out, | |||
| 261 | * This function calculates input frame stripe width, | 262 | * This function calculates input frame stripe width, |
| 262 | * based on output frame stripe offset and filter parameters | 263 | * based on output frame stripe offset and filter parameters |
| 263 | */ | 264 | */ |
| 264 | static int ipu3_css_osys_calc_inp_stripe_width(int stripe_width_out, | 265 | static int imgu_css_osys_calc_inp_stripe_width(int stripe_width_out, |
| 265 | int fir_phases, int phase_init, | 266 | int fir_phases, int phase_init, |
| 266 | int phase_step, int fir_taps, | 267 | int phase_step, int fir_taps, |
| 267 | int pad_left, int pad_right) | 268 | int pad_left, int pad_right) |
| @@ -278,7 +279,7 @@ static int ipu3_css_osys_calc_inp_stripe_width(int stripe_width_out, | |||
| 278 | * This function calculates output frame stripe width, basedi | 279 | * This function calculates output frame stripe width, basedi |
| 279 | * on output frame stripe offset and filter parameters | 280 | * on output frame stripe offset and filter parameters |
| 280 | */ | 281 | */ |
| 281 | static int ipu3_css_osys_out_stripe_width(int stripe_width_inp, int fir_phases, | 282 | static int imgu_css_osys_out_stripe_width(int stripe_width_inp, int fir_phases, |
| 282 | int phase_init, int phase_step, | 283 | int phase_init, int phase_step, |
| 283 | int fir_taps, int pad_left, | 284 | int fir_taps, int pad_left, |
| 284 | int pad_right, int column_offset) | 285 | int pad_right, int column_offset) |
| @@ -291,7 +292,7 @@ static int ipu3_css_osys_out_stripe_width(int stripe_width_inp, int fir_phases, | |||
| 291 | return stripe_width_out - (fir_taps - 1); | 292 | return stripe_width_out - (fir_taps - 1); |
| 292 | } | 293 | } |
| 293 | 294 | ||
| 294 | struct ipu3_css_reso { | 295 | struct imgu_css_reso { |
| 295 | unsigned int input_width; | 296 | unsigned int input_width; |
| 296 | unsigned int input_height; | 297 | unsigned int input_height; |
| 297 | enum imgu_abi_frame_format input_format; | 298 | enum imgu_abi_frame_format input_format; |
| @@ -305,7 +306,7 @@ struct ipu3_css_reso { | |||
| 305 | int block_width; | 306 | int block_width; |
| 306 | }; | 307 | }; |
| 307 | 308 | ||
| 308 | struct ipu3_css_frame_params { | 309 | struct imgu_css_frame_params { |
| 309 | /* Output pins */ | 310 | /* Output pins */ |
| 310 | unsigned int enable; | 311 | unsigned int enable; |
| 311 | unsigned int format; | 312 | unsigned int format; |
| @@ -321,7 +322,7 @@ struct ipu3_css_frame_params { | |||
| 321 | unsigned int crop_top; | 322 | unsigned int crop_top; |
| 322 | }; | 323 | }; |
| 323 | 324 | ||
| 324 | struct ipu3_css_stripe_params { | 325 | struct imgu_css_stripe_params { |
| 325 | unsigned int processing_mode; | 326 | unsigned int processing_mode; |
| 326 | unsigned int phase_step; | 327 | unsigned int phase_step; |
| 327 | unsigned int exp_shift; | 328 | unsigned int exp_shift; |
| @@ -358,20 +359,20 @@ struct ipu3_css_stripe_params { | |||
| 358 | * frame_params - size IMGU_ABI_OSYS_PINS | 359 | * frame_params - size IMGU_ABI_OSYS_PINS |
| 359 | * stripe_params - size IPU3_UAPI_MAX_STRIPES | 360 | * stripe_params - size IPU3_UAPI_MAX_STRIPES |
| 360 | */ | 361 | */ |
| 361 | static int ipu3_css_osys_calc_frame_and_stripe_params( | 362 | static int imgu_css_osys_calc_frame_and_stripe_params( |
| 362 | struct ipu3_css *css, unsigned int stripes, | 363 | struct imgu_css *css, unsigned int stripes, |
| 363 | struct imgu_abi_osys_config *osys, | 364 | struct imgu_abi_osys_config *osys, |
| 364 | struct ipu3_css_scaler_info *scaler_luma, | 365 | struct imgu_css_scaler_info *scaler_luma, |
| 365 | struct ipu3_css_scaler_info *scaler_chroma, | 366 | struct imgu_css_scaler_info *scaler_chroma, |
| 366 | struct ipu3_css_frame_params frame_params[], | 367 | struct imgu_css_frame_params frame_params[], |
| 367 | struct ipu3_css_stripe_params stripe_params[], | 368 | struct imgu_css_stripe_params stripe_params[], |
| 368 | unsigned int pipe) | 369 | unsigned int pipe) |
| 369 | { | 370 | { |
| 370 | struct ipu3_css_reso reso; | 371 | struct imgu_css_reso reso; |
| 371 | unsigned int output_width, pin, s; | 372 | unsigned int output_width, pin, s; |
| 372 | u32 input_width, input_height, target_width, target_height; | 373 | u32 input_width, input_height, target_width, target_height; |
| 373 | unsigned int procmode = 0; | 374 | unsigned int procmode = 0; |
| 374 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 375 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 375 | 376 | ||
| 376 | input_width = css_pipe->rect[IPU3_CSS_RECT_GDC].width; | 377 | input_width = css_pipe->rect[IPU3_CSS_RECT_GDC].width; |
| 377 | input_height = css_pipe->rect[IPU3_CSS_RECT_GDC].height; | 378 | input_height = css_pipe->rect[IPU3_CSS_RECT_GDC].height; |
| @@ -463,7 +464,7 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 463 | scaled = 1; | 464 | scaled = 1; |
| 464 | } | 465 | } |
| 465 | } | 466 | } |
| 466 | ipu3_css_osys_set_format(reso.pin_format[pin], &format, | 467 | imgu_css_osys_set_format(reso.pin_format[pin], &format, |
| 467 | &tiling); | 468 | &tiling); |
| 468 | } else { | 469 | } else { |
| 469 | enable = 0; | 470 | enable = 0; |
| @@ -475,7 +476,7 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 475 | frame_params[pin].scaled = scaled; | 476 | frame_params[pin].scaled = scaled; |
| 476 | } | 477 | } |
| 477 | 478 | ||
| 478 | ipu3_css_scaler_calc(input_width, input_height, target_width, | 479 | imgu_css_scaler_calc(input_width, input_height, target_width, |
| 479 | target_height, osys, scaler_luma, scaler_chroma, | 480 | target_height, osys, scaler_luma, scaler_chroma, |
| 480 | &reso.pin_width[IMGU_ABI_OSYS_PIN_VF], | 481 | &reso.pin_width[IMGU_ABI_OSYS_PIN_VF], |
| 481 | &reso.pin_height[IMGU_ABI_OSYS_PIN_VF], &procmode); | 482 | &reso.pin_height[IMGU_ABI_OSYS_PIN_VF], &procmode); |
| @@ -580,14 +581,14 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 580 | stripe_offset_out_uv = stripe_offset_out_y / | 581 | stripe_offset_out_uv = stripe_offset_out_y / |
| 581 | IMGU_LUMA_TO_CHROMA_RATIO; | 582 | IMGU_LUMA_TO_CHROMA_RATIO; |
| 582 | stripe_offset_inp_y = | 583 | stripe_offset_inp_y = |
| 583 | ipu3_css_osys_calc_stripe_offset( | 584 | imgu_css_osys_calc_stripe_offset( |
| 584 | stripe_offset_out_y, | 585 | stripe_offset_out_y, |
| 585 | IMGU_OSYS_FIR_PHASES, | 586 | IMGU_OSYS_FIR_PHASES, |
| 586 | scaler_luma->phase_init, | 587 | scaler_luma->phase_init, |
| 587 | scaler_luma->phase_step, | 588 | scaler_luma->phase_step, |
| 588 | scaler_luma->pad_left); | 589 | scaler_luma->pad_left); |
| 589 | stripe_offset_inp_uv = | 590 | stripe_offset_inp_uv = |
| 590 | ipu3_css_osys_calc_stripe_offset( | 591 | imgu_css_osys_calc_stripe_offset( |
| 591 | stripe_offset_out_uv, | 592 | stripe_offset_out_uv, |
| 592 | IMGU_OSYS_FIR_PHASES, | 593 | IMGU_OSYS_FIR_PHASES, |
| 593 | scaler_chroma->phase_init, | 594 | scaler_chroma->phase_init, |
| @@ -596,14 +597,14 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 596 | 597 | ||
| 597 | /* Calculate stripe phase init */ | 598 | /* Calculate stripe phase init */ |
| 598 | stripe_phase_init_y = | 599 | stripe_phase_init_y = |
| 599 | ipu3_css_osys_calc_stripe_phase_init( | 600 | imgu_css_osys_calc_stripe_phase_init( |
| 600 | stripe_offset_out_y, | 601 | stripe_offset_out_y, |
| 601 | IMGU_OSYS_FIR_PHASES, | 602 | IMGU_OSYS_FIR_PHASES, |
| 602 | scaler_luma->phase_init, | 603 | scaler_luma->phase_init, |
| 603 | scaler_luma->phase_step, | 604 | scaler_luma->phase_step, |
| 604 | scaler_luma->pad_left); | 605 | scaler_luma->pad_left); |
| 605 | stripe_phase_init_uv = | 606 | stripe_phase_init_uv = |
| 606 | ipu3_css_osys_calc_stripe_phase_init( | 607 | imgu_css_osys_calc_stripe_phase_init( |
| 607 | stripe_offset_out_uv, | 608 | stripe_offset_out_uv, |
| 608 | IMGU_OSYS_FIR_PHASES, | 609 | IMGU_OSYS_FIR_PHASES, |
| 609 | scaler_chroma->phase_init, | 610 | scaler_chroma->phase_init, |
| @@ -707,7 +708,7 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 707 | IMGU_LUMA_TO_CHROMA_RATIO; | 708 | IMGU_LUMA_TO_CHROMA_RATIO; |
| 708 | /* Calculate input stripe width */ | 709 | /* Calculate input stripe width */ |
| 709 | stripe_input_width_y = stripe_offset_col_y + | 710 | stripe_input_width_y = stripe_offset_col_y + |
| 710 | ipu3_css_osys_calc_inp_stripe_width( | 711 | imgu_css_osys_calc_inp_stripe_width( |
| 711 | stripe_output_width_y, | 712 | stripe_output_width_y, |
| 712 | IMGU_OSYS_FIR_PHASES, | 713 | IMGU_OSYS_FIR_PHASES, |
| 713 | stripe_phase_init_y, | 714 | stripe_phase_init_y, |
| @@ -717,7 +718,7 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 717 | stripe_pad_right_y); | 718 | stripe_pad_right_y); |
| 718 | 719 | ||
| 719 | stripe_input_width_uv = stripe_offset_col_uv + | 720 | stripe_input_width_uv = stripe_offset_col_uv + |
| 720 | ipu3_css_osys_calc_inp_stripe_width( | 721 | imgu_css_osys_calc_inp_stripe_width( |
| 721 | stripe_output_width_uv, | 722 | stripe_output_width_uv, |
| 722 | IMGU_OSYS_FIR_PHASES, | 723 | IMGU_OSYS_FIR_PHASES, |
| 723 | stripe_phase_init_uv, | 724 | stripe_phase_init_uv, |
| @@ -752,7 +753,7 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 752 | */ | 753 | */ |
| 753 | stripe_input_width_y = ALIGN(stripe_input_width_y, 8); | 754 | stripe_input_width_y = ALIGN(stripe_input_width_y, 8); |
| 754 | stripe_output_width_y = | 755 | stripe_output_width_y = |
| 755 | ipu3_css_osys_out_stripe_width( | 756 | imgu_css_osys_out_stripe_width( |
| 756 | stripe_input_width_y, | 757 | stripe_input_width_y, |
| 757 | IMGU_OSYS_FIR_PHASES, | 758 | IMGU_OSYS_FIR_PHASES, |
| 758 | stripe_phase_init_y, | 759 | stripe_phase_init_y, |
| @@ -846,23 +847,23 @@ static int ipu3_css_osys_calc_frame_and_stripe_params( | |||
| 846 | * This function configures the Output Formatter System, given the number of | 847 | * This function configures the Output Formatter System, given the number of |
| 847 | * stripes, scaler luma and chrome parameters | 848 | * stripes, scaler luma and chrome parameters |
| 848 | */ | 849 | */ |
| 849 | static int ipu3_css_osys_calc(struct ipu3_css *css, unsigned int pipe, | 850 | static int imgu_css_osys_calc(struct imgu_css *css, unsigned int pipe, |
| 850 | unsigned int stripes, | 851 | unsigned int stripes, |
| 851 | struct imgu_abi_osys_config *osys, | 852 | struct imgu_abi_osys_config *osys, |
| 852 | struct ipu3_css_scaler_info *scaler_luma, | 853 | struct imgu_css_scaler_info *scaler_luma, |
| 853 | struct ipu3_css_scaler_info *scaler_chroma, | 854 | struct imgu_css_scaler_info *scaler_chroma, |
| 854 | struct imgu_abi_stripes block_stripes[]) | 855 | struct imgu_abi_stripes block_stripes[]) |
| 855 | { | 856 | { |
| 856 | struct ipu3_css_frame_params frame_params[IMGU_ABI_OSYS_PINS]; | 857 | struct imgu_css_frame_params frame_params[IMGU_ABI_OSYS_PINS]; |
| 857 | struct ipu3_css_stripe_params stripe_params[IPU3_UAPI_MAX_STRIPES]; | 858 | struct imgu_css_stripe_params stripe_params[IPU3_UAPI_MAX_STRIPES]; |
| 858 | struct imgu_abi_osys_formatter_params *param; | 859 | struct imgu_abi_osys_formatter_params *param; |
| 859 | unsigned int pin, s; | 860 | unsigned int pin, s; |
| 860 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 861 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 861 | 862 | ||
| 862 | memset(osys, 0, sizeof(*osys)); | 863 | memset(osys, 0, sizeof(*osys)); |
| 863 | 864 | ||
| 864 | /* Compute the frame and stripe params */ | 865 | /* Compute the frame and stripe params */ |
| 865 | if (ipu3_css_osys_calc_frame_and_stripe_params(css, stripes, osys, | 866 | if (imgu_css_osys_calc_frame_and_stripe_params(css, stripes, osys, |
| 866 | scaler_luma, | 867 | scaler_luma, |
| 867 | scaler_chroma, | 868 | scaler_chroma, |
| 868 | frame_params, | 869 | frame_params, |
| @@ -1251,7 +1252,7 @@ static int ipu3_css_osys_calc(struct ipu3_css *css, unsigned int pipe, | |||
| 1251 | */ | 1252 | */ |
| 1252 | 1253 | ||
| 1253 | static int | 1254 | static int |
| 1254 | ipu3_css_shd_ops_calc(struct imgu_abi_shd_intra_frame_operations_data *ops, | 1255 | imgu_css_shd_ops_calc(struct imgu_abi_shd_intra_frame_operations_data *ops, |
| 1255 | const struct ipu3_uapi_shd_grid_config *grid, | 1256 | const struct ipu3_uapi_shd_grid_config *grid, |
| 1256 | unsigned int image_height) | 1257 | unsigned int image_height) |
| 1257 | { | 1258 | { |
| @@ -1495,7 +1496,7 @@ struct process_lines { | |||
| 1495 | 1496 | ||
| 1496 | /* Helper to config intra_frame_operations_data. */ | 1497 | /* Helper to config intra_frame_operations_data. */ |
| 1497 | static int | 1498 | static int |
| 1498 | ipu3_css_acc_process_lines(const struct process_lines *pl, | 1499 | imgu_css_acc_process_lines(const struct process_lines *pl, |
| 1499 | struct imgu_abi_acc_operation *p_op, | 1500 | struct imgu_abi_acc_operation *p_op, |
| 1500 | struct imgu_abi_acc_process_lines_cmd_data *p_pl, | 1501 | struct imgu_abi_acc_process_lines_cmd_data *p_pl, |
| 1501 | struct imgu_abi_acc_transfer_op_data *p_tr) | 1502 | struct imgu_abi_acc_transfer_op_data *p_tr) |
| @@ -1632,12 +1633,12 @@ ipu3_css_acc_process_lines(const struct process_lines *pl, | |||
| 1632 | return 0; | 1633 | return 0; |
| 1633 | } | 1634 | } |
| 1634 | 1635 | ||
| 1635 | static int ipu3_css_af_ops_calc(struct ipu3_css *css, unsigned int pipe, | 1636 | static int imgu_css_af_ops_calc(struct imgu_css *css, unsigned int pipe, |
| 1636 | struct imgu_abi_af_config *af_config) | 1637 | struct imgu_abi_af_config *af_config) |
| 1637 | { | 1638 | { |
| 1638 | struct imgu_abi_af_intra_frame_operations_data *to = | 1639 | struct imgu_abi_af_intra_frame_operations_data *to = |
| 1639 | &af_config->operations_data; | 1640 | &af_config->operations_data; |
| 1640 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1641 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1641 | struct imgu_fw_info *bi = | 1642 | struct imgu_fw_info *bi = |
| 1642 | &css->fwp->binary_header[css_pipe->bindex]; | 1643 | &css->fwp->binary_header[css_pipe->bindex]; |
| 1643 | 1644 | ||
| @@ -1655,17 +1656,17 @@ static int ipu3_css_af_ops_calc(struct ipu3_css *css, unsigned int pipe, | |||
| 1655 | .acc_enable = bi->info.isp.sp.enable.af, | 1656 | .acc_enable = bi->info.isp.sp.enable.af, |
| 1656 | }; | 1657 | }; |
| 1657 | 1658 | ||
| 1658 | return ipu3_css_acc_process_lines(&pl, to->ops, to->process_lines_data, | 1659 | return imgu_css_acc_process_lines(&pl, to->ops, to->process_lines_data, |
| 1659 | NULL); | 1660 | NULL); |
| 1660 | } | 1661 | } |
| 1661 | 1662 | ||
| 1662 | static int | 1663 | static int |
| 1663 | ipu3_css_awb_fr_ops_calc(struct ipu3_css *css, unsigned int pipe, | 1664 | imgu_css_awb_fr_ops_calc(struct imgu_css *css, unsigned int pipe, |
| 1664 | struct imgu_abi_awb_fr_config *awb_fr_config) | 1665 | struct imgu_abi_awb_fr_config *awb_fr_config) |
| 1665 | { | 1666 | { |
| 1666 | struct imgu_abi_awb_fr_intra_frame_operations_data *to = | 1667 | struct imgu_abi_awb_fr_intra_frame_operations_data *to = |
| 1667 | &awb_fr_config->operations_data; | 1668 | &awb_fr_config->operations_data; |
| 1668 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1669 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1669 | struct imgu_fw_info *bi = | 1670 | struct imgu_fw_info *bi = |
| 1670 | &css->fwp->binary_header[css_pipe->bindex]; | 1671 | &css->fwp->binary_header[css_pipe->bindex]; |
| 1671 | struct process_lines pl = { | 1672 | struct process_lines pl = { |
| @@ -1682,16 +1683,16 @@ ipu3_css_awb_fr_ops_calc(struct ipu3_css *css, unsigned int pipe, | |||
| 1682 | .acc_enable = bi->info.isp.sp.enable.awb_fr_acc, | 1683 | .acc_enable = bi->info.isp.sp.enable.awb_fr_acc, |
| 1683 | }; | 1684 | }; |
| 1684 | 1685 | ||
| 1685 | return ipu3_css_acc_process_lines(&pl, to->ops, to->process_lines_data, | 1686 | return imgu_css_acc_process_lines(&pl, to->ops, to->process_lines_data, |
| 1686 | NULL); | 1687 | NULL); |
| 1687 | } | 1688 | } |
| 1688 | 1689 | ||
| 1689 | static int ipu3_css_awb_ops_calc(struct ipu3_css *css, unsigned int pipe, | 1690 | static int imgu_css_awb_ops_calc(struct imgu_css *css, unsigned int pipe, |
| 1690 | struct imgu_abi_awb_config *awb_config) | 1691 | struct imgu_abi_awb_config *awb_config) |
| 1691 | { | 1692 | { |
| 1692 | struct imgu_abi_awb_intra_frame_operations_data *to = | 1693 | struct imgu_abi_awb_intra_frame_operations_data *to = |
| 1693 | &awb_config->operations_data; | 1694 | &awb_config->operations_data; |
| 1694 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1695 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1695 | struct imgu_fw_info *bi = | 1696 | struct imgu_fw_info *bi = |
| 1696 | &css->fwp->binary_header[css_pipe->bindex]; | 1697 | &css->fwp->binary_header[css_pipe->bindex]; |
| 1697 | 1698 | ||
| @@ -1708,33 +1709,33 @@ static int ipu3_css_awb_ops_calc(struct ipu3_css *css, unsigned int pipe, | |||
| 1708 | .acc_enable = bi->info.isp.sp.enable.awb_acc, | 1709 | .acc_enable = bi->info.isp.sp.enable.awb_acc, |
| 1709 | }; | 1710 | }; |
| 1710 | 1711 | ||
| 1711 | return ipu3_css_acc_process_lines(&pl, to->ops, to->process_lines_data, | 1712 | return imgu_css_acc_process_lines(&pl, to->ops, to->process_lines_data, |
| 1712 | to->transfer_data); | 1713 | to->transfer_data); |
| 1713 | } | 1714 | } |
| 1714 | 1715 | ||
| 1715 | static u16 ipu3_css_grid_end(u16 start, u8 width, u8 block_width_log2) | 1716 | static u16 imgu_css_grid_end(u16 start, u8 width, u8 block_width_log2) |
| 1716 | { | 1717 | { |
| 1717 | return (start & IPU3_UAPI_GRID_START_MASK) + | 1718 | return (start & IPU3_UAPI_GRID_START_MASK) + |
| 1718 | (width << block_width_log2) - 1; | 1719 | (width << block_width_log2) - 1; |
| 1719 | } | 1720 | } |
| 1720 | 1721 | ||
| 1721 | static void ipu3_css_grid_end_calc(struct ipu3_uapi_grid_config *grid_cfg) | 1722 | static void imgu_css_grid_end_calc(struct ipu3_uapi_grid_config *grid_cfg) |
| 1722 | { | 1723 | { |
| 1723 | grid_cfg->x_end = ipu3_css_grid_end(grid_cfg->x_start, grid_cfg->width, | 1724 | grid_cfg->x_end = imgu_css_grid_end(grid_cfg->x_start, grid_cfg->width, |
| 1724 | grid_cfg->block_width_log2); | 1725 | grid_cfg->block_width_log2); |
| 1725 | grid_cfg->y_end = ipu3_css_grid_end(grid_cfg->y_start, grid_cfg->height, | 1726 | grid_cfg->y_end = imgu_css_grid_end(grid_cfg->y_start, grid_cfg->height, |
| 1726 | grid_cfg->block_height_log2); | 1727 | grid_cfg->block_height_log2); |
| 1727 | } | 1728 | } |
| 1728 | 1729 | ||
| 1729 | /****************** config computation *****************************/ | 1730 | /****************** config computation *****************************/ |
| 1730 | 1731 | ||
| 1731 | static int ipu3_css_cfg_acc_stripe(struct ipu3_css *css, unsigned int pipe, | 1732 | static int imgu_css_cfg_acc_stripe(struct imgu_css *css, unsigned int pipe, |
| 1732 | struct imgu_abi_acc_param *acc) | 1733 | struct imgu_abi_acc_param *acc) |
| 1733 | { | 1734 | { |
| 1734 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1735 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1735 | const struct imgu_fw_info *bi = | 1736 | const struct imgu_fw_info *bi = |
| 1736 | &css->fwp->binary_header[css_pipe->bindex]; | 1737 | &css->fwp->binary_header[css_pipe->bindex]; |
| 1737 | struct ipu3_css_scaler_info scaler_luma, scaler_chroma; | 1738 | struct imgu_css_scaler_info scaler_luma, scaler_chroma; |
| 1738 | const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; | 1739 | const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; |
| 1739 | const unsigned int f = IPU3_UAPI_ISP_VEC_ELEMS * 2; | 1740 | const unsigned int f = IPU3_UAPI_ISP_VEC_ELEMS * 2; |
| 1740 | unsigned int bds_ds, i; | 1741 | unsigned int bds_ds, i; |
| @@ -1743,7 +1744,7 @@ static int ipu3_css_cfg_acc_stripe(struct ipu3_css *css, unsigned int pipe, | |||
| 1743 | 1744 | ||
| 1744 | /* acc_param: osys_config */ | 1745 | /* acc_param: osys_config */ |
| 1745 | 1746 | ||
| 1746 | if (ipu3_css_osys_calc(css, pipe, stripes, &acc->osys, &scaler_luma, | 1747 | if (imgu_css_osys_calc(css, pipe, stripes, &acc->osys, &scaler_luma, |
| 1747 | &scaler_chroma, acc->stripe.block_stripes)) | 1748 | &scaler_chroma, acc->stripe.block_stripes)) |
| 1748 | return -EINVAL; | 1749 | return -EINVAL; |
| 1749 | 1750 | ||
| @@ -1900,12 +1901,12 @@ static int ipu3_css_cfg_acc_stripe(struct ipu3_css *css, unsigned int pipe, | |||
| 1900 | return 0; | 1901 | return 0; |
| 1901 | } | 1902 | } |
| 1902 | 1903 | ||
| 1903 | static void ipu3_css_cfg_acc_dvs(struct ipu3_css *css, | 1904 | static void imgu_css_cfg_acc_dvs(struct imgu_css *css, |
| 1904 | struct imgu_abi_acc_param *acc, | 1905 | struct imgu_abi_acc_param *acc, |
| 1905 | unsigned int pipe) | 1906 | unsigned int pipe) |
| 1906 | { | 1907 | { |
| 1907 | unsigned int i; | 1908 | unsigned int i; |
| 1908 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1909 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1909 | 1910 | ||
| 1910 | /* Disable DVS statistics */ | 1911 | /* Disable DVS statistics */ |
| 1911 | acc->dvs_stat.operations_data.process_lines_data[0].lines = | 1912 | acc->dvs_stat.operations_data.process_lines_data[0].lines = |
| @@ -1919,11 +1920,11 @@ static void ipu3_css_cfg_acc_dvs(struct ipu3_css *css, | |||
| 1919 | acc->dvs_stat.cfg.grd_config[i].enable = 0; | 1920 | acc->dvs_stat.cfg.grd_config[i].enable = 0; |
| 1920 | } | 1921 | } |
| 1921 | 1922 | ||
| 1922 | static void acc_bds_per_stripe_data(struct ipu3_css *css, | 1923 | static void acc_bds_per_stripe_data(struct imgu_css *css, |
| 1923 | struct imgu_abi_acc_param *acc, | 1924 | struct imgu_abi_acc_param *acc, |
| 1924 | const int i, unsigned int pipe) | 1925 | const int i, unsigned int pipe) |
| 1925 | { | 1926 | { |
| 1926 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1927 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1927 | 1928 | ||
| 1928 | acc->bds.per_stripe.aligned_data[i].data.crop.hor_crop_en = 0; | 1929 | acc->bds.per_stripe.aligned_data[i].data.crop.hor_crop_en = 0; |
| 1929 | acc->bds.per_stripe.aligned_data[i].data.crop.hor_crop_start = 0; | 1930 | acc->bds.per_stripe.aligned_data[i].data.crop.hor_crop_start = 0; |
| @@ -1944,13 +1945,13 @@ static void acc_bds_per_stripe_data(struct ipu3_css *css, | |||
| 1944 | * telling which fields to take from the old values (or generate if it is NULL) | 1945 | * telling which fields to take from the old values (or generate if it is NULL) |
| 1945 | * and which to take from the new user values. | 1946 | * and which to take from the new user values. |
| 1946 | */ | 1947 | */ |
| 1947 | int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | 1948 | int imgu_css_cfg_acc(struct imgu_css *css, unsigned int pipe, |
| 1948 | struct ipu3_uapi_flags *use, | 1949 | struct ipu3_uapi_flags *use, |
| 1949 | struct imgu_abi_acc_param *acc, | 1950 | struct imgu_abi_acc_param *acc, |
| 1950 | struct imgu_abi_acc_param *acc_old, | 1951 | struct imgu_abi_acc_param *acc_old, |
| 1951 | struct ipu3_uapi_acc_param *acc_user) | 1952 | struct ipu3_uapi_acc_param *acc_user) |
| 1952 | { | 1953 | { |
| 1953 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1954 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1954 | const struct imgu_fw_info *bi = | 1955 | const struct imgu_fw_info *bi = |
| 1955 | &css->fwp->binary_header[css_pipe->bindex]; | 1956 | &css->fwp->binary_header[css_pipe->bindex]; |
| 1956 | const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; | 1957 | const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; |
| @@ -1959,7 +1960,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 1959 | const unsigned int min_overlap = 10; | 1960 | const unsigned int min_overlap = 10; |
| 1960 | const struct v4l2_pix_format_mplane *pixm = | 1961 | const struct v4l2_pix_format_mplane *pixm = |
| 1961 | &css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix; | 1962 | &css_pipe->queue[IPU3_CSS_QUEUE_IN].fmt.mpix; |
| 1962 | const struct ipu3_css_bds_config *cfg_bds; | 1963 | const struct imgu_css_bds_config *cfg_bds; |
| 1963 | struct imgu_abi_input_feeder_data *feeder_data; | 1964 | struct imgu_abi_input_feeder_data *feeder_data; |
| 1964 | 1965 | ||
| 1965 | unsigned int bds_ds, ofs_x, ofs_y, i, width, height; | 1966 | unsigned int bds_ds, ofs_x, ofs_y, i, width, height; |
| @@ -1967,7 +1968,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 1967 | 1968 | ||
| 1968 | /* Update stripe using chroma and luma */ | 1969 | /* Update stripe using chroma and luma */ |
| 1969 | 1970 | ||
| 1970 | if (ipu3_css_cfg_acc_stripe(css, pipe, acc)) | 1971 | if (imgu_css_cfg_acc_stripe(css, pipe, acc)) |
| 1971 | return -EINVAL; | 1972 | return -EINVAL; |
| 1972 | 1973 | ||
| 1973 | /* acc_param: input_feeder_config */ | 1974 | /* acc_param: input_feeder_config */ |
| @@ -2021,7 +2022,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2021 | acc->bnr = acc_old->bnr; | 2022 | acc->bnr = acc_old->bnr; |
| 2022 | } else { | 2023 | } else { |
| 2023 | /* Calculate from scratch */ | 2024 | /* Calculate from scratch */ |
| 2024 | acc->bnr = ipu3_css_bnr_defaults; | 2025 | acc->bnr = imgu_css_bnr_defaults; |
| 2025 | } | 2026 | } |
| 2026 | 2027 | ||
| 2027 | acc->bnr.column_size = tnr_frame_width; | 2028 | acc->bnr.column_size = tnr_frame_width; |
| @@ -2049,7 +2050,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2049 | acc->dm = acc_old->dm; | 2050 | acc->dm = acc_old->dm; |
| 2050 | } else { | 2051 | } else { |
| 2051 | /* Calculate from scratch */ | 2052 | /* Calculate from scratch */ |
| 2052 | acc->dm = ipu3_css_dm_defaults; | 2053 | acc->dm = imgu_css_dm_defaults; |
| 2053 | } | 2054 | } |
| 2054 | 2055 | ||
| 2055 | acc->dm.frame_width = tnr_frame_width; | 2056 | acc->dm.frame_width = tnr_frame_width; |
| @@ -2064,7 +2065,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2064 | acc->ccm = acc_old->ccm; | 2065 | acc->ccm = acc_old->ccm; |
| 2065 | } else { | 2066 | } else { |
| 2066 | /* Calculate from scratch */ | 2067 | /* Calculate from scratch */ |
| 2067 | acc->ccm = ipu3_css_ccm_defaults; | 2068 | acc->ccm = imgu_css_ccm_defaults; |
| 2068 | } | 2069 | } |
| 2069 | 2070 | ||
| 2070 | /* acc_param: gamma_config */ | 2071 | /* acc_param: gamma_config */ |
| @@ -2078,7 +2079,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2078 | } else { | 2079 | } else { |
| 2079 | /* Calculate from scratch */ | 2080 | /* Calculate from scratch */ |
| 2080 | acc->gamma.gc_ctrl.enable = 1; | 2081 | acc->gamma.gc_ctrl.enable = 1; |
| 2081 | acc->gamma.gc_lut = ipu3_css_gamma_lut; | 2082 | acc->gamma.gc_lut = imgu_css_gamma_lut; |
| 2082 | } | 2083 | } |
| 2083 | 2084 | ||
| 2084 | /* acc_param: csc_mat_config */ | 2085 | /* acc_param: csc_mat_config */ |
| @@ -2091,7 +2092,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2091 | acc->csc = acc_old->csc; | 2092 | acc->csc = acc_old->csc; |
| 2092 | } else { | 2093 | } else { |
| 2093 | /* Calculate from scratch */ | 2094 | /* Calculate from scratch */ |
| 2094 | acc->csc = ipu3_css_csc_defaults; | 2095 | acc->csc = imgu_css_csc_defaults; |
| 2095 | } | 2096 | } |
| 2096 | 2097 | ||
| 2097 | /* acc_param: cds_params */ | 2098 | /* acc_param: cds_params */ |
| @@ -2104,7 +2105,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2104 | acc->cds = acc_old->cds; | 2105 | acc->cds = acc_old->cds; |
| 2105 | } else { | 2106 | } else { |
| 2106 | /* Calculate from scratch */ | 2107 | /* Calculate from scratch */ |
| 2107 | acc->cds = ipu3_css_cds_defaults; | 2108 | acc->cds = imgu_css_cds_defaults; |
| 2108 | } | 2109 | } |
| 2109 | 2110 | ||
| 2110 | /* acc_param: shd_config */ | 2111 | /* acc_param: shd_config */ |
| @@ -2119,7 +2120,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2119 | acc->shd.shd_lut = acc_old->shd.shd_lut; | 2120 | acc->shd.shd_lut = acc_old->shd.shd_lut; |
| 2120 | } else { | 2121 | } else { |
| 2121 | /* Calculate from scratch */ | 2122 | /* Calculate from scratch */ |
| 2122 | acc->shd.shd = ipu3_css_shd_defaults; | 2123 | acc->shd.shd = imgu_css_shd_defaults; |
| 2123 | memset(&acc->shd.shd_lut, 0, sizeof(acc->shd.shd_lut)); | 2124 | memset(&acc->shd.shd_lut, 0, sizeof(acc->shd.shd_lut)); |
| 2124 | } | 2125 | } |
| 2125 | 2126 | ||
| @@ -2137,12 +2138,12 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2137 | acc->shd.shd.grid.block_height_log2) % | 2138 | acc->shd.shd.grid.block_height_log2) % |
| 2138 | acc->shd.shd.grid.grid_height_per_slice; | 2139 | acc->shd.shd.grid.grid_height_per_slice; |
| 2139 | 2140 | ||
| 2140 | if (ipu3_css_shd_ops_calc(&acc->shd.shd_ops, &acc->shd.shd.grid, | 2141 | if (imgu_css_shd_ops_calc(&acc->shd.shd_ops, &acc->shd.shd.grid, |
| 2141 | css_pipe->rect[IPU3_CSS_RECT_BDS].height)) | 2142 | css_pipe->rect[IPU3_CSS_RECT_BDS].height)) |
| 2142 | return -EINVAL; | 2143 | return -EINVAL; |
| 2143 | 2144 | ||
| 2144 | /* acc_param: dvs_stat_config */ | 2145 | /* acc_param: dvs_stat_config */ |
| 2145 | ipu3_css_cfg_acc_dvs(css, acc, pipe); | 2146 | imgu_css_cfg_acc_dvs(css, acc, pipe); |
| 2146 | 2147 | ||
| 2147 | /* acc_param: yuvp1_iefd_config */ | 2148 | /* acc_param: yuvp1_iefd_config */ |
| 2148 | 2149 | ||
| @@ -2154,7 +2155,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2154 | acc->iefd = acc_old->iefd; | 2155 | acc->iefd = acc_old->iefd; |
| 2155 | } else { | 2156 | } else { |
| 2156 | /* Calculate from scratch */ | 2157 | /* Calculate from scratch */ |
| 2157 | acc->iefd = ipu3_css_iefd_defaults; | 2158 | acc->iefd = imgu_css_iefd_defaults; |
| 2158 | } | 2159 | } |
| 2159 | 2160 | ||
| 2160 | /* acc_param: yuvp1_yds_config yds_c0 */ | 2161 | /* acc_param: yuvp1_yds_config yds_c0 */ |
| @@ -2167,7 +2168,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2167 | acc->yds_c0 = acc_old->yds_c0; | 2168 | acc->yds_c0 = acc_old->yds_c0; |
| 2168 | } else { | 2169 | } else { |
| 2169 | /* Calculate from scratch */ | 2170 | /* Calculate from scratch */ |
| 2170 | acc->yds_c0 = ipu3_css_yds_defaults; | 2171 | acc->yds_c0 = imgu_css_yds_defaults; |
| 2171 | } | 2172 | } |
| 2172 | 2173 | ||
| 2173 | /* acc_param: yuvp1_chnr_config chnr_c0 */ | 2174 | /* acc_param: yuvp1_chnr_config chnr_c0 */ |
| @@ -2180,7 +2181,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2180 | acc->chnr_c0 = acc_old->chnr_c0; | 2181 | acc->chnr_c0 = acc_old->chnr_c0; |
| 2181 | } else { | 2182 | } else { |
| 2182 | /* Calculate from scratch */ | 2183 | /* Calculate from scratch */ |
| 2183 | acc->chnr_c0 = ipu3_css_chnr_defaults; | 2184 | acc->chnr_c0 = imgu_css_chnr_defaults; |
| 2184 | } | 2185 | } |
| 2185 | 2186 | ||
| 2186 | /* acc_param: yuvp1_y_ee_nr_config */ | 2187 | /* acc_param: yuvp1_y_ee_nr_config */ |
| @@ -2193,7 +2194,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2193 | acc->y_ee_nr = acc_old->y_ee_nr; | 2194 | acc->y_ee_nr = acc_old->y_ee_nr; |
| 2194 | } else { | 2195 | } else { |
| 2195 | /* Calculate from scratch */ | 2196 | /* Calculate from scratch */ |
| 2196 | acc->y_ee_nr = ipu3_css_y_ee_nr_defaults; | 2197 | acc->y_ee_nr = imgu_css_y_ee_nr_defaults; |
| 2197 | } | 2198 | } |
| 2198 | 2199 | ||
| 2199 | /* acc_param: yuvp1_yds_config yds */ | 2200 | /* acc_param: yuvp1_yds_config yds */ |
| @@ -2206,7 +2207,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2206 | acc->yds = acc_old->yds; | 2207 | acc->yds = acc_old->yds; |
| 2207 | } else { | 2208 | } else { |
| 2208 | /* Calculate from scratch */ | 2209 | /* Calculate from scratch */ |
| 2209 | acc->yds = ipu3_css_yds_defaults; | 2210 | acc->yds = imgu_css_yds_defaults; |
| 2210 | } | 2211 | } |
| 2211 | 2212 | ||
| 2212 | /* acc_param: yuvp1_chnr_config chnr */ | 2213 | /* acc_param: yuvp1_chnr_config chnr */ |
| @@ -2219,7 +2220,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2219 | acc->chnr = acc_old->chnr; | 2220 | acc->chnr = acc_old->chnr; |
| 2220 | } else { | 2221 | } else { |
| 2221 | /* Calculate from scratch */ | 2222 | /* Calculate from scratch */ |
| 2222 | acc->chnr = ipu3_css_chnr_defaults; | 2223 | acc->chnr = imgu_css_chnr_defaults; |
| 2223 | } | 2224 | } |
| 2224 | 2225 | ||
| 2225 | /* acc_param: yuvp2_y_tm_lut_static_config */ | 2226 | /* acc_param: yuvp2_y_tm_lut_static_config */ |
| @@ -2238,7 +2239,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2238 | acc->yds2 = acc_old->yds2; | 2239 | acc->yds2 = acc_old->yds2; |
| 2239 | } else { | 2240 | } else { |
| 2240 | /* Calculate from scratch */ | 2241 | /* Calculate from scratch */ |
| 2241 | acc->yds2 = ipu3_css_yds_defaults; | 2242 | acc->yds2 = imgu_css_yds_defaults; |
| 2242 | } | 2243 | } |
| 2243 | 2244 | ||
| 2244 | /* acc_param: yuvp2_tcc_static_config */ | 2245 | /* acc_param: yuvp2_tcc_static_config */ |
| @@ -2270,8 +2271,8 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2270 | for (i = 7; i < IPU3_UAPI_YUVP2_TCC_INV_Y_LUT_ELEMENTS; i++) | 2271 | for (i = 7; i < IPU3_UAPI_YUVP2_TCC_INV_Y_LUT_ELEMENTS; i++) |
| 2271 | acc->tcc.inv_y_lut.entries[i] = 1024 >> (i - 6); | 2272 | acc->tcc.inv_y_lut.entries[i] = 1024 >> (i - 6); |
| 2272 | 2273 | ||
| 2273 | acc->tcc.gain_pcwl = ipu3_css_tcc_gain_pcwl_lut; | 2274 | acc->tcc.gain_pcwl = imgu_css_tcc_gain_pcwl_lut; |
| 2274 | acc->tcc.r_sqr_lut = ipu3_css_tcc_r_sqr_lut; | 2275 | acc->tcc.r_sqr_lut = imgu_css_tcc_r_sqr_lut; |
| 2275 | } | 2276 | } |
| 2276 | 2277 | ||
| 2277 | /* acc_param: dpc_config */ | 2278 | /* acc_param: dpc_config */ |
| @@ -2287,10 +2288,10 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2287 | bds_ds = (css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height * | 2288 | bds_ds = (css_pipe->rect[IPU3_CSS_RECT_EFFECTIVE].height * |
| 2288 | IMGU_BDS_GRANULARITY) / css_pipe->rect[IPU3_CSS_RECT_BDS].height; | 2289 | IMGU_BDS_GRANULARITY) / css_pipe->rect[IPU3_CSS_RECT_BDS].height; |
| 2289 | if (bds_ds < IMGU_BDS_MIN_SF_INV || | 2290 | if (bds_ds < IMGU_BDS_MIN_SF_INV || |
| 2290 | bds_ds - IMGU_BDS_MIN_SF_INV >= ARRAY_SIZE(ipu3_css_bds_configs)) | 2291 | bds_ds - IMGU_BDS_MIN_SF_INV >= ARRAY_SIZE(imgu_css_bds_configs)) |
| 2291 | return -EINVAL; | 2292 | return -EINVAL; |
| 2292 | 2293 | ||
| 2293 | cfg_bds = &ipu3_css_bds_configs[bds_ds - IMGU_BDS_MIN_SF_INV]; | 2294 | cfg_bds = &imgu_css_bds_configs[bds_ds - IMGU_BDS_MIN_SF_INV]; |
| 2294 | acc->bds.hor.hor_ctrl1.hor_crop_en = 0; | 2295 | acc->bds.hor.hor_ctrl1.hor_crop_en = 0; |
| 2295 | acc->bds.hor.hor_ctrl1.hor_crop_start = 0; | 2296 | acc->bds.hor.hor_ctrl1.hor_crop_start = 0; |
| 2296 | acc->bds.hor.hor_ctrl1.hor_crop_end = 0; | 2297 | acc->bds.hor.hor_ctrl1.hor_crop_end = 0; |
| @@ -2339,7 +2340,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2339 | sizeof(acc->anr.stitch.pyramid)); | 2340 | sizeof(acc->anr.stitch.pyramid)); |
| 2340 | } else { | 2341 | } else { |
| 2341 | /* Calculate from scratch */ | 2342 | /* Calculate from scratch */ |
| 2342 | acc->anr = ipu3_css_anr_defaults; | 2343 | acc->anr = imgu_css_anr_defaults; |
| 2343 | } | 2344 | } |
| 2344 | 2345 | ||
| 2345 | /* Always enabled */ | 2346 | /* Always enabled */ |
| @@ -2377,10 +2378,10 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2377 | acc->awb_fr.config = acc_old->awb_fr.config; | 2378 | acc->awb_fr.config = acc_old->awb_fr.config; |
| 2378 | } else { | 2379 | } else { |
| 2379 | /* Set from scratch */ | 2380 | /* Set from scratch */ |
| 2380 | acc->awb_fr.config = ipu3_css_awb_fr_defaults; | 2381 | acc->awb_fr.config = imgu_css_awb_fr_defaults; |
| 2381 | } | 2382 | } |
| 2382 | 2383 | ||
| 2383 | ipu3_css_grid_end_calc(&acc->awb_fr.config.grid_cfg); | 2384 | imgu_css_grid_end_calc(&acc->awb_fr.config.grid_cfg); |
| 2384 | 2385 | ||
| 2385 | if (acc->awb_fr.config.grid_cfg.width <= 0) | 2386 | if (acc->awb_fr.config.grid_cfg.width <= 0) |
| 2386 | return -EINVAL; | 2387 | return -EINVAL; |
| @@ -2415,7 +2416,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2415 | acc->awb_fr.stripes[0].grid_cfg.width; | 2416 | acc->awb_fr.stripes[0].grid_cfg.width; |
| 2416 | 2417 | ||
| 2417 | b_w_log2 = acc->awb_fr.stripes[0].grid_cfg.block_width_log2; | 2418 | b_w_log2 = acc->awb_fr.stripes[0].grid_cfg.block_width_log2; |
| 2418 | end = ipu3_css_grid_end(acc->awb_fr.stripes[0].grid_cfg.x_start, | 2419 | end = imgu_css_grid_end(acc->awb_fr.stripes[0].grid_cfg.x_start, |
| 2419 | acc->awb_fr.stripes[0].grid_cfg.width, | 2420 | acc->awb_fr.stripes[0].grid_cfg.width, |
| 2420 | b_w_log2); | 2421 | b_w_log2); |
| 2421 | acc->awb_fr.stripes[0].grid_cfg.x_end = end; | 2422 | acc->awb_fr.stripes[0].grid_cfg.x_end = end; |
| @@ -2425,7 +2426,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2425 | acc->stripe.down_scaled_stripes[1].offset) & | 2426 | acc->stripe.down_scaled_stripes[1].offset) & |
| 2426 | IPU3_UAPI_GRID_START_MASK; | 2427 | IPU3_UAPI_GRID_START_MASK; |
| 2427 | b_w_log2 = acc->awb_fr.stripes[1].grid_cfg.block_width_log2; | 2428 | b_w_log2 = acc->awb_fr.stripes[1].grid_cfg.block_width_log2; |
| 2428 | end = ipu3_css_grid_end(acc->awb_fr.stripes[1].grid_cfg.x_start, | 2429 | end = imgu_css_grid_end(acc->awb_fr.stripes[1].grid_cfg.x_start, |
| 2429 | acc->awb_fr.stripes[1].grid_cfg.width, | 2430 | acc->awb_fr.stripes[1].grid_cfg.width, |
| 2430 | b_w_log2); | 2431 | b_w_log2); |
| 2431 | acc->awb_fr.stripes[1].grid_cfg.x_end = end; | 2432 | acc->awb_fr.stripes[1].grid_cfg.x_end = end; |
| @@ -2439,7 +2440,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2439 | acc->awb_fr.stripes[i].grid_cfg.height_per_slice = 1; | 2440 | acc->awb_fr.stripes[i].grid_cfg.height_per_slice = 1; |
| 2440 | } | 2441 | } |
| 2441 | 2442 | ||
| 2442 | if (ipu3_css_awb_fr_ops_calc(css, pipe, &acc->awb_fr)) | 2443 | if (imgu_css_awb_fr_ops_calc(css, pipe, &acc->awb_fr)) |
| 2443 | return -EINVAL; | 2444 | return -EINVAL; |
| 2444 | 2445 | ||
| 2445 | /* acc_param: ae_config */ | 2446 | /* acc_param: ae_config */ |
| @@ -2461,18 +2462,18 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2461 | static const struct ipu3_uapi_ae_weight_elem | 2462 | static const struct ipu3_uapi_ae_weight_elem |
| 2462 | weight_def = { 1, 1, 1, 1, 1, 1, 1, 1 }; | 2463 | weight_def = { 1, 1, 1, 1, 1, 1, 1, 1 }; |
| 2463 | 2464 | ||
| 2464 | acc->ae.grid_cfg = ipu3_css_ae_grid_defaults; | 2465 | acc->ae.grid_cfg = imgu_css_ae_grid_defaults; |
| 2465 | acc->ae.ae_ccm = ipu3_css_ae_ccm_defaults; | 2466 | acc->ae.ae_ccm = imgu_css_ae_ccm_defaults; |
| 2466 | for (i = 0; i < IPU3_UAPI_AE_WEIGHTS; i++) | 2467 | for (i = 0; i < IPU3_UAPI_AE_WEIGHTS; i++) |
| 2467 | acc->ae.weights[i] = weight_def; | 2468 | acc->ae.weights[i] = weight_def; |
| 2468 | } | 2469 | } |
| 2469 | 2470 | ||
| 2470 | b_w_log2 = acc->ae.grid_cfg.block_width_log2; | 2471 | b_w_log2 = acc->ae.grid_cfg.block_width_log2; |
| 2471 | acc->ae.grid_cfg.x_end = ipu3_css_grid_end(acc->ae.grid_cfg.x_start, | 2472 | acc->ae.grid_cfg.x_end = imgu_css_grid_end(acc->ae.grid_cfg.x_start, |
| 2472 | acc->ae.grid_cfg.width, | 2473 | acc->ae.grid_cfg.width, |
| 2473 | b_w_log2); | 2474 | b_w_log2); |
| 2474 | b_w_log2 = acc->ae.grid_cfg.block_height_log2; | 2475 | b_w_log2 = acc->ae.grid_cfg.block_height_log2; |
| 2475 | acc->ae.grid_cfg.y_end = ipu3_css_grid_end(acc->ae.grid_cfg.y_start, | 2476 | acc->ae.grid_cfg.y_end = imgu_css_grid_end(acc->ae.grid_cfg.y_start, |
| 2476 | acc->ae.grid_cfg.height, | 2477 | acc->ae.grid_cfg.height, |
| 2477 | b_w_log2); | 2478 | b_w_log2); |
| 2478 | 2479 | ||
| @@ -2501,7 +2502,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2501 | 2502 | ||
| 2502 | b_w_log2 = acc->ae.stripes[0].grid.block_width_log2; | 2503 | b_w_log2 = acc->ae.stripes[0].grid.block_width_log2; |
| 2503 | acc->ae.stripes[0].grid.x_end = | 2504 | acc->ae.stripes[0].grid.x_end = |
| 2504 | ipu3_css_grid_end(acc->ae.stripes[0].grid.x_start, | 2505 | imgu_css_grid_end(acc->ae.stripes[0].grid.x_start, |
| 2505 | acc->ae.stripes[0].grid.width, | 2506 | acc->ae.stripes[0].grid.width, |
| 2506 | b_w_log2); | 2507 | b_w_log2); |
| 2507 | 2508 | ||
| @@ -2511,7 +2512,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2511 | IPU3_UAPI_GRID_START_MASK; | 2512 | IPU3_UAPI_GRID_START_MASK; |
| 2512 | b_w_log2 = acc->ae.stripes[1].grid.block_width_log2; | 2513 | b_w_log2 = acc->ae.stripes[1].grid.block_width_log2; |
| 2513 | acc->ae.stripes[1].grid.x_end = | 2514 | acc->ae.stripes[1].grid.x_end = |
| 2514 | ipu3_css_grid_end(acc->ae.stripes[1].grid.x_start, | 2515 | imgu_css_grid_end(acc->ae.stripes[1].grid.x_start, |
| 2515 | acc->ae.stripes[1].grid.width, | 2516 | acc->ae.stripes[1].grid.width, |
| 2516 | b_w_log2); | 2517 | b_w_log2); |
| 2517 | } | 2518 | } |
| @@ -2528,11 +2529,11 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2528 | } else { | 2529 | } else { |
| 2529 | /* Set from scratch */ | 2530 | /* Set from scratch */ |
| 2530 | acc->af.config.filter_config = | 2531 | acc->af.config.filter_config = |
| 2531 | ipu3_css_af_defaults.filter_config; | 2532 | imgu_css_af_defaults.filter_config; |
| 2532 | acc->af.config.grid_cfg = ipu3_css_af_defaults.grid_cfg; | 2533 | acc->af.config.grid_cfg = imgu_css_af_defaults.grid_cfg; |
| 2533 | } | 2534 | } |
| 2534 | 2535 | ||
| 2535 | ipu3_css_grid_end_calc(&acc->af.config.grid_cfg); | 2536 | imgu_css_grid_end_calc(&acc->af.config.grid_cfg); |
| 2536 | 2537 | ||
| 2537 | if (acc->af.config.grid_cfg.width <= 0) | 2538 | if (acc->af.config.grid_cfg.width <= 0) |
| 2538 | return -EINVAL; | 2539 | return -EINVAL; |
| @@ -2578,7 +2579,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2578 | 2579 | ||
| 2579 | b_w_log2 = acc->af.stripes[0].grid_cfg.block_width_log2; | 2580 | b_w_log2 = acc->af.stripes[0].grid_cfg.block_width_log2; |
| 2580 | acc->af.stripes[0].grid_cfg.x_end = | 2581 | acc->af.stripes[0].grid_cfg.x_end = |
| 2581 | ipu3_css_grid_end(acc->af.stripes[0].grid_cfg.x_start, | 2582 | imgu_css_grid_end(acc->af.stripes[0].grid_cfg.x_start, |
| 2582 | acc->af.stripes[0].grid_cfg.width, | 2583 | acc->af.stripes[0].grid_cfg.width, |
| 2583 | b_w_log2); | 2584 | b_w_log2); |
| 2584 | 2585 | ||
| @@ -2589,7 +2590,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2589 | 2590 | ||
| 2590 | b_w_log2 = acc->af.stripes[1].grid_cfg.block_width_log2; | 2591 | b_w_log2 = acc->af.stripes[1].grid_cfg.block_width_log2; |
| 2591 | acc->af.stripes[1].grid_cfg.x_end = | 2592 | acc->af.stripes[1].grid_cfg.x_end = |
| 2592 | ipu3_css_grid_end(acc->af.stripes[1].grid_cfg.x_start, | 2593 | imgu_css_grid_end(acc->af.stripes[1].grid_cfg.x_start, |
| 2593 | acc->af.stripes[1].grid_cfg.width, | 2594 | acc->af.stripes[1].grid_cfg.width, |
| 2594 | b_w_log2); | 2595 | b_w_log2); |
| 2595 | 2596 | ||
| @@ -2601,7 +2602,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2601 | acc->af.stripes[i].grid_cfg.height_per_slice = 1; | 2602 | acc->af.stripes[i].grid_cfg.height_per_slice = 1; |
| 2602 | } | 2603 | } |
| 2603 | 2604 | ||
| 2604 | if (ipu3_css_af_ops_calc(css, pipe, &acc->af)) | 2605 | if (imgu_css_af_ops_calc(css, pipe, &acc->af)) |
| 2605 | return -EINVAL; | 2606 | return -EINVAL; |
| 2606 | 2607 | ||
| 2607 | /* acc_param: awb_config */ | 2608 | /* acc_param: awb_config */ |
| @@ -2614,7 +2615,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2614 | acc->awb.config = acc_old->awb.config; | 2615 | acc->awb.config = acc_old->awb.config; |
| 2615 | } else { | 2616 | } else { |
| 2616 | /* Set from scratch */ | 2617 | /* Set from scratch */ |
| 2617 | acc->awb.config = ipu3_css_awb_defaults; | 2618 | acc->awb.config = imgu_css_awb_defaults; |
| 2618 | } | 2619 | } |
| 2619 | 2620 | ||
| 2620 | if (acc->awb.config.grid.width <= 0) | 2621 | if (acc->awb.config.grid.width <= 0) |
| @@ -2622,7 +2623,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2622 | 2623 | ||
| 2623 | acc->awb.config.grid.height_per_slice = | 2624 | acc->awb.config.grid.height_per_slice = |
| 2624 | IMGU_ABI_AWB_MAX_CELLS_PER_SET / acc->awb.config.grid.width, | 2625 | IMGU_ABI_AWB_MAX_CELLS_PER_SET / acc->awb.config.grid.width, |
| 2625 | ipu3_css_grid_end_calc(&acc->awb.config.grid); | 2626 | imgu_css_grid_end_calc(&acc->awb.config.grid); |
| 2626 | 2627 | ||
| 2627 | for (i = 0; i < stripes; i++) | 2628 | for (i = 0; i < stripes; i++) |
| 2628 | acc->awb.stripes[i] = acc->awb.config; | 2629 | acc->awb.stripes[i] = acc->awb.config; |
| @@ -2647,7 +2648,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2647 | 2648 | ||
| 2648 | b_w_log2 = acc->awb.stripes[0].grid.block_width_log2; | 2649 | b_w_log2 = acc->awb.stripes[0].grid.block_width_log2; |
| 2649 | acc->awb.stripes[0].grid.x_end = | 2650 | acc->awb.stripes[0].grid.x_end = |
| 2650 | ipu3_css_grid_end(acc->awb.stripes[0].grid.x_start, | 2651 | imgu_css_grid_end(acc->awb.stripes[0].grid.x_start, |
| 2651 | acc->awb.stripes[0].grid.width, | 2652 | acc->awb.stripes[0].grid.width, |
| 2652 | b_w_log2); | 2653 | b_w_log2); |
| 2653 | 2654 | ||
| @@ -2658,7 +2659,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2658 | 2659 | ||
| 2659 | b_w_log2 = acc->awb.stripes[1].grid.block_width_log2; | 2660 | b_w_log2 = acc->awb.stripes[1].grid.block_width_log2; |
| 2660 | acc->awb.stripes[1].grid.x_end = | 2661 | acc->awb.stripes[1].grid.x_end = |
| 2661 | ipu3_css_grid_end(acc->awb.stripes[1].grid.x_start, | 2662 | imgu_css_grid_end(acc->awb.stripes[1].grid.x_start, |
| 2662 | acc->awb.stripes[1].grid.width, | 2663 | acc->awb.stripes[1].grid.width, |
| 2663 | b_w_log2); | 2664 | b_w_log2); |
| 2664 | 2665 | ||
| @@ -2670,7 +2671,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2670 | acc->awb.stripes[i].grid.height_per_slice = 1; | 2671 | acc->awb.stripes[i].grid.height_per_slice = 1; |
| 2671 | } | 2672 | } |
| 2672 | 2673 | ||
| 2673 | if (ipu3_css_awb_ops_calc(css, pipe, &acc->awb)) | 2674 | if (imgu_css_awb_ops_calc(css, pipe, &acc->awb)) |
| 2674 | return -EINVAL; | 2675 | return -EINVAL; |
| 2675 | 2676 | ||
| 2676 | return 0; | 2677 | return 0; |
| @@ -2685,7 +2686,7 @@ int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | |||
| 2685 | * to the structure inside `new_binary_params'. In that case the caller | 2686 | * to the structure inside `new_binary_params'. In that case the caller |
| 2686 | * should calculate and fill the structure from scratch. | 2687 | * should calculate and fill the structure from scratch. |
| 2687 | */ | 2688 | */ |
| 2688 | static void *ipu3_css_cfg_copy(struct ipu3_css *css, | 2689 | static void *imgu_css_cfg_copy(struct imgu_css *css, |
| 2689 | unsigned int pipe, bool use_user, | 2690 | unsigned int pipe, bool use_user, |
| 2690 | void *user_setting, void *old_binary_params, | 2691 | void *user_setting, void *old_binary_params, |
| 2691 | void *new_binary_params, | 2692 | void *new_binary_params, |
| @@ -2696,7 +2697,7 @@ static void *ipu3_css_cfg_copy(struct ipu3_css *css, | |||
| 2696 | const enum imgu_abi_param_class c = IMGU_ABI_PARAM_CLASS_PARAM; | 2697 | const enum imgu_abi_param_class c = IMGU_ABI_PARAM_CLASS_PARAM; |
| 2697 | void *new_setting, *old_setting; | 2698 | void *new_setting, *old_setting; |
| 2698 | 2699 | ||
| 2699 | new_setting = ipu3_css_fw_pipeline_params(css, pipe, c, m, par, | 2700 | new_setting = imgu_css_fw_pipeline_params(css, pipe, c, m, par, |
| 2700 | par_size, new_binary_params); | 2701 | par_size, new_binary_params); |
| 2701 | if (!new_setting) | 2702 | if (!new_setting) |
| 2702 | return ERR_PTR(-EPROTO); /* Corrupted firmware */ | 2703 | return ERR_PTR(-EPROTO); /* Corrupted firmware */ |
| @@ -2706,7 +2707,7 @@ static void *ipu3_css_cfg_copy(struct ipu3_css *css, | |||
| 2706 | memcpy(new_setting, user_setting, par_size); | 2707 | memcpy(new_setting, user_setting, par_size); |
| 2707 | } else if (old_binary_params) { | 2708 | } else if (old_binary_params) { |
| 2708 | /* Take previous value */ | 2709 | /* Take previous value */ |
| 2709 | old_setting = ipu3_css_fw_pipeline_params(css, pipe, c, m, par, | 2710 | old_setting = imgu_css_fw_pipeline_params(css, pipe, c, m, par, |
| 2710 | par_size, | 2711 | par_size, |
| 2711 | old_binary_params); | 2712 | old_binary_params); |
| 2712 | if (!old_setting) | 2713 | if (!old_setting) |
| @@ -2722,7 +2723,7 @@ static void *ipu3_css_cfg_copy(struct ipu3_css *css, | |||
| 2722 | /* | 2723 | /* |
| 2723 | * Configure VMEM0 parameters (late binding parameters). | 2724 | * Configure VMEM0 parameters (late binding parameters). |
| 2724 | */ | 2725 | */ |
| 2725 | int ipu3_css_cfg_vmem0(struct ipu3_css *css, unsigned int pipe, | 2726 | int imgu_css_cfg_vmem0(struct imgu_css *css, unsigned int pipe, |
| 2726 | struct ipu3_uapi_flags *use, | 2727 | struct ipu3_uapi_flags *use, |
| 2727 | void *vmem0, void *vmem0_old, | 2728 | void *vmem0, void *vmem0_old, |
| 2728 | struct ipu3_uapi_params *user) | 2729 | struct ipu3_uapi_params *user) |
| @@ -2744,7 +2745,7 @@ int ipu3_css_cfg_vmem0(struct ipu3_css *css, unsigned int pipe, | |||
| 2744 | 2745 | ||
| 2745 | /* Configure Linearization VMEM0 parameters */ | 2746 | /* Configure Linearization VMEM0 parameters */ |
| 2746 | 2747 | ||
| 2747 | lin_vmem = ipu3_css_cfg_copy(css, pipe, use && use->lin_vmem_params, | 2748 | lin_vmem = imgu_css_cfg_copy(css, pipe, use && use->lin_vmem_params, |
| 2748 | &user->lin_vmem_params, vmem0_old, vmem0, | 2749 | &user->lin_vmem_params, vmem0_old, vmem0, |
| 2749 | m, &pofs->vmem.lin, sizeof(*lin_vmem)); | 2750 | m, &pofs->vmem.lin, sizeof(*lin_vmem)); |
| 2750 | if (!IS_ERR_OR_NULL(lin_vmem)) { | 2751 | if (!IS_ERR_OR_NULL(lin_vmem)) { |
| @@ -2764,7 +2765,7 @@ int ipu3_css_cfg_vmem0(struct ipu3_css *css, unsigned int pipe, | |||
| 2764 | 2765 | ||
| 2765 | /* Configure TNR3 VMEM parameters */ | 2766 | /* Configure TNR3 VMEM parameters */ |
| 2766 | if (css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { | 2767 | if (css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { |
| 2767 | tnr_vmem = ipu3_css_cfg_copy(css, pipe, | 2768 | tnr_vmem = imgu_css_cfg_copy(css, pipe, |
| 2768 | use && use->tnr3_vmem_params, | 2769 | use && use->tnr3_vmem_params, |
| 2769 | &user->tnr3_vmem_params, | 2770 | &user->tnr3_vmem_params, |
| 2770 | vmem0_old, vmem0, m, | 2771 | vmem0_old, vmem0, m, |
| @@ -2780,17 +2781,17 @@ int ipu3_css_cfg_vmem0(struct ipu3_css *css, unsigned int pipe, | |||
| 2780 | 2781 | ||
| 2781 | /* Configure XNR3 VMEM parameters */ | 2782 | /* Configure XNR3 VMEM parameters */ |
| 2782 | 2783 | ||
| 2783 | xnr_vmem = ipu3_css_cfg_copy(css, pipe, use && use->xnr3_vmem_params, | 2784 | xnr_vmem = imgu_css_cfg_copy(css, pipe, use && use->xnr3_vmem_params, |
| 2784 | &user->xnr3_vmem_params, vmem0_old, vmem0, | 2785 | &user->xnr3_vmem_params, vmem0_old, vmem0, |
| 2785 | m, &pofs->vmem.xnr3, sizeof(*xnr_vmem)); | 2786 | m, &pofs->vmem.xnr3, sizeof(*xnr_vmem)); |
| 2786 | if (!IS_ERR_OR_NULL(xnr_vmem)) { | 2787 | if (!IS_ERR_OR_NULL(xnr_vmem)) { |
| 2787 | xnr_vmem->x[i] = ipu3_css_xnr3_vmem_defaults.x | 2788 | xnr_vmem->x[i] = imgu_css_xnr3_vmem_defaults.x |
| 2788 | [i % IMGU_XNR3_VMEM_LUT_LEN]; | 2789 | [i % IMGU_XNR3_VMEM_LUT_LEN]; |
| 2789 | xnr_vmem->a[i] = ipu3_css_xnr3_vmem_defaults.a | 2790 | xnr_vmem->a[i] = imgu_css_xnr3_vmem_defaults.a |
| 2790 | [i % IMGU_XNR3_VMEM_LUT_LEN]; | 2791 | [i % IMGU_XNR3_VMEM_LUT_LEN]; |
| 2791 | xnr_vmem->b[i] = ipu3_css_xnr3_vmem_defaults.b | 2792 | xnr_vmem->b[i] = imgu_css_xnr3_vmem_defaults.b |
| 2792 | [i % IMGU_XNR3_VMEM_LUT_LEN]; | 2793 | [i % IMGU_XNR3_VMEM_LUT_LEN]; |
| 2793 | xnr_vmem->c[i] = ipu3_css_xnr3_vmem_defaults.c | 2794 | xnr_vmem->c[i] = imgu_css_xnr3_vmem_defaults.c |
| 2794 | [i % IMGU_XNR3_VMEM_LUT_LEN]; | 2795 | [i % IMGU_XNR3_VMEM_LUT_LEN]; |
| 2795 | } | 2796 | } |
| 2796 | 2797 | ||
| @@ -2801,12 +2802,12 @@ int ipu3_css_cfg_vmem0(struct ipu3_css *css, unsigned int pipe, | |||
| 2801 | /* | 2802 | /* |
| 2802 | * Configure DMEM0 parameters (late binding parameters). | 2803 | * Configure DMEM0 parameters (late binding parameters). |
| 2803 | */ | 2804 | */ |
| 2804 | int ipu3_css_cfg_dmem0(struct ipu3_css *css, unsigned int pipe, | 2805 | int imgu_css_cfg_dmem0(struct imgu_css *css, unsigned int pipe, |
| 2805 | struct ipu3_uapi_flags *use, | 2806 | struct ipu3_uapi_flags *use, |
| 2806 | void *dmem0, void *dmem0_old, | 2807 | void *dmem0, void *dmem0_old, |
| 2807 | struct ipu3_uapi_params *user) | 2808 | struct ipu3_uapi_params *user) |
| 2808 | { | 2809 | { |
| 2809 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 2810 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 2810 | const struct imgu_fw_info *bi = | 2811 | const struct imgu_fw_info *bi = |
| 2811 | &css->fwp->binary_header[css_pipe->bindex]; | 2812 | &css->fwp->binary_header[css_pipe->bindex]; |
| 2812 | struct imgu_fw_param_memory_offsets *pofs = (void *)css->fwp + | 2813 | struct imgu_fw_param_memory_offsets *pofs = (void *)css->fwp + |
| @@ -2824,7 +2825,7 @@ int ipu3_css_cfg_dmem0(struct ipu3_css *css, unsigned int pipe, | |||
| 2824 | 2825 | ||
| 2825 | /* Configure TNR3 DMEM0 parameters */ | 2826 | /* Configure TNR3 DMEM0 parameters */ |
| 2826 | if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { | 2827 | if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { |
| 2827 | tnr_dmem = ipu3_css_cfg_copy(css, pipe, | 2828 | tnr_dmem = imgu_css_cfg_copy(css, pipe, |
| 2828 | use && use->tnr3_dmem_params, | 2829 | use && use->tnr3_dmem_params, |
| 2829 | &user->tnr3_dmem_params, | 2830 | &user->tnr3_dmem_params, |
| 2830 | dmem0_old, dmem0, m, | 2831 | dmem0_old, dmem0, m, |
| @@ -2839,7 +2840,7 @@ int ipu3_css_cfg_dmem0(struct ipu3_css *css, unsigned int pipe, | |||
| 2839 | 2840 | ||
| 2840 | /* Configure XNR3 DMEM0 parameters */ | 2841 | /* Configure XNR3 DMEM0 parameters */ |
| 2841 | 2842 | ||
| 2842 | xnr_dmem = ipu3_css_cfg_copy(css, pipe, use && use->xnr3_dmem_params, | 2843 | xnr_dmem = imgu_css_cfg_copy(css, pipe, use && use->xnr3_dmem_params, |
| 2843 | &user->xnr3_dmem_params, dmem0_old, dmem0, | 2844 | &user->xnr3_dmem_params, dmem0_old, dmem0, |
| 2844 | m, &pofs->dmem.xnr3, sizeof(*xnr_dmem)); | 2845 | m, &pofs->dmem.xnr3, sizeof(*xnr_dmem)); |
| 2845 | if (!IS_ERR_OR_NULL(xnr_dmem)) { | 2846 | if (!IS_ERR_OR_NULL(xnr_dmem)) { |
| @@ -2853,7 +2854,7 @@ int ipu3_css_cfg_dmem0(struct ipu3_css *css, unsigned int pipe, | |||
| 2853 | } | 2854 | } |
| 2854 | 2855 | ||
| 2855 | /* Generate unity morphing table without morphing effect */ | 2856 | /* Generate unity morphing table without morphing effect */ |
| 2856 | void ipu3_css_cfg_gdc_table(struct imgu_abi_gdc_warp_param *gdc, | 2857 | void imgu_css_cfg_gdc_table(struct imgu_abi_gdc_warp_param *gdc, |
| 2857 | int frame_in_x, int frame_in_y, | 2858 | int frame_in_x, int frame_in_y, |
| 2858 | int frame_out_x, int frame_out_y, | 2859 | int frame_out_x, int frame_out_y, |
| 2859 | int env_w, int env_h) | 2860 | int env_w, int env_h) |
diff --git a/drivers/staging/media/ipu3/ipu3-css-params.h b/drivers/staging/media/ipu3/ipu3-css-params.h index f3a0a47117a4..ffaec6b7d5cc 100644 --- a/drivers/staging/media/ipu3/ipu3-css-params.h +++ b/drivers/staging/media/ipu3/ipu3-css-params.h | |||
| @@ -4,23 +4,23 @@ | |||
| 4 | #ifndef __IPU3_PARAMS_H | 4 | #ifndef __IPU3_PARAMS_H |
| 5 | #define __IPU3_PARAMS_H | 5 | #define __IPU3_PARAMS_H |
| 6 | 6 | ||
| 7 | int ipu3_css_cfg_acc(struct ipu3_css *css, unsigned int pipe, | 7 | int imgu_css_cfg_acc(struct imgu_css *css, unsigned int pipe, |
| 8 | struct ipu3_uapi_flags *use, | 8 | struct ipu3_uapi_flags *use, |
| 9 | struct imgu_abi_acc_param *acc, | 9 | struct imgu_abi_acc_param *acc, |
| 10 | struct imgu_abi_acc_param *acc_old, | 10 | struct imgu_abi_acc_param *acc_old, |
| 11 | struct ipu3_uapi_acc_param *acc_user); | 11 | struct ipu3_uapi_acc_param *acc_user); |
| 12 | 12 | ||
| 13 | int ipu3_css_cfg_vmem0(struct ipu3_css *css, unsigned int pipe, | 13 | int imgu_css_cfg_vmem0(struct imgu_css *css, unsigned int pipe, |
| 14 | struct ipu3_uapi_flags *use, | 14 | struct ipu3_uapi_flags *use, |
| 15 | void *vmem0, void *vmem0_old, | 15 | void *vmem0, void *vmem0_old, |
| 16 | struct ipu3_uapi_params *user); | 16 | struct ipu3_uapi_params *user); |
| 17 | 17 | ||
| 18 | int ipu3_css_cfg_dmem0(struct ipu3_css *css, unsigned int pipe, | 18 | int imgu_css_cfg_dmem0(struct imgu_css *css, unsigned int pipe, |
| 19 | struct ipu3_uapi_flags *use, | 19 | struct ipu3_uapi_flags *use, |
| 20 | void *dmem0, void *dmem0_old, | 20 | void *dmem0, void *dmem0_old, |
| 21 | struct ipu3_uapi_params *user); | 21 | struct ipu3_uapi_params *user); |
| 22 | 22 | ||
| 23 | void ipu3_css_cfg_gdc_table(struct imgu_abi_gdc_warp_param *gdc, | 23 | void imgu_css_cfg_gdc_table(struct imgu_abi_gdc_warp_param *gdc, |
| 24 | int frame_in_x, int frame_in_y, | 24 | int frame_in_x, int frame_in_y, |
| 25 | int frame_out_x, int frame_out_y, | 25 | int frame_out_x, int frame_out_y, |
| 26 | int env_w, int env_h); | 26 | int env_w, int env_h); |
diff --git a/drivers/staging/media/ipu3/ipu3-css-pool.c b/drivers/staging/media/ipu3/ipu3-css-pool.c index 6f271f81669b..fa5b7d3acef2 100644 --- a/drivers/staging/media/ipu3/ipu3-css-pool.c +++ b/drivers/staging/media/ipu3/ipu3-css-pool.c | |||
| @@ -7,30 +7,30 @@ | |||
| 7 | #include "ipu3-css-pool.h" | 7 | #include "ipu3-css-pool.h" |
| 8 | #include "ipu3-dmamap.h" | 8 | #include "ipu3-dmamap.h" |
| 9 | 9 | ||
| 10 | int ipu3_css_dma_buffer_resize(struct imgu_device *imgu, | 10 | int imgu_css_dma_buffer_resize(struct imgu_device *imgu, |
| 11 | struct ipu3_css_map *map, size_t size) | 11 | struct imgu_css_map *map, size_t size) |
| 12 | { | 12 | { |
| 13 | if (map->size < size && map->vaddr) { | 13 | if (map->size < size && map->vaddr) { |
| 14 | dev_warn(&imgu->pci_dev->dev, "dma buf resized from %zu to %zu", | 14 | dev_warn(&imgu->pci_dev->dev, "dma buf resized from %zu to %zu", |
| 15 | map->size, size); | 15 | map->size, size); |
| 16 | 16 | ||
| 17 | ipu3_dmamap_free(imgu, map); | 17 | imgu_dmamap_free(imgu, map); |
| 18 | if (!ipu3_dmamap_alloc(imgu, map, size)) | 18 | if (!imgu_dmamap_alloc(imgu, map, size)) |
| 19 | return -ENOMEM; | 19 | return -ENOMEM; |
| 20 | } | 20 | } |
| 21 | 21 | ||
| 22 | return 0; | 22 | return 0; |
| 23 | } | 23 | } |
| 24 | 24 | ||
| 25 | void ipu3_css_pool_cleanup(struct imgu_device *imgu, struct ipu3_css_pool *pool) | 25 | void imgu_css_pool_cleanup(struct imgu_device *imgu, struct imgu_css_pool *pool) |
| 26 | { | 26 | { |
| 27 | unsigned int i; | 27 | unsigned int i; |
| 28 | 28 | ||
| 29 | for (i = 0; i < IPU3_CSS_POOL_SIZE; i++) | 29 | for (i = 0; i < IPU3_CSS_POOL_SIZE; i++) |
| 30 | ipu3_dmamap_free(imgu, &pool->entry[i].param); | 30 | imgu_dmamap_free(imgu, &pool->entry[i].param); |
| 31 | } | 31 | } |
| 32 | 32 | ||
| 33 | int ipu3_css_pool_init(struct imgu_device *imgu, struct ipu3_css_pool *pool, | 33 | int imgu_css_pool_init(struct imgu_device *imgu, struct imgu_css_pool *pool, |
| 34 | size_t size) | 34 | size_t size) |
| 35 | { | 35 | { |
| 36 | unsigned int i; | 36 | unsigned int i; |
| @@ -42,7 +42,7 @@ int ipu3_css_pool_init(struct imgu_device *imgu, struct ipu3_css_pool *pool, | |||
| 42 | continue; | 42 | continue; |
| 43 | } | 43 | } |
| 44 | 44 | ||
| 45 | if (!ipu3_dmamap_alloc(imgu, &pool->entry[i].param, size)) | 45 | if (!imgu_dmamap_alloc(imgu, &pool->entry[i].param, size)) |
| 46 | goto fail; | 46 | goto fail; |
| 47 | } | 47 | } |
| 48 | 48 | ||
| @@ -51,14 +51,14 @@ int ipu3_css_pool_init(struct imgu_device *imgu, struct ipu3_css_pool *pool, | |||
| 51 | return 0; | 51 | return 0; |
| 52 | 52 | ||
| 53 | fail: | 53 | fail: |
| 54 | ipu3_css_pool_cleanup(imgu, pool); | 54 | imgu_css_pool_cleanup(imgu, pool); |
| 55 | return -ENOMEM; | 55 | return -ENOMEM; |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | /* | 58 | /* |
| 59 | * Allocate a new parameter via recycling the oldest entry in the pool. | 59 | * Allocate a new parameter via recycling the oldest entry in the pool. |
| 60 | */ | 60 | */ |
| 61 | void ipu3_css_pool_get(struct ipu3_css_pool *pool) | 61 | void imgu_css_pool_get(struct imgu_css_pool *pool) |
| 62 | { | 62 | { |
| 63 | /* Get the oldest entry */ | 63 | /* Get the oldest entry */ |
| 64 | u32 n = (pool->last + 1) % IPU3_CSS_POOL_SIZE; | 64 | u32 n = (pool->last + 1) % IPU3_CSS_POOL_SIZE; |
| @@ -70,25 +70,25 @@ void ipu3_css_pool_get(struct ipu3_css_pool *pool) | |||
| 70 | /* | 70 | /* |
| 71 | * Undo, for all practical purposes, the effect of pool_get(). | 71 | * Undo, for all practical purposes, the effect of pool_get(). |
| 72 | */ | 72 | */ |
| 73 | void ipu3_css_pool_put(struct ipu3_css_pool *pool) | 73 | void imgu_css_pool_put(struct imgu_css_pool *pool) |
| 74 | { | 74 | { |
| 75 | pool->entry[pool->last].valid = false; | 75 | pool->entry[pool->last].valid = false; |
| 76 | pool->last = (pool->last + IPU3_CSS_POOL_SIZE - 1) % IPU3_CSS_POOL_SIZE; | 76 | pool->last = (pool->last + IPU3_CSS_POOL_SIZE - 1) % IPU3_CSS_POOL_SIZE; |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | /** | 79 | /** |
| 80 | * ipu3_css_pool_last - Retrieve the nth pool entry from last | 80 | * imgu_css_pool_last - Retrieve the nth pool entry from last |
| 81 | * | 81 | * |
| 82 | * @pool: a pointer to &struct ipu3_css_pool. | 82 | * @pool: a pointer to &struct imgu_css_pool. |
| 83 | * @n: the distance to the last index. | 83 | * @n: the distance to the last index. |
| 84 | * | 84 | * |
| 85 | * Returns: | 85 | * Returns: |
| 86 | * The nth entry from last or null map to indicate no frame stored. | 86 | * The nth entry from last or null map to indicate no frame stored. |
| 87 | */ | 87 | */ |
| 88 | const struct ipu3_css_map * | 88 | const struct imgu_css_map * |
| 89 | ipu3_css_pool_last(struct ipu3_css_pool *pool, unsigned int n) | 89 | imgu_css_pool_last(struct imgu_css_pool *pool, unsigned int n) |
| 90 | { | 90 | { |
| 91 | static const struct ipu3_css_map null_map = { 0 }; | 91 | static const struct imgu_css_map null_map = { 0 }; |
| 92 | int i = (pool->last + IPU3_CSS_POOL_SIZE - n) % IPU3_CSS_POOL_SIZE; | 92 | int i = (pool->last + IPU3_CSS_POOL_SIZE - n) % IPU3_CSS_POOL_SIZE; |
| 93 | 93 | ||
| 94 | WARN_ON(n >= IPU3_CSS_POOL_SIZE); | 94 | WARN_ON(n >= IPU3_CSS_POOL_SIZE); |
diff --git a/drivers/staging/media/ipu3/ipu3-css-pool.h b/drivers/staging/media/ipu3/ipu3-css-pool.h index 2657c39a4d71..f4a60b41401b 100644 --- a/drivers/staging/media/ipu3/ipu3-css-pool.h +++ b/drivers/staging/media/ipu3/ipu3-css-pool.h | |||
| @@ -10,15 +10,15 @@ struct imgu_device; | |||
| 10 | #define IPU3_CSS_POOL_SIZE 4 | 10 | #define IPU3_CSS_POOL_SIZE 4 |
| 11 | 11 | ||
| 12 | /** | 12 | /** |
| 13 | * ipu3_css_map - store DMA mapping info for buffer | 13 | * imgu_css_map - store DMA mapping info for buffer |
| 14 | * | 14 | * |
| 15 | * @size: size of the buffer in bytes. | 15 | * @size: size of the buffer in bytes. |
| 16 | * @vaddr: kernel virtual address. | 16 | * @vaddr: kernel virtual address. |
| 17 | * @daddr: iova dma address to access IPU3. | 17 | * @daddr: iova dma address to access IPU3. |
| 18 | * @vma: private, a pointer to &struct vm_struct, | 18 | * @vma: private, a pointer to &struct vm_struct, |
| 19 | * used for ipu3_dmamap_free. | 19 | * used for imgu_dmamap_free. |
| 20 | */ | 20 | */ |
| 21 | struct ipu3_css_map { | 21 | struct imgu_css_map { |
| 22 | size_t size; | 22 | size_t size; |
| 23 | void *vaddr; | 23 | void *vaddr; |
| 24 | dma_addr_t daddr; | 24 | dma_addr_t daddr; |
| @@ -26,30 +26,30 @@ struct ipu3_css_map { | |||
| 26 | }; | 26 | }; |
| 27 | 27 | ||
| 28 | /** | 28 | /** |
| 29 | * ipu3_css_pool - circular buffer pool definition | 29 | * imgu_css_pool - circular buffer pool definition |
| 30 | * | 30 | * |
| 31 | * @entry: array with IPU3_CSS_POOL_SIZE elements. | 31 | * @entry: array with IPU3_CSS_POOL_SIZE elements. |
| 32 | * @entry.param: a &struct ipu3_css_map for storing the mem mapping. | 32 | * @entry.param: a &struct imgu_css_map for storing the mem mapping. |
| 33 | * @entry.valid: used to mark if the entry has valid data. | 33 | * @entry.valid: used to mark if the entry has valid data. |
| 34 | * @last: write pointer, initialized to IPU3_CSS_POOL_SIZE. | 34 | * @last: write pointer, initialized to IPU3_CSS_POOL_SIZE. |
| 35 | */ | 35 | */ |
| 36 | struct ipu3_css_pool { | 36 | struct imgu_css_pool { |
| 37 | struct { | 37 | struct { |
| 38 | struct ipu3_css_map param; | 38 | struct imgu_css_map param; |
| 39 | bool valid; | 39 | bool valid; |
| 40 | } entry[IPU3_CSS_POOL_SIZE]; | 40 | } entry[IPU3_CSS_POOL_SIZE]; |
| 41 | u32 last; | 41 | u32 last; |
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | int ipu3_css_dma_buffer_resize(struct imgu_device *imgu, | 44 | int imgu_css_dma_buffer_resize(struct imgu_device *imgu, |
| 45 | struct ipu3_css_map *map, size_t size); | 45 | struct imgu_css_map *map, size_t size); |
| 46 | void ipu3_css_pool_cleanup(struct imgu_device *imgu, | 46 | void imgu_css_pool_cleanup(struct imgu_device *imgu, |
| 47 | struct ipu3_css_pool *pool); | 47 | struct imgu_css_pool *pool); |
| 48 | int ipu3_css_pool_init(struct imgu_device *imgu, struct ipu3_css_pool *pool, | 48 | int imgu_css_pool_init(struct imgu_device *imgu, struct imgu_css_pool *pool, |
| 49 | size_t size); | 49 | size_t size); |
| 50 | void ipu3_css_pool_get(struct ipu3_css_pool *pool); | 50 | void imgu_css_pool_get(struct imgu_css_pool *pool); |
| 51 | void ipu3_css_pool_put(struct ipu3_css_pool *pool); | 51 | void imgu_css_pool_put(struct imgu_css_pool *pool); |
| 52 | const struct ipu3_css_map *ipu3_css_pool_last(struct ipu3_css_pool *pool, | 52 | const struct imgu_css_map *imgu_css_pool_last(struct imgu_css_pool *pool, |
| 53 | u32 last); | 53 | u32 last); |
| 54 | 54 | ||
| 55 | #endif | 55 | #endif |
diff --git a/drivers/staging/media/ipu3/ipu3-css.c b/drivers/staging/media/ipu3/ipu3-css.c index 44c55639389a..15ab77e4b766 100644 --- a/drivers/staging/media/ipu3/ipu3-css.c +++ b/drivers/staging/media/ipu3/ipu3-css.c | |||
| @@ -46,7 +46,7 @@ | |||
| 46 | IPU3_CSS_QUEUE_TO_FLAGS(IPU3_CSS_QUEUE_VF) | 46 | IPU3_CSS_QUEUE_TO_FLAGS(IPU3_CSS_QUEUE_VF) |
| 47 | 47 | ||
| 48 | /* Formats supported by IPU3 Camera Sub System */ | 48 | /* Formats supported by IPU3 Camera Sub System */ |
| 49 | static const struct ipu3_css_format ipu3_css_formats[] = { | 49 | static const struct imgu_css_format imgu_css_formats[] = { |
| 50 | { | 50 | { |
| 51 | .pixelformat = V4L2_PIX_FMT_NV12, | 51 | .pixelformat = V4L2_PIX_FMT_NV12, |
| 52 | .colorspace = V4L2_COLORSPACE_SRGB, | 52 | .colorspace = V4L2_COLORSPACE_SRGB, |
| @@ -100,7 +100,7 @@ static const struct ipu3_css_format ipu3_css_formats[] = { | |||
| 100 | static const struct { | 100 | static const struct { |
| 101 | enum imgu_abi_queue_id qid; | 101 | enum imgu_abi_queue_id qid; |
| 102 | size_t ptr_ofs; | 102 | size_t ptr_ofs; |
| 103 | } ipu3_css_queues[IPU3_CSS_QUEUES] = { | 103 | } imgu_css_queues[IPU3_CSS_QUEUES] = { |
| 104 | [IPU3_CSS_QUEUE_IN] = { | 104 | [IPU3_CSS_QUEUE_IN] = { |
| 105 | IMGU_ABI_QUEUE_C_ID, | 105 | IMGU_ABI_QUEUE_C_ID, |
| 106 | offsetof(struct imgu_abi_buffer, payload.frame.frame_data) | 106 | offsetof(struct imgu_abi_buffer, payload.frame.frame_data) |
| @@ -120,7 +120,7 @@ static const struct { | |||
| 120 | }; | 120 | }; |
| 121 | 121 | ||
| 122 | /* Initialize queue based on given format, adjust format as needed */ | 122 | /* Initialize queue based on given format, adjust format as needed */ |
| 123 | static int ipu3_css_queue_init(struct ipu3_css_queue *queue, | 123 | static int imgu_css_queue_init(struct imgu_css_queue *queue, |
| 124 | struct v4l2_pix_format_mplane *fmt, u32 flags) | 124 | struct v4l2_pix_format_mplane *fmt, u32 flags) |
| 125 | { | 125 | { |
| 126 | struct v4l2_pix_format_mplane *const f = &queue->fmt.mpix; | 126 | struct v4l2_pix_format_mplane *const f = &queue->fmt.mpix; |
| @@ -133,11 +133,11 @@ static int ipu3_css_queue_init(struct ipu3_css_queue *queue, | |||
| 133 | if (!fmt) | 133 | if (!fmt) |
| 134 | return 0; | 134 | return 0; |
| 135 | 135 | ||
| 136 | for (i = 0; i < ARRAY_SIZE(ipu3_css_formats); i++) { | 136 | for (i = 0; i < ARRAY_SIZE(imgu_css_formats); i++) { |
| 137 | if (!(ipu3_css_formats[i].flags & flags)) | 137 | if (!(imgu_css_formats[i].flags & flags)) |
| 138 | continue; | 138 | continue; |
| 139 | queue->css_fmt = &ipu3_css_formats[i]; | 139 | queue->css_fmt = &imgu_css_formats[i]; |
| 140 | if (ipu3_css_formats[i].pixelformat == fmt->pixelformat) | 140 | if (imgu_css_formats[i].pixelformat == fmt->pixelformat) |
| 141 | break; | 141 | break; |
| 142 | } | 142 | } |
| 143 | if (!queue->css_fmt) | 143 | if (!queue->css_fmt) |
| @@ -178,7 +178,7 @@ static int ipu3_css_queue_init(struct ipu3_css_queue *queue, | |||
| 178 | return 0; | 178 | return 0; |
| 179 | } | 179 | } |
| 180 | 180 | ||
| 181 | static bool ipu3_css_queue_enabled(struct ipu3_css_queue *q) | 181 | static bool imgu_css_queue_enabled(struct imgu_css_queue *q) |
| 182 | { | 182 | { |
| 183 | return q->css_fmt; | 183 | return q->css_fmt; |
| 184 | } | 184 | } |
| @@ -200,7 +200,7 @@ static inline void writes(const void *mem, ssize_t count, void __iomem *addr) | |||
| 200 | } | 200 | } |
| 201 | 201 | ||
| 202 | /* Wait until register `reg', masked with `mask', becomes `cmp' */ | 202 | /* Wait until register `reg', masked with `mask', becomes `cmp' */ |
| 203 | static int ipu3_hw_wait(void __iomem *base, int reg, u32 mask, u32 cmp) | 203 | static int imgu_hw_wait(void __iomem *base, int reg, u32 mask, u32 cmp) |
| 204 | { | 204 | { |
| 205 | u32 val; | 205 | u32 val; |
| 206 | 206 | ||
| @@ -210,7 +210,7 @@ static int ipu3_hw_wait(void __iomem *base, int reg, u32 mask, u32 cmp) | |||
| 210 | 210 | ||
| 211 | /* Initialize the IPU3 CSS hardware and associated h/w blocks */ | 211 | /* Initialize the IPU3 CSS hardware and associated h/w blocks */ |
| 212 | 212 | ||
| 213 | int ipu3_css_set_powerup(struct device *dev, void __iomem *base) | 213 | int imgu_css_set_powerup(struct device *dev, void __iomem *base) |
| 214 | { | 214 | { |
| 215 | static const unsigned int freq = 450; | 215 | static const unsigned int freq = 450; |
| 216 | u32 pm_ctrl, state, val; | 216 | u32 pm_ctrl, state, val; |
| @@ -221,7 +221,7 @@ int ipu3_css_set_powerup(struct device *dev, void __iomem *base) | |||
| 221 | writel(0, base + IMGU_REG_GP_BUSY); | 221 | writel(0, base + IMGU_REG_GP_BUSY); |
| 222 | 222 | ||
| 223 | /* Wait for idle signal */ | 223 | /* Wait for idle signal */ |
| 224 | if (ipu3_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, | 224 | if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, |
| 225 | IMGU_STATE_IDLE_STS)) { | 225 | IMGU_STATE_IDLE_STS)) { |
| 226 | dev_err(dev, "failed to set CSS idle\n"); | 226 | dev_err(dev, "failed to set CSS idle\n"); |
| 227 | goto fail; | 227 | goto fail; |
| @@ -245,7 +245,7 @@ int ipu3_css_set_powerup(struct device *dev, void __iomem *base) | |||
| 245 | if (state & IMGU_STATE_POWER_DOWN) { | 245 | if (state & IMGU_STATE_POWER_DOWN) { |
| 246 | writel(IMGU_PM_CTRL_RACE_TO_HALT | IMGU_PM_CTRL_START, | 246 | writel(IMGU_PM_CTRL_RACE_TO_HALT | IMGU_PM_CTRL_START, |
| 247 | base + IMGU_REG_PM_CTRL); | 247 | base + IMGU_REG_PM_CTRL); |
| 248 | if (ipu3_hw_wait(base, IMGU_REG_PM_CTRL, | 248 | if (imgu_hw_wait(base, IMGU_REG_PM_CTRL, |
| 249 | IMGU_PM_CTRL_START, 0)) { | 249 | IMGU_PM_CTRL_START, 0)) { |
| 250 | dev_err(dev, "failed to power up CSS\n"); | 250 | dev_err(dev, "failed to power up CSS\n"); |
| 251 | goto fail; | 251 | goto fail; |
| @@ -263,7 +263,7 @@ int ipu3_css_set_powerup(struct device *dev, void __iomem *base) | |||
| 263 | val = pm_ctrl & ~(IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); | 263 | val = pm_ctrl & ~(IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); |
| 264 | writel(val, base + IMGU_REG_PM_CTRL); | 264 | writel(val, base + IMGU_REG_PM_CTRL); |
| 265 | writel(0, base + IMGU_REG_GP_BUSY); | 265 | writel(0, base + IMGU_REG_GP_BUSY); |
| 266 | if (ipu3_hw_wait(base, IMGU_REG_STATE, | 266 | if (imgu_hw_wait(base, IMGU_REG_STATE, |
| 267 | IMGU_STATE_PWRDNM_FSM_MASK, 0)) { | 267 | IMGU_STATE_PWRDNM_FSM_MASK, 0)) { |
| 268 | dev_err(dev, "failed to pwrdn CSS\n"); | 268 | dev_err(dev, "failed to pwrdn CSS\n"); |
| 269 | goto fail; | 269 | goto fail; |
| @@ -273,7 +273,7 @@ int ipu3_css_set_powerup(struct device *dev, void __iomem *base) | |||
| 273 | writel(1, base + IMGU_REG_GP_BUSY); | 273 | writel(1, base + IMGU_REG_GP_BUSY); |
| 274 | writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_HALT, | 274 | writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_HALT, |
| 275 | base + IMGU_REG_PM_CTRL); | 275 | base + IMGU_REG_PM_CTRL); |
| 276 | if (ipu3_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_HALT_STS, | 276 | if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_HALT_STS, |
| 277 | IMGU_STATE_HALT_STS)) { | 277 | IMGU_STATE_HALT_STS)) { |
| 278 | dev_err(dev, "failed to halt CSS\n"); | 278 | dev_err(dev, "failed to halt CSS\n"); |
| 279 | goto fail; | 279 | goto fail; |
| @@ -281,7 +281,7 @@ int ipu3_css_set_powerup(struct device *dev, void __iomem *base) | |||
| 281 | 281 | ||
| 282 | writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_START, | 282 | writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_START, |
| 283 | base + IMGU_REG_PM_CTRL); | 283 | base + IMGU_REG_PM_CTRL); |
| 284 | if (ipu3_hw_wait(base, IMGU_REG_PM_CTRL, IMGU_PM_CTRL_START, 0)) { | 284 | if (imgu_hw_wait(base, IMGU_REG_PM_CTRL, IMGU_PM_CTRL_START, 0)) { |
| 285 | dev_err(dev, "failed to start CSS\n"); | 285 | dev_err(dev, "failed to start CSS\n"); |
| 286 | goto fail; | 286 | goto fail; |
| 287 | } | 287 | } |
| @@ -296,26 +296,26 @@ int ipu3_css_set_powerup(struct device *dev, void __iomem *base) | |||
| 296 | return 0; | 296 | return 0; |
| 297 | 297 | ||
| 298 | fail: | 298 | fail: |
| 299 | ipu3_css_set_powerdown(dev, base); | 299 | imgu_css_set_powerdown(dev, base); |
| 300 | return -EIO; | 300 | return -EIO; |
| 301 | } | 301 | } |
| 302 | 302 | ||
| 303 | void ipu3_css_set_powerdown(struct device *dev, void __iomem *base) | 303 | void imgu_css_set_powerdown(struct device *dev, void __iomem *base) |
| 304 | { | 304 | { |
| 305 | dev_dbg(dev, "%s\n", __func__); | 305 | dev_dbg(dev, "%s\n", __func__); |
| 306 | /* wait for cio idle signal */ | 306 | /* wait for cio idle signal */ |
| 307 | if (ipu3_hw_wait(base, IMGU_REG_CIO_GATE_BURST_STATE, | 307 | if (imgu_hw_wait(base, IMGU_REG_CIO_GATE_BURST_STATE, |
| 308 | IMGU_CIO_GATE_BURST_MASK, 0)) | 308 | IMGU_CIO_GATE_BURST_MASK, 0)) |
| 309 | dev_warn(dev, "wait cio gate idle timeout"); | 309 | dev_warn(dev, "wait cio gate idle timeout"); |
| 310 | 310 | ||
| 311 | /* wait for css idle signal */ | 311 | /* wait for css idle signal */ |
| 312 | if (ipu3_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, | 312 | if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, |
| 313 | IMGU_STATE_IDLE_STS)) | 313 | IMGU_STATE_IDLE_STS)) |
| 314 | dev_warn(dev, "wait css idle timeout\n"); | 314 | dev_warn(dev, "wait css idle timeout\n"); |
| 315 | 315 | ||
| 316 | /* do halt-halted handshake with css */ | 316 | /* do halt-halted handshake with css */ |
| 317 | writel(1, base + IMGU_REG_GP_HALT); | 317 | writel(1, base + IMGU_REG_GP_HALT); |
| 318 | if (ipu3_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_HALT_STS, | 318 | if (imgu_hw_wait(base, IMGU_REG_STATE, IMGU_STATE_HALT_STS, |
| 319 | IMGU_STATE_HALT_STS)) | 319 | IMGU_STATE_HALT_STS)) |
| 320 | dev_warn(dev, "failed to halt css"); | 320 | dev_warn(dev, "failed to halt css"); |
| 321 | 321 | ||
| @@ -323,7 +323,7 @@ void ipu3_css_set_powerdown(struct device *dev, void __iomem *base) | |||
| 323 | writel(0, base + IMGU_REG_GP_BUSY); | 323 | writel(0, base + IMGU_REG_GP_BUSY); |
| 324 | } | 324 | } |
| 325 | 325 | ||
| 326 | static void ipu3_css_hw_enable_irq(struct ipu3_css *css) | 326 | static void imgu_css_hw_enable_irq(struct imgu_css *css) |
| 327 | { | 327 | { |
| 328 | void __iomem *const base = css->base; | 328 | void __iomem *const base = css->base; |
| 329 | u32 val, i; | 329 | u32 val, i; |
| @@ -371,7 +371,7 @@ static void ipu3_css_hw_enable_irq(struct ipu3_css *css) | |||
| 371 | } | 371 | } |
| 372 | } | 372 | } |
| 373 | 373 | ||
| 374 | static int ipu3_css_hw_init(struct ipu3_css *css) | 374 | static int imgu_css_hw_init(struct imgu_css *css) |
| 375 | { | 375 | { |
| 376 | /* For checking that streaming monitor statuses are valid */ | 376 | /* For checking that streaming monitor statuses are valid */ |
| 377 | static const struct { | 377 | static const struct { |
| @@ -463,11 +463,11 @@ static int ipu3_css_hw_init(struct ipu3_css *css) | |||
| 463 | 463 | ||
| 464 | /* Initialize GDC with default values */ | 464 | /* Initialize GDC with default values */ |
| 465 | 465 | ||
| 466 | for (i = 0; i < ARRAY_SIZE(ipu3_css_gdc_lut[0]); i++) { | 466 | for (i = 0; i < ARRAY_SIZE(imgu_css_gdc_lut[0]); i++) { |
| 467 | u32 val0 = ipu3_css_gdc_lut[0][i] & IMGU_GDC_LUT_MASK; | 467 | u32 val0 = imgu_css_gdc_lut[0][i] & IMGU_GDC_LUT_MASK; |
| 468 | u32 val1 = ipu3_css_gdc_lut[1][i] & IMGU_GDC_LUT_MASK; | 468 | u32 val1 = imgu_css_gdc_lut[1][i] & IMGU_GDC_LUT_MASK; |
| 469 | u32 val2 = ipu3_css_gdc_lut[2][i] & IMGU_GDC_LUT_MASK; | 469 | u32 val2 = imgu_css_gdc_lut[2][i] & IMGU_GDC_LUT_MASK; |
| 470 | u32 val3 = ipu3_css_gdc_lut[3][i] & IMGU_GDC_LUT_MASK; | 470 | u32 val3 = imgu_css_gdc_lut[3][i] & IMGU_GDC_LUT_MASK; |
| 471 | 471 | ||
| 472 | writel(val0 | (val1 << 16), | 472 | writel(val0 | (val1 << 16), |
| 473 | base + IMGU_REG_GDC_LUT_BASE + i * 8); | 473 | base + IMGU_REG_GDC_LUT_BASE + i * 8); |
| @@ -479,7 +479,7 @@ static int ipu3_css_hw_init(struct ipu3_css *css) | |||
| 479 | } | 479 | } |
| 480 | 480 | ||
| 481 | /* Boot the given IPU3 CSS SP */ | 481 | /* Boot the given IPU3 CSS SP */ |
| 482 | static int ipu3_css_hw_start_sp(struct ipu3_css *css, int sp) | 482 | static int imgu_css_hw_start_sp(struct imgu_css *css, int sp) |
| 483 | { | 483 | { |
| 484 | void __iomem *const base = css->base; | 484 | void __iomem *const base = css->base; |
| 485 | struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[sp]]; | 485 | struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[sp]]; |
| @@ -501,7 +501,7 @@ static int ipu3_css_hw_start_sp(struct ipu3_css *css, int sp) | |||
| 501 | writel(readl(base + IMGU_REG_SP_CTRL(sp)) | 501 | writel(readl(base + IMGU_REG_SP_CTRL(sp)) |
| 502 | | IMGU_CTRL_START | IMGU_CTRL_RUN, base + IMGU_REG_SP_CTRL(sp)); | 502 | | IMGU_CTRL_START | IMGU_CTRL_RUN, base + IMGU_REG_SP_CTRL(sp)); |
| 503 | 503 | ||
| 504 | if (ipu3_hw_wait(css->base, IMGU_REG_SP_DMEM_BASE(sp) | 504 | if (imgu_hw_wait(css->base, IMGU_REG_SP_DMEM_BASE(sp) |
| 505 | + bi->info.sp.sw_state, | 505 | + bi->info.sp.sw_state, |
| 506 | ~0, IMGU_ABI_SP_SWSTATE_INITIALIZED)) | 506 | ~0, IMGU_ABI_SP_SWSTATE_INITIALIZED)) |
| 507 | return -EIO; | 507 | return -EIO; |
| @@ -510,7 +510,7 @@ static int ipu3_css_hw_start_sp(struct ipu3_css *css, int sp) | |||
| 510 | } | 510 | } |
| 511 | 511 | ||
| 512 | /* Start the IPU3 CSS ImgU (Imaging Unit) and all the SPs */ | 512 | /* Start the IPU3 CSS ImgU (Imaging Unit) and all the SPs */ |
| 513 | static int ipu3_css_hw_start(struct ipu3_css *css) | 513 | static int imgu_css_hw_start(struct imgu_css *css) |
| 514 | { | 514 | { |
| 515 | static const u32 event_mask = | 515 | static const u32 event_mask = |
| 516 | ((1 << IMGU_ABI_EVTTYPE_OUT_FRAME_DONE) | | 516 | ((1 << IMGU_ABI_EVTTYPE_OUT_FRAME_DONE) | |
| @@ -560,7 +560,7 @@ static int ipu3_css_hw_start(struct ipu3_css *css) | |||
| 560 | 560 | ||
| 561 | writel(readl(base + IMGU_REG_ISP_CTRL) | 561 | writel(readl(base + IMGU_REG_ISP_CTRL) |
| 562 | | IMGU_CTRL_START | IMGU_CTRL_RUN, base + IMGU_REG_ISP_CTRL); | 562 | | IMGU_CTRL_START | IMGU_CTRL_RUN, base + IMGU_REG_ISP_CTRL); |
| 563 | if (ipu3_hw_wait(css->base, IMGU_REG_ISP_DMEM_BASE | 563 | if (imgu_hw_wait(css->base, IMGU_REG_ISP_DMEM_BASE |
| 564 | + bl->info.bl.sw_state, ~0, | 564 | + bl->info.bl.sw_state, ~0, |
| 565 | IMGU_ABI_BL_SWSTATE_OK)) { | 565 | IMGU_ABI_BL_SWSTATE_OK)) { |
| 566 | dev_err(css->dev, "failed to start bootloader\n"); | 566 | dev_err(css->dev, "failed to start bootloader\n"); |
| @@ -581,7 +581,7 @@ static int ipu3_css_hw_start(struct ipu3_css *css) | |||
| 581 | base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state); | 581 | base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state); |
| 582 | writel(1, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb); | 582 | writel(1, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb); |
| 583 | 583 | ||
| 584 | if (ipu3_css_hw_start_sp(css, 0)) | 584 | if (imgu_css_hw_start_sp(css, 0)) |
| 585 | return -EIO; | 585 | return -EIO; |
| 586 | 586 | ||
| 587 | writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.isp_started); | 587 | writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.isp_started); |
| @@ -608,7 +608,7 @@ static int ipu3_css_hw_start(struct ipu3_css *css) | |||
| 608 | writel(IMGU_ABI_SP_SWSTATE_TERMINATED, | 608 | writel(IMGU_ABI_SP_SWSTATE_TERMINATED, |
| 609 | base + IMGU_REG_SP_DMEM_BASE(1) + bi->info.sp.sw_state); | 609 | base + IMGU_REG_SP_DMEM_BASE(1) + bi->info.sp.sw_state); |
| 610 | 610 | ||
| 611 | if (ipu3_css_hw_start_sp(css, 1)) | 611 | if (imgu_css_hw_start_sp(css, 1)) |
| 612 | return -EIO; | 612 | return -EIO; |
| 613 | 613 | ||
| 614 | writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(1) | 614 | writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(1) |
| @@ -617,7 +617,7 @@ static int ipu3_css_hw_start(struct ipu3_css *css) | |||
| 617 | return 0; | 617 | return 0; |
| 618 | } | 618 | } |
| 619 | 619 | ||
| 620 | static void ipu3_css_hw_stop(struct ipu3_css *css) | 620 | static void imgu_css_hw_stop(struct imgu_css *css) |
| 621 | { | 621 | { |
| 622 | void __iomem *const base = css->base; | 622 | void __iomem *const base = css->base; |
| 623 | struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[0]]; | 623 | struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[0]]; |
| @@ -626,18 +626,18 @@ static void ipu3_css_hw_stop(struct ipu3_css *css) | |||
| 626 | writel(IMGU_ABI_SP_COMM_COMMAND_TERMINATE, | 626 | writel(IMGU_ABI_SP_COMM_COMMAND_TERMINATE, |
| 627 | base + IMGU_REG_SP_DMEM_BASE(0) + | 627 | base + IMGU_REG_SP_DMEM_BASE(0) + |
| 628 | bi->info.sp.host_sp_com + IMGU_ABI_SP_COMM_COMMAND); | 628 | bi->info.sp.host_sp_com + IMGU_ABI_SP_COMM_COMMAND); |
| 629 | if (ipu3_hw_wait(css->base, IMGU_REG_SP_CTRL(0), | 629 | if (imgu_hw_wait(css->base, IMGU_REG_SP_CTRL(0), |
| 630 | IMGU_CTRL_IDLE, IMGU_CTRL_IDLE)) | 630 | IMGU_CTRL_IDLE, IMGU_CTRL_IDLE)) |
| 631 | dev_err(css->dev, "wait sp0 idle timeout.\n"); | 631 | dev_err(css->dev, "wait sp0 idle timeout.\n"); |
| 632 | if (readl(base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state) != | 632 | if (readl(base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state) != |
| 633 | IMGU_ABI_SP_SWSTATE_TERMINATED) | 633 | IMGU_ABI_SP_SWSTATE_TERMINATED) |
| 634 | dev_err(css->dev, "sp0 is not terminated.\n"); | 634 | dev_err(css->dev, "sp0 is not terminated.\n"); |
| 635 | if (ipu3_hw_wait(css->base, IMGU_REG_ISP_CTRL, | 635 | if (imgu_hw_wait(css->base, IMGU_REG_ISP_CTRL, |
| 636 | IMGU_CTRL_IDLE, IMGU_CTRL_IDLE)) | 636 | IMGU_CTRL_IDLE, IMGU_CTRL_IDLE)) |
| 637 | dev_err(css->dev, "wait isp idle timeout\n"); | 637 | dev_err(css->dev, "wait isp idle timeout\n"); |
| 638 | } | 638 | } |
| 639 | 639 | ||
| 640 | static void ipu3_css_hw_cleanup(struct ipu3_css *css) | 640 | static void imgu_css_hw_cleanup(struct imgu_css *css) |
| 641 | { | 641 | { |
| 642 | void __iomem *const base = css->base; | 642 | void __iomem *const base = css->base; |
| 643 | 643 | ||
| @@ -648,7 +648,7 @@ static void ipu3_css_hw_cleanup(struct ipu3_css *css) | |||
| 648 | writel(0, base + IMGU_REG_GP_BUSY); | 648 | writel(0, base + IMGU_REG_GP_BUSY); |
| 649 | 649 | ||
| 650 | /* Wait for idle signal */ | 650 | /* Wait for idle signal */ |
| 651 | if (ipu3_hw_wait(css->base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, | 651 | if (imgu_hw_wait(css->base, IMGU_REG_STATE, IMGU_STATE_IDLE_STS, |
| 652 | IMGU_STATE_IDLE_STS)) | 652 | IMGU_STATE_IDLE_STS)) |
| 653 | dev_err(css->dev, "failed to shut down hw cleanly\n"); | 653 | dev_err(css->dev, "failed to shut down hw cleanly\n"); |
| 654 | 654 | ||
| @@ -659,19 +659,19 @@ static void ipu3_css_hw_cleanup(struct ipu3_css *css) | |||
| 659 | usleep_range(200, 300); | 659 | usleep_range(200, 300); |
| 660 | } | 660 | } |
| 661 | 661 | ||
| 662 | static void ipu3_css_pipeline_cleanup(struct ipu3_css *css, unsigned int pipe) | 662 | static void imgu_css_pipeline_cleanup(struct imgu_css *css, unsigned int pipe) |
| 663 | { | 663 | { |
| 664 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 664 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 665 | unsigned int i; | 665 | unsigned int i; |
| 666 | 666 | ||
| 667 | ipu3_css_pool_cleanup(imgu, | 667 | imgu_css_pool_cleanup(imgu, |
| 668 | &css->pipes[pipe].pool.parameter_set_info); | 668 | &css->pipes[pipe].pool.parameter_set_info); |
| 669 | ipu3_css_pool_cleanup(imgu, &css->pipes[pipe].pool.acc); | 669 | imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.acc); |
| 670 | ipu3_css_pool_cleanup(imgu, &css->pipes[pipe].pool.gdc); | 670 | imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.gdc); |
| 671 | ipu3_css_pool_cleanup(imgu, &css->pipes[pipe].pool.obgrid); | 671 | imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.obgrid); |
| 672 | 672 | ||
| 673 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) | 673 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) |
| 674 | ipu3_css_pool_cleanup(imgu, | 674 | imgu_css_pool_cleanup(imgu, |
| 675 | &css->pipes[pipe].pool.binary_params_p[i]); | 675 | &css->pipes[pipe].pool.binary_params_p[i]); |
| 676 | } | 676 | } |
| 677 | 677 | ||
| @@ -679,7 +679,7 @@ static void ipu3_css_pipeline_cleanup(struct ipu3_css *css, unsigned int pipe) | |||
| 679 | * This function initializes various stages of the | 679 | * This function initializes various stages of the |
| 680 | * IPU3 CSS ISP pipeline | 680 | * IPU3 CSS ISP pipeline |
| 681 | */ | 681 | */ |
| 682 | static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | 682 | static int imgu_css_pipeline_init(struct imgu_css *css, unsigned int pipe) |
| 683 | { | 683 | { |
| 684 | static const int BYPC = 2; /* Bytes per component */ | 684 | static const int BYPC = 2; /* Bytes per component */ |
| 685 | static const struct imgu_abi_buffer_sp buffer_sp_init = { | 685 | static const struct imgu_abi_buffer_sp buffer_sp_init = { |
| @@ -697,7 +697,7 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 697 | const int stage = 0; | 697 | const int stage = 0; |
| 698 | unsigned int i, j; | 698 | unsigned int i, j; |
| 699 | 699 | ||
| 700 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 700 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 701 | const struct imgu_fw_info *bi = | 701 | const struct imgu_fw_info *bi = |
| 702 | &css->fwp->binary_header[css_pipe->bindex]; | 702 | &css->fwp->binary_header[css_pipe->bindex]; |
| 703 | const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; | 703 | const unsigned int stripes = bi->info.isp.sp.iterator.num_stripes; |
| @@ -725,7 +725,7 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 725 | 725 | ||
| 726 | /* Configure iterator */ | 726 | /* Configure iterator */ |
| 727 | 727 | ||
| 728 | cfg_iter = ipu3_css_fw_pipeline_params(css, pipe, cfg, m0, | 728 | cfg_iter = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, |
| 729 | &cofs->dmem.iterator, | 729 | &cofs->dmem.iterator, |
| 730 | sizeof(*cfg_iter), vaddr); | 730 | sizeof(*cfg_iter), vaddr); |
| 731 | if (!cfg_iter) | 731 | if (!cfg_iter) |
| @@ -791,7 +791,7 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 791 | 791 | ||
| 792 | /* Configure reference (delay) frames */ | 792 | /* Configure reference (delay) frames */ |
| 793 | 793 | ||
| 794 | cfg_ref = ipu3_css_fw_pipeline_params(css, pipe, cfg, m0, | 794 | cfg_ref = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, |
| 795 | &cofs->dmem.ref, | 795 | &cofs->dmem.ref, |
| 796 | sizeof(*cfg_ref), vaddr); | 796 | sizeof(*cfg_ref), vaddr); |
| 797 | if (!cfg_ref) | 797 | if (!cfg_ref) |
| @@ -821,7 +821,7 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 821 | 821 | ||
| 822 | /* Configure DVS (digital video stabilization) */ | 822 | /* Configure DVS (digital video stabilization) */ |
| 823 | 823 | ||
| 824 | cfg_dvs = ipu3_css_fw_pipeline_params(css, pipe, cfg, m0, | 824 | cfg_dvs = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, |
| 825 | &cofs->dmem.dvs, sizeof(*cfg_dvs), | 825 | &cofs->dmem.dvs, sizeof(*cfg_dvs), |
| 826 | vaddr); | 826 | vaddr); |
| 827 | if (!cfg_dvs) | 827 | if (!cfg_dvs) |
| @@ -837,7 +837,7 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 837 | /* Configure TNR (temporal noise reduction) */ | 837 | /* Configure TNR (temporal noise reduction) */ |
| 838 | 838 | ||
| 839 | if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { | 839 | if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { |
| 840 | cfg_tnr = ipu3_css_fw_pipeline_params(css, pipe, cfg, m0, | 840 | cfg_tnr = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, |
| 841 | &cofs->dmem.tnr3, | 841 | &cofs->dmem.tnr3, |
| 842 | sizeof(*cfg_tnr), | 842 | sizeof(*cfg_tnr), |
| 843 | vaddr); | 843 | vaddr); |
| @@ -868,7 +868,7 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 868 | cfg = IMGU_ABI_PARAM_CLASS_STATE; | 868 | cfg = IMGU_ABI_PARAM_CLASS_STATE; |
| 869 | vaddr = css_pipe->binary_params_cs[cfg - 1][m0].vaddr; | 869 | vaddr = css_pipe->binary_params_cs[cfg - 1][m0].vaddr; |
| 870 | 870 | ||
| 871 | cfg_ref_state = ipu3_css_fw_pipeline_params(css, pipe, cfg, m0, | 871 | cfg_ref_state = imgu_css_fw_pipeline_params(css, pipe, cfg, m0, |
| 872 | &sofs->dmem.ref, | 872 | &sofs->dmem.ref, |
| 873 | sizeof(*cfg_ref_state), | 873 | sizeof(*cfg_ref_state), |
| 874 | vaddr); | 874 | vaddr); |
| @@ -881,7 +881,7 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 881 | /* Configure tnr dmem state parameters */ | 881 | /* Configure tnr dmem state parameters */ |
| 882 | if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { | 882 | if (css_pipe->pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { |
| 883 | cfg_tnr_state = | 883 | cfg_tnr_state = |
| 884 | ipu3_css_fw_pipeline_params(css, pipe, cfg, m0, | 884 | imgu_css_fw_pipeline_params(css, pipe, cfg, m0, |
| 885 | &sofs->dmem.tnr3, | 885 | &sofs->dmem.tnr3, |
| 886 | sizeof(*cfg_tnr_state), | 886 | sizeof(*cfg_tnr_state), |
| 887 | vaddr); | 887 | vaddr); |
| @@ -1068,21 +1068,21 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 1068 | 1068 | ||
| 1069 | /* Initialize parameter pools */ | 1069 | /* Initialize parameter pools */ |
| 1070 | 1070 | ||
| 1071 | if (ipu3_css_pool_init(imgu, &css_pipe->pool.parameter_set_info, | 1071 | if (imgu_css_pool_init(imgu, &css_pipe->pool.parameter_set_info, |
| 1072 | sizeof(struct imgu_abi_parameter_set_info)) || | 1072 | sizeof(struct imgu_abi_parameter_set_info)) || |
| 1073 | ipu3_css_pool_init(imgu, &css_pipe->pool.acc, | 1073 | imgu_css_pool_init(imgu, &css_pipe->pool.acc, |
| 1074 | sizeof(struct imgu_abi_acc_param)) || | 1074 | sizeof(struct imgu_abi_acc_param)) || |
| 1075 | ipu3_css_pool_init(imgu, &css_pipe->pool.gdc, | 1075 | imgu_css_pool_init(imgu, &css_pipe->pool.gdc, |
| 1076 | sizeof(struct imgu_abi_gdc_warp_param) * | 1076 | sizeof(struct imgu_abi_gdc_warp_param) * |
| 1077 | 3 * cfg_dvs->num_horizontal_blocks / 2 * | 1077 | 3 * cfg_dvs->num_horizontal_blocks / 2 * |
| 1078 | cfg_dvs->num_vertical_blocks) || | 1078 | cfg_dvs->num_vertical_blocks) || |
| 1079 | ipu3_css_pool_init(imgu, &css_pipe->pool.obgrid, | 1079 | imgu_css_pool_init(imgu, &css_pipe->pool.obgrid, |
| 1080 | ipu3_css_fw_obgrid_size( | 1080 | imgu_css_fw_obgrid_size( |
| 1081 | &css->fwp->binary_header[css_pipe->bindex]))) | 1081 | &css->fwp->binary_header[css_pipe->bindex]))) |
| 1082 | goto out_of_memory; | 1082 | goto out_of_memory; |
| 1083 | 1083 | ||
| 1084 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) | 1084 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) |
| 1085 | if (ipu3_css_pool_init(imgu, | 1085 | if (imgu_css_pool_init(imgu, |
| 1086 | &css_pipe->pool.binary_params_p[i], | 1086 | &css_pipe->pool.binary_params_p[i], |
| 1087 | bi->info.isp.sp.mem_initializers.params | 1087 | bi->info.isp.sp.mem_initializers.params |
| 1088 | [IMGU_ABI_PARAM_CLASS_PARAM][i].size)) | 1088 | [IMGU_ABI_PARAM_CLASS_PARAM][i].size)) |
| @@ -1091,15 +1091,15 @@ static int ipu3_css_pipeline_init(struct ipu3_css *css, unsigned int pipe) | |||
| 1091 | return 0; | 1091 | return 0; |
| 1092 | 1092 | ||
| 1093 | bad_firmware: | 1093 | bad_firmware: |
| 1094 | ipu3_css_pipeline_cleanup(css, pipe); | 1094 | imgu_css_pipeline_cleanup(css, pipe); |
| 1095 | return -EPROTO; | 1095 | return -EPROTO; |
| 1096 | 1096 | ||
| 1097 | out_of_memory: | 1097 | out_of_memory: |
| 1098 | ipu3_css_pipeline_cleanup(css, pipe); | 1098 | imgu_css_pipeline_cleanup(css, pipe); |
| 1099 | return -ENOMEM; | 1099 | return -ENOMEM; |
| 1100 | } | 1100 | } |
| 1101 | 1101 | ||
| 1102 | static u8 ipu3_css_queue_pos(struct ipu3_css *css, int queue, int thread) | 1102 | static u8 imgu_css_queue_pos(struct imgu_css *css, int queue, int thread) |
| 1103 | { | 1103 | { |
| 1104 | static const unsigned int sp; | 1104 | static const unsigned int sp; |
| 1105 | void __iomem *const base = css->base; | 1105 | void __iomem *const base = css->base; |
| @@ -1112,7 +1112,7 @@ static u8 ipu3_css_queue_pos(struct ipu3_css *css, int queue, int thread) | |||
| 1112 | } | 1112 | } |
| 1113 | 1113 | ||
| 1114 | /* Sent data to sp using given buffer queue, or if queue < 0, event queue. */ | 1114 | /* Sent data to sp using given buffer queue, or if queue < 0, event queue. */ |
| 1115 | static int ipu3_css_queue_data(struct ipu3_css *css, | 1115 | static int imgu_css_queue_data(struct imgu_css *css, |
| 1116 | int queue, int thread, u32 data) | 1116 | int queue, int thread, u32 data) |
| 1117 | { | 1117 | { |
| 1118 | static const unsigned int sp; | 1118 | static const unsigned int sp; |
| @@ -1151,7 +1151,7 @@ static int ipu3_css_queue_data(struct ipu3_css *css, | |||
| 1151 | } | 1151 | } |
| 1152 | 1152 | ||
| 1153 | /* Receive data using given buffer queue, or if queue < 0, event queue. */ | 1153 | /* Receive data using given buffer queue, or if queue < 0, event queue. */ |
| 1154 | static int ipu3_css_dequeue_data(struct ipu3_css *css, int queue, u32 *data) | 1154 | static int imgu_css_dequeue_data(struct imgu_css *css, int queue, u32 *data) |
| 1155 | { | 1155 | { |
| 1156 | static const unsigned int sp; | 1156 | static const unsigned int sp; |
| 1157 | void __iomem *const base = css->base; | 1157 | void __iomem *const base = css->base; |
| @@ -1188,7 +1188,7 @@ static int ipu3_css_dequeue_data(struct ipu3_css *css, int queue, u32 *data) | |||
| 1188 | writeb(start2, &q->sp2host_evtq_info.start); | 1188 | writeb(start2, &q->sp2host_evtq_info.start); |
| 1189 | 1189 | ||
| 1190 | /* Acknowledge events dequeued from event queue */ | 1190 | /* Acknowledge events dequeued from event queue */ |
| 1191 | r = ipu3_css_queue_data(css, queue, 0, | 1191 | r = imgu_css_queue_data(css, queue, 0, |
| 1192 | IMGU_ABI_EVENT_EVENT_DEQUEUED); | 1192 | IMGU_ABI_EVENT_EVENT_DEQUEUED); |
| 1193 | if (r < 0) | 1193 | if (r < 0) |
| 1194 | return r; | 1194 | return r; |
| @@ -1198,52 +1198,52 @@ static int ipu3_css_dequeue_data(struct ipu3_css *css, int queue, u32 *data) | |||
| 1198 | } | 1198 | } |
| 1199 | 1199 | ||
| 1200 | /* Free binary-specific resources */ | 1200 | /* Free binary-specific resources */ |
| 1201 | static void ipu3_css_binary_cleanup(struct ipu3_css *css, unsigned int pipe) | 1201 | static void imgu_css_binary_cleanup(struct imgu_css *css, unsigned int pipe) |
| 1202 | { | 1202 | { |
| 1203 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 1203 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 1204 | unsigned int i, j; | 1204 | unsigned int i, j; |
| 1205 | 1205 | ||
| 1206 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1206 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1207 | 1207 | ||
| 1208 | for (j = 0; j < IMGU_ABI_PARAM_CLASS_NUM - 1; j++) | 1208 | for (j = 0; j < IMGU_ABI_PARAM_CLASS_NUM - 1; j++) |
| 1209 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) | 1209 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) |
| 1210 | ipu3_dmamap_free(imgu, | 1210 | imgu_dmamap_free(imgu, |
| 1211 | &css_pipe->binary_params_cs[j][i]); | 1211 | &css_pipe->binary_params_cs[j][i]); |
| 1212 | 1212 | ||
| 1213 | j = IPU3_CSS_AUX_FRAME_REF; | 1213 | j = IPU3_CSS_AUX_FRAME_REF; |
| 1214 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) | 1214 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) |
| 1215 | ipu3_dmamap_free(imgu, | 1215 | imgu_dmamap_free(imgu, |
| 1216 | &css_pipe->aux_frames[j].mem[i]); | 1216 | &css_pipe->aux_frames[j].mem[i]); |
| 1217 | 1217 | ||
| 1218 | j = IPU3_CSS_AUX_FRAME_TNR; | 1218 | j = IPU3_CSS_AUX_FRAME_TNR; |
| 1219 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) | 1219 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) |
| 1220 | ipu3_dmamap_free(imgu, | 1220 | imgu_dmamap_free(imgu, |
| 1221 | &css_pipe->aux_frames[j].mem[i]); | 1221 | &css_pipe->aux_frames[j].mem[i]); |
| 1222 | } | 1222 | } |
| 1223 | 1223 | ||
| 1224 | static int ipu3_css_binary_preallocate(struct ipu3_css *css, unsigned int pipe) | 1224 | static int imgu_css_binary_preallocate(struct imgu_css *css, unsigned int pipe) |
| 1225 | { | 1225 | { |
| 1226 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 1226 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 1227 | unsigned int i, j; | 1227 | unsigned int i, j; |
| 1228 | 1228 | ||
| 1229 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1229 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1230 | 1230 | ||
| 1231 | for (j = IMGU_ABI_PARAM_CLASS_CONFIG; | 1231 | for (j = IMGU_ABI_PARAM_CLASS_CONFIG; |
| 1232 | j < IMGU_ABI_PARAM_CLASS_NUM; j++) | 1232 | j < IMGU_ABI_PARAM_CLASS_NUM; j++) |
| 1233 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) | 1233 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) |
| 1234 | if (!ipu3_dmamap_alloc(imgu, | 1234 | if (!imgu_dmamap_alloc(imgu, |
| 1235 | &css_pipe->binary_params_cs[j - 1][i], | 1235 | &css_pipe->binary_params_cs[j - 1][i], |
| 1236 | CSS_ABI_SIZE)) | 1236 | CSS_ABI_SIZE)) |
| 1237 | goto out_of_memory; | 1237 | goto out_of_memory; |
| 1238 | 1238 | ||
| 1239 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) | 1239 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) |
| 1240 | if (!ipu3_dmamap_alloc(imgu, | 1240 | if (!imgu_dmamap_alloc(imgu, |
| 1241 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF]. | 1241 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF]. |
| 1242 | mem[i], CSS_BDS_SIZE)) | 1242 | mem[i], CSS_BDS_SIZE)) |
| 1243 | goto out_of_memory; | 1243 | goto out_of_memory; |
| 1244 | 1244 | ||
| 1245 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) | 1245 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) |
| 1246 | if (!ipu3_dmamap_alloc(imgu, | 1246 | if (!imgu_dmamap_alloc(imgu, |
| 1247 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR]. | 1247 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR]. |
| 1248 | mem[i], CSS_GDC_SIZE)) | 1248 | mem[i], CSS_GDC_SIZE)) |
| 1249 | goto out_of_memory; | 1249 | goto out_of_memory; |
| @@ -1251,14 +1251,14 @@ static int ipu3_css_binary_preallocate(struct ipu3_css *css, unsigned int pipe) | |||
| 1251 | return 0; | 1251 | return 0; |
| 1252 | 1252 | ||
| 1253 | out_of_memory: | 1253 | out_of_memory: |
| 1254 | ipu3_css_binary_cleanup(css, pipe); | 1254 | imgu_css_binary_cleanup(css, pipe); |
| 1255 | return -ENOMEM; | 1255 | return -ENOMEM; |
| 1256 | } | 1256 | } |
| 1257 | 1257 | ||
| 1258 | /* allocate binary-specific resources */ | 1258 | /* allocate binary-specific resources */ |
| 1259 | static int ipu3_css_binary_setup(struct ipu3_css *css, unsigned int pipe) | 1259 | static int imgu_css_binary_setup(struct imgu_css *css, unsigned int pipe) |
| 1260 | { | 1260 | { |
| 1261 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1261 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1262 | struct imgu_fw_info *bi = &css->fwp->binary_header[css_pipe->bindex]; | 1262 | struct imgu_fw_info *bi = &css->fwp->binary_header[css_pipe->bindex]; |
| 1263 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 1263 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 1264 | int i, j, size; | 1264 | int i, j, size; |
| @@ -1269,7 +1269,7 @@ static int ipu3_css_binary_setup(struct ipu3_css *css, unsigned int pipe) | |||
| 1269 | 1269 | ||
| 1270 | for (j = IMGU_ABI_PARAM_CLASS_CONFIG; j < IMGU_ABI_PARAM_CLASS_NUM; j++) | 1270 | for (j = IMGU_ABI_PARAM_CLASS_CONFIG; j < IMGU_ABI_PARAM_CLASS_NUM; j++) |
| 1271 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) { | 1271 | for (i = 0; i < IMGU_ABI_NUM_MEMORIES; i++) { |
| 1272 | if (ipu3_css_dma_buffer_resize( | 1272 | if (imgu_css_dma_buffer_resize( |
| 1273 | imgu, | 1273 | imgu, |
| 1274 | &css_pipe->binary_params_cs[j - 1][i], | 1274 | &css_pipe->binary_params_cs[j - 1][i], |
| 1275 | bi->info.isp.sp.mem_initializers.params[j][i].size)) | 1275 | bi->info.isp.sp.mem_initializers.params[j][i].size)) |
| @@ -1292,7 +1292,7 @@ static int ipu3_css_binary_setup(struct ipu3_css *css, unsigned int pipe) | |||
| 1292 | css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperpixel * w; | 1292 | css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].bytesperpixel * w; |
| 1293 | size = w * h * BYPC + (w / 2) * (h / 2) * BYPC * 2; | 1293 | size = w * h * BYPC + (w / 2) * (h / 2) * BYPC * 2; |
| 1294 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) | 1294 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) |
| 1295 | if (ipu3_css_dma_buffer_resize( | 1295 | if (imgu_css_dma_buffer_resize( |
| 1296 | imgu, | 1296 | imgu, |
| 1297 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].mem[i], | 1297 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_REF].mem[i], |
| 1298 | size)) | 1298 | size)) |
| @@ -1313,7 +1313,7 @@ static int ipu3_css_binary_setup(struct ipu3_css *css, unsigned int pipe) | |||
| 1313 | h = css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].height; | 1313 | h = css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].height; |
| 1314 | size = w * ALIGN(h * 3 / 2 + 3, 2); /* +3 for vf_pp prefetch */ | 1314 | size = w * ALIGN(h * 3 / 2 + 3, 2); /* +3 for vf_pp prefetch */ |
| 1315 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) | 1315 | for (i = 0; i < IPU3_CSS_AUX_FRAMES; i++) |
| 1316 | if (ipu3_css_dma_buffer_resize( | 1316 | if (imgu_css_dma_buffer_resize( |
| 1317 | imgu, | 1317 | imgu, |
| 1318 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].mem[i], | 1318 | &css_pipe->aux_frames[IPU3_CSS_AUX_FRAME_TNR].mem[i], |
| 1319 | size)) | 1319 | size)) |
| @@ -1322,11 +1322,11 @@ static int ipu3_css_binary_setup(struct ipu3_css *css, unsigned int pipe) | |||
| 1322 | return 0; | 1322 | return 0; |
| 1323 | 1323 | ||
| 1324 | out_of_memory: | 1324 | out_of_memory: |
| 1325 | ipu3_css_binary_cleanup(css, pipe); | 1325 | imgu_css_binary_cleanup(css, pipe); |
| 1326 | return -ENOMEM; | 1326 | return -ENOMEM; |
| 1327 | } | 1327 | } |
| 1328 | 1328 | ||
| 1329 | int ipu3_css_start_streaming(struct ipu3_css *css) | 1329 | int imgu_css_start_streaming(struct imgu_css *css) |
| 1330 | { | 1330 | { |
| 1331 | u32 data; | 1331 | u32 data; |
| 1332 | int r, pipe; | 1332 | int r, pipe; |
| @@ -1335,48 +1335,48 @@ int ipu3_css_start_streaming(struct ipu3_css *css) | |||
| 1335 | return -EPROTO; | 1335 | return -EPROTO; |
| 1336 | 1336 | ||
| 1337 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { | 1337 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| 1338 | r = ipu3_css_binary_setup(css, pipe); | 1338 | r = imgu_css_binary_setup(css, pipe); |
| 1339 | if (r < 0) | 1339 | if (r < 0) |
| 1340 | return r; | 1340 | return r; |
| 1341 | } | 1341 | } |
| 1342 | 1342 | ||
| 1343 | r = ipu3_css_hw_init(css); | 1343 | r = imgu_css_hw_init(css); |
| 1344 | if (r < 0) | 1344 | if (r < 0) |
| 1345 | return r; | 1345 | return r; |
| 1346 | 1346 | ||
| 1347 | r = ipu3_css_hw_start(css); | 1347 | r = imgu_css_hw_start(css); |
| 1348 | if (r < 0) | 1348 | if (r < 0) |
| 1349 | goto fail; | 1349 | goto fail; |
| 1350 | 1350 | ||
| 1351 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { | 1351 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| 1352 | r = ipu3_css_pipeline_init(css, pipe); | 1352 | r = imgu_css_pipeline_init(css, pipe); |
| 1353 | if (r < 0) | 1353 | if (r < 0) |
| 1354 | goto fail; | 1354 | goto fail; |
| 1355 | } | 1355 | } |
| 1356 | 1356 | ||
| 1357 | css->streaming = true; | 1357 | css->streaming = true; |
| 1358 | 1358 | ||
| 1359 | ipu3_css_hw_enable_irq(css); | 1359 | imgu_css_hw_enable_irq(css); |
| 1360 | 1360 | ||
| 1361 | /* Initialize parameters to default */ | 1361 | /* Initialize parameters to default */ |
| 1362 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { | 1362 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| 1363 | r = ipu3_css_set_parameters(css, pipe, NULL); | 1363 | r = imgu_css_set_parameters(css, pipe, NULL); |
| 1364 | if (r < 0) | 1364 | if (r < 0) |
| 1365 | goto fail; | 1365 | goto fail; |
| 1366 | } | 1366 | } |
| 1367 | 1367 | ||
| 1368 | while (!(r = ipu3_css_dequeue_data(css, IMGU_ABI_QUEUE_A_ID, &data))) | 1368 | while (!(r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_A_ID, &data))) |
| 1369 | ; | 1369 | ; |
| 1370 | if (r != -EBUSY) | 1370 | if (r != -EBUSY) |
| 1371 | goto fail; | 1371 | goto fail; |
| 1372 | 1372 | ||
| 1373 | while (!(r = ipu3_css_dequeue_data(css, IMGU_ABI_QUEUE_B_ID, &data))) | 1373 | while (!(r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_B_ID, &data))) |
| 1374 | ; | 1374 | ; |
| 1375 | if (r != -EBUSY) | 1375 | if (r != -EBUSY) |
| 1376 | goto fail; | 1376 | goto fail; |
| 1377 | 1377 | ||
| 1378 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { | 1378 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| 1379 | r = ipu3_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, | 1379 | r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, |
| 1380 | IMGU_ABI_EVENT_START_STREAM | | 1380 | IMGU_ABI_EVENT_START_STREAM | |
| 1381 | pipe << 16); | 1381 | pipe << 16); |
| 1382 | if (r < 0) | 1382 | if (r < 0) |
| @@ -1387,22 +1387,22 @@ int ipu3_css_start_streaming(struct ipu3_css *css) | |||
| 1387 | 1387 | ||
| 1388 | fail: | 1388 | fail: |
| 1389 | css->streaming = false; | 1389 | css->streaming = false; |
| 1390 | ipu3_css_hw_cleanup(css); | 1390 | imgu_css_hw_cleanup(css); |
| 1391 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { | 1391 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| 1392 | ipu3_css_pipeline_cleanup(css, pipe); | 1392 | imgu_css_pipeline_cleanup(css, pipe); |
| 1393 | ipu3_css_binary_cleanup(css, pipe); | 1393 | imgu_css_binary_cleanup(css, pipe); |
| 1394 | } | 1394 | } |
| 1395 | 1395 | ||
| 1396 | return r; | 1396 | return r; |
| 1397 | } | 1397 | } |
| 1398 | 1398 | ||
| 1399 | void ipu3_css_stop_streaming(struct ipu3_css *css) | 1399 | void imgu_css_stop_streaming(struct imgu_css *css) |
| 1400 | { | 1400 | { |
| 1401 | struct ipu3_css_buffer *b, *b0; | 1401 | struct imgu_css_buffer *b, *b0; |
| 1402 | int q, r, pipe; | 1402 | int q, r, pipe; |
| 1403 | 1403 | ||
| 1404 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { | 1404 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| 1405 | r = ipu3_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, | 1405 | r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, |
| 1406 | IMGU_ABI_EVENT_STOP_STREAM); | 1406 | IMGU_ABI_EVENT_STOP_STREAM); |
| 1407 | if (r < 0) | 1407 | if (r < 0) |
| 1408 | dev_warn(css->dev, "failed on stop stream event\n"); | 1408 | dev_warn(css->dev, "failed on stop stream event\n"); |
| @@ -1411,14 +1411,14 @@ void ipu3_css_stop_streaming(struct ipu3_css *css) | |||
| 1411 | if (!css->streaming) | 1411 | if (!css->streaming) |
| 1412 | return; | 1412 | return; |
| 1413 | 1413 | ||
| 1414 | ipu3_css_hw_stop(css); | 1414 | imgu_css_hw_stop(css); |
| 1415 | 1415 | ||
| 1416 | ipu3_css_hw_cleanup(css); | 1416 | imgu_css_hw_cleanup(css); |
| 1417 | 1417 | ||
| 1418 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { | 1418 | for_each_set_bit(pipe, css->enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| 1419 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1419 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1420 | 1420 | ||
| 1421 | ipu3_css_pipeline_cleanup(css, pipe); | 1421 | imgu_css_pipeline_cleanup(css, pipe); |
| 1422 | 1422 | ||
| 1423 | spin_lock(&css_pipe->qlock); | 1423 | spin_lock(&css_pipe->qlock); |
| 1424 | for (q = 0; q < IPU3_CSS_QUEUES; q++) | 1424 | for (q = 0; q < IPU3_CSS_QUEUES; q++) |
| @@ -1434,10 +1434,10 @@ void ipu3_css_stop_streaming(struct ipu3_css *css) | |||
| 1434 | css->streaming = false; | 1434 | css->streaming = false; |
| 1435 | } | 1435 | } |
| 1436 | 1436 | ||
| 1437 | bool ipu3_css_pipe_queue_empty(struct ipu3_css *css, unsigned int pipe) | 1437 | bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe) |
| 1438 | { | 1438 | { |
| 1439 | int q; | 1439 | int q; |
| 1440 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1440 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1441 | 1441 | ||
| 1442 | spin_lock(&css_pipe->qlock); | 1442 | spin_lock(&css_pipe->qlock); |
| 1443 | for (q = 0; q < IPU3_CSS_QUEUES; q++) | 1443 | for (q = 0; q < IPU3_CSS_QUEUES; q++) |
| @@ -1447,44 +1447,44 @@ bool ipu3_css_pipe_queue_empty(struct ipu3_css *css, unsigned int pipe) | |||
| 1447 | return (q == IPU3_CSS_QUEUES); | 1447 | return (q == IPU3_CSS_QUEUES); |
| 1448 | } | 1448 | } |
| 1449 | 1449 | ||
| 1450 | bool ipu3_css_queue_empty(struct ipu3_css *css) | 1450 | bool imgu_css_queue_empty(struct imgu_css *css) |
| 1451 | { | 1451 | { |
| 1452 | unsigned int pipe; | 1452 | unsigned int pipe; |
| 1453 | bool ret = 0; | 1453 | bool ret = 0; |
| 1454 | 1454 | ||
| 1455 | for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) | 1455 | for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) |
| 1456 | ret &= ipu3_css_pipe_queue_empty(css, pipe); | 1456 | ret &= imgu_css_pipe_queue_empty(css, pipe); |
| 1457 | 1457 | ||
| 1458 | return ret; | 1458 | return ret; |
| 1459 | } | 1459 | } |
| 1460 | 1460 | ||
| 1461 | bool ipu3_css_is_streaming(struct ipu3_css *css) | 1461 | bool imgu_css_is_streaming(struct imgu_css *css) |
| 1462 | { | 1462 | { |
| 1463 | return css->streaming; | 1463 | return css->streaming; |
| 1464 | } | 1464 | } |
| 1465 | 1465 | ||
| 1466 | static int ipu3_css_map_init(struct ipu3_css *css, unsigned int pipe) | 1466 | static int imgu_css_map_init(struct imgu_css *css, unsigned int pipe) |
| 1467 | { | 1467 | { |
| 1468 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 1468 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 1469 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1469 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1470 | unsigned int p, q, i; | 1470 | unsigned int p, q, i; |
| 1471 | 1471 | ||
| 1472 | /* Allocate and map common structures with imgu hardware */ | 1472 | /* Allocate and map common structures with imgu hardware */ |
| 1473 | for (p = 0; p < IPU3_CSS_PIPE_ID_NUM; p++) | 1473 | for (p = 0; p < IPU3_CSS_PIPE_ID_NUM; p++) |
| 1474 | for (i = 0; i < IMGU_ABI_MAX_STAGES; i++) { | 1474 | for (i = 0; i < IMGU_ABI_MAX_STAGES; i++) { |
| 1475 | if (!ipu3_dmamap_alloc(imgu, | 1475 | if (!imgu_dmamap_alloc(imgu, |
| 1476 | &css_pipe-> | 1476 | &css_pipe-> |
| 1477 | xmem_sp_stage_ptrs[p][i], | 1477 | xmem_sp_stage_ptrs[p][i], |
| 1478 | sizeof(struct imgu_abi_sp_stage))) | 1478 | sizeof(struct imgu_abi_sp_stage))) |
| 1479 | return -ENOMEM; | 1479 | return -ENOMEM; |
| 1480 | if (!ipu3_dmamap_alloc(imgu, | 1480 | if (!imgu_dmamap_alloc(imgu, |
| 1481 | &css_pipe-> | 1481 | &css_pipe-> |
| 1482 | xmem_isp_stage_ptrs[p][i], | 1482 | xmem_isp_stage_ptrs[p][i], |
| 1483 | sizeof(struct imgu_abi_isp_stage))) | 1483 | sizeof(struct imgu_abi_isp_stage))) |
| 1484 | return -ENOMEM; | 1484 | return -ENOMEM; |
| 1485 | } | 1485 | } |
| 1486 | 1486 | ||
| 1487 | if (!ipu3_dmamap_alloc(imgu, &css_pipe->sp_ddr_ptrs, | 1487 | if (!imgu_dmamap_alloc(imgu, &css_pipe->sp_ddr_ptrs, |
| 1488 | ALIGN(sizeof(struct imgu_abi_ddr_address_map), | 1488 | ALIGN(sizeof(struct imgu_abi_ddr_address_map), |
| 1489 | IMGU_ABI_ISP_DDR_WORD_BYTES))) | 1489 | IMGU_ABI_ISP_DDR_WORD_BYTES))) |
| 1490 | return -ENOMEM; | 1490 | return -ENOMEM; |
| @@ -1493,58 +1493,58 @@ static int ipu3_css_map_init(struct ipu3_css *css, unsigned int pipe) | |||
| 1493 | unsigned int abi_buf_num = ARRAY_SIZE(css_pipe->abi_buffers[q]); | 1493 | unsigned int abi_buf_num = ARRAY_SIZE(css_pipe->abi_buffers[q]); |
| 1494 | 1494 | ||
| 1495 | for (i = 0; i < abi_buf_num; i++) | 1495 | for (i = 0; i < abi_buf_num; i++) |
| 1496 | if (!ipu3_dmamap_alloc(imgu, | 1496 | if (!imgu_dmamap_alloc(imgu, |
| 1497 | &css_pipe->abi_buffers[q][i], | 1497 | &css_pipe->abi_buffers[q][i], |
| 1498 | sizeof(struct imgu_abi_buffer))) | 1498 | sizeof(struct imgu_abi_buffer))) |
| 1499 | return -ENOMEM; | 1499 | return -ENOMEM; |
| 1500 | } | 1500 | } |
| 1501 | 1501 | ||
| 1502 | if (ipu3_css_binary_preallocate(css, pipe)) { | 1502 | if (imgu_css_binary_preallocate(css, pipe)) { |
| 1503 | ipu3_css_binary_cleanup(css, pipe); | 1503 | imgu_css_binary_cleanup(css, pipe); |
| 1504 | return -ENOMEM; | 1504 | return -ENOMEM; |
| 1505 | } | 1505 | } |
| 1506 | 1506 | ||
| 1507 | return 0; | 1507 | return 0; |
| 1508 | } | 1508 | } |
| 1509 | 1509 | ||
| 1510 | static void ipu3_css_pipe_cleanup(struct ipu3_css *css, unsigned int pipe) | 1510 | static void imgu_css_pipe_cleanup(struct imgu_css *css, unsigned int pipe) |
| 1511 | { | 1511 | { |
| 1512 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 1512 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 1513 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1513 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1514 | unsigned int p, q, i, abi_buf_num; | 1514 | unsigned int p, q, i, abi_buf_num; |
| 1515 | 1515 | ||
| 1516 | ipu3_css_binary_cleanup(css, pipe); | 1516 | imgu_css_binary_cleanup(css, pipe); |
| 1517 | 1517 | ||
| 1518 | for (q = 0; q < IPU3_CSS_QUEUES; q++) { | 1518 | for (q = 0; q < IPU3_CSS_QUEUES; q++) { |
| 1519 | abi_buf_num = ARRAY_SIZE(css_pipe->abi_buffers[q]); | 1519 | abi_buf_num = ARRAY_SIZE(css_pipe->abi_buffers[q]); |
| 1520 | for (i = 0; i < abi_buf_num; i++) | 1520 | for (i = 0; i < abi_buf_num; i++) |
| 1521 | ipu3_dmamap_free(imgu, &css_pipe->abi_buffers[q][i]); | 1521 | imgu_dmamap_free(imgu, &css_pipe->abi_buffers[q][i]); |
| 1522 | } | 1522 | } |
| 1523 | 1523 | ||
| 1524 | for (p = 0; p < IPU3_CSS_PIPE_ID_NUM; p++) | 1524 | for (p = 0; p < IPU3_CSS_PIPE_ID_NUM; p++) |
| 1525 | for (i = 0; i < IMGU_ABI_MAX_STAGES; i++) { | 1525 | for (i = 0; i < IMGU_ABI_MAX_STAGES; i++) { |
| 1526 | ipu3_dmamap_free(imgu, | 1526 | imgu_dmamap_free(imgu, |
| 1527 | &css_pipe->xmem_sp_stage_ptrs[p][i]); | 1527 | &css_pipe->xmem_sp_stage_ptrs[p][i]); |
| 1528 | ipu3_dmamap_free(imgu, | 1528 | imgu_dmamap_free(imgu, |
| 1529 | &css_pipe->xmem_isp_stage_ptrs[p][i]); | 1529 | &css_pipe->xmem_isp_stage_ptrs[p][i]); |
| 1530 | } | 1530 | } |
| 1531 | 1531 | ||
| 1532 | ipu3_dmamap_free(imgu, &css_pipe->sp_ddr_ptrs); | 1532 | imgu_dmamap_free(imgu, &css_pipe->sp_ddr_ptrs); |
| 1533 | } | 1533 | } |
| 1534 | 1534 | ||
| 1535 | void ipu3_css_cleanup(struct ipu3_css *css) | 1535 | void imgu_css_cleanup(struct imgu_css *css) |
| 1536 | { | 1536 | { |
| 1537 | struct imgu_device *imgu = dev_get_drvdata(css->dev); | 1537 | struct imgu_device *imgu = dev_get_drvdata(css->dev); |
| 1538 | unsigned int pipe; | 1538 | unsigned int pipe; |
| 1539 | 1539 | ||
| 1540 | ipu3_css_stop_streaming(css); | 1540 | imgu_css_stop_streaming(css); |
| 1541 | for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) | 1541 | for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) |
| 1542 | ipu3_css_pipe_cleanup(css, pipe); | 1542 | imgu_css_pipe_cleanup(css, pipe); |
| 1543 | ipu3_dmamap_free(imgu, &css->xmem_sp_group_ptrs); | 1543 | imgu_dmamap_free(imgu, &css->xmem_sp_group_ptrs); |
| 1544 | ipu3_css_fw_cleanup(css); | 1544 | imgu_css_fw_cleanup(css); |
| 1545 | } | 1545 | } |
| 1546 | 1546 | ||
| 1547 | int ipu3_css_init(struct device *dev, struct ipu3_css *css, | 1547 | int imgu_css_init(struct device *dev, struct imgu_css *css, |
| 1548 | void __iomem *base, int length) | 1548 | void __iomem *base, int length) |
| 1549 | { | 1549 | { |
| 1550 | struct imgu_device *imgu = dev_get_drvdata(dev); | 1550 | struct imgu_device *imgu = dev_get_drvdata(dev); |
| @@ -1556,35 +1556,35 @@ int ipu3_css_init(struct device *dev, struct ipu3_css *css, | |||
| 1556 | css->iomem_length = length; | 1556 | css->iomem_length = length; |
| 1557 | 1557 | ||
| 1558 | for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) { | 1558 | for (pipe = 0; pipe < IMGU_MAX_PIPE_NUM; pipe++) { |
| 1559 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1559 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1560 | 1560 | ||
| 1561 | css_pipe->vf_output_en = false; | 1561 | css_pipe->vf_output_en = false; |
| 1562 | spin_lock_init(&css_pipe->qlock); | 1562 | spin_lock_init(&css_pipe->qlock); |
| 1563 | css_pipe->bindex = IPU3_CSS_DEFAULT_BINARY; | 1563 | css_pipe->bindex = IPU3_CSS_DEFAULT_BINARY; |
| 1564 | css_pipe->pipe_id = IPU3_CSS_PIPE_ID_VIDEO; | 1564 | css_pipe->pipe_id = IPU3_CSS_PIPE_ID_VIDEO; |
| 1565 | for (q = 0; q < IPU3_CSS_QUEUES; q++) { | 1565 | for (q = 0; q < IPU3_CSS_QUEUES; q++) { |
| 1566 | r = ipu3_css_queue_init(&css_pipe->queue[q], NULL, 0); | 1566 | r = imgu_css_queue_init(&css_pipe->queue[q], NULL, 0); |
| 1567 | if (r) | 1567 | if (r) |
| 1568 | return r; | 1568 | return r; |
| 1569 | } | 1569 | } |
| 1570 | r = ipu3_css_map_init(css, pipe); | 1570 | r = imgu_css_map_init(css, pipe); |
| 1571 | if (r) { | 1571 | if (r) { |
| 1572 | ipu3_css_cleanup(css); | 1572 | imgu_css_cleanup(css); |
| 1573 | return r; | 1573 | return r; |
| 1574 | } | 1574 | } |
| 1575 | } | 1575 | } |
| 1576 | if (!ipu3_dmamap_alloc(imgu, &css->xmem_sp_group_ptrs, | 1576 | if (!imgu_dmamap_alloc(imgu, &css->xmem_sp_group_ptrs, |
| 1577 | sizeof(struct imgu_abi_sp_group))) | 1577 | sizeof(struct imgu_abi_sp_group))) |
| 1578 | return -ENOMEM; | 1578 | return -ENOMEM; |
| 1579 | 1579 | ||
| 1580 | r = ipu3_css_fw_init(css); | 1580 | r = imgu_css_fw_init(css); |
| 1581 | if (r) | 1581 | if (r) |
| 1582 | return r; | 1582 | return r; |
| 1583 | 1583 | ||
| 1584 | return 0; | 1584 | return 0; |
| 1585 | } | 1585 | } |
| 1586 | 1586 | ||
| 1587 | static u32 ipu3_css_adjust(u32 res, u32 align) | 1587 | static u32 imgu_css_adjust(u32 res, u32 align) |
| 1588 | { | 1588 | { |
| 1589 | u32 val = max_t(u32, IPU3_CSS_MIN_RES, res); | 1589 | u32 val = max_t(u32, IPU3_CSS_MIN_RES, res); |
| 1590 | 1590 | ||
| @@ -1592,9 +1592,9 @@ static u32 ipu3_css_adjust(u32 res, u32 align) | |||
| 1592 | } | 1592 | } |
| 1593 | 1593 | ||
| 1594 | /* Select a binary matching the required resolutions and formats */ | 1594 | /* Select a binary matching the required resolutions and formats */ |
| 1595 | static int ipu3_css_find_binary(struct ipu3_css *css, | 1595 | static int imgu_css_find_binary(struct imgu_css *css, |
| 1596 | unsigned int pipe, | 1596 | unsigned int pipe, |
| 1597 | struct ipu3_css_queue queue[IPU3_CSS_QUEUES], | 1597 | struct imgu_css_queue queue[IPU3_CSS_QUEUES], |
| 1598 | struct v4l2_rect rects[IPU3_CSS_RECTS]) | 1598 | struct v4l2_rect rects[IPU3_CSS_RECTS]) |
| 1599 | { | 1599 | { |
| 1600 | const int binary_nr = css->fwp->file_header.binary_nr; | 1600 | const int binary_nr = css->fwp->file_header.binary_nr; |
| @@ -1611,7 +1611,7 @@ static int ipu3_css_find_binary(struct ipu3_css *css, | |||
| 1611 | const char *name; | 1611 | const char *name; |
| 1612 | int i, j; | 1612 | int i, j; |
| 1613 | 1613 | ||
| 1614 | if (!ipu3_css_queue_enabled(&queue[IPU3_CSS_QUEUE_IN])) | 1614 | if (!imgu_css_queue_enabled(&queue[IPU3_CSS_QUEUE_IN])) |
| 1615 | return -EINVAL; | 1615 | return -EINVAL; |
| 1616 | 1616 | ||
| 1617 | /* Find out the strip size boundary */ | 1617 | /* Find out the strip size boundary */ |
| @@ -1659,7 +1659,7 @@ static int ipu3_css_find_binary(struct ipu3_css *css, | |||
| 1659 | in->height > bi->info.isp.sp.input.max_height) | 1659 | in->height > bi->info.isp.sp.input.max_height) |
| 1660 | continue; | 1660 | continue; |
| 1661 | 1661 | ||
| 1662 | if (ipu3_css_queue_enabled(&queue[IPU3_CSS_QUEUE_OUT])) { | 1662 | if (imgu_css_queue_enabled(&queue[IPU3_CSS_QUEUE_OUT])) { |
| 1663 | if (bi->info.isp.num_output_pins <= 0) | 1663 | if (bi->info.isp.num_output_pins <= 0) |
| 1664 | continue; | 1664 | continue; |
| 1665 | 1665 | ||
| @@ -1681,7 +1681,7 @@ static int ipu3_css_find_binary(struct ipu3_css *css, | |||
| 1681 | continue; | 1681 | continue; |
| 1682 | } | 1682 | } |
| 1683 | 1683 | ||
| 1684 | if (ipu3_css_queue_enabled(&queue[IPU3_CSS_QUEUE_VF])) { | 1684 | if (imgu_css_queue_enabled(&queue[IPU3_CSS_QUEUE_VF])) { |
| 1685 | if (bi->info.isp.num_output_pins <= 1) | 1685 | if (bi->info.isp.num_output_pins <= 1) |
| 1686 | continue; | 1686 | continue; |
| 1687 | 1687 | ||
| @@ -1716,7 +1716,7 @@ static int ipu3_css_find_binary(struct ipu3_css *css, | |||
| 1716 | * found binary number. May modify the given parameters if not exact match | 1716 | * found binary number. May modify the given parameters if not exact match |
| 1717 | * is found. | 1717 | * is found. |
| 1718 | */ | 1718 | */ |
| 1719 | int ipu3_css_fmt_try(struct ipu3_css *css, | 1719 | int imgu_css_fmt_try(struct imgu_css *css, |
| 1720 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], | 1720 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], |
| 1721 | struct v4l2_rect *rects[IPU3_CSS_RECTS], | 1721 | struct v4l2_rect *rects[IPU3_CSS_RECTS], |
| 1722 | unsigned int pipe) | 1722 | unsigned int pipe) |
| @@ -1744,14 +1744,14 @@ int ipu3_css_fmt_try(struct ipu3_css *css, | |||
| 1744 | struct v4l2_rect *const bds = &r[IPU3_CSS_RECT_BDS]; | 1744 | struct v4l2_rect *const bds = &r[IPU3_CSS_RECT_BDS]; |
| 1745 | struct v4l2_rect *const env = &r[IPU3_CSS_RECT_ENVELOPE]; | 1745 | struct v4l2_rect *const env = &r[IPU3_CSS_RECT_ENVELOPE]; |
| 1746 | struct v4l2_rect *const gdc = &r[IPU3_CSS_RECT_GDC]; | 1746 | struct v4l2_rect *const gdc = &r[IPU3_CSS_RECT_GDC]; |
| 1747 | struct ipu3_css_queue q[IPU3_CSS_QUEUES]; | 1747 | struct imgu_css_queue q[IPU3_CSS_QUEUES]; |
| 1748 | struct v4l2_pix_format_mplane *const in = | 1748 | struct v4l2_pix_format_mplane *const in = |
| 1749 | &q[IPU3_CSS_QUEUE_IN].fmt.mpix; | 1749 | &q[IPU3_CSS_QUEUE_IN].fmt.mpix; |
| 1750 | struct v4l2_pix_format_mplane *const out = | 1750 | struct v4l2_pix_format_mplane *const out = |
| 1751 | &q[IPU3_CSS_QUEUE_OUT].fmt.mpix; | 1751 | &q[IPU3_CSS_QUEUE_OUT].fmt.mpix; |
| 1752 | struct v4l2_pix_format_mplane *const vf = | 1752 | struct v4l2_pix_format_mplane *const vf = |
| 1753 | &q[IPU3_CSS_QUEUE_VF].fmt.mpix; | 1753 | &q[IPU3_CSS_QUEUE_VF].fmt.mpix; |
| 1754 | int i, s; | 1754 | int i, s, ret; |
| 1755 | 1755 | ||
| 1756 | /* Adjust all formats, get statistics buffer sizes and formats */ | 1756 | /* Adjust all formats, get statistics buffer sizes and formats */ |
| 1757 | for (i = 0; i < IPU3_CSS_QUEUES; i++) { | 1757 | for (i = 0; i < IPU3_CSS_QUEUES; i++) { |
| @@ -1762,7 +1762,7 @@ int ipu3_css_fmt_try(struct ipu3_css *css, | |||
| 1762 | else | 1762 | else |
| 1763 | dev_dbg(css->dev, "%s %s: (not set)\n", __func__, | 1763 | dev_dbg(css->dev, "%s %s: (not set)\n", __func__, |
| 1764 | qnames[i]); | 1764 | qnames[i]); |
| 1765 | if (ipu3_css_queue_init(&q[i], fmts[i], | 1765 | if (imgu_css_queue_init(&q[i], fmts[i], |
| 1766 | IPU3_CSS_QUEUE_TO_FLAGS(i))) { | 1766 | IPU3_CSS_QUEUE_TO_FLAGS(i))) { |
| 1767 | dev_notice(css->dev, "can not initialize queue %s\n", | 1767 | dev_notice(css->dev, "can not initialize queue %s\n", |
| 1768 | qnames[i]); | 1768 | qnames[i]); |
| @@ -1785,13 +1785,13 @@ int ipu3_css_fmt_try(struct ipu3_css *css, | |||
| 1785 | } | 1785 | } |
| 1786 | 1786 | ||
| 1787 | /* Always require one input and vf only if out is also enabled */ | 1787 | /* Always require one input and vf only if out is also enabled */ |
| 1788 | if (!ipu3_css_queue_enabled(&q[IPU3_CSS_QUEUE_IN]) || | 1788 | if (!imgu_css_queue_enabled(&q[IPU3_CSS_QUEUE_IN]) || |
| 1789 | !ipu3_css_queue_enabled(&q[IPU3_CSS_QUEUE_OUT])) { | 1789 | !imgu_css_queue_enabled(&q[IPU3_CSS_QUEUE_OUT])) { |
| 1790 | dev_warn(css->dev, "required queues are disabled\n"); | 1790 | dev_warn(css->dev, "required queues are disabled\n"); |
| 1791 | return -EINVAL; | 1791 | return -EINVAL; |
| 1792 | } | 1792 | } |
| 1793 | 1793 | ||
| 1794 | if (!ipu3_css_queue_enabled(&q[IPU3_CSS_QUEUE_OUT])) { | 1794 | if (!imgu_css_queue_enabled(&q[IPU3_CSS_QUEUE_OUT])) { |
| 1795 | out->width = in->width; | 1795 | out->width = in->width; |
| 1796 | out->height = in->height; | 1796 | out->height = in->height; |
| 1797 | } | 1797 | } |
| @@ -1808,30 +1808,30 @@ int ipu3_css_fmt_try(struct ipu3_css *css, | |||
| 1808 | gdc->height = out->height; | 1808 | gdc->height = out->height; |
| 1809 | } | 1809 | } |
| 1810 | 1810 | ||
| 1811 | in->width = ipu3_css_adjust(in->width, 1); | 1811 | in->width = imgu_css_adjust(in->width, 1); |
| 1812 | in->height = ipu3_css_adjust(in->height, 1); | 1812 | in->height = imgu_css_adjust(in->height, 1); |
| 1813 | eff->width = ipu3_css_adjust(eff->width, EFF_ALIGN_W); | 1813 | eff->width = imgu_css_adjust(eff->width, EFF_ALIGN_W); |
| 1814 | eff->height = ipu3_css_adjust(eff->height, 1); | 1814 | eff->height = imgu_css_adjust(eff->height, 1); |
| 1815 | bds->width = ipu3_css_adjust(bds->width, BDS_ALIGN_W); | 1815 | bds->width = imgu_css_adjust(bds->width, BDS_ALIGN_W); |
| 1816 | bds->height = ipu3_css_adjust(bds->height, 1); | 1816 | bds->height = imgu_css_adjust(bds->height, 1); |
| 1817 | gdc->width = ipu3_css_adjust(gdc->width, OUT_ALIGN_W); | 1817 | gdc->width = imgu_css_adjust(gdc->width, OUT_ALIGN_W); |
| 1818 | gdc->height = ipu3_css_adjust(gdc->height, OUT_ALIGN_H); | 1818 | gdc->height = imgu_css_adjust(gdc->height, OUT_ALIGN_H); |
| 1819 | out->width = ipu3_css_adjust(out->width, OUT_ALIGN_W); | 1819 | out->width = imgu_css_adjust(out->width, OUT_ALIGN_W); |
| 1820 | out->height = ipu3_css_adjust(out->height, OUT_ALIGN_H); | 1820 | out->height = imgu_css_adjust(out->height, OUT_ALIGN_H); |
| 1821 | vf->width = ipu3_css_adjust(vf->width, VF_ALIGN_W); | 1821 | vf->width = imgu_css_adjust(vf->width, VF_ALIGN_W); |
| 1822 | vf->height = ipu3_css_adjust(vf->height, 1); | 1822 | vf->height = imgu_css_adjust(vf->height, 1); |
| 1823 | 1823 | ||
| 1824 | s = (bds->width - gdc->width) / 2 - FILTER_SIZE; | 1824 | s = (bds->width - gdc->width) / 2 - FILTER_SIZE; |
| 1825 | env->width = s < MIN_ENVELOPE ? MIN_ENVELOPE : s; | 1825 | env->width = s < MIN_ENVELOPE ? MIN_ENVELOPE : s; |
| 1826 | s = (bds->height - gdc->height) / 2 - FILTER_SIZE; | 1826 | s = (bds->height - gdc->height) / 2 - FILTER_SIZE; |
| 1827 | env->height = s < MIN_ENVELOPE ? MIN_ENVELOPE : s; | 1827 | env->height = s < MIN_ENVELOPE ? MIN_ENVELOPE : s; |
| 1828 | 1828 | ||
| 1829 | css->pipes[pipe].bindex = | 1829 | ret = imgu_css_find_binary(css, pipe, q, r); |
| 1830 | ipu3_css_find_binary(css, pipe, q, r); | 1830 | if (ret < 0) { |
| 1831 | if (css->pipes[pipe].bindex < 0) { | ||
| 1832 | dev_err(css->dev, "failed to find suitable binary\n"); | 1831 | dev_err(css->dev, "failed to find suitable binary\n"); |
| 1833 | return -EINVAL; | 1832 | return -EINVAL; |
| 1834 | } | 1833 | } |
| 1834 | css->pipes[pipe].bindex = ret; | ||
| 1835 | 1835 | ||
| 1836 | dev_dbg(css->dev, "Binary index %d for pipe %d found.", | 1836 | dev_dbg(css->dev, "Binary index %d for pipe %d found.", |
| 1837 | css->pipes[pipe].bindex, pipe); | 1837 | css->pipes[pipe].bindex, pipe); |
| @@ -1839,7 +1839,7 @@ int ipu3_css_fmt_try(struct ipu3_css *css, | |||
| 1839 | /* Final adjustment and set back the queried formats */ | 1839 | /* Final adjustment and set back the queried formats */ |
| 1840 | for (i = 0; i < IPU3_CSS_QUEUES; i++) { | 1840 | for (i = 0; i < IPU3_CSS_QUEUES; i++) { |
| 1841 | if (fmts[i]) { | 1841 | if (fmts[i]) { |
| 1842 | if (ipu3_css_queue_init(&q[i], &q[i].fmt.mpix, | 1842 | if (imgu_css_queue_init(&q[i], &q[i].fmt.mpix, |
| 1843 | IPU3_CSS_QUEUE_TO_FLAGS(i))) { | 1843 | IPU3_CSS_QUEUE_TO_FLAGS(i))) { |
| 1844 | dev_err(css->dev, | 1844 | dev_err(css->dev, |
| 1845 | "final resolution adjustment failed\n"); | 1845 | "final resolution adjustment failed\n"); |
| @@ -1862,7 +1862,7 @@ int ipu3_css_fmt_try(struct ipu3_css *css, | |||
| 1862 | return 0; | 1862 | return 0; |
| 1863 | } | 1863 | } |
| 1864 | 1864 | ||
| 1865 | int ipu3_css_fmt_set(struct ipu3_css *css, | 1865 | int imgu_css_fmt_set(struct imgu_css *css, |
| 1866 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], | 1866 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], |
| 1867 | struct v4l2_rect *rects[IPU3_CSS_RECTS], | 1867 | struct v4l2_rect *rects[IPU3_CSS_RECTS], |
| 1868 | unsigned int pipe) | 1868 | unsigned int pipe) |
| @@ -1870,7 +1870,7 @@ int ipu3_css_fmt_set(struct ipu3_css *css, | |||
| 1870 | struct v4l2_rect rect_data[IPU3_CSS_RECTS]; | 1870 | struct v4l2_rect rect_data[IPU3_CSS_RECTS]; |
| 1871 | struct v4l2_rect *all_rects[IPU3_CSS_RECTS]; | 1871 | struct v4l2_rect *all_rects[IPU3_CSS_RECTS]; |
| 1872 | int i, r; | 1872 | int i, r; |
| 1873 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1873 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1874 | 1874 | ||
| 1875 | for (i = 0; i < IPU3_CSS_RECTS; i++) { | 1875 | for (i = 0; i < IPU3_CSS_RECTS; i++) { |
| 1876 | if (rects[i]) | 1876 | if (rects[i]) |
| @@ -1879,12 +1879,12 @@ int ipu3_css_fmt_set(struct ipu3_css *css, | |||
| 1879 | memset(&rect_data[i], 0, sizeof(rect_data[i])); | 1879 | memset(&rect_data[i], 0, sizeof(rect_data[i])); |
| 1880 | all_rects[i] = &rect_data[i]; | 1880 | all_rects[i] = &rect_data[i]; |
| 1881 | } | 1881 | } |
| 1882 | r = ipu3_css_fmt_try(css, fmts, all_rects, pipe); | 1882 | r = imgu_css_fmt_try(css, fmts, all_rects, pipe); |
| 1883 | if (r < 0) | 1883 | if (r < 0) |
| 1884 | return r; | 1884 | return r; |
| 1885 | 1885 | ||
| 1886 | for (i = 0; i < IPU3_CSS_QUEUES; i++) | 1886 | for (i = 0; i < IPU3_CSS_QUEUES; i++) |
| 1887 | if (ipu3_css_queue_init(&css_pipe->queue[i], fmts[i], | 1887 | if (imgu_css_queue_init(&css_pipe->queue[i], fmts[i], |
| 1888 | IPU3_CSS_QUEUE_TO_FLAGS(i))) | 1888 | IPU3_CSS_QUEUE_TO_FLAGS(i))) |
| 1889 | return -EINVAL; | 1889 | return -EINVAL; |
| 1890 | for (i = 0; i < IPU3_CSS_RECTS; i++) { | 1890 | for (i = 0; i < IPU3_CSS_RECTS; i++) { |
| @@ -1896,7 +1896,7 @@ int ipu3_css_fmt_set(struct ipu3_css *css, | |||
| 1896 | return 0; | 1896 | return 0; |
| 1897 | } | 1897 | } |
| 1898 | 1898 | ||
| 1899 | int ipu3_css_meta_fmt_set(struct v4l2_meta_format *fmt) | 1899 | int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt) |
| 1900 | { | 1900 | { |
| 1901 | switch (fmt->dataformat) { | 1901 | switch (fmt->dataformat) { |
| 1902 | case V4L2_META_FMT_IPU3_PARAMS: | 1902 | case V4L2_META_FMT_IPU3_PARAMS: |
| @@ -1913,27 +1913,27 @@ int ipu3_css_meta_fmt_set(struct v4l2_meta_format *fmt) | |||
| 1913 | } | 1913 | } |
| 1914 | 1914 | ||
| 1915 | /* | 1915 | /* |
| 1916 | * Queue given buffer to CSS. ipu3_css_buf_prepare() must have been first | 1916 | * Queue given buffer to CSS. imgu_css_buf_prepare() must have been first |
| 1917 | * called for the buffer. May be called from interrupt context. | 1917 | * called for the buffer. May be called from interrupt context. |
| 1918 | * Returns 0 on success, -EBUSY if the buffer queue is full, or some other | 1918 | * Returns 0 on success, -EBUSY if the buffer queue is full, or some other |
| 1919 | * code on error conditions. | 1919 | * code on error conditions. |
| 1920 | */ | 1920 | */ |
| 1921 | int ipu3_css_buf_queue(struct ipu3_css *css, unsigned int pipe, | 1921 | int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe, |
| 1922 | struct ipu3_css_buffer *b) | 1922 | struct imgu_css_buffer *b) |
| 1923 | { | 1923 | { |
| 1924 | struct imgu_abi_buffer *abi_buf; | 1924 | struct imgu_abi_buffer *abi_buf; |
| 1925 | struct imgu_addr_t *buf_addr; | 1925 | struct imgu_addr_t *buf_addr; |
| 1926 | u32 data; | 1926 | u32 data; |
| 1927 | int r; | 1927 | int r; |
| 1928 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 1928 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 1929 | 1929 | ||
| 1930 | if (!css->streaming) | 1930 | if (!css->streaming) |
| 1931 | return -EPROTO; /* CSS or buffer in wrong state */ | 1931 | return -EPROTO; /* CSS or buffer in wrong state */ |
| 1932 | 1932 | ||
| 1933 | if (b->queue >= IPU3_CSS_QUEUES || !ipu3_css_queues[b->queue].qid) | 1933 | if (b->queue >= IPU3_CSS_QUEUES || !imgu_css_queues[b->queue].qid) |
| 1934 | return -EINVAL; | 1934 | return -EINVAL; |
| 1935 | 1935 | ||
| 1936 | b->queue_pos = ipu3_css_queue_pos(css, ipu3_css_queues[b->queue].qid, | 1936 | b->queue_pos = imgu_css_queue_pos(css, imgu_css_queues[b->queue].qid, |
| 1937 | pipe); | 1937 | pipe); |
| 1938 | 1938 | ||
| 1939 | if (b->queue_pos >= ARRAY_SIZE(css->pipes[pipe].abi_buffers[b->queue])) | 1939 | if (b->queue_pos >= ARRAY_SIZE(css->pipes[pipe].abi_buffers[b->queue])) |
| @@ -1943,7 +1943,7 @@ int ipu3_css_buf_queue(struct ipu3_css *css, unsigned int pipe, | |||
| 1943 | /* Fill struct abi_buffer for firmware */ | 1943 | /* Fill struct abi_buffer for firmware */ |
| 1944 | memset(abi_buf, 0, sizeof(*abi_buf)); | 1944 | memset(abi_buf, 0, sizeof(*abi_buf)); |
| 1945 | 1945 | ||
| 1946 | buf_addr = (void *)abi_buf + ipu3_css_queues[b->queue].ptr_ofs; | 1946 | buf_addr = (void *)abi_buf + imgu_css_queues[b->queue].ptr_ofs; |
| 1947 | *(imgu_addr_t *)buf_addr = b->daddr; | 1947 | *(imgu_addr_t *)buf_addr = b->daddr; |
| 1948 | 1948 | ||
| 1949 | if (b->queue == IPU3_CSS_QUEUE_STAT_3A) | 1949 | if (b->queue == IPU3_CSS_QUEUE_STAT_3A) |
| @@ -1963,14 +1963,14 @@ int ipu3_css_buf_queue(struct ipu3_css *css, unsigned int pipe, | |||
| 1963 | b->state = IPU3_CSS_BUFFER_QUEUED; | 1963 | b->state = IPU3_CSS_BUFFER_QUEUED; |
| 1964 | 1964 | ||
| 1965 | data = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].daddr; | 1965 | data = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].daddr; |
| 1966 | r = ipu3_css_queue_data(css, ipu3_css_queues[b->queue].qid, | 1966 | r = imgu_css_queue_data(css, imgu_css_queues[b->queue].qid, |
| 1967 | pipe, data); | 1967 | pipe, data); |
| 1968 | if (r < 0) | 1968 | if (r < 0) |
| 1969 | goto queueing_failed; | 1969 | goto queueing_failed; |
| 1970 | 1970 | ||
| 1971 | data = IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe, | 1971 | data = IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe, |
| 1972 | ipu3_css_queues[b->queue].qid); | 1972 | imgu_css_queues[b->queue].qid); |
| 1973 | r = ipu3_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, data); | 1973 | r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, data); |
| 1974 | if (r < 0) | 1974 | if (r < 0) |
| 1975 | goto queueing_failed; | 1975 | goto queueing_failed; |
| 1976 | 1976 | ||
| @@ -1992,7 +1992,7 @@ queueing_failed: | |||
| 1992 | * should be called again, or -EBUSY which means that there are no more | 1992 | * should be called again, or -EBUSY which means that there are no more |
| 1993 | * buffers available. May be called from interrupt context. | 1993 | * buffers available. May be called from interrupt context. |
| 1994 | */ | 1994 | */ |
| 1995 | struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css) | 1995 | struct imgu_css_buffer *imgu_css_buf_dequeue(struct imgu_css *css) |
| 1996 | { | 1996 | { |
| 1997 | static const unsigned char evtype_to_queue[] = { | 1997 | static const unsigned char evtype_to_queue[] = { |
| 1998 | [IMGU_ABI_EVTTYPE_INPUT_FRAME_DONE] = IPU3_CSS_QUEUE_IN, | 1998 | [IMGU_ABI_EVTTYPE_INPUT_FRAME_DONE] = IPU3_CSS_QUEUE_IN, |
| @@ -2000,15 +2000,15 @@ struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css) | |||
| 2000 | [IMGU_ABI_EVTTYPE_VF_OUT_FRAME_DONE] = IPU3_CSS_QUEUE_VF, | 2000 | [IMGU_ABI_EVTTYPE_VF_OUT_FRAME_DONE] = IPU3_CSS_QUEUE_VF, |
| 2001 | [IMGU_ABI_EVTTYPE_3A_STATS_DONE] = IPU3_CSS_QUEUE_STAT_3A, | 2001 | [IMGU_ABI_EVTTYPE_3A_STATS_DONE] = IPU3_CSS_QUEUE_STAT_3A, |
| 2002 | }; | 2002 | }; |
| 2003 | struct ipu3_css_buffer *b = ERR_PTR(-EAGAIN); | 2003 | struct imgu_css_buffer *b = ERR_PTR(-EAGAIN); |
| 2004 | u32 event, daddr; | 2004 | u32 event, daddr; |
| 2005 | int evtype, pipe, pipeid, queue, qid, r; | 2005 | int evtype, pipe, pipeid, queue, qid, r; |
| 2006 | struct ipu3_css_pipe *css_pipe; | 2006 | struct imgu_css_pipe *css_pipe; |
| 2007 | 2007 | ||
| 2008 | if (!css->streaming) | 2008 | if (!css->streaming) |
| 2009 | return ERR_PTR(-EPROTO); | 2009 | return ERR_PTR(-EPROTO); |
| 2010 | 2010 | ||
| 2011 | r = ipu3_css_dequeue_data(css, IMGU_ABI_QUEUE_EVENT_ID, &event); | 2011 | r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_EVENT_ID, &event); |
| 2012 | if (r < 0) | 2012 | if (r < 0) |
| 2013 | return ERR_PTR(r); | 2013 | return ERR_PTR(r); |
| 2014 | 2014 | ||
| @@ -2025,7 +2025,7 @@ struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css) | |||
| 2025 | pipeid = (event & IMGU_ABI_EVTTYPE_PIPEID_MASK) >> | 2025 | pipeid = (event & IMGU_ABI_EVTTYPE_PIPEID_MASK) >> |
| 2026 | IMGU_ABI_EVTTYPE_PIPEID_SHIFT; | 2026 | IMGU_ABI_EVTTYPE_PIPEID_SHIFT; |
| 2027 | queue = evtype_to_queue[evtype]; | 2027 | queue = evtype_to_queue[evtype]; |
| 2028 | qid = ipu3_css_queues[queue].qid; | 2028 | qid = imgu_css_queues[queue].qid; |
| 2029 | 2029 | ||
| 2030 | if (pipe >= IMGU_MAX_PIPE_NUM) { | 2030 | if (pipe >= IMGU_MAX_PIPE_NUM) { |
| 2031 | dev_err(css->dev, "Invalid pipe: %i\n", pipe); | 2031 | dev_err(css->dev, "Invalid pipe: %i\n", pipe); |
| @@ -2041,14 +2041,14 @@ struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css) | |||
| 2041 | "event: buffer done 0x%x queue %i pipe %i pipeid %i\n", | 2041 | "event: buffer done 0x%x queue %i pipe %i pipeid %i\n", |
| 2042 | event, queue, pipe, pipeid); | 2042 | event, queue, pipe, pipeid); |
| 2043 | 2043 | ||
| 2044 | r = ipu3_css_dequeue_data(css, qid, &daddr); | 2044 | r = imgu_css_dequeue_data(css, qid, &daddr); |
| 2045 | if (r < 0) { | 2045 | if (r < 0) { |
| 2046 | dev_err(css->dev, "failed to dequeue buffer\n"); | 2046 | dev_err(css->dev, "failed to dequeue buffer\n"); |
| 2047 | /* Force real error, not -EBUSY */ | 2047 | /* Force real error, not -EBUSY */ |
| 2048 | return ERR_PTR(-EIO); | 2048 | return ERR_PTR(-EIO); |
| 2049 | } | 2049 | } |
| 2050 | 2050 | ||
| 2051 | r = ipu3_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, | 2051 | r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, |
| 2052 | IMGU_ABI_EVENT_BUFFER_DEQUEUED(qid)); | 2052 | IMGU_ABI_EVENT_BUFFER_DEQUEUED(qid)); |
| 2053 | if (r < 0) { | 2053 | if (r < 0) { |
| 2054 | dev_err(css->dev, "failed to queue event\n"); | 2054 | dev_err(css->dev, "failed to queue event\n"); |
| @@ -2062,7 +2062,7 @@ struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css) | |||
| 2062 | return ERR_PTR(-EIO); | 2062 | return ERR_PTR(-EIO); |
| 2063 | } | 2063 | } |
| 2064 | b = list_first_entry(&css_pipe->queue[queue].bufs, | 2064 | b = list_first_entry(&css_pipe->queue[queue].bufs, |
| 2065 | struct ipu3_css_buffer, list); | 2065 | struct imgu_css_buffer, list); |
| 2066 | if (queue != b->queue || | 2066 | if (queue != b->queue || |
| 2067 | daddr != css_pipe->abi_buffers | 2067 | daddr != css_pipe->abi_buffers |
| 2068 | [b->queue][b->queue_pos].daddr) { | 2068 | [b->queue][b->queue_pos].daddr) { |
| @@ -2090,7 +2090,7 @@ struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css) | |||
| 2090 | event, pipe); | 2090 | event, pipe); |
| 2091 | break; | 2091 | break; |
| 2092 | case IMGU_ABI_EVTTYPE_TIMER: | 2092 | case IMGU_ABI_EVTTYPE_TIMER: |
| 2093 | r = ipu3_css_dequeue_data(css, IMGU_ABI_QUEUE_EVENT_ID, &event); | 2093 | r = imgu_css_dequeue_data(css, IMGU_ABI_QUEUE_EVENT_ID, &event); |
| 2094 | if (r < 0) | 2094 | if (r < 0) |
| 2095 | return ERR_PTR(r); | 2095 | return ERR_PTR(r); |
| 2096 | 2096 | ||
| @@ -2128,11 +2128,11 @@ struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css) | |||
| 2128 | * Return index to css->parameter_set_info which has the newly created | 2128 | * Return index to css->parameter_set_info which has the newly created |
| 2129 | * parameters or negative value on error. | 2129 | * parameters or negative value on error. |
| 2130 | */ | 2130 | */ |
| 2131 | int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | 2131 | int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe, |
| 2132 | struct ipu3_uapi_params *set_params) | 2132 | struct ipu3_uapi_params *set_params) |
| 2133 | { | 2133 | { |
| 2134 | static const unsigned int queue_id = IMGU_ABI_QUEUE_A_ID; | 2134 | static const unsigned int queue_id = IMGU_ABI_QUEUE_A_ID; |
| 2135 | struct ipu3_css_pipe *css_pipe = &css->pipes[pipe]; | 2135 | struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; |
| 2136 | const int stage = 0; | 2136 | const int stage = 0; |
| 2137 | const struct imgu_fw_info *bi; | 2137 | const struct imgu_fw_info *bi; |
| 2138 | int obgrid_size; | 2138 | int obgrid_size; |
| @@ -2144,7 +2144,7 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2144 | struct imgu_abi_acc_param *acc = NULL; | 2144 | struct imgu_abi_acc_param *acc = NULL; |
| 2145 | struct imgu_abi_gdc_warp_param *gdc = NULL; | 2145 | struct imgu_abi_gdc_warp_param *gdc = NULL; |
| 2146 | struct ipu3_uapi_obgrid_param *obgrid = NULL; | 2146 | struct ipu3_uapi_obgrid_param *obgrid = NULL; |
| 2147 | const struct ipu3_css_map *map; | 2147 | const struct imgu_css_map *map; |
| 2148 | void *vmem0 = NULL; | 2148 | void *vmem0 = NULL; |
| 2149 | void *dmem0 = NULL; | 2149 | void *dmem0 = NULL; |
| 2150 | 2150 | ||
| @@ -2157,7 +2157,7 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2157 | dev_dbg(css->dev, "%s for pipe %d", __func__, pipe); | 2157 | dev_dbg(css->dev, "%s for pipe %d", __func__, pipe); |
| 2158 | 2158 | ||
| 2159 | bi = &css->fwp->binary_header[css_pipe->bindex]; | 2159 | bi = &css->fwp->binary_header[css_pipe->bindex]; |
| 2160 | obgrid_size = ipu3_css_fw_obgrid_size(bi); | 2160 | obgrid_size = imgu_css_fw_obgrid_size(bi); |
| 2161 | stripes = bi->info.isp.sp.iterator.num_stripes ? : 1; | 2161 | stripes = bi->info.isp.sp.iterator.num_stripes ? : 1; |
| 2162 | 2162 | ||
| 2163 | /* | 2163 | /* |
| @@ -2165,45 +2165,45 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2165 | * parameters from previous buffers will be overwritten. Fix the driver | 2165 | * parameters from previous buffers will be overwritten. Fix the driver |
| 2166 | * not to allow this. | 2166 | * not to allow this. |
| 2167 | */ | 2167 | */ |
| 2168 | ipu3_css_pool_get(&css_pipe->pool.parameter_set_info); | 2168 | imgu_css_pool_get(&css_pipe->pool.parameter_set_info); |
| 2169 | param_set = ipu3_css_pool_last(&css_pipe->pool.parameter_set_info, | 2169 | param_set = imgu_css_pool_last(&css_pipe->pool.parameter_set_info, |
| 2170 | 0)->vaddr; | 2170 | 0)->vaddr; |
| 2171 | 2171 | ||
| 2172 | /* Get a new acc only if new parameters given, or none yet */ | 2172 | /* Get a new acc only if new parameters given, or none yet */ |
| 2173 | map = ipu3_css_pool_last(&css_pipe->pool.acc, 0); | 2173 | map = imgu_css_pool_last(&css_pipe->pool.acc, 0); |
| 2174 | if (set_params || !map->vaddr) { | 2174 | if (set_params || !map->vaddr) { |
| 2175 | ipu3_css_pool_get(&css_pipe->pool.acc); | 2175 | imgu_css_pool_get(&css_pipe->pool.acc); |
| 2176 | map = ipu3_css_pool_last(&css_pipe->pool.acc, 0); | 2176 | map = imgu_css_pool_last(&css_pipe->pool.acc, 0); |
| 2177 | acc = map->vaddr; | 2177 | acc = map->vaddr; |
| 2178 | } | 2178 | } |
| 2179 | 2179 | ||
| 2180 | /* Get new VMEM0 only if needed, or none yet */ | 2180 | /* Get new VMEM0 only if needed, or none yet */ |
| 2181 | m = IMGU_ABI_MEM_ISP_VMEM0; | 2181 | m = IMGU_ABI_MEM_ISP_VMEM0; |
| 2182 | map = ipu3_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); | 2182 | map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); |
| 2183 | if (!map->vaddr || (set_params && (set_params->use.lin_vmem_params || | 2183 | if (!map->vaddr || (set_params && (set_params->use.lin_vmem_params || |
| 2184 | set_params->use.tnr3_vmem_params || | 2184 | set_params->use.tnr3_vmem_params || |
| 2185 | set_params->use.xnr3_vmem_params))) { | 2185 | set_params->use.xnr3_vmem_params))) { |
| 2186 | ipu3_css_pool_get(&css_pipe->pool.binary_params_p[m]); | 2186 | imgu_css_pool_get(&css_pipe->pool.binary_params_p[m]); |
| 2187 | map = ipu3_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); | 2187 | map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); |
| 2188 | vmem0 = map->vaddr; | 2188 | vmem0 = map->vaddr; |
| 2189 | } | 2189 | } |
| 2190 | 2190 | ||
| 2191 | /* Get new DMEM0 only if needed, or none yet */ | 2191 | /* Get new DMEM0 only if needed, or none yet */ |
| 2192 | m = IMGU_ABI_MEM_ISP_DMEM0; | 2192 | m = IMGU_ABI_MEM_ISP_DMEM0; |
| 2193 | map = ipu3_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); | 2193 | map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); |
| 2194 | if (!map->vaddr || (set_params && (set_params->use.tnr3_dmem_params || | 2194 | if (!map->vaddr || (set_params && (set_params->use.tnr3_dmem_params || |
| 2195 | set_params->use.xnr3_dmem_params))) { | 2195 | set_params->use.xnr3_dmem_params))) { |
| 2196 | ipu3_css_pool_get(&css_pipe->pool.binary_params_p[m]); | 2196 | imgu_css_pool_get(&css_pipe->pool.binary_params_p[m]); |
| 2197 | map = ipu3_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); | 2197 | map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); |
| 2198 | dmem0 = map->vaddr; | 2198 | dmem0 = map->vaddr; |
| 2199 | } | 2199 | } |
| 2200 | 2200 | ||
| 2201 | /* Configure acc parameter cluster */ | 2201 | /* Configure acc parameter cluster */ |
| 2202 | if (acc) { | 2202 | if (acc) { |
| 2203 | /* get acc_old */ | 2203 | /* get acc_old */ |
| 2204 | map = ipu3_css_pool_last(&css_pipe->pool.acc, 1); | 2204 | map = imgu_css_pool_last(&css_pipe->pool.acc, 1); |
| 2205 | /* user acc */ | 2205 | /* user acc */ |
| 2206 | r = ipu3_css_cfg_acc(css, pipe, use, acc, map->vaddr, | 2206 | r = imgu_css_cfg_acc(css, pipe, use, acc, map->vaddr, |
| 2207 | set_params ? &set_params->acc_param : NULL); | 2207 | set_params ? &set_params->acc_param : NULL); |
| 2208 | if (r < 0) | 2208 | if (r < 0) |
| 2209 | goto fail; | 2209 | goto fail; |
| @@ -2212,8 +2212,8 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2212 | /* Configure late binding parameters */ | 2212 | /* Configure late binding parameters */ |
| 2213 | if (vmem0) { | 2213 | if (vmem0) { |
| 2214 | m = IMGU_ABI_MEM_ISP_VMEM0; | 2214 | m = IMGU_ABI_MEM_ISP_VMEM0; |
| 2215 | map = ipu3_css_pool_last(&css_pipe->pool.binary_params_p[m], 1); | 2215 | map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 1); |
| 2216 | r = ipu3_css_cfg_vmem0(css, pipe, use, vmem0, | 2216 | r = imgu_css_cfg_vmem0(css, pipe, use, vmem0, |
| 2217 | map->vaddr, set_params); | 2217 | map->vaddr, set_params); |
| 2218 | if (r < 0) | 2218 | if (r < 0) |
| 2219 | goto fail; | 2219 | goto fail; |
| @@ -2221,8 +2221,8 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2221 | 2221 | ||
| 2222 | if (dmem0) { | 2222 | if (dmem0) { |
| 2223 | m = IMGU_ABI_MEM_ISP_DMEM0; | 2223 | m = IMGU_ABI_MEM_ISP_DMEM0; |
| 2224 | map = ipu3_css_pool_last(&css_pipe->pool.binary_params_p[m], 1); | 2224 | map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 1); |
| 2225 | r = ipu3_css_cfg_dmem0(css, pipe, use, dmem0, | 2225 | r = imgu_css_cfg_dmem0(css, pipe, use, dmem0, |
| 2226 | map->vaddr, set_params); | 2226 | map->vaddr, set_params); |
| 2227 | if (r < 0) | 2227 | if (r < 0) |
| 2228 | goto fail; | 2228 | goto fail; |
| @@ -2234,12 +2234,12 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2234 | unsigned int g = IPU3_CSS_RECT_GDC; | 2234 | unsigned int g = IPU3_CSS_RECT_GDC; |
| 2235 | unsigned int e = IPU3_CSS_RECT_ENVELOPE; | 2235 | unsigned int e = IPU3_CSS_RECT_ENVELOPE; |
| 2236 | 2236 | ||
| 2237 | map = ipu3_css_pool_last(&css_pipe->pool.gdc, 0); | 2237 | map = imgu_css_pool_last(&css_pipe->pool.gdc, 0); |
| 2238 | if (!map->vaddr) { | 2238 | if (!map->vaddr) { |
| 2239 | ipu3_css_pool_get(&css_pipe->pool.gdc); | 2239 | imgu_css_pool_get(&css_pipe->pool.gdc); |
| 2240 | map = ipu3_css_pool_last(&css_pipe->pool.gdc, 0); | 2240 | map = imgu_css_pool_last(&css_pipe->pool.gdc, 0); |
| 2241 | gdc = map->vaddr; | 2241 | gdc = map->vaddr; |
| 2242 | ipu3_css_cfg_gdc_table(map->vaddr, | 2242 | imgu_css_cfg_gdc_table(map->vaddr, |
| 2243 | css_pipe->aux_frames[a].bytesperline / | 2243 | css_pipe->aux_frames[a].bytesperline / |
| 2244 | css_pipe->aux_frames[a].bytesperpixel, | 2244 | css_pipe->aux_frames[a].bytesperpixel, |
| 2245 | css_pipe->aux_frames[a].height, | 2245 | css_pipe->aux_frames[a].height, |
| @@ -2252,10 +2252,10 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2252 | } | 2252 | } |
| 2253 | 2253 | ||
| 2254 | /* Get a new obgrid only if a new obgrid is given, or none yet */ | 2254 | /* Get a new obgrid only if a new obgrid is given, or none yet */ |
| 2255 | map = ipu3_css_pool_last(&css_pipe->pool.obgrid, 0); | 2255 | map = imgu_css_pool_last(&css_pipe->pool.obgrid, 0); |
| 2256 | if (!map->vaddr || (set_params && set_params->use.obgrid_param)) { | 2256 | if (!map->vaddr || (set_params && set_params->use.obgrid_param)) { |
| 2257 | ipu3_css_pool_get(&css_pipe->pool.obgrid); | 2257 | imgu_css_pool_get(&css_pipe->pool.obgrid); |
| 2258 | map = ipu3_css_pool_last(&css_pipe->pool.obgrid, 0); | 2258 | map = imgu_css_pool_last(&css_pipe->pool.obgrid, 0); |
| 2259 | obgrid = map->vaddr; | 2259 | obgrid = map->vaddr; |
| 2260 | 2260 | ||
| 2261 | /* Configure optical black level grid (obgrid) */ | 2261 | /* Configure optical black level grid (obgrid) */ |
| @@ -2269,30 +2269,30 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2269 | /* Configure parameter set info, queued to `queue_id' */ | 2269 | /* Configure parameter set info, queued to `queue_id' */ |
| 2270 | 2270 | ||
| 2271 | memset(param_set, 0, sizeof(*param_set)); | 2271 | memset(param_set, 0, sizeof(*param_set)); |
| 2272 | map = ipu3_css_pool_last(&css_pipe->pool.acc, 0); | 2272 | map = imgu_css_pool_last(&css_pipe->pool.acc, 0); |
| 2273 | param_set->mem_map.acc_cluster_params_for_sp = map->daddr; | 2273 | param_set->mem_map.acc_cluster_params_for_sp = map->daddr; |
| 2274 | 2274 | ||
| 2275 | map = ipu3_css_pool_last(&css_pipe->pool.gdc, 0); | 2275 | map = imgu_css_pool_last(&css_pipe->pool.gdc, 0); |
| 2276 | param_set->mem_map.dvs_6axis_params_y = map->daddr; | 2276 | param_set->mem_map.dvs_6axis_params_y = map->daddr; |
| 2277 | 2277 | ||
| 2278 | for (i = 0; i < stripes; i++) { | 2278 | for (i = 0; i < stripes; i++) { |
| 2279 | map = ipu3_css_pool_last(&css_pipe->pool.obgrid, 0); | 2279 | map = imgu_css_pool_last(&css_pipe->pool.obgrid, 0); |
| 2280 | param_set->mem_map.obgrid_tbl[i] = | 2280 | param_set->mem_map.obgrid_tbl[i] = |
| 2281 | map->daddr + (obgrid_size / stripes) * i; | 2281 | map->daddr + (obgrid_size / stripes) * i; |
| 2282 | } | 2282 | } |
| 2283 | 2283 | ||
| 2284 | for (m = 0; m < IMGU_ABI_NUM_MEMORIES; m++) { | 2284 | for (m = 0; m < IMGU_ABI_NUM_MEMORIES; m++) { |
| 2285 | map = ipu3_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); | 2285 | map = imgu_css_pool_last(&css_pipe->pool.binary_params_p[m], 0); |
| 2286 | param_set->mem_map.isp_mem_param[stage][m] = map->daddr; | 2286 | param_set->mem_map.isp_mem_param[stage][m] = map->daddr; |
| 2287 | } | 2287 | } |
| 2288 | 2288 | ||
| 2289 | /* Then queue the new parameter buffer */ | 2289 | /* Then queue the new parameter buffer */ |
| 2290 | map = ipu3_css_pool_last(&css_pipe->pool.parameter_set_info, 0); | 2290 | map = imgu_css_pool_last(&css_pipe->pool.parameter_set_info, 0); |
| 2291 | r = ipu3_css_queue_data(css, queue_id, pipe, map->daddr); | 2291 | r = imgu_css_queue_data(css, queue_id, pipe, map->daddr); |
| 2292 | if (r < 0) | 2292 | if (r < 0) |
| 2293 | goto fail; | 2293 | goto fail; |
| 2294 | 2294 | ||
| 2295 | r = ipu3_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, | 2295 | r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, |
| 2296 | IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe, | 2296 | IMGU_ABI_EVENT_BUFFER_ENQUEUED(pipe, |
| 2297 | queue_id)); | 2297 | queue_id)); |
| 2298 | if (r < 0) | 2298 | if (r < 0) |
| @@ -2303,12 +2303,12 @@ int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | |||
| 2303 | do { | 2303 | do { |
| 2304 | u32 daddr; | 2304 | u32 daddr; |
| 2305 | 2305 | ||
| 2306 | r = ipu3_css_dequeue_data(css, queue_id, &daddr); | 2306 | r = imgu_css_dequeue_data(css, queue_id, &daddr); |
| 2307 | if (r == -EBUSY) | 2307 | if (r == -EBUSY) |
| 2308 | break; | 2308 | break; |
| 2309 | if (r) | 2309 | if (r) |
| 2310 | goto fail_no_put; | 2310 | goto fail_no_put; |
| 2311 | r = ipu3_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, | 2311 | r = imgu_css_queue_data(css, IMGU_ABI_QUEUE_EVENT_ID, pipe, |
| 2312 | IMGU_ABI_EVENT_BUFFER_DEQUEUED | 2312 | IMGU_ABI_EVENT_BUFFER_DEQUEUED |
| 2313 | (queue_id)); | 2313 | (queue_id)); |
| 2314 | if (r < 0) { | 2314 | if (r < 0) { |
| @@ -2326,19 +2326,19 @@ fail: | |||
| 2326 | * parameters again later. | 2326 | * parameters again later. |
| 2327 | */ | 2327 | */ |
| 2328 | 2328 | ||
| 2329 | ipu3_css_pool_put(&css_pipe->pool.parameter_set_info); | 2329 | imgu_css_pool_put(&css_pipe->pool.parameter_set_info); |
| 2330 | if (acc) | 2330 | if (acc) |
| 2331 | ipu3_css_pool_put(&css_pipe->pool.acc); | 2331 | imgu_css_pool_put(&css_pipe->pool.acc); |
| 2332 | if (gdc) | 2332 | if (gdc) |
| 2333 | ipu3_css_pool_put(&css_pipe->pool.gdc); | 2333 | imgu_css_pool_put(&css_pipe->pool.gdc); |
| 2334 | if (obgrid) | 2334 | if (obgrid) |
| 2335 | ipu3_css_pool_put(&css_pipe->pool.obgrid); | 2335 | imgu_css_pool_put(&css_pipe->pool.obgrid); |
| 2336 | if (vmem0) | 2336 | if (vmem0) |
| 2337 | ipu3_css_pool_put( | 2337 | imgu_css_pool_put( |
| 2338 | &css_pipe->pool.binary_params_p | 2338 | &css_pipe->pool.binary_params_p |
| 2339 | [IMGU_ABI_MEM_ISP_VMEM0]); | 2339 | [IMGU_ABI_MEM_ISP_VMEM0]); |
| 2340 | if (dmem0) | 2340 | if (dmem0) |
| 2341 | ipu3_css_pool_put( | 2341 | imgu_css_pool_put( |
| 2342 | &css_pipe->pool.binary_params_p | 2342 | &css_pipe->pool.binary_params_p |
| 2343 | [IMGU_ABI_MEM_ISP_DMEM0]); | 2343 | [IMGU_ABI_MEM_ISP_DMEM0]); |
| 2344 | 2344 | ||
| @@ -2346,7 +2346,7 @@ fail_no_put: | |||
| 2346 | return r; | 2346 | return r; |
| 2347 | } | 2347 | } |
| 2348 | 2348 | ||
| 2349 | int ipu3_css_irq_ack(struct ipu3_css *css) | 2349 | int imgu_css_irq_ack(struct imgu_css *css) |
| 2350 | { | 2350 | { |
| 2351 | static const int NUM_SWIRQS = 3; | 2351 | static const int NUM_SWIRQS = 3; |
| 2352 | struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[0]]; | 2352 | struct imgu_fw_info *bi = &css->fwp->binary_header[css->fw_sp[0]]; |
diff --git a/drivers/staging/media/ipu3/ipu3-css.h b/drivers/staging/media/ipu3/ipu3-css.h index e88d60f1a0c3..6b8bab27ab1f 100644 --- a/drivers/staging/media/ipu3/ipu3-css.h +++ b/drivers/staging/media/ipu3/ipu3-css.h | |||
| @@ -43,7 +43,7 @@ | |||
| 43 | * The pipe id type, distinguishes the kind of pipes that | 43 | * The pipe id type, distinguishes the kind of pipes that |
| 44 | * can be run in parallel. | 44 | * can be run in parallel. |
| 45 | */ | 45 | */ |
| 46 | enum ipu3_css_pipe_id { | 46 | enum imgu_css_pipe_id { |
| 47 | IPU3_CSS_PIPE_ID_PREVIEW, | 47 | IPU3_CSS_PIPE_ID_PREVIEW, |
| 48 | IPU3_CSS_PIPE_ID_COPY, | 48 | IPU3_CSS_PIPE_ID_COPY, |
| 49 | IPU3_CSS_PIPE_ID_VIDEO, | 49 | IPU3_CSS_PIPE_ID_VIDEO, |
| @@ -53,29 +53,29 @@ enum ipu3_css_pipe_id { | |||
| 53 | IPU3_CSS_PIPE_ID_NUM | 53 | IPU3_CSS_PIPE_ID_NUM |
| 54 | }; | 54 | }; |
| 55 | 55 | ||
| 56 | struct ipu3_css_resolution { | 56 | struct imgu_css_resolution { |
| 57 | u32 w; | 57 | u32 w; |
| 58 | u32 h; | 58 | u32 h; |
| 59 | }; | 59 | }; |
| 60 | 60 | ||
| 61 | enum ipu3_css_buffer_state { | 61 | enum imgu_css_buffer_state { |
| 62 | IPU3_CSS_BUFFER_NEW, /* Not yet queued */ | 62 | IPU3_CSS_BUFFER_NEW, /* Not yet queued */ |
| 63 | IPU3_CSS_BUFFER_QUEUED, /* Queued, waiting to be filled */ | 63 | IPU3_CSS_BUFFER_QUEUED, /* Queued, waiting to be filled */ |
| 64 | IPU3_CSS_BUFFER_DONE, /* Finished processing, removed from queue */ | 64 | IPU3_CSS_BUFFER_DONE, /* Finished processing, removed from queue */ |
| 65 | IPU3_CSS_BUFFER_FAILED, /* Was not processed, removed from queue */ | 65 | IPU3_CSS_BUFFER_FAILED, /* Was not processed, removed from queue */ |
| 66 | }; | 66 | }; |
| 67 | 67 | ||
| 68 | struct ipu3_css_buffer { | 68 | struct imgu_css_buffer { |
| 69 | /* Private fields: user doesn't touch */ | 69 | /* Private fields: user doesn't touch */ |
| 70 | dma_addr_t daddr; | 70 | dma_addr_t daddr; |
| 71 | unsigned int queue; | 71 | unsigned int queue; |
| 72 | enum ipu3_css_buffer_state state; | 72 | enum imgu_css_buffer_state state; |
| 73 | struct list_head list; | 73 | struct list_head list; |
| 74 | u8 queue_pos; | 74 | u8 queue_pos; |
| 75 | unsigned int pipe; | 75 | unsigned int pipe; |
| 76 | }; | 76 | }; |
| 77 | 77 | ||
| 78 | struct ipu3_css_format { | 78 | struct imgu_css_format { |
| 79 | u32 pixelformat; | 79 | u32 pixelformat; |
| 80 | enum v4l2_colorspace colorspace; | 80 | enum v4l2_colorspace colorspace; |
| 81 | enum imgu_abi_frame_format frame_format; | 81 | enum imgu_abi_frame_format frame_format; |
| @@ -89,22 +89,22 @@ struct ipu3_css_format { | |||
| 89 | u8 flags; | 89 | u8 flags; |
| 90 | }; | 90 | }; |
| 91 | 91 | ||
| 92 | struct ipu3_css_queue { | 92 | struct imgu_css_queue { |
| 93 | union { | 93 | union { |
| 94 | struct v4l2_pix_format_mplane mpix; | 94 | struct v4l2_pix_format_mplane mpix; |
| 95 | struct v4l2_meta_format meta; | 95 | struct v4l2_meta_format meta; |
| 96 | 96 | ||
| 97 | } fmt; | 97 | } fmt; |
| 98 | const struct ipu3_css_format *css_fmt; | 98 | const struct imgu_css_format *css_fmt; |
| 99 | unsigned int width_pad; | 99 | unsigned int width_pad; |
| 100 | struct list_head bufs; | 100 | struct list_head bufs; |
| 101 | }; | 101 | }; |
| 102 | 102 | ||
| 103 | struct ipu3_css_pipe { | 103 | struct imgu_css_pipe { |
| 104 | enum ipu3_css_pipe_id pipe_id; | 104 | enum imgu_css_pipe_id pipe_id; |
| 105 | unsigned int bindex; | 105 | unsigned int bindex; |
| 106 | 106 | ||
| 107 | struct ipu3_css_queue queue[IPU3_CSS_QUEUES]; | 107 | struct imgu_css_queue queue[IPU3_CSS_QUEUES]; |
| 108 | struct v4l2_rect rect[IPU3_CSS_RECTS]; | 108 | struct v4l2_rect rect[IPU3_CSS_RECTS]; |
| 109 | 109 | ||
| 110 | bool vf_output_en; | 110 | bool vf_output_en; |
| @@ -112,21 +112,21 @@ struct ipu3_css_pipe { | |||
| 112 | spinlock_t qlock; | 112 | spinlock_t qlock; |
| 113 | 113 | ||
| 114 | /* Data structures shared with IMGU and driver, always allocated */ | 114 | /* Data structures shared with IMGU and driver, always allocated */ |
| 115 | struct ipu3_css_map sp_ddr_ptrs; | 115 | struct imgu_css_map sp_ddr_ptrs; |
| 116 | struct ipu3_css_map xmem_sp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] | 116 | struct imgu_css_map xmem_sp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] |
| 117 | [IMGU_ABI_MAX_STAGES]; | 117 | [IMGU_ABI_MAX_STAGES]; |
| 118 | struct ipu3_css_map xmem_isp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] | 118 | struct imgu_css_map xmem_isp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM] |
| 119 | [IMGU_ABI_MAX_STAGES]; | 119 | [IMGU_ABI_MAX_STAGES]; |
| 120 | 120 | ||
| 121 | /* | 121 | /* |
| 122 | * Data structures shared with IMGU and driver, binary specific. | 122 | * Data structures shared with IMGU and driver, binary specific. |
| 123 | * PARAM_CLASS_CONFIG and PARAM_CLASS_STATE parameters. | 123 | * PARAM_CLASS_CONFIG and PARAM_CLASS_STATE parameters. |
| 124 | */ | 124 | */ |
| 125 | struct ipu3_css_map binary_params_cs[IMGU_ABI_PARAM_CLASS_NUM - 1] | 125 | struct imgu_css_map binary_params_cs[IMGU_ABI_PARAM_CLASS_NUM - 1] |
| 126 | [IMGU_ABI_NUM_MEMORIES]; | 126 | [IMGU_ABI_NUM_MEMORIES]; |
| 127 | 127 | ||
| 128 | struct { | 128 | struct { |
| 129 | struct ipu3_css_map mem[IPU3_CSS_AUX_FRAMES]; | 129 | struct imgu_css_map mem[IPU3_CSS_AUX_FRAMES]; |
| 130 | unsigned int width; | 130 | unsigned int width; |
| 131 | unsigned int height; | 131 | unsigned int height; |
| 132 | unsigned int bytesperline; | 132 | unsigned int bytesperline; |
| @@ -134,76 +134,76 @@ struct ipu3_css_pipe { | |||
| 134 | } aux_frames[IPU3_CSS_AUX_FRAME_TYPES]; | 134 | } aux_frames[IPU3_CSS_AUX_FRAME_TYPES]; |
| 135 | 135 | ||
| 136 | struct { | 136 | struct { |
| 137 | struct ipu3_css_pool parameter_set_info; | 137 | struct imgu_css_pool parameter_set_info; |
| 138 | struct ipu3_css_pool acc; | 138 | struct imgu_css_pool acc; |
| 139 | struct ipu3_css_pool gdc; | 139 | struct imgu_css_pool gdc; |
| 140 | struct ipu3_css_pool obgrid; | 140 | struct imgu_css_pool obgrid; |
| 141 | /* PARAM_CLASS_PARAM parameters for binding while streaming */ | 141 | /* PARAM_CLASS_PARAM parameters for binding while streaming */ |
| 142 | struct ipu3_css_pool binary_params_p[IMGU_ABI_NUM_MEMORIES]; | 142 | struct imgu_css_pool binary_params_p[IMGU_ABI_NUM_MEMORIES]; |
| 143 | } pool; | 143 | } pool; |
| 144 | 144 | ||
| 145 | struct ipu3_css_map abi_buffers[IPU3_CSS_QUEUES] | 145 | struct imgu_css_map abi_buffers[IPU3_CSS_QUEUES] |
| 146 | [IMGU_ABI_HOST2SP_BUFQ_SIZE]; | 146 | [IMGU_ABI_HOST2SP_BUFQ_SIZE]; |
| 147 | }; | 147 | }; |
| 148 | 148 | ||
| 149 | /* IPU3 Camera Sub System structure */ | 149 | /* IPU3 Camera Sub System structure */ |
| 150 | struct ipu3_css { | 150 | struct imgu_css { |
| 151 | struct device *dev; | 151 | struct device *dev; |
| 152 | void __iomem *base; | 152 | void __iomem *base; |
| 153 | const struct firmware *fw; | 153 | const struct firmware *fw; |
| 154 | struct imgu_fw_header *fwp; | 154 | struct imgu_fw_header *fwp; |
| 155 | int iomem_length; | 155 | int iomem_length; |
| 156 | int fw_bl, fw_sp[IMGU_NUM_SP]; /* Indices of bl and SP binaries */ | 156 | int fw_bl, fw_sp[IMGU_NUM_SP]; /* Indices of bl and SP binaries */ |
| 157 | struct ipu3_css_map *binary; /* fw binaries mapped to device */ | 157 | struct imgu_css_map *binary; /* fw binaries mapped to device */ |
| 158 | bool streaming; /* true when streaming is enabled */ | 158 | bool streaming; /* true when streaming is enabled */ |
| 159 | 159 | ||
| 160 | struct ipu3_css_pipe pipes[IMGU_MAX_PIPE_NUM]; | 160 | struct imgu_css_pipe pipes[IMGU_MAX_PIPE_NUM]; |
| 161 | struct ipu3_css_map xmem_sp_group_ptrs; | 161 | struct imgu_css_map xmem_sp_group_ptrs; |
| 162 | 162 | ||
| 163 | /* enabled pipe(s) */ | 163 | /* enabled pipe(s) */ |
| 164 | DECLARE_BITMAP(enabled_pipes, IMGU_MAX_PIPE_NUM); | 164 | DECLARE_BITMAP(enabled_pipes, IMGU_MAX_PIPE_NUM); |
| 165 | }; | 165 | }; |
| 166 | 166 | ||
| 167 | /******************* css v4l *******************/ | 167 | /******************* css v4l *******************/ |
| 168 | int ipu3_css_init(struct device *dev, struct ipu3_css *css, | 168 | int imgu_css_init(struct device *dev, struct imgu_css *css, |
| 169 | void __iomem *base, int length); | 169 | void __iomem *base, int length); |
| 170 | void ipu3_css_cleanup(struct ipu3_css *css); | 170 | void imgu_css_cleanup(struct imgu_css *css); |
| 171 | int ipu3_css_fmt_try(struct ipu3_css *css, | 171 | int imgu_css_fmt_try(struct imgu_css *css, |
| 172 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], | 172 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], |
| 173 | struct v4l2_rect *rects[IPU3_CSS_RECTS], | 173 | struct v4l2_rect *rects[IPU3_CSS_RECTS], |
| 174 | unsigned int pipe); | 174 | unsigned int pipe); |
| 175 | int ipu3_css_fmt_set(struct ipu3_css *css, | 175 | int imgu_css_fmt_set(struct imgu_css *css, |
| 176 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], | 176 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES], |
| 177 | struct v4l2_rect *rects[IPU3_CSS_RECTS], | 177 | struct v4l2_rect *rects[IPU3_CSS_RECTS], |
| 178 | unsigned int pipe); | 178 | unsigned int pipe); |
| 179 | int ipu3_css_meta_fmt_set(struct v4l2_meta_format *fmt); | 179 | int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt); |
| 180 | int ipu3_css_buf_queue(struct ipu3_css *css, unsigned int pipe, | 180 | int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe, |
| 181 | struct ipu3_css_buffer *b); | 181 | struct imgu_css_buffer *b); |
| 182 | struct ipu3_css_buffer *ipu3_css_buf_dequeue(struct ipu3_css *css); | 182 | struct imgu_css_buffer *imgu_css_buf_dequeue(struct imgu_css *css); |
| 183 | int ipu3_css_start_streaming(struct ipu3_css *css); | 183 | int imgu_css_start_streaming(struct imgu_css *css); |
| 184 | void ipu3_css_stop_streaming(struct ipu3_css *css); | 184 | void imgu_css_stop_streaming(struct imgu_css *css); |
| 185 | bool ipu3_css_queue_empty(struct ipu3_css *css); | 185 | bool imgu_css_queue_empty(struct imgu_css *css); |
| 186 | bool ipu3_css_is_streaming(struct ipu3_css *css); | 186 | bool imgu_css_is_streaming(struct imgu_css *css); |
| 187 | bool ipu3_css_pipe_queue_empty(struct ipu3_css *css, unsigned int pipe); | 187 | bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe); |
| 188 | 188 | ||
| 189 | /******************* css hw *******************/ | 189 | /******************* css hw *******************/ |
| 190 | int ipu3_css_set_powerup(struct device *dev, void __iomem *base); | 190 | int imgu_css_set_powerup(struct device *dev, void __iomem *base); |
| 191 | void ipu3_css_set_powerdown(struct device *dev, void __iomem *base); | 191 | void imgu_css_set_powerdown(struct device *dev, void __iomem *base); |
| 192 | int ipu3_css_irq_ack(struct ipu3_css *css); | 192 | int imgu_css_irq_ack(struct imgu_css *css); |
| 193 | 193 | ||
| 194 | /******************* set parameters ************/ | 194 | /******************* set parameters ************/ |
| 195 | int ipu3_css_set_parameters(struct ipu3_css *css, unsigned int pipe, | 195 | int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe, |
| 196 | struct ipu3_uapi_params *set_params); | 196 | struct ipu3_uapi_params *set_params); |
| 197 | 197 | ||
| 198 | /******************* auxiliary helpers *******************/ | 198 | /******************* auxiliary helpers *******************/ |
| 199 | static inline enum ipu3_css_buffer_state | 199 | static inline enum imgu_css_buffer_state |
| 200 | ipu3_css_buf_state(struct ipu3_css_buffer *b) | 200 | imgu_css_buf_state(struct imgu_css_buffer *b) |
| 201 | { | 201 | { |
| 202 | return b->state; | 202 | return b->state; |
| 203 | } | 203 | } |
| 204 | 204 | ||
| 205 | /* Initialize given buffer. May be called several times. */ | 205 | /* Initialize given buffer. May be called several times. */ |
| 206 | static inline void ipu3_css_buf_init(struct ipu3_css_buffer *b, | 206 | static inline void imgu_css_buf_init(struct imgu_css_buffer *b, |
| 207 | unsigned int queue, dma_addr_t daddr) | 207 | unsigned int queue, dma_addr_t daddr) |
| 208 | { | 208 | { |
| 209 | b->state = IPU3_CSS_BUFFER_NEW; | 209 | b->state = IPU3_CSS_BUFFER_NEW; |
diff --git a/drivers/staging/media/ipu3/ipu3-dmamap.c b/drivers/staging/media/ipu3/ipu3-dmamap.c index 93a393d4e15e..d978a00e1e0b 100644 --- a/drivers/staging/media/ipu3/ipu3-dmamap.c +++ b/drivers/staging/media/ipu3/ipu3-dmamap.c | |||
| @@ -12,11 +12,12 @@ | |||
| 12 | #include "ipu3.h" | 12 | #include "ipu3.h" |
| 13 | #include "ipu3-css-pool.h" | 13 | #include "ipu3-css-pool.h" |
| 14 | #include "ipu3-mmu.h" | 14 | #include "ipu3-mmu.h" |
| 15 | #include "ipu3-dmamap.h" | ||
| 15 | 16 | ||
| 16 | /* | 17 | /* |
| 17 | * Free a buffer allocated by ipu3_dmamap_alloc_buffer() | 18 | * Free a buffer allocated by imgu_dmamap_alloc_buffer() |
| 18 | */ | 19 | */ |
| 19 | static void ipu3_dmamap_free_buffer(struct page **pages, | 20 | static void imgu_dmamap_free_buffer(struct page **pages, |
| 20 | size_t size) | 21 | size_t size) |
| 21 | { | 22 | { |
| 22 | int count = size >> PAGE_SHIFT; | 23 | int count = size >> PAGE_SHIFT; |
| @@ -30,7 +31,7 @@ static void ipu3_dmamap_free_buffer(struct page **pages, | |||
| 30 | * Based on the implementation of __iommu_dma_alloc_pages() | 31 | * Based on the implementation of __iommu_dma_alloc_pages() |
| 31 | * defined in drivers/iommu/dma-iommu.c | 32 | * defined in drivers/iommu/dma-iommu.c |
| 32 | */ | 33 | */ |
| 33 | static struct page **ipu3_dmamap_alloc_buffer(size_t size, | 34 | static struct page **imgu_dmamap_alloc_buffer(size_t size, |
| 34 | unsigned long order_mask, | 35 | unsigned long order_mask, |
| 35 | gfp_t gfp) | 36 | gfp_t gfp) |
| 36 | { | 37 | { |
| @@ -73,7 +74,7 @@ static struct page **ipu3_dmamap_alloc_buffer(size_t size, | |||
| 73 | __free_pages(page, order); | 74 | __free_pages(page, order); |
| 74 | } | 75 | } |
| 75 | if (!page) { | 76 | if (!page) { |
| 76 | ipu3_dmamap_free_buffer(pages, i << PAGE_SHIFT); | 77 | imgu_dmamap_free_buffer(pages, i << PAGE_SHIFT); |
| 77 | return NULL; | 78 | return NULL; |
| 78 | } | 79 | } |
| 79 | count -= order_size; | 80 | count -= order_size; |
| @@ -85,7 +86,7 @@ static struct page **ipu3_dmamap_alloc_buffer(size_t size, | |||
| 85 | } | 86 | } |
| 86 | 87 | ||
| 87 | /** | 88 | /** |
| 88 | * ipu3_dmamap_alloc - allocate and map a buffer into KVA | 89 | * imgu_dmamap_alloc - allocate and map a buffer into KVA |
| 89 | * @imgu: struct device pointer | 90 | * @imgu: struct device pointer |
| 90 | * @map: struct to store mapping variables | 91 | * @map: struct to store mapping variables |
| 91 | * @len: size required | 92 | * @len: size required |
| @@ -94,7 +95,7 @@ static struct page **ipu3_dmamap_alloc_buffer(size_t size, | |||
| 94 | * KVA on success | 95 | * KVA on success |
| 95 | * %NULL on failure | 96 | * %NULL on failure |
| 96 | */ | 97 | */ |
| 97 | void *ipu3_dmamap_alloc(struct imgu_device *imgu, struct ipu3_css_map *map, | 98 | void *imgu_dmamap_alloc(struct imgu_device *imgu, struct imgu_css_map *map, |
| 98 | size_t len) | 99 | size_t len) |
| 99 | { | 100 | { |
| 100 | unsigned long shift = iova_shift(&imgu->iova_domain); | 101 | unsigned long shift = iova_shift(&imgu->iova_domain); |
| @@ -113,7 +114,7 @@ void *ipu3_dmamap_alloc(struct imgu_device *imgu, struct ipu3_css_map *map, | |||
| 113 | if (!iova) | 114 | if (!iova) |
| 114 | return NULL; | 115 | return NULL; |
| 115 | 116 | ||
| 116 | pages = ipu3_dmamap_alloc_buffer(size, alloc_sizes >> PAGE_SHIFT, | 117 | pages = imgu_dmamap_alloc_buffer(size, alloc_sizes >> PAGE_SHIFT, |
| 117 | GFP_KERNEL); | 118 | GFP_KERNEL); |
| 118 | if (!pages) | 119 | if (!pages) |
| 119 | goto out_free_iova; | 120 | goto out_free_iova; |
| @@ -121,7 +122,7 @@ void *ipu3_dmamap_alloc(struct imgu_device *imgu, struct ipu3_css_map *map, | |||
| 121 | /* Call IOMMU driver to setup pgt */ | 122 | /* Call IOMMU driver to setup pgt */ |
| 122 | iovaddr = iova_dma_addr(&imgu->iova_domain, iova); | 123 | iovaddr = iova_dma_addr(&imgu->iova_domain, iova); |
| 123 | for (i = 0; i < size / PAGE_SIZE; ++i) { | 124 | for (i = 0; i < size / PAGE_SIZE; ++i) { |
| 124 | rval = ipu3_mmu_map(imgu->mmu, iovaddr, | 125 | rval = imgu_mmu_map(imgu->mmu, iovaddr, |
| 125 | page_to_phys(pages[i]), PAGE_SIZE); | 126 | page_to_phys(pages[i]), PAGE_SIZE); |
| 126 | if (rval) | 127 | if (rval) |
| 127 | goto out_unmap; | 128 | goto out_unmap; |
| @@ -152,8 +153,8 @@ out_vunmap: | |||
| 152 | vunmap(map->vma->addr); | 153 | vunmap(map->vma->addr); |
| 153 | 154 | ||
| 154 | out_unmap: | 155 | out_unmap: |
| 155 | ipu3_dmamap_free_buffer(pages, size); | 156 | imgu_dmamap_free_buffer(pages, size); |
| 156 | ipu3_mmu_unmap(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), | 157 | imgu_mmu_unmap(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), |
| 157 | i * PAGE_SIZE); | 158 | i * PAGE_SIZE); |
| 158 | map->vma = NULL; | 159 | map->vma = NULL; |
| 159 | 160 | ||
| @@ -163,7 +164,7 @@ out_free_iova: | |||
| 163 | return NULL; | 164 | return NULL; |
| 164 | } | 165 | } |
| 165 | 166 | ||
| 166 | void ipu3_dmamap_unmap(struct imgu_device *imgu, struct ipu3_css_map *map) | 167 | void imgu_dmamap_unmap(struct imgu_device *imgu, struct imgu_css_map *map) |
| 167 | { | 168 | { |
| 168 | struct iova *iova; | 169 | struct iova *iova; |
| 169 | 170 | ||
| @@ -172,16 +173,16 @@ void ipu3_dmamap_unmap(struct imgu_device *imgu, struct ipu3_css_map *map) | |||
| 172 | if (WARN_ON(!iova)) | 173 | if (WARN_ON(!iova)) |
| 173 | return; | 174 | return; |
| 174 | 175 | ||
| 175 | ipu3_mmu_unmap(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), | 176 | imgu_mmu_unmap(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), |
| 176 | iova_size(iova) << iova_shift(&imgu->iova_domain)); | 177 | iova_size(iova) << iova_shift(&imgu->iova_domain)); |
| 177 | 178 | ||
| 178 | __free_iova(&imgu->iova_domain, iova); | 179 | __free_iova(&imgu->iova_domain, iova); |
| 179 | } | 180 | } |
| 180 | 181 | ||
| 181 | /* | 182 | /* |
| 182 | * Counterpart of ipu3_dmamap_alloc | 183 | * Counterpart of imgu_dmamap_alloc |
| 183 | */ | 184 | */ |
| 184 | void ipu3_dmamap_free(struct imgu_device *imgu, struct ipu3_css_map *map) | 185 | void imgu_dmamap_free(struct imgu_device *imgu, struct imgu_css_map *map) |
| 185 | { | 186 | { |
| 186 | struct vm_struct *area = map->vma; | 187 | struct vm_struct *area = map->vma; |
| 187 | 188 | ||
| @@ -191,18 +192,18 @@ void ipu3_dmamap_free(struct imgu_device *imgu, struct ipu3_css_map *map) | |||
| 191 | if (!map->vaddr) | 192 | if (!map->vaddr) |
| 192 | return; | 193 | return; |
| 193 | 194 | ||
| 194 | ipu3_dmamap_unmap(imgu, map); | 195 | imgu_dmamap_unmap(imgu, map); |
| 195 | 196 | ||
| 196 | if (WARN_ON(!area) || WARN_ON(!area->pages)) | 197 | if (WARN_ON(!area) || WARN_ON(!area->pages)) |
| 197 | return; | 198 | return; |
| 198 | 199 | ||
| 199 | ipu3_dmamap_free_buffer(area->pages, map->size); | 200 | imgu_dmamap_free_buffer(area->pages, map->size); |
| 200 | vunmap(map->vaddr); | 201 | vunmap(map->vaddr); |
| 201 | map->vaddr = NULL; | 202 | map->vaddr = NULL; |
| 202 | } | 203 | } |
| 203 | 204 | ||
| 204 | int ipu3_dmamap_map_sg(struct imgu_device *imgu, struct scatterlist *sglist, | 205 | int imgu_dmamap_map_sg(struct imgu_device *imgu, struct scatterlist *sglist, |
| 205 | int nents, struct ipu3_css_map *map) | 206 | int nents, struct imgu_css_map *map) |
| 206 | { | 207 | { |
| 207 | unsigned long shift = iova_shift(&imgu->iova_domain); | 208 | unsigned long shift = iova_shift(&imgu->iova_domain); |
| 208 | struct scatterlist *sg; | 209 | struct scatterlist *sg; |
| @@ -232,7 +233,7 @@ int ipu3_dmamap_map_sg(struct imgu_device *imgu, struct scatterlist *sglist, | |||
| 232 | dev_dbg(&imgu->pci_dev->dev, "dmamap: iova low pfn %lu, high pfn %lu\n", | 233 | dev_dbg(&imgu->pci_dev->dev, "dmamap: iova low pfn %lu, high pfn %lu\n", |
| 233 | iova->pfn_lo, iova->pfn_hi); | 234 | iova->pfn_lo, iova->pfn_hi); |
| 234 | 235 | ||
| 235 | if (ipu3_mmu_map_sg(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), | 236 | if (imgu_mmu_map_sg(imgu->mmu, iova_dma_addr(&imgu->iova_domain, iova), |
| 236 | sglist, nents) < size) | 237 | sglist, nents) < size) |
| 237 | goto out_fail; | 238 | goto out_fail; |
| 238 | 239 | ||
| @@ -248,7 +249,7 @@ out_fail: | |||
| 248 | return -EFAULT; | 249 | return -EFAULT; |
| 249 | } | 250 | } |
| 250 | 251 | ||
| 251 | int ipu3_dmamap_init(struct imgu_device *imgu) | 252 | int imgu_dmamap_init(struct imgu_device *imgu) |
| 252 | { | 253 | { |
| 253 | unsigned long order, base_pfn; | 254 | unsigned long order, base_pfn; |
| 254 | int ret = iova_cache_get(); | 255 | int ret = iova_cache_get(); |
| @@ -263,7 +264,7 @@ int ipu3_dmamap_init(struct imgu_device *imgu) | |||
| 263 | return 0; | 264 | return 0; |
| 264 | } | 265 | } |
| 265 | 266 | ||
| 266 | void ipu3_dmamap_exit(struct imgu_device *imgu) | 267 | void imgu_dmamap_exit(struct imgu_device *imgu) |
| 267 | { | 268 | { |
| 268 | put_iova_domain(&imgu->iova_domain); | 269 | put_iova_domain(&imgu->iova_domain); |
| 269 | iova_cache_put(); | 270 | iova_cache_put(); |
diff --git a/drivers/staging/media/ipu3/ipu3-dmamap.h b/drivers/staging/media/ipu3/ipu3-dmamap.h index b9d224a33273..9db513b3d603 100644 --- a/drivers/staging/media/ipu3/ipu3-dmamap.h +++ b/drivers/staging/media/ipu3/ipu3-dmamap.h | |||
| @@ -8,15 +8,15 @@ | |||
| 8 | struct imgu_device; | 8 | struct imgu_device; |
| 9 | struct scatterlist; | 9 | struct scatterlist; |
| 10 | 10 | ||
| 11 | void *ipu3_dmamap_alloc(struct imgu_device *imgu, struct ipu3_css_map *map, | 11 | void *imgu_dmamap_alloc(struct imgu_device *imgu, struct imgu_css_map *map, |
| 12 | size_t len); | 12 | size_t len); |
| 13 | void ipu3_dmamap_free(struct imgu_device *imgu, struct ipu3_css_map *map); | 13 | void imgu_dmamap_free(struct imgu_device *imgu, struct imgu_css_map *map); |
| 14 | 14 | ||
| 15 | int ipu3_dmamap_map_sg(struct imgu_device *imgu, struct scatterlist *sglist, | 15 | int imgu_dmamap_map_sg(struct imgu_device *imgu, struct scatterlist *sglist, |
| 16 | int nents, struct ipu3_css_map *map); | 16 | int nents, struct imgu_css_map *map); |
| 17 | void ipu3_dmamap_unmap(struct imgu_device *imgu, struct ipu3_css_map *map); | 17 | void imgu_dmamap_unmap(struct imgu_device *imgu, struct imgu_css_map *map); |
| 18 | 18 | ||
| 19 | int ipu3_dmamap_init(struct imgu_device *imgu); | 19 | int imgu_dmamap_init(struct imgu_device *imgu); |
| 20 | void ipu3_dmamap_exit(struct imgu_device *imgu); | 20 | void imgu_dmamap_exit(struct imgu_device *imgu); |
| 21 | 21 | ||
| 22 | #endif | 22 | #endif |
diff --git a/drivers/staging/media/ipu3/ipu3-mmu.c b/drivers/staging/media/ipu3/ipu3-mmu.c index b9f209541f78..cfc2bdfb14b3 100644 --- a/drivers/staging/media/ipu3/ipu3-mmu.c +++ b/drivers/staging/media/ipu3/ipu3-mmu.c | |||
| @@ -48,7 +48,7 @@ | |||
| 48 | #define REG_GP_HALT (IMGU_REG_BASE + 0x5dc) | 48 | #define REG_GP_HALT (IMGU_REG_BASE + 0x5dc) |
| 49 | #define REG_GP_HALTED (IMGU_REG_BASE + 0x5e0) | 49 | #define REG_GP_HALTED (IMGU_REG_BASE + 0x5e0) |
| 50 | 50 | ||
| 51 | struct ipu3_mmu { | 51 | struct imgu_mmu { |
| 52 | struct device *dev; | 52 | struct device *dev; |
| 53 | void __iomem *base; | 53 | void __iomem *base; |
| 54 | /* protect access to l2pts, l1pt */ | 54 | /* protect access to l2pts, l1pt */ |
| @@ -63,28 +63,28 @@ struct ipu3_mmu { | |||
| 63 | u32 **l2pts; | 63 | u32 **l2pts; |
| 64 | u32 *l1pt; | 64 | u32 *l1pt; |
| 65 | 65 | ||
| 66 | struct ipu3_mmu_info geometry; | 66 | struct imgu_mmu_info geometry; |
| 67 | }; | 67 | }; |
| 68 | 68 | ||
| 69 | static inline struct ipu3_mmu *to_ipu3_mmu(struct ipu3_mmu_info *info) | 69 | static inline struct imgu_mmu *to_imgu_mmu(struct imgu_mmu_info *info) |
| 70 | { | 70 | { |
| 71 | return container_of(info, struct ipu3_mmu, geometry); | 71 | return container_of(info, struct imgu_mmu, geometry); |
| 72 | } | 72 | } |
| 73 | 73 | ||
| 74 | /** | 74 | /** |
| 75 | * ipu3_mmu_tlb_invalidate - invalidate translation look-aside buffer | 75 | * imgu_mmu_tlb_invalidate - invalidate translation look-aside buffer |
| 76 | * @mmu: MMU to perform the invalidate operation on | 76 | * @mmu: MMU to perform the invalidate operation on |
| 77 | * | 77 | * |
| 78 | * This function invalidates the whole TLB. Must be called when the hardware | 78 | * This function invalidates the whole TLB. Must be called when the hardware |
| 79 | * is powered on. | 79 | * is powered on. |
| 80 | */ | 80 | */ |
| 81 | static void ipu3_mmu_tlb_invalidate(struct ipu3_mmu *mmu) | 81 | static void imgu_mmu_tlb_invalidate(struct imgu_mmu *mmu) |
| 82 | { | 82 | { |
| 83 | writel(TLB_INVALIDATE, mmu->base + REG_TLB_INVALIDATE); | 83 | writel(TLB_INVALIDATE, mmu->base + REG_TLB_INVALIDATE); |
| 84 | } | 84 | } |
| 85 | 85 | ||
| 86 | static void call_if_ipu3_is_powered(struct ipu3_mmu *mmu, | 86 | static void call_if_imgu_is_powered(struct imgu_mmu *mmu, |
| 87 | void (*func)(struct ipu3_mmu *mmu)) | 87 | void (*func)(struct imgu_mmu *mmu)) |
| 88 | { | 88 | { |
| 89 | if (!pm_runtime_get_if_in_use(mmu->dev)) | 89 | if (!pm_runtime_get_if_in_use(mmu->dev)) |
| 90 | return; | 90 | return; |
| @@ -94,14 +94,14 @@ static void call_if_ipu3_is_powered(struct ipu3_mmu *mmu, | |||
| 94 | } | 94 | } |
| 95 | 95 | ||
| 96 | /** | 96 | /** |
| 97 | * ipu3_mmu_set_halt - set CIO gate halt bit | 97 | * imgu_mmu_set_halt - set CIO gate halt bit |
| 98 | * @mmu: MMU to set the CIO gate bit in. | 98 | * @mmu: MMU to set the CIO gate bit in. |
| 99 | * @halt: Desired state of the gate bit. | 99 | * @halt: Desired state of the gate bit. |
| 100 | * | 100 | * |
| 101 | * This function sets the CIO gate bit that controls whether external memory | 101 | * This function sets the CIO gate bit that controls whether external memory |
| 102 | * accesses are allowed. Must be called when the hardware is powered on. | 102 | * accesses are allowed. Must be called when the hardware is powered on. |
| 103 | */ | 103 | */ |
| 104 | static void ipu3_mmu_set_halt(struct ipu3_mmu *mmu, bool halt) | 104 | static void imgu_mmu_set_halt(struct imgu_mmu *mmu, bool halt) |
| 105 | { | 105 | { |
| 106 | int ret; | 106 | int ret; |
| 107 | u32 val; | 107 | u32 val; |
| @@ -116,12 +116,12 @@ static void ipu3_mmu_set_halt(struct ipu3_mmu *mmu, bool halt) | |||
| 116 | } | 116 | } |
| 117 | 117 | ||
| 118 | /** | 118 | /** |
| 119 | * ipu3_mmu_alloc_page_table - allocate a pre-filled page table | 119 | * imgu_mmu_alloc_page_table - allocate a pre-filled page table |
| 120 | * @pteval: Value to initialize for page table entries with. | 120 | * @pteval: Value to initialize for page table entries with. |
| 121 | * | 121 | * |
| 122 | * Return: Pointer to allocated page table or NULL on failure. | 122 | * Return: Pointer to allocated page table or NULL on failure. |
| 123 | */ | 123 | */ |
| 124 | static u32 *ipu3_mmu_alloc_page_table(u32 pteval) | 124 | static u32 *imgu_mmu_alloc_page_table(u32 pteval) |
| 125 | { | 125 | { |
| 126 | u32 *pt; | 126 | u32 *pt; |
| 127 | int pte; | 127 | int pte; |
| @@ -139,10 +139,10 @@ static u32 *ipu3_mmu_alloc_page_table(u32 pteval) | |||
| 139 | } | 139 | } |
| 140 | 140 | ||
| 141 | /** | 141 | /** |
| 142 | * ipu3_mmu_free_page_table - free page table | 142 | * imgu_mmu_free_page_table - free page table |
| 143 | * @pt: Page table to free. | 143 | * @pt: Page table to free. |
| 144 | */ | 144 | */ |
| 145 | static void ipu3_mmu_free_page_table(u32 *pt) | 145 | static void imgu_mmu_free_page_table(u32 *pt) |
| 146 | { | 146 | { |
| 147 | set_memory_wb((unsigned long int)pt, IPU3_PT_ORDER); | 147 | set_memory_wb((unsigned long int)pt, IPU3_PT_ORDER); |
| 148 | free_page((unsigned long)pt); | 148 | free_page((unsigned long)pt); |
| @@ -168,7 +168,7 @@ static inline void address_to_pte_idx(unsigned long iova, u32 *l1pt_idx, | |||
| 168 | *l1pt_idx = iova & IPU3_L1PT_MASK; | 168 | *l1pt_idx = iova & IPU3_L1PT_MASK; |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | static u32 *ipu3_mmu_get_l2pt(struct ipu3_mmu *mmu, u32 l1pt_idx) | 171 | static u32 *imgu_mmu_get_l2pt(struct imgu_mmu *mmu, u32 l1pt_idx) |
| 172 | { | 172 | { |
| 173 | unsigned long flags; | 173 | unsigned long flags; |
| 174 | u32 *l2pt, *new_l2pt; | 174 | u32 *l2pt, *new_l2pt; |
| @@ -182,7 +182,7 @@ static u32 *ipu3_mmu_get_l2pt(struct ipu3_mmu *mmu, u32 l1pt_idx) | |||
| 182 | 182 | ||
| 183 | spin_unlock_irqrestore(&mmu->lock, flags); | 183 | spin_unlock_irqrestore(&mmu->lock, flags); |
| 184 | 184 | ||
| 185 | new_l2pt = ipu3_mmu_alloc_page_table(mmu->dummy_page_pteval); | 185 | new_l2pt = imgu_mmu_alloc_page_table(mmu->dummy_page_pteval); |
| 186 | if (!new_l2pt) | 186 | if (!new_l2pt) |
| 187 | return NULL; | 187 | return NULL; |
| 188 | 188 | ||
| @@ -193,7 +193,7 @@ static u32 *ipu3_mmu_get_l2pt(struct ipu3_mmu *mmu, u32 l1pt_idx) | |||
| 193 | 193 | ||
| 194 | l2pt = mmu->l2pts[l1pt_idx]; | 194 | l2pt = mmu->l2pts[l1pt_idx]; |
| 195 | if (l2pt) { | 195 | if (l2pt) { |
| 196 | ipu3_mmu_free_page_table(new_l2pt); | 196 | imgu_mmu_free_page_table(new_l2pt); |
| 197 | goto done; | 197 | goto done; |
| 198 | } | 198 | } |
| 199 | 199 | ||
| @@ -208,7 +208,7 @@ done: | |||
| 208 | return l2pt; | 208 | return l2pt; |
| 209 | } | 209 | } |
| 210 | 210 | ||
| 211 | static int __ipu3_mmu_map(struct ipu3_mmu *mmu, unsigned long iova, | 211 | static int __imgu_mmu_map(struct imgu_mmu *mmu, unsigned long iova, |
| 212 | phys_addr_t paddr) | 212 | phys_addr_t paddr) |
| 213 | { | 213 | { |
| 214 | u32 l1pt_idx, l2pt_idx; | 214 | u32 l1pt_idx, l2pt_idx; |
| @@ -220,7 +220,7 @@ static int __ipu3_mmu_map(struct ipu3_mmu *mmu, unsigned long iova, | |||
| 220 | 220 | ||
| 221 | address_to_pte_idx(iova, &l1pt_idx, &l2pt_idx); | 221 | address_to_pte_idx(iova, &l1pt_idx, &l2pt_idx); |
| 222 | 222 | ||
| 223 | l2pt = ipu3_mmu_get_l2pt(mmu, l1pt_idx); | 223 | l2pt = imgu_mmu_get_l2pt(mmu, l1pt_idx); |
| 224 | if (!l2pt) | 224 | if (!l2pt) |
| 225 | return -ENOMEM; | 225 | return -ENOMEM; |
| 226 | 226 | ||
| @@ -238,11 +238,11 @@ static int __ipu3_mmu_map(struct ipu3_mmu *mmu, unsigned long iova, | |||
| 238 | return 0; | 238 | return 0; |
| 239 | } | 239 | } |
| 240 | 240 | ||
| 241 | /** | 241 | /* |
| 242 | * The following four functions are implemented based on iommu.c | 242 | * The following four functions are implemented based on iommu.c |
| 243 | * drivers/iommu/iommu.c/iommu_pgsize(). | 243 | * drivers/iommu/iommu.c/iommu_pgsize(). |
| 244 | */ | 244 | */ |
| 245 | static size_t ipu3_mmu_pgsize(unsigned long pgsize_bitmap, | 245 | static size_t imgu_mmu_pgsize(unsigned long pgsize_bitmap, |
| 246 | unsigned long addr_merge, size_t size) | 246 | unsigned long addr_merge, size_t size) |
| 247 | { | 247 | { |
| 248 | unsigned int pgsize_idx; | 248 | unsigned int pgsize_idx; |
| @@ -276,10 +276,10 @@ static size_t ipu3_mmu_pgsize(unsigned long pgsize_bitmap, | |||
| 276 | } | 276 | } |
| 277 | 277 | ||
| 278 | /* drivers/iommu/iommu.c/iommu_map() */ | 278 | /* drivers/iommu/iommu.c/iommu_map() */ |
| 279 | int ipu3_mmu_map(struct ipu3_mmu_info *info, unsigned long iova, | 279 | int imgu_mmu_map(struct imgu_mmu_info *info, unsigned long iova, |
| 280 | phys_addr_t paddr, size_t size) | 280 | phys_addr_t paddr, size_t size) |
| 281 | { | 281 | { |
| 282 | struct ipu3_mmu *mmu = to_ipu3_mmu(info); | 282 | struct imgu_mmu *mmu = to_imgu_mmu(info); |
| 283 | unsigned int min_pagesz; | 283 | unsigned int min_pagesz; |
| 284 | int ret = 0; | 284 | int ret = 0; |
| 285 | 285 | ||
| @@ -301,13 +301,13 @@ int ipu3_mmu_map(struct ipu3_mmu_info *info, unsigned long iova, | |||
| 301 | iova, &paddr, size); | 301 | iova, &paddr, size); |
| 302 | 302 | ||
| 303 | while (size) { | 303 | while (size) { |
| 304 | size_t pgsize = ipu3_mmu_pgsize(mmu->geometry.pgsize_bitmap, | 304 | size_t pgsize = imgu_mmu_pgsize(mmu->geometry.pgsize_bitmap, |
| 305 | iova | paddr, size); | 305 | iova | paddr, size); |
| 306 | 306 | ||
| 307 | dev_dbg(mmu->dev, "mapping: iova 0x%lx pa %pa pgsize 0x%zx\n", | 307 | dev_dbg(mmu->dev, "mapping: iova 0x%lx pa %pa pgsize 0x%zx\n", |
| 308 | iova, &paddr, pgsize); | 308 | iova, &paddr, pgsize); |
| 309 | 309 | ||
| 310 | ret = __ipu3_mmu_map(mmu, iova, paddr); | 310 | ret = __imgu_mmu_map(mmu, iova, paddr); |
| 311 | if (ret) | 311 | if (ret) |
| 312 | break; | 312 | break; |
| 313 | 313 | ||
| @@ -316,16 +316,16 @@ int ipu3_mmu_map(struct ipu3_mmu_info *info, unsigned long iova, | |||
| 316 | size -= pgsize; | 316 | size -= pgsize; |
| 317 | } | 317 | } |
| 318 | 318 | ||
| 319 | call_if_ipu3_is_powered(mmu, ipu3_mmu_tlb_invalidate); | 319 | call_if_imgu_is_powered(mmu, imgu_mmu_tlb_invalidate); |
| 320 | 320 | ||
| 321 | return ret; | 321 | return ret; |
| 322 | } | 322 | } |
| 323 | 323 | ||
| 324 | /* drivers/iommu/iommu.c/default_iommu_map_sg() */ | 324 | /* drivers/iommu/iommu.c/default_iommu_map_sg() */ |
| 325 | size_t ipu3_mmu_map_sg(struct ipu3_mmu_info *info, unsigned long iova, | 325 | size_t imgu_mmu_map_sg(struct imgu_mmu_info *info, unsigned long iova, |
| 326 | struct scatterlist *sg, unsigned int nents) | 326 | struct scatterlist *sg, unsigned int nents) |
| 327 | { | 327 | { |
| 328 | struct ipu3_mmu *mmu = to_ipu3_mmu(info); | 328 | struct imgu_mmu *mmu = to_imgu_mmu(info); |
| 329 | struct scatterlist *s; | 329 | struct scatterlist *s; |
| 330 | size_t s_length, mapped = 0; | 330 | size_t s_length, mapped = 0; |
| 331 | unsigned int i, min_pagesz; | 331 | unsigned int i, min_pagesz; |
| @@ -345,25 +345,25 @@ size_t ipu3_mmu_map_sg(struct ipu3_mmu_info *info, unsigned long iova, | |||
| 345 | if (i == nents - 1 && !IS_ALIGNED(s->length, min_pagesz)) | 345 | if (i == nents - 1 && !IS_ALIGNED(s->length, min_pagesz)) |
| 346 | s_length = PAGE_ALIGN(s->length); | 346 | s_length = PAGE_ALIGN(s->length); |
| 347 | 347 | ||
| 348 | ret = ipu3_mmu_map(info, iova + mapped, phys, s_length); | 348 | ret = imgu_mmu_map(info, iova + mapped, phys, s_length); |
| 349 | if (ret) | 349 | if (ret) |
| 350 | goto out_err; | 350 | goto out_err; |
| 351 | 351 | ||
| 352 | mapped += s_length; | 352 | mapped += s_length; |
| 353 | } | 353 | } |
| 354 | 354 | ||
| 355 | call_if_ipu3_is_powered(mmu, ipu3_mmu_tlb_invalidate); | 355 | call_if_imgu_is_powered(mmu, imgu_mmu_tlb_invalidate); |
| 356 | 356 | ||
| 357 | return mapped; | 357 | return mapped; |
| 358 | 358 | ||
| 359 | out_err: | 359 | out_err: |
| 360 | /* undo mappings already done */ | 360 | /* undo mappings already done */ |
| 361 | ipu3_mmu_unmap(info, iova, mapped); | 361 | imgu_mmu_unmap(info, iova, mapped); |
| 362 | 362 | ||
| 363 | return 0; | 363 | return 0; |
| 364 | } | 364 | } |
| 365 | 365 | ||
| 366 | static size_t __ipu3_mmu_unmap(struct ipu3_mmu *mmu, | 366 | static size_t __imgu_mmu_unmap(struct imgu_mmu *mmu, |
| 367 | unsigned long iova, size_t size) | 367 | unsigned long iova, size_t size) |
| 368 | { | 368 | { |
| 369 | u32 l1pt_idx, l2pt_idx; | 369 | u32 l1pt_idx, l2pt_idx; |
| @@ -395,10 +395,10 @@ static size_t __ipu3_mmu_unmap(struct ipu3_mmu *mmu, | |||
| 395 | } | 395 | } |
| 396 | 396 | ||
| 397 | /* drivers/iommu/iommu.c/iommu_unmap() */ | 397 | /* drivers/iommu/iommu.c/iommu_unmap() */ |
| 398 | size_t ipu3_mmu_unmap(struct ipu3_mmu_info *info, unsigned long iova, | 398 | size_t imgu_mmu_unmap(struct imgu_mmu_info *info, unsigned long iova, |
| 399 | size_t size) | 399 | size_t size) |
| 400 | { | 400 | { |
| 401 | struct ipu3_mmu *mmu = to_ipu3_mmu(info); | 401 | struct imgu_mmu *mmu = to_imgu_mmu(info); |
| 402 | size_t unmapped_page, unmapped = 0; | 402 | size_t unmapped_page, unmapped = 0; |
| 403 | unsigned int min_pagesz; | 403 | unsigned int min_pagesz; |
| 404 | 404 | ||
| @@ -423,10 +423,10 @@ size_t ipu3_mmu_unmap(struct ipu3_mmu_info *info, unsigned long iova, | |||
| 423 | * or we hit an area that isn't mapped. | 423 | * or we hit an area that isn't mapped. |
| 424 | */ | 424 | */ |
| 425 | while (unmapped < size) { | 425 | while (unmapped < size) { |
| 426 | size_t pgsize = ipu3_mmu_pgsize(mmu->geometry.pgsize_bitmap, | 426 | size_t pgsize = imgu_mmu_pgsize(mmu->geometry.pgsize_bitmap, |
| 427 | iova, size - unmapped); | 427 | iova, size - unmapped); |
| 428 | 428 | ||
| 429 | unmapped_page = __ipu3_mmu_unmap(mmu, iova, pgsize); | 429 | unmapped_page = __imgu_mmu_unmap(mmu, iova, pgsize); |
| 430 | if (!unmapped_page) | 430 | if (!unmapped_page) |
| 431 | break; | 431 | break; |
| 432 | 432 | ||
| @@ -437,20 +437,21 @@ size_t ipu3_mmu_unmap(struct ipu3_mmu_info *info, unsigned long iova, | |||
| 437 | unmapped += unmapped_page; | 437 | unmapped += unmapped_page; |
| 438 | } | 438 | } |
| 439 | 439 | ||
| 440 | call_if_ipu3_is_powered(mmu, ipu3_mmu_tlb_invalidate); | 440 | call_if_imgu_is_powered(mmu, imgu_mmu_tlb_invalidate); |
| 441 | 441 | ||
| 442 | return unmapped; | 442 | return unmapped; |
| 443 | } | 443 | } |
| 444 | 444 | ||
| 445 | /** | 445 | /** |
| 446 | * ipu3_mmu_init() - initialize IPU3 MMU block | 446 | * imgu_mmu_init() - initialize IPU3 MMU block |
| 447 | * @parent: struct device parent | ||
| 447 | * @base: IOMEM base of hardware registers. | 448 | * @base: IOMEM base of hardware registers. |
| 448 | * | 449 | * |
| 449 | * Return: Pointer to IPU3 MMU private data pointer or ERR_PTR() on error. | 450 | * Return: Pointer to IPU3 MMU private data pointer or ERR_PTR() on error. |
| 450 | */ | 451 | */ |
| 451 | struct ipu3_mmu_info *ipu3_mmu_init(struct device *parent, void __iomem *base) | 452 | struct imgu_mmu_info *imgu_mmu_init(struct device *parent, void __iomem *base) |
| 452 | { | 453 | { |
| 453 | struct ipu3_mmu *mmu; | 454 | struct imgu_mmu *mmu; |
| 454 | u32 pteval; | 455 | u32 pteval; |
| 455 | 456 | ||
| 456 | mmu = kzalloc(sizeof(*mmu), GFP_KERNEL); | 457 | mmu = kzalloc(sizeof(*mmu), GFP_KERNEL); |
| @@ -462,7 +463,7 @@ struct ipu3_mmu_info *ipu3_mmu_init(struct device *parent, void __iomem *base) | |||
| 462 | spin_lock_init(&mmu->lock); | 463 | spin_lock_init(&mmu->lock); |
| 463 | 464 | ||
| 464 | /* Disallow external memory access when having no valid page tables. */ | 465 | /* Disallow external memory access when having no valid page tables. */ |
| 465 | ipu3_mmu_set_halt(mmu, true); | 466 | imgu_mmu_set_halt(mmu, true); |
| 466 | 467 | ||
| 467 | /* | 468 | /* |
| 468 | * The MMU does not have a "valid" bit, so we have to use a dummy | 469 | * The MMU does not have a "valid" bit, so we have to use a dummy |
| @@ -478,7 +479,7 @@ struct ipu3_mmu_info *ipu3_mmu_init(struct device *parent, void __iomem *base) | |||
| 478 | * Allocate a dummy L2 page table with all entries pointing to | 479 | * Allocate a dummy L2 page table with all entries pointing to |
| 479 | * the dummy page. | 480 | * the dummy page. |
| 480 | */ | 481 | */ |
| 481 | mmu->dummy_l2pt = ipu3_mmu_alloc_page_table(pteval); | 482 | mmu->dummy_l2pt = imgu_mmu_alloc_page_table(pteval); |
| 482 | if (!mmu->dummy_l2pt) | 483 | if (!mmu->dummy_l2pt) |
| 483 | goto fail_dummy_page; | 484 | goto fail_dummy_page; |
| 484 | pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->dummy_l2pt)); | 485 | pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->dummy_l2pt)); |
| @@ -493,14 +494,14 @@ struct ipu3_mmu_info *ipu3_mmu_init(struct device *parent, void __iomem *base) | |||
| 493 | goto fail_l2pt; | 494 | goto fail_l2pt; |
| 494 | 495 | ||
| 495 | /* Allocate the L1 page table. */ | 496 | /* Allocate the L1 page table. */ |
| 496 | mmu->l1pt = ipu3_mmu_alloc_page_table(mmu->dummy_l2pt_pteval); | 497 | mmu->l1pt = imgu_mmu_alloc_page_table(mmu->dummy_l2pt_pteval); |
| 497 | if (!mmu->l1pt) | 498 | if (!mmu->l1pt) |
| 498 | goto fail_l2pts; | 499 | goto fail_l2pts; |
| 499 | 500 | ||
| 500 | pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->l1pt)); | 501 | pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->l1pt)); |
| 501 | writel(pteval, mmu->base + REG_L1_PHYS); | 502 | writel(pteval, mmu->base + REG_L1_PHYS); |
| 502 | ipu3_mmu_tlb_invalidate(mmu); | 503 | imgu_mmu_tlb_invalidate(mmu); |
| 503 | ipu3_mmu_set_halt(mmu, false); | 504 | imgu_mmu_set_halt(mmu, false); |
| 504 | 505 | ||
| 505 | mmu->geometry.aperture_start = 0; | 506 | mmu->geometry.aperture_start = 0; |
| 506 | mmu->geometry.aperture_end = DMA_BIT_MASK(IPU3_MMU_ADDRESS_BITS); | 507 | mmu->geometry.aperture_end = DMA_BIT_MASK(IPU3_MMU_ADDRESS_BITS); |
| @@ -511,7 +512,7 @@ struct ipu3_mmu_info *ipu3_mmu_init(struct device *parent, void __iomem *base) | |||
| 511 | fail_l2pts: | 512 | fail_l2pts: |
| 512 | vfree(mmu->l2pts); | 513 | vfree(mmu->l2pts); |
| 513 | fail_l2pt: | 514 | fail_l2pt: |
| 514 | ipu3_mmu_free_page_table(mmu->dummy_l2pt); | 515 | imgu_mmu_free_page_table(mmu->dummy_l2pt); |
| 515 | fail_dummy_page: | 516 | fail_dummy_page: |
| 516 | free_page((unsigned long)mmu->dummy_page); | 517 | free_page((unsigned long)mmu->dummy_page); |
| 517 | fail_group: | 518 | fail_group: |
| @@ -521,41 +522,41 @@ fail_group: | |||
| 521 | } | 522 | } |
| 522 | 523 | ||
| 523 | /** | 524 | /** |
| 524 | * ipu3_mmu_exit() - clean up IPU3 MMU block | 525 | * imgu_mmu_exit() - clean up IPU3 MMU block |
| 525 | * @mmu: IPU3 MMU private data | 526 | * @info: IPU3 MMU private data |
| 526 | */ | 527 | */ |
| 527 | void ipu3_mmu_exit(struct ipu3_mmu_info *info) | 528 | void imgu_mmu_exit(struct imgu_mmu_info *info) |
| 528 | { | 529 | { |
| 529 | struct ipu3_mmu *mmu = to_ipu3_mmu(info); | 530 | struct imgu_mmu *mmu = to_imgu_mmu(info); |
| 530 | 531 | ||
| 531 | /* We are going to free our page tables, no more memory access. */ | 532 | /* We are going to free our page tables, no more memory access. */ |
| 532 | ipu3_mmu_set_halt(mmu, true); | 533 | imgu_mmu_set_halt(mmu, true); |
| 533 | ipu3_mmu_tlb_invalidate(mmu); | 534 | imgu_mmu_tlb_invalidate(mmu); |
| 534 | 535 | ||
| 535 | ipu3_mmu_free_page_table(mmu->l1pt); | 536 | imgu_mmu_free_page_table(mmu->l1pt); |
| 536 | vfree(mmu->l2pts); | 537 | vfree(mmu->l2pts); |
| 537 | ipu3_mmu_free_page_table(mmu->dummy_l2pt); | 538 | imgu_mmu_free_page_table(mmu->dummy_l2pt); |
| 538 | free_page((unsigned long)mmu->dummy_page); | 539 | free_page((unsigned long)mmu->dummy_page); |
| 539 | kfree(mmu); | 540 | kfree(mmu); |
| 540 | } | 541 | } |
| 541 | 542 | ||
| 542 | void ipu3_mmu_suspend(struct ipu3_mmu_info *info) | 543 | void imgu_mmu_suspend(struct imgu_mmu_info *info) |
| 543 | { | 544 | { |
| 544 | struct ipu3_mmu *mmu = to_ipu3_mmu(info); | 545 | struct imgu_mmu *mmu = to_imgu_mmu(info); |
| 545 | 546 | ||
| 546 | ipu3_mmu_set_halt(mmu, true); | 547 | imgu_mmu_set_halt(mmu, true); |
| 547 | } | 548 | } |
| 548 | 549 | ||
| 549 | void ipu3_mmu_resume(struct ipu3_mmu_info *info) | 550 | void imgu_mmu_resume(struct imgu_mmu_info *info) |
| 550 | { | 551 | { |
| 551 | struct ipu3_mmu *mmu = to_ipu3_mmu(info); | 552 | struct imgu_mmu *mmu = to_imgu_mmu(info); |
| 552 | u32 pteval; | 553 | u32 pteval; |
| 553 | 554 | ||
| 554 | ipu3_mmu_set_halt(mmu, true); | 555 | imgu_mmu_set_halt(mmu, true); |
| 555 | 556 | ||
| 556 | pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->l1pt)); | 557 | pteval = IPU3_ADDR2PTE(virt_to_phys(mmu->l1pt)); |
| 557 | writel(pteval, mmu->base + REG_L1_PHYS); | 558 | writel(pteval, mmu->base + REG_L1_PHYS); |
| 558 | 559 | ||
| 559 | ipu3_mmu_tlb_invalidate(mmu); | 560 | imgu_mmu_tlb_invalidate(mmu); |
| 560 | ipu3_mmu_set_halt(mmu, false); | 561 | imgu_mmu_set_halt(mmu, false); |
| 561 | } | 562 | } |
diff --git a/drivers/staging/media/ipu3/ipu3-mmu.h b/drivers/staging/media/ipu3/ipu3-mmu.h index 8fe63b4c6e1c..fa58827eb19c 100644 --- a/drivers/staging/media/ipu3/ipu3-mmu.h +++ b/drivers/staging/media/ipu3/ipu3-mmu.h | |||
| @@ -6,13 +6,13 @@ | |||
| 6 | #define __IPU3_MMU_H | 6 | #define __IPU3_MMU_H |
| 7 | 7 | ||
| 8 | /** | 8 | /** |
| 9 | * struct ipu3_mmu_info - Describes mmu geometry | 9 | * struct imgu_mmu_info - Describes mmu geometry |
| 10 | * | 10 | * |
| 11 | * @aperture_start: First address that can be mapped | 11 | * @aperture_start: First address that can be mapped |
| 12 | * @aperture_end: Last address that can be mapped | 12 | * @aperture_end: Last address that can be mapped |
| 13 | * @pgsize_bitmap: Bitmap of page sizes in use | 13 | * @pgsize_bitmap: Bitmap of page sizes in use |
| 14 | */ | 14 | */ |
| 15 | struct ipu3_mmu_info { | 15 | struct imgu_mmu_info { |
| 16 | dma_addr_t aperture_start; | 16 | dma_addr_t aperture_start; |
| 17 | dma_addr_t aperture_end; | 17 | dma_addr_t aperture_end; |
| 18 | unsigned long pgsize_bitmap; | 18 | unsigned long pgsize_bitmap; |
| @@ -21,15 +21,15 @@ struct ipu3_mmu_info { | |||
| 21 | struct device; | 21 | struct device; |
| 22 | struct scatterlist; | 22 | struct scatterlist; |
| 23 | 23 | ||
| 24 | struct ipu3_mmu_info *ipu3_mmu_init(struct device *parent, void __iomem *base); | 24 | struct imgu_mmu_info *imgu_mmu_init(struct device *parent, void __iomem *base); |
| 25 | void ipu3_mmu_exit(struct ipu3_mmu_info *info); | 25 | void imgu_mmu_exit(struct imgu_mmu_info *info); |
| 26 | void ipu3_mmu_suspend(struct ipu3_mmu_info *info); | 26 | void imgu_mmu_suspend(struct imgu_mmu_info *info); |
| 27 | void ipu3_mmu_resume(struct ipu3_mmu_info *info); | 27 | void imgu_mmu_resume(struct imgu_mmu_info *info); |
| 28 | 28 | ||
| 29 | int ipu3_mmu_map(struct ipu3_mmu_info *info, unsigned long iova, | 29 | int imgu_mmu_map(struct imgu_mmu_info *info, unsigned long iova, |
| 30 | phys_addr_t paddr, size_t size); | 30 | phys_addr_t paddr, size_t size); |
| 31 | size_t ipu3_mmu_unmap(struct ipu3_mmu_info *info, unsigned long iova, | 31 | size_t imgu_mmu_unmap(struct imgu_mmu_info *info, unsigned long iova, |
| 32 | size_t size); | 32 | size_t size); |
| 33 | size_t ipu3_mmu_map_sg(struct ipu3_mmu_info *info, unsigned long iova, | 33 | size_t imgu_mmu_map_sg(struct imgu_mmu_info *info, unsigned long iova, |
| 34 | struct scatterlist *sg, unsigned int nents); | 34 | struct scatterlist *sg, unsigned int nents); |
| 35 | #endif | 35 | #endif |
diff --git a/drivers/staging/media/ipu3/ipu3-tables.c b/drivers/staging/media/ipu3/ipu3-tables.c index 334517987eba..3a3730bd4395 100644 --- a/drivers/staging/media/ipu3/ipu3-tables.c +++ b/drivers/staging/media/ipu3/ipu3-tables.c | |||
| @@ -5,8 +5,8 @@ | |||
| 5 | 5 | ||
| 6 | #define X 0 /* Don't care value */ | 6 | #define X 0 /* Don't care value */ |
| 7 | 7 | ||
| 8 | const struct ipu3_css_bds_config | 8 | const struct imgu_css_bds_config |
| 9 | ipu3_css_bds_configs[IMGU_BDS_CONFIG_LEN] = { { | 9 | imgu_css_bds_configs[IMGU_BDS_CONFIG_LEN] = { { |
| 10 | /* Scale factor 32 / (32 + 0) = 1 */ | 10 | /* Scale factor 32 / (32 + 0) = 1 */ |
| 11 | .hor_phase_arr = { | 11 | .hor_phase_arr = { |
| 12 | .even = { { 0, 0, 64, 6, 0, 0, 0 } }, | 12 | .even = { { 0, 0, 64, 6, 0, 0, 0 } }, |
| @@ -9015,7 +9015,7 @@ const struct ipu3_css_bds_config | |||
| 9015 | .ver_ds_en = 1 | 9015 | .ver_ds_en = 1 |
| 9016 | } }; | 9016 | } }; |
| 9017 | 9017 | ||
| 9018 | const s32 ipu3_css_downscale_4taps[IMGU_SCALER_DOWNSCALE_4TAPS_LEN] = { | 9018 | const s32 imgu_css_downscale_4taps[IMGU_SCALER_DOWNSCALE_4TAPS_LEN] = { |
| 9019 | IMGU_SCALER_FP * -0.000000000000000, | 9019 | IMGU_SCALER_FP * -0.000000000000000, |
| 9020 | IMGU_SCALER_FP * -0.000249009327023, | 9020 | IMGU_SCALER_FP * -0.000249009327023, |
| 9021 | IMGU_SCALER_FP * -0.001022241683322, | 9021 | IMGU_SCALER_FP * -0.001022241683322, |
| @@ -9146,7 +9146,7 @@ const s32 ipu3_css_downscale_4taps[IMGU_SCALER_DOWNSCALE_4TAPS_LEN] = { | |||
| 9146 | IMGU_SCALER_FP * -0.000249009327023 | 9146 | IMGU_SCALER_FP * -0.000249009327023 |
| 9147 | }; | 9147 | }; |
| 9148 | 9148 | ||
| 9149 | const s32 ipu3_css_downscale_2taps[IMGU_SCALER_DOWNSCALE_2TAPS_LEN] = { | 9149 | const s32 imgu_css_downscale_2taps[IMGU_SCALER_DOWNSCALE_2TAPS_LEN] = { |
| 9150 | IMGU_SCALER_FP * 0.074300676367033, | 9150 | IMGU_SCALER_FP * 0.074300676367033, |
| 9151 | IMGU_SCALER_FP * 0.094030234498392, | 9151 | IMGU_SCALER_FP * 0.094030234498392, |
| 9152 | IMGU_SCALER_FP * 0.115522859526596, | 9152 | IMGU_SCALER_FP * 0.115522859526596, |
| @@ -9214,7 +9214,7 @@ const s32 ipu3_css_downscale_2taps[IMGU_SCALER_DOWNSCALE_2TAPS_LEN] = { | |||
| 9214 | }; | 9214 | }; |
| 9215 | 9215 | ||
| 9216 | /* settings for Geometric Distortion Correction */ | 9216 | /* settings for Geometric Distortion Correction */ |
| 9217 | const s16 ipu3_css_gdc_lut[4][256] = { { | 9217 | const s16 imgu_css_gdc_lut[4][256] = { { |
| 9218 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -2, -2, -2, | 9218 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -2, -2, -2, |
| 9219 | -2, -3, -3, -3, -4, -4, -4, -5, -5, -5, -6, -6, -7, -7, -7, -8, -8, | 9219 | -2, -3, -3, -3, -4, -4, -4, -5, -5, -5, -6, -6, -7, -7, -7, -8, -8, |
| 9220 | -9, -9, -10, -10, -11, -11, -12, -12, -13, -13, -14, -14, -15, -15, | 9220 | -9, -9, -10, -10, -11, -11, -12, -12, -13, -13, -14, -14, -15, -15, |
| @@ -9292,7 +9292,7 @@ const s16 ipu3_css_gdc_lut[4][256] = { { | |||
| 9292 | -1, 0, 1, 0, 0, 0, 0, 0, 0, 0 | 9292 | -1, 0, 1, 0, 0, 0, 0, 0, 0, 0 |
| 9293 | } }; | 9293 | } }; |
| 9294 | 9294 | ||
| 9295 | const struct ipu3_css_xnr3_vmem_defaults ipu3_css_xnr3_vmem_defaults = { | 9295 | const struct imgu_css_xnr3_vmem_defaults imgu_css_xnr3_vmem_defaults = { |
| 9296 | .x = { | 9296 | .x = { |
| 9297 | 1024, 1164, 1320, 1492, 1680, 1884, 2108, 2352, | 9297 | 1024, 1164, 1320, 1492, 1680, 1884, 2108, 2352, |
| 9298 | 2616, 2900, 3208, 3540, 3896, 4276, 4684, 5120 | 9298 | 2616, 2900, 3208, 3540, 3896, 4276, 4684, 5120 |
| @@ -9311,7 +9311,7 @@ const struct ipu3_css_xnr3_vmem_defaults ipu3_css_xnr3_vmem_defaults = { | |||
| 9311 | }; | 9311 | }; |
| 9312 | 9312 | ||
| 9313 | /* settings for Bayer Noise Reduction */ | 9313 | /* settings for Bayer Noise Reduction */ |
| 9314 | const struct ipu3_uapi_bnr_static_config ipu3_css_bnr_defaults = { | 9314 | const struct ipu3_uapi_bnr_static_config imgu_css_bnr_defaults = { |
| 9315 | { 16, 16, 16, 16 }, /* wb_gains */ | 9315 | { 16, 16, 16, 16 }, /* wb_gains */ |
| 9316 | { 16, 16, 16, 16 }, /* wb_gains_thr */ | 9316 | { 16, 16, 16, 16 }, /* wb_gains_thr */ |
| 9317 | { 0, X, 8, 6, X, 14 }, /* thr_coeffs */ | 9317 | { 0, X, 8, 6, X, 14 }, /* thr_coeffs */ |
| @@ -9327,18 +9327,18 @@ const struct ipu3_uapi_bnr_static_config ipu3_css_bnr_defaults = { | |||
| 9327 | { 8, 4, 4, X, 8, X, 1, 1, 1, 1 }, /* dn_detect_ctrl */ | 9327 | { 8, 4, 4, X, 8, X, 1, 1, 1, 1 }, /* dn_detect_ctrl */ |
| 9328 | }; | 9328 | }; |
| 9329 | 9329 | ||
| 9330 | const struct ipu3_uapi_dm_config ipu3_css_dm_defaults = { | 9330 | const struct ipu3_uapi_dm_config imgu_css_dm_defaults = { |
| 9331 | 1, 1, 1, X, X, 8, X, 7, X, 8, X, 8, X, 4, X | 9331 | 1, 1, 1, X, X, 8, X, 7, X, 8, X, 8, X, 4, X |
| 9332 | }; | 9332 | }; |
| 9333 | 9333 | ||
| 9334 | const struct ipu3_uapi_ccm_mat_config ipu3_css_ccm_defaults = { | 9334 | const struct ipu3_uapi_ccm_mat_config imgu_css_ccm_defaults = { |
| 9335 | 9775, -2671, 1087, 0, | 9335 | 9775, -2671, 1087, 0, |
| 9336 | -1071, 8303, 815, 0, | 9336 | -1071, 8303, 815, 0, |
| 9337 | -23, -7887, 16103, 0 | 9337 | -23, -7887, 16103, 0 |
| 9338 | }; | 9338 | }; |
| 9339 | 9339 | ||
| 9340 | /* settings for Gamma correction */ | 9340 | /* settings for Gamma correction */ |
| 9341 | const struct ipu3_uapi_gamma_corr_lut ipu3_css_gamma_lut = { { | 9341 | const struct ipu3_uapi_gamma_corr_lut imgu_css_gamma_lut = { { |
| 9342 | 63, 79, 95, 111, 127, 143, 159, 175, 191, 207, 223, 239, 255, 271, 287, | 9342 | 63, 79, 95, 111, 127, 143, 159, 175, 191, 207, 223, 239, 255, 271, 287, |
| 9343 | 303, 319, 335, 351, 367, 383, 399, 415, 431, 447, 463, 479, 495, 511, | 9343 | 303, 319, 335, 351, 367, 383, 399, 415, 431, 447, 463, 479, 495, 511, |
| 9344 | 527, 543, 559, 575, 591, 607, 623, 639, 655, 671, 687, 703, 719, 735, | 9344 | 527, 543, 559, 575, 591, 607, 623, 639, 655, 671, 687, 703, 719, 735, |
| @@ -9362,13 +9362,13 @@ const struct ipu3_uapi_gamma_corr_lut ipu3_css_gamma_lut = { { | |||
| 9362 | 7807, 7871, 7935, 7999, 8063, 8127, 8191 | 9362 | 7807, 7871, 7935, 7999, 8063, 8127, 8191 |
| 9363 | } }; | 9363 | } }; |
| 9364 | 9364 | ||
| 9365 | const struct ipu3_uapi_csc_mat_config ipu3_css_csc_defaults = { | 9365 | const struct ipu3_uapi_csc_mat_config imgu_css_csc_defaults = { |
| 9366 | 4898, 9617, 1867, 0, | 9366 | 4898, 9617, 1867, 0, |
| 9367 | -2410, -4732, 7143, 0, | 9367 | -2410, -4732, 7143, 0, |
| 9368 | 10076, -8437, -1638, 0 | 9368 | 10076, -8437, -1638, 0 |
| 9369 | }; | 9369 | }; |
| 9370 | 9370 | ||
| 9371 | const struct ipu3_uapi_cds_params ipu3_css_cds_defaults = { | 9371 | const struct ipu3_uapi_cds_params imgu_css_cds_defaults = { |
| 9372 | 1, 3, 3, 1, | 9372 | 1, 3, 3, 1, |
| 9373 | 1, 3, 3, 1, | 9373 | 1, 3, 3, 1, |
| 9374 | 4, X, /* ds_nf */ | 9374 | 4, X, /* ds_nf */ |
| @@ -9376,7 +9376,7 @@ const struct ipu3_uapi_cds_params ipu3_css_cds_defaults = { | |||
| 9376 | 0, X /* uv_bin_output */ | 9376 | 0, X /* uv_bin_output */ |
| 9377 | }; | 9377 | }; |
| 9378 | 9378 | ||
| 9379 | const struct ipu3_uapi_shd_config_static ipu3_css_shd_defaults = { | 9379 | const struct ipu3_uapi_shd_config_static imgu_css_shd_defaults = { |
| 9380 | .grid = { | 9380 | .grid = { |
| 9381 | .width = 73, | 9381 | .width = 73, |
| 9382 | .height = 55, | 9382 | .height = 55, |
| @@ -9397,7 +9397,7 @@ const struct ipu3_uapi_shd_config_static ipu3_css_shd_defaults = { | |||
| 9397 | }, | 9397 | }, |
| 9398 | }; | 9398 | }; |
| 9399 | 9399 | ||
| 9400 | const struct ipu3_uapi_yuvp1_iefd_config ipu3_css_iefd_defaults = { | 9400 | const struct ipu3_uapi_yuvp1_iefd_config imgu_css_iefd_defaults = { |
| 9401 | .units = { | 9401 | .units = { |
| 9402 | .cu_1 = { 0, 150, 7, 0 }, | 9402 | .cu_1 = { 0, 150, 7, 0 }, |
| 9403 | .cu_ed = { 7, 110, 244, X, 307, 409, 511, X, | 9403 | .cu_ed = { 7, 110, 244, X, 307, 409, 511, X, |
| @@ -9436,17 +9436,17 @@ const struct ipu3_uapi_yuvp1_iefd_config ipu3_css_iefd_defaults = { | |||
| 9436 | { 1, X, 2, X, 8, X } }, | 9436 | { 1, X, 2, X, 8, X } }, |
| 9437 | }; | 9437 | }; |
| 9438 | 9438 | ||
| 9439 | const struct ipu3_uapi_yuvp1_yds_config ipu3_css_yds_defaults = { | 9439 | const struct ipu3_uapi_yuvp1_yds_config imgu_css_yds_defaults = { |
| 9440 | 0, 1, 1, 0, 0, 1, 1, 0, 2, X, 0, X | 9440 | 0, 1, 1, 0, 0, 1, 1, 0, 2, X, 0, X |
| 9441 | }; | 9441 | }; |
| 9442 | 9442 | ||
| 9443 | const struct ipu3_uapi_yuvp1_chnr_config ipu3_css_chnr_defaults = { | 9443 | const struct ipu3_uapi_yuvp1_chnr_config imgu_css_chnr_defaults = { |
| 9444 | .coring = { 0, X, 0, X }, | 9444 | .coring = { 0, X, 0, X }, |
| 9445 | .sense_gain = { 6, 6, 6, X, 4, 4, 4, X }, | 9445 | .sense_gain = { 6, 6, 6, X, 4, 4, 4, X }, |
| 9446 | .iir_fir = { 8, X, 12, X, 0, 256 - 127, X }, | 9446 | .iir_fir = { 8, X, 12, X, 0, 256 - 127, X }, |
| 9447 | }; | 9447 | }; |
| 9448 | 9448 | ||
| 9449 | const struct ipu3_uapi_yuvp1_y_ee_nr_config ipu3_css_y_ee_nr_defaults = { | 9449 | const struct ipu3_uapi_yuvp1_y_ee_nr_config imgu_css_y_ee_nr_defaults = { |
| 9450 | .lpf = { 4, X, 8, X, 16, X, 0 }, | 9450 | .lpf = { 4, X, 8, X, 16, X, 0 }, |
| 9451 | .sense = { 8191, X, 0, X, 8191, X, 0, X }, | 9451 | .sense = { 8191, X, 0, X, 8191, X, 0, X }, |
| 9452 | .gain = { 8, X, 0, X, 8, X, 0, X }, | 9452 | .gain = { 8, X, 0, X, 8, X, 0, X }, |
| @@ -9457,7 +9457,7 @@ const struct ipu3_uapi_yuvp1_y_ee_nr_config ipu3_css_y_ee_nr_defaults = { | |||
| 9457 | }; | 9457 | }; |
| 9458 | 9458 | ||
| 9459 | const struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config | 9459 | const struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config |
| 9460 | ipu3_css_tcc_gain_pcwl_lut = { { | 9460 | imgu_css_tcc_gain_pcwl_lut = { { |
| 9461 | 1024, 1032, 1040, 1048, 1057, 1065, 1073, 1081, 1089, 1097, 1105, 1113, | 9461 | 1024, 1032, 1040, 1048, 1057, 1065, 1073, 1081, 1089, 1097, 1105, 1113, |
| 9462 | 1122, 1130, 1138, 1146, 1154, 1162, 1170, 1178, 1187, 1195, 1203, 1211, | 9462 | 1122, 1130, 1138, 1146, 1154, 1162, 1170, 1178, 1187, 1195, 1203, 1211, |
| 9463 | 1219, 1227, 1235, 1243, 1252, 1260, 1268, 1276, 1284, 1292, 1300, 1308, | 9463 | 1219, 1227, 1235, 1243, 1252, 1260, 1268, 1276, 1284, 1292, 1300, 1308, |
| @@ -9483,12 +9483,12 @@ const struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config | |||
| 9483 | } }; | 9483 | } }; |
| 9484 | 9484 | ||
| 9485 | const struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config | 9485 | const struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config |
| 9486 | ipu3_css_tcc_r_sqr_lut = { { | 9486 | imgu_css_tcc_r_sqr_lut = { { |
| 9487 | 32, 44, 64, 92, 128, 180, 256, 364, 512, 628, 724, 808, 888, | 9487 | 32, 44, 64, 92, 128, 180, 256, 364, 512, 628, 724, 808, 888, |
| 9488 | 956, 1024, 1088, 1144, 1200, 1256, 1304, 1356, 1404, 1448 | 9488 | 956, 1024, 1088, 1144, 1200, 1256, 1304, 1356, 1404, 1448 |
| 9489 | } }; | 9489 | } }; |
| 9490 | 9490 | ||
| 9491 | const struct imgu_abi_anr_config ipu3_css_anr_defaults = { | 9491 | const struct imgu_abi_anr_config imgu_css_anr_defaults = { |
| 9492 | .transform = { | 9492 | .transform = { |
| 9493 | .adaptive_treshhold_en = 1, | 9493 | .adaptive_treshhold_en = 1, |
| 9494 | .alpha = { { 13, 13, 13, 13, 0, 0, 0, 0}, | 9494 | .alpha = { { 13, 13, 13, 13, 0, 0, 0, 0}, |
| @@ -9545,7 +9545,7 @@ const struct imgu_abi_anr_config ipu3_css_anr_defaults = { | |||
| 9545 | }; | 9545 | }; |
| 9546 | 9546 | ||
| 9547 | /* frame settings for Auto White Balance */ | 9547 | /* frame settings for Auto White Balance */ |
| 9548 | const struct ipu3_uapi_awb_fr_config_s ipu3_css_awb_fr_defaults = { | 9548 | const struct ipu3_uapi_awb_fr_config_s imgu_css_awb_fr_defaults = { |
| 9549 | .grid_cfg = { | 9549 | .grid_cfg = { |
| 9550 | .width = 16, | 9550 | .width = 16, |
| 9551 | .height = 16, | 9551 | .height = 16, |
| @@ -9560,7 +9560,7 @@ const struct ipu3_uapi_awb_fr_config_s ipu3_css_awb_fr_defaults = { | |||
| 9560 | }; | 9560 | }; |
| 9561 | 9561 | ||
| 9562 | /* settings for Auto Exposure */ | 9562 | /* settings for Auto Exposure */ |
| 9563 | const struct ipu3_uapi_ae_grid_config ipu3_css_ae_grid_defaults = { | 9563 | const struct ipu3_uapi_ae_grid_config imgu_css_ae_grid_defaults = { |
| 9564 | .width = 16, | 9564 | .width = 16, |
| 9565 | .height = 16, | 9565 | .height = 16, |
| 9566 | .block_width_log2 = 3, | 9566 | .block_width_log2 = 3, |
| @@ -9571,13 +9571,13 @@ const struct ipu3_uapi_ae_grid_config ipu3_css_ae_grid_defaults = { | |||
| 9571 | }; | 9571 | }; |
| 9572 | 9572 | ||
| 9573 | /* settings for Auto Exposure color correction matrix */ | 9573 | /* settings for Auto Exposure color correction matrix */ |
| 9574 | const struct ipu3_uapi_ae_ccm ipu3_css_ae_ccm_defaults = { | 9574 | const struct ipu3_uapi_ae_ccm imgu_css_ae_ccm_defaults = { |
| 9575 | 256, 256, 256, 256, /* gain_gr/r/b/gb */ | 9575 | 256, 256, 256, 256, /* gain_gr/r/b/gb */ |
| 9576 | .mat = { 128, 0, 0, 0, 0, 128, 0, 0, 0, 0, 128, 0, 0, 0, 0, 128 }, | 9576 | .mat = { 128, 0, 0, 0, 0, 128, 0, 0, 0, 0, 128, 0, 0, 0, 0, 128 }, |
| 9577 | }; | 9577 | }; |
| 9578 | 9578 | ||
| 9579 | /* settings for Auto Focus */ | 9579 | /* settings for Auto Focus */ |
| 9580 | const struct ipu3_uapi_af_config_s ipu3_css_af_defaults = { | 9580 | const struct ipu3_uapi_af_config_s imgu_css_af_defaults = { |
| 9581 | .filter_config = { | 9581 | .filter_config = { |
| 9582 | { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 128 }, 0, | 9582 | { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 128 }, 0, |
| 9583 | { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 128 }, 0, | 9583 | { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 128 }, 0, |
| @@ -9595,7 +9595,7 @@ const struct ipu3_uapi_af_config_s ipu3_css_af_defaults = { | |||
| 9595 | }; | 9595 | }; |
| 9596 | 9596 | ||
| 9597 | /* settings for Auto White Balance */ | 9597 | /* settings for Auto White Balance */ |
| 9598 | const struct ipu3_uapi_awb_config_s ipu3_css_awb_defaults = { | 9598 | const struct ipu3_uapi_awb_config_s imgu_css_awb_defaults = { |
| 9599 | 8191, 8191, 8191, 8191 | /* rgbs_thr_gr/r/gb/b */ | 9599 | 8191, 8191, 8191, 8191 | /* rgbs_thr_gr/r/gb/b */ |
| 9600 | IPU3_UAPI_AWB_RGBS_THR_B_EN | IPU3_UAPI_AWB_RGBS_THR_B_INCL_SAT, | 9600 | IPU3_UAPI_AWB_RGBS_THR_B_EN | IPU3_UAPI_AWB_RGBS_THR_B_INCL_SAT, |
| 9601 | .grid = { | 9601 | .grid = { |
diff --git a/drivers/staging/media/ipu3/ipu3-tables.h b/drivers/staging/media/ipu3/ipu3-tables.h index 6563782cbd22..a1bf3286f380 100644 --- a/drivers/staging/media/ipu3/ipu3-tables.h +++ b/drivers/staging/media/ipu3/ipu3-tables.h | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #define IMGU_GDC_LUT_UNIT 4 | 19 | #define IMGU_GDC_LUT_UNIT 4 |
| 20 | #define IMGU_GDC_LUT_LEN 256 | 20 | #define IMGU_GDC_LUT_LEN 256 |
| 21 | 21 | ||
| 22 | struct ipu3_css_bds_config { | 22 | struct imgu_css_bds_config { |
| 23 | struct imgu_abi_bds_phase_arr hor_phase_arr; | 23 | struct imgu_abi_bds_phase_arr hor_phase_arr; |
| 24 | struct imgu_abi_bds_phase_arr ver_phase_arr; | 24 | struct imgu_abi_bds_phase_arr ver_phase_arr; |
| 25 | struct imgu_abi_bds_ptrn_arr ptrn_arr; | 25 | struct imgu_abi_bds_ptrn_arr ptrn_arr; |
| @@ -28,39 +28,39 @@ struct ipu3_css_bds_config { | |||
| 28 | u8 ver_ds_en; | 28 | u8 ver_ds_en; |
| 29 | }; | 29 | }; |
| 30 | 30 | ||
| 31 | struct ipu3_css_xnr3_vmem_defaults { | 31 | struct imgu_css_xnr3_vmem_defaults { |
| 32 | s16 x[IMGU_XNR3_VMEM_LUT_LEN]; | 32 | s16 x[IMGU_XNR3_VMEM_LUT_LEN]; |
| 33 | s16 a[IMGU_XNR3_VMEM_LUT_LEN]; | 33 | s16 a[IMGU_XNR3_VMEM_LUT_LEN]; |
| 34 | s16 b[IMGU_XNR3_VMEM_LUT_LEN]; | 34 | s16 b[IMGU_XNR3_VMEM_LUT_LEN]; |
| 35 | s16 c[IMGU_XNR3_VMEM_LUT_LEN]; | 35 | s16 c[IMGU_XNR3_VMEM_LUT_LEN]; |
| 36 | }; | 36 | }; |
| 37 | 37 | ||
| 38 | extern const struct ipu3_css_bds_config | 38 | extern const struct imgu_css_bds_config |
| 39 | ipu3_css_bds_configs[IMGU_BDS_CONFIG_LEN]; | 39 | imgu_css_bds_configs[IMGU_BDS_CONFIG_LEN]; |
| 40 | extern const s32 ipu3_css_downscale_4taps[IMGU_SCALER_DOWNSCALE_4TAPS_LEN]; | 40 | extern const s32 imgu_css_downscale_4taps[IMGU_SCALER_DOWNSCALE_4TAPS_LEN]; |
| 41 | extern const s32 ipu3_css_downscale_2taps[IMGU_SCALER_DOWNSCALE_2TAPS_LEN]; | 41 | extern const s32 imgu_css_downscale_2taps[IMGU_SCALER_DOWNSCALE_2TAPS_LEN]; |
| 42 | extern const s16 ipu3_css_gdc_lut[IMGU_GDC_LUT_UNIT][IMGU_GDC_LUT_LEN]; | 42 | extern const s16 imgu_css_gdc_lut[IMGU_GDC_LUT_UNIT][IMGU_GDC_LUT_LEN]; |
| 43 | extern const struct ipu3_css_xnr3_vmem_defaults ipu3_css_xnr3_vmem_defaults; | 43 | extern const struct imgu_css_xnr3_vmem_defaults imgu_css_xnr3_vmem_defaults; |
| 44 | extern const struct ipu3_uapi_bnr_static_config ipu3_css_bnr_defaults; | 44 | extern const struct ipu3_uapi_bnr_static_config imgu_css_bnr_defaults; |
| 45 | extern const struct ipu3_uapi_dm_config ipu3_css_dm_defaults; | 45 | extern const struct ipu3_uapi_dm_config imgu_css_dm_defaults; |
| 46 | extern const struct ipu3_uapi_ccm_mat_config ipu3_css_ccm_defaults; | 46 | extern const struct ipu3_uapi_ccm_mat_config imgu_css_ccm_defaults; |
| 47 | extern const struct ipu3_uapi_gamma_corr_lut ipu3_css_gamma_lut; | 47 | extern const struct ipu3_uapi_gamma_corr_lut imgu_css_gamma_lut; |
| 48 | extern const struct ipu3_uapi_csc_mat_config ipu3_css_csc_defaults; | 48 | extern const struct ipu3_uapi_csc_mat_config imgu_css_csc_defaults; |
| 49 | extern const struct ipu3_uapi_cds_params ipu3_css_cds_defaults; | 49 | extern const struct ipu3_uapi_cds_params imgu_css_cds_defaults; |
| 50 | extern const struct ipu3_uapi_shd_config_static ipu3_css_shd_defaults; | 50 | extern const struct ipu3_uapi_shd_config_static imgu_css_shd_defaults; |
| 51 | extern const struct ipu3_uapi_yuvp1_iefd_config ipu3_css_iefd_defaults; | 51 | extern const struct ipu3_uapi_yuvp1_iefd_config imgu_css_iefd_defaults; |
| 52 | extern const struct ipu3_uapi_yuvp1_yds_config ipu3_css_yds_defaults; | 52 | extern const struct ipu3_uapi_yuvp1_yds_config imgu_css_yds_defaults; |
| 53 | extern const struct ipu3_uapi_yuvp1_chnr_config ipu3_css_chnr_defaults; | 53 | extern const struct ipu3_uapi_yuvp1_chnr_config imgu_css_chnr_defaults; |
| 54 | extern const struct ipu3_uapi_yuvp1_y_ee_nr_config ipu3_css_y_ee_nr_defaults; | 54 | extern const struct ipu3_uapi_yuvp1_y_ee_nr_config imgu_css_y_ee_nr_defaults; |
| 55 | extern const struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config | 55 | extern const struct ipu3_uapi_yuvp2_tcc_gain_pcwl_lut_static_config |
| 56 | ipu3_css_tcc_gain_pcwl_lut; | 56 | imgu_css_tcc_gain_pcwl_lut; |
| 57 | extern const struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config | 57 | extern const struct ipu3_uapi_yuvp2_tcc_r_sqr_lut_static_config |
| 58 | ipu3_css_tcc_r_sqr_lut; | 58 | imgu_css_tcc_r_sqr_lut; |
| 59 | extern const struct imgu_abi_anr_config ipu3_css_anr_defaults; | 59 | extern const struct imgu_abi_anr_config imgu_css_anr_defaults; |
| 60 | extern const struct ipu3_uapi_awb_fr_config_s ipu3_css_awb_fr_defaults; | 60 | extern const struct ipu3_uapi_awb_fr_config_s imgu_css_awb_fr_defaults; |
| 61 | extern const struct ipu3_uapi_ae_grid_config ipu3_css_ae_grid_defaults; | 61 | extern const struct ipu3_uapi_ae_grid_config imgu_css_ae_grid_defaults; |
| 62 | extern const struct ipu3_uapi_ae_ccm ipu3_css_ae_ccm_defaults; | 62 | extern const struct ipu3_uapi_ae_ccm imgu_css_ae_ccm_defaults; |
| 63 | extern const struct ipu3_uapi_af_config_s ipu3_css_af_defaults; | 63 | extern const struct ipu3_uapi_af_config_s imgu_css_af_defaults; |
| 64 | extern const struct ipu3_uapi_awb_config_s ipu3_css_awb_defaults; | 64 | extern const struct ipu3_uapi_awb_config_s imgu_css_awb_defaults; |
| 65 | 65 | ||
| 66 | #endif | 66 | #endif |
diff --git a/drivers/staging/media/ipu3/ipu3-v4l2.c b/drivers/staging/media/ipu3/ipu3-v4l2.c index c7936032beb9..9c0352b193a7 100644 --- a/drivers/staging/media/ipu3/ipu3-v4l2.c +++ b/drivers/staging/media/ipu3/ipu3-v4l2.c | |||
| @@ -12,7 +12,10 @@ | |||
| 12 | 12 | ||
| 13 | /******************** v4l2_subdev_ops ********************/ | 13 | /******************** v4l2_subdev_ops ********************/ |
| 14 | 14 | ||
| 15 | static int ipu3_subdev_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) | 15 | #define IPU3_RUNNING_MODE_VIDEO 0 |
| 16 | #define IPU3_RUNNING_MODE_STILL 1 | ||
| 17 | |||
| 18 | static int imgu_subdev_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) | ||
| 16 | { | 19 | { |
| 17 | struct imgu_v4l2_subdev *imgu_sd = container_of(sd, | 20 | struct imgu_v4l2_subdev *imgu_sd = container_of(sd, |
| 18 | struct imgu_v4l2_subdev, | 21 | struct imgu_v4l2_subdev, |
| @@ -47,7 +50,7 @@ static int ipu3_subdev_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) | |||
| 47 | return 0; | 50 | return 0; |
| 48 | } | 51 | } |
| 49 | 52 | ||
| 50 | static int ipu3_subdev_s_stream(struct v4l2_subdev *sd, int enable) | 53 | static int imgu_subdev_s_stream(struct v4l2_subdev *sd, int enable) |
| 51 | { | 54 | { |
| 52 | int i; | 55 | int i; |
| 53 | unsigned int node; | 56 | unsigned int node; |
| @@ -60,7 +63,7 @@ static int ipu3_subdev_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 60 | struct device *dev = &imgu->pci_dev->dev; | 63 | struct device *dev = &imgu->pci_dev->dev; |
| 61 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES] = { NULL }; | 64 | struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES] = { NULL }; |
| 62 | struct v4l2_rect *rects[IPU3_CSS_RECTS] = { NULL }; | 65 | struct v4l2_rect *rects[IPU3_CSS_RECTS] = { NULL }; |
| 63 | struct ipu3_css_pipe *css_pipe = &imgu->css.pipes[pipe]; | 66 | struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe]; |
| 64 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; | 67 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; |
| 65 | 68 | ||
| 66 | dev_dbg(dev, "%s %d for pipe %d", __func__, enable, pipe); | 69 | dev_dbg(dev, "%s %d for pipe %d", __func__, enable, pipe); |
| @@ -104,7 +107,7 @@ static int ipu3_subdev_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 104 | rects[IPU3_CSS_RECT_BDS] = &imgu_sd->rect.bds; | 107 | rects[IPU3_CSS_RECT_BDS] = &imgu_sd->rect.bds; |
| 105 | rects[IPU3_CSS_RECT_GDC] = &imgu_sd->rect.gdc; | 108 | rects[IPU3_CSS_RECT_GDC] = &imgu_sd->rect.gdc; |
| 106 | 109 | ||
| 107 | r = ipu3_css_fmt_set(&imgu->css, fmts, rects, pipe); | 110 | r = imgu_css_fmt_set(&imgu->css, fmts, rects, pipe); |
| 108 | if (r) { | 111 | if (r) { |
| 109 | dev_err(dev, "failed to set initial formats pipe %d with (%d)", | 112 | dev_err(dev, "failed to set initial formats pipe %d with (%d)", |
| 110 | pipe, r); | 113 | pipe, r); |
| @@ -116,7 +119,7 @@ static int ipu3_subdev_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 116 | return 0; | 119 | return 0; |
| 117 | } | 120 | } |
| 118 | 121 | ||
| 119 | static int ipu3_subdev_get_fmt(struct v4l2_subdev *sd, | 122 | static int imgu_subdev_get_fmt(struct v4l2_subdev *sd, |
| 120 | struct v4l2_subdev_pad_config *cfg, | 123 | struct v4l2_subdev_pad_config *cfg, |
| 121 | struct v4l2_subdev_format *fmt) | 124 | struct v4l2_subdev_format *fmt) |
| 122 | { | 125 | { |
| @@ -140,7 +143,7 @@ static int ipu3_subdev_get_fmt(struct v4l2_subdev *sd, | |||
| 140 | return 0; | 143 | return 0; |
| 141 | } | 144 | } |
| 142 | 145 | ||
| 143 | static int ipu3_subdev_set_fmt(struct v4l2_subdev *sd, | 146 | static int imgu_subdev_set_fmt(struct v4l2_subdev *sd, |
| 144 | struct v4l2_subdev_pad_config *cfg, | 147 | struct v4l2_subdev_pad_config *cfg, |
| 145 | struct v4l2_subdev_format *fmt) | 148 | struct v4l2_subdev_format *fmt) |
| 146 | { | 149 | { |
| @@ -186,7 +189,7 @@ static int ipu3_subdev_set_fmt(struct v4l2_subdev *sd, | |||
| 186 | return 0; | 189 | return 0; |
| 187 | } | 190 | } |
| 188 | 191 | ||
| 189 | static int ipu3_subdev_get_selection(struct v4l2_subdev *sd, | 192 | static int imgu_subdev_get_selection(struct v4l2_subdev *sd, |
| 190 | struct v4l2_subdev_pad_config *cfg, | 193 | struct v4l2_subdev_pad_config *cfg, |
| 191 | struct v4l2_subdev_selection *sel) | 194 | struct v4l2_subdev_selection *sel) |
| 192 | { | 195 | { |
| @@ -219,7 +222,7 @@ static int ipu3_subdev_get_selection(struct v4l2_subdev *sd, | |||
| 219 | return 0; | 222 | return 0; |
| 220 | } | 223 | } |
| 221 | 224 | ||
| 222 | static int ipu3_subdev_set_selection(struct v4l2_subdev *sd, | 225 | static int imgu_subdev_set_selection(struct v4l2_subdev *sd, |
| 223 | struct v4l2_subdev_pad_config *cfg, | 226 | struct v4l2_subdev_pad_config *cfg, |
| 224 | struct v4l2_subdev_selection *sel) | 227 | struct v4l2_subdev_selection *sel) |
| 225 | { | 228 | { |
| @@ -260,7 +263,7 @@ static int ipu3_subdev_set_selection(struct v4l2_subdev *sd, | |||
| 260 | 263 | ||
| 261 | /******************** media_entity_operations ********************/ | 264 | /******************** media_entity_operations ********************/ |
| 262 | 265 | ||
| 263 | static int ipu3_link_setup(struct media_entity *entity, | 266 | static int imgu_link_setup(struct media_entity *entity, |
| 264 | const struct media_pad *local, | 267 | const struct media_pad *local, |
| 265 | const struct media_pad *remote, u32 flags) | 268 | const struct media_pad *remote, u32 flags) |
| 266 | { | 269 | { |
| @@ -299,7 +302,7 @@ static int ipu3_link_setup(struct media_entity *entity, | |||
| 299 | 302 | ||
| 300 | /******************** vb2_ops ********************/ | 303 | /******************** vb2_ops ********************/ |
| 301 | 304 | ||
| 302 | static int ipu3_vb2_buf_init(struct vb2_buffer *vb) | 305 | static int imgu_vb2_buf_init(struct vb2_buffer *vb) |
| 303 | { | 306 | { |
| 304 | struct sg_table *sg = vb2_dma_sg_plane_desc(vb, 0); | 307 | struct sg_table *sg = vb2_dma_sg_plane_desc(vb, 0); |
| 305 | struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); | 308 | struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); |
| @@ -312,11 +315,11 @@ static int ipu3_vb2_buf_init(struct vb2_buffer *vb) | |||
| 312 | if (queue == IPU3_CSS_QUEUE_PARAMS) | 315 | if (queue == IPU3_CSS_QUEUE_PARAMS) |
| 313 | return 0; | 316 | return 0; |
| 314 | 317 | ||
| 315 | return ipu3_dmamap_map_sg(imgu, sg->sgl, sg->nents, &buf->map); | 318 | return imgu_dmamap_map_sg(imgu, sg->sgl, sg->nents, &buf->map); |
| 316 | } | 319 | } |
| 317 | 320 | ||
| 318 | /* Called when each buffer is freed */ | 321 | /* Called when each buffer is freed */ |
| 319 | static void ipu3_vb2_buf_cleanup(struct vb2_buffer *vb) | 322 | static void imgu_vb2_buf_cleanup(struct vb2_buffer *vb) |
| 320 | { | 323 | { |
| 321 | struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); | 324 | struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); |
| 322 | struct imgu_buffer *buf = container_of(vb, | 325 | struct imgu_buffer *buf = container_of(vb, |
| @@ -328,11 +331,11 @@ static void ipu3_vb2_buf_cleanup(struct vb2_buffer *vb) | |||
| 328 | if (queue == IPU3_CSS_QUEUE_PARAMS) | 331 | if (queue == IPU3_CSS_QUEUE_PARAMS) |
| 329 | return; | 332 | return; |
| 330 | 333 | ||
| 331 | ipu3_dmamap_unmap(imgu, &buf->map); | 334 | imgu_dmamap_unmap(imgu, &buf->map); |
| 332 | } | 335 | } |
| 333 | 336 | ||
| 334 | /* Transfer buffer ownership to me */ | 337 | /* Transfer buffer ownership to me */ |
| 335 | static void ipu3_vb2_buf_queue(struct vb2_buffer *vb) | 338 | static void imgu_vb2_buf_queue(struct vb2_buffer *vb) |
| 336 | { | 339 | { |
| 337 | struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); | 340 | struct imgu_device *imgu = vb2_get_drv_priv(vb->vb2_queue); |
| 338 | struct imgu_video_device *node = | 341 | struct imgu_video_device *node = |
| @@ -358,7 +361,7 @@ static void ipu3_vb2_buf_queue(struct vb2_buffer *vb) | |||
| 358 | vb2_set_plane_payload(vb, 0, payload); | 361 | vb2_set_plane_payload(vb, 0, payload); |
| 359 | } | 362 | } |
| 360 | if (payload >= need_bytes) | 363 | if (payload >= need_bytes) |
| 361 | r = ipu3_css_set_parameters(&imgu->css, pipe, | 364 | r = imgu_css_set_parameters(&imgu->css, pipe, |
| 362 | vb2_plane_vaddr(vb, 0)); | 365 | vb2_plane_vaddr(vb, 0)); |
| 363 | buf->flags = V4L2_BUF_FLAG_DONE; | 366 | buf->flags = V4L2_BUF_FLAG_DONE; |
| 364 | vb2_buffer_done(vb, r == 0 ? VB2_BUF_STATE_DONE | 367 | vb2_buffer_done(vb, r == 0 ? VB2_BUF_STATE_DONE |
| @@ -369,7 +372,7 @@ static void ipu3_vb2_buf_queue(struct vb2_buffer *vb) | |||
| 369 | vid_buf.vbb.vb2_buf); | 372 | vid_buf.vbb.vb2_buf); |
| 370 | 373 | ||
| 371 | mutex_lock(&imgu->lock); | 374 | mutex_lock(&imgu->lock); |
| 372 | ipu3_css_buf_init(&buf->css_buf, queue, buf->map.daddr); | 375 | imgu_css_buf_init(&buf->css_buf, queue, buf->map.daddr); |
| 373 | list_add_tail(&buf->vid_buf.list, | 376 | list_add_tail(&buf->vid_buf.list, |
| 374 | &node->buffers); | 377 | &node->buffers); |
| 375 | mutex_unlock(&imgu->lock); | 378 | mutex_unlock(&imgu->lock); |
| @@ -385,7 +388,7 @@ static void ipu3_vb2_buf_queue(struct vb2_buffer *vb) | |||
| 385 | 388 | ||
| 386 | } | 389 | } |
| 387 | 390 | ||
| 388 | static int ipu3_vb2_queue_setup(struct vb2_queue *vq, | 391 | static int imgu_vb2_queue_setup(struct vb2_queue *vq, |
| 389 | unsigned int *num_buffers, | 392 | unsigned int *num_buffers, |
| 390 | unsigned int *num_planes, | 393 | unsigned int *num_planes, |
| 391 | unsigned int sizes[], | 394 | unsigned int sizes[], |
| @@ -422,7 +425,7 @@ static int ipu3_vb2_queue_setup(struct vb2_queue *vq, | |||
| 422 | } | 425 | } |
| 423 | 426 | ||
| 424 | /* Check if all enabled video nodes are streaming, exception ignored */ | 427 | /* Check if all enabled video nodes are streaming, exception ignored */ |
| 425 | static bool ipu3_all_nodes_streaming(struct imgu_device *imgu, | 428 | static bool imgu_all_nodes_streaming(struct imgu_device *imgu, |
| 426 | struct imgu_video_device *except) | 429 | struct imgu_video_device *except) |
| 427 | { | 430 | { |
| 428 | unsigned int i, pipe, p; | 431 | unsigned int i, pipe, p; |
| @@ -451,11 +454,11 @@ static bool ipu3_all_nodes_streaming(struct imgu_device *imgu, | |||
| 451 | return true; | 454 | return true; |
| 452 | } | 455 | } |
| 453 | 456 | ||
| 454 | static void ipu3_return_all_buffers(struct imgu_device *imgu, | 457 | static void imgu_return_all_buffers(struct imgu_device *imgu, |
| 455 | struct imgu_video_device *node, | 458 | struct imgu_video_device *node, |
| 456 | enum vb2_buffer_state state) | 459 | enum vb2_buffer_state state) |
| 457 | { | 460 | { |
| 458 | struct ipu3_vb2_buffer *b, *b0; | 461 | struct imgu_vb2_buffer *b, *b0; |
| 459 | 462 | ||
| 460 | /* Return all buffers */ | 463 | /* Return all buffers */ |
| 461 | mutex_lock(&imgu->lock); | 464 | mutex_lock(&imgu->lock); |
| @@ -466,7 +469,7 @@ static void ipu3_return_all_buffers(struct imgu_device *imgu, | |||
| 466 | mutex_unlock(&imgu->lock); | 469 | mutex_unlock(&imgu->lock); |
| 467 | } | 470 | } |
| 468 | 471 | ||
| 469 | static int ipu3_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) | 472 | static int imgu_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) |
| 470 | { | 473 | { |
| 471 | struct imgu_media_pipe *imgu_pipe; | 474 | struct imgu_media_pipe *imgu_pipe; |
| 472 | struct imgu_device *imgu = vb2_get_drv_priv(vq); | 475 | struct imgu_device *imgu = vb2_get_drv_priv(vq); |
| @@ -497,7 +500,7 @@ static int ipu3_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) | |||
| 497 | goto fail_return_bufs; | 500 | goto fail_return_bufs; |
| 498 | 501 | ||
| 499 | 502 | ||
| 500 | if (!ipu3_all_nodes_streaming(imgu, node)) | 503 | if (!imgu_all_nodes_streaming(imgu, node)) |
| 501 | return 0; | 504 | return 0; |
| 502 | 505 | ||
| 503 | for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) { | 506 | for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) { |
| @@ -518,12 +521,12 @@ static int ipu3_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) | |||
| 518 | fail_stop_pipeline: | 521 | fail_stop_pipeline: |
| 519 | media_pipeline_stop(&node->vdev.entity); | 522 | media_pipeline_stop(&node->vdev.entity); |
| 520 | fail_return_bufs: | 523 | fail_return_bufs: |
| 521 | ipu3_return_all_buffers(imgu, node, VB2_BUF_STATE_QUEUED); | 524 | imgu_return_all_buffers(imgu, node, VB2_BUF_STATE_QUEUED); |
| 522 | 525 | ||
| 523 | return r; | 526 | return r; |
| 524 | } | 527 | } |
| 525 | 528 | ||
| 526 | static void ipu3_vb2_stop_streaming(struct vb2_queue *vq) | 529 | static void imgu_vb2_stop_streaming(struct vb2_queue *vq) |
| 527 | { | 530 | { |
| 528 | struct imgu_media_pipe *imgu_pipe; | 531 | struct imgu_media_pipe *imgu_pipe; |
| 529 | struct imgu_device *imgu = vb2_get_drv_priv(vq); | 532 | struct imgu_device *imgu = vb2_get_drv_priv(vq); |
| @@ -544,7 +547,7 @@ static void ipu3_vb2_stop_streaming(struct vb2_queue *vq) | |||
| 544 | "failed to stop subdev streaming\n"); | 547 | "failed to stop subdev streaming\n"); |
| 545 | 548 | ||
| 546 | /* Was this the first node with streaming disabled? */ | 549 | /* Was this the first node with streaming disabled? */ |
| 547 | if (imgu->streaming && ipu3_all_nodes_streaming(imgu, node)) { | 550 | if (imgu->streaming && imgu_all_nodes_streaming(imgu, node)) { |
| 548 | /* Yes, really stop streaming now */ | 551 | /* Yes, really stop streaming now */ |
| 549 | dev_dbg(dev, "IMGU streaming is ready to stop"); | 552 | dev_dbg(dev, "IMGU streaming is ready to stop"); |
| 550 | r = imgu_s_stream(imgu, false); | 553 | r = imgu_s_stream(imgu, false); |
| @@ -552,7 +555,7 @@ static void ipu3_vb2_stop_streaming(struct vb2_queue *vq) | |||
| 552 | imgu->streaming = false; | 555 | imgu->streaming = false; |
| 553 | } | 556 | } |
| 554 | 557 | ||
| 555 | ipu3_return_all_buffers(imgu, node, VB2_BUF_STATE_ERROR); | 558 | imgu_return_all_buffers(imgu, node, VB2_BUF_STATE_ERROR); |
| 556 | media_pipeline_stop(&node->vdev.entity); | 559 | media_pipeline_stop(&node->vdev.entity); |
| 557 | } | 560 | } |
| 558 | 561 | ||
| @@ -563,13 +566,13 @@ static void ipu3_vb2_stop_streaming(struct vb2_queue *vq) | |||
| 563 | #define DEF_VID_CAPTURE 0 | 566 | #define DEF_VID_CAPTURE 0 |
| 564 | #define DEF_VID_OUTPUT 1 | 567 | #define DEF_VID_OUTPUT 1 |
| 565 | 568 | ||
| 566 | struct ipu3_fmt { | 569 | struct imgu_fmt { |
| 567 | u32 fourcc; | 570 | u32 fourcc; |
| 568 | u16 type; /* VID_CAPTURE or VID_OUTPUT not both */ | 571 | u16 type; /* VID_CAPTURE or VID_OUTPUT not both */ |
| 569 | }; | 572 | }; |
| 570 | 573 | ||
| 571 | /* format descriptions for capture and preview */ | 574 | /* format descriptions for capture and preview */ |
| 572 | static const struct ipu3_fmt formats[] = { | 575 | static const struct imgu_fmt formats[] = { |
| 573 | { V4L2_PIX_FMT_NV12, VID_CAPTURE }, | 576 | { V4L2_PIX_FMT_NV12, VID_CAPTURE }, |
| 574 | { V4L2_PIX_FMT_IPU3_SGRBG10, VID_OUTPUT }, | 577 | { V4L2_PIX_FMT_IPU3_SGRBG10, VID_OUTPUT }, |
| 575 | { V4L2_PIX_FMT_IPU3_SBGGR10, VID_OUTPUT }, | 578 | { V4L2_PIX_FMT_IPU3_SBGGR10, VID_OUTPUT }, |
| @@ -578,7 +581,7 @@ static const struct ipu3_fmt formats[] = { | |||
| 578 | }; | 581 | }; |
| 579 | 582 | ||
| 580 | /* Find the first matched format, return default if not found */ | 583 | /* Find the first matched format, return default if not found */ |
| 581 | static const struct ipu3_fmt *find_format(struct v4l2_format *f, u32 type) | 584 | static const struct imgu_fmt *find_format(struct v4l2_format *f, u32 type) |
| 582 | { | 585 | { |
| 583 | unsigned int i; | 586 | unsigned int i; |
| 584 | 587 | ||
| @@ -592,10 +595,10 @@ static const struct ipu3_fmt *find_format(struct v4l2_format *f, u32 type) | |||
| 592 | &formats[DEF_VID_OUTPUT]; | 595 | &formats[DEF_VID_OUTPUT]; |
| 593 | } | 596 | } |
| 594 | 597 | ||
| 595 | static int ipu3_vidioc_querycap(struct file *file, void *fh, | 598 | static int imgu_vidioc_querycap(struct file *file, void *fh, |
| 596 | struct v4l2_capability *cap) | 599 | struct v4l2_capability *cap) |
| 597 | { | 600 | { |
| 598 | struct imgu_video_device *node = file_to_intel_ipu3_node(file); | 601 | struct imgu_video_device *node = file_to_intel_imgu_node(file); |
| 599 | 602 | ||
| 600 | strscpy(cap->driver, IMGU_NAME, sizeof(cap->driver)); | 603 | strscpy(cap->driver, IMGU_NAME, sizeof(cap->driver)); |
| 601 | strscpy(cap->card, IMGU_NAME, sizeof(cap->card)); | 604 | strscpy(cap->card, IMGU_NAME, sizeof(cap->card)); |
| @@ -643,10 +646,10 @@ static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, | |||
| 643 | } | 646 | } |
| 644 | 647 | ||
| 645 | /* Propagate forward always the format from the CIO2 subdev */ | 648 | /* Propagate forward always the format from the CIO2 subdev */ |
| 646 | static int ipu3_vidioc_g_fmt(struct file *file, void *fh, | 649 | static int imgu_vidioc_g_fmt(struct file *file, void *fh, |
| 647 | struct v4l2_format *f) | 650 | struct v4l2_format *f) |
| 648 | { | 651 | { |
| 649 | struct imgu_video_device *node = file_to_intel_ipu3_node(file); | 652 | struct imgu_video_device *node = file_to_intel_imgu_node(file); |
| 650 | 653 | ||
| 651 | f->fmt = node->vdev_fmt.fmt; | 654 | f->fmt = node->vdev_fmt.fmt; |
| 652 | 655 | ||
| @@ -667,7 +670,7 @@ static int imgu_fmt(struct imgu_device *imgu, unsigned int pipe, int node, | |||
| 667 | struct v4l2_mbus_framefmt pad_fmt; | 670 | struct v4l2_mbus_framefmt pad_fmt; |
| 668 | unsigned int i, css_q; | 671 | unsigned int i, css_q; |
| 669 | int r; | 672 | int r; |
| 670 | struct ipu3_css_pipe *css_pipe = &imgu->css.pipes[pipe]; | 673 | struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe]; |
| 671 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; | 674 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; |
| 672 | struct imgu_v4l2_subdev *imgu_sd = &imgu_pipe->imgu_sd; | 675 | struct imgu_v4l2_subdev *imgu_sd = &imgu_pipe->imgu_sd; |
| 673 | 676 | ||
| @@ -733,9 +736,9 @@ static int imgu_fmt(struct imgu_device *imgu, unsigned int pipe, int node, | |||
| 733 | return -EINVAL; | 736 | return -EINVAL; |
| 734 | 737 | ||
| 735 | if (try) | 738 | if (try) |
| 736 | r = ipu3_css_fmt_try(&imgu->css, fmts, rects, pipe); | 739 | r = imgu_css_fmt_try(&imgu->css, fmts, rects, pipe); |
| 737 | else | 740 | else |
| 738 | r = ipu3_css_fmt_set(&imgu->css, fmts, rects, pipe); | 741 | r = imgu_css_fmt_set(&imgu->css, fmts, rects, pipe); |
| 739 | 742 | ||
| 740 | /* r is the binary number in the firmware blob */ | 743 | /* r is the binary number in the firmware blob */ |
| 741 | if (r < 0) | 744 | if (r < 0) |
| @@ -749,10 +752,10 @@ static int imgu_fmt(struct imgu_device *imgu, unsigned int pipe, int node, | |||
| 749 | return 0; | 752 | return 0; |
| 750 | } | 753 | } |
| 751 | 754 | ||
| 752 | static int ipu3_try_fmt(struct file *file, void *fh, struct v4l2_format *f) | 755 | static int imgu_try_fmt(struct file *file, void *fh, struct v4l2_format *f) |
| 753 | { | 756 | { |
| 754 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; | 757 | struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp; |
| 755 | const struct ipu3_fmt *fmt; | 758 | const struct imgu_fmt *fmt; |
| 756 | 759 | ||
| 757 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | 760 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) |
| 758 | fmt = find_format(f, VID_CAPTURE); | 761 | fmt = find_format(f, VID_CAPTURE); |
| @@ -769,58 +772,58 @@ static int ipu3_try_fmt(struct file *file, void *fh, struct v4l2_format *f) | |||
| 769 | return 0; | 772 | return 0; |
| 770 | } | 773 | } |
| 771 | 774 | ||
| 772 | static int ipu3_vidioc_try_fmt(struct file *file, void *fh, | 775 | static int imgu_vidioc_try_fmt(struct file *file, void *fh, |
| 773 | struct v4l2_format *f) | 776 | struct v4l2_format *f) |
| 774 | { | 777 | { |
| 775 | struct imgu_device *imgu = video_drvdata(file); | 778 | struct imgu_device *imgu = video_drvdata(file); |
| 776 | struct device *dev = &imgu->pci_dev->dev; | 779 | struct device *dev = &imgu->pci_dev->dev; |
| 777 | struct imgu_video_device *node = file_to_intel_ipu3_node(file); | 780 | struct imgu_video_device *node = file_to_intel_imgu_node(file); |
| 778 | struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; | 781 | struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; |
| 779 | int r; | 782 | int r; |
| 780 | 783 | ||
| 781 | dev_dbg(dev, "%s [%ux%u] for node %d\n", __func__, | 784 | dev_dbg(dev, "%s [%ux%u] for node %d\n", __func__, |
| 782 | pix_mp->width, pix_mp->height, node->id); | 785 | pix_mp->width, pix_mp->height, node->id); |
| 783 | 786 | ||
| 784 | r = ipu3_try_fmt(file, fh, f); | 787 | r = imgu_try_fmt(file, fh, f); |
| 785 | if (r) | 788 | if (r) |
| 786 | return r; | 789 | return r; |
| 787 | 790 | ||
| 788 | return imgu_fmt(imgu, node->pipe, node->id, f, true); | 791 | return imgu_fmt(imgu, node->pipe, node->id, f, true); |
| 789 | } | 792 | } |
| 790 | 793 | ||
| 791 | static int ipu3_vidioc_s_fmt(struct file *file, void *fh, struct v4l2_format *f) | 794 | static int imgu_vidioc_s_fmt(struct file *file, void *fh, struct v4l2_format *f) |
| 792 | { | 795 | { |
| 793 | struct imgu_device *imgu = video_drvdata(file); | 796 | struct imgu_device *imgu = video_drvdata(file); |
| 794 | struct device *dev = &imgu->pci_dev->dev; | 797 | struct device *dev = &imgu->pci_dev->dev; |
| 795 | struct imgu_video_device *node = file_to_intel_ipu3_node(file); | 798 | struct imgu_video_device *node = file_to_intel_imgu_node(file); |
| 796 | struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; | 799 | struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; |
| 797 | int r; | 800 | int r; |
| 798 | 801 | ||
| 799 | dev_dbg(dev, "%s [%ux%u] for node %d\n", __func__, | 802 | dev_dbg(dev, "%s [%ux%u] for node %d\n", __func__, |
| 800 | pix_mp->width, pix_mp->height, node->id); | 803 | pix_mp->width, pix_mp->height, node->id); |
| 801 | 804 | ||
| 802 | r = ipu3_try_fmt(file, fh, f); | 805 | r = imgu_try_fmt(file, fh, f); |
| 803 | if (r) | 806 | if (r) |
| 804 | return r; | 807 | return r; |
| 805 | 808 | ||
| 806 | return imgu_fmt(imgu, node->pipe, node->id, f, false); | 809 | return imgu_fmt(imgu, node->pipe, node->id, f, false); |
| 807 | } | 810 | } |
| 808 | 811 | ||
| 809 | struct ipu3_meta_fmt { | 812 | struct imgu_meta_fmt { |
| 810 | __u32 fourcc; | 813 | __u32 fourcc; |
| 811 | char *name; | 814 | char *name; |
| 812 | }; | 815 | }; |
| 813 | 816 | ||
| 814 | /* From drivers/media/v4l2-core/v4l2-ioctl.c */ | 817 | /* From drivers/media/v4l2-core/v4l2-ioctl.c */ |
| 815 | static const struct ipu3_meta_fmt meta_fmts[] = { | 818 | static const struct imgu_meta_fmt meta_fmts[] = { |
| 816 | { V4L2_META_FMT_IPU3_PARAMS, "IPU3 processing parameters" }, | 819 | { V4L2_META_FMT_IPU3_PARAMS, "IPU3 processing parameters" }, |
| 817 | { V4L2_META_FMT_IPU3_STAT_3A, "IPU3 3A statistics" }, | 820 | { V4L2_META_FMT_IPU3_STAT_3A, "IPU3 3A statistics" }, |
| 818 | }; | 821 | }; |
| 819 | 822 | ||
| 820 | static int ipu3_meta_enum_format(struct file *file, void *fh, | 823 | static int imgu_meta_enum_format(struct file *file, void *fh, |
| 821 | struct v4l2_fmtdesc *fmt) | 824 | struct v4l2_fmtdesc *fmt) |
| 822 | { | 825 | { |
| 823 | struct imgu_video_device *node = file_to_intel_ipu3_node(file); | 826 | struct imgu_video_device *node = file_to_intel_imgu_node(file); |
| 824 | unsigned int i = fmt->type == V4L2_BUF_TYPE_META_OUTPUT ? 0 : 1; | 827 | unsigned int i = fmt->type == V4L2_BUF_TYPE_META_OUTPUT ? 0 : 1; |
| 825 | 828 | ||
| 826 | /* Each node is dedicated to only one meta format */ | 829 | /* Each node is dedicated to only one meta format */ |
| @@ -833,10 +836,10 @@ static int ipu3_meta_enum_format(struct file *file, void *fh, | |||
| 833 | return 0; | 836 | return 0; |
| 834 | } | 837 | } |
| 835 | 838 | ||
| 836 | static int ipu3_vidioc_g_meta_fmt(struct file *file, void *fh, | 839 | static int imgu_vidioc_g_meta_fmt(struct file *file, void *fh, |
| 837 | struct v4l2_format *f) | 840 | struct v4l2_format *f) |
| 838 | { | 841 | { |
| 839 | struct imgu_video_device *node = file_to_intel_ipu3_node(file); | 842 | struct imgu_video_device *node = file_to_intel_imgu_node(file); |
| 840 | 843 | ||
| 841 | if (f->type != node->vbq.type) | 844 | if (f->type != node->vbq.type) |
| 842 | return -EINVAL; | 845 | return -EINVAL; |
| @@ -846,7 +849,7 @@ static int ipu3_vidioc_g_meta_fmt(struct file *file, void *fh, | |||
| 846 | return 0; | 849 | return 0; |
| 847 | } | 850 | } |
| 848 | 851 | ||
| 849 | static int ipu3_vidioc_enum_input(struct file *file, void *fh, | 852 | static int imgu_vidioc_enum_input(struct file *file, void *fh, |
| 850 | struct v4l2_input *input) | 853 | struct v4l2_input *input) |
| 851 | { | 854 | { |
| 852 | if (input->index > 0) | 855 | if (input->index > 0) |
| @@ -857,19 +860,19 @@ static int ipu3_vidioc_enum_input(struct file *file, void *fh, | |||
| 857 | return 0; | 860 | return 0; |
| 858 | } | 861 | } |
| 859 | 862 | ||
| 860 | static int ipu3_vidioc_g_input(struct file *file, void *fh, unsigned int *input) | 863 | static int imgu_vidioc_g_input(struct file *file, void *fh, unsigned int *input) |
| 861 | { | 864 | { |
| 862 | *input = 0; | 865 | *input = 0; |
| 863 | 866 | ||
| 864 | return 0; | 867 | return 0; |
| 865 | } | 868 | } |
| 866 | 869 | ||
| 867 | static int ipu3_vidioc_s_input(struct file *file, void *fh, unsigned int input) | 870 | static int imgu_vidioc_s_input(struct file *file, void *fh, unsigned int input) |
| 868 | { | 871 | { |
| 869 | return input == 0 ? 0 : -EINVAL; | 872 | return input == 0 ? 0 : -EINVAL; |
| 870 | } | 873 | } |
| 871 | 874 | ||
| 872 | static int ipu3_vidioc_enum_output(struct file *file, void *fh, | 875 | static int imgu_vidioc_enum_output(struct file *file, void *fh, |
| 873 | struct v4l2_output *output) | 876 | struct v4l2_output *output) |
| 874 | { | 877 | { |
| 875 | if (output->index > 0) | 878 | if (output->index > 0) |
| @@ -880,7 +883,7 @@ static int ipu3_vidioc_enum_output(struct file *file, void *fh, | |||
| 880 | return 0; | 883 | return 0; |
| 881 | } | 884 | } |
| 882 | 885 | ||
| 883 | static int ipu3_vidioc_g_output(struct file *file, void *fh, | 886 | static int imgu_vidioc_g_output(struct file *file, void *fh, |
| 884 | unsigned int *output) | 887 | unsigned int *output) |
| 885 | { | 888 | { |
| 886 | *output = 0; | 889 | *output = 0; |
| @@ -888,7 +891,7 @@ static int ipu3_vidioc_g_output(struct file *file, void *fh, | |||
| 888 | return 0; | 891 | return 0; |
| 889 | } | 892 | } |
| 890 | 893 | ||
| 891 | static int ipu3_vidioc_s_output(struct file *file, void *fh, | 894 | static int imgu_vidioc_s_output(struct file *file, void *fh, |
| 892 | unsigned int output) | 895 | unsigned int output) |
| 893 | { | 896 | { |
| 894 | return output == 0 ? 0 : -EINVAL; | 897 | return output == 0 ? 0 : -EINVAL; |
| @@ -896,54 +899,54 @@ static int ipu3_vidioc_s_output(struct file *file, void *fh, | |||
| 896 | 899 | ||
| 897 | /******************** function pointers ********************/ | 900 | /******************** function pointers ********************/ |
| 898 | 901 | ||
| 899 | static struct v4l2_subdev_internal_ops ipu3_subdev_internal_ops = { | 902 | static struct v4l2_subdev_internal_ops imgu_subdev_internal_ops = { |
| 900 | .open = ipu3_subdev_open, | 903 | .open = imgu_subdev_open, |
| 901 | }; | 904 | }; |
| 902 | 905 | ||
| 903 | static const struct v4l2_subdev_core_ops ipu3_subdev_core_ops = { | 906 | static const struct v4l2_subdev_core_ops imgu_subdev_core_ops = { |
| 904 | .subscribe_event = v4l2_ctrl_subdev_subscribe_event, | 907 | .subscribe_event = v4l2_ctrl_subdev_subscribe_event, |
| 905 | .unsubscribe_event = v4l2_event_subdev_unsubscribe, | 908 | .unsubscribe_event = v4l2_event_subdev_unsubscribe, |
| 906 | }; | 909 | }; |
| 907 | 910 | ||
| 908 | static const struct v4l2_subdev_video_ops ipu3_subdev_video_ops = { | 911 | static const struct v4l2_subdev_video_ops imgu_subdev_video_ops = { |
| 909 | .s_stream = ipu3_subdev_s_stream, | 912 | .s_stream = imgu_subdev_s_stream, |
| 910 | }; | 913 | }; |
| 911 | 914 | ||
| 912 | static const struct v4l2_subdev_pad_ops ipu3_subdev_pad_ops = { | 915 | static const struct v4l2_subdev_pad_ops imgu_subdev_pad_ops = { |
| 913 | .link_validate = v4l2_subdev_link_validate_default, | 916 | .link_validate = v4l2_subdev_link_validate_default, |
| 914 | .get_fmt = ipu3_subdev_get_fmt, | 917 | .get_fmt = imgu_subdev_get_fmt, |
| 915 | .set_fmt = ipu3_subdev_set_fmt, | 918 | .set_fmt = imgu_subdev_set_fmt, |
| 916 | .get_selection = ipu3_subdev_get_selection, | 919 | .get_selection = imgu_subdev_get_selection, |
| 917 | .set_selection = ipu3_subdev_set_selection, | 920 | .set_selection = imgu_subdev_set_selection, |
| 918 | }; | 921 | }; |
| 919 | 922 | ||
| 920 | static const struct v4l2_subdev_ops ipu3_subdev_ops = { | 923 | static const struct v4l2_subdev_ops imgu_subdev_ops = { |
| 921 | .core = &ipu3_subdev_core_ops, | 924 | .core = &imgu_subdev_core_ops, |
| 922 | .video = &ipu3_subdev_video_ops, | 925 | .video = &imgu_subdev_video_ops, |
| 923 | .pad = &ipu3_subdev_pad_ops, | 926 | .pad = &imgu_subdev_pad_ops, |
| 924 | }; | 927 | }; |
| 925 | 928 | ||
| 926 | static const struct media_entity_operations ipu3_media_ops = { | 929 | static const struct media_entity_operations imgu_media_ops = { |
| 927 | .link_setup = ipu3_link_setup, | 930 | .link_setup = imgu_link_setup, |
| 928 | .link_validate = v4l2_subdev_link_validate, | 931 | .link_validate = v4l2_subdev_link_validate, |
| 929 | }; | 932 | }; |
| 930 | 933 | ||
| 931 | /****************** vb2_ops of the Q ********************/ | 934 | /****************** vb2_ops of the Q ********************/ |
| 932 | 935 | ||
| 933 | static const struct vb2_ops ipu3_vb2_ops = { | 936 | static const struct vb2_ops imgu_vb2_ops = { |
| 934 | .buf_init = ipu3_vb2_buf_init, | 937 | .buf_init = imgu_vb2_buf_init, |
| 935 | .buf_cleanup = ipu3_vb2_buf_cleanup, | 938 | .buf_cleanup = imgu_vb2_buf_cleanup, |
| 936 | .buf_queue = ipu3_vb2_buf_queue, | 939 | .buf_queue = imgu_vb2_buf_queue, |
| 937 | .queue_setup = ipu3_vb2_queue_setup, | 940 | .queue_setup = imgu_vb2_queue_setup, |
| 938 | .start_streaming = ipu3_vb2_start_streaming, | 941 | .start_streaming = imgu_vb2_start_streaming, |
| 939 | .stop_streaming = ipu3_vb2_stop_streaming, | 942 | .stop_streaming = imgu_vb2_stop_streaming, |
| 940 | .wait_prepare = vb2_ops_wait_prepare, | 943 | .wait_prepare = vb2_ops_wait_prepare, |
| 941 | .wait_finish = vb2_ops_wait_finish, | 944 | .wait_finish = vb2_ops_wait_finish, |
| 942 | }; | 945 | }; |
| 943 | 946 | ||
| 944 | /****************** v4l2_file_operations *****************/ | 947 | /****************** v4l2_file_operations *****************/ |
| 945 | 948 | ||
| 946 | static const struct v4l2_file_operations ipu3_v4l2_fops = { | 949 | static const struct v4l2_file_operations imgu_v4l2_fops = { |
| 947 | .unlocked_ioctl = video_ioctl2, | 950 | .unlocked_ioctl = video_ioctl2, |
| 948 | .open = v4l2_fh_open, | 951 | .open = v4l2_fh_open, |
| 949 | .release = vb2_fop_release, | 952 | .release = vb2_fop_release, |
| @@ -953,26 +956,26 @@ static const struct v4l2_file_operations ipu3_v4l2_fops = { | |||
| 953 | 956 | ||
| 954 | /******************** v4l2_ioctl_ops ********************/ | 957 | /******************** v4l2_ioctl_ops ********************/ |
| 955 | 958 | ||
| 956 | static const struct v4l2_ioctl_ops ipu3_v4l2_ioctl_ops = { | 959 | static const struct v4l2_ioctl_ops imgu_v4l2_ioctl_ops = { |
| 957 | .vidioc_querycap = ipu3_vidioc_querycap, | 960 | .vidioc_querycap = imgu_vidioc_querycap, |
| 958 | 961 | ||
| 959 | .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap, | 962 | .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap, |
| 960 | .vidioc_g_fmt_vid_cap_mplane = ipu3_vidioc_g_fmt, | 963 | .vidioc_g_fmt_vid_cap_mplane = imgu_vidioc_g_fmt, |
| 961 | .vidioc_s_fmt_vid_cap_mplane = ipu3_vidioc_s_fmt, | 964 | .vidioc_s_fmt_vid_cap_mplane = imgu_vidioc_s_fmt, |
| 962 | .vidioc_try_fmt_vid_cap_mplane = ipu3_vidioc_try_fmt, | 965 | .vidioc_try_fmt_vid_cap_mplane = imgu_vidioc_try_fmt, |
| 963 | 966 | ||
| 964 | .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out, | 967 | .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out, |
| 965 | .vidioc_g_fmt_vid_out_mplane = ipu3_vidioc_g_fmt, | 968 | .vidioc_g_fmt_vid_out_mplane = imgu_vidioc_g_fmt, |
| 966 | .vidioc_s_fmt_vid_out_mplane = ipu3_vidioc_s_fmt, | 969 | .vidioc_s_fmt_vid_out_mplane = imgu_vidioc_s_fmt, |
| 967 | .vidioc_try_fmt_vid_out_mplane = ipu3_vidioc_try_fmt, | 970 | .vidioc_try_fmt_vid_out_mplane = imgu_vidioc_try_fmt, |
| 968 | 971 | ||
| 969 | .vidioc_enum_output = ipu3_vidioc_enum_output, | 972 | .vidioc_enum_output = imgu_vidioc_enum_output, |
| 970 | .vidioc_g_output = ipu3_vidioc_g_output, | 973 | .vidioc_g_output = imgu_vidioc_g_output, |
| 971 | .vidioc_s_output = ipu3_vidioc_s_output, | 974 | .vidioc_s_output = imgu_vidioc_s_output, |
| 972 | 975 | ||
| 973 | .vidioc_enum_input = ipu3_vidioc_enum_input, | 976 | .vidioc_enum_input = imgu_vidioc_enum_input, |
| 974 | .vidioc_g_input = ipu3_vidioc_g_input, | 977 | .vidioc_g_input = imgu_vidioc_g_input, |
| 975 | .vidioc_s_input = ipu3_vidioc_s_input, | 978 | .vidioc_s_input = imgu_vidioc_s_input, |
| 976 | 979 | ||
| 977 | /* buffer queue management */ | 980 | /* buffer queue management */ |
| 978 | .vidioc_reqbufs = vb2_ioctl_reqbufs, | 981 | .vidioc_reqbufs = vb2_ioctl_reqbufs, |
| @@ -986,20 +989,20 @@ static const struct v4l2_ioctl_ops ipu3_v4l2_ioctl_ops = { | |||
| 986 | .vidioc_expbuf = vb2_ioctl_expbuf, | 989 | .vidioc_expbuf = vb2_ioctl_expbuf, |
| 987 | }; | 990 | }; |
| 988 | 991 | ||
| 989 | static const struct v4l2_ioctl_ops ipu3_v4l2_meta_ioctl_ops = { | 992 | static const struct v4l2_ioctl_ops imgu_v4l2_meta_ioctl_ops = { |
| 990 | .vidioc_querycap = ipu3_vidioc_querycap, | 993 | .vidioc_querycap = imgu_vidioc_querycap, |
| 991 | 994 | ||
| 992 | /* meta capture */ | 995 | /* meta capture */ |
| 993 | .vidioc_enum_fmt_meta_cap = ipu3_meta_enum_format, | 996 | .vidioc_enum_fmt_meta_cap = imgu_meta_enum_format, |
| 994 | .vidioc_g_fmt_meta_cap = ipu3_vidioc_g_meta_fmt, | 997 | .vidioc_g_fmt_meta_cap = imgu_vidioc_g_meta_fmt, |
| 995 | .vidioc_s_fmt_meta_cap = ipu3_vidioc_g_meta_fmt, | 998 | .vidioc_s_fmt_meta_cap = imgu_vidioc_g_meta_fmt, |
| 996 | .vidioc_try_fmt_meta_cap = ipu3_vidioc_g_meta_fmt, | 999 | .vidioc_try_fmt_meta_cap = imgu_vidioc_g_meta_fmt, |
| 997 | 1000 | ||
| 998 | /* meta output */ | 1001 | /* meta output */ |
| 999 | .vidioc_enum_fmt_meta_out = ipu3_meta_enum_format, | 1002 | .vidioc_enum_fmt_meta_out = imgu_meta_enum_format, |
| 1000 | .vidioc_g_fmt_meta_out = ipu3_vidioc_g_meta_fmt, | 1003 | .vidioc_g_fmt_meta_out = imgu_vidioc_g_meta_fmt, |
| 1001 | .vidioc_s_fmt_meta_out = ipu3_vidioc_g_meta_fmt, | 1004 | .vidioc_s_fmt_meta_out = imgu_vidioc_g_meta_fmt, |
| 1002 | .vidioc_try_fmt_meta_out = ipu3_vidioc_g_meta_fmt, | 1005 | .vidioc_try_fmt_meta_out = imgu_vidioc_g_meta_fmt, |
| 1003 | 1006 | ||
| 1004 | .vidioc_reqbufs = vb2_ioctl_reqbufs, | 1007 | .vidioc_reqbufs = vb2_ioctl_reqbufs, |
| 1005 | .vidioc_create_bufs = vb2_ioctl_create_bufs, | 1008 | .vidioc_create_bufs = vb2_ioctl_create_bufs, |
| @@ -1012,7 +1015,7 @@ static const struct v4l2_ioctl_ops ipu3_v4l2_meta_ioctl_ops = { | |||
| 1012 | .vidioc_expbuf = vb2_ioctl_expbuf, | 1015 | .vidioc_expbuf = vb2_ioctl_expbuf, |
| 1013 | }; | 1016 | }; |
| 1014 | 1017 | ||
| 1015 | static int ipu3_sd_s_ctrl(struct v4l2_ctrl *ctrl) | 1018 | static int imgu_sd_s_ctrl(struct v4l2_ctrl *ctrl) |
| 1016 | { | 1019 | { |
| 1017 | struct imgu_v4l2_subdev *imgu_sd = | 1020 | struct imgu_v4l2_subdev *imgu_sd = |
| 1018 | container_of(ctrl->handler, struct imgu_v4l2_subdev, ctrl_handler); | 1021 | container_of(ctrl->handler, struct imgu_v4l2_subdev, ctrl_handler); |
| @@ -1031,25 +1034,29 @@ static int ipu3_sd_s_ctrl(struct v4l2_ctrl *ctrl) | |||
| 1031 | } | 1034 | } |
| 1032 | } | 1035 | } |
| 1033 | 1036 | ||
| 1034 | static const struct v4l2_ctrl_ops ipu3_subdev_ctrl_ops = { | 1037 | static const struct v4l2_ctrl_ops imgu_subdev_ctrl_ops = { |
| 1035 | .s_ctrl = ipu3_sd_s_ctrl, | 1038 | .s_ctrl = imgu_sd_s_ctrl, |
| 1039 | }; | ||
| 1040 | |||
| 1041 | static const char * const imgu_ctrl_mode_strings[] = { | ||
| 1042 | "Video mode", | ||
| 1043 | "Still mode", | ||
| 1036 | }; | 1044 | }; |
| 1037 | 1045 | ||
| 1038 | static const struct v4l2_ctrl_config ipu3_subdev_ctrl_mode = { | 1046 | static const struct v4l2_ctrl_config imgu_subdev_ctrl_mode = { |
| 1039 | .ops = &ipu3_subdev_ctrl_ops, | 1047 | .ops = &imgu_subdev_ctrl_ops, |
| 1040 | .id = V4L2_CID_INTEL_IPU3_MODE, | 1048 | .id = V4L2_CID_INTEL_IPU3_MODE, |
| 1041 | .name = "IPU3 Pipe Mode", | 1049 | .name = "IPU3 Pipe Mode", |
| 1042 | .type = V4L2_CTRL_TYPE_INTEGER, | 1050 | .type = V4L2_CTRL_TYPE_MENU, |
| 1043 | .min = IPU3_RUNNING_MODE_VIDEO, | 1051 | .max = ARRAY_SIZE(imgu_ctrl_mode_strings) - 1, |
| 1044 | .max = IPU3_RUNNING_MODE_STILL, | ||
| 1045 | .step = 1, | ||
| 1046 | .def = IPU3_RUNNING_MODE_VIDEO, | 1052 | .def = IPU3_RUNNING_MODE_VIDEO, |
| 1053 | .qmenu = imgu_ctrl_mode_strings, | ||
| 1047 | }; | 1054 | }; |
| 1048 | 1055 | ||
| 1049 | /******************** Framework registration ********************/ | 1056 | /******************** Framework registration ********************/ |
| 1050 | 1057 | ||
| 1051 | /* helper function to config node's video properties */ | 1058 | /* helper function to config node's video properties */ |
| 1052 | static void ipu3_node_to_v4l2(u32 node, struct video_device *vdev, | 1059 | static void imgu_node_to_v4l2(u32 node, struct video_device *vdev, |
| 1053 | struct v4l2_format *f) | 1060 | struct v4l2_format *f) |
| 1054 | { | 1061 | { |
| 1055 | u32 cap; | 1062 | u32 cap; |
| @@ -1061,32 +1068,32 @@ static void ipu3_node_to_v4l2(u32 node, struct video_device *vdev, | |||
| 1061 | case IMGU_NODE_IN: | 1068 | case IMGU_NODE_IN: |
| 1062 | cap = V4L2_CAP_VIDEO_OUTPUT_MPLANE; | 1069 | cap = V4L2_CAP_VIDEO_OUTPUT_MPLANE; |
| 1063 | f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; | 1070 | f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; |
| 1064 | vdev->ioctl_ops = &ipu3_v4l2_ioctl_ops; | 1071 | vdev->ioctl_ops = &imgu_v4l2_ioctl_ops; |
| 1065 | break; | 1072 | break; |
| 1066 | case IMGU_NODE_PARAMS: | 1073 | case IMGU_NODE_PARAMS: |
| 1067 | cap = V4L2_CAP_META_OUTPUT; | 1074 | cap = V4L2_CAP_META_OUTPUT; |
| 1068 | f->type = V4L2_BUF_TYPE_META_OUTPUT; | 1075 | f->type = V4L2_BUF_TYPE_META_OUTPUT; |
| 1069 | f->fmt.meta.dataformat = V4L2_META_FMT_IPU3_PARAMS; | 1076 | f->fmt.meta.dataformat = V4L2_META_FMT_IPU3_PARAMS; |
| 1070 | vdev->ioctl_ops = &ipu3_v4l2_meta_ioctl_ops; | 1077 | vdev->ioctl_ops = &imgu_v4l2_meta_ioctl_ops; |
| 1071 | ipu3_css_meta_fmt_set(&f->fmt.meta); | 1078 | imgu_css_meta_fmt_set(&f->fmt.meta); |
| 1072 | break; | 1079 | break; |
| 1073 | case IMGU_NODE_STAT_3A: | 1080 | case IMGU_NODE_STAT_3A: |
| 1074 | cap = V4L2_CAP_META_CAPTURE; | 1081 | cap = V4L2_CAP_META_CAPTURE; |
| 1075 | f->type = V4L2_BUF_TYPE_META_CAPTURE; | 1082 | f->type = V4L2_BUF_TYPE_META_CAPTURE; |
| 1076 | f->fmt.meta.dataformat = V4L2_META_FMT_IPU3_STAT_3A; | 1083 | f->fmt.meta.dataformat = V4L2_META_FMT_IPU3_STAT_3A; |
| 1077 | vdev->ioctl_ops = &ipu3_v4l2_meta_ioctl_ops; | 1084 | vdev->ioctl_ops = &imgu_v4l2_meta_ioctl_ops; |
| 1078 | ipu3_css_meta_fmt_set(&f->fmt.meta); | 1085 | imgu_css_meta_fmt_set(&f->fmt.meta); |
| 1079 | break; | 1086 | break; |
| 1080 | default: | 1087 | default: |
| 1081 | cap = V4L2_CAP_VIDEO_CAPTURE_MPLANE; | 1088 | cap = V4L2_CAP_VIDEO_CAPTURE_MPLANE; |
| 1082 | f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; | 1089 | f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; |
| 1083 | vdev->ioctl_ops = &ipu3_v4l2_ioctl_ops; | 1090 | vdev->ioctl_ops = &imgu_v4l2_ioctl_ops; |
| 1084 | } | 1091 | } |
| 1085 | 1092 | ||
| 1086 | vdev->device_caps = V4L2_CAP_STREAMING | cap; | 1093 | vdev->device_caps = V4L2_CAP_STREAMING | cap; |
| 1087 | } | 1094 | } |
| 1088 | 1095 | ||
| 1089 | static int ipu3_v4l2_subdev_register(struct imgu_device *imgu, | 1096 | static int imgu_v4l2_subdev_register(struct imgu_device *imgu, |
| 1090 | struct imgu_v4l2_subdev *imgu_sd, | 1097 | struct imgu_v4l2_subdev *imgu_sd, |
| 1091 | unsigned int pipe) | 1098 | unsigned int pipe) |
| 1092 | { | 1099 | { |
| @@ -1102,16 +1109,16 @@ static int ipu3_v4l2_subdev_register(struct imgu_device *imgu, | |||
| 1102 | "failed initialize subdev media entity (%d)\n", r); | 1109 | "failed initialize subdev media entity (%d)\n", r); |
| 1103 | return r; | 1110 | return r; |
| 1104 | } | 1111 | } |
| 1105 | imgu_sd->subdev.entity.ops = &ipu3_media_ops; | 1112 | imgu_sd->subdev.entity.ops = &imgu_media_ops; |
| 1106 | for (i = 0; i < IMGU_NODE_NUM; i++) { | 1113 | for (i = 0; i < IMGU_NODE_NUM; i++) { |
| 1107 | imgu_sd->subdev_pads[i].flags = imgu_pipe->nodes[i].output ? | 1114 | imgu_sd->subdev_pads[i].flags = imgu_pipe->nodes[i].output ? |
| 1108 | MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE; | 1115 | MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE; |
| 1109 | } | 1116 | } |
| 1110 | 1117 | ||
| 1111 | /* Initialize subdev */ | 1118 | /* Initialize subdev */ |
| 1112 | v4l2_subdev_init(&imgu_sd->subdev, &ipu3_subdev_ops); | 1119 | v4l2_subdev_init(&imgu_sd->subdev, &imgu_subdev_ops); |
| 1113 | imgu_sd->subdev.entity.function = MEDIA_ENT_F_PROC_VIDEO_STATISTICS; | 1120 | imgu_sd->subdev.entity.function = MEDIA_ENT_F_PROC_VIDEO_STATISTICS; |
| 1114 | imgu_sd->subdev.internal_ops = &ipu3_subdev_internal_ops; | 1121 | imgu_sd->subdev.internal_ops = &imgu_subdev_internal_ops; |
| 1115 | imgu_sd->subdev.flags = V4L2_SUBDEV_FL_HAS_DEVNODE | | 1122 | imgu_sd->subdev.flags = V4L2_SUBDEV_FL_HAS_DEVNODE | |
| 1116 | V4L2_SUBDEV_FL_HAS_EVENTS; | 1123 | V4L2_SUBDEV_FL_HAS_EVENTS; |
| 1117 | snprintf(imgu_sd->subdev.name, sizeof(imgu_sd->subdev.name), | 1124 | snprintf(imgu_sd->subdev.name, sizeof(imgu_sd->subdev.name), |
| @@ -1120,7 +1127,7 @@ static int ipu3_v4l2_subdev_register(struct imgu_device *imgu, | |||
| 1120 | atomic_set(&imgu_sd->running_mode, IPU3_RUNNING_MODE_VIDEO); | 1127 | atomic_set(&imgu_sd->running_mode, IPU3_RUNNING_MODE_VIDEO); |
| 1121 | v4l2_ctrl_handler_init(hdl, 1); | 1128 | v4l2_ctrl_handler_init(hdl, 1); |
| 1122 | imgu_sd->subdev.ctrl_handler = hdl; | 1129 | imgu_sd->subdev.ctrl_handler = hdl; |
| 1123 | imgu_sd->ctrl = v4l2_ctrl_new_custom(hdl, &ipu3_subdev_ctrl_mode, NULL); | 1130 | imgu_sd->ctrl = v4l2_ctrl_new_custom(hdl, &imgu_subdev_ctrl_mode, NULL); |
| 1124 | if (hdl->error) { | 1131 | if (hdl->error) { |
| 1125 | r = hdl->error; | 1132 | r = hdl->error; |
| 1126 | dev_err(&imgu->pci_dev->dev, | 1133 | dev_err(&imgu->pci_dev->dev, |
| @@ -1144,7 +1151,7 @@ fail_subdev: | |||
| 1144 | return r; | 1151 | return r; |
| 1145 | } | 1152 | } |
| 1146 | 1153 | ||
| 1147 | static int ipu3_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe, | 1154 | static int imgu_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe, |
| 1148 | int node_num) | 1155 | int node_num) |
| 1149 | { | 1156 | { |
| 1150 | int r; | 1157 | int r; |
| @@ -1189,7 +1196,7 @@ static int ipu3_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe, | |||
| 1189 | node->pad_fmt = def_bus_fmt; | 1196 | node->pad_fmt = def_bus_fmt; |
| 1190 | node->id = node_num; | 1197 | node->id = node_num; |
| 1191 | node->pipe = pipe; | 1198 | node->pipe = pipe; |
| 1192 | ipu3_node_to_v4l2(node_num, vdev, &node->vdev_fmt); | 1199 | imgu_node_to_v4l2(node_num, vdev, &node->vdev_fmt); |
| 1193 | if (node->vdev_fmt.type == | 1200 | if (node->vdev_fmt.type == |
| 1194 | V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE || | 1201 | V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE || |
| 1195 | node->vdev_fmt.type == | 1202 | node->vdev_fmt.type == |
| @@ -1214,11 +1221,11 @@ static int ipu3_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe, | |||
| 1214 | /* Initialize vbq */ | 1221 | /* Initialize vbq */ |
| 1215 | vbq->type = node->vdev_fmt.type; | 1222 | vbq->type = node->vdev_fmt.type; |
| 1216 | vbq->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF; | 1223 | vbq->io_modes = VB2_USERPTR | VB2_MMAP | VB2_DMABUF; |
| 1217 | vbq->ops = &ipu3_vb2_ops; | 1224 | vbq->ops = &imgu_vb2_ops; |
| 1218 | vbq->mem_ops = &vb2_dma_sg_memops; | 1225 | vbq->mem_ops = &vb2_dma_sg_memops; |
| 1219 | if (imgu->buf_struct_size <= 0) | 1226 | if (imgu->buf_struct_size <= 0) |
| 1220 | imgu->buf_struct_size = | 1227 | imgu->buf_struct_size = |
| 1221 | sizeof(struct ipu3_vb2_buffer); | 1228 | sizeof(struct imgu_vb2_buffer); |
| 1222 | vbq->buf_struct_size = imgu->buf_struct_size; | 1229 | vbq->buf_struct_size = imgu->buf_struct_size; |
| 1223 | vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | 1230 | vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
| 1224 | /* can streamon w/o buffers */ | 1231 | /* can streamon w/o buffers */ |
| @@ -1236,7 +1243,7 @@ static int ipu3_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe, | |||
| 1236 | snprintf(vdev->name, sizeof(vdev->name), "%s %d %s", | 1243 | snprintf(vdev->name, sizeof(vdev->name), "%s %d %s", |
| 1237 | IMGU_NAME, pipe, node->name); | 1244 | IMGU_NAME, pipe, node->name); |
| 1238 | vdev->release = video_device_release_empty; | 1245 | vdev->release = video_device_release_empty; |
| 1239 | vdev->fops = &ipu3_v4l2_fops; | 1246 | vdev->fops = &imgu_v4l2_fops; |
| 1240 | vdev->lock = &node->lock; | 1247 | vdev->lock = &node->lock; |
| 1241 | vdev->v4l2_dev = &imgu->v4l2_dev; | 1248 | vdev->v4l2_dev = &imgu->v4l2_dev; |
| 1242 | vdev->queue = &node->vbq; | 1249 | vdev->queue = &node->vbq; |
| @@ -1269,7 +1276,7 @@ static int ipu3_v4l2_node_setup(struct imgu_device *imgu, unsigned int pipe, | |||
| 1269 | return 0; | 1276 | return 0; |
| 1270 | } | 1277 | } |
| 1271 | 1278 | ||
| 1272 | static void ipu3_v4l2_nodes_cleanup_pipe(struct imgu_device *imgu, | 1279 | static void imgu_v4l2_nodes_cleanup_pipe(struct imgu_device *imgu, |
| 1273 | unsigned int pipe, int node) | 1280 | unsigned int pipe, int node) |
| 1274 | { | 1281 | { |
| 1275 | int i; | 1282 | int i; |
| @@ -1282,12 +1289,12 @@ static void ipu3_v4l2_nodes_cleanup_pipe(struct imgu_device *imgu, | |||
| 1282 | } | 1289 | } |
| 1283 | } | 1290 | } |
| 1284 | 1291 | ||
| 1285 | static int ipu3_v4l2_nodes_setup_pipe(struct imgu_device *imgu, int pipe) | 1292 | static int imgu_v4l2_nodes_setup_pipe(struct imgu_device *imgu, int pipe) |
| 1286 | { | 1293 | { |
| 1287 | int i, r; | 1294 | int i, r; |
| 1288 | 1295 | ||
| 1289 | for (i = 0; i < IMGU_NODE_NUM; i++) { | 1296 | for (i = 0; i < IMGU_NODE_NUM; i++) { |
| 1290 | r = ipu3_v4l2_node_setup(imgu, pipe, i); | 1297 | r = imgu_v4l2_node_setup(imgu, pipe, i); |
| 1291 | if (r) | 1298 | if (r) |
| 1292 | goto cleanup; | 1299 | goto cleanup; |
| 1293 | } | 1300 | } |
| @@ -1295,11 +1302,11 @@ static int ipu3_v4l2_nodes_setup_pipe(struct imgu_device *imgu, int pipe) | |||
| 1295 | return 0; | 1302 | return 0; |
| 1296 | 1303 | ||
| 1297 | cleanup: | 1304 | cleanup: |
| 1298 | ipu3_v4l2_nodes_cleanup_pipe(imgu, pipe, i); | 1305 | imgu_v4l2_nodes_cleanup_pipe(imgu, pipe, i); |
| 1299 | return r; | 1306 | return r; |
| 1300 | } | 1307 | } |
| 1301 | 1308 | ||
| 1302 | static void ipu3_v4l2_subdev_cleanup(struct imgu_device *imgu, unsigned int i) | 1309 | static void imgu_v4l2_subdev_cleanup(struct imgu_device *imgu, unsigned int i) |
| 1303 | { | 1310 | { |
| 1304 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[i]; | 1311 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[i]; |
| 1305 | 1312 | ||
| @@ -1308,13 +1315,13 @@ static void ipu3_v4l2_subdev_cleanup(struct imgu_device *imgu, unsigned int i) | |||
| 1308 | media_entity_cleanup(&imgu_pipe->imgu_sd.subdev.entity); | 1315 | media_entity_cleanup(&imgu_pipe->imgu_sd.subdev.entity); |
| 1309 | } | 1316 | } |
| 1310 | 1317 | ||
| 1311 | static void ipu3_v4l2_cleanup_pipes(struct imgu_device *imgu, unsigned int pipe) | 1318 | static void imgu_v4l2_cleanup_pipes(struct imgu_device *imgu, unsigned int pipe) |
| 1312 | { | 1319 | { |
| 1313 | int i; | 1320 | int i; |
| 1314 | 1321 | ||
| 1315 | for (i = 0; i < pipe; i++) { | 1322 | for (i = 0; i < pipe; i++) { |
| 1316 | ipu3_v4l2_nodes_cleanup_pipe(imgu, i, IMGU_NODE_NUM); | 1323 | imgu_v4l2_nodes_cleanup_pipe(imgu, i, IMGU_NODE_NUM); |
| 1317 | ipu3_v4l2_subdev_cleanup(imgu, i); | 1324 | imgu_v4l2_subdev_cleanup(imgu, i); |
| 1318 | } | 1325 | } |
| 1319 | } | 1326 | } |
| 1320 | 1327 | ||
| @@ -1325,15 +1332,15 @@ static int imgu_v4l2_register_pipes(struct imgu_device *imgu) | |||
| 1325 | 1332 | ||
| 1326 | for (i = 0; i < IMGU_MAX_PIPE_NUM; i++) { | 1333 | for (i = 0; i < IMGU_MAX_PIPE_NUM; i++) { |
| 1327 | imgu_pipe = &imgu->imgu_pipe[i]; | 1334 | imgu_pipe = &imgu->imgu_pipe[i]; |
| 1328 | r = ipu3_v4l2_subdev_register(imgu, &imgu_pipe->imgu_sd, i); | 1335 | r = imgu_v4l2_subdev_register(imgu, &imgu_pipe->imgu_sd, i); |
| 1329 | if (r) { | 1336 | if (r) { |
| 1330 | dev_err(&imgu->pci_dev->dev, | 1337 | dev_err(&imgu->pci_dev->dev, |
| 1331 | "failed to register subdev%d ret (%d)\n", i, r); | 1338 | "failed to register subdev%d ret (%d)\n", i, r); |
| 1332 | goto pipes_cleanup; | 1339 | goto pipes_cleanup; |
| 1333 | } | 1340 | } |
| 1334 | r = ipu3_v4l2_nodes_setup_pipe(imgu, i); | 1341 | r = imgu_v4l2_nodes_setup_pipe(imgu, i); |
| 1335 | if (r) { | 1342 | if (r) { |
| 1336 | ipu3_v4l2_subdev_cleanup(imgu, i); | 1343 | imgu_v4l2_subdev_cleanup(imgu, i); |
| 1337 | goto pipes_cleanup; | 1344 | goto pipes_cleanup; |
| 1338 | } | 1345 | } |
| 1339 | } | 1346 | } |
| @@ -1341,7 +1348,7 @@ static int imgu_v4l2_register_pipes(struct imgu_device *imgu) | |||
| 1341 | return 0; | 1348 | return 0; |
| 1342 | 1349 | ||
| 1343 | pipes_cleanup: | 1350 | pipes_cleanup: |
| 1344 | ipu3_v4l2_cleanup_pipes(imgu, i); | 1351 | imgu_v4l2_cleanup_pipes(imgu, i); |
| 1345 | return r; | 1352 | return r; |
| 1346 | } | 1353 | } |
| 1347 | 1354 | ||
| @@ -1389,7 +1396,7 @@ int imgu_v4l2_register(struct imgu_device *imgu) | |||
| 1389 | return 0; | 1396 | return 0; |
| 1390 | 1397 | ||
| 1391 | fail_subdevs: | 1398 | fail_subdevs: |
| 1392 | ipu3_v4l2_cleanup_pipes(imgu, IMGU_MAX_PIPE_NUM); | 1399 | imgu_v4l2_cleanup_pipes(imgu, IMGU_MAX_PIPE_NUM); |
| 1393 | fail_v4l2_pipes: | 1400 | fail_v4l2_pipes: |
| 1394 | v4l2_device_unregister(&imgu->v4l2_dev); | 1401 | v4l2_device_unregister(&imgu->v4l2_dev); |
| 1395 | fail_v4l2_dev: | 1402 | fail_v4l2_dev: |
| @@ -1401,7 +1408,7 @@ fail_v4l2_dev: | |||
| 1401 | int imgu_v4l2_unregister(struct imgu_device *imgu) | 1408 | int imgu_v4l2_unregister(struct imgu_device *imgu) |
| 1402 | { | 1409 | { |
| 1403 | media_device_unregister(&imgu->media_dev); | 1410 | media_device_unregister(&imgu->media_dev); |
| 1404 | ipu3_v4l2_cleanup_pipes(imgu, IMGU_MAX_PIPE_NUM); | 1411 | imgu_v4l2_cleanup_pipes(imgu, IMGU_MAX_PIPE_NUM); |
| 1405 | v4l2_device_unregister(&imgu->v4l2_dev); | 1412 | v4l2_device_unregister(&imgu->v4l2_dev); |
| 1406 | media_device_cleanup(&imgu->media_dev); | 1413 | media_device_cleanup(&imgu->media_dev); |
| 1407 | 1414 | ||
| @@ -1411,8 +1418,8 @@ int imgu_v4l2_unregister(struct imgu_device *imgu) | |||
| 1411 | void imgu_v4l2_buffer_done(struct vb2_buffer *vb, | 1418 | void imgu_v4l2_buffer_done(struct vb2_buffer *vb, |
| 1412 | enum vb2_buffer_state state) | 1419 | enum vb2_buffer_state state) |
| 1413 | { | 1420 | { |
| 1414 | struct ipu3_vb2_buffer *b = | 1421 | struct imgu_vb2_buffer *b = |
| 1415 | container_of(vb, struct ipu3_vb2_buffer, vbb.vb2_buf); | 1422 | container_of(vb, struct imgu_vb2_buffer, vbb.vb2_buf); |
| 1416 | 1423 | ||
| 1417 | list_del(&b->list); | 1424 | list_del(&b->list); |
| 1418 | vb2_buffer_done(&b->vbb.vb2_buf, state); | 1425 | vb2_buffer_done(&b->vbb.vb2_buf, state); |
diff --git a/drivers/staging/media/ipu3/ipu3.c b/drivers/staging/media/ipu3/ipu3.c index d521b3afb8b1..d575ac78c8f0 100644 --- a/drivers/staging/media/ipu3/ipu3.c +++ b/drivers/staging/media/ipu3/ipu3.c | |||
| @@ -72,7 +72,7 @@ static void imgu_dummybufs_cleanup(struct imgu_device *imgu, unsigned int pipe) | |||
| 72 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; | 72 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; |
| 73 | 73 | ||
| 74 | for (i = 0; i < IPU3_CSS_QUEUES; i++) | 74 | for (i = 0; i < IPU3_CSS_QUEUES; i++) |
| 75 | ipu3_dmamap_free(imgu, | 75 | imgu_dmamap_free(imgu, |
| 76 | &imgu_pipe->queues[i].dmap); | 76 | &imgu_pipe->queues[i].dmap); |
| 77 | } | 77 | } |
| 78 | 78 | ||
| @@ -93,7 +93,7 @@ static int imgu_dummybufs_preallocate(struct imgu_device *imgu, | |||
| 93 | if (i == IMGU_QUEUE_MASTER || size == 0) | 93 | if (i == IMGU_QUEUE_MASTER || size == 0) |
| 94 | continue; | 94 | continue; |
| 95 | 95 | ||
| 96 | if (!ipu3_dmamap_alloc(imgu, | 96 | if (!imgu_dmamap_alloc(imgu, |
| 97 | &imgu_pipe->queues[i].dmap, size)) { | 97 | &imgu_pipe->queues[i].dmap, size)) { |
| 98 | imgu_dummybufs_cleanup(imgu, pipe); | 98 | imgu_dummybufs_cleanup(imgu, pipe); |
| 99 | return -ENOMEM; | 99 | return -ENOMEM; |
| @@ -133,7 +133,7 @@ static int imgu_dummybufs_init(struct imgu_device *imgu, unsigned int pipe) | |||
| 133 | else | 133 | else |
| 134 | size = mpix->plane_fmt[0].sizeimage; | 134 | size = mpix->plane_fmt[0].sizeimage; |
| 135 | 135 | ||
| 136 | if (ipu3_css_dma_buffer_resize(imgu, | 136 | if (imgu_css_dma_buffer_resize(imgu, |
| 137 | &imgu_pipe->queues[i].dmap, | 137 | &imgu_pipe->queues[i].dmap, |
| 138 | size)) { | 138 | size)) { |
| 139 | imgu_dummybufs_cleanup(imgu, pipe); | 139 | imgu_dummybufs_cleanup(imgu, pipe); |
| @@ -141,7 +141,7 @@ static int imgu_dummybufs_init(struct imgu_device *imgu, unsigned int pipe) | |||
| 141 | } | 141 | } |
| 142 | 142 | ||
| 143 | for (k = 0; k < IMGU_MAX_QUEUE_DEPTH; k++) | 143 | for (k = 0; k < IMGU_MAX_QUEUE_DEPTH; k++) |
| 144 | ipu3_css_buf_init(&imgu_pipe->queues[i].dummybufs[k], i, | 144 | imgu_css_buf_init(&imgu_pipe->queues[i].dummybufs[k], i, |
| 145 | imgu_pipe->queues[i].dmap.daddr); | 145 | imgu_pipe->queues[i].dmap.daddr); |
| 146 | } | 146 | } |
| 147 | 147 | ||
| @@ -149,7 +149,7 @@ static int imgu_dummybufs_init(struct imgu_device *imgu, unsigned int pipe) | |||
| 149 | } | 149 | } |
| 150 | 150 | ||
| 151 | /* May be called from atomic context */ | 151 | /* May be called from atomic context */ |
| 152 | static struct ipu3_css_buffer *imgu_dummybufs_get(struct imgu_device *imgu, | 152 | static struct imgu_css_buffer *imgu_dummybufs_get(struct imgu_device *imgu, |
| 153 | int queue, unsigned int pipe) | 153 | int queue, unsigned int pipe) |
| 154 | { | 154 | { |
| 155 | unsigned int i; | 155 | unsigned int i; |
| @@ -164,14 +164,14 @@ static struct ipu3_css_buffer *imgu_dummybufs_get(struct imgu_device *imgu, | |||
| 164 | return NULL; | 164 | return NULL; |
| 165 | 165 | ||
| 166 | for (i = 0; i < IMGU_MAX_QUEUE_DEPTH; i++) | 166 | for (i = 0; i < IMGU_MAX_QUEUE_DEPTH; i++) |
| 167 | if (ipu3_css_buf_state(&imgu_pipe->queues[queue].dummybufs[i]) != | 167 | if (imgu_css_buf_state(&imgu_pipe->queues[queue].dummybufs[i]) != |
| 168 | IPU3_CSS_BUFFER_QUEUED) | 168 | IPU3_CSS_BUFFER_QUEUED) |
| 169 | break; | 169 | break; |
| 170 | 170 | ||
| 171 | if (i == IMGU_MAX_QUEUE_DEPTH) | 171 | if (i == IMGU_MAX_QUEUE_DEPTH) |
| 172 | return NULL; | 172 | return NULL; |
| 173 | 173 | ||
| 174 | ipu3_css_buf_init(&imgu_pipe->queues[queue].dummybufs[i], queue, | 174 | imgu_css_buf_init(&imgu_pipe->queues[queue].dummybufs[i], queue, |
| 175 | imgu_pipe->queues[queue].dmap.daddr); | 175 | imgu_pipe->queues[queue].dmap.daddr); |
| 176 | 176 | ||
| 177 | return &imgu_pipe->queues[queue].dummybufs[i]; | 177 | return &imgu_pipe->queues[queue].dummybufs[i]; |
| @@ -179,7 +179,7 @@ static struct ipu3_css_buffer *imgu_dummybufs_get(struct imgu_device *imgu, | |||
| 179 | 179 | ||
| 180 | /* Check if given buffer is a dummy buffer */ | 180 | /* Check if given buffer is a dummy buffer */ |
| 181 | static bool imgu_dummybufs_check(struct imgu_device *imgu, | 181 | static bool imgu_dummybufs_check(struct imgu_device *imgu, |
| 182 | struct ipu3_css_buffer *buf, | 182 | struct imgu_css_buffer *buf, |
| 183 | unsigned int pipe) | 183 | unsigned int pipe) |
| 184 | { | 184 | { |
| 185 | unsigned int i; | 185 | unsigned int i; |
| @@ -200,7 +200,7 @@ static void imgu_buffer_done(struct imgu_device *imgu, struct vb2_buffer *vb, | |||
| 200 | mutex_unlock(&imgu->lock); | 200 | mutex_unlock(&imgu->lock); |
| 201 | } | 201 | } |
| 202 | 202 | ||
| 203 | static struct ipu3_css_buffer *imgu_queue_getbuf(struct imgu_device *imgu, | 203 | static struct imgu_css_buffer *imgu_queue_getbuf(struct imgu_device *imgu, |
| 204 | unsigned int node, | 204 | unsigned int node, |
| 205 | unsigned int pipe) | 205 | unsigned int pipe) |
| 206 | { | 206 | { |
| @@ -212,7 +212,7 @@ static struct ipu3_css_buffer *imgu_queue_getbuf(struct imgu_device *imgu, | |||
| 212 | 212 | ||
| 213 | /* Find first free buffer from the node */ | 213 | /* Find first free buffer from the node */ |
| 214 | list_for_each_entry(buf, &imgu_pipe->nodes[node].buffers, vid_buf.list) { | 214 | list_for_each_entry(buf, &imgu_pipe->nodes[node].buffers, vid_buf.list) { |
| 215 | if (ipu3_css_buf_state(&buf->css_buf) == IPU3_CSS_BUFFER_NEW) | 215 | if (imgu_css_buf_state(&buf->css_buf) == IPU3_CSS_BUFFER_NEW) |
| 216 | return &buf->css_buf; | 216 | return &buf->css_buf; |
| 217 | } | 217 | } |
| 218 | 218 | ||
| @@ -230,7 +230,7 @@ int imgu_queue_buffers(struct imgu_device *imgu, bool initial, unsigned int pipe | |||
| 230 | int r = 0; | 230 | int r = 0; |
| 231 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; | 231 | struct imgu_media_pipe *imgu_pipe = &imgu->imgu_pipe[pipe]; |
| 232 | 232 | ||
| 233 | if (!ipu3_css_is_streaming(&imgu->css)) | 233 | if (!imgu_css_is_streaming(&imgu->css)) |
| 234 | return 0; | 234 | return 0; |
| 235 | 235 | ||
| 236 | dev_dbg(&imgu->pci_dev->dev, "Queue buffers to pipe %d", pipe); | 236 | dev_dbg(&imgu->pci_dev->dev, "Queue buffers to pipe %d", pipe); |
| @@ -247,7 +247,7 @@ int imgu_queue_buffers(struct imgu_device *imgu, bool initial, unsigned int pipe | |||
| 247 | "Vf not enabled, ignore queue"); | 247 | "Vf not enabled, ignore queue"); |
| 248 | continue; | 248 | continue; |
| 249 | } else if (imgu_pipe->queue_enabled[node]) { | 249 | } else if (imgu_pipe->queue_enabled[node]) { |
| 250 | struct ipu3_css_buffer *buf = | 250 | struct imgu_css_buffer *buf = |
| 251 | imgu_queue_getbuf(imgu, node, pipe); | 251 | imgu_queue_getbuf(imgu, node, pipe); |
| 252 | struct imgu_buffer *ibuf = NULL; | 252 | struct imgu_buffer *ibuf = NULL; |
| 253 | bool dummy; | 253 | bool dummy; |
| @@ -255,7 +255,7 @@ int imgu_queue_buffers(struct imgu_device *imgu, bool initial, unsigned int pipe | |||
| 255 | if (!buf) | 255 | if (!buf) |
| 256 | break; | 256 | break; |
| 257 | 257 | ||
| 258 | r = ipu3_css_buf_queue(&imgu->css, pipe, buf); | 258 | r = imgu_css_buf_queue(&imgu->css, pipe, buf); |
| 259 | if (r) | 259 | if (r) |
| 260 | break; | 260 | break; |
| 261 | dummy = imgu_dummybufs_check(imgu, buf, pipe); | 261 | dummy = imgu_dummybufs_check(imgu, buf, pipe); |
| @@ -300,7 +300,7 @@ failed: | |||
| 300 | list_for_each_entry_safe(buf, buf0, | 300 | list_for_each_entry_safe(buf, buf0, |
| 301 | &imgu_pipe->nodes[node].buffers, | 301 | &imgu_pipe->nodes[node].buffers, |
| 302 | vid_buf.list) { | 302 | vid_buf.list) { |
| 303 | if (ipu3_css_buf_state(&buf->css_buf) == | 303 | if (imgu_css_buf_state(&buf->css_buf) == |
| 304 | IPU3_CSS_BUFFER_QUEUED) | 304 | IPU3_CSS_BUFFER_QUEUED) |
| 305 | continue; /* Was already queued, skip */ | 305 | continue; /* Was already queued, skip */ |
| 306 | 306 | ||
| @@ -317,18 +317,18 @@ static int imgu_powerup(struct imgu_device *imgu) | |||
| 317 | { | 317 | { |
| 318 | int r; | 318 | int r; |
| 319 | 319 | ||
| 320 | r = ipu3_css_set_powerup(&imgu->pci_dev->dev, imgu->base); | 320 | r = imgu_css_set_powerup(&imgu->pci_dev->dev, imgu->base); |
| 321 | if (r) | 321 | if (r) |
| 322 | return r; | 322 | return r; |
| 323 | 323 | ||
| 324 | ipu3_mmu_resume(imgu->mmu); | 324 | imgu_mmu_resume(imgu->mmu); |
| 325 | return 0; | 325 | return 0; |
| 326 | } | 326 | } |
| 327 | 327 | ||
| 328 | static void imgu_powerdown(struct imgu_device *imgu) | 328 | static void imgu_powerdown(struct imgu_device *imgu) |
| 329 | { | 329 | { |
| 330 | ipu3_mmu_suspend(imgu->mmu); | 330 | imgu_mmu_suspend(imgu->mmu); |
| 331 | ipu3_css_set_powerdown(&imgu->pci_dev->dev, imgu->base); | 331 | imgu_css_set_powerdown(&imgu->pci_dev->dev, imgu->base); |
| 332 | } | 332 | } |
| 333 | 333 | ||
| 334 | int imgu_s_stream(struct imgu_device *imgu, int enable) | 334 | int imgu_s_stream(struct imgu_device *imgu, int enable) |
| @@ -341,7 +341,7 @@ int imgu_s_stream(struct imgu_device *imgu, int enable) | |||
| 341 | dev_dbg(dev, "stream off\n"); | 341 | dev_dbg(dev, "stream off\n"); |
| 342 | /* Block new buffers to be queued to CSS. */ | 342 | /* Block new buffers to be queued to CSS. */ |
| 343 | atomic_set(&imgu->qbuf_barrier, 1); | 343 | atomic_set(&imgu->qbuf_barrier, 1); |
| 344 | ipu3_css_stop_streaming(&imgu->css); | 344 | imgu_css_stop_streaming(&imgu->css); |
| 345 | synchronize_irq(imgu->pci_dev->irq); | 345 | synchronize_irq(imgu->pci_dev->irq); |
| 346 | atomic_set(&imgu->qbuf_barrier, 0); | 346 | atomic_set(&imgu->qbuf_barrier, 0); |
| 347 | imgu_powerdown(imgu); | 347 | imgu_powerdown(imgu); |
| @@ -366,7 +366,7 @@ int imgu_s_stream(struct imgu_device *imgu, int enable) | |||
| 366 | } | 366 | } |
| 367 | 367 | ||
| 368 | /* Start CSS streaming */ | 368 | /* Start CSS streaming */ |
| 369 | r = ipu3_css_start_streaming(&imgu->css); | 369 | r = imgu_css_start_streaming(&imgu->css); |
| 370 | if (r) { | 370 | if (r) { |
| 371 | dev_err(dev, "failed to start css streaming (%d)", r); | 371 | dev_err(dev, "failed to start css streaming (%d)", r); |
| 372 | goto fail_start_streaming; | 372 | goto fail_start_streaming; |
| @@ -393,7 +393,7 @@ fail_queueing: | |||
| 393 | for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) | 393 | for_each_set_bit(pipe, imgu->css.enabled_pipes, IMGU_MAX_PIPE_NUM) |
| 394 | imgu_dummybufs_cleanup(imgu, pipe); | 394 | imgu_dummybufs_cleanup(imgu, pipe); |
| 395 | fail_dummybufs: | 395 | fail_dummybufs: |
| 396 | ipu3_css_stop_streaming(&imgu->css); | 396 | imgu_css_stop_streaming(&imgu->css); |
| 397 | fail_start_streaming: | 397 | fail_start_streaming: |
| 398 | pm_runtime_put(dev); | 398 | pm_runtime_put(dev); |
| 399 | 399 | ||
| @@ -435,7 +435,7 @@ static int imgu_video_nodes_init(struct imgu_device *imgu) | |||
| 435 | 435 | ||
| 436 | rects[IPU3_CSS_RECT_EFFECTIVE] = &imgu_pipe->imgu_sd.rect.eff; | 436 | rects[IPU3_CSS_RECT_EFFECTIVE] = &imgu_pipe->imgu_sd.rect.eff; |
| 437 | rects[IPU3_CSS_RECT_BDS] = &imgu_pipe->imgu_sd.rect.bds; | 437 | rects[IPU3_CSS_RECT_BDS] = &imgu_pipe->imgu_sd.rect.bds; |
| 438 | ipu3_css_fmt_set(&imgu->css, fmts, rects, j); | 438 | imgu_css_fmt_set(&imgu->css, fmts, rects, j); |
| 439 | 439 | ||
| 440 | /* Pre-allocate dummy buffers */ | 440 | /* Pre-allocate dummy buffers */ |
| 441 | r = imgu_dummybufs_preallocate(imgu, j); | 441 | r = imgu_dummybufs_preallocate(imgu, j); |
| @@ -478,23 +478,22 @@ static irqreturn_t imgu_isr_threaded(int irq, void *imgu_ptr) | |||
| 478 | /* Dequeue / queue buffers */ | 478 | /* Dequeue / queue buffers */ |
| 479 | do { | 479 | do { |
| 480 | u64 ns = ktime_get_ns(); | 480 | u64 ns = ktime_get_ns(); |
| 481 | struct ipu3_css_buffer *b; | 481 | struct imgu_css_buffer *b; |
| 482 | struct imgu_buffer *buf = NULL; | 482 | struct imgu_buffer *buf = NULL; |
| 483 | unsigned int node, pipe; | 483 | unsigned int node, pipe; |
| 484 | bool dummy; | 484 | bool dummy; |
| 485 | 485 | ||
| 486 | do { | 486 | do { |
| 487 | mutex_lock(&imgu->lock); | 487 | mutex_lock(&imgu->lock); |
| 488 | b = ipu3_css_buf_dequeue(&imgu->css); | 488 | b = imgu_css_buf_dequeue(&imgu->css); |
| 489 | mutex_unlock(&imgu->lock); | 489 | mutex_unlock(&imgu->lock); |
| 490 | } while (PTR_ERR(b) == -EAGAIN); | 490 | } while (PTR_ERR(b) == -EAGAIN); |
| 491 | 491 | ||
| 492 | if (IS_ERR_OR_NULL(b)) { | 492 | if (IS_ERR(b)) { |
| 493 | if (!b || PTR_ERR(b) == -EBUSY) /* All done */ | 493 | if (PTR_ERR(b) != -EBUSY) /* All done */ |
| 494 | break; | 494 | dev_err(&imgu->pci_dev->dev, |
| 495 | dev_err(&imgu->pci_dev->dev, | 495 | "failed to dequeue buffers (%ld)\n", |
| 496 | "failed to dequeue buffers (%ld)\n", | 496 | PTR_ERR(b)); |
| 497 | PTR_ERR(b)); | ||
| 498 | break; | 497 | break; |
| 499 | } | 498 | } |
| 500 | 499 | ||
| @@ -526,12 +525,12 @@ static irqreturn_t imgu_isr_threaded(int irq, void *imgu_ptr) | |||
| 526 | buf->vid_buf.vbb.sequence); | 525 | buf->vid_buf.vbb.sequence); |
| 527 | } | 526 | } |
| 528 | imgu_buffer_done(imgu, &buf->vid_buf.vbb.vb2_buf, | 527 | imgu_buffer_done(imgu, &buf->vid_buf.vbb.vb2_buf, |
| 529 | ipu3_css_buf_state(&buf->css_buf) == | 528 | imgu_css_buf_state(&buf->css_buf) == |
| 530 | IPU3_CSS_BUFFER_DONE ? | 529 | IPU3_CSS_BUFFER_DONE ? |
| 531 | VB2_BUF_STATE_DONE : | 530 | VB2_BUF_STATE_DONE : |
| 532 | VB2_BUF_STATE_ERROR); | 531 | VB2_BUF_STATE_ERROR); |
| 533 | mutex_lock(&imgu->lock); | 532 | mutex_lock(&imgu->lock); |
| 534 | if (ipu3_css_queue_empty(&imgu->css)) | 533 | if (imgu_css_queue_empty(&imgu->css)) |
| 535 | wake_up_all(&imgu->buf_drain_wq); | 534 | wake_up_all(&imgu->buf_drain_wq); |
| 536 | mutex_unlock(&imgu->lock); | 535 | mutex_unlock(&imgu->lock); |
| 537 | } while (1); | 536 | } while (1); |
| @@ -553,7 +552,7 @@ static irqreturn_t imgu_isr(int irq, void *imgu_ptr) | |||
| 553 | struct imgu_device *imgu = imgu_ptr; | 552 | struct imgu_device *imgu = imgu_ptr; |
| 554 | 553 | ||
| 555 | /* acknowledge interruption */ | 554 | /* acknowledge interruption */ |
| 556 | if (ipu3_css_irq_ack(&imgu->css) < 0) | 555 | if (imgu_css_irq_ack(&imgu->css) < 0) |
| 557 | return IRQ_NONE; | 556 | return IRQ_NONE; |
| 558 | 557 | ||
| 559 | return IRQ_WAKE_THREAD; | 558 | return IRQ_WAKE_THREAD; |
| @@ -638,21 +637,21 @@ static int imgu_pci_probe(struct pci_dev *pci_dev, | |||
| 638 | atomic_set(&imgu->qbuf_barrier, 0); | 637 | atomic_set(&imgu->qbuf_barrier, 0); |
| 639 | init_waitqueue_head(&imgu->buf_drain_wq); | 638 | init_waitqueue_head(&imgu->buf_drain_wq); |
| 640 | 639 | ||
| 641 | r = ipu3_css_set_powerup(&pci_dev->dev, imgu->base); | 640 | r = imgu_css_set_powerup(&pci_dev->dev, imgu->base); |
| 642 | if (r) { | 641 | if (r) { |
| 643 | dev_err(&pci_dev->dev, | 642 | dev_err(&pci_dev->dev, |
| 644 | "failed to power up CSS (%d)\n", r); | 643 | "failed to power up CSS (%d)\n", r); |
| 645 | goto out_mutex_destroy; | 644 | goto out_mutex_destroy; |
| 646 | } | 645 | } |
| 647 | 646 | ||
| 648 | imgu->mmu = ipu3_mmu_init(&pci_dev->dev, imgu->base); | 647 | imgu->mmu = imgu_mmu_init(&pci_dev->dev, imgu->base); |
| 649 | if (IS_ERR(imgu->mmu)) { | 648 | if (IS_ERR(imgu->mmu)) { |
| 650 | r = PTR_ERR(imgu->mmu); | 649 | r = PTR_ERR(imgu->mmu); |
| 651 | dev_err(&pci_dev->dev, "failed to initialize MMU (%d)\n", r); | 650 | dev_err(&pci_dev->dev, "failed to initialize MMU (%d)\n", r); |
| 652 | goto out_css_powerdown; | 651 | goto out_css_powerdown; |
| 653 | } | 652 | } |
| 654 | 653 | ||
| 655 | r = ipu3_dmamap_init(imgu); | 654 | r = imgu_dmamap_init(imgu); |
| 656 | if (r) { | 655 | if (r) { |
| 657 | dev_err(&pci_dev->dev, | 656 | dev_err(&pci_dev->dev, |
| 658 | "failed to initialize DMA mapping (%d)\n", r); | 657 | "failed to initialize DMA mapping (%d)\n", r); |
| @@ -660,7 +659,7 @@ static int imgu_pci_probe(struct pci_dev *pci_dev, | |||
| 660 | } | 659 | } |
| 661 | 660 | ||
| 662 | /* ISP programming */ | 661 | /* ISP programming */ |
| 663 | r = ipu3_css_init(&pci_dev->dev, &imgu->css, imgu->base, phys_len); | 662 | r = imgu_css_init(&pci_dev->dev, &imgu->css, imgu->base, phys_len); |
| 664 | if (r) { | 663 | if (r) { |
| 665 | dev_err(&pci_dev->dev, "failed to initialize CSS (%d)\n", r); | 664 | dev_err(&pci_dev->dev, "failed to initialize CSS (%d)\n", r); |
| 666 | goto out_dmamap_exit; | 665 | goto out_dmamap_exit; |
| @@ -690,13 +689,13 @@ static int imgu_pci_probe(struct pci_dev *pci_dev, | |||
| 690 | out_video_exit: | 689 | out_video_exit: |
| 691 | imgu_video_nodes_exit(imgu); | 690 | imgu_video_nodes_exit(imgu); |
| 692 | out_css_cleanup: | 691 | out_css_cleanup: |
| 693 | ipu3_css_cleanup(&imgu->css); | 692 | imgu_css_cleanup(&imgu->css); |
| 694 | out_dmamap_exit: | 693 | out_dmamap_exit: |
| 695 | ipu3_dmamap_exit(imgu); | 694 | imgu_dmamap_exit(imgu); |
| 696 | out_mmu_exit: | 695 | out_mmu_exit: |
| 697 | ipu3_mmu_exit(imgu->mmu); | 696 | imgu_mmu_exit(imgu->mmu); |
| 698 | out_css_powerdown: | 697 | out_css_powerdown: |
| 699 | ipu3_css_set_powerdown(&pci_dev->dev, imgu->base); | 698 | imgu_css_set_powerdown(&pci_dev->dev, imgu->base); |
| 700 | out_mutex_destroy: | 699 | out_mutex_destroy: |
| 701 | mutex_destroy(&imgu->lock); | 700 | mutex_destroy(&imgu->lock); |
| 702 | 701 | ||
| @@ -711,10 +710,10 @@ static void imgu_pci_remove(struct pci_dev *pci_dev) | |||
| 711 | pm_runtime_get_noresume(&pci_dev->dev); | 710 | pm_runtime_get_noresume(&pci_dev->dev); |
| 712 | 711 | ||
| 713 | imgu_video_nodes_exit(imgu); | 712 | imgu_video_nodes_exit(imgu); |
| 714 | ipu3_css_cleanup(&imgu->css); | 713 | imgu_css_cleanup(&imgu->css); |
| 715 | ipu3_css_set_powerdown(&pci_dev->dev, imgu->base); | 714 | imgu_css_set_powerdown(&pci_dev->dev, imgu->base); |
| 716 | ipu3_dmamap_exit(imgu); | 715 | imgu_dmamap_exit(imgu); |
| 717 | ipu3_mmu_exit(imgu->mmu); | 716 | imgu_mmu_exit(imgu->mmu); |
| 718 | mutex_destroy(&imgu->lock); | 717 | mutex_destroy(&imgu->lock); |
| 719 | } | 718 | } |
| 720 | 719 | ||
| @@ -724,7 +723,7 @@ static int __maybe_unused imgu_suspend(struct device *dev) | |||
| 724 | struct imgu_device *imgu = pci_get_drvdata(pci_dev); | 723 | struct imgu_device *imgu = pci_get_drvdata(pci_dev); |
| 725 | 724 | ||
| 726 | dev_dbg(dev, "enter %s\n", __func__); | 725 | dev_dbg(dev, "enter %s\n", __func__); |
| 727 | imgu->suspend_in_stream = ipu3_css_is_streaming(&imgu->css); | 726 | imgu->suspend_in_stream = imgu_css_is_streaming(&imgu->css); |
| 728 | if (!imgu->suspend_in_stream) | 727 | if (!imgu->suspend_in_stream) |
| 729 | goto out; | 728 | goto out; |
| 730 | /* Block new buffers to be queued to CSS. */ | 729 | /* Block new buffers to be queued to CSS. */ |
| @@ -736,10 +735,10 @@ static int __maybe_unused imgu_suspend(struct device *dev) | |||
| 736 | synchronize_irq(pci_dev->irq); | 735 | synchronize_irq(pci_dev->irq); |
| 737 | /* Wait until all buffers in CSS are done. */ | 736 | /* Wait until all buffers in CSS are done. */ |
| 738 | if (!wait_event_timeout(imgu->buf_drain_wq, | 737 | if (!wait_event_timeout(imgu->buf_drain_wq, |
| 739 | ipu3_css_queue_empty(&imgu->css), msecs_to_jiffies(1000))) | 738 | imgu_css_queue_empty(&imgu->css), msecs_to_jiffies(1000))) |
| 740 | dev_err(dev, "wait buffer drain timeout.\n"); | 739 | dev_err(dev, "wait buffer drain timeout.\n"); |
| 741 | 740 | ||
| 742 | ipu3_css_stop_streaming(&imgu->css); | 741 | imgu_css_stop_streaming(&imgu->css); |
| 743 | atomic_set(&imgu->qbuf_barrier, 0); | 742 | atomic_set(&imgu->qbuf_barrier, 0); |
| 744 | imgu_powerdown(imgu); | 743 | imgu_powerdown(imgu); |
| 745 | pm_runtime_force_suspend(dev); | 744 | pm_runtime_force_suspend(dev); |
| @@ -769,7 +768,7 @@ static int __maybe_unused imgu_resume(struct device *dev) | |||
| 769 | } | 768 | } |
| 770 | 769 | ||
| 771 | /* Start CSS streaming */ | 770 | /* Start CSS streaming */ |
| 772 | r = ipu3_css_start_streaming(&imgu->css); | 771 | r = imgu_css_start_streaming(&imgu->css); |
| 773 | if (r) { | 772 | if (r) { |
| 774 | dev_err(dev, "failed to resume css streaming (%d)", r); | 773 | dev_err(dev, "failed to resume css streaming (%d)", r); |
| 775 | goto out; | 774 | goto out; |
diff --git a/drivers/staging/media/ipu3/ipu3.h b/drivers/staging/media/ipu3/ipu3.h index 04fc99f47ebb..73b123b2b8a2 100644 --- a/drivers/staging/media/ipu3/ipu3.h +++ b/drivers/staging/media/ipu3/ipu3.h | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | #define IMGU_NODE_STAT_3A 4 /* 3A statistics */ | 32 | #define IMGU_NODE_STAT_3A 4 /* 3A statistics */ |
| 33 | #define IMGU_NODE_NUM 5 | 33 | #define IMGU_NODE_NUM 5 |
| 34 | 34 | ||
| 35 | #define file_to_intel_ipu3_node(__file) \ | 35 | #define file_to_intel_imgu_node(__file) \ |
| 36 | container_of(video_devdata(__file), struct imgu_video_device, vdev) | 36 | container_of(video_devdata(__file), struct imgu_video_device, vdev) |
| 37 | 37 | ||
| 38 | #define IPU3_INPUT_MIN_WIDTH 0U | 38 | #define IPU3_INPUT_MIN_WIDTH 0U |
| @@ -44,7 +44,7 @@ | |||
| 44 | #define IPU3_OUTPUT_MAX_WIDTH 4480U | 44 | #define IPU3_OUTPUT_MAX_WIDTH 4480U |
| 45 | #define IPU3_OUTPUT_MAX_HEIGHT 34004U | 45 | #define IPU3_OUTPUT_MAX_HEIGHT 34004U |
| 46 | 46 | ||
| 47 | struct ipu3_vb2_buffer { | 47 | struct imgu_vb2_buffer { |
| 48 | /* Public fields */ | 48 | /* Public fields */ |
| 49 | struct vb2_v4l2_buffer vbb; /* Must be the first field */ | 49 | struct vb2_v4l2_buffer vbb; /* Must be the first field */ |
| 50 | 50 | ||
| @@ -53,9 +53,9 @@ struct ipu3_vb2_buffer { | |||
| 53 | }; | 53 | }; |
| 54 | 54 | ||
| 55 | struct imgu_buffer { | 55 | struct imgu_buffer { |
| 56 | struct ipu3_vb2_buffer vid_buf; /* Must be the first field */ | 56 | struct imgu_vb2_buffer vid_buf; /* Must be the first field */ |
| 57 | struct ipu3_css_buffer css_buf; | 57 | struct imgu_css_buffer css_buf; |
| 58 | struct ipu3_css_map map; | 58 | struct imgu_css_map map; |
| 59 | }; | 59 | }; |
| 60 | 60 | ||
| 61 | struct imgu_node_mapping { | 61 | struct imgu_node_mapping { |
| @@ -107,8 +107,8 @@ struct imgu_media_pipe { | |||
| 107 | 107 | ||
| 108 | /* Internally enabled queues */ | 108 | /* Internally enabled queues */ |
| 109 | struct { | 109 | struct { |
| 110 | struct ipu3_css_map dmap; | 110 | struct imgu_css_map dmap; |
| 111 | struct ipu3_css_buffer dummybufs[IMGU_MAX_QUEUE_DEPTH]; | 111 | struct imgu_css_buffer dummybufs[IMGU_MAX_QUEUE_DEPTH]; |
| 112 | } queues[IPU3_CSS_QUEUES]; | 112 | } queues[IPU3_CSS_QUEUES]; |
| 113 | struct imgu_video_device nodes[IMGU_NODE_NUM]; | 113 | struct imgu_video_device nodes[IMGU_NODE_NUM]; |
| 114 | bool queue_enabled[IMGU_NODE_NUM]; | 114 | bool queue_enabled[IMGU_NODE_NUM]; |
| @@ -135,18 +135,18 @@ struct imgu_device { | |||
| 135 | struct v4l2_file_operations v4l2_file_ops; | 135 | struct v4l2_file_operations v4l2_file_ops; |
| 136 | 136 | ||
| 137 | /* MMU driver for css */ | 137 | /* MMU driver for css */ |
| 138 | struct ipu3_mmu_info *mmu; | 138 | struct imgu_mmu_info *mmu; |
| 139 | struct iova_domain iova_domain; | 139 | struct iova_domain iova_domain; |
| 140 | 140 | ||
| 141 | /* css - Camera Sub-System */ | 141 | /* css - Camera Sub-System */ |
| 142 | struct ipu3_css css; | 142 | struct imgu_css css; |
| 143 | 143 | ||
| 144 | /* | 144 | /* |
| 145 | * Coarse-grained lock to protect | 145 | * Coarse-grained lock to protect |
| 146 | * vid_buf.list and css->queue | 146 | * vid_buf.list and css->queue |
| 147 | */ | 147 | */ |
| 148 | struct mutex lock; | 148 | struct mutex lock; |
| 149 | /* Forbit streaming and buffer queuing during system suspend. */ | 149 | /* Forbid streaming and buffer queuing during system suspend. */ |
| 150 | atomic_t qbuf_barrier; | 150 | atomic_t qbuf_barrier; |
| 151 | /* Indicate if system suspend take place while imgu is streaming. */ | 151 | /* Indicate if system suspend take place while imgu is streaming. */ |
| 152 | bool suspend_in_stream; | 152 | bool suspend_in_stream; |
diff --git a/drivers/staging/media/omap4iss/iss_csi2.c b/drivers/staging/media/omap4iss/iss_csi2.c index 059cf5bd3c36..a6dc2d2b1228 100644 --- a/drivers/staging/media/omap4iss/iss_csi2.c +++ b/drivers/staging/media/omap4iss/iss_csi2.c | |||
| @@ -712,7 +712,7 @@ static void csi2_isr_ctx(struct iss_csi2_device *csi2, | |||
| 712 | 712 | ||
| 713 | /* Skip interrupts until we reach the frame skip count. The CSI2 will be | 713 | /* Skip interrupts until we reach the frame skip count. The CSI2 will be |
| 714 | * automatically disabled, as the frame skip count has been programmed | 714 | * automatically disabled, as the frame skip count has been programmed |
| 715 | * in the CSI2_CTx_CTRL1::COUNT field, so reenable it. | 715 | * in the CSI2_CTx_CTRL1::COUNT field, so re-enable it. |
| 716 | * | 716 | * |
| 717 | * It would have been nice to rely on the FRAME_NUMBER interrupt instead | 717 | * It would have been nice to rely on the FRAME_NUMBER interrupt instead |
| 718 | * but it turned out that the interrupt is only generated when the CSI2 | 718 | * but it turned out that the interrupt is only generated when the CSI2 |
diff --git a/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw_jpeg_enc.c b/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw_jpeg_enc.c index 5282236d1bb1..06daea66fb49 100644 --- a/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw_jpeg_enc.c +++ b/drivers/staging/media/rockchip/vpu/rk3288_vpu_hw_jpeg_enc.c | |||
| @@ -80,7 +80,7 @@ rk3288_vpu_jpeg_enc_set_qtable(struct rockchip_vpu_dev *vpu, | |||
| 80 | void rk3288_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) | 80 | void rk3288_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) |
| 81 | { | 81 | { |
| 82 | struct rockchip_vpu_dev *vpu = ctx->dev; | 82 | struct rockchip_vpu_dev *vpu = ctx->dev; |
| 83 | struct vb2_buffer *src_buf, *dst_buf; | 83 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 84 | struct rockchip_vpu_jpeg_ctx jpeg_ctx; | 84 | struct rockchip_vpu_jpeg_ctx jpeg_ctx; |
| 85 | u32 reg; | 85 | u32 reg; |
| 86 | 86 | ||
| @@ -88,7 +88,7 @@ void rk3288_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) | |||
| 88 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); | 88 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); |
| 89 | 89 | ||
| 90 | memset(&jpeg_ctx, 0, sizeof(jpeg_ctx)); | 90 | memset(&jpeg_ctx, 0, sizeof(jpeg_ctx)); |
| 91 | jpeg_ctx.buffer = vb2_plane_vaddr(dst_buf, 0); | 91 | jpeg_ctx.buffer = vb2_plane_vaddr(&dst_buf->vb2_buf, 0); |
| 92 | jpeg_ctx.width = ctx->dst_fmt.width; | 92 | jpeg_ctx.width = ctx->dst_fmt.width; |
| 93 | jpeg_ctx.height = ctx->dst_fmt.height; | 93 | jpeg_ctx.height = ctx->dst_fmt.height; |
| 94 | jpeg_ctx.quality = ctx->jpeg_quality; | 94 | jpeg_ctx.quality = ctx->jpeg_quality; |
| @@ -99,7 +99,7 @@ void rk3288_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) | |||
| 99 | VEPU_REG_ENC_CTRL); | 99 | VEPU_REG_ENC_CTRL); |
| 100 | 100 | ||
| 101 | rk3288_vpu_set_src_img_ctrl(vpu, ctx); | 101 | rk3288_vpu_set_src_img_ctrl(vpu, ctx); |
| 102 | rk3288_vpu_jpeg_enc_set_buffers(vpu, ctx, src_buf); | 102 | rk3288_vpu_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); |
| 103 | rk3288_vpu_jpeg_enc_set_qtable(vpu, | 103 | rk3288_vpu_jpeg_enc_set_qtable(vpu, |
| 104 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 0), | 104 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 0), |
| 105 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 1)); | 105 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 1)); |
diff --git a/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw_jpeg_enc.c b/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw_jpeg_enc.c index dbc86d95fe3b..3d438797692e 100644 --- a/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw_jpeg_enc.c +++ b/drivers/staging/media/rockchip/vpu/rk3399_vpu_hw_jpeg_enc.c | |||
| @@ -111,7 +111,7 @@ rk3399_vpu_jpeg_enc_set_qtable(struct rockchip_vpu_dev *vpu, | |||
| 111 | void rk3399_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) | 111 | void rk3399_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) |
| 112 | { | 112 | { |
| 113 | struct rockchip_vpu_dev *vpu = ctx->dev; | 113 | struct rockchip_vpu_dev *vpu = ctx->dev; |
| 114 | struct vb2_buffer *src_buf, *dst_buf; | 114 | struct vb2_v4l2_buffer *src_buf, *dst_buf; |
| 115 | struct rockchip_vpu_jpeg_ctx jpeg_ctx; | 115 | struct rockchip_vpu_jpeg_ctx jpeg_ctx; |
| 116 | u32 reg; | 116 | u32 reg; |
| 117 | 117 | ||
| @@ -119,7 +119,7 @@ void rk3399_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) | |||
| 119 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); | 119 | dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); |
| 120 | 120 | ||
| 121 | memset(&jpeg_ctx, 0, sizeof(jpeg_ctx)); | 121 | memset(&jpeg_ctx, 0, sizeof(jpeg_ctx)); |
| 122 | jpeg_ctx.buffer = vb2_plane_vaddr(dst_buf, 0); | 122 | jpeg_ctx.buffer = vb2_plane_vaddr(&dst_buf->vb2_buf, 0); |
| 123 | jpeg_ctx.width = ctx->dst_fmt.width; | 123 | jpeg_ctx.width = ctx->dst_fmt.width; |
| 124 | jpeg_ctx.height = ctx->dst_fmt.height; | 124 | jpeg_ctx.height = ctx->dst_fmt.height; |
| 125 | jpeg_ctx.quality = ctx->jpeg_quality; | 125 | jpeg_ctx.quality = ctx->jpeg_quality; |
| @@ -130,7 +130,7 @@ void rk3399_vpu_jpeg_enc_run(struct rockchip_vpu_ctx *ctx) | |||
| 130 | VEPU_REG_ENCODE_START); | 130 | VEPU_REG_ENCODE_START); |
| 131 | 131 | ||
| 132 | rk3399_vpu_set_src_img_ctrl(vpu, ctx); | 132 | rk3399_vpu_set_src_img_ctrl(vpu, ctx); |
| 133 | rk3399_vpu_jpeg_enc_set_buffers(vpu, ctx, src_buf); | 133 | rk3399_vpu_jpeg_enc_set_buffers(vpu, ctx, &src_buf->vb2_buf); |
| 134 | rk3399_vpu_jpeg_enc_set_qtable(vpu, | 134 | rk3399_vpu_jpeg_enc_set_qtable(vpu, |
| 135 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 0), | 135 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 0), |
| 136 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 1)); | 136 | rockchip_vpu_jpeg_get_qtable(&jpeg_ctx, 1)); |
diff --git a/drivers/media/i2c/soc_camera/Kconfig b/drivers/staging/media/soc_camera/Kconfig index 7c2aabc8a3f6..bacd30f0348d 100644 --- a/drivers/media/i2c/soc_camera/Kconfig +++ b/drivers/staging/media/soc_camera/Kconfig | |||
| @@ -1,11 +1,13 @@ | |||
| 1 | comment "soc_camera sensor drivers" | 1 | config SOC_CAMERA |
| 2 | 2 | tristate "SoC camera support" | |
| 3 | config SOC_CAMERA_MT9M001 | 3 | depends on VIDEO_V4L2 && HAS_DMA && I2C && BROKEN |
| 4 | tristate "mt9m001 support" | 4 | select VIDEOBUF2_CORE |
| 5 | depends on SOC_CAMERA && I2C | ||
| 6 | help | 5 | help |
| 7 | This driver supports MT9M001 cameras from Micron, monochrome | 6 | SoC Camera is a common API to several cameras, not connecting |
| 8 | and colour models. | 7 | over a bus like PCI or USB. For example some i2c camera connected |
| 8 | directly to the data bus of an SoC. | ||
| 9 | |||
| 10 | comment "soc_camera sensor drivers" | ||
| 9 | 11 | ||
| 10 | config SOC_CAMERA_MT9M111 | 12 | config SOC_CAMERA_MT9M111 |
| 11 | tristate "legacy soc_camera mt9m111, mt9m112 and mt9m131 support" | 13 | tristate "legacy soc_camera mt9m111, mt9m112 and mt9m131 support" |
| @@ -17,12 +19,6 @@ config SOC_CAMERA_MT9M111 | |||
| 17 | This is the legacy configuration which shouldn't be used anymore, | 19 | This is the legacy configuration which shouldn't be used anymore, |
| 18 | while VIDEO_MT9M111 should be used instead. | 20 | while VIDEO_MT9M111 should be used instead. |
| 19 | 21 | ||
| 20 | config SOC_CAMERA_MT9T112 | ||
| 21 | tristate "mt9t112 support" | ||
| 22 | depends on SOC_CAMERA && I2C | ||
| 23 | help | ||
| 24 | This driver supports MT9T112 cameras from Aptina. | ||
| 25 | |||
| 26 | config SOC_CAMERA_MT9V022 | 22 | config SOC_CAMERA_MT9V022 |
| 27 | tristate "mt9v022 and mt9v024 support" | 23 | tristate "mt9v022 and mt9v024 support" |
| 28 | depends on SOC_CAMERA && I2C | 24 | depends on SOC_CAMERA && I2C |
| @@ -35,32 +31,20 @@ config SOC_CAMERA_OV5642 | |||
| 35 | help | 31 | help |
| 36 | This is a V4L2 camera driver for the OmniVision OV5642 sensor | 32 | This is a V4L2 camera driver for the OmniVision OV5642 sensor |
| 37 | 33 | ||
| 38 | config SOC_CAMERA_OV772X | ||
| 39 | tristate "ov772x camera support" | ||
| 40 | depends on SOC_CAMERA && I2C | ||
| 41 | help | ||
| 42 | This is a ov772x camera driver | ||
| 43 | |||
| 44 | config SOC_CAMERA_OV9640 | ||
| 45 | tristate "ov9640 camera support" | ||
| 46 | depends on SOC_CAMERA && I2C | ||
| 47 | help | ||
| 48 | This is a ov9640 camera driver | ||
| 49 | |||
| 50 | config SOC_CAMERA_OV9740 | 34 | config SOC_CAMERA_OV9740 |
| 51 | tristate "ov9740 camera support" | 35 | tristate "ov9740 camera support" |
| 52 | depends on SOC_CAMERA && I2C | 36 | depends on SOC_CAMERA && I2C |
| 53 | help | 37 | help |
| 54 | This is a ov9740 camera driver | 38 | This is a ov9740 camera driver |
| 55 | 39 | ||
| 56 | config SOC_CAMERA_RJ54N1 | 40 | config SOC_CAMERA_IMX074 |
| 57 | tristate "rj54n1cb0c support" | 41 | tristate "imx074 support (DEPRECATED)" |
| 58 | depends on SOC_CAMERA && I2C | 42 | depends on SOC_CAMERA && I2C |
| 59 | help | 43 | help |
| 60 | This is a rj54n1cb0c video driver | 44 | This driver supports IMX074 cameras from Sony |
| 61 | 45 | ||
| 62 | config SOC_CAMERA_TW9910 | 46 | config SOC_CAMERA_MT9T031 |
| 63 | tristate "tw9910 support" | 47 | tristate "mt9t031 support (DEPRECATED)" |
| 64 | depends on SOC_CAMERA && I2C | 48 | depends on SOC_CAMERA && I2C |
| 65 | help | 49 | help |
| 66 | This is a tw9910 video driver | 50 | This driver supports MT9T031 cameras from Micron. |
diff --git a/drivers/staging/media/soc_camera/Makefile b/drivers/staging/media/soc_camera/Makefile new file mode 100644 index 000000000000..3a351bd629f5 --- /dev/null +++ b/drivers/staging/media/soc_camera/Makefile | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | ||
| 2 | obj-$(CONFIG_SOC_CAMERA) += soc_camera.o soc_mediabus.o | ||
| 3 | obj-$(CONFIG_SOC_CAMERA_MT9V022) += soc_mt9v022.o | ||
| 4 | obj-$(CONFIG_SOC_CAMERA_OV5642) += soc_ov5642.o | ||
| 5 | obj-$(CONFIG_SOC_CAMERA_OV9740) += soc_ov9740.o | ||
| 6 | obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o | ||
| 7 | obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o | ||
diff --git a/drivers/staging/media/imx074/imx074.c b/drivers/staging/media/soc_camera/imx074.c index 1676c166dc83..1676c166dc83 100644 --- a/drivers/staging/media/imx074/imx074.c +++ b/drivers/staging/media/soc_camera/imx074.c | |||
diff --git a/drivers/staging/media/mt9t031/mt9t031.c b/drivers/staging/media/soc_camera/mt9t031.c index 4ff179302b4f..4ff179302b4f 100644 --- a/drivers/staging/media/mt9t031/mt9t031.c +++ b/drivers/staging/media/soc_camera/mt9t031.c | |||
diff --git a/drivers/media/platform/soc_camera/soc_camera.c b/drivers/staging/media/soc_camera/soc_camera.c index 21034339cdcb..1ab86a7499b9 100644 --- a/drivers/media/platform/soc_camera/soc_camera.c +++ b/drivers/staging/media/soc_camera/soc_camera.c | |||
| @@ -4,11 +4,11 @@ | |||
| 4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | 4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> |
| 5 | * | 5 | * |
| 6 | * This driver provides an interface between platform-specific camera | 6 | * This driver provides an interface between platform-specific camera |
| 7 | * busses and camera devices. It should be used if the camera is | 7 | * buses and camera devices. It should be used if the camera is |
| 8 | * connected not over a "proper" bus like PCI or USB, but over a | 8 | * connected not over a "proper" bus like PCI or USB, but over a |
| 9 | * special bus, like, for example, the Quick Capture interface on PXA270 | 9 | * special bus, like, for example, the Quick Capture interface on PXA270 |
| 10 | * SoCs. Later it should also be used for i.MX31 SoCs from Freescale. | 10 | * SoCs. Later it should also be used for i.MX31 SoCs from Freescale. |
| 11 | * It can handle multiple cameras and / or multiple busses, which can | 11 | * It can handle multiple cameras and / or multiple buses, which can |
| 12 | * be used, e.g., in stereo-vision applications. | 12 | * be used, e.g., in stereo-vision applications. |
| 13 | * | 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify | 14 | * This program is free software; you can redistribute it and/or modify |
diff --git a/drivers/media/platform/soc_camera/soc_mediabus.c b/drivers/staging/media/soc_camera/soc_mediabus.c index be74008ec0ca..be74008ec0ca 100644 --- a/drivers/media/platform/soc_camera/soc_mediabus.c +++ b/drivers/staging/media/soc_camera/soc_mediabus.c | |||
diff --git a/drivers/media/i2c/soc_camera/soc_mt9v022.c b/drivers/staging/media/soc_camera/soc_mt9v022.c index 6d922b17ea94..6d922b17ea94 100644 --- a/drivers/media/i2c/soc_camera/soc_mt9v022.c +++ b/drivers/staging/media/soc_camera/soc_mt9v022.c | |||
diff --git a/drivers/media/i2c/soc_camera/soc_ov5642.c b/drivers/staging/media/soc_camera/soc_ov5642.c index 0931898c79dd..0931898c79dd 100644 --- a/drivers/media/i2c/soc_camera/soc_ov5642.c +++ b/drivers/staging/media/soc_camera/soc_ov5642.c | |||
diff --git a/drivers/media/i2c/soc_camera/soc_ov9740.c b/drivers/staging/media/soc_camera/soc_ov9740.c index a07d3145d1b4..a07d3145d1b4 100644 --- a/drivers/media/i2c/soc_camera/soc_ov9740.c +++ b/drivers/staging/media/soc_camera/soc_ov9740.c | |||
diff --git a/drivers/staging/media/sunxi/cedrus/TODO b/drivers/staging/media/sunxi/cedrus/TODO index a951b3fd1ea1..ec277ece47af 100644 --- a/drivers/staging/media/sunxi/cedrus/TODO +++ b/drivers/staging/media/sunxi/cedrus/TODO | |||
| @@ -5,8 +5,3 @@ Before this stateless decoder driver can leave the staging area: | |||
| 5 | * Userspace support for the Request API needs to be reviewed; | 5 | * Userspace support for the Request API needs to be reviewed; |
| 6 | * Another stateless decoder driver should be submitted; | 6 | * Another stateless decoder driver should be submitted; |
| 7 | * At least one stateless encoder driver should be submitted. | 7 | * At least one stateless encoder driver should be submitted. |
| 8 | * When queueing a request containing references to I frames, the | ||
| 9 | refcount of the memory for those I frames needs to be incremented | ||
| 10 | and decremented when the request is completed. This will likely | ||
| 11 | require some help from vb2. The driver should fail the request | ||
| 12 | if the memory/buffer is gone. | ||
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h index 3acfdcf83691..4aedd24a9848 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h | |||
| @@ -140,11 +140,14 @@ static inline dma_addr_t cedrus_buf_addr(struct vb2_buffer *buf, | |||
| 140 | } | 140 | } |
| 141 | 141 | ||
| 142 | static inline dma_addr_t cedrus_dst_buf_addr(struct cedrus_ctx *ctx, | 142 | static inline dma_addr_t cedrus_dst_buf_addr(struct cedrus_ctx *ctx, |
| 143 | unsigned int index, | 143 | int index, unsigned int plane) |
| 144 | unsigned int plane) | ||
| 145 | { | 144 | { |
| 146 | struct vb2_buffer *buf = ctx->dst_bufs[index]; | 145 | struct vb2_buffer *buf; |
| 147 | 146 | ||
| 147 | if (index < 0) | ||
| 148 | return 0; | ||
| 149 | |||
| 150 | buf = ctx->dst_bufs[index]; | ||
| 148 | return buf ? cedrus_buf_addr(buf, &ctx->dst_fmt, plane) : 0; | 151 | return buf ? cedrus_buf_addr(buf, &ctx->dst_fmt, plane) : 0; |
| 149 | } | 152 | } |
| 150 | 153 | ||
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c index 591d191d4286..4d6d602cdde6 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c | |||
| @@ -50,6 +50,8 @@ void cedrus_device_run(void *priv) | |||
| 50 | break; | 50 | break; |
| 51 | } | 51 | } |
| 52 | 52 | ||
| 53 | v4l2_m2m_buf_copy_metadata(run.src, run.dst, true); | ||
| 54 | |||
| 53 | dev->dec_ops[ctx->current_codec]->setup(ctx, &run); | 55 | dev->dec_ops[ctx->current_codec]->setup(ctx, &run); |
| 54 | 56 | ||
| 55 | /* Complete request(s) controls if needed. */ | 57 | /* Complete request(s) controls if needed. */ |
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.h b/drivers/staging/media/sunxi/cedrus/cedrus_dec.h index 4f423d3a1cad..d1ae7903677b 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.h | |||
| @@ -16,12 +16,6 @@ | |||
| 16 | #ifndef _CEDRUS_DEC_H_ | 16 | #ifndef _CEDRUS_DEC_H_ |
| 17 | #define _CEDRUS_DEC_H_ | 17 | #define _CEDRUS_DEC_H_ |
| 18 | 18 | ||
| 19 | extern const struct v4l2_ioctl_ops cedrus_ioctl_ops; | ||
| 20 | |||
| 21 | void cedrus_device_work(struct work_struct *work); | ||
| 22 | void cedrus_device_run(void *priv); | 19 | void cedrus_device_run(void *priv); |
| 23 | 20 | ||
| 24 | int cedrus_queue_init(void *priv, struct vb2_queue *src_vq, | ||
| 25 | struct vb2_queue *dst_vq); | ||
| 26 | |||
| 27 | #endif | 21 | #endif |
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c index 300339fee1bc..0acf219a8c91 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c | |||
| @@ -157,14 +157,14 @@ int cedrus_hw_probe(struct cedrus_dev *dev) | |||
| 157 | 157 | ||
| 158 | irq_dec = platform_get_irq(dev->pdev, 0); | 158 | irq_dec = platform_get_irq(dev->pdev, 0); |
| 159 | if (irq_dec <= 0) { | 159 | if (irq_dec <= 0) { |
| 160 | v4l2_err(&dev->v4l2_dev, "Failed to get IRQ\n"); | 160 | dev_err(dev->dev, "Failed to get IRQ\n"); |
| 161 | 161 | ||
| 162 | return irq_dec; | 162 | return irq_dec; |
| 163 | } | 163 | } |
| 164 | ret = devm_request_irq(dev->dev, irq_dec, cedrus_irq, | 164 | ret = devm_request_irq(dev->dev, irq_dec, cedrus_irq, |
| 165 | 0, dev_name(dev->dev), dev); | 165 | 0, dev_name(dev->dev), dev); |
| 166 | if (ret) { | 166 | if (ret) { |
| 167 | v4l2_err(&dev->v4l2_dev, "Failed to request IRQ\n"); | 167 | dev_err(dev->dev, "Failed to request IRQ\n"); |
| 168 | 168 | ||
| 169 | return ret; | 169 | return ret; |
| 170 | } | 170 | } |
| @@ -182,21 +182,21 @@ int cedrus_hw_probe(struct cedrus_dev *dev) | |||
| 182 | 182 | ||
| 183 | ret = of_reserved_mem_device_init(dev->dev); | 183 | ret = of_reserved_mem_device_init(dev->dev); |
| 184 | if (ret && ret != -ENODEV) { | 184 | if (ret && ret != -ENODEV) { |
| 185 | v4l2_err(&dev->v4l2_dev, "Failed to reserve memory\n"); | 185 | dev_err(dev->dev, "Failed to reserve memory\n"); |
| 186 | 186 | ||
| 187 | return ret; | 187 | return ret; |
| 188 | } | 188 | } |
| 189 | 189 | ||
| 190 | ret = sunxi_sram_claim(dev->dev); | 190 | ret = sunxi_sram_claim(dev->dev); |
| 191 | if (ret) { | 191 | if (ret) { |
| 192 | v4l2_err(&dev->v4l2_dev, "Failed to claim SRAM\n"); | 192 | dev_err(dev->dev, "Failed to claim SRAM\n"); |
| 193 | 193 | ||
| 194 | goto err_mem; | 194 | goto err_mem; |
| 195 | } | 195 | } |
| 196 | 196 | ||
| 197 | dev->ahb_clk = devm_clk_get(dev->dev, "ahb"); | 197 | dev->ahb_clk = devm_clk_get(dev->dev, "ahb"); |
| 198 | if (IS_ERR(dev->ahb_clk)) { | 198 | if (IS_ERR(dev->ahb_clk)) { |
| 199 | v4l2_err(&dev->v4l2_dev, "Failed to get AHB clock\n"); | 199 | dev_err(dev->dev, "Failed to get AHB clock\n"); |
| 200 | 200 | ||
| 201 | ret = PTR_ERR(dev->ahb_clk); | 201 | ret = PTR_ERR(dev->ahb_clk); |
| 202 | goto err_sram; | 202 | goto err_sram; |
| @@ -204,7 +204,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) | |||
| 204 | 204 | ||
| 205 | dev->mod_clk = devm_clk_get(dev->dev, "mod"); | 205 | dev->mod_clk = devm_clk_get(dev->dev, "mod"); |
| 206 | if (IS_ERR(dev->mod_clk)) { | 206 | if (IS_ERR(dev->mod_clk)) { |
| 207 | v4l2_err(&dev->v4l2_dev, "Failed to get MOD clock\n"); | 207 | dev_err(dev->dev, "Failed to get MOD clock\n"); |
| 208 | 208 | ||
| 209 | ret = PTR_ERR(dev->mod_clk); | 209 | ret = PTR_ERR(dev->mod_clk); |
| 210 | goto err_sram; | 210 | goto err_sram; |
| @@ -212,7 +212,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) | |||
| 212 | 212 | ||
| 213 | dev->ram_clk = devm_clk_get(dev->dev, "ram"); | 213 | dev->ram_clk = devm_clk_get(dev->dev, "ram"); |
| 214 | if (IS_ERR(dev->ram_clk)) { | 214 | if (IS_ERR(dev->ram_clk)) { |
| 215 | v4l2_err(&dev->v4l2_dev, "Failed to get RAM clock\n"); | 215 | dev_err(dev->dev, "Failed to get RAM clock\n"); |
| 216 | 216 | ||
| 217 | ret = PTR_ERR(dev->ram_clk); | 217 | ret = PTR_ERR(dev->ram_clk); |
| 218 | goto err_sram; | 218 | goto err_sram; |
| @@ -220,7 +220,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) | |||
| 220 | 220 | ||
| 221 | dev->rstc = devm_reset_control_get(dev->dev, NULL); | 221 | dev->rstc = devm_reset_control_get(dev->dev, NULL); |
| 222 | if (IS_ERR(dev->rstc)) { | 222 | if (IS_ERR(dev->rstc)) { |
| 223 | v4l2_err(&dev->v4l2_dev, "Failed to get reset control\n"); | 223 | dev_err(dev->dev, "Failed to get reset control\n"); |
| 224 | 224 | ||
| 225 | ret = PTR_ERR(dev->rstc); | 225 | ret = PTR_ERR(dev->rstc); |
| 226 | goto err_sram; | 226 | goto err_sram; |
| @@ -229,7 +229,7 @@ int cedrus_hw_probe(struct cedrus_dev *dev) | |||
| 229 | res = platform_get_resource(dev->pdev, IORESOURCE_MEM, 0); | 229 | res = platform_get_resource(dev->pdev, IORESOURCE_MEM, 0); |
| 230 | dev->base = devm_ioremap_resource(dev->dev, res); | 230 | dev->base = devm_ioremap_resource(dev->dev, res); |
| 231 | if (IS_ERR(dev->base)) { | 231 | if (IS_ERR(dev->base)) { |
| 232 | v4l2_err(&dev->v4l2_dev, "Failed to map registers\n"); | 232 | dev_err(dev->dev, "Failed to map registers\n"); |
| 233 | 233 | ||
| 234 | ret = PTR_ERR(dev->base); | 234 | ret = PTR_ERR(dev->base); |
| 235 | goto err_sram; | 235 | goto err_sram; |
| @@ -237,35 +237,35 @@ int cedrus_hw_probe(struct cedrus_dev *dev) | |||
| 237 | 237 | ||
| 238 | ret = clk_set_rate(dev->mod_clk, CEDRUS_CLOCK_RATE_DEFAULT); | 238 | ret = clk_set_rate(dev->mod_clk, CEDRUS_CLOCK_RATE_DEFAULT); |
| 239 | if (ret) { | 239 | if (ret) { |
| 240 | v4l2_err(&dev->v4l2_dev, "Failed to set clock rate\n"); | 240 | dev_err(dev->dev, "Failed to set clock rate\n"); |
| 241 | 241 | ||
| 242 | goto err_sram; | 242 | goto err_sram; |
| 243 | } | 243 | } |
| 244 | 244 | ||
| 245 | ret = clk_prepare_enable(dev->ahb_clk); | 245 | ret = clk_prepare_enable(dev->ahb_clk); |
| 246 | if (ret) { | 246 | if (ret) { |
| 247 | v4l2_err(&dev->v4l2_dev, "Failed to enable AHB clock\n"); | 247 | dev_err(dev->dev, "Failed to enable AHB clock\n"); |
| 248 | 248 | ||
| 249 | goto err_sram; | 249 | goto err_sram; |
| 250 | } | 250 | } |
| 251 | 251 | ||
| 252 | ret = clk_prepare_enable(dev->mod_clk); | 252 | ret = clk_prepare_enable(dev->mod_clk); |
| 253 | if (ret) { | 253 | if (ret) { |
| 254 | v4l2_err(&dev->v4l2_dev, "Failed to enable MOD clock\n"); | 254 | dev_err(dev->dev, "Failed to enable MOD clock\n"); |
| 255 | 255 | ||
| 256 | goto err_ahb_clk; | 256 | goto err_ahb_clk; |
| 257 | } | 257 | } |
| 258 | 258 | ||
| 259 | ret = clk_prepare_enable(dev->ram_clk); | 259 | ret = clk_prepare_enable(dev->ram_clk); |
| 260 | if (ret) { | 260 | if (ret) { |
| 261 | v4l2_err(&dev->v4l2_dev, "Failed to enable RAM clock\n"); | 261 | dev_err(dev->dev, "Failed to enable RAM clock\n"); |
| 262 | 262 | ||
| 263 | goto err_mod_clk; | 263 | goto err_mod_clk; |
| 264 | } | 264 | } |
| 265 | 265 | ||
| 266 | ret = reset_control_reset(dev->rstc); | 266 | ret = reset_control_reset(dev->rstc); |
| 267 | if (ret) { | 267 | if (ret) { |
| 268 | v4l2_err(&dev->v4l2_dev, "Failed to apply reset\n"); | 268 | dev_err(dev->dev, "Failed to apply reset\n"); |
| 269 | 269 | ||
| 270 | goto err_ram_clk; | 270 | goto err_ram_clk; |
| 271 | } | 271 | } |
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c index 9abd39cae38c..13c34927bad5 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c | |||
| @@ -82,7 +82,10 @@ static void cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) | |||
| 82 | dma_addr_t fwd_luma_addr, fwd_chroma_addr; | 82 | dma_addr_t fwd_luma_addr, fwd_chroma_addr; |
| 83 | dma_addr_t bwd_luma_addr, bwd_chroma_addr; | 83 | dma_addr_t bwd_luma_addr, bwd_chroma_addr; |
| 84 | struct cedrus_dev *dev = ctx->dev; | 84 | struct cedrus_dev *dev = ctx->dev; |
| 85 | struct vb2_queue *vq; | ||
| 85 | const u8 *matrix; | 86 | const u8 *matrix; |
| 87 | int forward_idx; | ||
| 88 | int backward_idx; | ||
| 86 | unsigned int i; | 89 | unsigned int i; |
| 87 | u32 reg; | 90 | u32 reg; |
| 88 | 91 | ||
| @@ -157,22 +160,18 @@ static void cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run) | |||
| 157 | 160 | ||
| 158 | /* Forward and backward prediction reference buffers. */ | 161 | /* Forward and backward prediction reference buffers. */ |
| 159 | 162 | ||
| 160 | fwd_luma_addr = cedrus_dst_buf_addr(ctx, | 163 | vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); |
| 161 | slice_params->forward_ref_index, | 164 | |
| 162 | 0); | 165 | forward_idx = vb2_find_timestamp(vq, slice_params->forward_ref_ts, 0); |
| 163 | fwd_chroma_addr = cedrus_dst_buf_addr(ctx, | 166 | fwd_luma_addr = cedrus_dst_buf_addr(ctx, forward_idx, 0); |
| 164 | slice_params->forward_ref_index, | 167 | fwd_chroma_addr = cedrus_dst_buf_addr(ctx, forward_idx, 1); |
| 165 | 1); | ||
| 166 | 168 | ||
| 167 | cedrus_write(dev, VE_DEC_MPEG_FWD_REF_LUMA_ADDR, fwd_luma_addr); | 169 | cedrus_write(dev, VE_DEC_MPEG_FWD_REF_LUMA_ADDR, fwd_luma_addr); |
| 168 | cedrus_write(dev, VE_DEC_MPEG_FWD_REF_CHROMA_ADDR, fwd_chroma_addr); | 170 | cedrus_write(dev, VE_DEC_MPEG_FWD_REF_CHROMA_ADDR, fwd_chroma_addr); |
| 169 | 171 | ||
| 170 | bwd_luma_addr = cedrus_dst_buf_addr(ctx, | 172 | backward_idx = vb2_find_timestamp(vq, slice_params->backward_ref_ts, 0); |
| 171 | slice_params->backward_ref_index, | 173 | bwd_luma_addr = cedrus_dst_buf_addr(ctx, backward_idx, 0); |
| 172 | 0); | 174 | bwd_chroma_addr = cedrus_dst_buf_addr(ctx, backward_idx, 1); |
| 173 | bwd_chroma_addr = cedrus_dst_buf_addr(ctx, | ||
| 174 | slice_params->backward_ref_index, | ||
| 175 | 1); | ||
| 176 | 175 | ||
| 177 | cedrus_write(dev, VE_DEC_MPEG_BWD_REF_LUMA_ADDR, bwd_luma_addr); | 176 | cedrus_write(dev, VE_DEC_MPEG_BWD_REF_LUMA_ADDR, bwd_luma_addr); |
| 178 | cedrus_write(dev, VE_DEC_MPEG_BWD_REF_CHROMA_ADDR, bwd_chroma_addr); | 177 | cedrus_write(dev, VE_DEC_MPEG_BWD_REF_CHROMA_ADDR, bwd_chroma_addr); |
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c index 8721b4a7d496..b47854b3bce4 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c | |||
| @@ -282,8 +282,13 @@ static int cedrus_s_fmt_vid_cap(struct file *file, void *priv, | |||
| 282 | { | 282 | { |
| 283 | struct cedrus_ctx *ctx = cedrus_file2ctx(file); | 283 | struct cedrus_ctx *ctx = cedrus_file2ctx(file); |
| 284 | struct cedrus_dev *dev = ctx->dev; | 284 | struct cedrus_dev *dev = ctx->dev; |
| 285 | struct vb2_queue *vq; | ||
| 285 | int ret; | 286 | int ret; |
| 286 | 287 | ||
| 288 | vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); | ||
| 289 | if (vb2_is_busy(vq)) | ||
| 290 | return -EBUSY; | ||
| 291 | |||
| 287 | ret = cedrus_try_fmt_vid_cap(file, priv, f); | 292 | ret = cedrus_try_fmt_vid_cap(file, priv, f); |
| 288 | if (ret) | 293 | if (ret) |
| 289 | return ret; | 294 | return ret; |
| @@ -299,8 +304,13 @@ static int cedrus_s_fmt_vid_out(struct file *file, void *priv, | |||
| 299 | struct v4l2_format *f) | 304 | struct v4l2_format *f) |
| 300 | { | 305 | { |
| 301 | struct cedrus_ctx *ctx = cedrus_file2ctx(file); | 306 | struct cedrus_ctx *ctx = cedrus_file2ctx(file); |
| 307 | struct vb2_queue *vq; | ||
| 302 | int ret; | 308 | int ret; |
| 303 | 309 | ||
| 310 | vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); | ||
| 311 | if (vb2_is_busy(vq)) | ||
| 312 | return -EBUSY; | ||
| 313 | |||
| 304 | ret = cedrus_try_fmt_vid_out(file, priv, f); | 314 | ret = cedrus_try_fmt_vid_out(file, priv, f); |
| 305 | if (ret) | 315 | if (ret) |
| 306 | return ret; | 316 | return ret; |
| @@ -416,6 +426,14 @@ static void cedrus_buf_cleanup(struct vb2_buffer *vb) | |||
| 416 | ctx->dst_bufs[vb->index] = NULL; | 426 | ctx->dst_bufs[vb->index] = NULL; |
| 417 | } | 427 | } |
| 418 | 428 | ||
| 429 | static int cedrus_buf_out_validate(struct vb2_buffer *vb) | ||
| 430 | { | ||
| 431 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | ||
| 432 | |||
| 433 | vbuf->field = V4L2_FIELD_NONE; | ||
| 434 | return 0; | ||
| 435 | } | ||
| 436 | |||
| 419 | static int cedrus_buf_prepare(struct vb2_buffer *vb) | 437 | static int cedrus_buf_prepare(struct vb2_buffer *vb) |
| 420 | { | 438 | { |
| 421 | struct vb2_queue *vq = vb->vb2_queue; | 439 | struct vb2_queue *vq = vb->vb2_queue; |
| @@ -493,6 +511,7 @@ static struct vb2_ops cedrus_qops = { | |||
| 493 | .buf_init = cedrus_buf_init, | 511 | .buf_init = cedrus_buf_init, |
| 494 | .buf_cleanup = cedrus_buf_cleanup, | 512 | .buf_cleanup = cedrus_buf_cleanup, |
| 495 | .buf_queue = cedrus_buf_queue, | 513 | .buf_queue = cedrus_buf_queue, |
| 514 | .buf_out_validate = cedrus_buf_out_validate, | ||
| 496 | .buf_request_complete = cedrus_buf_request_complete, | 515 | .buf_request_complete = cedrus_buf_request_complete, |
| 497 | .start_streaming = cedrus_start_streaming, | 516 | .start_streaming = cedrus_start_streaming, |
| 498 | .stop_streaming = cedrus_stop_streaming, | 517 | .stop_streaming = cedrus_stop_streaming, |
diff --git a/drivers/staging/media/zoran/zoran.h b/drivers/staging/media/zoran/zoran.h index 9bb3c21aa275..e84fb604a689 100644 --- a/drivers/staging/media/zoran/zoran.h +++ b/drivers/staging/media/zoran/zoran.h | |||
| @@ -35,7 +35,7 @@ struct zoran_sync { | |||
| 35 | unsigned long frame; /* number of buffer that has been free'd */ | 35 | unsigned long frame; /* number of buffer that has been free'd */ |
| 36 | unsigned long length; /* number of code bytes in buffer (capture only) */ | 36 | unsigned long length; /* number of code bytes in buffer (capture only) */ |
| 37 | unsigned long seq; /* frame sequence number */ | 37 | unsigned long seq; /* frame sequence number */ |
| 38 | struct timeval timestamp; /* timestamp */ | 38 | u64 ts; /* timestamp */ |
| 39 | }; | 39 | }; |
| 40 | 40 | ||
| 41 | 41 | ||
diff --git a/drivers/staging/media/zoran/zoran_card.c b/drivers/staging/media/zoran/zoran_card.c index 94dadbba7cd5..ea10523194e8 100644 --- a/drivers/staging/media/zoran/zoran_card.c +++ b/drivers/staging/media/zoran/zoran_card.c | |||
| @@ -1470,7 +1470,7 @@ static int __init zoran_init(void) | |||
| 1470 | v4l_nbufs = 2; | 1470 | v4l_nbufs = 2; |
| 1471 | if (v4l_nbufs > VIDEO_MAX_FRAME) | 1471 | if (v4l_nbufs > VIDEO_MAX_FRAME) |
| 1472 | v4l_nbufs = VIDEO_MAX_FRAME; | 1472 | v4l_nbufs = VIDEO_MAX_FRAME; |
| 1473 | /* The user specfies the in KB, we want them in byte | 1473 | /* The user specifies the in KB, we want them in byte |
| 1474 | * (and page aligned) */ | 1474 | * (and page aligned) */ |
| 1475 | v4l_bufsize = PAGE_ALIGN(v4l_bufsize * 1024); | 1475 | v4l_bufsize = PAGE_ALIGN(v4l_bufsize * 1024); |
| 1476 | if (v4l_bufsize < 32768) | 1476 | if (v4l_bufsize < 32768) |
diff --git a/drivers/staging/media/zoran/zoran_device.c b/drivers/staging/media/zoran/zoran_device.c index 40adceebca7e..22b27632762d 100644 --- a/drivers/staging/media/zoran/zoran_device.c +++ b/drivers/staging/media/zoran/zoran_device.c | |||
| @@ -612,7 +612,7 @@ zr36057_set_memgrab (struct zoran *zr, | |||
| 612 | zr->v4l_memgrab_active = 0; | 612 | zr->v4l_memgrab_active = 0; |
| 613 | zr->v4l_grab_frame = NO_GRAB_ACTIVE; | 613 | zr->v4l_grab_frame = NO_GRAB_ACTIVE; |
| 614 | 614 | ||
| 615 | /* reenable grabbing to screen if it was running */ | 615 | /* re-enable grabbing to screen if it was running */ |
| 616 | if (zr->v4l_overlay_active) { | 616 | if (zr->v4l_overlay_active) { |
| 617 | zr36057_overlay(zr, 1); | 617 | zr36057_overlay(zr, 1); |
| 618 | } else { | 618 | } else { |
| @@ -1151,7 +1151,7 @@ zoran_reap_stat_com (struct zoran *zr) | |||
| 1151 | } | 1151 | } |
| 1152 | frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME]; | 1152 | frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME]; |
| 1153 | buffer = &zr->jpg_buffers.buffer[frame]; | 1153 | buffer = &zr->jpg_buffers.buffer[frame]; |
| 1154 | v4l2_get_timestamp(&buffer->bs.timestamp); | 1154 | buffer->bs.ts = ktime_get_ns(); |
| 1155 | 1155 | ||
| 1156 | if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) { | 1156 | if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) { |
| 1157 | buffer->bs.length = (stat_com & 0x7fffff) >> 1; | 1157 | buffer->bs.length = (stat_com & 0x7fffff) >> 1; |
| @@ -1389,7 +1389,7 @@ zoran_irq (int irq, | |||
| 1389 | 1389 | ||
| 1390 | zr->v4l_buffers.buffer[zr->v4l_grab_frame].state = BUZ_STATE_DONE; | 1390 | zr->v4l_buffers.buffer[zr->v4l_grab_frame].state = BUZ_STATE_DONE; |
| 1391 | zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.seq = zr->v4l_grab_seq; | 1391 | zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.seq = zr->v4l_grab_seq; |
| 1392 | v4l2_get_timestamp(&zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.timestamp); | 1392 | zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.ts = ktime_get_ns(); |
| 1393 | zr->v4l_grab_frame = NO_GRAB_ACTIVE; | 1393 | zr->v4l_grab_frame = NO_GRAB_ACTIVE; |
| 1394 | zr->v4l_pend_tail++; | 1394 | zr->v4l_pend_tail++; |
| 1395 | } | 1395 | } |
diff --git a/drivers/staging/media/zoran/zoran_driver.c b/drivers/staging/media/zoran/zoran_driver.c index 27c76e2eeb41..04f88f9d6bb4 100644 --- a/drivers/staging/media/zoran/zoran_driver.c +++ b/drivers/staging/media/zoran/zoran_driver.c | |||
| @@ -1354,7 +1354,7 @@ static int zoran_v4l2_buffer_status(struct zoran_fh *fh, | |||
| 1354 | fh->buffers.buffer[num].state == BUZ_STATE_USER) { | 1354 | fh->buffers.buffer[num].state == BUZ_STATE_USER) { |
| 1355 | buf->sequence = fh->buffers.buffer[num].bs.seq; | 1355 | buf->sequence = fh->buffers.buffer[num].bs.seq; |
| 1356 | buf->flags |= V4L2_BUF_FLAG_DONE; | 1356 | buf->flags |= V4L2_BUF_FLAG_DONE; |
| 1357 | buf->timestamp = fh->buffers.buffer[num].bs.timestamp; | 1357 | buf->timestamp = ns_to_timeval(fh->buffers.buffer[num].bs.ts); |
| 1358 | } else { | 1358 | } else { |
| 1359 | buf->flags |= V4L2_BUF_FLAG_QUEUED; | 1359 | buf->flags |= V4L2_BUF_FLAG_QUEUED; |
| 1360 | } | 1360 | } |
| @@ -1388,7 +1388,7 @@ static int zoran_v4l2_buffer_status(struct zoran_fh *fh, | |||
| 1388 | if (fh->buffers.buffer[num].state == BUZ_STATE_DONE || | 1388 | if (fh->buffers.buffer[num].state == BUZ_STATE_DONE || |
| 1389 | fh->buffers.buffer[num].state == BUZ_STATE_USER) { | 1389 | fh->buffers.buffer[num].state == BUZ_STATE_USER) { |
| 1390 | buf->sequence = fh->buffers.buffer[num].bs.seq; | 1390 | buf->sequence = fh->buffers.buffer[num].bs.seq; |
| 1391 | buf->timestamp = fh->buffers.buffer[num].bs.timestamp; | 1391 | buf->timestamp = ns_to_timeval(fh->buffers.buffer[num].bs.ts); |
| 1392 | buf->bytesused = fh->buffers.buffer[num].bs.length; | 1392 | buf->bytesused = fh->buffers.buffer[num].bs.length; |
| 1393 | buf->flags |= V4L2_BUF_FLAG_DONE; | 1393 | buf->flags |= V4L2_BUF_FLAG_DONE; |
| 1394 | } else { | 1394 | } else { |
diff --git a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c index 611a6ee2943a..7c6cf41645eb 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c | |||
| @@ -1370,10 +1370,6 @@ static int vidioc_g_parm(struct file *file, void *priv, | |||
| 1370 | return 0; | 1370 | return 0; |
| 1371 | } | 1371 | } |
| 1372 | 1372 | ||
| 1373 | #define FRACT_CMP(a, OP, b) \ | ||
| 1374 | ((u64)(a).numerator * (b).denominator OP \ | ||
| 1375 | (u64)(b).numerator * (a).denominator) | ||
| 1376 | |||
| 1377 | static int vidioc_s_parm(struct file *file, void *priv, | 1373 | static int vidioc_s_parm(struct file *file, void *priv, |
| 1378 | struct v4l2_streamparm *parm) | 1374 | struct v4l2_streamparm *parm) |
| 1379 | { | 1375 | { |
| @@ -1387,8 +1383,8 @@ static int vidioc_s_parm(struct file *file, void *priv, | |||
| 1387 | 1383 | ||
| 1388 | /* tpf: {*, 0} resets timing; clip to [min, max]*/ | 1384 | /* tpf: {*, 0} resets timing; clip to [min, max]*/ |
| 1389 | tpf = tpf.denominator ? tpf : tpf_default; | 1385 | tpf = tpf.denominator ? tpf : tpf_default; |
| 1390 | tpf = FRACT_CMP(tpf, <, tpf_min) ? tpf_min : tpf; | 1386 | tpf = V4L2_FRACT_COMPARE(tpf, <, tpf_min) ? tpf_min : tpf; |
| 1391 | tpf = FRACT_CMP(tpf, >, tpf_max) ? tpf_max : tpf; | 1387 | tpf = V4L2_FRACT_COMPARE(tpf, >, tpf_max) ? tpf_max : tpf; |
| 1392 | 1388 | ||
| 1393 | dev->capture.timeperframe = tpf; | 1389 | dev->capture.timeperframe = tpf; |
| 1394 | parm->parm.capture.timeperframe = tpf; | 1390 | parm->parm.capture.timeperframe = tpf; |
diff --git a/include/linux/platform_data/media/si4713.h b/include/linux/platform_data/media/si4713.h index 932668ad54f7..13b3eb7a9059 100644 --- a/include/linux/platform_data/media/si4713.h +++ b/include/linux/platform_data/media/si4713.h | |||
| @@ -31,7 +31,7 @@ struct si4713_platform_data { | |||
| 31 | */ | 31 | */ |
| 32 | struct si4713_rnl { | 32 | struct si4713_rnl { |
| 33 | __u32 index; /* modulator index */ | 33 | __u32 index; /* modulator index */ |
| 34 | __u32 frequency; /* frequency to peform rnl measurement */ | 34 | __u32 frequency; /* frequency to perform rnl measurement */ |
| 35 | __s32 rnl; /* result of measurement in dBuV */ | 35 | __s32 rnl; /* result of measurement in dBuV */ |
| 36 | __u32 reserved[4]; /* drivers and apps must init this to 0 */ | 36 | __u32 reserved[4]; /* drivers and apps must init this to 0 */ |
| 37 | }; | 37 | }; |
| @@ -40,7 +40,7 @@ struct si4713_rnl { | |||
| 40 | * This is the ioctl number to query for rnl. Users must pass a | 40 | * This is the ioctl number to query for rnl. Users must pass a |
| 41 | * struct si4713_rnl pointer specifying desired frequency in 'frequency' field | 41 | * struct si4713_rnl pointer specifying desired frequency in 'frequency' field |
| 42 | * following driver capabilities (i.e V4L2_TUNER_CAP_LOW). | 42 | * following driver capabilities (i.e V4L2_TUNER_CAP_LOW). |
| 43 | * Driver must return measured value in the same struture, filling 'rnl' field. | 43 | * Driver must return measured value in the same structure, filling 'rnl' field. |
| 44 | */ | 44 | */ |
| 45 | #define SI4713_IOC_MEASURE_RNL _IOWR('V', BASE_VIDIOC_PRIVATE + 0, \ | 45 | #define SI4713_IOC_MEASURE_RNL _IOWR('V', BASE_VIDIOC_PRIVATE + 0, \ |
| 46 | struct si4713_rnl) | 46 | struct si4713_rnl) |
diff --git a/include/linux/platform_data/media/soc_camera_platform.h b/include/linux/platform_data/media/soc_camera_platform.h deleted file mode 100644 index 1e5065dab430..000000000000 --- a/include/linux/platform_data/media/soc_camera_platform.h +++ /dev/null | |||
| @@ -1,83 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Generic Platform Camera Driver Header | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Magnus Damm | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __SOC_CAMERA_H__ | ||
| 12 | #define __SOC_CAMERA_H__ | ||
| 13 | |||
| 14 | #include <linux/videodev2.h> | ||
| 15 | #include <media/soc_camera.h> | ||
| 16 | #include <media/v4l2-mediabus.h> | ||
| 17 | |||
| 18 | struct device; | ||
| 19 | |||
| 20 | struct soc_camera_platform_info { | ||
| 21 | const char *format_name; | ||
| 22 | unsigned long format_depth; | ||
| 23 | struct v4l2_mbus_framefmt format; | ||
| 24 | unsigned long mbus_param; | ||
| 25 | enum v4l2_mbus_type mbus_type; | ||
| 26 | struct soc_camera_device *icd; | ||
| 27 | int (*set_capture)(struct soc_camera_platform_info *info, int enable); | ||
| 28 | }; | ||
| 29 | |||
| 30 | static inline void soc_camera_platform_release(struct platform_device **pdev) | ||
| 31 | { | ||
| 32 | *pdev = NULL; | ||
| 33 | } | ||
| 34 | |||
| 35 | static inline int soc_camera_platform_add(struct soc_camera_device *icd, | ||
| 36 | struct platform_device **pdev, | ||
| 37 | struct soc_camera_link *plink, | ||
| 38 | void (*release)(struct device *dev), | ||
| 39 | int id) | ||
| 40 | { | ||
| 41 | struct soc_camera_subdev_desc *ssdd = | ||
| 42 | (struct soc_camera_subdev_desc *)plink; | ||
| 43 | struct soc_camera_platform_info *info = ssdd->drv_priv; | ||
| 44 | int ret; | ||
| 45 | |||
| 46 | if (&icd->sdesc->subdev_desc != ssdd) | ||
| 47 | return -ENODEV; | ||
| 48 | |||
| 49 | if (*pdev) | ||
| 50 | return -EBUSY; | ||
| 51 | |||
| 52 | *pdev = platform_device_alloc("soc_camera_platform", id); | ||
| 53 | if (!*pdev) | ||
| 54 | return -ENOMEM; | ||
| 55 | |||
| 56 | info->icd = icd; | ||
| 57 | |||
| 58 | (*pdev)->dev.platform_data = info; | ||
| 59 | (*pdev)->dev.release = release; | ||
| 60 | |||
| 61 | ret = platform_device_add(*pdev); | ||
| 62 | if (ret < 0) { | ||
| 63 | platform_device_put(*pdev); | ||
| 64 | *pdev = NULL; | ||
| 65 | info->icd = NULL; | ||
| 66 | } | ||
| 67 | |||
| 68 | return ret; | ||
| 69 | } | ||
| 70 | |||
| 71 | static inline void soc_camera_platform_del(const struct soc_camera_device *icd, | ||
| 72 | struct platform_device *pdev, | ||
| 73 | const struct soc_camera_link *plink) | ||
| 74 | { | ||
| 75 | const struct soc_camera_subdev_desc *ssdd = | ||
| 76 | (const struct soc_camera_subdev_desc *)plink; | ||
| 77 | if (&icd->sdesc->subdev_desc != ssdd || !pdev) | ||
| 78 | return; | ||
| 79 | |||
| 80 | platform_device_unregister(pdev); | ||
| 81 | } | ||
| 82 | |||
| 83 | #endif /* __SOC_CAMERA_H__ */ | ||
diff --git a/include/media/davinci/dm355_ccdc.h b/include/media/davinci/dm355_ccdc.h index e6bc72f6b60f..1cba42d805fa 100644 --- a/include/media/davinci/dm355_ccdc.h +++ b/include/media/davinci/dm355_ccdc.h | |||
| @@ -228,7 +228,7 @@ struct ccdc_config_params_raw { | |||
| 228 | /* Threshold of median filter */ | 228 | /* Threshold of median filter */ |
| 229 | int med_filt_thres; | 229 | int med_filt_thres; |
| 230 | /* | 230 | /* |
| 231 | * horz and vertical data offset. Appliable for defect correction | 231 | * horz and vertical data offset. Applicable for defect correction |
| 232 | * and lsc | 232 | * and lsc |
| 233 | */ | 233 | */ |
| 234 | struct ccdc_data_offset data_offset; | 234 | struct ccdc_data_offset data_offset; |
| @@ -238,7 +238,7 @@ struct ccdc_config_params_raw { | |||
| 238 | struct ccdc_black_clamp blk_clamp; | 238 | struct ccdc_black_clamp blk_clamp; |
| 239 | /* Structure for Black Compensation */ | 239 | /* Structure for Black Compensation */ |
| 240 | struct ccdc_black_compensation blk_comp; | 240 | struct ccdc_black_compensation blk_comp; |
| 241 | /* struture for vertical Defect Correction Module Configuration */ | 241 | /* structure for vertical Defect Correction Module Configuration */ |
| 242 | struct ccdc_vertical_dft vertical_dft; | 242 | struct ccdc_vertical_dft vertical_dft; |
| 243 | /* structure for color space converter Module Configuration */ | 243 | /* structure for color space converter Module Configuration */ |
| 244 | struct ccdc_csc csc; | 244 | struct ccdc_csc csc; |
diff --git a/include/media/davinci/dm644x_ccdc.h b/include/media/davinci/dm644x_ccdc.h index 6ea2ce241851..694fc8f6081f 100644 --- a/include/media/davinci/dm644x_ccdc.h +++ b/include/media/davinci/dm644x_ccdc.h | |||
| @@ -152,7 +152,7 @@ struct ccdc_params_raw { | |||
| 152 | * order in memory(bottom to top) | 152 | * order in memory(bottom to top) |
| 153 | */ | 153 | */ |
| 154 | unsigned char image_invert_enable; | 154 | unsigned char image_invert_enable; |
| 155 | /* configurable paramaters */ | 155 | /* configurable parameters */ |
| 156 | struct ccdc_config_params_raw config_params; | 156 | struct ccdc_config_params_raw config_params; |
| 157 | }; | 157 | }; |
| 158 | 158 | ||
diff --git a/include/media/drv-intf/exynos-fimc.h b/include/media/drv-intf/exynos-fimc.h index f9c64338841f..54c214737142 100644 --- a/include/media/drv-intf/exynos-fimc.h +++ b/include/media/drv-intf/exynos-fimc.h | |||
| @@ -81,7 +81,7 @@ struct fimc_source_info { | |||
| 81 | * v4l2_device notification id. This is only for internal use in the kernel. | 81 | * v4l2_device notification id. This is only for internal use in the kernel. |
| 82 | * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single | 82 | * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single |
| 83 | * frame capture mode when there is only one VSYNC pulse issued by the sensor | 83 | * frame capture mode when there is only one VSYNC pulse issued by the sensor |
| 84 | * at begining of the frame transmission. | 84 | * at beginning of the frame transmission. |
| 85 | */ | 85 | */ |
| 86 | #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0) | 86 | #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0) |
| 87 | 87 | ||
diff --git a/include/media/drv-intf/saa7146.h b/include/media/drv-intf/saa7146.h index a7bf2c4a2e4d..71ce63c99cb4 100644 --- a/include/media/drv-intf/saa7146.h +++ b/include/media/drv-intf/saa7146.h | |||
| @@ -139,7 +139,7 @@ struct saa7146_dev | |||
| 139 | void *ext_priv; /* pointer for extension private use (most likely some private data) */ | 139 | void *ext_priv; /* pointer for extension private use (most likely some private data) */ |
| 140 | struct saa7146_ext_vv *ext_vv_data; | 140 | struct saa7146_ext_vv *ext_vv_data; |
| 141 | 141 | ||
| 142 | /* per device video/vbi informations (if available) */ | 142 | /* per device video/vbi information (if available) */ |
| 143 | struct saa7146_vv *vv_data; | 143 | struct saa7146_vv *vv_data; |
| 144 | void (*vv_callback)(struct saa7146_dev *dev, unsigned long status); | 144 | void (*vv_callback)(struct saa7146_dev *dev, unsigned long status); |
| 145 | 145 | ||
diff --git a/include/media/drv-intf/saa7146_vv.h b/include/media/drv-intf/saa7146_vv.h index 6f80fb7f31a5..b34d86bb0664 100644 --- a/include/media/drv-intf/saa7146_vv.h +++ b/include/media/drv-intf/saa7146_vv.h | |||
| @@ -151,7 +151,7 @@ struct saa7146_vv | |||
| 151 | 151 | ||
| 152 | struct saa7146_ext_vv | 152 | struct saa7146_ext_vv |
| 153 | { | 153 | { |
| 154 | /* informations about the video capabilities of the device */ | 154 | /* information about the video capabilities of the device */ |
| 155 | int inputs; | 155 | int inputs; |
| 156 | int audios; | 156 | int audios; |
| 157 | u32 capabilities; | 157 | u32 capabilities; |
| @@ -241,7 +241,7 @@ void saa7146_res_free(struct saa7146_fh *fh, unsigned int bits); | |||
| 241 | #define SAA7146_CLIPPING_MASK 0x6 | 241 | #define SAA7146_CLIPPING_MASK 0x6 |
| 242 | #define SAA7146_CLIPPING_MASK_INVERTED 0x7 | 242 | #define SAA7146_CLIPPING_MASK_INVERTED 0x7 |
| 243 | 243 | ||
| 244 | /* output formats: each entry holds four informations */ | 244 | /* output formats: each entry holds four information */ |
| 245 | #define RGB08_COMPOSED 0x0217 /* composed is used in the sense of "not-planar" */ | 245 | #define RGB08_COMPOSED 0x0217 /* composed is used in the sense of "not-planar" */ |
| 246 | /* this means: planar?=0, yuv2rgb-conversation-mode=2, dither=yes(=1), format-mode = 7 */ | 246 | /* this means: planar?=0, yuv2rgb-conversation-mode=2, dither=yes(=1), format-mode = 7 */ |
| 247 | #define RGB15_COMPOSED 0x0213 | 247 | #define RGB15_COMPOSED 0x0213 |
diff --git a/include/media/drv-intf/sh_mobile_ceu.h b/include/media/drv-intf/sh_mobile_ceu.h deleted file mode 100644 index 555f0ecc0fde..000000000000 --- a/include/media/drv-intf/sh_mobile_ceu.h +++ /dev/null | |||
| @@ -1,29 +0,0 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | #ifndef __ASM_SH_MOBILE_CEU_H__ | ||
| 3 | #define __ASM_SH_MOBILE_CEU_H__ | ||
| 4 | |||
| 5 | #define SH_CEU_FLAG_USE_8BIT_BUS (1 << 0) /* use 8bit bus width */ | ||
| 6 | #define SH_CEU_FLAG_USE_16BIT_BUS (1 << 1) /* use 16bit bus width */ | ||
| 7 | #define SH_CEU_FLAG_HSYNC_LOW (1 << 2) /* default High if possible */ | ||
| 8 | #define SH_CEU_FLAG_VSYNC_LOW (1 << 3) /* default High if possible */ | ||
| 9 | #define SH_CEU_FLAG_LOWER_8BIT (1 << 4) /* default upper 8bit */ | ||
| 10 | |||
| 11 | struct device; | ||
| 12 | struct resource; | ||
| 13 | |||
| 14 | struct sh_mobile_ceu_companion { | ||
| 15 | u32 num_resources; | ||
| 16 | struct resource *resource; | ||
| 17 | int id; | ||
| 18 | void *platform_data; | ||
| 19 | }; | ||
| 20 | |||
| 21 | struct sh_mobile_ceu_info { | ||
| 22 | unsigned long flags; | ||
| 23 | int max_width; | ||
| 24 | int max_height; | ||
| 25 | struct v4l2_async_subdev **asd; /* Flat array, arranged in groups */ | ||
| 26 | unsigned int *asd_sizes; /* 0-terminated array pf asd group sizes */ | ||
| 27 | }; | ||
| 28 | |||
| 29 | #endif /* __ASM_SH_MOBILE_CEU_H__ */ | ||
diff --git a/include/media/dvb_frontend.h b/include/media/dvb_frontend.h index 6f7a85ab3541..f05cd7b94a2c 100644 --- a/include/media/dvb_frontend.h +++ b/include/media/dvb_frontend.h | |||
| @@ -160,7 +160,7 @@ enum dvbfe_algo { | |||
| 160 | * The frontend search for a signal failed | 160 | * The frontend search for a signal failed |
| 161 | * | 161 | * |
| 162 | * @DVBFE_ALGO_SEARCH_INVALID: | 162 | * @DVBFE_ALGO_SEARCH_INVALID: |
| 163 | * The frontend search algorith was probably supplied with invalid | 163 | * The frontend search algorithm was probably supplied with invalid |
| 164 | * parameters and the search is an invalid one | 164 | * parameters and the search is an invalid one |
| 165 | * | 165 | * |
| 166 | * @DVBFE_ALGO_SEARCH_ERROR: | 166 | * @DVBFE_ALGO_SEARCH_ERROR: |
| @@ -204,7 +204,7 @@ enum dvbfe_search { | |||
| 204 | * @set_config: callback function used to send some tuner-specific | 204 | * @set_config: callback function used to send some tuner-specific |
| 205 | * parameters. | 205 | * parameters. |
| 206 | * @get_frequency: get the actual tuned frequency | 206 | * @get_frequency: get the actual tuned frequency |
| 207 | * @get_bandwidth: get the bandwitdh used by the low pass filters | 207 | * @get_bandwidth: get the bandwidth used by the low pass filters |
| 208 | * @get_if_frequency: get the Intermediate Frequency, in Hz. For baseband, | 208 | * @get_if_frequency: get the Intermediate Frequency, in Hz. For baseband, |
| 209 | * should return 0. | 209 | * should return 0. |
| 210 | * @get_status: returns the frontend lock status | 210 | * @get_status: returns the frontend lock status |
| @@ -232,7 +232,7 @@ struct dvb_tuner_ops { | |||
| 232 | int (*suspend)(struct dvb_frontend *fe); | 232 | int (*suspend)(struct dvb_frontend *fe); |
| 233 | int (*resume)(struct dvb_frontend *fe); | 233 | int (*resume)(struct dvb_frontend *fe); |
| 234 | 234 | ||
| 235 | /* This is the recomended way to set the tuner */ | 235 | /* This is the recommended way to set the tuner */ |
| 236 | int (*set_params)(struct dvb_frontend *fe); | 236 | int (*set_params)(struct dvb_frontend *fe); |
| 237 | int (*set_analog_params)(struct dvb_frontend *fe, struct analog_parameters *p); | 237 | int (*set_analog_params)(struct dvb_frontend *fe, struct analog_parameters *p); |
| 238 | 238 | ||
| @@ -358,7 +358,7 @@ struct dvb_frontend_internal_info { | |||
| 358 | * @release: callback function called when frontend is ready to be | 358 | * @release: callback function called when frontend is ready to be |
| 359 | * freed. | 359 | * freed. |
| 360 | * drivers should free any allocated memory. | 360 | * drivers should free any allocated memory. |
| 361 | * @release_sec: callback function requesting that the Satelite Equipment | 361 | * @release_sec: callback function requesting that the Satellite Equipment |
| 362 | * Control (SEC) driver to release and free any memory | 362 | * Control (SEC) driver to release and free any memory |
| 363 | * allocated by the driver. | 363 | * allocated by the driver. |
| 364 | * @init: callback function used to initialize the tuner device. | 364 | * @init: callback function used to initialize the tuner device. |
diff --git a/include/media/i2c/tw9910.h b/include/media/i2c/tw9910.h index bec8f7bce745..2f93799d5a21 100644 --- a/include/media/i2c/tw9910.h +++ b/include/media/i2c/tw9910.h | |||
| @@ -16,8 +16,6 @@ | |||
| 16 | #ifndef __TW9910_H__ | 16 | #ifndef __TW9910_H__ |
| 17 | #define __TW9910_H__ | 17 | #define __TW9910_H__ |
| 18 | 18 | ||
| 19 | #include <media/soc_camera.h> | ||
| 20 | |||
| 21 | /** | 19 | /** |
| 22 | * tw9910_mpout_pin - MPOUT (multi-purpose output) pin functions | 20 | * tw9910_mpout_pin - MPOUT (multi-purpose output) pin functions |
| 23 | */ | 21 | */ |
diff --git a/include/media/mpeg2-ctrls.h b/include/media/mpeg2-ctrls.h index d21f40edc09e..6601455b3d5e 100644 --- a/include/media/mpeg2-ctrls.h +++ b/include/media/mpeg2-ctrls.h | |||
| @@ -30,10 +30,9 @@ struct v4l2_mpeg2_sequence { | |||
| 30 | __u32 vbv_buffer_size; | 30 | __u32 vbv_buffer_size; |
| 31 | 31 | ||
| 32 | /* ISO/IEC 13818-2, ITU-T Rec. H.262: Sequence extension */ | 32 | /* ISO/IEC 13818-2, ITU-T Rec. H.262: Sequence extension */ |
| 33 | __u8 profile_and_level_indication; | 33 | __u16 profile_and_level_indication; |
| 34 | __u8 progressive_sequence; | 34 | __u8 progressive_sequence; |
| 35 | __u8 chroma_format; | 35 | __u8 chroma_format; |
| 36 | __u8 pad; | ||
| 37 | }; | 36 | }; |
| 38 | 37 | ||
| 39 | struct v4l2_mpeg2_picture { | 38 | struct v4l2_mpeg2_picture { |
| @@ -51,23 +50,20 @@ struct v4l2_mpeg2_picture { | |||
| 51 | __u8 intra_vlc_format; | 50 | __u8 intra_vlc_format; |
| 52 | __u8 alternate_scan; | 51 | __u8 alternate_scan; |
| 53 | __u8 repeat_first_field; | 52 | __u8 repeat_first_field; |
| 54 | __u8 progressive_frame; | 53 | __u16 progressive_frame; |
| 55 | __u8 pad; | ||
| 56 | }; | 54 | }; |
| 57 | 55 | ||
| 58 | struct v4l2_ctrl_mpeg2_slice_params { | 56 | struct v4l2_ctrl_mpeg2_slice_params { |
| 59 | __u32 bit_size; | 57 | __u32 bit_size; |
| 60 | __u32 data_bit_offset; | 58 | __u32 data_bit_offset; |
| 59 | __u64 backward_ref_ts; | ||
| 60 | __u64 forward_ref_ts; | ||
| 61 | 61 | ||
| 62 | struct v4l2_mpeg2_sequence sequence; | 62 | struct v4l2_mpeg2_sequence sequence; |
| 63 | struct v4l2_mpeg2_picture picture; | 63 | struct v4l2_mpeg2_picture picture; |
| 64 | 64 | ||
| 65 | /* ISO/IEC 13818-2, ITU-T Rec. H.262: Slice */ | 65 | /* ISO/IEC 13818-2, ITU-T Rec. H.262: Slice */ |
| 66 | __u8 quantiser_scale_code; | 66 | __u32 quantiser_scale_code; |
| 67 | |||
| 68 | __u8 backward_ref_index; | ||
| 69 | __u8 forward_ref_index; | ||
| 70 | __u8 pad; | ||
| 71 | }; | 67 | }; |
| 72 | 68 | ||
| 73 | struct v4l2_ctrl_mpeg2_quantization { | 69 | struct v4l2_ctrl_mpeg2_quantization { |
diff --git a/include/media/rc-map.h b/include/media/rc-map.h index d621acadfbf3..5e684bb0d64c 100644 --- a/include/media/rc-map.h +++ b/include/media/rc-map.h | |||
| @@ -37,6 +37,9 @@ | |||
| 37 | #define RC_PROTO_BIT_XMP BIT_ULL(RC_PROTO_XMP) | 37 | #define RC_PROTO_BIT_XMP BIT_ULL(RC_PROTO_XMP) |
| 38 | #define RC_PROTO_BIT_CEC BIT_ULL(RC_PROTO_CEC) | 38 | #define RC_PROTO_BIT_CEC BIT_ULL(RC_PROTO_CEC) |
| 39 | #define RC_PROTO_BIT_IMON BIT_ULL(RC_PROTO_IMON) | 39 | #define RC_PROTO_BIT_IMON BIT_ULL(RC_PROTO_IMON) |
| 40 | #define RC_PROTO_BIT_RCMM12 BIT_ULL(RC_PROTO_RCMM12) | ||
| 41 | #define RC_PROTO_BIT_RCMM24 BIT_ULL(RC_PROTO_RCMM24) | ||
| 42 | #define RC_PROTO_BIT_RCMM32 BIT_ULL(RC_PROTO_RCMM32) | ||
| 40 | 43 | ||
| 41 | #define RC_PROTO_BIT_ALL \ | 44 | #define RC_PROTO_BIT_ALL \ |
| 42 | (RC_PROTO_BIT_UNKNOWN | RC_PROTO_BIT_OTHER | \ | 45 | (RC_PROTO_BIT_UNKNOWN | RC_PROTO_BIT_OTHER | \ |
| @@ -51,7 +54,8 @@ | |||
| 51 | RC_PROTO_BIT_RC6_6A_24 | RC_PROTO_BIT_RC6_6A_32 | \ | 54 | RC_PROTO_BIT_RC6_6A_24 | RC_PROTO_BIT_RC6_6A_32 | \ |
| 52 | RC_PROTO_BIT_RC6_MCE | RC_PROTO_BIT_SHARP | \ | 55 | RC_PROTO_BIT_RC6_MCE | RC_PROTO_BIT_SHARP | \ |
| 53 | RC_PROTO_BIT_XMP | RC_PROTO_BIT_CEC | \ | 56 | RC_PROTO_BIT_XMP | RC_PROTO_BIT_CEC | \ |
| 54 | RC_PROTO_BIT_IMON) | 57 | RC_PROTO_BIT_IMON | RC_PROTO_BIT_RCMM12 | \ |
| 58 | RC_PROTO_BIT_RCMM24 | RC_PROTO_BIT_RCMM32) | ||
| 55 | /* All rc protocols for which we have decoders */ | 59 | /* All rc protocols for which we have decoders */ |
| 56 | #define RC_PROTO_BIT_ALL_IR_DECODER \ | 60 | #define RC_PROTO_BIT_ALL_IR_DECODER \ |
| 57 | (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | \ | 61 | (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | \ |
| @@ -64,7 +68,9 @@ | |||
| 64 | RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \ | 68 | RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \ |
| 65 | RC_PROTO_BIT_RC6_6A_24 | RC_PROTO_BIT_RC6_6A_32 | \ | 69 | RC_PROTO_BIT_RC6_6A_24 | RC_PROTO_BIT_RC6_6A_32 | \ |
| 66 | RC_PROTO_BIT_RC6_MCE | RC_PROTO_BIT_SHARP | \ | 70 | RC_PROTO_BIT_RC6_MCE | RC_PROTO_BIT_SHARP | \ |
| 67 | RC_PROTO_BIT_XMP | RC_PROTO_BIT_IMON) | 71 | RC_PROTO_BIT_XMP | RC_PROTO_BIT_IMON | \ |
| 72 | RC_PROTO_BIT_RCMM12 | RC_PROTO_BIT_RCMM24 | \ | ||
| 73 | RC_PROTO_BIT_RCMM32) | ||
| 68 | 74 | ||
| 69 | #define RC_PROTO_BIT_ALL_IR_ENCODER \ | 75 | #define RC_PROTO_BIT_ALL_IR_ENCODER \ |
| 70 | (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | \ | 76 | (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | \ |
| @@ -77,7 +83,9 @@ | |||
| 77 | RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \ | 83 | RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \ |
| 78 | RC_PROTO_BIT_RC6_6A_24 | \ | 84 | RC_PROTO_BIT_RC6_6A_24 | \ |
| 79 | RC_PROTO_BIT_RC6_6A_32 | RC_PROTO_BIT_RC6_MCE | \ | 85 | RC_PROTO_BIT_RC6_6A_32 | RC_PROTO_BIT_RC6_MCE | \ |
| 80 | RC_PROTO_BIT_SHARP | RC_PROTO_BIT_IMON) | 86 | RC_PROTO_BIT_SHARP | RC_PROTO_BIT_IMON | \ |
| 87 | RC_PROTO_BIT_RCMM12 | RC_PROTO_BIT_RCMM24 | \ | ||
| 88 | RC_PROTO_BIT_RCMM32) | ||
| 81 | 89 | ||
| 82 | #define RC_SCANCODE_UNKNOWN(x) (x) | 90 | #define RC_SCANCODE_UNKNOWN(x) (x) |
| 83 | #define RC_SCANCODE_OTHER(x) (x) | 91 | #define RC_SCANCODE_OTHER(x) (x) |
| @@ -136,14 +144,14 @@ struct rc_map_list { | |||
| 136 | /* Routines from rc-map.c */ | 144 | /* Routines from rc-map.c */ |
| 137 | 145 | ||
| 138 | /** | 146 | /** |
| 139 | * rc_map_register() - Registers a Remote Controler scancode map | 147 | * rc_map_register() - Registers a Remote Controller scancode map |
| 140 | * | 148 | * |
| 141 | * @map: pointer to struct rc_map_list | 149 | * @map: pointer to struct rc_map_list |
| 142 | */ | 150 | */ |
| 143 | int rc_map_register(struct rc_map_list *map); | 151 | int rc_map_register(struct rc_map_list *map); |
| 144 | 152 | ||
| 145 | /** | 153 | /** |
| 146 | * rc_map_unregister() - Unregisters a Remote Controler scancode map | 154 | * rc_map_unregister() - Unregisters a Remote Controller scancode map |
| 147 | * | 155 | * |
| 148 | * @map: pointer to struct rc_map_list | 156 | * @map: pointer to struct rc_map_list |
| 149 | */ | 157 | */ |
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index 0c511ed8ffb0..2b93cb281fa5 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h | |||
| @@ -362,15 +362,6 @@ __v4l2_find_nearest_size(const void *array, size_t array_size, | |||
| 362 | size_t height_offset, s32 width, s32 height); | 362 | size_t height_offset, s32 width, s32 height); |
| 363 | 363 | ||
| 364 | /** | 364 | /** |
| 365 | * v4l2_get_timestamp - helper routine to get a timestamp to be used when | ||
| 366 | * filling streaming metadata. Internally, it uses ktime_get_ts(), | ||
| 367 | * which is the recommended way to get it. | ||
| 368 | * | ||
| 369 | * @tv: pointer to &struct timeval to be filled. | ||
| 370 | */ | ||
| 371 | void v4l2_get_timestamp(struct timeval *tv); | ||
| 372 | |||
| 373 | /** | ||
| 374 | * v4l2_g_parm_cap - helper routine for vidioc_g_parm to fill this in by | 365 | * v4l2_g_parm_cap - helper routine for vidioc_g_parm to fill this in by |
| 375 | * calling the g_frame_interval op of the given subdev. It only works | 366 | * calling the g_frame_interval op of the given subdev. It only works |
| 376 | * for V4L2_BUF_TYPE_VIDEO_CAPTURE(_MPLANE), hence the _cap in the | 367 | * for V4L2_BUF_TYPE_VIDEO_CAPTURE(_MPLANE), hence the _cap in the |
diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index d63cf227b0ab..e5cae37ced2d 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h | |||
| @@ -648,7 +648,7 @@ struct v4l2_ctrl *v4l2_ctrl_new_std_menu_items(struct v4l2_ctrl_handler *hdl, | |||
| 648 | * @def: The control's default value. | 648 | * @def: The control's default value. |
| 649 | * @qmenu_int: The control's menu entries. | 649 | * @qmenu_int: The control's menu entries. |
| 650 | * | 650 | * |
| 651 | * Same as v4l2_ctrl_new_std_menu(), but @mask is set to 0 and it additionaly | 651 | * Same as v4l2_ctrl_new_std_menu(), but @mask is set to 0 and it additionally |
| 652 | * takes as an argument an array of integers determining the menu items. | 652 | * takes as an argument an array of integers determining the menu items. |
| 653 | * | 653 | * |
| 654 | * If @id refers to a non-integer-menu control, then this function will | 654 | * If @id refers to a non-integer-menu control, then this function will |
diff --git a/include/media/v4l2-event.h b/include/media/v4l2-event.h index 17833e886e11..c2b6cdc714d2 100644 --- a/include/media/v4l2-event.h +++ b/include/media/v4l2-event.h | |||
| @@ -34,11 +34,13 @@ struct video_device; | |||
| 34 | * @list: List node for the v4l2_fh->available list. | 34 | * @list: List node for the v4l2_fh->available list. |
| 35 | * @sev: Pointer to parent v4l2_subscribed_event. | 35 | * @sev: Pointer to parent v4l2_subscribed_event. |
| 36 | * @event: The event itself. | 36 | * @event: The event itself. |
| 37 | * @ts: The timestamp of the event. | ||
| 37 | */ | 38 | */ |
| 38 | struct v4l2_kevent { | 39 | struct v4l2_kevent { |
| 39 | struct list_head list; | 40 | struct list_head list; |
| 40 | struct v4l2_subscribed_event *sev; | 41 | struct v4l2_subscribed_event *sev; |
| 41 | struct v4l2_event event; | 42 | struct v4l2_event event; |
| 43 | u64 ts; | ||
| 42 | }; | 44 | }; |
| 43 | 45 | ||
| 44 | /** | 46 | /** |
diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h index 6d9d9f1839ac..6c07825e18b9 100644 --- a/include/media/v4l2-fwnode.h +++ b/include/media/v4l2-fwnode.h | |||
| @@ -143,7 +143,7 @@ struct v4l2_fwnode_link { | |||
| 143 | * @vep.bus_type to V4L2_MBUS_UNKNOWN. The caller may not provide a default | 143 | * @vep.bus_type to V4L2_MBUS_UNKNOWN. The caller may not provide a default |
| 144 | * configuration in this case as the defaults are specific to a given bus type. | 144 | * configuration in this case as the defaults are specific to a given bus type. |
| 145 | * This functionality is deprecated and should not be used in new drivers and it | 145 | * This functionality is deprecated and should not be used in new drivers and it |
| 146 | * is only supported for CSI-2 D-PHY, parallel and Bt.656 busses. | 146 | * is only supported for CSI-2 D-PHY, parallel and Bt.656 buses. |
| 147 | * | 147 | * |
| 148 | * The function does not change the V4L2 fwnode endpoint state if it fails. | 148 | * The function does not change the V4L2 fwnode endpoint state if it fails. |
| 149 | * | 149 | * |
| @@ -186,7 +186,7 @@ void v4l2_fwnode_endpoint_free(struct v4l2_fwnode_endpoint *vep); | |||
| 186 | * @vep.bus_type to V4L2_MBUS_UNKNOWN. The caller may not provide a default | 186 | * @vep.bus_type to V4L2_MBUS_UNKNOWN. The caller may not provide a default |
| 187 | * configuration in this case as the defaults are specific to a given bus type. | 187 | * configuration in this case as the defaults are specific to a given bus type. |
| 188 | * This functionality is deprecated and should not be used in new drivers and it | 188 | * This functionality is deprecated and should not be used in new drivers and it |
| 189 | * is only supported for CSI-2 D-PHY, parallel and Bt.656 busses. | 189 | * is only supported for CSI-2 D-PHY, parallel and Bt.656 buses. |
| 190 | * | 190 | * |
| 191 | * The function does not change the V4L2 fwnode endpoint state if it fails. | 191 | * The function does not change the V4L2 fwnode endpoint state if it fails. |
| 192 | * | 192 | * |
diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h index 5467264771ec..bb3e63d6bd1a 100644 --- a/include/media/v4l2-mem2mem.h +++ b/include/media/v4l2-mem2mem.h | |||
| @@ -425,7 +425,7 @@ unsigned int v4l2_m2m_num_dst_bufs_ready(struct v4l2_m2m_ctx *m2m_ctx) | |||
| 425 | * | 425 | * |
| 426 | * @q_ctx: pointer to struct @v4l2_m2m_queue_ctx | 426 | * @q_ctx: pointer to struct @v4l2_m2m_queue_ctx |
| 427 | */ | 427 | */ |
| 428 | void *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx); | 428 | struct vb2_v4l2_buffer *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx); |
| 429 | 429 | ||
| 430 | /** | 430 | /** |
| 431 | * v4l2_m2m_next_src_buf() - return next source buffer from the list of ready | 431 | * v4l2_m2m_next_src_buf() - return next source buffer from the list of ready |
| @@ -433,7 +433,8 @@ void *v4l2_m2m_next_buf(struct v4l2_m2m_queue_ctx *q_ctx); | |||
| 433 | * | 433 | * |
| 434 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx | 434 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx |
| 435 | */ | 435 | */ |
| 436 | static inline void *v4l2_m2m_next_src_buf(struct v4l2_m2m_ctx *m2m_ctx) | 436 | static inline struct vb2_v4l2_buffer * |
| 437 | v4l2_m2m_next_src_buf(struct v4l2_m2m_ctx *m2m_ctx) | ||
| 437 | { | 438 | { |
| 438 | return v4l2_m2m_next_buf(&m2m_ctx->out_q_ctx); | 439 | return v4l2_m2m_next_buf(&m2m_ctx->out_q_ctx); |
| 439 | } | 440 | } |
| @@ -444,7 +445,8 @@ static inline void *v4l2_m2m_next_src_buf(struct v4l2_m2m_ctx *m2m_ctx) | |||
| 444 | * | 445 | * |
| 445 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx | 446 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx |
| 446 | */ | 447 | */ |
| 447 | static inline void *v4l2_m2m_next_dst_buf(struct v4l2_m2m_ctx *m2m_ctx) | 448 | static inline struct vb2_v4l2_buffer * |
| 449 | v4l2_m2m_next_dst_buf(struct v4l2_m2m_ctx *m2m_ctx) | ||
| 448 | { | 450 | { |
| 449 | return v4l2_m2m_next_buf(&m2m_ctx->cap_q_ctx); | 451 | return v4l2_m2m_next_buf(&m2m_ctx->cap_q_ctx); |
| 450 | } | 452 | } |
| @@ -454,7 +456,7 @@ static inline void *v4l2_m2m_next_dst_buf(struct v4l2_m2m_ctx *m2m_ctx) | |||
| 454 | * | 456 | * |
| 455 | * @q_ctx: pointer to struct @v4l2_m2m_queue_ctx | 457 | * @q_ctx: pointer to struct @v4l2_m2m_queue_ctx |
| 456 | */ | 458 | */ |
| 457 | void *v4l2_m2m_last_buf(struct v4l2_m2m_queue_ctx *q_ctx); | 459 | struct vb2_v4l2_buffer *v4l2_m2m_last_buf(struct v4l2_m2m_queue_ctx *q_ctx); |
| 458 | 460 | ||
| 459 | /** | 461 | /** |
| 460 | * v4l2_m2m_last_src_buf() - return last destination buffer from the list of | 462 | * v4l2_m2m_last_src_buf() - return last destination buffer from the list of |
| @@ -462,7 +464,8 @@ void *v4l2_m2m_last_buf(struct v4l2_m2m_queue_ctx *q_ctx); | |||
| 462 | * | 464 | * |
| 463 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx | 465 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx |
| 464 | */ | 466 | */ |
| 465 | static inline void *v4l2_m2m_last_src_buf(struct v4l2_m2m_ctx *m2m_ctx) | 467 | static inline struct vb2_v4l2_buffer * |
| 468 | v4l2_m2m_last_src_buf(struct v4l2_m2m_ctx *m2m_ctx) | ||
| 466 | { | 469 | { |
| 467 | return v4l2_m2m_last_buf(&m2m_ctx->out_q_ctx); | 470 | return v4l2_m2m_last_buf(&m2m_ctx->out_q_ctx); |
| 468 | } | 471 | } |
| @@ -473,7 +476,8 @@ static inline void *v4l2_m2m_last_src_buf(struct v4l2_m2m_ctx *m2m_ctx) | |||
| 473 | * | 476 | * |
| 474 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx | 477 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx |
| 475 | */ | 478 | */ |
| 476 | static inline void *v4l2_m2m_last_dst_buf(struct v4l2_m2m_ctx *m2m_ctx) | 479 | static inline struct vb2_v4l2_buffer * |
| 480 | v4l2_m2m_last_dst_buf(struct v4l2_m2m_ctx *m2m_ctx) | ||
| 477 | { | 481 | { |
| 478 | return v4l2_m2m_last_buf(&m2m_ctx->cap_q_ctx); | 482 | return v4l2_m2m_last_buf(&m2m_ctx->cap_q_ctx); |
| 479 | } | 483 | } |
| @@ -547,7 +551,7 @@ struct vb2_queue *v4l2_m2m_get_dst_vq(struct v4l2_m2m_ctx *m2m_ctx) | |||
| 547 | * | 551 | * |
| 548 | * @q_ctx: pointer to struct @v4l2_m2m_queue_ctx | 552 | * @q_ctx: pointer to struct @v4l2_m2m_queue_ctx |
| 549 | */ | 553 | */ |
| 550 | void *v4l2_m2m_buf_remove(struct v4l2_m2m_queue_ctx *q_ctx); | 554 | struct vb2_v4l2_buffer *v4l2_m2m_buf_remove(struct v4l2_m2m_queue_ctx *q_ctx); |
| 551 | 555 | ||
| 552 | /** | 556 | /** |
| 553 | * v4l2_m2m_src_buf_remove() - take off a source buffer from the list of ready | 557 | * v4l2_m2m_src_buf_remove() - take off a source buffer from the list of ready |
| @@ -555,7 +559,8 @@ void *v4l2_m2m_buf_remove(struct v4l2_m2m_queue_ctx *q_ctx); | |||
| 555 | * | 559 | * |
| 556 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx | 560 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx |
| 557 | */ | 561 | */ |
| 558 | static inline void *v4l2_m2m_src_buf_remove(struct v4l2_m2m_ctx *m2m_ctx) | 562 | static inline struct vb2_v4l2_buffer * |
| 563 | v4l2_m2m_src_buf_remove(struct v4l2_m2m_ctx *m2m_ctx) | ||
| 559 | { | 564 | { |
| 560 | return v4l2_m2m_buf_remove(&m2m_ctx->out_q_ctx); | 565 | return v4l2_m2m_buf_remove(&m2m_ctx->out_q_ctx); |
| 561 | } | 566 | } |
| @@ -566,7 +571,8 @@ static inline void *v4l2_m2m_src_buf_remove(struct v4l2_m2m_ctx *m2m_ctx) | |||
| 566 | * | 571 | * |
| 567 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx | 572 | * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx |
| 568 | */ | 573 | */ |
| 569 | static inline void *v4l2_m2m_dst_buf_remove(struct v4l2_m2m_ctx *m2m_ctx) | 574 | static inline struct vb2_v4l2_buffer * |
| 575 | v4l2_m2m_dst_buf_remove(struct v4l2_m2m_ctx *m2m_ctx) | ||
| 570 | { | 576 | { |
| 571 | return v4l2_m2m_buf_remove(&m2m_ctx->cap_q_ctx); | 577 | return v4l2_m2m_buf_remove(&m2m_ctx->cap_q_ctx); |
| 572 | } | 578 | } |
| @@ -622,6 +628,26 @@ v4l2_m2m_dst_buf_remove_by_idx(struct v4l2_m2m_ctx *m2m_ctx, unsigned int idx) | |||
| 622 | return v4l2_m2m_buf_remove_by_idx(&m2m_ctx->cap_q_ctx, idx); | 628 | return v4l2_m2m_buf_remove_by_idx(&m2m_ctx->cap_q_ctx, idx); |
| 623 | } | 629 | } |
| 624 | 630 | ||
| 631 | /** | ||
| 632 | * v4l2_m2m_buf_copy_metadata() - copy buffer metadata from | ||
| 633 | * the output buffer to the capture buffer | ||
| 634 | * | ||
| 635 | * @out_vb: the output buffer that is the source of the metadata. | ||
| 636 | * @cap_vb: the capture buffer that will receive the metadata. | ||
| 637 | * @copy_frame_flags: copy the KEY/B/PFRAME flags as well. | ||
| 638 | * | ||
| 639 | * This helper function copies the timestamp, timecode (if the TIMECODE | ||
| 640 | * buffer flag was set), field and the TIMECODE, KEYFRAME, BFRAME, PFRAME | ||
| 641 | * and TSTAMP_SRC_MASK flags from @out_vb to @cap_vb. | ||
| 642 | * | ||
| 643 | * If @copy_frame_flags is false, then the KEYFRAME, BFRAME and PFRAME | ||
| 644 | * flags are not copied. This is typically needed for encoders that | ||
| 645 | * set this bits explicitly. | ||
| 646 | */ | ||
| 647 | void v4l2_m2m_buf_copy_metadata(const struct vb2_v4l2_buffer *out_vb, | ||
| 648 | struct vb2_v4l2_buffer *cap_vb, | ||
| 649 | bool copy_frame_flags); | ||
| 650 | |||
| 625 | /* v4l2 request helper */ | 651 | /* v4l2 request helper */ |
| 626 | 652 | ||
| 627 | void v4l2_m2m_request_queue(struct media_request *req); | 653 | void v4l2_m2m_request_queue(struct media_request *req); |
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h index 47af609dc8f1..349e1c18cf48 100644 --- a/include/media/v4l2-subdev.h +++ b/include/media/v4l2-subdev.h | |||
| @@ -70,7 +70,7 @@ struct v4l2_decode_vbi_line { | |||
| 70 | * device. These devices are usually audio/video muxers/encoders/decoders or | 70 | * device. These devices are usually audio/video muxers/encoders/decoders or |
| 71 | * sensors and webcam controllers. | 71 | * sensors and webcam controllers. |
| 72 | * | 72 | * |
| 73 | * Usually these devices are controlled through an i2c bus, but other busses | 73 | * Usually these devices are controlled through an i2c bus, but other buses |
| 74 | * may also be used. | 74 | * may also be used. |
| 75 | * | 75 | * |
| 76 | * The v4l2_subdev struct provides a way of accessing these devices in a | 76 | * The v4l2_subdev struct provides a way of accessing these devices in a |
| @@ -1093,13 +1093,14 @@ void v4l2_subdev_init(struct v4l2_subdev *sd, | |||
| 1093 | */ | 1093 | */ |
| 1094 | #define v4l2_subdev_call(sd, o, f, args...) \ | 1094 | #define v4l2_subdev_call(sd, o, f, args...) \ |
| 1095 | ({ \ | 1095 | ({ \ |
| 1096 | struct v4l2_subdev *__sd = (sd); \ | ||
| 1096 | int __result; \ | 1097 | int __result; \ |
| 1097 | if (!(sd)) \ | 1098 | if (!__sd) \ |
| 1098 | __result = -ENODEV; \ | 1099 | __result = -ENODEV; \ |
| 1099 | else if (!((sd)->ops->o && (sd)->ops->o->f)) \ | 1100 | else if (!(__sd->ops->o && __sd->ops->o->f)) \ |
| 1100 | __result = -ENOIOCTLCMD; \ | 1101 | __result = -ENOIOCTLCMD; \ |
| 1101 | else \ | 1102 | else \ |
| 1102 | __result = (sd)->ops->o->f((sd), ##args); \ | 1103 | __result = __sd->ops->o->f(__sd, ##args); \ |
| 1103 | __result; \ | 1104 | __result; \ |
| 1104 | }) | 1105 | }) |
| 1105 | 1106 | ||
diff --git a/include/media/videobuf-core.h b/include/media/videobuf-core.h index 60a664febba0..2c4db97cd96f 100644 --- a/include/media/videobuf-core.h +++ b/include/media/videobuf-core.h | |||
| @@ -43,7 +43,7 @@ struct videobuf_queue; | |||
| 43 | * (which v4l2 uses). | 43 | * (which v4l2 uses). |
| 44 | * | 44 | * |
| 45 | * If there is a valid mapping for a buffer, buffer->baddr/bsize holds | 45 | * If there is a valid mapping for a buffer, buffer->baddr/bsize holds |
| 46 | * userspace address + size which can be feeded into the | 46 | * userspace address + size which can be fed into the |
| 47 | * videobuf_dma_init_user function listed above. | 47 | * videobuf_dma_init_user function listed above. |
| 48 | * | 48 | * |
| 49 | */ | 49 | */ |
| @@ -80,7 +80,7 @@ struct videobuf_buffer { | |||
| 80 | struct list_head queue; | 80 | struct list_head queue; |
| 81 | wait_queue_head_t done; | 81 | wait_queue_head_t done; |
| 82 | unsigned int field_count; | 82 | unsigned int field_count; |
| 83 | struct timeval ts; | 83 | u64 ts; |
| 84 | 84 | ||
| 85 | /* Memory type */ | 85 | /* Memory type */ |
| 86 | enum v4l2_memory memory; | 86 | enum v4l2_memory memory; |
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h index 4a737b2c610b..910f3d469005 100644 --- a/include/media/videobuf2-core.h +++ b/include/media/videobuf2-core.h | |||
| @@ -262,6 +262,8 @@ struct vb2_buffer { | |||
| 262 | * prepared: this buffer has been prepared, i.e. the | 262 | * prepared: this buffer has been prepared, i.e. the |
| 263 | * buf_prepare op was called. It is cleared again | 263 | * buf_prepare op was called. It is cleared again |
| 264 | * after the 'buf_finish' op is called. | 264 | * after the 'buf_finish' op is called. |
| 265 | * copied_timestamp: the timestamp of this capture buffer was copied | ||
| 266 | * from an output buffer. | ||
| 265 | * queued_entry: entry on the queued buffers list, which holds | 267 | * queued_entry: entry on the queued buffers list, which holds |
| 266 | * all buffers queued from userspace | 268 | * all buffers queued from userspace |
| 267 | * done_entry: entry on the list that stores all buffers ready | 269 | * done_entry: entry on the list that stores all buffers ready |
| @@ -269,8 +271,9 @@ struct vb2_buffer { | |||
| 269 | * vb2_plane: per-plane information; do not change | 271 | * vb2_plane: per-plane information; do not change |
| 270 | */ | 272 | */ |
| 271 | enum vb2_buffer_state state; | 273 | enum vb2_buffer_state state; |
| 272 | bool synced; | 274 | unsigned int synced:1; |
| 273 | bool prepared; | 275 | unsigned int prepared:1; |
| 276 | unsigned int copied_timestamp:1; | ||
| 274 | 277 | ||
| 275 | struct vb2_plane planes[VB2_MAX_PLANES]; | 278 | struct vb2_plane planes[VB2_MAX_PLANES]; |
| 276 | struct list_head queued_entry; | 279 | struct list_head queued_entry; |
| @@ -296,6 +299,7 @@ struct vb2_buffer { | |||
| 296 | u32 cnt_mem_num_users; | 299 | u32 cnt_mem_num_users; |
| 297 | u32 cnt_mem_mmap; | 300 | u32 cnt_mem_mmap; |
| 298 | 301 | ||
| 302 | u32 cnt_buf_out_validate; | ||
| 299 | u32 cnt_buf_init; | 303 | u32 cnt_buf_init; |
| 300 | u32 cnt_buf_prepare; | 304 | u32 cnt_buf_prepare; |
| 301 | u32 cnt_buf_finish; | 305 | u32 cnt_buf_finish; |
| @@ -342,6 +346,10 @@ struct vb2_buffer { | |||
| 342 | * @wait_finish: reacquire all locks released in the previous callback; | 346 | * @wait_finish: reacquire all locks released in the previous callback; |
| 343 | * required to continue operation after sleeping while | 347 | * required to continue operation after sleeping while |
| 344 | * waiting for a new buffer to arrive. | 348 | * waiting for a new buffer to arrive. |
| 349 | * @buf_out_validate: called when the output buffer is prepared or queued | ||
| 350 | * to a request; drivers can use this to validate | ||
| 351 | * userspace-provided information; this is required only | ||
| 352 | * for OUTPUT queues. | ||
| 345 | * @buf_init: called once after allocating a buffer (in MMAP case) | 353 | * @buf_init: called once after allocating a buffer (in MMAP case) |
| 346 | * or after acquiring a new USERPTR buffer; drivers may | 354 | * or after acquiring a new USERPTR buffer; drivers may |
| 347 | * perform additional buffer-related initialization; | 355 | * perform additional buffer-related initialization; |
| @@ -391,7 +399,7 @@ struct vb2_buffer { | |||
| 391 | * @buf_queue: passes buffer vb to the driver; driver may start | 399 | * @buf_queue: passes buffer vb to the driver; driver may start |
| 392 | * hardware operation on this buffer; driver should give | 400 | * hardware operation on this buffer; driver should give |
| 393 | * the buffer back by calling vb2_buffer_done() function; | 401 | * the buffer back by calling vb2_buffer_done() function; |
| 394 | * it is allways called after calling VIDIOC_STREAMON() | 402 | * it is always called after calling VIDIOC_STREAMON() |
| 395 | * ioctl; might be called before @start_streaming callback | 403 | * ioctl; might be called before @start_streaming callback |
| 396 | * if user pre-queued buffers before calling | 404 | * if user pre-queued buffers before calling |
| 397 | * VIDIOC_STREAMON(). | 405 | * VIDIOC_STREAMON(). |
| @@ -409,6 +417,7 @@ struct vb2_ops { | |||
| 409 | void (*wait_prepare)(struct vb2_queue *q); | 417 | void (*wait_prepare)(struct vb2_queue *q); |
| 410 | void (*wait_finish)(struct vb2_queue *q); | 418 | void (*wait_finish)(struct vb2_queue *q); |
| 411 | 419 | ||
| 420 | int (*buf_out_validate)(struct vb2_buffer *vb); | ||
| 412 | int (*buf_init)(struct vb2_buffer *vb); | 421 | int (*buf_init)(struct vb2_buffer *vb); |
| 413 | int (*buf_prepare)(struct vb2_buffer *vb); | 422 | int (*buf_prepare)(struct vb2_buffer *vb); |
| 414 | void (*buf_finish)(struct vb2_buffer *vb); | 423 | void (*buf_finish)(struct vb2_buffer *vb); |
diff --git a/include/media/videobuf2-dma-sg.h b/include/media/videobuf2-dma-sg.h index 52afa0e2bb17..f28fcb0cfac7 100644 --- a/include/media/videobuf2-dma-sg.h +++ b/include/media/videobuf2-dma-sg.h | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2010 Samsung Electronics | 4 | * Copyright (C) 2010 Samsung Electronics |
| 5 | * | 5 | * |
| 6 | * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> | 6 | * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
diff --git a/include/media/videobuf2-v4l2.h b/include/media/videobuf2-v4l2.h index 727855463838..8a10889dc2fd 100644 --- a/include/media/videobuf2-v4l2.h +++ b/include/media/videobuf2-v4l2.h | |||
| @@ -55,6 +55,22 @@ struct vb2_v4l2_buffer { | |||
| 55 | #define to_vb2_v4l2_buffer(vb) \ | 55 | #define to_vb2_v4l2_buffer(vb) \ |
| 56 | container_of(vb, struct vb2_v4l2_buffer, vb2_buf) | 56 | container_of(vb, struct vb2_v4l2_buffer, vb2_buf) |
| 57 | 57 | ||
| 58 | /** | ||
| 59 | * vb2_find_timestamp() - Find buffer with given timestamp in the queue | ||
| 60 | * | ||
| 61 | * @q: pointer to &struct vb2_queue with videobuf2 queue. | ||
| 62 | * @timestamp: the timestamp to find. | ||
| 63 | * @start_idx: the start index (usually 0) in the buffer array to start | ||
| 64 | * searching from. Note that there may be multiple buffers | ||
| 65 | * with the same timestamp value, so you can restart the search | ||
| 66 | * by setting @start_idx to the previously found index + 1. | ||
| 67 | * | ||
| 68 | * Returns the buffer index of the buffer with the given @timestamp, or | ||
| 69 | * -1 if no buffer with @timestamp was found. | ||
| 70 | */ | ||
| 71 | int vb2_find_timestamp(const struct vb2_queue *q, u64 timestamp, | ||
| 72 | unsigned int start_idx); | ||
| 73 | |||
| 58 | int vb2_querybuf(struct vb2_queue *q, struct v4l2_buffer *b); | 74 | int vb2_querybuf(struct vb2_queue *q, struct v4l2_buffer *b); |
| 59 | 75 | ||
| 60 | /** | 76 | /** |
diff --git a/include/trace/events/pwc.h b/include/trace/events/pwc.h new file mode 100644 index 000000000000..a2da764a3b41 --- /dev/null +++ b/include/trace/events/pwc.h | |||
| @@ -0,0 +1,65 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | #if !defined(_TRACE_PWC_H) || defined(TRACE_HEADER_MULTI_READ) | ||
| 3 | #define _TRACE_PWC_H | ||
| 4 | |||
| 5 | #include <linux/usb.h> | ||
| 6 | #include <linux/tracepoint.h> | ||
| 7 | |||
| 8 | #undef TRACE_SYSTEM | ||
| 9 | #define TRACE_SYSTEM pwc | ||
| 10 | |||
| 11 | TRACE_EVENT(pwc_handler_enter, | ||
| 12 | TP_PROTO(struct urb *urb, struct pwc_device *pdev), | ||
| 13 | TP_ARGS(urb, pdev), | ||
| 14 | TP_STRUCT__entry( | ||
| 15 | __field(struct urb*, urb) | ||
| 16 | __field(struct pwc_frame_buf*, fbuf) | ||
| 17 | __field(int, urb__status) | ||
| 18 | __field(u32, urb__actual_length) | ||
| 19 | __field(int, fbuf__filled) | ||
| 20 | __string(name, pdev->v4l2_dev.name) | ||
| 21 | ), | ||
| 22 | TP_fast_assign( | ||
| 23 | __entry->urb = urb; | ||
| 24 | __entry->fbuf = pdev->fill_buf; | ||
| 25 | __entry->urb__status = urb->status; | ||
| 26 | __entry->urb__actual_length = urb->actual_length; | ||
| 27 | __entry->fbuf__filled = (pdev->fill_buf | ||
| 28 | ? pdev->fill_buf->filled : 0); | ||
| 29 | __assign_str(name, pdev->v4l2_dev.name); | ||
| 30 | ), | ||
| 31 | TP_printk("dev=%s (fbuf=%p filled=%d) urb=%p (status=%d actual_length=%u)", | ||
| 32 | __get_str(name), | ||
| 33 | __entry->fbuf, | ||
| 34 | __entry->fbuf__filled, | ||
| 35 | __entry->urb, | ||
| 36 | __entry->urb__status, | ||
| 37 | __entry->urb__actual_length) | ||
| 38 | ); | ||
| 39 | |||
| 40 | TRACE_EVENT(pwc_handler_exit, | ||
| 41 | TP_PROTO(struct urb *urb, struct pwc_device *pdev), | ||
| 42 | TP_ARGS(urb, pdev), | ||
| 43 | TP_STRUCT__entry( | ||
| 44 | __field(struct urb*, urb) | ||
| 45 | __field(struct pwc_frame_buf*, fbuf) | ||
| 46 | __field(int, fbuf__filled) | ||
| 47 | __string(name, pdev->v4l2_dev.name) | ||
| 48 | ), | ||
| 49 | TP_fast_assign( | ||
| 50 | __entry->urb = urb; | ||
| 51 | __entry->fbuf = pdev->fill_buf; | ||
| 52 | __entry->fbuf__filled = pdev->fill_buf->filled; | ||
| 53 | __assign_str(name, pdev->v4l2_dev.name); | ||
| 54 | ), | ||
| 55 | TP_printk(" dev=%s (fbuf=%p filled=%d) urb=%p", | ||
| 56 | __get_str(name), | ||
| 57 | __entry->fbuf, | ||
| 58 | __entry->fbuf__filled, | ||
| 59 | __entry->urb) | ||
| 60 | ); | ||
| 61 | |||
| 62 | #endif /* _TRACE_PWC_H */ | ||
| 63 | |||
| 64 | /* This part must be outside protection */ | ||
| 65 | #include <trace/define_trace.h> | ||
diff --git a/include/uapi/linux/lirc.h b/include/uapi/linux/lirc.h index 6b319581882f..45fcbf99d72e 100644 --- a/include/uapi/linux/lirc.h +++ b/include/uapi/linux/lirc.h | |||
| @@ -192,6 +192,9 @@ struct lirc_scancode { | |||
| 192 | * @RC_PROTO_XMP: XMP protocol | 192 | * @RC_PROTO_XMP: XMP protocol |
| 193 | * @RC_PROTO_CEC: CEC protocol | 193 | * @RC_PROTO_CEC: CEC protocol |
| 194 | * @RC_PROTO_IMON: iMon Pad protocol | 194 | * @RC_PROTO_IMON: iMon Pad protocol |
| 195 | * @RC_PROTO_RCMM12: RC-MM protocol 12 bits | ||
| 196 | * @RC_PROTO_RCMM24: RC-MM protocol 24 bits | ||
| 197 | * @RC_PROTO_RCMM32: RC-MM protocol 32 bits | ||
| 195 | */ | 198 | */ |
| 196 | enum rc_proto { | 199 | enum rc_proto { |
| 197 | RC_PROTO_UNKNOWN = 0, | 200 | RC_PROTO_UNKNOWN = 0, |
| @@ -218,6 +221,9 @@ enum rc_proto { | |||
| 218 | RC_PROTO_XMP = 21, | 221 | RC_PROTO_XMP = 21, |
| 219 | RC_PROTO_CEC = 22, | 222 | RC_PROTO_CEC = 22, |
| 220 | RC_PROTO_IMON = 23, | 223 | RC_PROTO_IMON = 23, |
| 224 | RC_PROTO_RCMM12 = 24, | ||
| 225 | RC_PROTO_RCMM24 = 25, | ||
| 226 | RC_PROTO_RCMM32 = 26, | ||
| 221 | }; | 227 | }; |
| 222 | 228 | ||
| 223 | #endif | 229 | #endif |
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 3dcfc6148f99..06479f2fb3ae 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h | |||
| @@ -533,6 +533,8 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type { | |||
| 533 | }; | 533 | }; |
| 534 | #define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER (V4L2_CID_MPEG_BASE+381) | 534 | #define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER (V4L2_CID_MPEG_BASE+381) |
| 535 | #define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP (V4L2_CID_MPEG_BASE+382) | 535 | #define V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER_QP (V4L2_CID_MPEG_BASE+382) |
| 536 | #define V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION (V4L2_CID_MPEG_BASE+383) | ||
| 537 | #define V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET (V4L2_CID_MPEG_BASE+384) | ||
| 536 | #define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (V4L2_CID_MPEG_BASE+400) | 538 | #define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (V4L2_CID_MPEG_BASE+400) |
| 537 | #define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (V4L2_CID_MPEG_BASE+401) | 539 | #define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (V4L2_CID_MPEG_BASE+401) |
| 538 | #define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (V4L2_CID_MPEG_BASE+402) | 540 | #define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (V4L2_CID_MPEG_BASE+402) |
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index b5671ce2724f..1db220da3bcc 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h | |||
| @@ -130,6 +130,13 @@ enum v4l2_field { | |||
| 130 | ((field) == V4L2_FIELD_BOTTOM ||\ | 130 | ((field) == V4L2_FIELD_BOTTOM ||\ |
| 131 | (field) == V4L2_FIELD_TOP ||\ | 131 | (field) == V4L2_FIELD_TOP ||\ |
| 132 | (field) == V4L2_FIELD_ALTERNATE) | 132 | (field) == V4L2_FIELD_ALTERNATE) |
| 133 | #define V4L2_FIELD_IS_INTERLACED(field) \ | ||
| 134 | ((field) == V4L2_FIELD_INTERLACED ||\ | ||
| 135 | (field) == V4L2_FIELD_INTERLACED_TB ||\ | ||
| 136 | (field) == V4L2_FIELD_INTERLACED_BT) | ||
| 137 | #define V4L2_FIELD_IS_SEQUENTIAL(field) \ | ||
| 138 | ((field) == V4L2_FIELD_SEQ_TB ||\ | ||
| 139 | (field) == V4L2_FIELD_SEQ_BT) | ||
| 133 | 140 | ||
| 134 | enum v4l2_buf_type { | 141 | enum v4l2_buf_type { |
| 135 | V4L2_BUF_TYPE_VIDEO_CAPTURE = 1, | 142 | V4L2_BUF_TYPE_VIDEO_CAPTURE = 1, |
| @@ -161,7 +168,8 @@ enum v4l2_buf_type { | |||
| 161 | || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY \ | 168 | || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY \ |
| 162 | || (type) == V4L2_BUF_TYPE_VBI_OUTPUT \ | 169 | || (type) == V4L2_BUF_TYPE_VBI_OUTPUT \ |
| 163 | || (type) == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT \ | 170 | || (type) == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT \ |
| 164 | || (type) == V4L2_BUF_TYPE_SDR_OUTPUT) | 171 | || (type) == V4L2_BUF_TYPE_SDR_OUTPUT \ |
| 172 | || (type) == V4L2_BUF_TYPE_META_OUTPUT) | ||
| 165 | 173 | ||
| 166 | enum v4l2_tuner_type { | 174 | enum v4l2_tuner_type { |
| 167 | V4L2_TUNER_RADIO = 1, | 175 | V4L2_TUNER_RADIO = 1, |
| @@ -554,6 +562,10 @@ struct v4l2_pix_format { | |||
| 554 | #define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y', 'U', 'V', 'O') /* 16 YUV-5-5-5 */ | 562 | #define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y', 'U', 'V', 'O') /* 16 YUV-5-5-5 */ |
| 555 | #define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y', 'U', 'V', 'P') /* 16 YUV-5-6-5 */ | 563 | #define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y', 'U', 'V', 'P') /* 16 YUV-5-6-5 */ |
| 556 | #define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y', 'U', 'V', '4') /* 32 YUV-8-8-8-8 */ | 564 | #define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y', 'U', 'V', '4') /* 32 YUV-8-8-8-8 */ |
| 565 | #define V4L2_PIX_FMT_AYUV32 v4l2_fourcc('A', 'Y', 'U', 'V') /* 32 AYUV-8-8-8-8 */ | ||
| 566 | #define V4L2_PIX_FMT_XYUV32 v4l2_fourcc('X', 'Y', 'U', 'V') /* 32 XYUV-8-8-8-8 */ | ||
| 567 | #define V4L2_PIX_FMT_VUYA32 v4l2_fourcc('V', 'U', 'Y', 'A') /* 32 VUYA-8-8-8-8 */ | ||
| 568 | #define V4L2_PIX_FMT_VUYX32 v4l2_fourcc('V', 'U', 'Y', 'X') /* 32 VUYX-8-8-8-8 */ | ||
| 557 | #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* 8 8-bit color */ | 569 | #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* 8 8-bit color */ |
| 558 | #define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */ | 570 | #define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */ |
| 559 | #define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0') /* 12 YUV 4:2:0 2 lines y, 1 line uv interleaved */ | 571 | #define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0') /* 12 YUV 4:2:0 2 lines y, 1 line uv interleaved */ |
| @@ -973,6 +985,18 @@ struct v4l2_buffer { | |||
| 973 | }; | 985 | }; |
| 974 | }; | 986 | }; |
| 975 | 987 | ||
| 988 | /** | ||
| 989 | * v4l2_timeval_to_ns - Convert timeval to nanoseconds | ||
| 990 | * @ts: pointer to the timeval variable to be converted | ||
| 991 | * | ||
| 992 | * Returns the scalar nanosecond representation of the timeval | ||
| 993 | * parameter. | ||
| 994 | */ | ||
| 995 | static inline __u64 v4l2_timeval_to_ns(const struct timeval *tv) | ||
| 996 | { | ||
| 997 | return (__u64)tv->tv_sec * 1000000000ULL + tv->tv_usec * 1000; | ||
| 998 | } | ||
| 999 | |||
| 976 | /* Flags for 'flags' field */ | 1000 | /* Flags for 'flags' field */ |
| 977 | /* Buffer is mapped (flag) */ | 1001 | /* Buffer is mapped (flag) */ |
| 978 | #define V4L2_BUF_FLAG_MAPPED 0x00000001 | 1002 | #define V4L2_BUF_FLAG_MAPPED 0x00000001 |
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h index b80b85f0d9d8..b03fafa1ff58 100644 --- a/include/video/imx-ipu-v3.h +++ b/include/video/imx-ipu-v3.h | |||
| @@ -258,7 +258,8 @@ void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride); | |||
| 258 | void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch); | 258 | void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch); |
| 259 | void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t buf); | 259 | void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t buf); |
| 260 | void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off); | 260 | void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off); |
| 261 | void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride); | 261 | void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride, |
| 262 | u32 pixelformat); | ||
| 262 | void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id); | 263 | void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id); |
| 263 | int ipu_cpmem_get_burstsize(struct ipuv3_channel *ch); | 264 | int ipu_cpmem_get_burstsize(struct ipuv3_channel *ch); |
| 264 | void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize); | 265 | void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize); |
| @@ -355,8 +356,9 @@ bool ipu_prg_channel_configure_pending(struct ipuv3_channel *ipu_chan); | |||
| 355 | */ | 356 | */ |
| 356 | struct ipu_csi; | 357 | struct ipu_csi; |
| 357 | int ipu_csi_init_interface(struct ipu_csi *csi, | 358 | int ipu_csi_init_interface(struct ipu_csi *csi, |
| 358 | struct v4l2_mbus_config *mbus_cfg, | 359 | const struct v4l2_mbus_config *mbus_cfg, |
| 359 | struct v4l2_mbus_framefmt *mbus_fmt); | 360 | const struct v4l2_mbus_framefmt *infmt, |
| 361 | const struct v4l2_mbus_framefmt *outfmt); | ||
| 360 | bool ipu_csi_is_interlaced(struct ipu_csi *csi); | 362 | bool ipu_csi_is_interlaced(struct ipu_csi *csi); |
| 361 | void ipu_csi_get_window(struct ipu_csi *csi, struct v4l2_rect *w); | 363 | void ipu_csi_get_window(struct ipu_csi *csi, struct v4l2_rect *w); |
| 362 | void ipu_csi_set_window(struct ipu_csi *csi, struct v4l2_rect *w); | 364 | void ipu_csi_set_window(struct ipu_csi *csi, struct v4l2_rect *w); |
diff --git a/samples/v4l/v4l2-pci-skeleton.c b/samples/v4l/v4l2-pci-skeleton.c index 27ec30952cfa..758ced8c3d06 100644 --- a/samples/v4l/v4l2-pci-skeleton.c +++ b/samples/v4l/v4l2-pci-skeleton.c | |||
| @@ -139,16 +139,16 @@ static irqreturn_t skeleton_irq(int irq, void *dev_id) | |||
| 139 | spin_lock(&skel->qlock); | 139 | spin_lock(&skel->qlock); |
| 140 | list_del(&new_buf->list); | 140 | list_del(&new_buf->list); |
| 141 | spin_unlock(&skel->qlock); | 141 | spin_unlock(&skel->qlock); |
| 142 | v4l2_get_timestamp(&new_buf->vb.v4l2_buf.timestamp); | 142 | new_buf->vb.vb2_buf.timestamp = ktime_get_ns(); |
| 143 | new_buf->vb.v4l2_buf.sequence = skel->sequence++; | 143 | new_buf->vb.sequence = skel->sequence++; |
| 144 | new_buf->vb.v4l2_buf.field = skel->field; | 144 | new_buf->vb.field = skel->field; |
| 145 | if (skel->format.field == V4L2_FIELD_ALTERNATE) { | 145 | if (skel->format.field == V4L2_FIELD_ALTERNATE) { |
| 146 | if (skel->field == V4L2_FIELD_BOTTOM) | 146 | if (skel->field == V4L2_FIELD_BOTTOM) |
| 147 | skel->field = V4L2_FIELD_TOP; | 147 | skel->field = V4L2_FIELD_TOP; |
| 148 | else if (skel->field == V4L2_FIELD_TOP) | 148 | else if (skel->field == V4L2_FIELD_TOP) |
| 149 | skel->field = V4L2_FIELD_BOTTOM; | 149 | skel->field = V4L2_FIELD_BOTTOM; |
| 150 | } | 150 | } |
| 151 | vb2_buffer_done(&new_buf->vb, VB2_BUF_STATE_DONE); | 151 | vb2_buffer_done(&new_buf->vb.vb2_buf, VB2_BUF_STATE_DONE); |
| 152 | } | 152 | } |
| 153 | #endif | 153 | #endif |
| 154 | return IRQ_HANDLED; | 154 | return IRQ_HANDLED; |
diff --git a/tools/include/uapi/linux/lirc.h b/tools/include/uapi/linux/lirc.h index f189931042a7..45fcbf99d72e 100644 --- a/tools/include/uapi/linux/lirc.h +++ b/tools/include/uapi/linux/lirc.h | |||
| @@ -134,6 +134,12 @@ | |||
| 134 | #define LIRC_SET_WIDEBAND_RECEIVER _IOW('i', 0x00000023, __u32) | 134 | #define LIRC_SET_WIDEBAND_RECEIVER _IOW('i', 0x00000023, __u32) |
| 135 | 135 | ||
| 136 | /* | 136 | /* |
| 137 | * Return the recording timeout, which is either set by | ||
| 138 | * the ioctl LIRC_SET_REC_TIMEOUT or by the kernel after setting the protocols. | ||
| 139 | */ | ||
| 140 | #define LIRC_GET_REC_TIMEOUT _IOR('i', 0x00000024, __u32) | ||
| 141 | |||
| 142 | /* | ||
| 137 | * struct lirc_scancode - decoded scancode with protocol for use with | 143 | * struct lirc_scancode - decoded scancode with protocol for use with |
| 138 | * LIRC_MODE_SCANCODE | 144 | * LIRC_MODE_SCANCODE |
| 139 | * | 145 | * |
| @@ -186,6 +192,9 @@ struct lirc_scancode { | |||
| 186 | * @RC_PROTO_XMP: XMP protocol | 192 | * @RC_PROTO_XMP: XMP protocol |
| 187 | * @RC_PROTO_CEC: CEC protocol | 193 | * @RC_PROTO_CEC: CEC protocol |
| 188 | * @RC_PROTO_IMON: iMon Pad protocol | 194 | * @RC_PROTO_IMON: iMon Pad protocol |
| 195 | * @RC_PROTO_RCMM12: RC-MM protocol 12 bits | ||
| 196 | * @RC_PROTO_RCMM24: RC-MM protocol 24 bits | ||
| 197 | * @RC_PROTO_RCMM32: RC-MM protocol 32 bits | ||
| 189 | */ | 198 | */ |
| 190 | enum rc_proto { | 199 | enum rc_proto { |
| 191 | RC_PROTO_UNKNOWN = 0, | 200 | RC_PROTO_UNKNOWN = 0, |
| @@ -212,6 +221,9 @@ enum rc_proto { | |||
| 212 | RC_PROTO_XMP = 21, | 221 | RC_PROTO_XMP = 21, |
| 213 | RC_PROTO_CEC = 22, | 222 | RC_PROTO_CEC = 22, |
| 214 | RC_PROTO_IMON = 23, | 223 | RC_PROTO_IMON = 23, |
| 224 | RC_PROTO_RCMM12 = 24, | ||
| 225 | RC_PROTO_RCMM24 = 25, | ||
| 226 | RC_PROTO_RCMM32 = 26, | ||
| 215 | }; | 227 | }; |
| 216 | 228 | ||
| 217 | #endif | 229 | #endif |
diff --git a/tools/testing/selftests/ir/ir_loopback.c b/tools/testing/selftests/ir/ir_loopback.c index ff351bb7c163..e700e09e3682 100644 --- a/tools/testing/selftests/ir/ir_loopback.c +++ b/tools/testing/selftests/ir/ir_loopback.c | |||
| @@ -53,6 +53,10 @@ static const struct { | |||
| 53 | { RC_PROTO_RC6_6A_32, "rc-6-6a-32", 0xffffffff, "rc-6" }, | 53 | { RC_PROTO_RC6_6A_32, "rc-6-6a-32", 0xffffffff, "rc-6" }, |
| 54 | { RC_PROTO_RC6_MCE, "rc-6-mce", 0x00007fff, "rc-6" }, | 54 | { RC_PROTO_RC6_MCE, "rc-6-mce", 0x00007fff, "rc-6" }, |
| 55 | { RC_PROTO_SHARP, "sharp", 0x1fff, "sharp" }, | 55 | { RC_PROTO_SHARP, "sharp", 0x1fff, "sharp" }, |
| 56 | { RC_PROTO_IMON, "imon", 0x7fffffff, "imon" }, | ||
| 57 | { RC_PROTO_RCMM12, "rcmm-12", 0x00000fff, "rcmm" }, | ||
| 58 | { RC_PROTO_RCMM24, "rcmm-24", 0x00ffffff, "rcmm" }, | ||
| 59 | { RC_PROTO_RCMM32, "rcmm-32", 0xffffffff, "rcmm" }, | ||
| 56 | }; | 60 | }; |
| 57 | 61 | ||
| 58 | int lirc_open(const char *rc) | 62 | int lirc_open(const char *rc) |
| @@ -141,6 +145,11 @@ int main(int argc, char **argv) | |||
| 141 | (((scancode >> 8) ^ ~scancode) & 0xff) == 0) | 145 | (((scancode >> 8) ^ ~scancode) & 0xff) == 0) |
| 142 | continue; | 146 | continue; |
| 143 | 147 | ||
| 148 | if (rc_proto == RC_PROTO_RCMM32 && | ||
| 149 | (scancode & 0x000c0000) != 0x000c0000 && | ||
| 150 | scancode & 0x00008000) | ||
| 151 | continue; | ||
| 152 | |||
| 144 | struct lirc_scancode lsc = { | 153 | struct lirc_scancode lsc = { |
| 145 | .rc_proto = rc_proto, | 154 | .rc_proto = rc_proto, |
| 146 | .scancode = scancode | 155 | .scancode = scancode |