diff options
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/resources.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/resources.h b/drivers/net/ethernet/mellanox/mlxsw/resources.h index 3c2171dbdba4..bce8c2e00630 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/resources.h +++ b/drivers/net/ethernet/mellanox/mlxsw/resources.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/net/ethernet/mellanox/mlxsw/resources.h | 2 | * drivers/net/ethernet/mellanox/mlxsw/resources.h |
3 | * Copyright (c) 2016 Mellanox Technologies. All rights reserved. | 3 | * Copyright (c) 2016-2017 Mellanox Technologies. All rights reserved. |
4 | * Copyright (c) 2016 Jiri Pirko <jiri@mellanox.com> | 4 | * Copyright (c) 2016-2017 Jiri Pirko <jiri@mellanox.com> |
5 | * | 5 | * |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions are met: | 7 | * modification, are permitted provided that the following conditions are met: |
@@ -48,6 +48,14 @@ enum mlxsw_res_id { | |||
48 | MLXSW_RES_ID_MAX_LAG, | 48 | MLXSW_RES_ID_MAX_LAG, |
49 | MLXSW_RES_ID_MAX_LAG_MEMBERS, | 49 | MLXSW_RES_ID_MAX_LAG_MEMBERS, |
50 | MLXSW_RES_ID_MAX_BUFFER_SIZE, | 50 | MLXSW_RES_ID_MAX_BUFFER_SIZE, |
51 | MLXSW_RES_ID_ACL_MAX_TCAM_REGIONS, | ||
52 | MLXSW_RES_ID_ACL_MAX_TCAM_RULES, | ||
53 | MLXSW_RES_ID_ACL_MAX_REGIONS, | ||
54 | MLXSW_RES_ID_ACL_MAX_GROUPS, | ||
55 | MLXSW_RES_ID_ACL_MAX_GROUP_SIZE, | ||
56 | MLXSW_RES_ID_ACL_FLEX_KEYS, | ||
57 | MLXSW_RES_ID_ACL_MAX_ACTION_PER_RULE, | ||
58 | MLXSW_RES_ID_ACL_ACTIONS_PER_SET, | ||
51 | MLXSW_RES_ID_MAX_CPU_POLICERS, | 59 | MLXSW_RES_ID_MAX_CPU_POLICERS, |
52 | MLXSW_RES_ID_MAX_VRS, | 60 | MLXSW_RES_ID_MAX_VRS, |
53 | MLXSW_RES_ID_MAX_RIFS, | 61 | MLXSW_RES_ID_MAX_RIFS, |
@@ -72,6 +80,14 @@ static u16 mlxsw_res_ids[] = { | |||
72 | [MLXSW_RES_ID_MAX_LAG] = 0x2520, | 80 | [MLXSW_RES_ID_MAX_LAG] = 0x2520, |
73 | [MLXSW_RES_ID_MAX_LAG_MEMBERS] = 0x2521, | 81 | [MLXSW_RES_ID_MAX_LAG_MEMBERS] = 0x2521, |
74 | [MLXSW_RES_ID_MAX_BUFFER_SIZE] = 0x2802, /* Bytes */ | 82 | [MLXSW_RES_ID_MAX_BUFFER_SIZE] = 0x2802, /* Bytes */ |
83 | [MLXSW_RES_ID_ACL_MAX_TCAM_REGIONS] = 0x2901, | ||
84 | [MLXSW_RES_ID_ACL_MAX_TCAM_RULES] = 0x2902, | ||
85 | [MLXSW_RES_ID_ACL_MAX_REGIONS] = 0x2903, | ||
86 | [MLXSW_RES_ID_ACL_MAX_GROUPS] = 0x2904, | ||
87 | [MLXSW_RES_ID_ACL_MAX_GROUP_SIZE] = 0x2905, | ||
88 | [MLXSW_RES_ID_ACL_FLEX_KEYS] = 0x2910, | ||
89 | [MLXSW_RES_ID_ACL_MAX_ACTION_PER_RULE] = 0x2911, | ||
90 | [MLXSW_RES_ID_ACL_ACTIONS_PER_SET] = 0x2912, | ||
75 | [MLXSW_RES_ID_MAX_CPU_POLICERS] = 0x2A13, | 91 | [MLXSW_RES_ID_MAX_CPU_POLICERS] = 0x2A13, |
76 | [MLXSW_RES_ID_MAX_VRS] = 0x2C01, | 92 | [MLXSW_RES_ID_MAX_VRS] = 0x2C01, |
77 | [MLXSW_RES_ID_MAX_RIFS] = 0x2C02, | 93 | [MLXSW_RES_ID_MAX_RIFS] = 0x2C02, |