diff options
-rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index a53c2e79d9cb..676e6c2ba90a 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c | |||
@@ -6256,7 +6256,7 @@ static void si_parse_pplib_clock_info(struct radeon_device *rdev, | |||
6256 | if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && | 6256 | if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && |
6257 | index == 0) { | 6257 | index == 0) { |
6258 | /* XXX disable for A0 tahiti */ | 6258 | /* XXX disable for A0 tahiti */ |
6259 | si_pi->ulv.supported = true; | 6259 | si_pi->ulv.supported = false; |
6260 | si_pi->ulv.pl = *pl; | 6260 | si_pi->ulv.pl = *pl; |
6261 | si_pi->ulv.one_pcie_lane_in_ulv = false; | 6261 | si_pi->ulv.one_pcie_lane_in_ulv = false; |
6262 | si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT; | 6262 | si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT; |