diff options
| -rw-r--r-- | drivers/pwm/pwm-tegra.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c index 9c7f180b9f3a..c040f87ee144 100644 --- a/drivers/pwm/pwm-tegra.c +++ b/drivers/pwm/pwm-tegra.c | |||
| @@ -75,9 +75,8 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, | |||
| 75 | int duty_ns, int period_ns) | 75 | int duty_ns, int period_ns) |
| 76 | { | 76 | { |
| 77 | struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip); | 77 | struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip); |
| 78 | unsigned long long c = duty_ns; | 78 | unsigned long long c = duty_ns, hz; |
| 79 | unsigned long rate, hz; | 79 | unsigned long rate; |
| 80 | unsigned long long ns100 = NSEC_PER_SEC; | ||
| 81 | u32 val = 0; | 80 | u32 val = 0; |
| 82 | int err; | 81 | int err; |
| 83 | 82 | ||
| @@ -98,9 +97,8 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, | |||
| 98 | rate = clk_get_rate(pc->clk) >> PWM_DUTY_WIDTH; | 97 | rate = clk_get_rate(pc->clk) >> PWM_DUTY_WIDTH; |
| 99 | 98 | ||
| 100 | /* Consider precision in PWM_SCALE_WIDTH rate calculation */ | 99 | /* Consider precision in PWM_SCALE_WIDTH rate calculation */ |
| 101 | ns100 *= 100; | 100 | hz = DIV_ROUND_CLOSEST_ULL(100ULL * NSEC_PER_SEC, period_ns); |
| 102 | hz = DIV_ROUND_CLOSEST_ULL(ns100, period_ns); | 101 | rate = DIV_ROUND_CLOSEST_ULL(100ULL * rate, hz); |
| 103 | rate = DIV_ROUND_CLOSEST(rate * 100, hz); | ||
| 104 | 102 | ||
| 105 | /* | 103 | /* |
| 106 | * Since the actual PWM divider is the register's frequency divider | 104 | * Since the actual PWM divider is the register's frequency divider |