diff options
-rw-r--r-- | drivers/hwmon/pmbus/pmbus.h | 55 | ||||
-rw-r--r-- | drivers/hwmon/pmbus/pmbus_core.c | 28 |
2 files changed, 54 insertions, 29 deletions
diff --git a/drivers/hwmon/pmbus/pmbus.h b/drivers/hwmon/pmbus/pmbus.h index 0b17d4f20f81..3fe03dc47eb7 100644 --- a/drivers/hwmon/pmbus/pmbus.h +++ b/drivers/hwmon/pmbus/pmbus.h | |||
@@ -146,31 +146,36 @@ | |||
146 | * code when reading or writing virtual registers. | 146 | * code when reading or writing virtual registers. |
147 | */ | 147 | */ |
148 | #define PMBUS_VIRT_BASE 0x100 | 148 | #define PMBUS_VIRT_BASE 0x100 |
149 | #define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 0) | 149 | #define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0) |
150 | #define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 1) | 150 | #define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1) |
151 | #define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 2) | 151 | #define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2) |
152 | #define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 3) | 152 | #define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3) |
153 | #define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 4) | 153 | #define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4) |
154 | #define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 5) | 154 | #define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5) |
155 | #define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 6) | 155 | #define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6) |
156 | #define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 7) | 156 | #define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7) |
157 | #define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 8) | 157 | #define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8) |
158 | #define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 9) | 158 | #define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9) |
159 | #define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 10) | 159 | #define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10) |
160 | #define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 11) | 160 | #define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11) |
161 | #define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 12) | 161 | #define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12) |
162 | #define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 13) | 162 | #define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 13) |
163 | #define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 14) | 163 | #define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 14) |
164 | #define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 15) | 164 | #define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 15) |
165 | #define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 16) | 165 | #define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 16) |
166 | #define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 17) | 166 | #define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 17) |
167 | #define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 18) | 167 | #define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 18) |
168 | #define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 19) | 168 | #define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 19) |
169 | #define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 20) | 169 | #define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 20) |
170 | #define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 21) | 170 | #define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 21) |
171 | #define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 22) | 171 | #define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 22) |
172 | #define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 23) | 172 | #define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 23) |
173 | #define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 24) | 173 | #define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 24) |
174 | #define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 25) | ||
175 | #define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 26) | ||
176 | #define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 27) | ||
177 | #define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 28) | ||
178 | #define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 29) | ||
174 | 179 | ||
175 | /* | 180 | /* |
176 | * CAPABILITY | 181 | * CAPABILITY |
diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index aada0c67a911..be51037363c8 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c | |||
@@ -40,11 +40,14 @@ | |||
40 | #define PMBUS_IOUT_SENSORS_PER_PAGE 8 /* input, min, max, crit, | 40 | #define PMBUS_IOUT_SENSORS_PER_PAGE 8 /* input, min, max, crit, |
41 | lowest, highest, avg, | 41 | lowest, highest, avg, |
42 | reset */ | 42 | reset */ |
43 | #define PMBUS_POUT_SENSORS_PER_PAGE 4 /* input, cap, max, crit */ | 43 | #define PMBUS_POUT_SENSORS_PER_PAGE 7 /* input, cap, max, crit, |
44 | * highest, avg, reset | ||
45 | */ | ||
44 | #define PMBUS_MAX_SENSORS_PER_FAN 1 /* input */ | 46 | #define PMBUS_MAX_SENSORS_PER_FAN 1 /* input */ |
45 | #define PMBUS_MAX_SENSORS_PER_TEMP 8 /* input, min, max, lcrit, | 47 | #define PMBUS_MAX_SENSORS_PER_TEMP 9 /* input, min, max, lcrit, |
46 | crit, lowest, highest, | 48 | * crit, lowest, highest, avg, |
47 | reset */ | 49 | * reset |
50 | */ | ||
48 | 51 | ||
49 | #define PMBUS_MAX_INPUT_BOOLEANS 7 /* v: min_alarm, max_alarm, | 52 | #define PMBUS_MAX_INPUT_BOOLEANS 7 /* v: min_alarm, max_alarm, |
50 | lcrit_alarm, crit_alarm; | 53 | lcrit_alarm, crit_alarm; |
@@ -1334,6 +1337,17 @@ static const struct pmbus_limit_attr pout_limit_attrs[] = { | |||
1334 | .attr = "crit", | 1337 | .attr = "crit", |
1335 | .alarm = "crit_alarm", | 1338 | .alarm = "crit_alarm", |
1336 | .sbit = PB_POUT_OP_FAULT, | 1339 | .sbit = PB_POUT_OP_FAULT, |
1340 | }, { | ||
1341 | .reg = PMBUS_VIRT_READ_POUT_AVG, | ||
1342 | .update = true, | ||
1343 | .attr = "average", | ||
1344 | }, { | ||
1345 | .reg = PMBUS_VIRT_READ_POUT_MAX, | ||
1346 | .update = true, | ||
1347 | .attr = "input_highest", | ||
1348 | }, { | ||
1349 | .reg = PMBUS_VIRT_RESET_POUT_HISTORY, | ||
1350 | .attr = "reset_history", | ||
1337 | } | 1351 | } |
1338 | }; | 1352 | }; |
1339 | 1353 | ||
@@ -1389,6 +1403,9 @@ static const struct pmbus_limit_attr temp_limit_attrs[] = { | |||
1389 | .reg = PMBUS_VIRT_READ_TEMP_MIN, | 1403 | .reg = PMBUS_VIRT_READ_TEMP_MIN, |
1390 | .attr = "lowest", | 1404 | .attr = "lowest", |
1391 | }, { | 1405 | }, { |
1406 | .reg = PMBUS_VIRT_READ_TEMP_AVG, | ||
1407 | .attr = "average", | ||
1408 | }, { | ||
1392 | .reg = PMBUS_VIRT_READ_TEMP_MAX, | 1409 | .reg = PMBUS_VIRT_READ_TEMP_MAX, |
1393 | .attr = "highest", | 1410 | .attr = "highest", |
1394 | }, { | 1411 | }, { |
@@ -1424,6 +1441,9 @@ static const struct pmbus_limit_attr temp_limit_attrs2[] = { | |||
1424 | .reg = PMBUS_VIRT_READ_TEMP2_MIN, | 1441 | .reg = PMBUS_VIRT_READ_TEMP2_MIN, |
1425 | .attr = "lowest", | 1442 | .attr = "lowest", |
1426 | }, { | 1443 | }, { |
1444 | .reg = PMBUS_VIRT_READ_TEMP2_AVG, | ||
1445 | .attr = "average", | ||
1446 | }, { | ||
1427 | .reg = PMBUS_VIRT_READ_TEMP2_MAX, | 1447 | .reg = PMBUS_VIRT_READ_TEMP2_MAX, |
1428 | .attr = "highest", | 1448 | .attr = "highest", |
1429 | }, { | 1449 | }, { |