diff options
-rw-r--r-- | drivers/tty/serial/max310x.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index 2255300404bd..36943f6c198c 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c | |||
@@ -1030,6 +1030,22 @@ static int max310x_startup(struct uart_port *port) | |||
1030 | max310x_port_update(port, MAX310X_MODE2_REG, | 1030 | max310x_port_update(port, MAX310X_MODE2_REG, |
1031 | MAX310X_MODE2_FIFORST_BIT, 0); | 1031 | MAX310X_MODE2_FIFORST_BIT, 0); |
1032 | 1032 | ||
1033 | /* Configure mode1/mode2 to have rs485/rs232 enabled at startup */ | ||
1034 | val = (clamp(port->rs485.delay_rts_before_send, 0U, 15U) << 4) | | ||
1035 | clamp(port->rs485.delay_rts_after_send, 0U, 15U); | ||
1036 | max310x_port_write(port, MAX310X_HDPIXDELAY_REG, val); | ||
1037 | |||
1038 | if (port->rs485.flags & SER_RS485_ENABLED) { | ||
1039 | max310x_port_update(port, MAX310X_MODE1_REG, | ||
1040 | MAX310X_MODE1_TRNSCVCTRL_BIT, | ||
1041 | MAX310X_MODE1_TRNSCVCTRL_BIT); | ||
1042 | |||
1043 | if (!(port->rs485.flags & SER_RS485_RX_DURING_TX)) | ||
1044 | max310x_port_update(port, MAX310X_MODE2_REG, | ||
1045 | MAX310X_MODE2_ECHOSUPR_BIT, | ||
1046 | MAX310X_MODE2_ECHOSUPR_BIT); | ||
1047 | } | ||
1048 | |||
1033 | /* Configure flow control levels */ | 1049 | /* Configure flow control levels */ |
1034 | /* Flow control halt level 96, resume level 48 */ | 1050 | /* Flow control halt level 96, resume level 48 */ |
1035 | max310x_port_write(port, MAX310X_FLOWLVL_REG, | 1051 | max310x_port_write(port, MAX310X_FLOWLVL_REG, |