diff options
226 files changed, 8 insertions, 27045 deletions
@@ -1034,6 +1034,10 @@ S: 2037 Walnut #6 | |||
1034 | S: Boulder, Colorado 80302 | 1034 | S: Boulder, Colorado 80302 |
1035 | S: USA | 1035 | S: USA |
1036 | 1036 | ||
1037 | N: Hans-Christian Noren Egtvedt | ||
1038 | E: egtvedt@samfundet.no | ||
1039 | D: AVR32 architecture maintainer. | ||
1040 | |||
1037 | N: Heiko Eißfeldt | 1041 | N: Heiko Eißfeldt |
1038 | E: heiko@colossus.escape.de heiko@unifix.de | 1042 | E: heiko@colossus.escape.de heiko@unifix.de |
1039 | D: verify_area stuff, generic SCSI fixes | 1043 | D: verify_area stuff, generic SCSI fixes |
@@ -3398,6 +3402,10 @@ S: Suite 101 | |||
3398 | S: Markham, Ontario L3R 2Z6 | 3402 | S: Markham, Ontario L3R 2Z6 |
3399 | S: Canada | 3403 | S: Canada |
3400 | 3404 | ||
3405 | N: Haavard Skinnemoen | ||
3406 | M: Haavard Skinnemoen <hskinnemoen@gmail.com> | ||
3407 | D: AVR32 architecture port to Linux and maintainer. | ||
3408 | |||
3401 | N: Rick Sladkey | 3409 | N: Rick Sladkey |
3402 | E: jrs@world.std.com | 3410 | E: jrs@world.std.com |
3403 | D: utility hacker: Emacs, NFS server, mount, kmem-ps, UPS debugger, strace, GDB | 3411 | D: utility hacker: Emacs, NFS server, mount, kmem-ps, UPS debugger, strace, GDB |
diff --git a/MAINTAINERS b/MAINTAINERS index 38d3e4ed7208..91c5fdbe5674 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -2327,21 +2327,6 @@ S: Maintained | |||
2327 | F: drivers/auxdisplay/ | 2327 | F: drivers/auxdisplay/ |
2328 | F: include/linux/cfag12864b.h | 2328 | F: include/linux/cfag12864b.h |
2329 | 2329 | ||
2330 | AVR32 ARCHITECTURE | ||
2331 | M: Haavard Skinnemoen <hskinnemoen@gmail.com> | ||
2332 | M: Hans-Christian Egtvedt <egtvedt@samfundet.no> | ||
2333 | W: http://www.atmel.com/products/AVR32/ | ||
2334 | W: http://mirror.egtvedt.no/avr32linux.org/ | ||
2335 | W: http://avrfreaks.net/ | ||
2336 | S: Maintained | ||
2337 | F: arch/avr32/ | ||
2338 | |||
2339 | AVR32/AT32AP MACHINE SUPPORT | ||
2340 | M: Haavard Skinnemoen <hskinnemoen@gmail.com> | ||
2341 | M: Hans-Christian Egtvedt <egtvedt@samfundet.no> | ||
2342 | S: Maintained | ||
2343 | F: arch/avr32/mach-at32ap/ | ||
2344 | |||
2345 | AX.25 NETWORK LAYER | 2330 | AX.25 NETWORK LAYER |
2346 | M: Ralf Baechle <ralf@linux-mips.org> | 2331 | M: Ralf Baechle <ralf@linux-mips.org> |
2347 | L: linux-hams@vger.kernel.org | 2332 | L: linux-hams@vger.kernel.org |
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig deleted file mode 100644 index 7e75d45e20cd..000000000000 --- a/arch/avr32/Kconfig +++ /dev/null | |||
@@ -1,288 +0,0 @@ | |||
1 | config AVR32 | ||
2 | def_bool y | ||
3 | # With EXPERT=n, we get lots of stuff automatically selected | ||
4 | # that we usually don't need on AVR32. | ||
5 | select EXPERT | ||
6 | select HAVE_CLK | ||
7 | select HAVE_EXIT_THREAD | ||
8 | select HAVE_OPROFILE | ||
9 | select HAVE_KPROBES | ||
10 | select VIRT_TO_BUS | ||
11 | select GENERIC_IRQ_PROBE | ||
12 | select GENERIC_ATOMIC64 | ||
13 | select HARDIRQS_SW_RESEND | ||
14 | select GENERIC_IRQ_SHOW | ||
15 | select ARCH_HAVE_CUSTOM_GPIO_H | ||
16 | select ARCH_WANT_IPC_PARSE_VERSION | ||
17 | select ARCH_HAVE_NMI_SAFE_CMPXCHG | ||
18 | select GENERIC_CLOCKEVENTS | ||
19 | select HAVE_MOD_ARCH_SPECIFIC | ||
20 | select MODULES_USE_ELF_RELA | ||
21 | select HAVE_NMI | ||
22 | help | ||
23 | AVR32 is a high-performance 32-bit RISC microprocessor core, | ||
24 | designed for cost-sensitive embedded applications, with particular | ||
25 | emphasis on low power consumption and high code density. | ||
26 | |||
27 | There is an AVR32 Linux project with a web page at | ||
28 | http://avr32linux.org/. | ||
29 | |||
30 | config STACKTRACE_SUPPORT | ||
31 | def_bool y | ||
32 | |||
33 | config LOCKDEP_SUPPORT | ||
34 | def_bool y | ||
35 | |||
36 | config TRACE_IRQFLAGS_SUPPORT | ||
37 | def_bool y | ||
38 | |||
39 | config RWSEM_GENERIC_SPINLOCK | ||
40 | def_bool y | ||
41 | |||
42 | config RWSEM_XCHGADD_ALGORITHM | ||
43 | def_bool n | ||
44 | |||
45 | config ARCH_HAS_ILOG2_U32 | ||
46 | def_bool n | ||
47 | |||
48 | config ARCH_HAS_ILOG2_U64 | ||
49 | def_bool n | ||
50 | |||
51 | config GENERIC_HWEIGHT | ||
52 | def_bool y | ||
53 | |||
54 | config GENERIC_CALIBRATE_DELAY | ||
55 | def_bool y | ||
56 | |||
57 | config GENERIC_BUG | ||
58 | def_bool y | ||
59 | depends on BUG | ||
60 | |||
61 | source "init/Kconfig" | ||
62 | |||
63 | source "kernel/Kconfig.freezer" | ||
64 | |||
65 | menu "System Type and features" | ||
66 | |||
67 | config SUBARCH_AVR32B | ||
68 | bool | ||
69 | config MMU | ||
70 | bool | ||
71 | config PERFORMANCE_COUNTERS | ||
72 | bool | ||
73 | |||
74 | config PLATFORM_AT32AP | ||
75 | bool | ||
76 | select SUBARCH_AVR32B | ||
77 | select MMU | ||
78 | select PERFORMANCE_COUNTERS | ||
79 | select GPIOLIB | ||
80 | select GENERIC_ALLOCATOR | ||
81 | select HAVE_FB_ATMEL | ||
82 | |||
83 | # | ||
84 | # CPU types | ||
85 | # | ||
86 | |||
87 | # AP7000 derivatives | ||
88 | config CPU_AT32AP700X | ||
89 | bool | ||
90 | select PLATFORM_AT32AP | ||
91 | config CPU_AT32AP7000 | ||
92 | bool | ||
93 | select CPU_AT32AP700X | ||
94 | config CPU_AT32AP7001 | ||
95 | bool | ||
96 | select CPU_AT32AP700X | ||
97 | config CPU_AT32AP7002 | ||
98 | bool | ||
99 | select CPU_AT32AP700X | ||
100 | |||
101 | # AP700X boards | ||
102 | config BOARD_ATNGW100_COMMON | ||
103 | bool | ||
104 | select CPU_AT32AP7000 | ||
105 | |||
106 | choice | ||
107 | prompt "AVR32 board type" | ||
108 | default BOARD_ATSTK1000 | ||
109 | |||
110 | config BOARD_ATSTK1000 | ||
111 | bool "ATSTK1000 evaluation board" | ||
112 | |||
113 | config BOARD_ATNGW100_MKI | ||
114 | bool "ATNGW100 Network Gateway" | ||
115 | select BOARD_ATNGW100_COMMON | ||
116 | |||
117 | config BOARD_ATNGW100_MKII | ||
118 | bool "ATNGW100 mkII Network Gateway" | ||
119 | select BOARD_ATNGW100_COMMON | ||
120 | |||
121 | config BOARD_HAMMERHEAD | ||
122 | bool "Hammerhead board" | ||
123 | select CPU_AT32AP7000 | ||
124 | select USB_ARCH_HAS_HCD | ||
125 | help | ||
126 | The Hammerhead platform is built around an AVR32 32-bit microcontroller from Atmel. | ||
127 | It offers versatile peripherals, such as ethernet, usb device, usb host etc. | ||
128 | |||
129 | The board also incorporates a power supply and is a Power over Ethernet (PoE) Powered | ||
130 | Device (PD). | ||
131 | |||
132 | Additionally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is | ||
133 | mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which | ||
134 | will cover even the most exceptional need of memory bandwidth. Together with the onboard | ||
135 | video decoder the board is ready for video processing. | ||
136 | |||
137 | For more information see: http://www.miromico.ch/index.php/hammerhead.html | ||
138 | |||
139 | config BOARD_FAVR_32 | ||
140 | bool "Favr-32 LCD-board" | ||
141 | select CPU_AT32AP7000 | ||
142 | |||
143 | config BOARD_MERISC | ||
144 | bool "Merisc board" | ||
145 | select CPU_AT32AP7000 | ||
146 | help | ||
147 | Merisc is the family name for a range of AVR32-based boards. | ||
148 | |||
149 | The boards are designed to be used in a man-machine | ||
150 | interfacing environment, utilizing a touch-based graphical | ||
151 | user interface. They host a vast range of I/O peripherals as | ||
152 | well as a large SDRAM & Flash memory bank. | ||
153 | |||
154 | For more information see: http://www.martinsson.se/merisc | ||
155 | |||
156 | config BOARD_MIMC200 | ||
157 | bool "MIMC200 CPU board" | ||
158 | select CPU_AT32AP7000 | ||
159 | endchoice | ||
160 | |||
161 | source "arch/avr32/boards/atstk1000/Kconfig" | ||
162 | source "arch/avr32/boards/atngw100/Kconfig" | ||
163 | source "arch/avr32/boards/hammerhead/Kconfig" | ||
164 | source "arch/avr32/boards/favr-32/Kconfig" | ||
165 | source "arch/avr32/boards/merisc/Kconfig" | ||
166 | |||
167 | choice | ||
168 | prompt "Boot loader type" | ||
169 | default LOADER_U_BOOT | ||
170 | |||
171 | config LOADER_U_BOOT | ||
172 | bool "U-Boot (or similar) bootloader" | ||
173 | endchoice | ||
174 | |||
175 | source "arch/avr32/mach-at32ap/Kconfig" | ||
176 | |||
177 | config LOAD_ADDRESS | ||
178 | hex | ||
179 | default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y | ||
180 | |||
181 | config ENTRY_ADDRESS | ||
182 | hex | ||
183 | default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y | ||
184 | |||
185 | config PHYS_OFFSET | ||
186 | hex | ||
187 | default 0x10000000 if CPU_AT32AP700X=y | ||
188 | |||
189 | source "kernel/Kconfig.preempt" | ||
190 | |||
191 | config QUICKLIST | ||
192 | def_bool y | ||
193 | |||
194 | config ARCH_HAVE_MEMORY_PRESENT | ||
195 | def_bool n | ||
196 | |||
197 | config NEED_NODE_MEMMAP_SIZE | ||
198 | def_bool n | ||
199 | |||
200 | config ARCH_FLATMEM_ENABLE | ||
201 | def_bool y | ||
202 | |||
203 | config ARCH_DISCONTIGMEM_ENABLE | ||
204 | def_bool n | ||
205 | |||
206 | config ARCH_SPARSEMEM_ENABLE | ||
207 | def_bool n | ||
208 | |||
209 | config NODES_SHIFT | ||
210 | int | ||
211 | default "2" | ||
212 | depends on NEED_MULTIPLE_NODES | ||
213 | |||
214 | source "mm/Kconfig" | ||
215 | |||
216 | config OWNERSHIP_TRACE | ||
217 | bool "Ownership trace support" | ||
218 | default y | ||
219 | help | ||
220 | Say Y to generate an Ownership Trace message on every context switch, | ||
221 | enabling Nexus-compliant debuggers to keep track of the PID of the | ||
222 | currently executing task. | ||
223 | |||
224 | config NMI_DEBUGGING | ||
225 | bool "NMI Debugging" | ||
226 | default n | ||
227 | help | ||
228 | Say Y here and pass the nmi_debug command-line parameter to | ||
229 | the kernel to turn on NMI debugging. Depending on the value | ||
230 | of the nmi_debug option, various pieces of information will | ||
231 | be dumped to the console when a Non-Maskable Interrupt | ||
232 | happens. | ||
233 | |||
234 | # FPU emulation goes here | ||
235 | |||
236 | source "kernel/Kconfig.hz" | ||
237 | |||
238 | config CMDLINE | ||
239 | string "Default kernel command line" | ||
240 | default "" | ||
241 | help | ||
242 | If you don't have a boot loader capable of passing a command line string | ||
243 | to the kernel, you may specify one here. As a minimum, you should specify | ||
244 | the memory size and the root device (e.g., mem=8M, root=/dev/nfs). | ||
245 | |||
246 | endmenu | ||
247 | |||
248 | menu "Power management options" | ||
249 | |||
250 | source "kernel/power/Kconfig" | ||
251 | |||
252 | config ARCH_SUSPEND_POSSIBLE | ||
253 | def_bool y | ||
254 | |||
255 | menu "CPU Frequency scaling" | ||
256 | source "drivers/cpufreq/Kconfig" | ||
257 | endmenu | ||
258 | |||
259 | endmenu | ||
260 | |||
261 | menu "Bus options" | ||
262 | |||
263 | config PCI | ||
264 | bool | ||
265 | |||
266 | source "drivers/pci/Kconfig" | ||
267 | |||
268 | source "drivers/pcmcia/Kconfig" | ||
269 | |||
270 | endmenu | ||
271 | |||
272 | menu "Executable file formats" | ||
273 | source "fs/Kconfig.binfmt" | ||
274 | endmenu | ||
275 | |||
276 | source "net/Kconfig" | ||
277 | |||
278 | source "drivers/Kconfig" | ||
279 | |||
280 | source "fs/Kconfig" | ||
281 | |||
282 | source "arch/avr32/Kconfig.debug" | ||
283 | |||
284 | source "security/Kconfig" | ||
285 | |||
286 | source "crypto/Kconfig" | ||
287 | |||
288 | source "lib/Kconfig" | ||
diff --git a/arch/avr32/Kconfig.debug b/arch/avr32/Kconfig.debug deleted file mode 100644 index 2283933a9a93..000000000000 --- a/arch/avr32/Kconfig.debug +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | menu "Kernel hacking" | ||
2 | |||
3 | config TRACE_IRQFLAGS_SUPPORT | ||
4 | bool | ||
5 | default y | ||
6 | |||
7 | source "lib/Kconfig.debug" | ||
8 | |||
9 | endmenu | ||
diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile deleted file mode 100644 index dba48a5d5bb9..000000000000 --- a/arch/avr32/Makefile +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | # | ||
2 | # This file is subject to the terms and conditions of the GNU General Public | ||
3 | # License. See the file "COPYING" in the main directory of this archive | ||
4 | # for more details. | ||
5 | # | ||
6 | # Copyright (C) 2004-2006 Atmel Corporation. | ||
7 | |||
8 | # Default target when executing plain make | ||
9 | .PHONY: all | ||
10 | all: uImage vmlinux.elf | ||
11 | |||
12 | KBUILD_DEFCONFIG := atstk1002_defconfig | ||
13 | |||
14 | KBUILD_CFLAGS += -pipe -fno-builtin -mno-pic -D__linux__ | ||
15 | KBUILD_AFLAGS += -mrelax -mno-pic | ||
16 | KBUILD_CFLAGS_MODULE += -mno-relax | ||
17 | LDFLAGS_vmlinux += --relax | ||
18 | |||
19 | cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap | ||
20 | |||
21 | KBUILD_CFLAGS += $(cpuflags-y) | ||
22 | KBUILD_AFLAGS += $(cpuflags-y) | ||
23 | |||
24 | CHECKFLAGS += -D__avr32__ -D__BIG_ENDIAN | ||
25 | |||
26 | machine-$(CONFIG_PLATFORM_AT32AP) := at32ap | ||
27 | machdirs := $(patsubst %,arch/avr32/mach-%/, $(machine-y)) | ||
28 | |||
29 | KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs)) | ||
30 | |||
31 | head-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/head.o | ||
32 | head-y += arch/avr32/kernel/head.o | ||
33 | core-y += $(machdirs) | ||
34 | core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/ | ||
35 | core-$(CONFIG_BOARD_ATNGW100_COMMON) += arch/avr32/boards/atngw100/ | ||
36 | core-$(CONFIG_BOARD_HAMMERHEAD) += arch/avr32/boards/hammerhead/ | ||
37 | core-$(CONFIG_BOARD_FAVR_32) += arch/avr32/boards/favr-32/ | ||
38 | core-$(CONFIG_BOARD_MERISC) += arch/avr32/boards/merisc/ | ||
39 | core-$(CONFIG_BOARD_MIMC200) += arch/avr32/boards/mimc200/ | ||
40 | core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ | ||
41 | core-y += arch/avr32/kernel/ | ||
42 | core-y += arch/avr32/mm/ | ||
43 | drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/ | ||
44 | libs-y += arch/avr32/lib/ | ||
45 | |||
46 | BOOT_TARGETS := vmlinux.elf vmlinux.bin uImage uImage.srec | ||
47 | |||
48 | .PHONY: $(BOOT_TARGETS) install | ||
49 | |||
50 | boot := arch/$(ARCH)/boot/images | ||
51 | |||
52 | KBUILD_IMAGE := $(boot)/uImage | ||
53 | vmlinux.elf: KBUILD_IMAGE := $(boot)/vmlinux.elf | ||
54 | vmlinux.cso: KBUILD_IMAGE := $(boot)/vmlinux.cso | ||
55 | uImage.srec: KBUILD_IMAGE := $(boot)/uImage.srec | ||
56 | uImage: KBUILD_IMAGE := $(boot)/uImage | ||
57 | |||
58 | quiet_cmd_listing = LST $@ | ||
59 | cmd_listing = avr32-linux-objdump $(OBJDUMPFLAGS) -lS $< > $@ | ||
60 | quiet_cmd_disasm = DIS $@ | ||
61 | cmd_disasm = avr32-linux-objdump $(OBJDUMPFLAGS) -d $< > $@ | ||
62 | |||
63 | vmlinux.elf vmlinux.bin uImage.srec uImage vmlinux.cso: vmlinux | ||
64 | $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ | ||
65 | |||
66 | install: vmlinux | ||
67 | $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) $@ | ||
68 | |||
69 | vmlinux.s: vmlinux | ||
70 | $(call if_changed,disasm) | ||
71 | |||
72 | vmlinux.lst: vmlinux | ||
73 | $(call if_changed,listing) | ||
74 | |||
75 | CLEAN_FILES += vmlinux.s vmlinux.lst | ||
76 | |||
77 | archclean: | ||
78 | $(Q)$(MAKE) $(clean)=$(boot) | ||
79 | |||
80 | define archhelp | ||
81 | @echo '* vmlinux.elf - ELF image with load address 0' | ||
82 | @echo ' vmlinux.cso - PathFinder CSO image' | ||
83 | @echo '* uImage - Create a bootable image for U-Boot' | ||
84 | endef | ||
diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig deleted file mode 100644 index 4e55617ade2d..000000000000 --- a/arch/avr32/boards/atngw100/Kconfig +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | # NGW100 customization | ||
2 | |||
3 | if BOARD_ATNGW100_COMMON | ||
4 | |||
5 | config BOARD_ATNGW100_MKII_LCD | ||
6 | bool "Enable ATNGW100 mkII LCD interface" | ||
7 | depends on BOARD_ATNGW100_MKII | ||
8 | help | ||
9 | This enables the LCD controller (LCDC) in the AT32AP7000. Since the | ||
10 | LCDC is multiplexed with MACB1 (LAN) Ethernet port, only one can be | ||
11 | enabled at a time. | ||
12 | |||
13 | This choice enables the LCDC and disables the MACB1 interface marked | ||
14 | LAN on the PCB. | ||
15 | |||
16 | choice | ||
17 | prompt "Select an NGW100 add-on board to support" | ||
18 | default BOARD_ATNGW100_ADDON_NONE | ||
19 | |||
20 | config BOARD_ATNGW100_ADDON_NONE | ||
21 | bool "None" | ||
22 | |||
23 | config BOARD_ATNGW100_EVKLCD10X | ||
24 | bool "EVKLCD10X addon board" | ||
25 | depends on BOARD_ATNGW100_MKI || BOARD_ATNGW100_MKII_LCD | ||
26 | help | ||
27 | This enables support for the EVKLCD100 (QVGA) or EVKLCD101 (VGA) | ||
28 | addon board for the NGW100 and NGW100 mkII. By enabling this the LCD | ||
29 | controller and AC97 controller is added as platform devices. | ||
30 | |||
31 | config BOARD_ATNGW100_MRMT | ||
32 | bool "Mediama RMT1/2 add-on board" | ||
33 | help | ||
34 | This enables support for the Mediama RMT1 or RMT2 board. | ||
35 | RMT provides LCD support, AC97 codec and other | ||
36 | optional peripherals to the Atmel NGW100. | ||
37 | |||
38 | This choice disables the detect pin and the write-protect pin for the | ||
39 | MCI platform device, since it conflicts with the LCD platform device. | ||
40 | The MCI pins can be reenabled by editing the "add device function" but | ||
41 | this may break the setup for other displays that use these pins. | ||
42 | |||
43 | endchoice | ||
44 | |||
45 | choice | ||
46 | prompt "LCD panel resolution on EVKLCD10X" | ||
47 | depends on BOARD_ATNGW100_EVKLCD10X | ||
48 | default BOARD_ATNGW100_EVKLCD10X_VGA | ||
49 | |||
50 | config BOARD_ATNGW100_EVKLCD10X_QVGA | ||
51 | bool "QVGA (320x240)" | ||
52 | |||
53 | config BOARD_ATNGW100_EVKLCD10X_VGA | ||
54 | bool "VGA (640x480)" | ||
55 | |||
56 | config BOARD_ATNGW100_EVKLCD10X_POW_QVGA | ||
57 | bool "Powertip QVGA (320x240)" | ||
58 | |||
59 | endchoice | ||
60 | |||
61 | if BOARD_ATNGW100_MRMT | ||
62 | source "arch/avr32/boards/atngw100/Kconfig_mrmt" | ||
63 | endif | ||
64 | |||
65 | endif # BOARD_ATNGW100_COMMON | ||
diff --git a/arch/avr32/boards/atngw100/Kconfig_mrmt b/arch/avr32/boards/atngw100/Kconfig_mrmt deleted file mode 100644 index 9a199a207f3c..000000000000 --- a/arch/avr32/boards/atngw100/Kconfig_mrmt +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | # RMT for NGW100 customization | ||
2 | |||
3 | choice | ||
4 | prompt "RMT Version" | ||
5 | help | ||
6 | Select the RMTx board version. | ||
7 | |||
8 | config BOARD_MRMT_REV1 | ||
9 | bool "RMT1" | ||
10 | config BOARD_MRMT_REV2 | ||
11 | bool "RMT2" | ||
12 | |||
13 | endchoice | ||
14 | |||
15 | config BOARD_MRMT_AC97 | ||
16 | bool "Enable AC97 CODEC" | ||
17 | help | ||
18 | Enable the UCB1400 AC97 CODEC driver. | ||
19 | |||
20 | choice | ||
21 | prompt "Touchscreen Driver" | ||
22 | default BOARD_MRMT_ADS7846_TS | ||
23 | |||
24 | config BOARD_MRMT_UCB1400_TS | ||
25 | bool "Use UCB1400 Touchscreen" | ||
26 | |||
27 | config BOARD_MRMT_ADS7846_TS | ||
28 | bool "Use ADS7846 Touchscreen" | ||
29 | |||
30 | endchoice | ||
31 | |||
32 | choice | ||
33 | prompt "RMTx LCD Selection" | ||
34 | default BOARD_MRMT_LCD_DISABLE | ||
35 | |||
36 | config BOARD_MRMT_LCD_DISABLE | ||
37 | bool "LCD Disabled" | ||
38 | |||
39 | config BOARD_MRMT_LCD_LQ043T3DX0X | ||
40 | bool "Sharp LQ043T3DX0x or compatible" | ||
41 | help | ||
42 | If using RMT2, be sure to load the resistor pack selectors accordingly | ||
43 | |||
44 | if BOARD_MRMT_REV2 | ||
45 | config BOARD_MRMT_LCD_KWH043GM08 | ||
46 | bool "Formike KWH043GM08 or compatible" | ||
47 | help | ||
48 | Be sure to load the RMT2 resistor pack selectors accordingly | ||
49 | endif | ||
50 | |||
51 | endchoice | ||
52 | |||
53 | if !BOARD_MRMT_LCD_DISABLE | ||
54 | config BOARD_MRMT_BL_PWM | ||
55 | bool "Use PWM control for LCD Backlight" | ||
56 | help | ||
57 | Use PWM driver for controlling LCD Backlight. | ||
58 | Otherwise, LCD Backlight is always on. | ||
59 | endif | ||
60 | |||
61 | config BOARD_MRMT_RTC_I2C | ||
62 | bool "Use External RTC on I2C Bus" | ||
63 | help | ||
64 | RMT1 has an optional RTC device on the I2C bus. | ||
65 | It is a SII S35390A. Be sure to select the | ||
66 | matching RTC driver. | ||
67 | |||
68 | choice | ||
69 | prompt "Wireless Module on ttyS2" | ||
70 | default BOARD_MRMT_WIRELESS_ZB | ||
71 | |||
72 | config BOARD_MRMT_WIRELESS_ZB | ||
73 | bool "Use ZigBee/802.15.4 Module" | ||
74 | |||
75 | config BOARD_MRMT_WIRELESS_BT | ||
76 | bool "Use Bluetooth (HCI) Module" | ||
77 | |||
78 | config BOARD_MRMT_WIRELESS_NONE | ||
79 | bool "Not Installed" | ||
80 | endchoice | ||
diff --git a/arch/avr32/boards/atngw100/Makefile b/arch/avr32/boards/atngw100/Makefile deleted file mode 100644 index f4ebe42a8254..000000000000 --- a/arch/avr32/boards/atngw100/Makefile +++ /dev/null | |||
@@ -1,3 +0,0 @@ | |||
1 | obj-y += setup.o flash.o | ||
2 | obj-$(CONFIG_BOARD_ATNGW100_EVKLCD10X) += evklcd10x.o | ||
3 | obj-$(CONFIG_BOARD_ATNGW100_MRMT) += mrmt.o | ||
diff --git a/arch/avr32/boards/atngw100/evklcd10x.c b/arch/avr32/boards/atngw100/evklcd10x.c deleted file mode 100644 index 64919b0da7aa..000000000000 --- a/arch/avr32/boards/atngw100/evklcd10x.c +++ /dev/null | |||
@@ -1,178 +0,0 @@ | |||
1 | /* | ||
2 | * Board-specific setup code for the ATEVKLCD10X addon board to the ATNGW100 | ||
3 | * Network Gateway | ||
4 | * | ||
5 | * Copyright (C) 2008 Atmel Corporation | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/linkage.h> | ||
14 | #include <linux/gpio.h> | ||
15 | #include <linux/fb.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <video/atmel_lcdc.h> | ||
19 | |||
20 | #include <asm/setup.h> | ||
21 | |||
22 | #include <mach/at32ap700x.h> | ||
23 | #include <mach/portmux.h> | ||
24 | #include <mach/board.h> | ||
25 | |||
26 | #include <sound/atmel-ac97c.h> | ||
27 | |||
28 | static struct ac97c_platform_data __initdata ac97c0_data = { | ||
29 | .reset_pin = GPIO_PIN_PB(19), | ||
30 | }; | ||
31 | |||
32 | #ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA | ||
33 | static struct fb_videomode __initdata tcg057vglad_modes[] = { | ||
34 | { | ||
35 | .name = "640x480 @ 50", | ||
36 | .refresh = 50, | ||
37 | .xres = 640, .yres = 480, | ||
38 | .pixclock = KHZ2PICOS(25180), | ||
39 | |||
40 | .left_margin = 64, .right_margin = 96, | ||
41 | .upper_margin = 34, .lower_margin = 11, | ||
42 | .hsync_len = 64, .vsync_len = 15, | ||
43 | |||
44 | .sync = 0, | ||
45 | .vmode = FB_VMODE_NONINTERLACED, | ||
46 | }, | ||
47 | }; | ||
48 | |||
49 | static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { | ||
50 | .manufacturer = "KYO", | ||
51 | .monitor = "TCG057VGLAD", | ||
52 | .modedb = tcg057vglad_modes, | ||
53 | .modedb_len = ARRAY_SIZE(tcg057vglad_modes), | ||
54 | .hfmin = 19948, | ||
55 | .hfmax = 31478, | ||
56 | .vfmin = 50, | ||
57 | .vfmax = 67, | ||
58 | .dclkmax = 28330000, | ||
59 | }; | ||
60 | |||
61 | static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = { | ||
62 | .default_bpp = 16, | ||
63 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
64 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
65 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
66 | | ATMEL_LCDC_MEMOR_BIG), | ||
67 | .default_monspecs = &atevklcd10x_default_monspecs, | ||
68 | .guard_time = 2, | ||
69 | }; | ||
70 | #elif CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA | ||
71 | static struct fb_videomode __initdata tcg057qvlad_modes[] = { | ||
72 | { | ||
73 | .name = "320x240 @ 50", | ||
74 | .refresh = 50, | ||
75 | .xres = 320, .yres = 240, | ||
76 | .pixclock = KHZ2PICOS(6300), | ||
77 | |||
78 | .left_margin = 34, .right_margin = 46, | ||
79 | .upper_margin = 7, .lower_margin = 15, | ||
80 | .hsync_len = 64, .vsync_len = 12, | ||
81 | |||
82 | .sync = 0, | ||
83 | .vmode = FB_VMODE_NONINTERLACED, | ||
84 | }, | ||
85 | }; | ||
86 | |||
87 | static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { | ||
88 | .manufacturer = "KYO", | ||
89 | .monitor = "TCG057QVLAD", | ||
90 | .modedb = tcg057qvlad_modes, | ||
91 | .modedb_len = ARRAY_SIZE(tcg057qvlad_modes), | ||
92 | .hfmin = 19948, | ||
93 | .hfmax = 31478, | ||
94 | .vfmin = 50, | ||
95 | .vfmax = 67, | ||
96 | .dclkmax = 7000000, | ||
97 | }; | ||
98 | |||
99 | static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = { | ||
100 | .default_bpp = 16, | ||
101 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
102 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
103 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
104 | | ATMEL_LCDC_MEMOR_BIG), | ||
105 | .default_monspecs = &atevklcd10x_default_monspecs, | ||
106 | .guard_time = 2, | ||
107 | }; | ||
108 | #elif CONFIG_BOARD_ATNGW100_EVKLCD10X_POW_QVGA | ||
109 | static struct fb_videomode __initdata ph320240t_modes[] = { | ||
110 | { | ||
111 | .name = "320x240 @ 60", | ||
112 | .refresh = 60, | ||
113 | .xres = 320, .yres = 240, | ||
114 | .pixclock = KHZ2PICOS(6300), | ||
115 | |||
116 | .left_margin = 38, .right_margin = 20, | ||
117 | .upper_margin = 15, .lower_margin = 5, | ||
118 | .hsync_len = 30, .vsync_len = 3, | ||
119 | |||
120 | .sync = 0, | ||
121 | .vmode = FB_VMODE_NONINTERLACED, | ||
122 | }, | ||
123 | }; | ||
124 | |||
125 | static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { | ||
126 | .manufacturer = "POW", | ||
127 | .monitor = "PH320240T", | ||
128 | .modedb = ph320240t_modes, | ||
129 | .modedb_len = ARRAY_SIZE(ph320240t_modes), | ||
130 | .hfmin = 14400, | ||
131 | .hfmax = 21600, | ||
132 | .vfmin = 50, | ||
133 | .vfmax = 90, | ||
134 | .dclkmax = 6400000, | ||
135 | }; | ||
136 | |||
137 | static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = { | ||
138 | .default_bpp = 16, | ||
139 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
140 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
141 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
142 | | ATMEL_LCDC_MEMOR_BIG), | ||
143 | .default_monspecs = &atevklcd10x_default_monspecs, | ||
144 | .guard_time = 2, | ||
145 | }; | ||
146 | #endif | ||
147 | |||
148 | static void atevklcd10x_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on) | ||
149 | { | ||
150 | gpio_set_value(GPIO_PIN_PB(15), on); | ||
151 | } | ||
152 | |||
153 | static int __init atevklcd10x_init(void) | ||
154 | { | ||
155 | /* PB15 is connected to the enable line on the boost regulator | ||
156 | * controlling the backlight for the LCD panel. | ||
157 | */ | ||
158 | at32_select_gpio(GPIO_PIN_PB(15), AT32_GPIOF_OUTPUT); | ||
159 | gpio_request(GPIO_PIN_PB(15), "backlight"); | ||
160 | gpio_direction_output(GPIO_PIN_PB(15), 0); | ||
161 | |||
162 | atevklcd10x_lcdc_data.atmel_lcdfb_power_control = | ||
163 | atevklcd10x_lcdc_power_control; | ||
164 | |||
165 | at32_add_device_lcdc(0, &atevklcd10x_lcdc_data, | ||
166 | fbmem_start, fbmem_size, | ||
167 | #ifdef CONFIG_BOARD_ATNGW100_MKII | ||
168 | ATMEL_LCDC_PRI_18BIT | ATMEL_LCDC_PC_DVAL | ||
169 | #else | ||
170 | ATMEL_LCDC_ALT_18BIT | ATMEL_LCDC_PE_DVAL | ||
171 | #endif | ||
172 | ); | ||
173 | |||
174 | at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH); | ||
175 | |||
176 | return 0; | ||
177 | } | ||
178 | postcore_initcall(atevklcd10x_init); | ||
diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c deleted file mode 100644 index 55ccc9ce4892..000000000000 --- a/arch/avr32/boards/atngw100/flash.c +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | /* | ||
2 | * ATNGW100 board-specific flash initialization | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/mtd/mtd.h> | ||
13 | #include <linux/mtd/partitions.h> | ||
14 | #include <linux/mtd/physmap.h> | ||
15 | |||
16 | #include <mach/smc.h> | ||
17 | |||
18 | static struct smc_timing flash_timing __initdata = { | ||
19 | .ncs_read_setup = 0, | ||
20 | .nrd_setup = 40, | ||
21 | .ncs_write_setup = 0, | ||
22 | .nwe_setup = 10, | ||
23 | |||
24 | .ncs_read_pulse = 80, | ||
25 | .nrd_pulse = 40, | ||
26 | .ncs_write_pulse = 65, | ||
27 | .nwe_pulse = 55, | ||
28 | |||
29 | .read_cycle = 120, | ||
30 | .write_cycle = 120, | ||
31 | }; | ||
32 | |||
33 | static struct smc_config flash_config __initdata = { | ||
34 | .bus_width = 2, | ||
35 | .nrd_controlled = 1, | ||
36 | .nwe_controlled = 1, | ||
37 | .byte_write = 1, | ||
38 | }; | ||
39 | |||
40 | static struct mtd_partition flash_parts[] = { | ||
41 | { | ||
42 | .name = "u-boot", | ||
43 | .offset = 0x00000000, | ||
44 | .size = 0x00020000, /* 128 KiB */ | ||
45 | .mask_flags = MTD_WRITEABLE, | ||
46 | }, | ||
47 | { | ||
48 | .name = "root", | ||
49 | .offset = 0x00020000, | ||
50 | .size = 0x007d0000, | ||
51 | }, | ||
52 | { | ||
53 | .name = "env", | ||
54 | .offset = 0x007f0000, | ||
55 | .size = 0x00010000, | ||
56 | .mask_flags = MTD_WRITEABLE, | ||
57 | }, | ||
58 | }; | ||
59 | |||
60 | static struct physmap_flash_data flash_data = { | ||
61 | .width = 2, | ||
62 | .nr_parts = ARRAY_SIZE(flash_parts), | ||
63 | .parts = flash_parts, | ||
64 | }; | ||
65 | |||
66 | static struct resource flash_resource = { | ||
67 | .start = 0x00000000, | ||
68 | .end = 0x007fffff, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }; | ||
71 | |||
72 | static struct platform_device flash_device = { | ||
73 | .name = "physmap-flash", | ||
74 | .id = 0, | ||
75 | .resource = &flash_resource, | ||
76 | .num_resources = 1, | ||
77 | .dev = { | ||
78 | .platform_data = &flash_data, | ||
79 | }, | ||
80 | }; | ||
81 | |||
82 | /* This needs to be called after the SMC has been initialized */ | ||
83 | static int __init atngw100_flash_init(void) | ||
84 | { | ||
85 | int ret; | ||
86 | |||
87 | smc_set_timing(&flash_config, &flash_timing); | ||
88 | ret = smc_set_configuration(0, &flash_config); | ||
89 | if (ret < 0) { | ||
90 | printk(KERN_ERR "atngw100: failed to set NOR flash timing\n"); | ||
91 | return ret; | ||
92 | } | ||
93 | |||
94 | platform_device_register(&flash_device); | ||
95 | |||
96 | return 0; | ||
97 | } | ||
98 | device_initcall(atngw100_flash_init); | ||
diff --git a/arch/avr32/boards/atngw100/mrmt.c b/arch/avr32/boards/atngw100/mrmt.c deleted file mode 100644 index 99b0a7984950..000000000000 --- a/arch/avr32/boards/atngw100/mrmt.c +++ /dev/null | |||
@@ -1,382 +0,0 @@ | |||
1 | /* | ||
2 | * Board-specific setup code for Remote Media Terminal 1 (RMT1) | ||
3 | * add-on board for the ATNGW100 Network Gateway | ||
4 | * | ||
5 | * Copyright (C) 2008 Mediama Technologies | ||
6 | * Based on ATNGW100 Network Gateway (Copyright (C) Atmel) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/irq.h> | ||
15 | #include <linux/linkage.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/types.h> | ||
18 | #include <linux/fb.h> | ||
19 | #include <linux/leds.h> | ||
20 | #include <linux/pwm.h> | ||
21 | #include <linux/leds_pwm.h> | ||
22 | #include <linux/input.h> | ||
23 | #include <linux/gpio_keys.h> | ||
24 | #include <linux/spi/spi.h> | ||
25 | #include <linux/spi/ads7846.h> | ||
26 | |||
27 | #include <video/atmel_lcdc.h> | ||
28 | #include <sound/atmel-ac97c.h> | ||
29 | |||
30 | #include <asm/delay.h> | ||
31 | #include <asm/io.h> | ||
32 | #include <asm/setup.h> | ||
33 | |||
34 | #include <mach/at32ap700x.h> | ||
35 | #include <mach/board.h> | ||
36 | #include <mach/init.h> | ||
37 | #include <mach/portmux.h> | ||
38 | |||
39 | /* Define board-specifoic GPIO assignments */ | ||
40 | #define PIN_LCD_BL GPIO_PIN_PA(28) | ||
41 | #define PWM_CH_BL 0 /* Must match with GPIO pin definition */ | ||
42 | #define PIN_LCD_DISP GPIO_PIN_PA(31) | ||
43 | #define PIN_AC97_RST_N GPIO_PIN_PA(30) | ||
44 | #define PB_EXTINT_BASE 25 | ||
45 | #define TS_IRQ 0 | ||
46 | #define PIN_TS_EXTINT GPIO_PIN_PB(PB_EXTINT_BASE+TS_IRQ) | ||
47 | #define PIN_PB_LEFT GPIO_PIN_PB(11) | ||
48 | #define PIN_PB_RIGHT GPIO_PIN_PB(12) | ||
49 | #define PIN_PWR_SW_N GPIO_PIN_PB(14) | ||
50 | #define PIN_PWR_ON GPIO_PIN_PB(13) | ||
51 | #define PIN_ZB_RST_N GPIO_PIN_PA(21) | ||
52 | #define PIN_BT_RST GPIO_PIN_PA(22) | ||
53 | #define PIN_LED_SYS GPIO_PIN_PA(16) | ||
54 | #define PIN_LED_A GPIO_PIN_PA(19) | ||
55 | #define PIN_LED_B GPIO_PIN_PE(19) | ||
56 | |||
57 | #ifdef CONFIG_BOARD_MRMT_LCD_LQ043T3DX0X | ||
58 | /* Sharp LQ043T3DX0x (or compatible) panel */ | ||
59 | static struct fb_videomode __initdata lcd_fb_modes[] = { | ||
60 | { | ||
61 | .name = "480x272 @ 59.94Hz", | ||
62 | .refresh = 59.94, | ||
63 | .xres = 480, .yres = 272, | ||
64 | .pixclock = KHZ2PICOS(9000), | ||
65 | |||
66 | .left_margin = 2, .right_margin = 2, | ||
67 | .upper_margin = 3, .lower_margin = 9, | ||
68 | .hsync_len = 41, .vsync_len = 1, | ||
69 | |||
70 | .sync = 0, | ||
71 | .vmode = FB_VMODE_NONINTERLACED, | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | static struct fb_monspecs __initdata lcd_fb_default_monspecs = { | ||
76 | .manufacturer = "SHA", | ||
77 | .monitor = "LQ043T3DX02", | ||
78 | .modedb = lcd_fb_modes, | ||
79 | .modedb_len = ARRAY_SIZE(lcd_fb_modes), | ||
80 | .hfmin = 14915, | ||
81 | .hfmax = 17638, | ||
82 | .vfmin = 53, | ||
83 | .vfmax = 61, | ||
84 | .dclkmax = 9260000, | ||
85 | }; | ||
86 | |||
87 | static struct atmel_lcdfb_pdata __initdata rmt_lcdc_data = { | ||
88 | .default_bpp = 24, | ||
89 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
90 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
91 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
92 | | ATMEL_LCDC_INVCLK_NORMAL | ||
93 | | ATMEL_LCDC_MEMOR_BIG), | ||
94 | .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB, | ||
95 | .default_monspecs = &lcd_fb_default_monspecs, | ||
96 | .guard_time = 2, | ||
97 | }; | ||
98 | #endif | ||
99 | |||
100 | #ifdef CONFIG_BOARD_MRMT_LCD_KWH043GM08 | ||
101 | /* Sharp KWH043GM08-Fxx (or compatible) panel */ | ||
102 | static struct fb_videomode __initdata lcd_fb_modes[] = { | ||
103 | { | ||
104 | .name = "480x272 @ 59.94Hz", | ||
105 | .refresh = 59.94, | ||
106 | .xres = 480, .yres = 272, | ||
107 | .pixclock = KHZ2PICOS(9000), | ||
108 | |||
109 | .left_margin = 2, .right_margin = 2, | ||
110 | .upper_margin = 3, .lower_margin = 9, | ||
111 | .hsync_len = 41, .vsync_len = 1, | ||
112 | |||
113 | .sync = 0, | ||
114 | .vmode = FB_VMODE_NONINTERLACED, | ||
115 | }, | ||
116 | }; | ||
117 | |||
118 | static struct fb_monspecs __initdata lcd_fb_default_monspecs = { | ||
119 | .manufacturer = "FOR", | ||
120 | .monitor = "KWH043GM08", | ||
121 | .modedb = lcd_fb_modes, | ||
122 | .modedb_len = ARRAY_SIZE(lcd_fb_modes), | ||
123 | .hfmin = 14915, | ||
124 | .hfmax = 17638, | ||
125 | .vfmin = 53, | ||
126 | .vfmax = 61, | ||
127 | .dclkmax = 9260000, | ||
128 | }; | ||
129 | |||
130 | static struct atmel_lcdfb_pdata __initdata rmt_lcdc_data = { | ||
131 | .default_bpp = 24, | ||
132 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
133 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
134 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
135 | | ATMEL_LCDC_INVCLK_INVERTED | ||
136 | | ATMEL_LCDC_MEMOR_BIG), | ||
137 | .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB, | ||
138 | .default_monspecs = &lcd_fb_default_monspecs, | ||
139 | .guard_time = 2, | ||
140 | }; | ||
141 | #endif | ||
142 | |||
143 | #ifdef CONFIG_BOARD_MRMT_AC97 | ||
144 | static struct ac97c_platform_data __initdata ac97c0_data = { | ||
145 | .reset_pin = PIN_AC97_RST_N, | ||
146 | }; | ||
147 | #endif | ||
148 | |||
149 | #ifdef CONFIG_BOARD_MRMT_UCB1400_TS | ||
150 | /* NOTE: IRQ assignment relies on kernel module parameter */ | ||
151 | static struct platform_device rmt_ts_device = { | ||
152 | .name = "ucb1400_ts", | ||
153 | .id = -1, | ||
154 | }; | ||
155 | #endif | ||
156 | |||
157 | #ifdef CONFIG_BOARD_MRMT_BL_PWM | ||
158 | /* PWM LEDs: LCD Backlight, etc */ | ||
159 | static struct pwm_lookup pwm_lookup[] = { | ||
160 | PWM_LOOKUP("at91sam9rl-pwm", PWM_CH_BL, "leds_pwm", "ds1", | ||
161 | 5000, PWM_POLARITY_INVERSED), | ||
162 | }; | ||
163 | |||
164 | static struct led_pwm pwm_leds[] = { | ||
165 | { | ||
166 | .name = "backlight", | ||
167 | .max_brightness = 255, | ||
168 | }, | ||
169 | }; | ||
170 | |||
171 | static struct led_pwm_platform_data pwm_data = { | ||
172 | .num_leds = ARRAY_SIZE(pwm_leds), | ||
173 | .leds = pwm_leds, | ||
174 | }; | ||
175 | |||
176 | static struct platform_device leds_pwm = { | ||
177 | .name = "leds_pwm", | ||
178 | .id = -1, | ||
179 | .dev = { | ||
180 | .platform_data = &pwm_data, | ||
181 | }, | ||
182 | }; | ||
183 | #endif | ||
184 | |||
185 | #ifdef CONFIG_BOARD_MRMT_ADS7846_TS | ||
186 | static int ads7846_pendown_state(void) | ||
187 | { | ||
188 | return !gpio_get_value( PIN_TS_EXTINT ); /* PENIRQ.*/ | ||
189 | } | ||
190 | |||
191 | static struct ads7846_platform_data ads_info = { | ||
192 | .model = 7846, | ||
193 | .keep_vref_on = 0, /* Use external VREF pin */ | ||
194 | .vref_delay_usecs = 0, | ||
195 | .vref_mv = 3300, /* VREF = 3.3V */ | ||
196 | .settle_delay_usecs = 800, | ||
197 | .penirq_recheck_delay_usecs = 800, | ||
198 | .x_plate_ohms = 750, | ||
199 | .y_plate_ohms = 300, | ||
200 | .pressure_max = 4096, | ||
201 | .debounce_max = 1, | ||
202 | .debounce_rep = 0, | ||
203 | .debounce_tol = (~0), | ||
204 | .get_pendown_state = ads7846_pendown_state, | ||
205 | .filter = NULL, | ||
206 | .filter_init = NULL, | ||
207 | }; | ||
208 | |||
209 | static struct spi_board_info spi01_board_info[] __initdata = { | ||
210 | { | ||
211 | .modalias = "ads7846", | ||
212 | .max_speed_hz = 31250*26, | ||
213 | .bus_num = 0, | ||
214 | .chip_select = 1, | ||
215 | .platform_data = &ads_info, | ||
216 | .irq = AT32_EXTINT(TS_IRQ), | ||
217 | }, | ||
218 | }; | ||
219 | #endif | ||
220 | |||
221 | /* GPIO Keys: left, right, power, etc */ | ||
222 | static const struct gpio_keys_button rmt_gpio_keys_buttons[] = { | ||
223 | [0] = { | ||
224 | .type = EV_KEY, | ||
225 | .code = KEY_POWER, | ||
226 | .gpio = PIN_PWR_SW_N, | ||
227 | .active_low = 1, | ||
228 | .desc = "power button", | ||
229 | }, | ||
230 | [1] = { | ||
231 | .type = EV_KEY, | ||
232 | .code = KEY_LEFT, | ||
233 | .gpio = PIN_PB_LEFT, | ||
234 | .active_low = 1, | ||
235 | .desc = "left button", | ||
236 | }, | ||
237 | [2] = { | ||
238 | .type = EV_KEY, | ||
239 | .code = KEY_RIGHT, | ||
240 | .gpio = PIN_PB_RIGHT, | ||
241 | .active_low = 1, | ||
242 | .desc = "right button", | ||
243 | }, | ||
244 | }; | ||
245 | |||
246 | static const struct gpio_keys_platform_data rmt_gpio_keys_data = { | ||
247 | .nbuttons = ARRAY_SIZE(rmt_gpio_keys_buttons), | ||
248 | .buttons = (void *) rmt_gpio_keys_buttons, | ||
249 | }; | ||
250 | |||
251 | static struct platform_device rmt_gpio_keys = { | ||
252 | .name = "gpio-keys", | ||
253 | .id = -1, | ||
254 | .dev = { | ||
255 | .platform_data = (void *) &rmt_gpio_keys_data, | ||
256 | } | ||
257 | }; | ||
258 | |||
259 | #ifdef CONFIG_BOARD_MRMT_RTC_I2C | ||
260 | static struct i2c_board_info __initdata mrmt1_i2c_rtc = { | ||
261 | I2C_BOARD_INFO("s35390a", 0x30), | ||
262 | .irq = 0, | ||
263 | }; | ||
264 | #endif | ||
265 | |||
266 | static void mrmt_power_off(void) | ||
267 | { | ||
268 | /* PWR_ON=0 will force power off */ | ||
269 | gpio_set_value( PIN_PWR_ON, 0 ); | ||
270 | } | ||
271 | |||
272 | static int __init mrmt1_init(void) | ||
273 | { | ||
274 | gpio_set_value( PIN_PWR_ON, 1 ); /* Ensure PWR_ON is enabled */ | ||
275 | |||
276 | pm_power_off = mrmt_power_off; | ||
277 | |||
278 | /* Setup USARTS (other than console) */ | ||
279 | at32_map_usart(2, 1, 0); /* USART 2: /dev/ttyS1, RMT1:DB9M */ | ||
280 | at32_map_usart(3, 2, ATMEL_USART_RTS | ATMEL_USART_CTS); | ||
281 | /* USART 3: /dev/ttyS2, RMT1:Wireless, w/ RTS/CTS */ | ||
282 | at32_add_device_usart(1); | ||
283 | at32_add_device_usart(2); | ||
284 | |||
285 | /* Select GPIO Key pins */ | ||
286 | at32_select_gpio( PIN_PWR_SW_N, AT32_GPIOF_DEGLITCH); | ||
287 | at32_select_gpio( PIN_PB_LEFT, AT32_GPIOF_DEGLITCH); | ||
288 | at32_select_gpio( PIN_PB_RIGHT, AT32_GPIOF_DEGLITCH); | ||
289 | platform_device_register(&rmt_gpio_keys); | ||
290 | |||
291 | #ifdef CONFIG_BOARD_MRMT_RTC_I2C | ||
292 | i2c_register_board_info(0, &mrmt1_i2c_rtc, 1); | ||
293 | #endif | ||
294 | |||
295 | #ifndef CONFIG_BOARD_MRMT_LCD_DISABLE | ||
296 | /* User "alternate" LCDC inferface on Port E & D */ | ||
297 | /* NB: exclude LCDC_CC pin, as NGW100 reserves it for other use */ | ||
298 | at32_add_device_lcdc(0, &rmt_lcdc_data, | ||
299 | fbmem_start, fbmem_size, | ||
300 | (ATMEL_LCDC_ALT_24BIT | ATMEL_LCDC_PE_DVAL ) ); | ||
301 | #endif | ||
302 | |||
303 | #ifdef CONFIG_BOARD_MRMT_AC97 | ||
304 | at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH); | ||
305 | #endif | ||
306 | |||
307 | #ifdef CONFIG_BOARD_MRMT_ADS7846_TS | ||
308 | /* Select the Touchscreen interrupt pin mode */ | ||
309 | at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ), | ||
310 | GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); | ||
311 | irq_set_irq_type(AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING); | ||
312 | at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info)); | ||
313 | spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info)); | ||
314 | #endif | ||
315 | |||
316 | #ifdef CONFIG_BOARD_MRMT_UCB1400_TS | ||
317 | /* Select the Touchscreen interrupt pin mode */ | ||
318 | at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ), | ||
319 | GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); | ||
320 | platform_device_register(&rmt_ts_device); | ||
321 | #endif | ||
322 | |||
323 | at32_select_gpio( PIN_LCD_DISP, AT32_GPIOF_OUTPUT ); | ||
324 | gpio_request( PIN_LCD_DISP, "LCD_DISP" ); | ||
325 | gpio_direction_output( PIN_LCD_DISP, 0 ); /* LCD DISP */ | ||
326 | #ifdef CONFIG_BOARD_MRMT_LCD_DISABLE | ||
327 | /* Keep Backlight and DISP off */ | ||
328 | at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT ); | ||
329 | gpio_request( PIN_LCD_BL, "LCD_BL" ); | ||
330 | gpio_direction_output( PIN_LCD_BL, 0 ); /* Backlight */ | ||
331 | #else | ||
332 | gpio_set_value( PIN_LCD_DISP, 1 ); /* DISP asserted first */ | ||
333 | #ifdef CONFIG_BOARD_MRMT_BL_PWM | ||
334 | /* Use PWM for Backlight controls */ | ||
335 | at32_add_device_pwm(1 << PWM_CH_BL); | ||
336 | pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup)); | ||
337 | platform_device_register(&leds_pwm); | ||
338 | #else | ||
339 | /* Backlight always on */ | ||
340 | udelay( 1 ); | ||
341 | at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT ); | ||
342 | gpio_request( PIN_LCD_BL, "LCD_BL" ); | ||
343 | gpio_direction_output( PIN_LCD_BL, 1 ); | ||
344 | #endif | ||
345 | #endif | ||
346 | |||
347 | /* Make sure BT and Zigbee modules in reset */ | ||
348 | at32_select_gpio( PIN_BT_RST, AT32_GPIOF_OUTPUT ); | ||
349 | gpio_request( PIN_BT_RST, "BT_RST" ); | ||
350 | gpio_direction_output( PIN_BT_RST, 1 ); | ||
351 | /* BT Module in Reset */ | ||
352 | |||
353 | at32_select_gpio( PIN_ZB_RST_N, AT32_GPIOF_OUTPUT ); | ||
354 | gpio_request( PIN_ZB_RST_N, "ZB_RST_N" ); | ||
355 | gpio_direction_output( PIN_ZB_RST_N, 0 ); | ||
356 | /* XBee Module in Reset */ | ||
357 | |||
358 | #ifdef CONFIG_BOARD_MRMT_WIRELESS_ZB | ||
359 | udelay( 1000 ); | ||
360 | /* Unreset the XBee Module */ | ||
361 | gpio_set_value( PIN_ZB_RST_N, 1 ); | ||
362 | #endif | ||
363 | #ifdef CONFIG_BOARD_MRMT_WIRELESS_BT | ||
364 | udelay( 1000 ); | ||
365 | /* Unreset the BT Module */ | ||
366 | gpio_set_value( PIN_BT_RST, 0 ); | ||
367 | #endif | ||
368 | |||
369 | return 0; | ||
370 | } | ||
371 | arch_initcall(mrmt1_init); | ||
372 | |||
373 | static int __init mrmt1_early_init(void) | ||
374 | { | ||
375 | /* To maintain power-on signal in case boot loader did not already */ | ||
376 | at32_select_gpio( PIN_PWR_ON, AT32_GPIOF_OUTPUT ); | ||
377 | gpio_request( PIN_PWR_ON, "PIN_PWR_ON" ); | ||
378 | gpio_direction_output( PIN_PWR_ON, 1 ); | ||
379 | |||
380 | return 0; | ||
381 | } | ||
382 | core_initcall(mrmt1_early_init); | ||
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c deleted file mode 100644 index afeae8978a8d..000000000000 --- a/arch/avr32/boards/atngw100/setup.c +++ /dev/null | |||
@@ -1,324 +0,0 @@ | |||
1 | /* | ||
2 | * Board-specific setup code for the ATNGW100 Network Gateway | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/etherdevice.h> | ||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/irq.h> | ||
14 | #include <linux/i2c.h> | ||
15 | #include <linux/i2c-gpio.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/linkage.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/types.h> | ||
20 | #include <linux/leds.h> | ||
21 | #include <linux/spi/spi.h> | ||
22 | #include <linux/atmel-mci.h> | ||
23 | #include <linux/usb/atmel_usba_udc.h> | ||
24 | |||
25 | #include <asm/io.h> | ||
26 | #include <asm/setup.h> | ||
27 | |||
28 | #include <mach/at32ap700x.h> | ||
29 | #include <mach/board.h> | ||
30 | #include <mach/init.h> | ||
31 | #include <mach/portmux.h> | ||
32 | |||
33 | /* Oscillator frequencies. These are board-specific */ | ||
34 | unsigned long at32_board_osc_rates[3] = { | ||
35 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
36 | [1] = 20000000, /* 20 MHz on osc0 */ | ||
37 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
38 | }; | ||
39 | |||
40 | /* | ||
41 | * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000 | ||
42 | * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit | ||
43 | * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash | ||
44 | * (the ATNGW100 has none.) | ||
45 | * | ||
46 | * The RAM difference is handled by the boot loader, so the only difference we | ||
47 | * end up handling here is the NAND flash, EBI pin reservation and if LCDC or | ||
48 | * MACB1 should be enabled. | ||
49 | */ | ||
50 | #ifdef CONFIG_BOARD_ATNGW100_MKII | ||
51 | #include <linux/mtd/partitions.h> | ||
52 | #include <mach/smc.h> | ||
53 | |||
54 | static struct smc_timing nand_timing __initdata = { | ||
55 | .ncs_read_setup = 0, | ||
56 | .nrd_setup = 10, | ||
57 | .ncs_write_setup = 0, | ||
58 | .nwe_setup = 10, | ||
59 | |||
60 | .ncs_read_pulse = 30, | ||
61 | .nrd_pulse = 15, | ||
62 | .ncs_write_pulse = 30, | ||
63 | .nwe_pulse = 15, | ||
64 | |||
65 | .read_cycle = 30, | ||
66 | .write_cycle = 30, | ||
67 | |||
68 | .ncs_read_recover = 0, | ||
69 | .nrd_recover = 15, | ||
70 | .ncs_write_recover = 0, | ||
71 | /* WE# high -> RE# low min 60 ns */ | ||
72 | .nwe_recover = 50, | ||
73 | }; | ||
74 | |||
75 | static struct smc_config nand_config __initdata = { | ||
76 | .bus_width = 2, | ||
77 | .nrd_controlled = 1, | ||
78 | .nwe_controlled = 1, | ||
79 | .nwait_mode = 0, | ||
80 | .byte_write = 0, | ||
81 | .tdf_cycles = 2, | ||
82 | .tdf_mode = 0, | ||
83 | }; | ||
84 | |||
85 | static struct mtd_partition nand_partitions[] = { | ||
86 | { | ||
87 | .name = "main", | ||
88 | .offset = 0x00000000, | ||
89 | .size = MTDPART_SIZ_FULL, | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | |||
94 | static struct atmel_nand_data atngw100mkii_nand_data __initdata = { | ||
95 | .cle = 21, | ||
96 | .ale = 22, | ||
97 | .rdy_pin = GPIO_PIN_PB(28), | ||
98 | .enable_pin = GPIO_PIN_PE(23), | ||
99 | .bus_width_16 = true, | ||
100 | .ecc_mode = NAND_ECC_SOFT, | ||
101 | .parts = nand_partitions, | ||
102 | .num_parts = ARRAY_SIZE(nand_partitions), | ||
103 | }; | ||
104 | #endif | ||
105 | |||
106 | /* Initialized by bootloader-specific startup code. */ | ||
107 | struct tag *bootloader_tags __initdata; | ||
108 | |||
109 | struct eth_addr { | ||
110 | u8 addr[6]; | ||
111 | }; | ||
112 | static struct eth_addr __initdata hw_addr[2]; | ||
113 | static struct macb_platform_data __initdata eth_data[2]; | ||
114 | |||
115 | static struct spi_board_info spi0_board_info[] __initdata = { | ||
116 | { | ||
117 | .modalias = "mtd_dataflash", | ||
118 | .max_speed_hz = 8000000, | ||
119 | .chip_select = 0, | ||
120 | }, | ||
121 | }; | ||
122 | |||
123 | static struct mci_platform_data __initdata mci0_data = { | ||
124 | .slot[0] = { | ||
125 | .bus_width = 4, | ||
126 | #if defined(CONFIG_BOARD_ATNGW100_MKII) | ||
127 | .detect_pin = GPIO_PIN_PC(25), | ||
128 | .wp_pin = GPIO_PIN_PE(22), | ||
129 | #else | ||
130 | .detect_pin = GPIO_PIN_PC(25), | ||
131 | .wp_pin = GPIO_PIN_PE(0), | ||
132 | #endif | ||
133 | }, | ||
134 | }; | ||
135 | |||
136 | static struct usba_platform_data atngw100_usba_data __initdata = { | ||
137 | #if defined(CONFIG_BOARD_ATNGW100_MKII) | ||
138 | .vbus_pin = GPIO_PIN_PE(26), | ||
139 | #else | ||
140 | .vbus_pin = -ENODEV, | ||
141 | #endif | ||
142 | }; | ||
143 | |||
144 | /* | ||
145 | * The next two functions should go away as the boot loader is | ||
146 | * supposed to initialize the macb address registers with a valid | ||
147 | * ethernet address. But we need to keep it around for a while until | ||
148 | * we can be reasonably sure the boot loader does this. | ||
149 | * | ||
150 | * The phy_id is ignored as the driver will probe for it. | ||
151 | */ | ||
152 | static int __init parse_tag_ethernet(struct tag *tag) | ||
153 | { | ||
154 | int i; | ||
155 | |||
156 | i = tag->u.ethernet.mac_index; | ||
157 | if (i < ARRAY_SIZE(hw_addr)) | ||
158 | memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, | ||
159 | sizeof(hw_addr[i].addr)); | ||
160 | |||
161 | return 0; | ||
162 | } | ||
163 | __tagtable(ATAG_ETHERNET, parse_tag_ethernet); | ||
164 | |||
165 | static void __init set_hw_addr(struct platform_device *pdev) | ||
166 | { | ||
167 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
168 | const u8 *addr; | ||
169 | void __iomem *regs; | ||
170 | struct clk *pclk; | ||
171 | |||
172 | if (!res) | ||
173 | return; | ||
174 | if (pdev->id >= ARRAY_SIZE(hw_addr)) | ||
175 | return; | ||
176 | |||
177 | addr = hw_addr[pdev->id].addr; | ||
178 | if (!is_valid_ether_addr(addr)) | ||
179 | return; | ||
180 | |||
181 | /* | ||
182 | * Since this is board-specific code, we'll cheat and use the | ||
183 | * physical address directly as we happen to know that it's | ||
184 | * the same as the virtual address. | ||
185 | */ | ||
186 | regs = (void __iomem __force *)res->start; | ||
187 | pclk = clk_get(&pdev->dev, "pclk"); | ||
188 | if (IS_ERR(pclk)) | ||
189 | return; | ||
190 | |||
191 | clk_enable(pclk); | ||
192 | __raw_writel((addr[3] << 24) | (addr[2] << 16) | ||
193 | | (addr[1] << 8) | addr[0], regs + 0x98); | ||
194 | __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); | ||
195 | clk_disable(pclk); | ||
196 | clk_put(pclk); | ||
197 | } | ||
198 | |||
199 | void __init setup_board(void) | ||
200 | { | ||
201 | at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */ | ||
202 | at32_setup_serial_console(0); | ||
203 | } | ||
204 | |||
205 | static const struct gpio_led ngw_leds[] = { | ||
206 | { .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1, | ||
207 | .default_trigger = "heartbeat", | ||
208 | }, | ||
209 | { .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, }, | ||
210 | { .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, }, | ||
211 | }; | ||
212 | |||
213 | static const struct gpio_led_platform_data ngw_led_data = { | ||
214 | .num_leds = ARRAY_SIZE(ngw_leds), | ||
215 | .leds = (void *) ngw_leds, | ||
216 | }; | ||
217 | |||
218 | static struct platform_device ngw_gpio_leds = { | ||
219 | .name = "leds-gpio", | ||
220 | .id = -1, | ||
221 | .dev = { | ||
222 | .platform_data = (void *) &ngw_led_data, | ||
223 | } | ||
224 | }; | ||
225 | |||
226 | static struct i2c_gpio_platform_data i2c_gpio_data = { | ||
227 | .sda_pin = GPIO_PIN_PA(6), | ||
228 | .scl_pin = GPIO_PIN_PA(7), | ||
229 | .sda_is_open_drain = 1, | ||
230 | .scl_is_open_drain = 1, | ||
231 | .udelay = 2, /* close to 100 kHz */ | ||
232 | }; | ||
233 | |||
234 | static struct platform_device i2c_gpio_device = { | ||
235 | .name = "i2c-gpio", | ||
236 | .id = 0, | ||
237 | .dev = { | ||
238 | .platform_data = &i2c_gpio_data, | ||
239 | }, | ||
240 | }; | ||
241 | |||
242 | static struct i2c_board_info __initdata i2c_info[] = { | ||
243 | /* NOTE: original ATtiny24 firmware is at address 0x0b */ | ||
244 | }; | ||
245 | |||
246 | static int __init atngw100_init(void) | ||
247 | { | ||
248 | unsigned i; | ||
249 | |||
250 | /* | ||
251 | * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the | ||
252 | * SDRAM-specific pins so that nobody messes with them. | ||
253 | */ | ||
254 | #ifdef CONFIG_BOARD_ATNGW100_MKII | ||
255 | at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); | ||
256 | |||
257 | smc_set_timing(&nand_config, &nand_timing); | ||
258 | smc_set_configuration(3, &nand_config); | ||
259 | at32_add_device_nand(0, &atngw100mkii_nand_data); | ||
260 | #endif | ||
261 | |||
262 | at32_add_device_usart(0); | ||
263 | |||
264 | set_hw_addr(at32_add_device_eth(0, ð_data[0])); | ||
265 | #ifndef CONFIG_BOARD_ATNGW100_MKII_LCD | ||
266 | set_hw_addr(at32_add_device_eth(1, ð_data[1])); | ||
267 | #endif | ||
268 | |||
269 | at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); | ||
270 | at32_add_device_mci(0, &mci0_data); | ||
271 | at32_add_device_usba(0, &atngw100_usba_data); | ||
272 | |||
273 | for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { | ||
274 | at32_select_gpio(ngw_leds[i].gpio, | ||
275 | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
276 | } | ||
277 | platform_device_register(&ngw_gpio_leds); | ||
278 | |||
279 | /* all these i2c/smbus pins should have external pullups for | ||
280 | * open-drain sharing among all I2C devices. SDA and SCL do; | ||
281 | * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should | ||
282 | * be SMBALERT# (for PMBus), but it's not available off-board. | ||
283 | */ | ||
284 | #ifdef CONFIG_BOARD_ATNGW100_MKII | ||
285 | at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP); | ||
286 | #else | ||
287 | at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP); | ||
288 | #endif | ||
289 | at32_select_gpio(i2c_gpio_data.sda_pin, | ||
290 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
291 | at32_select_gpio(i2c_gpio_data.scl_pin, | ||
292 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
293 | platform_device_register(&i2c_gpio_device); | ||
294 | i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info)); | ||
295 | |||
296 | return 0; | ||
297 | } | ||
298 | postcore_initcall(atngw100_init); | ||
299 | |||
300 | static int __init atngw100_arch_init(void) | ||
301 | { | ||
302 | /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused | ||
303 | * jumper on the mainboard, with an external pullup; the jumper grounds | ||
304 | * it. Use it however you like, including letting U-Boot or Linux tweak | ||
305 | * boot sequences. | ||
306 | */ | ||
307 | #ifdef CONFIG_BOARD_ATNGW100_MKII | ||
308 | at32_select_gpio(GPIO_PIN_PE(30), 0); | ||
309 | gpio_request(GPIO_PIN_PE(30), "j15"); | ||
310 | gpio_direction_input(GPIO_PIN_PE(30)); | ||
311 | gpio_export(GPIO_PIN_PE(30), false); | ||
312 | #else | ||
313 | at32_select_gpio(GPIO_PIN_PB(30), 0); | ||
314 | gpio_request(GPIO_PIN_PB(30), "j15"); | ||
315 | gpio_direction_input(GPIO_PIN_PB(30)); | ||
316 | gpio_export(GPIO_PIN_PB(30), false); | ||
317 | #endif | ||
318 | |||
319 | /* set_irq_type() after the arch_initcall for EIC has run, and | ||
320 | * before the I2C subsystem could try using this IRQ. | ||
321 | */ | ||
322 | return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING); | ||
323 | } | ||
324 | arch_initcall(atngw100_arch_init); | ||
diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig deleted file mode 100644 index 8dc48214f0b7..000000000000 --- a/arch/avr32/boards/atstk1000/Kconfig +++ /dev/null | |||
@@ -1,109 +0,0 @@ | |||
1 | # STK1000 customization | ||
2 | |||
3 | if BOARD_ATSTK1000 | ||
4 | |||
5 | choice | ||
6 | prompt "ATSTK1000 CPU daughterboard type" | ||
7 | default BOARD_ATSTK1002 | ||
8 | |||
9 | config BOARD_ATSTK1002 | ||
10 | bool "ATSTK1002" | ||
11 | select CPU_AT32AP7000 | ||
12 | |||
13 | config BOARD_ATSTK1003 | ||
14 | bool "ATSTK1003" | ||
15 | select CPU_AT32AP7001 | ||
16 | |||
17 | config BOARD_ATSTK1004 | ||
18 | bool "ATSTK1004" | ||
19 | select CPU_AT32AP7002 | ||
20 | |||
21 | config BOARD_ATSTK1006 | ||
22 | bool "ATSTK1006" | ||
23 | select CPU_AT32AP7000 | ||
24 | |||
25 | endchoice | ||
26 | |||
27 | |||
28 | config BOARD_ATSTK100X_CUSTOM | ||
29 | bool "Non-default STK1002/STK1003/STK1004 jumper settings" | ||
30 | help | ||
31 | You will normally leave the jumpers on the CPU card at their | ||
32 | default settings. If you need to use certain peripherals, | ||
33 | you will need to change some of those jumpers. | ||
34 | |||
35 | if BOARD_ATSTK100X_CUSTOM | ||
36 | |||
37 | config BOARD_ATSTK100X_SW1_CUSTOM | ||
38 | bool "SW1: use SSC1 (not SPI0)" | ||
39 | help | ||
40 | This also prevents using the external DAC as an audio interface, | ||
41 | and means you can't initialize the on-board QVGA display. | ||
42 | |||
43 | config BOARD_ATSTK100X_SW2_CUSTOM | ||
44 | bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)" | ||
45 | help | ||
46 | If you change this you'll want an updated boot loader putting | ||
47 | the console on UART-C not UART-A. | ||
48 | |||
49 | config BOARD_ATSTK100X_SW3_CUSTOM | ||
50 | bool "SW3: use TIMER1 (not SSC0 and GCLK)" | ||
51 | help | ||
52 | This also prevents using the external DAC as an audio interface. | ||
53 | |||
54 | config BOARD_ATSTK100X_SW4_CUSTOM | ||
55 | bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)" | ||
56 | help | ||
57 | To use the camera interface you'll need a custom card (on the | ||
58 | PCI-format connector) connect a video sensor. | ||
59 | |||
60 | config BOARD_ATSTK1002_SW5_CUSTOM | ||
61 | bool "SW5: use MACB1 (not LCDC)" | ||
62 | depends on BOARD_ATSTK1002 | ||
63 | |||
64 | config BOARD_ATSTK1002_SW6_CUSTOM | ||
65 | bool "SW6: more GPIOs (not MACB0)" | ||
66 | depends on BOARD_ATSTK1002 | ||
67 | |||
68 | endif # custom | ||
69 | |||
70 | config BOARD_ATSTK100X_SPI1 | ||
71 | bool "Configure SPI1 controller" | ||
72 | depends on !BOARD_ATSTK100X_SW4_CUSTOM | ||
73 | help | ||
74 | All the signals for the second SPI controller are available on | ||
75 | GPIO lines and accessed through the J1 jumper block. Say "y" | ||
76 | here to configure that SPI controller. | ||
77 | |||
78 | config BOARD_ATSTK1000_J2_LED | ||
79 | bool | ||
80 | default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB | ||
81 | |||
82 | choice | ||
83 | prompt "LEDs connected to J2:" | ||
84 | depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM | ||
85 | optional | ||
86 | help | ||
87 | Select this if you have jumpered the J2 jumper block to the | ||
88 | LED0..LED7 amber leds, or to the RGB leds, using a ten-pin | ||
89 | IDC cable. A default "heartbeat" trigger is provided, but | ||
90 | you can of course override this. | ||
91 | |||
92 | config BOARD_ATSTK1000_J2_LED8 | ||
93 | bool "LED0..LED7" | ||
94 | help | ||
95 | Select this if J2 is jumpered to LED0..LED7 amber leds. | ||
96 | |||
97 | config BOARD_ATSTK1000_J2_RGB | ||
98 | bool "RGB leds" | ||
99 | help | ||
100 | Select this if J2 is jumpered to the RGB leds. | ||
101 | |||
102 | endchoice | ||
103 | |||
104 | config BOARD_ATSTK1000_EXTDAC | ||
105 | bool | ||
106 | depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM | ||
107 | default y | ||
108 | |||
109 | endif # stk 1000 | ||
diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile deleted file mode 100644 index edecee03742d..000000000000 --- a/arch/avr32/boards/atstk1000/Makefile +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | obj-y += setup.o flash.o | ||
2 | obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o | ||
3 | obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o | ||
4 | obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o | ||
5 | obj-$(CONFIG_BOARD_ATSTK1006) += atstk1002.o | ||
diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h deleted file mode 100644 index 653cc09e536c..000000000000 --- a/arch/avr32/boards/atstk1000/atstk1000.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * ATSTK1000 setup code: Daughterboard interface | ||
3 | * | ||
4 | * Copyright (C) 2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H | ||
11 | #define __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H | ||
12 | |||
13 | extern struct atmel_lcdfb_pdata atstk1000_lcdc_data; | ||
14 | |||
15 | void atstk1000_setup_j2_leds(void); | ||
16 | |||
17 | #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */ | ||
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c deleted file mode 100644 index 6c80aba7bf96..000000000000 --- a/arch/avr32/boards/atstk1000/atstk1002.c +++ /dev/null | |||
@@ -1,330 +0,0 @@ | |||
1 | /* | ||
2 | * ATSTK1002/ATSTK1006 daughterboard-specific init code | ||
3 | * | ||
4 | * Copyright (C) 2005-2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/etherdevice.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/spi/spi.h> | ||
18 | #include <linux/spi/at73c213.h> | ||
19 | #include <linux/atmel-mci.h> | ||
20 | |||
21 | #include <video/atmel_lcdc.h> | ||
22 | |||
23 | #include <asm/io.h> | ||
24 | #include <asm/setup.h> | ||
25 | |||
26 | #include <mach/at32ap700x.h> | ||
27 | #include <mach/board.h> | ||
28 | #include <mach/init.h> | ||
29 | #include <mach/portmux.h> | ||
30 | |||
31 | #include "atstk1000.h" | ||
32 | |||
33 | /* Oscillator frequencies. These are board specific */ | ||
34 | unsigned long at32_board_osc_rates[3] = { | ||
35 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
36 | [1] = 20000000, /* 20 MHz on osc0 */ | ||
37 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
38 | }; | ||
39 | |||
40 | /* | ||
41 | * The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both | ||
42 | * have the AT32AP7000 chip on board; the difference is that the | ||
43 | * STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on | ||
44 | * the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has | ||
45 | * none.) | ||
46 | * | ||
47 | * The RAM difference is handled by the boot loader, so the only | ||
48 | * difference we end up handling here is the NAND flash. | ||
49 | */ | ||
50 | #ifdef CONFIG_BOARD_ATSTK1006 | ||
51 | #include <linux/mtd/partitions.h> | ||
52 | #include <mach/smc.h> | ||
53 | |||
54 | static struct smc_timing nand_timing __initdata = { | ||
55 | .ncs_read_setup = 0, | ||
56 | .nrd_setup = 10, | ||
57 | .ncs_write_setup = 0, | ||
58 | .nwe_setup = 10, | ||
59 | |||
60 | .ncs_read_pulse = 30, | ||
61 | .nrd_pulse = 15, | ||
62 | .ncs_write_pulse = 30, | ||
63 | .nwe_pulse = 15, | ||
64 | |||
65 | .read_cycle = 30, | ||
66 | .write_cycle = 30, | ||
67 | |||
68 | .ncs_read_recover = 0, | ||
69 | .nrd_recover = 15, | ||
70 | .ncs_write_recover = 0, | ||
71 | /* WE# high -> RE# low min 60 ns */ | ||
72 | .nwe_recover = 50, | ||
73 | }; | ||
74 | |||
75 | static struct smc_config nand_config __initdata = { | ||
76 | .bus_width = 1, | ||
77 | .nrd_controlled = 1, | ||
78 | .nwe_controlled = 1, | ||
79 | .nwait_mode = 0, | ||
80 | .byte_write = 0, | ||
81 | .tdf_cycles = 2, | ||
82 | .tdf_mode = 0, | ||
83 | }; | ||
84 | |||
85 | static struct mtd_partition nand_partitions[] = { | ||
86 | { | ||
87 | .name = "main", | ||
88 | .offset = 0x00000000, | ||
89 | .size = MTDPART_SIZ_FULL, | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | static struct atmel_nand_data atstk1006_nand_data __initdata = { | ||
94 | .cle = 21, | ||
95 | .ale = 22, | ||
96 | .rdy_pin = GPIO_PIN_PB(30), | ||
97 | .enable_pin = GPIO_PIN_PB(29), | ||
98 | .ecc_mode = NAND_ECC_SOFT, | ||
99 | .parts = nand_partitions, | ||
100 | .num_parts = ARRAY_SIZE(nand_partitions), | ||
101 | }; | ||
102 | #endif | ||
103 | |||
104 | struct eth_addr { | ||
105 | u8 addr[6]; | ||
106 | }; | ||
107 | |||
108 | static struct eth_addr __initdata hw_addr[2]; | ||
109 | static struct macb_platform_data __initdata eth_data[2] = { | ||
110 | { | ||
111 | /* | ||
112 | * The MDIO pullups on STK1000 are a bit too weak for | ||
113 | * the autodetection to work properly, so we have to | ||
114 | * mask out everything but the correct address. | ||
115 | */ | ||
116 | .phy_mask = ~(1U << 16), | ||
117 | }, | ||
118 | { | ||
119 | .phy_mask = ~(1U << 17), | ||
120 | }, | ||
121 | }; | ||
122 | |||
123 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
124 | static struct at73c213_board_info at73c213_data = { | ||
125 | .ssc_id = 0, | ||
126 | .shortname = "AVR32 STK1000 external DAC", | ||
127 | }; | ||
128 | #endif | ||
129 | |||
130 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM | ||
131 | static struct spi_board_info spi0_board_info[] __initdata = { | ||
132 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
133 | { | ||
134 | /* AT73C213 */ | ||
135 | .modalias = "at73c213", | ||
136 | .max_speed_hz = 200000, | ||
137 | .chip_select = 0, | ||
138 | .mode = SPI_MODE_1, | ||
139 | .platform_data = &at73c213_data, | ||
140 | }, | ||
141 | #endif | ||
142 | { | ||
143 | /* QVGA display */ | ||
144 | .modalias = "ltv350qv", | ||
145 | .max_speed_hz = 16000000, | ||
146 | .chip_select = 1, | ||
147 | .mode = SPI_MODE_3, | ||
148 | }, | ||
149 | }; | ||
150 | #endif | ||
151 | |||
152 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 | ||
153 | static struct spi_board_info spi1_board_info[] __initdata = { { | ||
154 | /* patch in custom entries here */ | ||
155 | } }; | ||
156 | #endif | ||
157 | |||
158 | /* | ||
159 | * The next two functions should go away as the boot loader is | ||
160 | * supposed to initialize the macb address registers with a valid | ||
161 | * ethernet address. But we need to keep it around for a while until | ||
162 | * we can be reasonably sure the boot loader does this. | ||
163 | * | ||
164 | * The phy_id is ignored as the driver will probe for it. | ||
165 | */ | ||
166 | static int __init parse_tag_ethernet(struct tag *tag) | ||
167 | { | ||
168 | int i; | ||
169 | |||
170 | i = tag->u.ethernet.mac_index; | ||
171 | if (i < ARRAY_SIZE(hw_addr)) | ||
172 | memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, | ||
173 | sizeof(hw_addr[i].addr)); | ||
174 | |||
175 | return 0; | ||
176 | } | ||
177 | __tagtable(ATAG_ETHERNET, parse_tag_ethernet); | ||
178 | |||
179 | static void __init set_hw_addr(struct platform_device *pdev) | ||
180 | { | ||
181 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
182 | const u8 *addr; | ||
183 | void __iomem *regs; | ||
184 | struct clk *pclk; | ||
185 | |||
186 | if (!res) | ||
187 | return; | ||
188 | if (pdev->id >= ARRAY_SIZE(hw_addr)) | ||
189 | return; | ||
190 | |||
191 | addr = hw_addr[pdev->id].addr; | ||
192 | if (!is_valid_ether_addr(addr)) | ||
193 | return; | ||
194 | |||
195 | /* | ||
196 | * Since this is board-specific code, we'll cheat and use the | ||
197 | * physical address directly as we happen to know that it's | ||
198 | * the same as the virtual address. | ||
199 | */ | ||
200 | regs = (void __iomem __force *)res->start; | ||
201 | pclk = clk_get(&pdev->dev, "pclk"); | ||
202 | if (IS_ERR(pclk)) | ||
203 | return; | ||
204 | |||
205 | clk_enable(pclk); | ||
206 | __raw_writel((addr[3] << 24) | (addr[2] << 16) | ||
207 | | (addr[1] << 8) | addr[0], regs + 0x98); | ||
208 | __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); | ||
209 | clk_disable(pclk); | ||
210 | clk_put(pclk); | ||
211 | } | ||
212 | |||
213 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
214 | static void __init atstk1002_setup_extdac(void) | ||
215 | { | ||
216 | struct clk *gclk; | ||
217 | struct clk *pll; | ||
218 | |||
219 | gclk = clk_get(NULL, "gclk0"); | ||
220 | if (IS_ERR(gclk)) | ||
221 | goto err_gclk; | ||
222 | pll = clk_get(NULL, "pll0"); | ||
223 | if (IS_ERR(pll)) | ||
224 | goto err_pll; | ||
225 | |||
226 | if (clk_set_parent(gclk, pll)) { | ||
227 | pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); | ||
228 | goto err_set_clk; | ||
229 | } | ||
230 | |||
231 | at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0); | ||
232 | at73c213_data.dac_clk = gclk; | ||
233 | |||
234 | err_set_clk: | ||
235 | clk_put(pll); | ||
236 | err_pll: | ||
237 | clk_put(gclk); | ||
238 | err_gclk: | ||
239 | return; | ||
240 | } | ||
241 | #else | ||
242 | static void __init atstk1002_setup_extdac(void) | ||
243 | { | ||
244 | |||
245 | } | ||
246 | #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ | ||
247 | |||
248 | void __init setup_board(void) | ||
249 | { | ||
250 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
251 | at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */ | ||
252 | #else | ||
253 | at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */ | ||
254 | #endif | ||
255 | /* USART 2/unused: expansion connector */ | ||
256 | at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */ | ||
257 | |||
258 | at32_setup_serial_console(0); | ||
259 | } | ||
260 | |||
261 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
262 | |||
263 | static struct mci_platform_data __initdata mci0_data = { | ||
264 | .slot[0] = { | ||
265 | .bus_width = 4, | ||
266 | |||
267 | /* MMC card detect requires MACB0 *NOT* be used */ | ||
268 | #ifdef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM | ||
269 | .detect_pin = GPIO_PIN_PC(14), /* gpio30/sdcd */ | ||
270 | .wp_pin = GPIO_PIN_PC(15), /* gpio31/sdwp */ | ||
271 | #else | ||
272 | .detect_pin = -ENODEV, | ||
273 | .wp_pin = -ENODEV, | ||
274 | #endif /* SW6 for sd{cd,wp} routing */ | ||
275 | }, | ||
276 | }; | ||
277 | |||
278 | #endif /* SW2 for MMC signal routing */ | ||
279 | |||
280 | static int __init atstk1002_init(void) | ||
281 | { | ||
282 | /* | ||
283 | * ATSTK1000 uses 32-bit SDRAM interface. Reserve the | ||
284 | * SDRAM-specific pins so that nobody messes with them. | ||
285 | */ | ||
286 | at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); | ||
287 | |||
288 | #ifdef CONFIG_BOARD_ATSTK1006 | ||
289 | smc_set_timing(&nand_config, &nand_timing); | ||
290 | smc_set_configuration(3, &nand_config); | ||
291 | at32_add_device_nand(0, &atstk1006_nand_data); | ||
292 | #endif | ||
293 | |||
294 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
295 | at32_add_device_usart(1); | ||
296 | #else | ||
297 | at32_add_device_usart(0); | ||
298 | #endif | ||
299 | at32_add_device_usart(2); | ||
300 | |||
301 | #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM | ||
302 | set_hw_addr(at32_add_device_eth(0, ð_data[0])); | ||
303 | #endif | ||
304 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM | ||
305 | at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); | ||
306 | #endif | ||
307 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 | ||
308 | at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); | ||
309 | #endif | ||
310 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
311 | at32_add_device_mci(0, &mci0_data); | ||
312 | #endif | ||
313 | #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM | ||
314 | set_hw_addr(at32_add_device_eth(1, ð_data[1])); | ||
315 | #else | ||
316 | at32_add_device_lcdc(0, &atstk1000_lcdc_data, | ||
317 | fbmem_start, fbmem_size, | ||
318 | ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL); | ||
319 | #endif | ||
320 | at32_add_device_usba(0, NULL); | ||
321 | #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM | ||
322 | at32_add_device_ssc(0, ATMEL_SSC_TX); | ||
323 | #endif | ||
324 | |||
325 | atstk1000_setup_j2_leds(); | ||
326 | atstk1002_setup_extdac(); | ||
327 | |||
328 | return 0; | ||
329 | } | ||
330 | postcore_initcall(atstk1002_init); | ||
diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c deleted file mode 100644 index ff7e23298827..000000000000 --- a/arch/avr32/boards/atstk1000/atstk1003.c +++ /dev/null | |||
@@ -1,162 +0,0 @@ | |||
1 | /* | ||
2 | * ATSTK1003 daughterboard-specific init code | ||
3 | * | ||
4 | * Copyright (C) 2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/err.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/types.h> | ||
17 | |||
18 | #include <linux/spi/at73c213.h> | ||
19 | #include <linux/spi/spi.h> | ||
20 | #include <linux/atmel-mci.h> | ||
21 | |||
22 | #include <asm/setup.h> | ||
23 | |||
24 | #include <mach/at32ap700x.h> | ||
25 | #include <mach/board.h> | ||
26 | #include <mach/init.h> | ||
27 | #include <mach/portmux.h> | ||
28 | |||
29 | #include "atstk1000.h" | ||
30 | |||
31 | /* Oscillator frequencies. These are board specific */ | ||
32 | unsigned long at32_board_osc_rates[3] = { | ||
33 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
34 | [1] = 20000000, /* 20 MHz on osc0 */ | ||
35 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
36 | }; | ||
37 | |||
38 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
39 | static struct at73c213_board_info at73c213_data = { | ||
40 | .ssc_id = 0, | ||
41 | .shortname = "AVR32 STK1000 external DAC", | ||
42 | }; | ||
43 | #endif | ||
44 | |||
45 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM | ||
46 | static struct spi_board_info spi0_board_info[] __initdata = { | ||
47 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
48 | { | ||
49 | /* AT73C213 */ | ||
50 | .modalias = "at73c213", | ||
51 | .max_speed_hz = 200000, | ||
52 | .chip_select = 0, | ||
53 | .mode = SPI_MODE_1, | ||
54 | .platform_data = &at73c213_data, | ||
55 | }, | ||
56 | #endif | ||
57 | /* | ||
58 | * We can control the LTV350QV LCD panel, but it isn't much | ||
59 | * point since we don't have an LCD controller... | ||
60 | */ | ||
61 | }; | ||
62 | #endif | ||
63 | |||
64 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 | ||
65 | static struct spi_board_info spi1_board_info[] __initdata = { { | ||
66 | /* patch in custom entries here */ | ||
67 | } }; | ||
68 | #endif | ||
69 | |||
70 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
71 | static struct mci_platform_data __initdata mci0_data = { | ||
72 | .slot[0] = { | ||
73 | .bus_width = 4, | ||
74 | .detect_pin = -ENODEV, | ||
75 | .wp_pin = -ENODEV, | ||
76 | }, | ||
77 | }; | ||
78 | #endif | ||
79 | |||
80 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
81 | static void __init atstk1003_setup_extdac(void) | ||
82 | { | ||
83 | struct clk *gclk; | ||
84 | struct clk *pll; | ||
85 | |||
86 | gclk = clk_get(NULL, "gclk0"); | ||
87 | if (IS_ERR(gclk)) | ||
88 | goto err_gclk; | ||
89 | pll = clk_get(NULL, "pll0"); | ||
90 | if (IS_ERR(pll)) | ||
91 | goto err_pll; | ||
92 | |||
93 | if (clk_set_parent(gclk, pll)) { | ||
94 | pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); | ||
95 | goto err_set_clk; | ||
96 | } | ||
97 | |||
98 | at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0); | ||
99 | at73c213_data.dac_clk = gclk; | ||
100 | |||
101 | err_set_clk: | ||
102 | clk_put(pll); | ||
103 | err_pll: | ||
104 | clk_put(gclk); | ||
105 | err_gclk: | ||
106 | return; | ||
107 | } | ||
108 | #else | ||
109 | static void __init atstk1003_setup_extdac(void) | ||
110 | { | ||
111 | |||
112 | } | ||
113 | #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ | ||
114 | |||
115 | void __init setup_board(void) | ||
116 | { | ||
117 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
118 | at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */ | ||
119 | #else | ||
120 | at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */ | ||
121 | #endif | ||
122 | /* USART 2/unused: expansion connector */ | ||
123 | at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */ | ||
124 | |||
125 | at32_setup_serial_console(0); | ||
126 | } | ||
127 | |||
128 | static int __init atstk1003_init(void) | ||
129 | { | ||
130 | /* | ||
131 | * ATSTK1000 uses 32-bit SDRAM interface. Reserve the | ||
132 | * SDRAM-specific pins so that nobody messes with them. | ||
133 | */ | ||
134 | at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); | ||
135 | |||
136 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
137 | at32_add_device_usart(1); | ||
138 | #else | ||
139 | at32_add_device_usart(0); | ||
140 | #endif | ||
141 | at32_add_device_usart(2); | ||
142 | |||
143 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM | ||
144 | at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); | ||
145 | #endif | ||
146 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 | ||
147 | at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); | ||
148 | #endif | ||
149 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
150 | at32_add_device_mci(0, &mci0_data); | ||
151 | #endif | ||
152 | at32_add_device_usba(0, NULL); | ||
153 | #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM | ||
154 | at32_add_device_ssc(0, ATMEL_SSC_TX); | ||
155 | #endif | ||
156 | |||
157 | atstk1000_setup_j2_leds(); | ||
158 | atstk1003_setup_extdac(); | ||
159 | |||
160 | return 0; | ||
161 | } | ||
162 | postcore_initcall(atstk1003_init); | ||
diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c deleted file mode 100644 index 69a9f0f08c6e..000000000000 --- a/arch/avr32/boards/atstk1000/atstk1004.c +++ /dev/null | |||
@@ -1,164 +0,0 @@ | |||
1 | /* | ||
2 | * ATSTK1003 daughterboard-specific init code | ||
3 | * | ||
4 | * Copyright (C) 2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/err.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/types.h> | ||
17 | |||
18 | #include <linux/spi/at73c213.h> | ||
19 | #include <linux/spi/spi.h> | ||
20 | #include <linux/atmel-mci.h> | ||
21 | |||
22 | #include <video/atmel_lcdc.h> | ||
23 | |||
24 | #include <asm/setup.h> | ||
25 | |||
26 | #include <mach/at32ap700x.h> | ||
27 | #include <mach/board.h> | ||
28 | #include <mach/init.h> | ||
29 | #include <mach/portmux.h> | ||
30 | |||
31 | #include "atstk1000.h" | ||
32 | |||
33 | /* Oscillator frequencies. These are board specific */ | ||
34 | unsigned long at32_board_osc_rates[3] = { | ||
35 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
36 | [1] = 20000000, /* 20 MHz on osc0 */ | ||
37 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
38 | }; | ||
39 | |||
40 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
41 | static struct at73c213_board_info at73c213_data = { | ||
42 | .ssc_id = 0, | ||
43 | .shortname = "AVR32 STK1000 external DAC", | ||
44 | }; | ||
45 | #endif | ||
46 | |||
47 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM | ||
48 | static struct spi_board_info spi0_board_info[] __initdata = { | ||
49 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
50 | { | ||
51 | /* AT73C213 */ | ||
52 | .modalias = "at73c213", | ||
53 | .max_speed_hz = 200000, | ||
54 | .chip_select = 0, | ||
55 | .mode = SPI_MODE_1, | ||
56 | .platform_data = &at73c213_data, | ||
57 | }, | ||
58 | #endif | ||
59 | { | ||
60 | /* QVGA display */ | ||
61 | .modalias = "ltv350qv", | ||
62 | .max_speed_hz = 16000000, | ||
63 | .chip_select = 1, | ||
64 | .mode = SPI_MODE_3, | ||
65 | }, | ||
66 | }; | ||
67 | #endif | ||
68 | |||
69 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 | ||
70 | static struct spi_board_info spi1_board_info[] __initdata = { { | ||
71 | /* patch in custom entries here */ | ||
72 | } }; | ||
73 | #endif | ||
74 | |||
75 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
76 | static struct mci_platform_data __initdata mci0_data = { | ||
77 | .slot[0] = { | ||
78 | .bus_width = 4, | ||
79 | .detect_pin = -ENODEV, | ||
80 | .wp_pin = -ENODEV, | ||
81 | }, | ||
82 | }; | ||
83 | #endif | ||
84 | |||
85 | #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC | ||
86 | static void __init atstk1004_setup_extdac(void) | ||
87 | { | ||
88 | struct clk *gclk; | ||
89 | struct clk *pll; | ||
90 | |||
91 | gclk = clk_get(NULL, "gclk0"); | ||
92 | if (IS_ERR(gclk)) | ||
93 | goto err_gclk; | ||
94 | pll = clk_get(NULL, "pll0"); | ||
95 | if (IS_ERR(pll)) | ||
96 | goto err_pll; | ||
97 | |||
98 | if (clk_set_parent(gclk, pll)) { | ||
99 | pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); | ||
100 | goto err_set_clk; | ||
101 | } | ||
102 | |||
103 | at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0); | ||
104 | at73c213_data.dac_clk = gclk; | ||
105 | |||
106 | err_set_clk: | ||
107 | clk_put(pll); | ||
108 | err_pll: | ||
109 | clk_put(gclk); | ||
110 | err_gclk: | ||
111 | return; | ||
112 | } | ||
113 | #else | ||
114 | static void __init atstk1004_setup_extdac(void) | ||
115 | { | ||
116 | |||
117 | } | ||
118 | #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ | ||
119 | |||
120 | void __init setup_board(void) | ||
121 | { | ||
122 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
123 | at32_map_usart(0, 1, 0); /* USART 0/B: /dev/ttyS1, IRDA */ | ||
124 | #else | ||
125 | at32_map_usart(1, 0, 0); /* USART 1/A: /dev/ttyS0, DB9 */ | ||
126 | #endif | ||
127 | /* USART 2/unused: expansion connector */ | ||
128 | at32_map_usart(3, 2, 0); /* USART 3/C: /dev/ttyS2, DB9 */ | ||
129 | |||
130 | at32_setup_serial_console(0); | ||
131 | } | ||
132 | |||
133 | static int __init atstk1004_init(void) | ||
134 | { | ||
135 | #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
136 | at32_add_device_usart(1); | ||
137 | #else | ||
138 | at32_add_device_usart(0); | ||
139 | #endif | ||
140 | at32_add_device_usart(2); | ||
141 | |||
142 | #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM | ||
143 | at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); | ||
144 | #endif | ||
145 | #ifdef CONFIG_BOARD_ATSTK100X_SPI1 | ||
146 | at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); | ||
147 | #endif | ||
148 | #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM | ||
149 | at32_add_device_mci(0, &mci0_data); | ||
150 | #endif | ||
151 | at32_add_device_lcdc(0, &atstk1000_lcdc_data, | ||
152 | fbmem_start, fbmem_size, | ||
153 | ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL); | ||
154 | at32_add_device_usba(0, NULL); | ||
155 | #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM | ||
156 | at32_add_device_ssc(0, ATMEL_SSC_TX); | ||
157 | #endif | ||
158 | |||
159 | atstk1000_setup_j2_leds(); | ||
160 | atstk1004_setup_extdac(); | ||
161 | |||
162 | return 0; | ||
163 | } | ||
164 | postcore_initcall(atstk1004_init); | ||
diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c deleted file mode 100644 index 6e4d561977ff..000000000000 --- a/arch/avr32/boards/atstk1000/flash.c +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | /* | ||
2 | * ATSTK1000 board-specific flash initialization | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/mtd/mtd.h> | ||
13 | #include <linux/mtd/partitions.h> | ||
14 | #include <linux/mtd/physmap.h> | ||
15 | |||
16 | #include <mach/smc.h> | ||
17 | |||
18 | static struct smc_timing flash_timing __initdata = { | ||
19 | .ncs_read_setup = 0, | ||
20 | .nrd_setup = 40, | ||
21 | .ncs_write_setup = 0, | ||
22 | .nwe_setup = 10, | ||
23 | |||
24 | .ncs_read_pulse = 80, | ||
25 | .nrd_pulse = 40, | ||
26 | .ncs_write_pulse = 65, | ||
27 | .nwe_pulse = 55, | ||
28 | |||
29 | .read_cycle = 120, | ||
30 | .write_cycle = 120, | ||
31 | }; | ||
32 | |||
33 | static struct smc_config flash_config __initdata = { | ||
34 | .bus_width = 2, | ||
35 | .nrd_controlled = 1, | ||
36 | .nwe_controlled = 1, | ||
37 | .byte_write = 1, | ||
38 | }; | ||
39 | |||
40 | static struct mtd_partition flash_parts[] = { | ||
41 | { | ||
42 | .name = "u-boot", | ||
43 | .offset = 0x00000000, | ||
44 | .size = 0x00020000, /* 128 KiB */ | ||
45 | .mask_flags = MTD_WRITEABLE, | ||
46 | }, | ||
47 | { | ||
48 | .name = "root", | ||
49 | .offset = 0x00020000, | ||
50 | .size = 0x007d0000, | ||
51 | }, | ||
52 | { | ||
53 | .name = "env", | ||
54 | .offset = 0x007f0000, | ||
55 | .size = 0x00010000, | ||
56 | .mask_flags = MTD_WRITEABLE, | ||
57 | }, | ||
58 | }; | ||
59 | |||
60 | static struct physmap_flash_data flash_data = { | ||
61 | .width = 2, | ||
62 | .nr_parts = ARRAY_SIZE(flash_parts), | ||
63 | .parts = flash_parts, | ||
64 | }; | ||
65 | |||
66 | static struct resource flash_resource = { | ||
67 | .start = 0x00000000, | ||
68 | .end = 0x007fffff, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }; | ||
71 | |||
72 | static struct platform_device flash_device = { | ||
73 | .name = "physmap-flash", | ||
74 | .id = 0, | ||
75 | .resource = &flash_resource, | ||
76 | .num_resources = 1, | ||
77 | .dev = { | ||
78 | .platform_data = &flash_data, | ||
79 | }, | ||
80 | }; | ||
81 | |||
82 | /* This needs to be called after the SMC has been initialized */ | ||
83 | static int __init atstk1000_flash_init(void) | ||
84 | { | ||
85 | int ret; | ||
86 | |||
87 | smc_set_timing(&flash_config, &flash_timing); | ||
88 | ret = smc_set_configuration(0, &flash_config); | ||
89 | if (ret < 0) { | ||
90 | printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n"); | ||
91 | return ret; | ||
92 | } | ||
93 | |||
94 | platform_device_register(&flash_device); | ||
95 | |||
96 | return 0; | ||
97 | } | ||
98 | device_initcall(atstk1000_flash_init); | ||
diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c deleted file mode 100644 index b6b88f5e0b43..000000000000 --- a/arch/avr32/boards/atstk1000/setup.c +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | /* | ||
2 | * ATSTK1000 board-specific setup code. | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/bootmem.h> | ||
11 | #include <linux/fb.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/linkage.h> | ||
16 | |||
17 | #include <video/atmel_lcdc.h> | ||
18 | |||
19 | #include <asm/setup.h> | ||
20 | |||
21 | #include <mach/at32ap700x.h> | ||
22 | #include <mach/board.h> | ||
23 | #include <mach/portmux.h> | ||
24 | |||
25 | #include "atstk1000.h" | ||
26 | |||
27 | /* Initialized by bootloader-specific startup code. */ | ||
28 | struct tag *bootloader_tags __initdata; | ||
29 | |||
30 | static struct fb_videomode __initdata ltv350qv_modes[] = { | ||
31 | { | ||
32 | .name = "320x240 @ 75", | ||
33 | .refresh = 75, | ||
34 | .xres = 320, .yres = 240, | ||
35 | .pixclock = KHZ2PICOS(6891), | ||
36 | |||
37 | .left_margin = 17, .right_margin = 33, | ||
38 | .upper_margin = 10, .lower_margin = 10, | ||
39 | .hsync_len = 16, .vsync_len = 1, | ||
40 | |||
41 | .sync = 0, | ||
42 | .vmode = FB_VMODE_NONINTERLACED, | ||
43 | }, | ||
44 | }; | ||
45 | |||
46 | static struct fb_monspecs __initdata atstk1000_default_monspecs = { | ||
47 | .manufacturer = "SNG", | ||
48 | .monitor = "LTV350QV", | ||
49 | .modedb = ltv350qv_modes, | ||
50 | .modedb_len = ARRAY_SIZE(ltv350qv_modes), | ||
51 | .hfmin = 14820, | ||
52 | .hfmax = 22230, | ||
53 | .vfmin = 60, | ||
54 | .vfmax = 90, | ||
55 | .dclkmax = 30000000, | ||
56 | }; | ||
57 | |||
58 | struct atmel_lcdfb_pdata __initdata atstk1000_lcdc_data = { | ||
59 | .default_bpp = 24, | ||
60 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
61 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
62 | | ATMEL_LCDC_INVCLK | ||
63 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
64 | | ATMEL_LCDC_MEMOR_BIG), | ||
65 | .default_monspecs = &atstk1000_default_monspecs, | ||
66 | .guard_time = 2, | ||
67 | }; | ||
68 | |||
69 | #ifdef CONFIG_BOARD_ATSTK1000_J2_LED | ||
70 | #include <linux/leds.h> | ||
71 | |||
72 | static struct gpio_led stk1000_j2_led[] = { | ||
73 | #ifdef CONFIG_BOARD_ATSTK1000_J2_LED8 | ||
74 | #define LEDSTRING "J2 jumpered to LED8" | ||
75 | { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, | ||
76 | { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, | ||
77 | { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, | ||
78 | { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, | ||
79 | { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, | ||
80 | { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, | ||
81 | { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, | ||
82 | { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), | ||
83 | .default_trigger = "heartbeat", }, | ||
84 | #else /* RGB */ | ||
85 | #define LEDSTRING "J2 jumpered to RGB LEDs" | ||
86 | { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, | ||
87 | { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, | ||
88 | { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, | ||
89 | |||
90 | { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), | ||
91 | .default_trigger = "heartbeat", }, | ||
92 | { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, | ||
93 | { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), | ||
94 | .default_trigger = "heartbeat", }, | ||
95 | /* PB16, PB30 unused */ | ||
96 | #endif | ||
97 | }; | ||
98 | |||
99 | static struct gpio_led_platform_data stk1000_j2_led_data = { | ||
100 | .num_leds = ARRAY_SIZE(stk1000_j2_led), | ||
101 | .leds = stk1000_j2_led, | ||
102 | }; | ||
103 | |||
104 | static struct platform_device stk1000_j2_led_dev = { | ||
105 | .name = "leds-gpio", | ||
106 | .id = 2, /* gpio block J2 */ | ||
107 | .dev = { | ||
108 | .platform_data = &stk1000_j2_led_data, | ||
109 | }, | ||
110 | }; | ||
111 | |||
112 | void __init atstk1000_setup_j2_leds(void) | ||
113 | { | ||
114 | unsigned i; | ||
115 | |||
116 | for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++) | ||
117 | at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT); | ||
118 | |||
119 | printk("STK1000: " LEDSTRING "\n"); | ||
120 | platform_device_register(&stk1000_j2_led_dev); | ||
121 | } | ||
122 | #else /* CONFIG_BOARD_ATSTK1000_J2_LED */ | ||
123 | void __init atstk1000_setup_j2_leds(void) | ||
124 | { | ||
125 | |||
126 | } | ||
127 | #endif /* CONFIG_BOARD_ATSTK1000_J2_LED */ | ||
diff --git a/arch/avr32/boards/favr-32/Kconfig b/arch/avr32/boards/favr-32/Kconfig deleted file mode 100644 index 2c83d1ddcaec..000000000000 --- a/arch/avr32/boards/favr-32/Kconfig +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | # Favr-32 customization | ||
2 | |||
3 | if BOARD_FAVR_32 | ||
4 | |||
5 | config BOARD_FAVR32_ABDAC_RATE | ||
6 | int "DAC target rate" | ||
7 | default 44100 | ||
8 | range 32000 50000 | ||
9 | help | ||
10 | Specify the target rate the internal DAC should try to match. This | ||
11 | will use PLL1 to generate a frequency as close as possible to this | ||
12 | rate. | ||
13 | |||
14 | Must be within the range 32000 to 50000, which should be suitable to | ||
15 | generate most other frequencies in power of 2 steps. | ||
16 | |||
17 | Ex: | ||
18 | 48000 will also suit 24000 and 12000 | ||
19 | 44100 will also suit 22050 and 11025 | ||
20 | 32000 will also suit 16000 and 8000 | ||
21 | |||
22 | endif # BOARD_FAVR_32 | ||
diff --git a/arch/avr32/boards/favr-32/Makefile b/arch/avr32/boards/favr-32/Makefile deleted file mode 100644 index 234f21508e4b..000000000000 --- a/arch/avr32/boards/favr-32/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y += setup.o flash.o | ||
diff --git a/arch/avr32/boards/favr-32/flash.c b/arch/avr32/boards/favr-32/flash.c deleted file mode 100644 index 604bbd5e41d9..000000000000 --- a/arch/avr32/boards/favr-32/flash.c +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | /* | ||
2 | * Favr-32 board-specific flash initialization | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/mtd/mtd.h> | ||
13 | #include <linux/mtd/partitions.h> | ||
14 | #include <linux/mtd/physmap.h> | ||
15 | |||
16 | #include <mach/smc.h> | ||
17 | |||
18 | static struct smc_timing flash_timing __initdata = { | ||
19 | .ncs_read_setup = 0, | ||
20 | .nrd_setup = 40, | ||
21 | .ncs_write_setup = 0, | ||
22 | .nwe_setup = 10, | ||
23 | |||
24 | .ncs_read_pulse = 80, | ||
25 | .nrd_pulse = 40, | ||
26 | .ncs_write_pulse = 65, | ||
27 | .nwe_pulse = 55, | ||
28 | |||
29 | .read_cycle = 120, | ||
30 | .write_cycle = 120, | ||
31 | }; | ||
32 | |||
33 | static struct smc_config flash_config __initdata = { | ||
34 | .bus_width = 2, | ||
35 | .nrd_controlled = 1, | ||
36 | .nwe_controlled = 1, | ||
37 | .byte_write = 1, | ||
38 | }; | ||
39 | |||
40 | static struct mtd_partition flash_parts[] = { | ||
41 | { | ||
42 | .name = "u-boot", | ||
43 | .offset = 0x00000000, | ||
44 | .size = 0x00020000, /* 128 KiB */ | ||
45 | .mask_flags = MTD_WRITEABLE, | ||
46 | }, | ||
47 | { | ||
48 | .name = "root", | ||
49 | .offset = 0x00020000, | ||
50 | .size = 0x007d0000, | ||
51 | }, | ||
52 | { | ||
53 | .name = "env", | ||
54 | .offset = 0x007f0000, | ||
55 | .size = 0x00010000, | ||
56 | .mask_flags = MTD_WRITEABLE, | ||
57 | }, | ||
58 | }; | ||
59 | |||
60 | static struct physmap_flash_data flash_data = { | ||
61 | .width = 2, | ||
62 | .nr_parts = ARRAY_SIZE(flash_parts), | ||
63 | .parts = flash_parts, | ||
64 | }; | ||
65 | |||
66 | static struct resource flash_resource = { | ||
67 | .start = 0x00000000, | ||
68 | .end = 0x007fffff, | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | }; | ||
71 | |||
72 | static struct platform_device flash_device = { | ||
73 | .name = "physmap-flash", | ||
74 | .id = 0, | ||
75 | .resource = &flash_resource, | ||
76 | .num_resources = 1, | ||
77 | .dev = { | ||
78 | .platform_data = &flash_data, | ||
79 | }, | ||
80 | }; | ||
81 | |||
82 | /* This needs to be called after the SMC has been initialized */ | ||
83 | static int __init favr32_flash_init(void) | ||
84 | { | ||
85 | int ret; | ||
86 | |||
87 | smc_set_timing(&flash_config, &flash_timing); | ||
88 | ret = smc_set_configuration(0, &flash_config); | ||
89 | if (ret < 0) { | ||
90 | printk(KERN_ERR "Favr-32: failed to set NOR flash timing\n"); | ||
91 | return ret; | ||
92 | } | ||
93 | |||
94 | platform_device_register(&flash_device); | ||
95 | |||
96 | return 0; | ||
97 | } | ||
98 | device_initcall(favr32_flash_init); | ||
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c deleted file mode 100644 index 234cb071c601..000000000000 --- a/arch/avr32/boards/favr-32/setup.c +++ /dev/null | |||
@@ -1,366 +0,0 @@ | |||
1 | /* | ||
2 | * Favr-32 board-specific setup code. | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/etherdevice.h> | ||
12 | #include <linux/bootmem.h> | ||
13 | #include <linux/fb.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/linkage.h> | ||
18 | #include <linux/gpio.h> | ||
19 | #include <linux/leds.h> | ||
20 | #include <linux/atmel-mci.h> | ||
21 | #include <linux/pwm.h> | ||
22 | #include <linux/pwm_backlight.h> | ||
23 | #include <linux/regulator/fixed.h> | ||
24 | #include <linux/regulator/machine.h> | ||
25 | #include <linux/spi/spi.h> | ||
26 | #include <linux/spi/ads7846.h> | ||
27 | |||
28 | #include <sound/atmel-abdac.h> | ||
29 | |||
30 | #include <video/atmel_lcdc.h> | ||
31 | |||
32 | #include <asm/setup.h> | ||
33 | |||
34 | #include <mach/at32ap700x.h> | ||
35 | #include <mach/init.h> | ||
36 | #include <mach/board.h> | ||
37 | #include <mach/portmux.h> | ||
38 | |||
39 | #define PWM_BL_CH 2 | ||
40 | |||
41 | /* Oscillator frequencies. These are board-specific */ | ||
42 | unsigned long at32_board_osc_rates[3] = { | ||
43 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
44 | [1] = 20000000, /* 20 MHz on osc0 */ | ||
45 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
46 | }; | ||
47 | |||
48 | /* Initialized by bootloader-specific startup code. */ | ||
49 | struct tag *bootloader_tags __initdata; | ||
50 | |||
51 | static struct atmel_abdac_pdata __initdata abdac0_data = { | ||
52 | }; | ||
53 | |||
54 | struct eth_addr { | ||
55 | u8 addr[6]; | ||
56 | }; | ||
57 | static struct eth_addr __initdata hw_addr[1]; | ||
58 | static struct macb_platform_data __initdata eth_data[1] = { | ||
59 | { | ||
60 | .phy_mask = ~(1U << 1), | ||
61 | }, | ||
62 | }; | ||
63 | |||
64 | static int ads7843_get_pendown_state(void) | ||
65 | { | ||
66 | return !gpio_get_value(GPIO_PIN_PB(3)); | ||
67 | } | ||
68 | |||
69 | static struct ads7846_platform_data ads7843_data = { | ||
70 | .model = 7843, | ||
71 | .get_pendown_state = ads7843_get_pendown_state, | ||
72 | .pressure_max = 255, | ||
73 | /* | ||
74 | * Values below are for debounce filtering, these can be experimented | ||
75 | * with further. | ||
76 | */ | ||
77 | .debounce_max = 20, | ||
78 | .debounce_rep = 4, | ||
79 | .debounce_tol = 5, | ||
80 | |||
81 | .keep_vref_on = true, | ||
82 | .settle_delay_usecs = 500, | ||
83 | .penirq_recheck_delay_usecs = 100, | ||
84 | }; | ||
85 | |||
86 | static struct spi_board_info __initdata spi1_board_info[] = { | ||
87 | { | ||
88 | /* ADS7843 touch controller */ | ||
89 | .modalias = "ads7846", | ||
90 | .max_speed_hz = 2000000, | ||
91 | .chip_select = 0, | ||
92 | .bus_num = 1, | ||
93 | .platform_data = &ads7843_data, | ||
94 | }, | ||
95 | }; | ||
96 | |||
97 | static struct mci_platform_data __initdata mci0_data = { | ||
98 | .slot[0] = { | ||
99 | .bus_width = 4, | ||
100 | .detect_pin = -ENODEV, | ||
101 | .wp_pin = -ENODEV, | ||
102 | }, | ||
103 | }; | ||
104 | |||
105 | static struct fb_videomode __initdata lb104v03_modes[] = { | ||
106 | { | ||
107 | .name = "640x480 @ 50", | ||
108 | .refresh = 50, | ||
109 | .xres = 640, .yres = 480, | ||
110 | .pixclock = KHZ2PICOS(25100), | ||
111 | |||
112 | .left_margin = 90, .right_margin = 70, | ||
113 | .upper_margin = 30, .lower_margin = 15, | ||
114 | .hsync_len = 12, .vsync_len = 2, | ||
115 | |||
116 | .sync = 0, | ||
117 | .vmode = FB_VMODE_NONINTERLACED, | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | static struct fb_monspecs __initdata favr32_default_monspecs = { | ||
122 | .manufacturer = "LG", | ||
123 | .monitor = "LB104V03", | ||
124 | .modedb = lb104v03_modes, | ||
125 | .modedb_len = ARRAY_SIZE(lb104v03_modes), | ||
126 | .hfmin = 27273, | ||
127 | .hfmax = 31111, | ||
128 | .vfmin = 45, | ||
129 | .vfmax = 60, | ||
130 | .dclkmax = 28000000, | ||
131 | }; | ||
132 | |||
133 | struct atmel_lcdfb_pdata __initdata favr32_lcdc_data = { | ||
134 | .default_bpp = 16, | ||
135 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
136 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
137 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
138 | | ATMEL_LCDC_MEMOR_BIG), | ||
139 | .default_monspecs = &favr32_default_monspecs, | ||
140 | .guard_time = 2, | ||
141 | }; | ||
142 | |||
143 | static struct gpio_led favr32_leds[] = { | ||
144 | { | ||
145 | .name = "green", | ||
146 | .gpio = GPIO_PIN_PE(19), | ||
147 | .default_trigger = "heartbeat", | ||
148 | .active_low = 1, | ||
149 | }, | ||
150 | { | ||
151 | .name = "red", | ||
152 | .gpio = GPIO_PIN_PE(20), | ||
153 | .active_low = 1, | ||
154 | }, | ||
155 | }; | ||
156 | |||
157 | static struct gpio_led_platform_data favr32_led_data = { | ||
158 | .num_leds = ARRAY_SIZE(favr32_leds), | ||
159 | .leds = favr32_leds, | ||
160 | }; | ||
161 | |||
162 | static struct platform_device favr32_led_dev = { | ||
163 | .name = "leds-gpio", | ||
164 | .id = 0, | ||
165 | .dev = { | ||
166 | .platform_data = &favr32_led_data, | ||
167 | }, | ||
168 | }; | ||
169 | |||
170 | /* | ||
171 | * The next two functions should go away as the boot loader is | ||
172 | * supposed to initialize the macb address registers with a valid | ||
173 | * ethernet address. But we need to keep it around for a while until | ||
174 | * we can be reasonably sure the boot loader does this. | ||
175 | * | ||
176 | * The phy_id is ignored as the driver will probe for it. | ||
177 | */ | ||
178 | static int __init parse_tag_ethernet(struct tag *tag) | ||
179 | { | ||
180 | int i; | ||
181 | |||
182 | i = tag->u.ethernet.mac_index; | ||
183 | if (i < ARRAY_SIZE(hw_addr)) | ||
184 | memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, | ||
185 | sizeof(hw_addr[i].addr)); | ||
186 | |||
187 | return 0; | ||
188 | } | ||
189 | __tagtable(ATAG_ETHERNET, parse_tag_ethernet); | ||
190 | |||
191 | static void __init set_hw_addr(struct platform_device *pdev) | ||
192 | { | ||
193 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
194 | const u8 *addr; | ||
195 | void __iomem *regs; | ||
196 | struct clk *pclk; | ||
197 | |||
198 | if (!res) | ||
199 | return; | ||
200 | if (pdev->id >= ARRAY_SIZE(hw_addr)) | ||
201 | return; | ||
202 | |||
203 | addr = hw_addr[pdev->id].addr; | ||
204 | if (!is_valid_ether_addr(addr)) | ||
205 | return; | ||
206 | |||
207 | /* | ||
208 | * Since this is board-specific code, we'll cheat and use the | ||
209 | * physical address directly as we happen to know that it's | ||
210 | * the same as the virtual address. | ||
211 | */ | ||
212 | regs = (void __iomem __force *)res->start; | ||
213 | pclk = clk_get(&pdev->dev, "pclk"); | ||
214 | if (IS_ERR(pclk)) | ||
215 | return; | ||
216 | |||
217 | clk_enable(pclk); | ||
218 | __raw_writel((addr[3] << 24) | (addr[2] << 16) | ||
219 | | (addr[1] << 8) | addr[0], regs + 0x98); | ||
220 | __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); | ||
221 | clk_disable(pclk); | ||
222 | clk_put(pclk); | ||
223 | } | ||
224 | |||
225 | void __init favr32_setup_leds(void) | ||
226 | { | ||
227 | unsigned i; | ||
228 | |||
229 | for (i = 0; i < ARRAY_SIZE(favr32_leds); i++) | ||
230 | at32_select_gpio(favr32_leds[i].gpio, AT32_GPIOF_OUTPUT); | ||
231 | |||
232 | platform_device_register(&favr32_led_dev); | ||
233 | } | ||
234 | |||
235 | static struct pwm_lookup pwm_lookup[] = { | ||
236 | PWM_LOOKUP("at91sam9rl-pwm", PWM_BL_CH, "pwm-backlight.0", NULL, | ||
237 | 5000, PWM_POLARITY_INVERSED), | ||
238 | }; | ||
239 | |||
240 | static struct regulator_consumer_supply fixed_power_consumers[] = { | ||
241 | REGULATOR_SUPPLY("power", "pwm-backlight.0"), | ||
242 | }; | ||
243 | |||
244 | static struct platform_pwm_backlight_data pwm_bl_data = { | ||
245 | .enable_gpio = GPIO_PIN_PA(28), | ||
246 | .max_brightness = 255, | ||
247 | .dft_brightness = 255, | ||
248 | .lth_brightness = 50, | ||
249 | }; | ||
250 | |||
251 | static struct platform_device pwm_bl_device = { | ||
252 | .name = "pwm-backlight", | ||
253 | .dev = { | ||
254 | .platform_data = &pwm_bl_data, | ||
255 | }, | ||
256 | }; | ||
257 | |||
258 | static void __init favr32_setup_atmel_pwm_bl(void) | ||
259 | { | ||
260 | pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup)); | ||
261 | regulator_register_always_on(0, "fixed", fixed_power_consumers, | ||
262 | ARRAY_SIZE(fixed_power_consumers), 3300000); | ||
263 | platform_device_register(&pwm_bl_device); | ||
264 | at32_select_gpio(pwm_bl_data.enable_gpio, 0); | ||
265 | } | ||
266 | |||
267 | void __init setup_board(void) | ||
268 | { | ||
269 | at32_map_usart(3, 0, 0); /* USART 3 => /dev/ttyS0 */ | ||
270 | at32_setup_serial_console(0); | ||
271 | } | ||
272 | |||
273 | static int __init set_abdac_rate(struct platform_device *pdev) | ||
274 | { | ||
275 | int retval; | ||
276 | struct clk *osc1; | ||
277 | struct clk *pll1; | ||
278 | struct clk *abdac; | ||
279 | |||
280 | if (pdev == NULL) | ||
281 | return -ENXIO; | ||
282 | |||
283 | osc1 = clk_get(NULL, "osc1"); | ||
284 | if (IS_ERR(osc1)) { | ||
285 | retval = PTR_ERR(osc1); | ||
286 | goto out; | ||
287 | } | ||
288 | |||
289 | pll1 = clk_get(NULL, "pll1"); | ||
290 | if (IS_ERR(pll1)) { | ||
291 | retval = PTR_ERR(pll1); | ||
292 | goto out_osc1; | ||
293 | } | ||
294 | |||
295 | abdac = clk_get(&pdev->dev, "sample_clk"); | ||
296 | if (IS_ERR(abdac)) { | ||
297 | retval = PTR_ERR(abdac); | ||
298 | goto out_pll1; | ||
299 | } | ||
300 | |||
301 | retval = clk_set_parent(pll1, osc1); | ||
302 | if (retval != 0) | ||
303 | goto out_abdac; | ||
304 | |||
305 | /* | ||
306 | * Rate is 32000 to 50000 and ABDAC oversamples 256x. Multiply, in | ||
307 | * power of 2, to a value above 80 MHz. Power of 2 so it is possible | ||
308 | * for the generic clock to divide it down again and 80 MHz is the | ||
309 | * lowest frequency for the PLL. | ||
310 | */ | ||
311 | retval = clk_round_rate(pll1, | ||
312 | CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16); | ||
313 | if (retval <= 0) { | ||
314 | retval = -EINVAL; | ||
315 | goto out_abdac; | ||
316 | } | ||
317 | |||
318 | retval = clk_set_rate(pll1, retval); | ||
319 | if (retval != 0) | ||
320 | goto out_abdac; | ||
321 | |||
322 | retval = clk_set_parent(abdac, pll1); | ||
323 | if (retval != 0) | ||
324 | goto out_abdac; | ||
325 | |||
326 | out_abdac: | ||
327 | clk_put(abdac); | ||
328 | out_pll1: | ||
329 | clk_put(pll1); | ||
330 | out_osc1: | ||
331 | clk_put(osc1); | ||
332 | out: | ||
333 | return retval; | ||
334 | } | ||
335 | |||
336 | static int __init favr32_init(void) | ||
337 | { | ||
338 | /* | ||
339 | * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific | ||
340 | * pins so that nobody messes with them. | ||
341 | */ | ||
342 | at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); | ||
343 | |||
344 | at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */ | ||
345 | |||
346 | at32_add_device_usart(0); | ||
347 | |||
348 | set_hw_addr(at32_add_device_eth(0, ð_data[0])); | ||
349 | |||
350 | spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3)); | ||
351 | |||
352 | set_abdac_rate(at32_add_device_abdac(0, &abdac0_data)); | ||
353 | |||
354 | at32_add_device_pwm(1 << PWM_BL_CH); | ||
355 | at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); | ||
356 | at32_add_device_mci(0, &mci0_data); | ||
357 | at32_add_device_usba(0, NULL); | ||
358 | at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0); | ||
359 | |||
360 | favr32_setup_leds(); | ||
361 | |||
362 | favr32_setup_atmel_pwm_bl(); | ||
363 | |||
364 | return 0; | ||
365 | } | ||
366 | postcore_initcall(favr32_init); | ||
diff --git a/arch/avr32/boards/hammerhead/Kconfig b/arch/avr32/boards/hammerhead/Kconfig deleted file mode 100644 index 5c13d785cc70..000000000000 --- a/arch/avr32/boards/hammerhead/Kconfig +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | # Hammerhead customization | ||
2 | |||
3 | if BOARD_HAMMERHEAD | ||
4 | |||
5 | config BOARD_HAMMERHEAD_USB | ||
6 | bool "Philips ISP116x-hcd USB support" | ||
7 | help | ||
8 | This enables USB support for Hammerheads internal ISP116x | ||
9 | controller from Philips. | ||
10 | |||
11 | Choose 'Y' here if you want to have your board USB driven. | ||
12 | |||
13 | config BOARD_HAMMERHEAD_LCD | ||
14 | bool "Atmel AT91/AT32 LCD support" | ||
15 | help | ||
16 | This enables LCD support for the Hammerhead board. You may | ||
17 | also add support for framebuffer devices (AT91/AT32 LCD Controller) | ||
18 | and framebuffer console support to get the most out of your LCD. | ||
19 | |||
20 | Choose 'Y' here if you have ordered a Corona daugther board and | ||
21 | want to have support for your Hantronix HDA-351T-LV LCD. | ||
22 | |||
23 | config BOARD_HAMMERHEAD_SND | ||
24 | bool "Atmel AC97 Sound support" | ||
25 | help | ||
26 | This enables Sound support for the Hammerhead board. You may | ||
27 | also go through the ALSA settings to get it working. | ||
28 | |||
29 | Choose 'Y' here if you have ordered a Corona daugther board and | ||
30 | want to make your board funky. | ||
31 | |||
32 | config BOARD_HAMMERHEAD_FPGA | ||
33 | bool "Hammerhead FPGA Support" | ||
34 | default y | ||
35 | help | ||
36 | This adds support for the Cyclone III FPGA from Altera | ||
37 | found on Miromico's Hammerhead board. | ||
38 | |||
39 | Choose 'Y' here if you want to have FPGA support enabled. | ||
40 | You will have to choose the "Hammerhead FPGA Device Support" in | ||
41 | Device Drivers->Misc to be able to use FPGA functionality. | ||
42 | |||
43 | endif # BOARD_ATNGW100 | ||
diff --git a/arch/avr32/boards/hammerhead/Makefile b/arch/avr32/boards/hammerhead/Makefile deleted file mode 100644 index c740aa116755..000000000000 --- a/arch/avr32/boards/hammerhead/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y += setup.o flash.o | ||
diff --git a/arch/avr32/boards/hammerhead/flash.c b/arch/avr32/boards/hammerhead/flash.c deleted file mode 100644 index e86280ccd8fa..000000000000 --- a/arch/avr32/boards/hammerhead/flash.c +++ /dev/null | |||
@@ -1,381 +0,0 @@ | |||
1 | /* | ||
2 | * Hammerhead board-specific flash initialization | ||
3 | * | ||
4 | * Copyright (C) 2008 Miromico AG | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/init.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/mtd/mtd.h> | ||
14 | #include <linux/mtd/partitions.h> | ||
15 | #include <linux/mtd/physmap.h> | ||
16 | #include <linux/usb/isp116x.h> | ||
17 | #include <linux/dma-mapping.h> | ||
18 | #include <linux/delay.h> | ||
19 | |||
20 | #include <mach/portmux.h> | ||
21 | #include <mach/at32ap700x.h> | ||
22 | #include <mach/smc.h> | ||
23 | |||
24 | #include "../../mach-at32ap/clock.h" | ||
25 | #include "flash.h" | ||
26 | |||
27 | |||
28 | #define HAMMERHEAD_USB_PERIPH_GCLK0 0x40000000 | ||
29 | #define HAMMERHEAD_USB_PERIPH_CS2 0x02000000 | ||
30 | #define HAMMERHEAD_USB_PERIPH_EXTINT0 0x02000000 | ||
31 | |||
32 | #define HAMMERHEAD_FPGA_PERIPH_MOSI 0x00000002 | ||
33 | #define HAMMERHEAD_FPGA_PERIPH_SCK 0x00000020 | ||
34 | #define HAMMERHEAD_FPGA_PERIPH_EXTINT3 0x10000000 | ||
35 | |||
36 | static struct smc_timing flash_timing __initdata = { | ||
37 | .ncs_read_setup = 0, | ||
38 | .nrd_setup = 40, | ||
39 | .ncs_write_setup = 0, | ||
40 | .nwe_setup = 10, | ||
41 | |||
42 | .ncs_read_pulse = 80, | ||
43 | .nrd_pulse = 40, | ||
44 | .ncs_write_pulse = 65, | ||
45 | .nwe_pulse = 55, | ||
46 | |||
47 | .read_cycle = 120, | ||
48 | .write_cycle = 120, | ||
49 | }; | ||
50 | |||
51 | static struct smc_config flash_config __initdata = { | ||
52 | .bus_width = 2, | ||
53 | .nrd_controlled = 1, | ||
54 | .nwe_controlled = 1, | ||
55 | .byte_write = 1, | ||
56 | }; | ||
57 | |||
58 | static struct mtd_partition flash_parts[] = { | ||
59 | { | ||
60 | .name = "u-boot", | ||
61 | .offset = 0x00000000, | ||
62 | .size = 0x00020000, /* 128 KiB */ | ||
63 | .mask_flags = MTD_WRITEABLE, | ||
64 | }, | ||
65 | { | ||
66 | .name = "root", | ||
67 | .offset = 0x00020000, | ||
68 | .size = 0x007d0000, | ||
69 | }, | ||
70 | { | ||
71 | .name = "env", | ||
72 | .offset = 0x007f0000, | ||
73 | .size = 0x00010000, | ||
74 | .mask_flags = MTD_WRITEABLE, | ||
75 | }, | ||
76 | }; | ||
77 | |||
78 | static struct physmap_flash_data flash_data = { | ||
79 | .width = 2, | ||
80 | .nr_parts = ARRAY_SIZE(flash_parts), | ||
81 | .parts = flash_parts, | ||
82 | }; | ||
83 | |||
84 | static struct resource flash_resource = { | ||
85 | .start = 0x00000000, | ||
86 | .end = 0x007fffff, | ||
87 | .flags = IORESOURCE_MEM, | ||
88 | }; | ||
89 | |||
90 | static struct platform_device flash_device = { | ||
91 | .name = "physmap-flash", | ||
92 | .id = 0, | ||
93 | .resource = &flash_resource, | ||
94 | .num_resources = 1, | ||
95 | .dev = { .platform_data = &flash_data, }, | ||
96 | }; | ||
97 | |||
98 | #ifdef CONFIG_BOARD_HAMMERHEAD_USB | ||
99 | |||
100 | static struct smc_timing isp1160_timing __initdata = { | ||
101 | .ncs_read_setup = 75, | ||
102 | .nrd_setup = 75, | ||
103 | .ncs_write_setup = 75, | ||
104 | .nwe_setup = 75, | ||
105 | |||
106 | |||
107 | /* We use conservative timing settings, as the minimal settings aren't | ||
108 | stable. There may be room for tweaking. */ | ||
109 | .ncs_read_pulse = 75, /* min. 33ns */ | ||
110 | .nrd_pulse = 75, /* min. 33ns */ | ||
111 | .ncs_write_pulse = 75, /* min. 26ns */ | ||
112 | .nwe_pulse = 75, /* min. 26ns */ | ||
113 | |||
114 | .read_cycle = 225, /* min. 143ns */ | ||
115 | .write_cycle = 225, /* min. 136ns */ | ||
116 | }; | ||
117 | |||
118 | static struct smc_config isp1160_config __initdata = { | ||
119 | .bus_width = 2, | ||
120 | .nrd_controlled = 1, | ||
121 | .nwe_controlled = 1, | ||
122 | .byte_write = 0, | ||
123 | }; | ||
124 | |||
125 | /* | ||
126 | * The platform delay function is only used to enforce the strange | ||
127 | * read to write delay. This can not be configured in the SMC. All other | ||
128 | * timings are controlled by the SMC (see timings obove) | ||
129 | * So in isp116x-hcd.c we should comment out USE_PLATFORM_DELAY | ||
130 | */ | ||
131 | void isp116x_delay(struct device *dev, int delay) | ||
132 | { | ||
133 | if (delay > 150) | ||
134 | ndelay(delay - 150); | ||
135 | } | ||
136 | |||
137 | static struct isp116x_platform_data isp1160_data = { | ||
138 | .sel15Kres = 1, /* use internal downstream resistors */ | ||
139 | .oc_enable = 0, /* external overcurrent detection */ | ||
140 | .int_edge_triggered = 0, /* interrupt is level triggered */ | ||
141 | .int_act_high = 0, /* interrupt is active low */ | ||
142 | .delay = isp116x_delay, /* platform delay function */ | ||
143 | }; | ||
144 | |||
145 | static struct resource isp1160_resource[] = { | ||
146 | { | ||
147 | .start = 0x08000000, | ||
148 | .end = 0x08000001, | ||
149 | .flags = IORESOURCE_MEM, | ||
150 | }, | ||
151 | { | ||
152 | .start = 0x08000002, | ||
153 | .end = 0x08000003, | ||
154 | .flags = IORESOURCE_MEM, | ||
155 | }, | ||
156 | { | ||
157 | .start = 64, | ||
158 | .flags = IORESOURCE_IRQ, | ||
159 | }, | ||
160 | }; | ||
161 | |||
162 | static struct platform_device isp1160_device = { | ||
163 | .name = "isp116x-hcd", | ||
164 | .id = 0, | ||
165 | .resource = isp1160_resource, | ||
166 | .num_resources = 3, | ||
167 | .dev = { | ||
168 | .platform_data = &isp1160_data, | ||
169 | }, | ||
170 | }; | ||
171 | #endif | ||
172 | |||
173 | #ifdef CONFIG_BOARD_HAMMERHEAD_USB | ||
174 | static int __init hammerhead_usbh_init(void) | ||
175 | { | ||
176 | struct clk *gclk; | ||
177 | struct clk *osc; | ||
178 | |||
179 | int ret; | ||
180 | |||
181 | /* setup smc for usbh */ | ||
182 | smc_set_timing(&isp1160_config, &isp1160_timing); | ||
183 | ret = smc_set_configuration(2, &isp1160_config); | ||
184 | |||
185 | if (ret < 0) { | ||
186 | printk(KERN_ERR | ||
187 | "hammerhead: failed to set ISP1160 USBH timing\n"); | ||
188 | return ret; | ||
189 | } | ||
190 | |||
191 | /* setup gclk0 to run from osc1 */ | ||
192 | gclk = clk_get(NULL, "gclk0"); | ||
193 | if (IS_ERR(gclk)) { | ||
194 | ret = PTR_ERR(gclk); | ||
195 | goto err_gclk; | ||
196 | } | ||
197 | |||
198 | osc = clk_get(NULL, "osc1"); | ||
199 | if (IS_ERR(osc)) { | ||
200 | ret = PTR_ERR(osc); | ||
201 | goto err_osc; | ||
202 | } | ||
203 | |||
204 | ret = clk_set_parent(gclk, osc); | ||
205 | if (ret < 0) { | ||
206 | pr_debug("hammerhead: failed to set osc1 for USBH clock\n"); | ||
207 | goto err_set_clk; | ||
208 | } | ||
209 | |||
210 | /* set clock to 6MHz */ | ||
211 | clk_set_rate(gclk, 6000000); | ||
212 | |||
213 | /* and enable */ | ||
214 | clk_enable(gclk); | ||
215 | |||
216 | /* select GCLK0 peripheral function */ | ||
217 | at32_select_periph(GPIO_PIOA_BASE, HAMMERHEAD_USB_PERIPH_GCLK0, | ||
218 | GPIO_PERIPH_A, 0); | ||
219 | |||
220 | /* enable CS2 peripheral function */ | ||
221 | at32_select_periph(GPIO_PIOE_BASE, HAMMERHEAD_USB_PERIPH_CS2, | ||
222 | GPIO_PERIPH_A, 0); | ||
223 | |||
224 | /* H_WAKEUP must be driven low */ | ||
225 | at32_select_gpio(GPIO_PIN_PA(8), AT32_GPIOF_OUTPUT); | ||
226 | |||
227 | /* Select EXTINT0 for PB25 */ | ||
228 | at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_USB_PERIPH_EXTINT0, | ||
229 | GPIO_PERIPH_A, 0); | ||
230 | |||
231 | /* register usbh device driver */ | ||
232 | platform_device_register(&isp1160_device); | ||
233 | |||
234 | err_set_clk: | ||
235 | clk_put(osc); | ||
236 | err_osc: | ||
237 | clk_put(gclk); | ||
238 | err_gclk: | ||
239 | return ret; | ||
240 | } | ||
241 | #endif | ||
242 | |||
243 | #ifdef CONFIG_BOARD_HAMMERHEAD_FPGA | ||
244 | static struct smc_timing fpga_timing __initdata = { | ||
245 | .ncs_read_setup = 16, | ||
246 | .nrd_setup = 32, | ||
247 | .ncs_read_pulse = 48, | ||
248 | .nrd_pulse = 32, | ||
249 | .read_cycle = 64, | ||
250 | |||
251 | .ncs_write_setup = 16, | ||
252 | .nwe_setup = 16, | ||
253 | .ncs_write_pulse = 32, | ||
254 | .nwe_pulse = 32, | ||
255 | .write_cycle = 64, | ||
256 | }; | ||
257 | |||
258 | static struct smc_config fpga_config __initdata = { | ||
259 | .bus_width = 4, | ||
260 | .nrd_controlled = 1, | ||
261 | .nwe_controlled = 1, | ||
262 | .byte_write = 0, | ||
263 | }; | ||
264 | |||
265 | static struct resource hh_fpga0_resource[] = { | ||
266 | { | ||
267 | .start = 0xffe00400, | ||
268 | .end = 0xffe00400 + 0x3ff, | ||
269 | .flags = IORESOURCE_MEM, | ||
270 | }, | ||
271 | { | ||
272 | .start = 4, | ||
273 | .end = 4, | ||
274 | .flags = IORESOURCE_IRQ, | ||
275 | }, | ||
276 | { | ||
277 | .start = 0x0c000000, | ||
278 | .end = 0x0c000100, | ||
279 | .flags = IORESOURCE_MEM, | ||
280 | }, | ||
281 | { | ||
282 | .start = 67, | ||
283 | .end = 67, | ||
284 | .flags = IORESOURCE_IRQ, | ||
285 | }, | ||
286 | }; | ||
287 | |||
288 | static u64 hh_fpga0_dma_mask = DMA_BIT_MASK(32); | ||
289 | static struct platform_device hh_fpga0_device = { | ||
290 | .name = "hh_fpga", | ||
291 | .id = 0, | ||
292 | .dev = { | ||
293 | .dma_mask = &hh_fpga0_dma_mask, | ||
294 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
295 | }, | ||
296 | .resource = hh_fpga0_resource, | ||
297 | .num_resources = ARRAY_SIZE(hh_fpga0_resource), | ||
298 | }; | ||
299 | |||
300 | static struct clk hh_fpga0_spi_clk = { | ||
301 | .name = "spi_clk", | ||
302 | .dev = &hh_fpga0_device.dev, | ||
303 | .mode = pba_clk_mode, | ||
304 | .get_rate = pba_clk_get_rate, | ||
305 | .index = 1, | ||
306 | }; | ||
307 | |||
308 | struct platform_device *__init at32_add_device_hh_fpga(void) | ||
309 | { | ||
310 | /* Select peripheral functionallity for SPI SCK and MOSI */ | ||
311 | at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_SCK, | ||
312 | GPIO_PERIPH_B, 0); | ||
313 | at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_MOSI, | ||
314 | GPIO_PERIPH_B, 0); | ||
315 | |||
316 | /* reserve all other needed gpio | ||
317 | * We have on board pull ups, so there is no need | ||
318 | * to enable gpio pull ups */ | ||
319 | /* INIT_DONE (input) */ | ||
320 | at32_select_gpio(GPIO_PIN_PB(0), 0); | ||
321 | |||
322 | /* nSTATUS (input) */ | ||
323 | at32_select_gpio(GPIO_PIN_PB(2), 0); | ||
324 | |||
325 | /* nCONFIG (output, low) */ | ||
326 | at32_select_gpio(GPIO_PIN_PB(3), AT32_GPIOF_OUTPUT); | ||
327 | |||
328 | /* CONF_DONE (input) */ | ||
329 | at32_select_gpio(GPIO_PIN_PB(4), 0); | ||
330 | |||
331 | /* Select EXTINT3 for PB28 (Interrupt from FPGA) */ | ||
332 | at32_select_periph(GPIO_PIOB_BASE, HAMMERHEAD_FPGA_PERIPH_EXTINT3, | ||
333 | GPIO_PERIPH_A, 0); | ||
334 | |||
335 | /* Get our parent clock */ | ||
336 | hh_fpga0_spi_clk.parent = clk_get(NULL, "pba"); | ||
337 | clk_put(hh_fpga0_spi_clk.parent); | ||
338 | |||
339 | /* Register clock in at32 clock tree */ | ||
340 | at32_clk_register(&hh_fpga0_spi_clk); | ||
341 | |||
342 | platform_device_register(&hh_fpga0_device); | ||
343 | return &hh_fpga0_device; | ||
344 | } | ||
345 | #endif | ||
346 | |||
347 | /* This needs to be called after the SMC has been initialized */ | ||
348 | static int __init hammerhead_flash_init(void) | ||
349 | { | ||
350 | int ret; | ||
351 | |||
352 | smc_set_timing(&flash_config, &flash_timing); | ||
353 | ret = smc_set_configuration(0, &flash_config); | ||
354 | |||
355 | if (ret < 0) { | ||
356 | printk(KERN_ERR "hammerhead: failed to set NOR flash timing\n"); | ||
357 | return ret; | ||
358 | } | ||
359 | |||
360 | platform_device_register(&flash_device); | ||
361 | |||
362 | #ifdef CONFIG_BOARD_HAMMERHEAD_USB | ||
363 | hammerhead_usbh_init(); | ||
364 | #endif | ||
365 | |||
366 | #ifdef CONFIG_BOARD_HAMMERHEAD_FPGA | ||
367 | /* Setup SMC for FPGA interface */ | ||
368 | smc_set_timing(&fpga_config, &fpga_timing); | ||
369 | ret = smc_set_configuration(3, &fpga_config); | ||
370 | #endif | ||
371 | |||
372 | |||
373 | if (ret < 0) { | ||
374 | printk(KERN_ERR "hammerhead: failed to set FPGA timing\n"); | ||
375 | return ret; | ||
376 | } | ||
377 | |||
378 | return 0; | ||
379 | } | ||
380 | |||
381 | device_initcall(hammerhead_flash_init); | ||
diff --git a/arch/avr32/boards/hammerhead/flash.h b/arch/avr32/boards/hammerhead/flash.h deleted file mode 100644 index ea70c626587b..000000000000 --- a/arch/avr32/boards/hammerhead/flash.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __BOARDS_HAMMERHEAD_FLASH_H | ||
2 | #define __BOARDS_HAMMERHEAD_FLASH_H | ||
3 | |||
4 | struct platform_device *at32_add_device_hh_fpga(void); | ||
5 | |||
6 | #endif /* __BOARDS_HAMMERHEAD_FLASH_H */ | ||
diff --git a/arch/avr32/boards/hammerhead/setup.c b/arch/avr32/boards/hammerhead/setup.c deleted file mode 100644 index dc0e317f2ecd..000000000000 --- a/arch/avr32/boards/hammerhead/setup.c +++ /dev/null | |||
@@ -1,247 +0,0 @@ | |||
1 | /* | ||
2 | * Board-specific setup code for the Miromico Hammerhead board | ||
3 | * | ||
4 | * Copyright (C) 2008 Miromico AG | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/atmel-mci.h> | ||
11 | #include <linux/clk.h> | ||
12 | #include <linux/fb.h> | ||
13 | #include <linux/etherdevice.h> | ||
14 | #include <linux/i2c.h> | ||
15 | #include <linux/i2c-gpio.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/linkage.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/types.h> | ||
20 | #include <linux/spi/spi.h> | ||
21 | |||
22 | #include <video/atmel_lcdc.h> | ||
23 | |||
24 | #include <linux/io.h> | ||
25 | #include <asm/setup.h> | ||
26 | |||
27 | #include <mach/at32ap700x.h> | ||
28 | #include <mach/board.h> | ||
29 | #include <mach/init.h> | ||
30 | #include <mach/portmux.h> | ||
31 | |||
32 | #include <sound/atmel-ac97c.h> | ||
33 | |||
34 | #include "../../mach-at32ap/clock.h" | ||
35 | #include "flash.h" | ||
36 | |||
37 | /* Oscillator frequencies. These are board-specific */ | ||
38 | unsigned long at32_board_osc_rates[3] = { | ||
39 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
40 | [1] = 25000000, /* 25MHz on osc0 */ | ||
41 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
42 | }; | ||
43 | |||
44 | /* Initialized by bootloader-specific startup code. */ | ||
45 | struct tag *bootloader_tags __initdata; | ||
46 | |||
47 | #ifdef CONFIG_BOARD_HAMMERHEAD_LCD | ||
48 | static struct fb_videomode __initdata hda350tlv_modes[] = { | ||
49 | { | ||
50 | .name = "320x240 @ 75", | ||
51 | .refresh = 75, | ||
52 | .xres = 320, | ||
53 | .yres = 240, | ||
54 | .pixclock = KHZ2PICOS(6891), | ||
55 | |||
56 | .left_margin = 48, | ||
57 | .right_margin = 18, | ||
58 | .upper_margin = 18, | ||
59 | .lower_margin = 4, | ||
60 | .hsync_len = 20, | ||
61 | .vsync_len = 2, | ||
62 | |||
63 | .sync = 0, | ||
64 | .vmode = FB_VMODE_NONINTERLACED, | ||
65 | }, | ||
66 | }; | ||
67 | |||
68 | static struct fb_monspecs __initdata hammerhead_hda350t_monspecs = { | ||
69 | .manufacturer = "HAN", | ||
70 | .monitor = "HDA350T-LV", | ||
71 | .modedb = hda350tlv_modes, | ||
72 | .modedb_len = ARRAY_SIZE(hda350tlv_modes), | ||
73 | .hfmin = 14900, | ||
74 | .hfmax = 22350, | ||
75 | .vfmin = 60, | ||
76 | .vfmax = 90, | ||
77 | .dclkmax = 10000000, | ||
78 | }; | ||
79 | |||
80 | struct atmel_lcdfb_pdata __initdata hammerhead_lcdc_data = { | ||
81 | .default_bpp = 24, | ||
82 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
83 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
84 | | ATMEL_LCDC_INVCLK | ||
85 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
86 | | ATMEL_LCDC_MEMOR_BIG), | ||
87 | .default_monspecs = &hammerhead_hda350t_monspecs, | ||
88 | .guard_time = 2, | ||
89 | }; | ||
90 | #endif | ||
91 | |||
92 | static struct mci_platform_data __initdata mci0_data = { | ||
93 | .slot[0] = { | ||
94 | .bus_width = 4, | ||
95 | .detect_pin = -ENODEV, | ||
96 | .wp_pin = -ENODEV, | ||
97 | }, | ||
98 | }; | ||
99 | |||
100 | struct eth_addr { | ||
101 | u8 addr[6]; | ||
102 | }; | ||
103 | |||
104 | static struct eth_addr __initdata hw_addr[1]; | ||
105 | static struct macb_platform_data __initdata eth_data[1]; | ||
106 | |||
107 | /* | ||
108 | * The next two functions should go away as the boot loader is | ||
109 | * supposed to initialize the macb address registers with a valid | ||
110 | * ethernet address. But we need to keep it around for a while until | ||
111 | * we can be reasonably sure the boot loader does this. | ||
112 | * | ||
113 | * The phy_id is ignored as the driver will probe for it. | ||
114 | */ | ||
115 | static int __init parse_tag_ethernet(struct tag *tag) | ||
116 | { | ||
117 | int i = tag->u.ethernet.mac_index; | ||
118 | |||
119 | if (i < ARRAY_SIZE(hw_addr)) | ||
120 | memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, | ||
121 | sizeof(hw_addr[i].addr)); | ||
122 | |||
123 | return 0; | ||
124 | } | ||
125 | __tagtable(ATAG_ETHERNET, parse_tag_ethernet); | ||
126 | |||
127 | static void __init set_hw_addr(struct platform_device *pdev) | ||
128 | { | ||
129 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
130 | const u8 *addr; | ||
131 | void __iomem *regs; | ||
132 | struct clk *pclk; | ||
133 | |||
134 | if (!res) | ||
135 | return; | ||
136 | |||
137 | if (pdev->id >= ARRAY_SIZE(hw_addr)) | ||
138 | return; | ||
139 | |||
140 | addr = hw_addr[pdev->id].addr; | ||
141 | |||
142 | if (!is_valid_ether_addr(addr)) | ||
143 | return; | ||
144 | |||
145 | /* | ||
146 | * Since this is board-specific code, we'll cheat and use the | ||
147 | * physical address directly as we happen to know that it's | ||
148 | * the same as the virtual address. | ||
149 | */ | ||
150 | regs = (void __iomem __force *)res->start; | ||
151 | pclk = clk_get(&pdev->dev, "pclk"); | ||
152 | |||
153 | if (IS_ERR(pclk)) | ||
154 | return; | ||
155 | |||
156 | clk_enable(pclk); | ||
157 | |||
158 | __raw_writel((addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | | ||
159 | addr[0], regs + 0x98); | ||
160 | __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); | ||
161 | |||
162 | clk_disable(pclk); | ||
163 | clk_put(pclk); | ||
164 | } | ||
165 | |||
166 | void __init setup_board(void) | ||
167 | { | ||
168 | at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */ | ||
169 | at32_setup_serial_console(0); | ||
170 | } | ||
171 | |||
172 | static struct i2c_gpio_platform_data i2c_gpio_data = { | ||
173 | .sda_pin = GPIO_PIN_PA(6), | ||
174 | .scl_pin = GPIO_PIN_PA(7), | ||
175 | .sda_is_open_drain = 1, | ||
176 | .scl_is_open_drain = 1, | ||
177 | .udelay = 2, /* close to 100 kHz */ | ||
178 | }; | ||
179 | |||
180 | static struct platform_device i2c_gpio_device = { | ||
181 | .name = "i2c-gpio", | ||
182 | .id = 0, | ||
183 | .dev = { .platform_data = &i2c_gpio_data, }, | ||
184 | }; | ||
185 | |||
186 | static struct i2c_board_info __initdata i2c_info[] = {}; | ||
187 | |||
188 | #ifdef CONFIG_BOARD_HAMMERHEAD_SND | ||
189 | static struct ac97c_platform_data ac97c_data = { | ||
190 | .reset_pin = GPIO_PIN_PA(16), | ||
191 | }; | ||
192 | #endif | ||
193 | |||
194 | static int __init hammerhead_init(void) | ||
195 | { | ||
196 | /* | ||
197 | * Hammerhead uses 32-bit SDRAM interface. Reserve the | ||
198 | * SDRAM-specific pins so that nobody messes with them. | ||
199 | */ | ||
200 | at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); | ||
201 | |||
202 | at32_add_device_usart(0); | ||
203 | |||
204 | /* Reserve PB29 (GCLK3). This pin is used as clock source | ||
205 | * for ETH PHY (25MHz). GCLK3 setup is done by U-Boot. | ||
206 | */ | ||
207 | at32_reserve_pin(GPIO_PIOB_BASE, (1<<29)); | ||
208 | |||
209 | /* | ||
210 | * Hammerhead uses only one ethernet port, so we don't set | ||
211 | * address of second port | ||
212 | */ | ||
213 | set_hw_addr(at32_add_device_eth(0, ð_data[0])); | ||
214 | |||
215 | #ifdef CONFIG_BOARD_HAMMERHEAD_FPGA | ||
216 | at32_add_device_hh_fpga(); | ||
217 | #endif | ||
218 | at32_add_device_mci(0, &mci0_data); | ||
219 | |||
220 | #ifdef CONFIG_BOARD_HAMMERHEAD_USB | ||
221 | at32_add_device_usba(0, NULL); | ||
222 | #endif | ||
223 | #ifdef CONFIG_BOARD_HAMMERHEAD_LCD | ||
224 | at32_add_device_lcdc(0, &hammerhead_lcdc_data, fbmem_start, | ||
225 | fbmem_size, ATMEL_LCDC_PRI_24BIT); | ||
226 | #endif | ||
227 | |||
228 | at32_select_gpio(i2c_gpio_data.sda_pin, | ||
229 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | | ||
230 | AT32_GPIOF_HIGH); | ||
231 | at32_select_gpio(i2c_gpio_data.scl_pin, | ||
232 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | | ||
233 | AT32_GPIOF_HIGH); | ||
234 | platform_device_register(&i2c_gpio_device); | ||
235 | i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info)); | ||
236 | |||
237 | #ifdef CONFIG_BOARD_HAMMERHEAD_SND | ||
238 | at32_add_device_ac97c(0, &ac97c_data, AC97C_BOTH); | ||
239 | #endif | ||
240 | |||
241 | /* Select the Touchscreen interrupt pin mode */ | ||
242 | at32_select_periph(GPIO_PIOB_BASE, 0x08000000, GPIO_PERIPH_A, 0); | ||
243 | |||
244 | return 0; | ||
245 | } | ||
246 | |||
247 | postcore_initcall(hammerhead_init); | ||
diff --git a/arch/avr32/boards/merisc/Kconfig b/arch/avr32/boards/merisc/Kconfig deleted file mode 100644 index 7e043275d5a9..000000000000 --- a/arch/avr32/boards/merisc/Kconfig +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # Merisc customization | ||
2 | |||
3 | if BOARD_MERISC | ||
4 | |||
5 | endif # BOARD_MERISC | ||
diff --git a/arch/avr32/boards/merisc/Makefile b/arch/avr32/boards/merisc/Makefile deleted file mode 100644 index d24c78729bd1..000000000000 --- a/arch/avr32/boards/merisc/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y += setup.o flash.o display.o merisc_sysfs.o | ||
diff --git a/arch/avr32/boards/merisc/display.c b/arch/avr32/boards/merisc/display.c deleted file mode 100644 index e7683ee7ed40..000000000000 --- a/arch/avr32/boards/merisc/display.c +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | /* | ||
2 | * Display setup code for the Merisc board | ||
3 | * | ||
4 | * Copyright (C) 2008 Martinsson Elektronik AB | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/fb.h> | ||
13 | #include <video/atmel_lcdc.h> | ||
14 | #include <asm/setup.h> | ||
15 | #include <mach/board.h> | ||
16 | #include "merisc.h" | ||
17 | |||
18 | static struct fb_videomode merisc_fb_videomode[] = { | ||
19 | { | ||
20 | .refresh = 44, | ||
21 | .xres = 640, | ||
22 | .yres = 480, | ||
23 | .left_margin = 96, | ||
24 | .right_margin = 96, | ||
25 | .upper_margin = 34, | ||
26 | .lower_margin = 8, | ||
27 | .hsync_len = 64, | ||
28 | .vsync_len = 64, | ||
29 | .name = "640x480 @ 44", | ||
30 | .pixclock = KHZ2PICOS(25180), | ||
31 | .sync = 0, | ||
32 | .vmode = FB_VMODE_NONINTERLACED, | ||
33 | }, | ||
34 | }; | ||
35 | |||
36 | static struct fb_monspecs merisc_fb_monspecs = { | ||
37 | .manufacturer = "Kyo", | ||
38 | .monitor = "TCG075VG2AD", | ||
39 | .modedb = merisc_fb_videomode, | ||
40 | .modedb_len = ARRAY_SIZE(merisc_fb_videomode), | ||
41 | .hfmin = 30000, | ||
42 | .hfmax = 33333, | ||
43 | .vfmin = 60, | ||
44 | .vfmax = 90, | ||
45 | .dclkmax = 30000000, | ||
46 | }; | ||
47 | |||
48 | struct atmel_lcdfb_pdata merisc_lcdc_data = { | ||
49 | .default_bpp = 24, | ||
50 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
51 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
52 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
53 | | ATMEL_LCDC_MEMOR_BIG), | ||
54 | .default_monspecs = &merisc_fb_monspecs, | ||
55 | .guard_time = 2, | ||
56 | }; | ||
57 | |||
58 | static int __init merisc_display_init(void) | ||
59 | { | ||
60 | at32_add_device_lcdc(0, &merisc_lcdc_data, fbmem_start, | ||
61 | fbmem_size, 0); | ||
62 | |||
63 | return 0; | ||
64 | } | ||
65 | device_initcall(merisc_display_init); | ||
diff --git a/arch/avr32/boards/merisc/flash.c b/arch/avr32/boards/merisc/flash.c deleted file mode 100644 index 8e856fd6f013..000000000000 --- a/arch/avr32/boards/merisc/flash.c +++ /dev/null | |||
@@ -1,139 +0,0 @@ | |||
1 | /* | ||
2 | * Merisc board-specific flash initialization | ||
3 | * | ||
4 | * Copyright (C) 2008 Martinsson Elektronik AB | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/mtd/mtd.h> | ||
13 | #include <linux/mtd/partitions.h> | ||
14 | #include <linux/mtd/physmap.h> | ||
15 | #include <mach/smc.h> | ||
16 | |||
17 | /* Will be translated to units of 14.3 ns, rounded up */ | ||
18 | static struct smc_timing flash_timing __initdata = { | ||
19 | .ncs_read_setup = 1 * 14, | ||
20 | .nrd_setup = 5 * 14, | ||
21 | .ncs_write_setup = 1 * 14, | ||
22 | .nwe_setup = 2 * 14, | ||
23 | |||
24 | .ncs_read_pulse = 12 * 14, | ||
25 | .nrd_pulse = 7 * 14, | ||
26 | .ncs_write_pulse = 8 * 14, | ||
27 | .nwe_pulse = 4 * 14, | ||
28 | |||
29 | .read_cycle = 14 * 14, | ||
30 | .write_cycle = 10 * 14, | ||
31 | }; | ||
32 | |||
33 | static struct smc_config flash_config __initdata = { | ||
34 | .bus_width = 2, | ||
35 | .nrd_controlled = 1, | ||
36 | .nwe_controlled = 1, | ||
37 | .byte_write = 1, | ||
38 | .tdf_cycles = 3, | ||
39 | }; | ||
40 | |||
41 | static struct mtd_partition flash_0_parts[] = { | ||
42 | { | ||
43 | .name = "boot", | ||
44 | .offset = 0x00000000, | ||
45 | .size = 0x00060000, | ||
46 | .mask_flags = 0, | ||
47 | }, | ||
48 | { | ||
49 | .name = "kernel", | ||
50 | .offset = 0x00060000, | ||
51 | .size = 0x00200000, | ||
52 | .mask_flags = 0, | ||
53 | }, | ||
54 | { | ||
55 | .name = "root", | ||
56 | .offset = 0x00260000, | ||
57 | .size = MTDPART_SIZ_FULL, | ||
58 | .mask_flags = 0, | ||
59 | }, | ||
60 | }; | ||
61 | |||
62 | static struct mtd_partition flash_1_parts[] = { | ||
63 | { | ||
64 | .name = "2ndflash", | ||
65 | .offset = 0x00000000, | ||
66 | .size = MTDPART_SIZ_FULL, | ||
67 | .mask_flags = 0, | ||
68 | }, | ||
69 | }; | ||
70 | |||
71 | static struct physmap_flash_data flash_data[] = { | ||
72 | { | ||
73 | .width = 2, | ||
74 | .nr_parts = ARRAY_SIZE(flash_0_parts), | ||
75 | .parts = flash_0_parts, | ||
76 | }, | ||
77 | { | ||
78 | .width = 2, | ||
79 | .nr_parts = ARRAY_SIZE(flash_1_parts), | ||
80 | .parts = flash_1_parts, | ||
81 | } | ||
82 | }; | ||
83 | |||
84 | static struct resource flash_resource[] = { | ||
85 | { | ||
86 | .start = 0x00000000, | ||
87 | .end = 0x03ffffff, | ||
88 | .flags = IORESOURCE_MEM, | ||
89 | }, | ||
90 | { | ||
91 | .start = 0x04000000, | ||
92 | .end = 0x07ffffff, | ||
93 | .flags = IORESOURCE_MEM, | ||
94 | }, | ||
95 | }; | ||
96 | |||
97 | static struct platform_device flash_device[] = { | ||
98 | { | ||
99 | .name = "physmap-flash", | ||
100 | .id = 0, | ||
101 | .resource = &flash_resource[0], | ||
102 | .num_resources = 1, | ||
103 | .dev = { | ||
104 | .platform_data = &flash_data[0], | ||
105 | }, | ||
106 | }, | ||
107 | { | ||
108 | .name = "physmap-flash", | ||
109 | .id = 1, | ||
110 | .resource = &flash_resource[1], | ||
111 | .num_resources = 1, | ||
112 | .dev = { | ||
113 | .platform_data = &flash_data[1], | ||
114 | }, | ||
115 | }, | ||
116 | }; | ||
117 | |||
118 | static int __init merisc_flash_init(void) | ||
119 | { | ||
120 | int ret; | ||
121 | smc_set_timing(&flash_config, &flash_timing); | ||
122 | |||
123 | ret = smc_set_configuration(0, &flash_config); | ||
124 | if (ret < 0) { | ||
125 | printk(KERN_ERR "Merisc: failed to set NOR flash timing #0\n"); | ||
126 | return ret; | ||
127 | } | ||
128 | |||
129 | ret = smc_set_configuration(4, &flash_config); | ||
130 | if (ret < 0) { | ||
131 | printk(KERN_ERR "Merisc: failed to set NOR flash timing #1\n"); | ||
132 | return ret; | ||
133 | } | ||
134 | |||
135 | platform_device_register(&flash_device[0]); | ||
136 | platform_device_register(&flash_device[1]); | ||
137 | return 0; | ||
138 | } | ||
139 | device_initcall(merisc_flash_init); | ||
diff --git a/arch/avr32/boards/merisc/merisc.h b/arch/avr32/boards/merisc/merisc.h deleted file mode 100644 index 50ffb2f3fcbf..000000000000 --- a/arch/avr32/boards/merisc/merisc.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * Merisc exports | ||
3 | * | ||
4 | * Copyright (C) 2008 Martinsson Elektronik AB | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ARCH_AVR32_BOARDS_MERISC_MERISC_H | ||
11 | #define __ARCH_AVR32_BOARDS_MERISC_MERISC_H | ||
12 | |||
13 | const char *merisc_revision(void); | ||
14 | const char *merisc_model(void); | ||
15 | |||
16 | extern struct class merisc_class; | ||
17 | |||
18 | #endif /* __ARCH_AVR32_BOARDS_MERISC_MERISC_H */ | ||
diff --git a/arch/avr32/boards/merisc/merisc_sysfs.c b/arch/avr32/boards/merisc/merisc_sysfs.c deleted file mode 100644 index 5a252318f4bd..000000000000 --- a/arch/avr32/boards/merisc/merisc_sysfs.c +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * Merisc sysfs exports | ||
3 | * | ||
4 | * Copyright (C) 2008 Martinsson Elektronik AB | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/list.h> | ||
14 | #include <linux/spinlock.h> | ||
15 | #include <linux/device.h> | ||
16 | #include <linux/timer.h> | ||
17 | #include <linux/err.h> | ||
18 | #include <linux/ctype.h> | ||
19 | #include "merisc.h" | ||
20 | |||
21 | static ssize_t merisc_model_show(struct class *class, char *buf) | ||
22 | { | ||
23 | ssize_t ret = 0; | ||
24 | |||
25 | sprintf(buf, "%s\n", merisc_model()); | ||
26 | ret = strlen(buf) + 1; | ||
27 | |||
28 | return ret; | ||
29 | } | ||
30 | |||
31 | static ssize_t merisc_revision_show(struct class *class, char *buf) | ||
32 | { | ||
33 | ssize_t ret = 0; | ||
34 | |||
35 | sprintf(buf, "%s\n", merisc_revision()); | ||
36 | ret = strlen(buf) + 1; | ||
37 | |||
38 | return ret; | ||
39 | } | ||
40 | |||
41 | static struct class_attribute merisc_class_attrs[] = { | ||
42 | __ATTR(model, S_IRUGO, merisc_model_show, NULL), | ||
43 | __ATTR(revision, S_IRUGO, merisc_revision_show, NULL), | ||
44 | __ATTR_NULL, | ||
45 | }; | ||
46 | |||
47 | struct class merisc_class = { | ||
48 | .name = "merisc", | ||
49 | .owner = THIS_MODULE, | ||
50 | .class_attrs = merisc_class_attrs, | ||
51 | }; | ||
52 | |||
53 | static int __init merisc_sysfs_init(void) | ||
54 | { | ||
55 | int status; | ||
56 | |||
57 | status = class_register(&merisc_class); | ||
58 | if (status < 0) | ||
59 | return status; | ||
60 | |||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | postcore_initcall(merisc_sysfs_init); | ||
diff --git a/arch/avr32/boards/merisc/setup.c b/arch/avr32/boards/merisc/setup.c deleted file mode 100644 index 718a6d7eb808..000000000000 --- a/arch/avr32/boards/merisc/setup.c +++ /dev/null | |||
@@ -1,305 +0,0 @@ | |||
1 | /* | ||
2 | * Board-specific setup code for the Merisc | ||
3 | * | ||
4 | * Copyright (C) 2008 Martinsson Elektronik AB | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/etherdevice.h> | ||
12 | #include <linux/i2c.h> | ||
13 | #include <linux/i2c-gpio.h> | ||
14 | #include <linux/gpio.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/linkage.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/types.h> | ||
19 | #include <linux/leds.h> | ||
20 | #include <linux/spi/spi.h> | ||
21 | #include <linux/spi/ads7846.h> | ||
22 | #include <linux/irq.h> | ||
23 | #include <linux/fb.h> | ||
24 | #include <linux/atmel-mci.h> | ||
25 | #include <linux/pwm.h> | ||
26 | #include <linux/leds_pwm.h> | ||
27 | |||
28 | #include <asm/io.h> | ||
29 | #include <asm/setup.h> | ||
30 | |||
31 | #include <mach/at32ap700x.h> | ||
32 | #include <mach/board.h> | ||
33 | #include <mach/init.h> | ||
34 | #include <mach/portmux.h> | ||
35 | |||
36 | #include "merisc.h" | ||
37 | |||
38 | /* Holds the autodetected board model and revision */ | ||
39 | static int merisc_board_id; | ||
40 | |||
41 | /* Initialized by bootloader-specific startup code. */ | ||
42 | struct tag *bootloader_tags __initdata; | ||
43 | |||
44 | /* Oscillator frequencies. These are board specific */ | ||
45 | unsigned long at32_board_osc_rates[3] = { | ||
46 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
47 | [1] = 20000000, /* 20 MHz on osc0 */ | ||
48 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
49 | }; | ||
50 | |||
51 | struct eth_addr { | ||
52 | u8 addr[6]; | ||
53 | }; | ||
54 | |||
55 | static struct eth_addr __initdata hw_addr[2]; | ||
56 | static struct macb_platform_data __initdata eth_data[2]; | ||
57 | |||
58 | static int ads7846_get_pendown_state_PB26(void) | ||
59 | { | ||
60 | return !gpio_get_value(GPIO_PIN_PB(26)); | ||
61 | } | ||
62 | |||
63 | static int ads7846_get_pendown_state_PB28(void) | ||
64 | { | ||
65 | return !gpio_get_value(GPIO_PIN_PB(28)); | ||
66 | } | ||
67 | |||
68 | static struct ads7846_platform_data __initdata ads7846_data = { | ||
69 | .model = 7846, | ||
70 | .vref_delay_usecs = 100, | ||
71 | .vref_mv = 0, | ||
72 | .keep_vref_on = 0, | ||
73 | .settle_delay_usecs = 150, | ||
74 | .penirq_recheck_delay_usecs = 1, | ||
75 | .x_plate_ohms = 800, | ||
76 | .debounce_rep = 4, | ||
77 | .debounce_max = 10, | ||
78 | .debounce_tol = 50, | ||
79 | .get_pendown_state = ads7846_get_pendown_state_PB26, | ||
80 | .filter_init = NULL, | ||
81 | .filter = NULL, | ||
82 | .filter_cleanup = NULL, | ||
83 | }; | ||
84 | |||
85 | static struct spi_board_info __initdata spi0_board_info[] = { | ||
86 | { | ||
87 | .modalias = "ads7846", | ||
88 | .max_speed_hz = 3250000, | ||
89 | .chip_select = 0, | ||
90 | .bus_num = 0, | ||
91 | .platform_data = &ads7846_data, | ||
92 | .mode = SPI_MODE_0, | ||
93 | }, | ||
94 | }; | ||
95 | |||
96 | static struct mci_platform_data __initdata mci0_data = { | ||
97 | .slot[0] = { | ||
98 | .bus_width = 4, | ||
99 | .detect_pin = GPIO_PIN_PE(19), | ||
100 | .wp_pin = GPIO_PIN_PE(20), | ||
101 | .detect_is_active_high = true, | ||
102 | }, | ||
103 | }; | ||
104 | |||
105 | static int __init parse_tag_ethernet(struct tag *tag) | ||
106 | { | ||
107 | int i; | ||
108 | |||
109 | i = tag->u.ethernet.mac_index; | ||
110 | if (i < ARRAY_SIZE(hw_addr)) { | ||
111 | memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, | ||
112 | sizeof(hw_addr[i].addr)); | ||
113 | } | ||
114 | |||
115 | return 0; | ||
116 | } | ||
117 | __tagtable(ATAG_ETHERNET, parse_tag_ethernet); | ||
118 | |||
119 | static void __init set_hw_addr(struct platform_device *pdev) | ||
120 | { | ||
121 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
122 | const u8 *addr; | ||
123 | void __iomem *regs; | ||
124 | struct clk *pclk; | ||
125 | |||
126 | if (!res) | ||
127 | return; | ||
128 | |||
129 | if (pdev->id >= ARRAY_SIZE(hw_addr)) | ||
130 | return; | ||
131 | |||
132 | addr = hw_addr[pdev->id].addr; | ||
133 | if (!is_valid_ether_addr(addr)) | ||
134 | return; | ||
135 | |||
136 | regs = (void __iomem __force *)res->start; | ||
137 | pclk = clk_get(&pdev->dev, "pclk"); | ||
138 | if (IS_ERR(pclk)) | ||
139 | return; | ||
140 | |||
141 | clk_enable(pclk); | ||
142 | __raw_writel((addr[3] << 24) | (addr[2] << 16) | ||
143 | | (addr[1] << 8) | addr[0], regs + 0x98); | ||
144 | __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); | ||
145 | clk_disable(pclk); | ||
146 | clk_put(pclk); | ||
147 | } | ||
148 | |||
149 | static struct i2c_gpio_platform_data i2c_gpio_data = { | ||
150 | .sda_pin = GPIO_PIN_PA(6), | ||
151 | .scl_pin = GPIO_PIN_PA(7), | ||
152 | .sda_is_open_drain = 1, | ||
153 | .scl_is_open_drain = 1, | ||
154 | .udelay = 2, | ||
155 | }; | ||
156 | |||
157 | static struct platform_device i2c_gpio_device = { | ||
158 | .name = "i2c-gpio", | ||
159 | .id = 0, | ||
160 | .dev = { | ||
161 | .platform_data = &i2c_gpio_data, | ||
162 | }, | ||
163 | }; | ||
164 | |||
165 | static struct i2c_board_info __initdata i2c_info[] = { | ||
166 | { | ||
167 | I2C_BOARD_INFO("pcf8563", 0x51) | ||
168 | }, | ||
169 | }; | ||
170 | |||
171 | #if IS_ENABLED(CONFIG_LEDS_PWM) | ||
172 | static struct pwm_lookup pwm_lookup[] = { | ||
173 | PWM_LOOKUP("at91sam9rl-pwm", 0, "leds_pwm", "backlight", | ||
174 | 5000, PWM_POLARITY_NORMAL), | ||
175 | }; | ||
176 | |||
177 | static struct led_pwm pwm_leds[] = { | ||
178 | { | ||
179 | .name = "backlight", | ||
180 | .max_brightness = 255, | ||
181 | }, | ||
182 | }; | ||
183 | |||
184 | static struct led_pwm_platform_data pwm_data = { | ||
185 | .num_leds = ARRAY_SIZE(pwm_leds), | ||
186 | .leds = pwm_leds, | ||
187 | }; | ||
188 | |||
189 | static struct platform_device leds_pwm = { | ||
190 | .name = "leds_pwm", | ||
191 | .id = -1, | ||
192 | .dev = { | ||
193 | .platform_data = &pwm_data, | ||
194 | }, | ||
195 | }; | ||
196 | #endif | ||
197 | |||
198 | const char *merisc_model(void) | ||
199 | { | ||
200 | switch (merisc_board_id) { | ||
201 | case 0: | ||
202 | case 1: | ||
203 | return "500-01"; | ||
204 | case 2: | ||
205 | return "BT"; | ||
206 | default: | ||
207 | return "Unknown"; | ||
208 | } | ||
209 | } | ||
210 | |||
211 | const char *merisc_revision(void) | ||
212 | { | ||
213 | switch (merisc_board_id) { | ||
214 | case 0: | ||
215 | return "B"; | ||
216 | case 1: | ||
217 | return "D"; | ||
218 | case 2: | ||
219 | return "A"; | ||
220 | default: | ||
221 | return "Unknown"; | ||
222 | } | ||
223 | } | ||
224 | |||
225 | static void detect_merisc_board_id(void) | ||
226 | { | ||
227 | /* Board ID pins MUST be set as input or the board may be damaged */ | ||
228 | at32_select_gpio(GPIO_PIN_PA(24), AT32_GPIOF_PULLUP); | ||
229 | at32_select_gpio(GPIO_PIN_PA(25), AT32_GPIOF_PULLUP); | ||
230 | at32_select_gpio(GPIO_PIN_PA(26), AT32_GPIOF_PULLUP); | ||
231 | at32_select_gpio(GPIO_PIN_PA(27), AT32_GPIOF_PULLUP); | ||
232 | |||
233 | merisc_board_id = !gpio_get_value(GPIO_PIN_PA(24)) + | ||
234 | !gpio_get_value(GPIO_PIN_PA(25)) * 2 + | ||
235 | !gpio_get_value(GPIO_PIN_PA(26)) * 4 + | ||
236 | !gpio_get_value(GPIO_PIN_PA(27)) * 8; | ||
237 | } | ||
238 | |||
239 | void __init setup_board(void) | ||
240 | { | ||
241 | at32_map_usart(0, 0, 0); | ||
242 | at32_map_usart(1, 1, 0); | ||
243 | at32_map_usart(3, 3, 0); | ||
244 | at32_setup_serial_console(1); | ||
245 | } | ||
246 | |||
247 | static int __init merisc_init(void) | ||
248 | { | ||
249 | detect_merisc_board_id(); | ||
250 | |||
251 | printk(KERN_NOTICE "BOARD: Merisc %s revision %s\n", merisc_model(), | ||
252 | merisc_revision()); | ||
253 | |||
254 | /* Reserve pins for SDRAM */ | ||
255 | at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL | (1 << 26)); | ||
256 | |||
257 | if (merisc_board_id >= 1) | ||
258 | at32_map_usart(2, 2, 0); | ||
259 | |||
260 | at32_add_device_usart(0); | ||
261 | at32_add_device_usart(1); | ||
262 | if (merisc_board_id >= 1) | ||
263 | at32_add_device_usart(2); | ||
264 | at32_add_device_usart(3); | ||
265 | set_hw_addr(at32_add_device_eth(0, ð_data[0])); | ||
266 | |||
267 | /* ADS7846 PENIRQ */ | ||
268 | if (merisc_board_id == 0) { | ||
269 | ads7846_data.get_pendown_state = ads7846_get_pendown_state_PB26; | ||
270 | at32_select_periph(GPIO_PIOB_BASE, 1 << 26, | ||
271 | GPIO_PERIPH_A, AT32_GPIOF_PULLUP); | ||
272 | spi0_board_info[0].irq = AT32_EXTINT(1); | ||
273 | } else { | ||
274 | ads7846_data.get_pendown_state = ads7846_get_pendown_state_PB28; | ||
275 | at32_select_periph(GPIO_PIOB_BASE, 1 << 28, GPIO_PERIPH_A, | ||
276 | AT32_GPIOF_PULLUP); | ||
277 | spi0_board_info[0].irq = AT32_EXTINT(3); | ||
278 | } | ||
279 | |||
280 | /* ADS7846 busy pin */ | ||
281 | at32_select_gpio(GPIO_PIN_PA(4), AT32_GPIOF_PULLUP); | ||
282 | |||
283 | at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); | ||
284 | |||
285 | at32_add_device_mci(0, &mci0_data); | ||
286 | |||
287 | #if IS_ENABLED(CONFIG_LEDS_PWM) | ||
288 | pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup)); | ||
289 | at32_add_device_pwm((1 << 0) | (1 << 2)); | ||
290 | platform_device_register(&leds_pwm); | ||
291 | #else | ||
292 | at32_add_device_pwm((1 << 2)); | ||
293 | #endif | ||
294 | |||
295 | at32_select_gpio(i2c_gpio_data.sda_pin, | ||
296 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
297 | at32_select_gpio(i2c_gpio_data.scl_pin, | ||
298 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
299 | platform_device_register(&i2c_gpio_device); | ||
300 | |||
301 | i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info)); | ||
302 | |||
303 | return 0; | ||
304 | } | ||
305 | postcore_initcall(merisc_init); | ||
diff --git a/arch/avr32/boards/mimc200/Makefile b/arch/avr32/boards/mimc200/Makefile deleted file mode 100644 index c740aa116755..000000000000 --- a/arch/avr32/boards/mimc200/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y += setup.o flash.o | ||
diff --git a/arch/avr32/boards/mimc200/flash.c b/arch/avr32/boards/mimc200/flash.c deleted file mode 100644 index d83d650fc13f..000000000000 --- a/arch/avr32/boards/mimc200/flash.c +++ /dev/null | |||
@@ -1,143 +0,0 @@ | |||
1 | /* | ||
2 | * MIMC200 board-specific flash initialization | ||
3 | * | ||
4 | * Copyright (C) 2008 Mercury IMC Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/mtd/mtd.h> | ||
13 | #include <linux/mtd/partitions.h> | ||
14 | #include <linux/mtd/physmap.h> | ||
15 | |||
16 | #include <mach/smc.h> | ||
17 | |||
18 | static struct smc_timing flash_timing __initdata = { | ||
19 | .ncs_read_setup = 0, | ||
20 | .nrd_setup = 15, | ||
21 | .ncs_write_setup = 0, | ||
22 | .nwe_setup = 0, | ||
23 | |||
24 | .ncs_read_pulse = 115, | ||
25 | .nrd_pulse = 110, | ||
26 | .ncs_write_pulse = 60, | ||
27 | .nwe_pulse = 60, | ||
28 | |||
29 | .read_cycle = 115, | ||
30 | .write_cycle = 100, | ||
31 | }; | ||
32 | |||
33 | static struct smc_config flash_config __initdata = { | ||
34 | .bus_width = 2, | ||
35 | .nrd_controlled = 1, | ||
36 | .nwe_controlled = 1, | ||
37 | .byte_write = 1, | ||
38 | }; | ||
39 | |||
40 | /* system flash definition */ | ||
41 | |||
42 | static struct mtd_partition flash_parts_system[] = { | ||
43 | { | ||
44 | .name = "u-boot", | ||
45 | .offset = 0x00000000, | ||
46 | .size = 0x00020000, /* 128 KiB */ | ||
47 | .mask_flags = MTD_WRITEABLE, | ||
48 | }, | ||
49 | { | ||
50 | .name = "root", | ||
51 | .offset = 0x00020000, | ||
52 | .size = 0x007c0000, | ||
53 | }, | ||
54 | { | ||
55 | .name = "splash", | ||
56 | .offset = 0x007e0000, | ||
57 | .size = 0x00010000, /* 64KiB */ | ||
58 | }, | ||
59 | { | ||
60 | .name = "env", | ||
61 | .offset = 0x007f0000, | ||
62 | .size = 0x00010000, | ||
63 | .mask_flags = MTD_WRITEABLE, | ||
64 | }, | ||
65 | }; | ||
66 | |||
67 | static struct physmap_flash_data flash_system = { | ||
68 | .width = 2, | ||
69 | .nr_parts = ARRAY_SIZE(flash_parts_system), | ||
70 | .parts = flash_parts_system, | ||
71 | }; | ||
72 | |||
73 | static struct resource flash_resource_system = { | ||
74 | .start = 0x00000000, | ||
75 | .end = 0x007fffff, | ||
76 | .flags = IORESOURCE_MEM, | ||
77 | }; | ||
78 | |||
79 | static struct platform_device flash_device_system = { | ||
80 | .name = "physmap-flash", | ||
81 | .id = 0, | ||
82 | .resource = &flash_resource_system, | ||
83 | .num_resources = 1, | ||
84 | .dev = { | ||
85 | .platform_data = &flash_system, | ||
86 | }, | ||
87 | }; | ||
88 | |||
89 | /* data flash definition */ | ||
90 | |||
91 | static struct mtd_partition flash_parts_data[] = { | ||
92 | { | ||
93 | .name = "data", | ||
94 | .offset = 0x00000000, | ||
95 | .size = 0x00800000, | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | static struct physmap_flash_data flash_data = { | ||
100 | .width = 2, | ||
101 | .nr_parts = ARRAY_SIZE(flash_parts_data), | ||
102 | .parts = flash_parts_data, | ||
103 | }; | ||
104 | |||
105 | static struct resource flash_resource_data = { | ||
106 | .start = 0x08000000, | ||
107 | .end = 0x087fffff, | ||
108 | .flags = IORESOURCE_MEM, | ||
109 | }; | ||
110 | |||
111 | static struct platform_device flash_device_data = { | ||
112 | .name = "physmap-flash", | ||
113 | .id = 1, | ||
114 | .resource = &flash_resource_data, | ||
115 | .num_resources = 1, | ||
116 | .dev = { | ||
117 | .platform_data = &flash_data, | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | /* This needs to be called after the SMC has been initialized */ | ||
122 | static int __init mimc200_flash_init(void) | ||
123 | { | ||
124 | int ret; | ||
125 | |||
126 | smc_set_timing(&flash_config, &flash_timing); | ||
127 | ret = smc_set_configuration(0, &flash_config); | ||
128 | if (ret < 0) { | ||
129 | printk(KERN_ERR "mimc200: failed to set 'System' NOR flash timing\n"); | ||
130 | return ret; | ||
131 | } | ||
132 | ret = smc_set_configuration(1, &flash_config); | ||
133 | if (ret < 0) { | ||
134 | printk(KERN_ERR "mimc200: failed to set 'Data' NOR flash timing\n"); | ||
135 | return ret; | ||
136 | } | ||
137 | |||
138 | platform_device_register(&flash_device_system); | ||
139 | platform_device_register(&flash_device_data); | ||
140 | |||
141 | return 0; | ||
142 | } | ||
143 | device_initcall(mimc200_flash_init); | ||
diff --git a/arch/avr32/boards/mimc200/setup.c b/arch/avr32/boards/mimc200/setup.c deleted file mode 100644 index 1cb8e9cc5cfa..000000000000 --- a/arch/avr32/boards/mimc200/setup.c +++ /dev/null | |||
@@ -1,236 +0,0 @@ | |||
1 | /* | ||
2 | * Board-specific setup code for the MIMC200 | ||
3 | * | ||
4 | * Copyright (C) 2008 Mercury IMC Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | extern struct atmel_lcdfb_pdata mimc200_lcdc_data; | ||
12 | |||
13 | #include <linux/clk.h> | ||
14 | #include <linux/etherdevice.h> | ||
15 | #include <linux/i2c-gpio.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/linkage.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/types.h> | ||
20 | #include <linux/leds.h> | ||
21 | #include <linux/spi/spi.h> | ||
22 | #include <linux/spi/eeprom.h> | ||
23 | |||
24 | #include <video/atmel_lcdc.h> | ||
25 | #include <linux/fb.h> | ||
26 | |||
27 | #include <linux/atmel-mci.h> | ||
28 | #include <linux/io.h> | ||
29 | #include <asm/setup.h> | ||
30 | |||
31 | #include <mach/at32ap700x.h> | ||
32 | #include <mach/board.h> | ||
33 | #include <mach/init.h> | ||
34 | #include <mach/portmux.h> | ||
35 | |||
36 | /* Oscillator frequencies. These are board-specific */ | ||
37 | unsigned long at32_board_osc_rates[3] = { | ||
38 | [0] = 32768, /* 32.768 kHz on RTC osc */ | ||
39 | [1] = 10000000, /* 10 MHz on osc0 */ | ||
40 | [2] = 12000000, /* 12 MHz on osc1 */ | ||
41 | }; | ||
42 | |||
43 | /* Initialized by bootloader-specific startup code. */ | ||
44 | struct tag *bootloader_tags __initdata; | ||
45 | |||
46 | static struct fb_videomode __initdata pt0434827_modes[] = { | ||
47 | { | ||
48 | .name = "480x272 @ 72", | ||
49 | .refresh = 72, | ||
50 | .xres = 480, .yres = 272, | ||
51 | .pixclock = KHZ2PICOS(10000), | ||
52 | |||
53 | .left_margin = 1, .right_margin = 1, | ||
54 | .upper_margin = 12, .lower_margin = 1, | ||
55 | .hsync_len = 42, .vsync_len = 1, | ||
56 | |||
57 | .sync = 0, | ||
58 | .vmode = FB_VMODE_NONINTERLACED, | ||
59 | }, | ||
60 | }; | ||
61 | |||
62 | static struct fb_monspecs __initdata mimc200_default_monspecs = { | ||
63 | .manufacturer = "PT", | ||
64 | .monitor = "PT0434827-A401", | ||
65 | .modedb = pt0434827_modes, | ||
66 | .modedb_len = ARRAY_SIZE(pt0434827_modes), | ||
67 | .hfmin = 14820, | ||
68 | .hfmax = 22230, | ||
69 | .vfmin = 60, | ||
70 | .vfmax = 85, | ||
71 | .dclkmax = 25200000, | ||
72 | }; | ||
73 | |||
74 | struct atmel_lcdfb_pdata __initdata mimc200_lcdc_data = { | ||
75 | .default_bpp = 16, | ||
76 | .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
77 | .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
78 | | ATMEL_LCDC_INVCLK | ||
79 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
80 | | ATMEL_LCDC_MEMOR_BIG), | ||
81 | .default_monspecs = &mimc200_default_monspecs, | ||
82 | .guard_time = 2, | ||
83 | }; | ||
84 | |||
85 | struct eth_addr { | ||
86 | u8 addr[6]; | ||
87 | }; | ||
88 | static struct eth_addr __initdata hw_addr[2]; | ||
89 | static struct macb_platform_data __initdata eth_data[2]; | ||
90 | |||
91 | static struct spi_eeprom eeprom_25lc010 = { | ||
92 | .name = "25lc010", | ||
93 | .byte_len = 128, | ||
94 | .page_size = 16, | ||
95 | .flags = EE_ADDR1, | ||
96 | }; | ||
97 | |||
98 | static struct spi_board_info spi0_board_info[] __initdata = { | ||
99 | { | ||
100 | .modalias = "rtc-ds1390", | ||
101 | .max_speed_hz = 4000000, | ||
102 | .chip_select = 2, | ||
103 | }, | ||
104 | { | ||
105 | .modalias = "at25", | ||
106 | .max_speed_hz = 1000000, | ||
107 | .chip_select = 1, | ||
108 | .mode = SPI_MODE_3, | ||
109 | .platform_data = &eeprom_25lc010, | ||
110 | }, | ||
111 | }; | ||
112 | |||
113 | static struct mci_platform_data __initdata mci0_data = { | ||
114 | .slot[0] = { | ||
115 | .bus_width = 4, | ||
116 | .detect_pin = GPIO_PIN_PA(26), | ||
117 | .wp_pin = GPIO_PIN_PA(27), | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | /* | ||
122 | * The next two functions should go away as the boot loader is | ||
123 | * supposed to initialize the macb address registers with a valid | ||
124 | * ethernet address. But we need to keep it around for a while until | ||
125 | * we can be reasonably sure the boot loader does this. | ||
126 | * | ||
127 | * The phy_id is ignored as the driver will probe for it. | ||
128 | */ | ||
129 | static int __init parse_tag_ethernet(struct tag *tag) | ||
130 | { | ||
131 | int i; | ||
132 | |||
133 | i = tag->u.ethernet.mac_index; | ||
134 | if (i < ARRAY_SIZE(hw_addr)) | ||
135 | memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, | ||
136 | sizeof(hw_addr[i].addr)); | ||
137 | |||
138 | return 0; | ||
139 | } | ||
140 | __tagtable(ATAG_ETHERNET, parse_tag_ethernet); | ||
141 | |||
142 | static void __init set_hw_addr(struct platform_device *pdev) | ||
143 | { | ||
144 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
145 | const u8 *addr; | ||
146 | void __iomem *regs; | ||
147 | struct clk *pclk; | ||
148 | |||
149 | if (!res) | ||
150 | return; | ||
151 | if (pdev->id >= ARRAY_SIZE(hw_addr)) | ||
152 | return; | ||
153 | |||
154 | addr = hw_addr[pdev->id].addr; | ||
155 | if (!is_valid_ether_addr(addr)) | ||
156 | return; | ||
157 | |||
158 | /* | ||
159 | * Since this is board-specific code, we'll cheat and use the | ||
160 | * physical address directly as we happen to know that it's | ||
161 | * the same as the virtual address. | ||
162 | */ | ||
163 | regs = (void __iomem __force *)res->start; | ||
164 | pclk = clk_get(&pdev->dev, "pclk"); | ||
165 | if (IS_ERR(pclk)) | ||
166 | return; | ||
167 | |||
168 | clk_enable(pclk); | ||
169 | __raw_writel((addr[3] << 24) | (addr[2] << 16) | ||
170 | | (addr[1] << 8) | addr[0], regs + 0x98); | ||
171 | __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); | ||
172 | clk_disable(pclk); | ||
173 | clk_put(pclk); | ||
174 | } | ||
175 | |||
176 | void __init setup_board(void) | ||
177 | { | ||
178 | at32_map_usart(0, 0, 0); /* USART 0: /dev/ttyS0 (TTL --> Altera) */ | ||
179 | at32_map_usart(1, 1, 0); /* USART 1: /dev/ttyS1 (RS232) */ | ||
180 | at32_map_usart(2, 2, 0); /* USART 2: /dev/ttyS2 (RS485) */ | ||
181 | at32_map_usart(3, 3, 0); /* USART 3: /dev/ttyS3 (RS422 Multidrop) */ | ||
182 | } | ||
183 | |||
184 | static struct i2c_gpio_platform_data i2c_gpio_data = { | ||
185 | .sda_pin = GPIO_PIN_PA(6), | ||
186 | .scl_pin = GPIO_PIN_PA(7), | ||
187 | .sda_is_open_drain = 1, | ||
188 | .scl_is_open_drain = 1, | ||
189 | .udelay = 2, /* close to 100 kHz */ | ||
190 | }; | ||
191 | |||
192 | static struct platform_device i2c_gpio_device = { | ||
193 | .name = "i2c-gpio", | ||
194 | .id = 0, | ||
195 | .dev = { | ||
196 | .platform_data = &i2c_gpio_data, | ||
197 | }, | ||
198 | }; | ||
199 | |||
200 | static struct i2c_board_info __initdata i2c_info[] = { | ||
201 | }; | ||
202 | |||
203 | static int __init mimc200_init(void) | ||
204 | { | ||
205 | /* | ||
206 | * MIMC200 uses 16-bit SDRAM interface, so we don't need to | ||
207 | * reserve any pins for it. | ||
208 | */ | ||
209 | |||
210 | at32_add_device_usart(0); | ||
211 | at32_add_device_usart(1); | ||
212 | at32_add_device_usart(2); | ||
213 | at32_add_device_usart(3); | ||
214 | |||
215 | set_hw_addr(at32_add_device_eth(0, ð_data[0])); | ||
216 | set_hw_addr(at32_add_device_eth(1, ð_data[1])); | ||
217 | |||
218 | at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); | ||
219 | at32_add_device_mci(0, &mci0_data); | ||
220 | at32_add_device_usba(0, NULL); | ||
221 | |||
222 | at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP); | ||
223 | at32_select_gpio(i2c_gpio_data.sda_pin, | ||
224 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
225 | at32_select_gpio(i2c_gpio_data.scl_pin, | ||
226 | AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
227 | platform_device_register(&i2c_gpio_device); | ||
228 | i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info)); | ||
229 | |||
230 | at32_add_device_lcdc(0, &mimc200_lcdc_data, | ||
231 | fbmem_start, fbmem_size, | ||
232 | ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_CONTROL | ATMEL_LCDC_ALT_24B_DATA); | ||
233 | |||
234 | return 0; | ||
235 | } | ||
236 | postcore_initcall(mimc200_init); | ||
diff --git a/arch/avr32/boot/images/.gitignore b/arch/avr32/boot/images/.gitignore deleted file mode 100644 index 64ea9d0141d2..000000000000 --- a/arch/avr32/boot/images/.gitignore +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | uImage | ||
2 | uImage.srec | ||
3 | vmlinux.cso | ||
4 | sfdwarf.log | ||
diff --git a/arch/avr32/boot/images/Makefile b/arch/avr32/boot/images/Makefile deleted file mode 100644 index 2a3b53978a3b..000000000000 --- a/arch/avr32/boot/images/Makefile +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | # | ||
2 | # Copyright (C) 2004-2006 Atmel Corporation | ||
3 | # | ||
4 | # This file is subject to the terms and conditions of the GNU General Public | ||
5 | # License. See the file "COPYING" in the main directory of this archive | ||
6 | # for more details. | ||
7 | # | ||
8 | |||
9 | extra-y := vmlinux.bin vmlinux.gz | ||
10 | |||
11 | OBJCOPYFLAGS_vmlinux.bin := -O binary -R .note.gnu.build-id | ||
12 | $(obj)/vmlinux.bin: vmlinux FORCE | ||
13 | $(call if_changed,objcopy) | ||
14 | |||
15 | $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE | ||
16 | $(call if_changed,gzip) | ||
17 | |||
18 | UIMAGE_LOADADDR = $(CONFIG_LOAD_ADDRESS) | ||
19 | UIMAGE_ENTRYADDR = $(CONFIG_ENTRY_ADDRESS) | ||
20 | UIMAGE_COMPRESSION = gzip | ||
21 | |||
22 | targets += uImage uImage.srec | ||
23 | $(obj)/uImage: $(obj)/vmlinux.gz | ||
24 | $(call if_changed,uimage) | ||
25 | @echo ' Image $@ is ready' | ||
26 | |||
27 | OBJCOPYFLAGS_uImage.srec := -I binary -O srec | ||
28 | $(obj)/uImage.srec: $(obj)/uImage | ||
29 | $(call if_changed,objcopy) | ||
30 | |||
31 | OBJCOPYFLAGS_vmlinux.elf := --change-section-lma .text-0x80000000 \ | ||
32 | --change-section-lma __ex_table-0x80000000 \ | ||
33 | --change-section-lma .rodata-0x80000000 \ | ||
34 | --change-section-lma .data-0x80000000 \ | ||
35 | --change-section-lma .init-0x80000000 \ | ||
36 | --change-section-lma .bss-0x80000000 \ | ||
37 | --change-section-lma __param-0x80000000 \ | ||
38 | --change-section-lma __ksymtab-0x80000000 \ | ||
39 | --change-section-lma __ksymtab_gpl-0x80000000 \ | ||
40 | --change-section-lma __kcrctab-0x80000000 \ | ||
41 | --change-section-lma __kcrctab_gpl-0x80000000 \ | ||
42 | --change-section-lma __ksymtab_strings-0x80000000 \ | ||
43 | --set-start 0xa0000000 | ||
44 | $(obj)/vmlinux.elf: vmlinux FORCE | ||
45 | $(call if_changed,objcopy) | ||
46 | |||
47 | quiet_cmd_sfdwarf = SFDWARF $@ | ||
48 | cmd_sfdwarf = sfdwarf $< TO $@ GNUAVR IW $(SFDWARF_FLAGS) > $(obj)/sfdwarf.log | ||
49 | |||
50 | $(obj)/vmlinux.cso: $(obj)/vmlinux.elf FORCE | ||
51 | $(call if_changed,sfdwarf) | ||
52 | |||
53 | install: $(BOOTIMAGE) | ||
54 | sh $(srctree)/install-kernel.sh $< | ||
55 | |||
56 | # Generated files to be removed upon make clean | ||
57 | clean-files := vmlinux.elf vmlinux.bin vmlinux.gz uImage uImage.srec | ||
diff --git a/arch/avr32/boot/u-boot/Makefile b/arch/avr32/boot/u-boot/Makefile deleted file mode 100644 index 125ddc96c275..000000000000 --- a/arch/avr32/boot/u-boot/Makefile +++ /dev/null | |||
@@ -1,3 +0,0 @@ | |||
1 | extra-y := head.o | ||
2 | |||
3 | obj-y := empty.o | ||
diff --git a/arch/avr32/boot/u-boot/empty.S b/arch/avr32/boot/u-boot/empty.S deleted file mode 100644 index 8ac91a5f12f0..000000000000 --- a/arch/avr32/boot/u-boot/empty.S +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* Empty file */ | ||
diff --git a/arch/avr32/boot/u-boot/head.S b/arch/avr32/boot/u-boot/head.S deleted file mode 100644 index 2ffc298f061b..000000000000 --- a/arch/avr32/boot/u-boot/head.S +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | /* | ||
2 | * Startup code for use with the u-boot bootloader. | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <asm/setup.h> | ||
11 | #include <asm/thread_info.h> | ||
12 | #include <asm/sysreg.h> | ||
13 | |||
14 | /* | ||
15 | * The kernel is loaded where we want it to be and all caches | ||
16 | * have just been flushed. We get two parameters from u-boot: | ||
17 | * | ||
18 | * r12 contains a magic number (ATAG_MAGIC) | ||
19 | * r11 points to a tag table providing information about | ||
20 | * the system. | ||
21 | */ | ||
22 | .section .init.text,"ax" | ||
23 | .global _start | ||
24 | _start: | ||
25 | /* Initialize .bss */ | ||
26 | lddpc r2, bss_start_addr | ||
27 | lddpc r3, end_addr | ||
28 | mov r0, 0 | ||
29 | mov r1, 0 | ||
30 | 1: st.d r2++, r0 | ||
31 | cp r2, r3 | ||
32 | brlo 1b | ||
33 | |||
34 | /* Initialize status register */ | ||
35 | lddpc r0, init_sr | ||
36 | mtsr SYSREG_SR, r0 | ||
37 | |||
38 | /* Set initial stack pointer */ | ||
39 | lddpc sp, stack_addr | ||
40 | sub sp, -THREAD_SIZE | ||
41 | |||
42 | #ifdef CONFIG_FRAME_POINTER | ||
43 | /* Mark last stack frame */ | ||
44 | mov lr, 0 | ||
45 | mov r7, 0 | ||
46 | #endif | ||
47 | |||
48 | /* Check if the boot loader actually provided a tag table */ | ||
49 | lddpc r0, magic_number | ||
50 | cp.w r12, r0 | ||
51 | brne no_tag_table | ||
52 | |||
53 | /* | ||
54 | * Save the tag table address for later use. This must be done | ||
55 | * _after_ .bss has been initialized... | ||
56 | */ | ||
57 | lddpc r0, tag_table_addr | ||
58 | st.w r0[0], r11 | ||
59 | |||
60 | /* Jump to loader-independent setup code */ | ||
61 | rjmp kernel_entry | ||
62 | |||
63 | .align 2 | ||
64 | magic_number: | ||
65 | .long ATAG_MAGIC | ||
66 | tag_table_addr: | ||
67 | .long bootloader_tags | ||
68 | bss_start_addr: | ||
69 | .long __bss_start | ||
70 | end_addr: | ||
71 | .long _end | ||
72 | init_sr: | ||
73 | .long 0x007f0000 /* Supervisor mode, everything masked */ | ||
74 | stack_addr: | ||
75 | .long init_thread_union | ||
76 | panic_addr: | ||
77 | .long panic | ||
78 | |||
79 | no_tag_table: | ||
80 | sub r12, pc, (. - 2f) | ||
81 | /* branch to panic() which can be far away with that construct */ | ||
82 | lddpc pc, panic_addr | ||
83 | 2: .asciz "Boot loader didn't provide correct magic number\n" | ||
diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig deleted file mode 100644 index ce0030020c25..000000000000 --- a/arch/avr32/configs/atngw100_defconfig +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATNGW100_MKI=y | ||
19 | # CONFIG_OWNERSHIP_TRACE is not set | ||
20 | CONFIG_NMI_DEBUGGING=y | ||
21 | CONFIG_CPU_FREQ=y | ||
22 | # CONFIG_CPU_FREQ_STAT is not set | ||
23 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
24 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
25 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
26 | CONFIG_NET=y | ||
27 | CONFIG_PACKET=y | ||
28 | CONFIG_UNIX=y | ||
29 | CONFIG_XFRM_USER=y | ||
30 | CONFIG_NET_KEY=y | ||
31 | CONFIG_INET=y | ||
32 | CONFIG_IP_MULTICAST=y | ||
33 | CONFIG_IP_ADVANCED_ROUTER=y | ||
34 | CONFIG_IP_PNP=y | ||
35 | CONFIG_IP_PNP_DHCP=y | ||
36 | CONFIG_IP_MROUTE=y | ||
37 | CONFIG_IP_PIMSM_V1=y | ||
38 | CONFIG_SYN_COOKIES=y | ||
39 | CONFIG_INET_AH=y | ||
40 | CONFIG_INET_ESP=y | ||
41 | CONFIG_INET_IPCOMP=y | ||
42 | # CONFIG_INET_LRO is not set | ||
43 | CONFIG_IPV6=y | ||
44 | CONFIG_INET6_AH=y | ||
45 | CONFIG_INET6_ESP=y | ||
46 | CONFIG_INET6_IPCOMP=y | ||
47 | CONFIG_NETFILTER=y | ||
48 | # CONFIG_NETFILTER_ADVANCED is not set | ||
49 | CONFIG_NETFILTER_XTABLES=y | ||
50 | CONFIG_BRIDGE=m | ||
51 | CONFIG_VLAN_8021Q=m | ||
52 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
53 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
54 | # CONFIG_FW_LOADER is not set | ||
55 | CONFIG_MTD=y | ||
56 | CONFIG_MTD_CMDLINE_PARTS=y | ||
57 | CONFIG_MTD_BLOCK=y | ||
58 | CONFIG_MTD_CFI=y | ||
59 | CONFIG_MTD_CFI_AMDSTD=y | ||
60 | CONFIG_MTD_PHYSMAP=y | ||
61 | CONFIG_MTD_DATAFLASH=y | ||
62 | CONFIG_MTD_UBI=y | ||
63 | CONFIG_BLK_DEV_LOOP=m | ||
64 | CONFIG_BLK_DEV_NBD=m | ||
65 | CONFIG_BLK_DEV_RAM=m | ||
66 | CONFIG_ATMEL_TCLIB=y | ||
67 | CONFIG_NETDEVICES=y | ||
68 | CONFIG_TUN=m | ||
69 | CONFIG_MACB=y | ||
70 | CONFIG_PPP=m | ||
71 | CONFIG_PPP_BSDCOMP=m | ||
72 | CONFIG_PPP_DEFLATE=m | ||
73 | CONFIG_PPP_FILTER=y | ||
74 | CONFIG_PPP_MPPE=m | ||
75 | CONFIG_PPPOE=m | ||
76 | CONFIG_PPP_ASYNC=m | ||
77 | # CONFIG_INPUT is not set | ||
78 | # CONFIG_SERIO is not set | ||
79 | # CONFIG_VT is not set | ||
80 | # CONFIG_LEGACY_PTYS is not set | ||
81 | # CONFIG_DEVKMEM is not set | ||
82 | CONFIG_SERIAL_ATMEL=y | ||
83 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
84 | # CONFIG_HW_RANDOM is not set | ||
85 | CONFIG_I2C=m | ||
86 | CONFIG_I2C_CHARDEV=m | ||
87 | CONFIG_I2C_GPIO=m | ||
88 | CONFIG_SPI=y | ||
89 | CONFIG_SPI_ATMEL=y | ||
90 | CONFIG_SPI_SPIDEV=m | ||
91 | CONFIG_GPIO_SYSFS=y | ||
92 | # CONFIG_HWMON is not set | ||
93 | CONFIG_WATCHDOG=y | ||
94 | CONFIG_AT32AP700X_WDT=y | ||
95 | CONFIG_USB_GADGET=y | ||
96 | CONFIG_USB_GADGET_VBUS_DRAW=350 | ||
97 | CONFIG_USB_ZERO=m | ||
98 | CONFIG_USB_ETH=m | ||
99 | CONFIG_USB_GADGETFS=m | ||
100 | CONFIG_USB_MASS_STORAGE=m | ||
101 | CONFIG_USB_G_SERIAL=m | ||
102 | CONFIG_USB_CDC_COMPOSITE=m | ||
103 | CONFIG_MMC=y | ||
104 | CONFIG_MMC_TEST=m | ||
105 | CONFIG_MMC_ATMELMCI=y | ||
106 | CONFIG_NEW_LEDS=y | ||
107 | CONFIG_LEDS_CLASS=y | ||
108 | CONFIG_LEDS_GPIO=y | ||
109 | CONFIG_LEDS_TRIGGERS=y | ||
110 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
111 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
112 | CONFIG_RTC_CLASS=y | ||
113 | CONFIG_RTC_DRV_AT32AP700X=y | ||
114 | CONFIG_DMADEVICES=y | ||
115 | CONFIG_EXT2_FS=y | ||
116 | CONFIG_EXT3_FS=y | ||
117 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
118 | # CONFIG_EXT3_FS_XATTR is not set | ||
119 | CONFIG_EXT4_FS=y | ||
120 | # CONFIG_DNOTIFY is not set | ||
121 | CONFIG_FUSE_FS=m | ||
122 | CONFIG_MSDOS_FS=m | ||
123 | CONFIG_VFAT_FS=m | ||
124 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
125 | CONFIG_PROC_KCORE=y | ||
126 | CONFIG_TMPFS=y | ||
127 | CONFIG_CONFIGFS_FS=y | ||
128 | CONFIG_JFFS2_FS=y | ||
129 | CONFIG_UBIFS_FS=y | ||
130 | CONFIG_NFS_FS=y | ||
131 | CONFIG_ROOT_NFS=y | ||
132 | CONFIG_NFSD=m | ||
133 | CONFIG_NFSD_V3=y | ||
134 | CONFIG_CIFS=m | ||
135 | CONFIG_NLS_CODEPAGE_437=m | ||
136 | CONFIG_NLS_CODEPAGE_850=m | ||
137 | CONFIG_NLS_ISO8859_1=m | ||
138 | CONFIG_NLS_UTF8=m | ||
139 | CONFIG_DEBUG_FS=y | ||
140 | CONFIG_FRAME_POINTER=y | ||
141 | CONFIG_MAGIC_SYSRQ=y | ||
142 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atngw100_evklcd100_defconfig b/arch/avr32/configs/atngw100_evklcd100_defconfig deleted file mode 100644 index 01ff632249c0..000000000000 --- a/arch/avr32/configs/atngw100_evklcd100_defconfig +++ /dev/null | |||
@@ -1,158 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATNGW100_MKI=y | ||
19 | CONFIG_BOARD_ATNGW100_EVKLCD10X=y | ||
20 | CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA=y | ||
21 | # CONFIG_OWNERSHIP_TRACE is not set | ||
22 | CONFIG_NMI_DEBUGGING=y | ||
23 | CONFIG_CPU_FREQ=y | ||
24 | # CONFIG_CPU_FREQ_STAT is not set | ||
25 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
26 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
27 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
28 | CONFIG_NET=y | ||
29 | CONFIG_PACKET=y | ||
30 | CONFIG_UNIX=y | ||
31 | CONFIG_XFRM_USER=y | ||
32 | CONFIG_NET_KEY=y | ||
33 | CONFIG_INET=y | ||
34 | CONFIG_IP_MULTICAST=y | ||
35 | CONFIG_IP_ADVANCED_ROUTER=y | ||
36 | CONFIG_IP_PNP=y | ||
37 | CONFIG_IP_PNP_DHCP=y | ||
38 | CONFIG_IP_MROUTE=y | ||
39 | CONFIG_IP_PIMSM_V1=y | ||
40 | CONFIG_SYN_COOKIES=y | ||
41 | CONFIG_INET_AH=y | ||
42 | CONFIG_INET_ESP=y | ||
43 | CONFIG_INET_IPCOMP=y | ||
44 | # CONFIG_INET_LRO is not set | ||
45 | CONFIG_IPV6=y | ||
46 | CONFIG_INET6_AH=y | ||
47 | CONFIG_INET6_ESP=y | ||
48 | CONFIG_INET6_IPCOMP=y | ||
49 | CONFIG_NETFILTER=y | ||
50 | # CONFIG_NETFILTER_ADVANCED is not set | ||
51 | CONFIG_NETFILTER_XTABLES=y | ||
52 | CONFIG_BRIDGE=m | ||
53 | CONFIG_VLAN_8021Q=m | ||
54 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
55 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
56 | # CONFIG_FW_LOADER is not set | ||
57 | CONFIG_MTD=y | ||
58 | CONFIG_MTD_CMDLINE_PARTS=y | ||
59 | CONFIG_MTD_BLOCK=y | ||
60 | CONFIG_MTD_CFI=y | ||
61 | CONFIG_MTD_CFI_AMDSTD=y | ||
62 | CONFIG_MTD_PHYSMAP=y | ||
63 | CONFIG_MTD_DATAFLASH=y | ||
64 | CONFIG_MTD_UBI=y | ||
65 | CONFIG_BLK_DEV_LOOP=m | ||
66 | CONFIG_BLK_DEV_NBD=m | ||
67 | CONFIG_BLK_DEV_RAM=m | ||
68 | CONFIG_ATMEL_TCLIB=y | ||
69 | CONFIG_NETDEVICES=y | ||
70 | CONFIG_TUN=m | ||
71 | CONFIG_MACB=y | ||
72 | CONFIG_PPP=m | ||
73 | CONFIG_PPP_BSDCOMP=m | ||
74 | CONFIG_PPP_DEFLATE=m | ||
75 | CONFIG_PPP_FILTER=y | ||
76 | CONFIG_PPP_MPPE=m | ||
77 | CONFIG_PPPOE=m | ||
78 | CONFIG_PPP_ASYNC=m | ||
79 | # CONFIG_INPUT_MOUSEDEV is not set | ||
80 | CONFIG_INPUT_EVDEV=m | ||
81 | # CONFIG_INPUT_KEYBOARD is not set | ||
82 | # CONFIG_INPUT_MOUSE is not set | ||
83 | CONFIG_INPUT_TOUCHSCREEN=y | ||
84 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
85 | # CONFIG_SERIO is not set | ||
86 | # CONFIG_LEGACY_PTYS is not set | ||
87 | CONFIG_SERIAL_ATMEL=y | ||
88 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
89 | # CONFIG_HW_RANDOM is not set | ||
90 | CONFIG_I2C=m | ||
91 | CONFIG_I2C_CHARDEV=m | ||
92 | CONFIG_I2C_GPIO=m | ||
93 | CONFIG_SPI=y | ||
94 | CONFIG_SPI_ATMEL=y | ||
95 | CONFIG_SPI_SPIDEV=m | ||
96 | CONFIG_GPIO_SYSFS=y | ||
97 | # CONFIG_HWMON is not set | ||
98 | CONFIG_WATCHDOG=y | ||
99 | CONFIG_AT32AP700X_WDT=y | ||
100 | CONFIG_FB=y | ||
101 | CONFIG_FB_ATMEL=y | ||
102 | CONFIG_SOUND=y | ||
103 | CONFIG_SND=y | ||
104 | CONFIG_SND_MIXER_OSS=m | ||
105 | CONFIG_SND_PCM_OSS=m | ||
106 | CONFIG_SND_HRTIMER=y | ||
107 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
108 | # CONFIG_SND_DRIVERS is not set | ||
109 | CONFIG_SND_ATMEL_AC97C=m | ||
110 | # CONFIG_SND_SPI is not set | ||
111 | CONFIG_USB_GADGET=y | ||
112 | CONFIG_USB_GADGET_VBUS_DRAW=350 | ||
113 | CONFIG_USB_ZERO=m | ||
114 | CONFIG_USB_ETH=m | ||
115 | CONFIG_USB_GADGETFS=m | ||
116 | CONFIG_USB_MASS_STORAGE=m | ||
117 | CONFIG_USB_G_SERIAL=m | ||
118 | CONFIG_USB_CDC_COMPOSITE=m | ||
119 | CONFIG_MMC=y | ||
120 | CONFIG_MMC_TEST=m | ||
121 | CONFIG_MMC_ATMELMCI=y | ||
122 | CONFIG_NEW_LEDS=y | ||
123 | CONFIG_LEDS_CLASS=y | ||
124 | CONFIG_LEDS_GPIO=y | ||
125 | CONFIG_LEDS_TRIGGERS=y | ||
126 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
127 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
128 | CONFIG_RTC_CLASS=y | ||
129 | CONFIG_RTC_DRV_AT32AP700X=y | ||
130 | CONFIG_DMADEVICES=y | ||
131 | CONFIG_EXT2_FS=y | ||
132 | CONFIG_EXT3_FS=y | ||
133 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
134 | # CONFIG_EXT3_FS_XATTR is not set | ||
135 | CONFIG_EXT4_FS=y | ||
136 | # CONFIG_DNOTIFY is not set | ||
137 | CONFIG_FUSE_FS=m | ||
138 | CONFIG_MSDOS_FS=m | ||
139 | CONFIG_VFAT_FS=m | ||
140 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
141 | CONFIG_PROC_KCORE=y | ||
142 | CONFIG_TMPFS=y | ||
143 | CONFIG_CONFIGFS_FS=y | ||
144 | CONFIG_JFFS2_FS=y | ||
145 | CONFIG_UBIFS_FS=y | ||
146 | CONFIG_NFS_FS=y | ||
147 | CONFIG_ROOT_NFS=y | ||
148 | CONFIG_NFSD=m | ||
149 | CONFIG_NFSD_V3=y | ||
150 | CONFIG_CIFS=m | ||
151 | CONFIG_NLS_CODEPAGE_437=m | ||
152 | CONFIG_NLS_CODEPAGE_850=m | ||
153 | CONFIG_NLS_ISO8859_1=m | ||
154 | CONFIG_NLS_UTF8=m | ||
155 | CONFIG_DEBUG_FS=y | ||
156 | CONFIG_FRAME_POINTER=y | ||
157 | CONFIG_MAGIC_SYSRQ=y | ||
158 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atngw100_evklcd101_defconfig b/arch/avr32/configs/atngw100_evklcd101_defconfig deleted file mode 100644 index c4021dfd5347..000000000000 --- a/arch/avr32/configs/atngw100_evklcd101_defconfig +++ /dev/null | |||
@@ -1,157 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATNGW100_MKI=y | ||
19 | CONFIG_BOARD_ATNGW100_EVKLCD10X=y | ||
20 | # CONFIG_OWNERSHIP_TRACE is not set | ||
21 | CONFIG_NMI_DEBUGGING=y | ||
22 | CONFIG_CPU_FREQ=y | ||
23 | # CONFIG_CPU_FREQ_STAT is not set | ||
24 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
25 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
26 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
27 | CONFIG_NET=y | ||
28 | CONFIG_PACKET=y | ||
29 | CONFIG_UNIX=y | ||
30 | CONFIG_XFRM_USER=y | ||
31 | CONFIG_NET_KEY=y | ||
32 | CONFIG_INET=y | ||
33 | CONFIG_IP_MULTICAST=y | ||
34 | CONFIG_IP_ADVANCED_ROUTER=y | ||
35 | CONFIG_IP_PNP=y | ||
36 | CONFIG_IP_PNP_DHCP=y | ||
37 | CONFIG_IP_MROUTE=y | ||
38 | CONFIG_IP_PIMSM_V1=y | ||
39 | CONFIG_SYN_COOKIES=y | ||
40 | CONFIG_INET_AH=y | ||
41 | CONFIG_INET_ESP=y | ||
42 | CONFIG_INET_IPCOMP=y | ||
43 | # CONFIG_INET_LRO is not set | ||
44 | CONFIG_IPV6=y | ||
45 | CONFIG_INET6_AH=y | ||
46 | CONFIG_INET6_ESP=y | ||
47 | CONFIG_INET6_IPCOMP=y | ||
48 | CONFIG_NETFILTER=y | ||
49 | # CONFIG_NETFILTER_ADVANCED is not set | ||
50 | CONFIG_NETFILTER_XTABLES=y | ||
51 | CONFIG_BRIDGE=m | ||
52 | CONFIG_VLAN_8021Q=m | ||
53 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
54 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
55 | # CONFIG_FW_LOADER is not set | ||
56 | CONFIG_MTD=y | ||
57 | CONFIG_MTD_CMDLINE_PARTS=y | ||
58 | CONFIG_MTD_BLOCK=y | ||
59 | CONFIG_MTD_CFI=y | ||
60 | CONFIG_MTD_CFI_AMDSTD=y | ||
61 | CONFIG_MTD_PHYSMAP=y | ||
62 | CONFIG_MTD_DATAFLASH=y | ||
63 | CONFIG_MTD_UBI=y | ||
64 | CONFIG_BLK_DEV_LOOP=m | ||
65 | CONFIG_BLK_DEV_NBD=m | ||
66 | CONFIG_BLK_DEV_RAM=m | ||
67 | CONFIG_ATMEL_TCLIB=y | ||
68 | CONFIG_NETDEVICES=y | ||
69 | CONFIG_TUN=m | ||
70 | CONFIG_MACB=y | ||
71 | CONFIG_PPP=m | ||
72 | CONFIG_PPP_BSDCOMP=m | ||
73 | CONFIG_PPP_DEFLATE=m | ||
74 | CONFIG_PPP_FILTER=y | ||
75 | CONFIG_PPP_MPPE=m | ||
76 | CONFIG_PPPOE=m | ||
77 | CONFIG_PPP_ASYNC=m | ||
78 | # CONFIG_INPUT_MOUSEDEV is not set | ||
79 | CONFIG_INPUT_EVDEV=m | ||
80 | # CONFIG_INPUT_KEYBOARD is not set | ||
81 | # CONFIG_INPUT_MOUSE is not set | ||
82 | CONFIG_INPUT_TOUCHSCREEN=y | ||
83 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
84 | # CONFIG_SERIO is not set | ||
85 | # CONFIG_LEGACY_PTYS is not set | ||
86 | CONFIG_SERIAL_ATMEL=y | ||
87 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
88 | # CONFIG_HW_RANDOM is not set | ||
89 | CONFIG_I2C=m | ||
90 | CONFIG_I2C_CHARDEV=m | ||
91 | CONFIG_I2C_GPIO=m | ||
92 | CONFIG_SPI=y | ||
93 | CONFIG_SPI_ATMEL=y | ||
94 | CONFIG_SPI_SPIDEV=m | ||
95 | CONFIG_GPIO_SYSFS=y | ||
96 | # CONFIG_HWMON is not set | ||
97 | CONFIG_WATCHDOG=y | ||
98 | CONFIG_AT32AP700X_WDT=y | ||
99 | CONFIG_FB=y | ||
100 | CONFIG_FB_ATMEL=y | ||
101 | CONFIG_SOUND=y | ||
102 | CONFIG_SND=y | ||
103 | CONFIG_SND_MIXER_OSS=m | ||
104 | CONFIG_SND_PCM_OSS=m | ||
105 | CONFIG_SND_HRTIMER=y | ||
106 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
107 | # CONFIG_SND_DRIVERS is not set | ||
108 | CONFIG_SND_ATMEL_AC97C=m | ||
109 | # CONFIG_SND_SPI is not set | ||
110 | CONFIG_USB_GADGET=y | ||
111 | CONFIG_USB_GADGET_VBUS_DRAW=350 | ||
112 | CONFIG_USB_ZERO=m | ||
113 | CONFIG_USB_ETH=m | ||
114 | CONFIG_USB_GADGETFS=m | ||
115 | CONFIG_USB_MASS_STORAGE=m | ||
116 | CONFIG_USB_G_SERIAL=m | ||
117 | CONFIG_USB_CDC_COMPOSITE=m | ||
118 | CONFIG_MMC=y | ||
119 | CONFIG_MMC_TEST=m | ||
120 | CONFIG_MMC_ATMELMCI=y | ||
121 | CONFIG_NEW_LEDS=y | ||
122 | CONFIG_LEDS_CLASS=y | ||
123 | CONFIG_LEDS_GPIO=y | ||
124 | CONFIG_LEDS_TRIGGERS=y | ||
125 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
126 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
127 | CONFIG_RTC_CLASS=y | ||
128 | CONFIG_RTC_DRV_AT32AP700X=y | ||
129 | CONFIG_DMADEVICES=y | ||
130 | CONFIG_EXT2_FS=y | ||
131 | CONFIG_EXT3_FS=y | ||
132 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
133 | # CONFIG_EXT3_FS_XATTR is not set | ||
134 | CONFIG_EXT4_FS=y | ||
135 | # CONFIG_DNOTIFY is not set | ||
136 | CONFIG_FUSE_FS=m | ||
137 | CONFIG_MSDOS_FS=m | ||
138 | CONFIG_VFAT_FS=m | ||
139 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
140 | CONFIG_PROC_KCORE=y | ||
141 | CONFIG_TMPFS=y | ||
142 | CONFIG_CONFIGFS_FS=y | ||
143 | CONFIG_JFFS2_FS=y | ||
144 | CONFIG_UBIFS_FS=y | ||
145 | CONFIG_NFS_FS=y | ||
146 | CONFIG_ROOT_NFS=y | ||
147 | CONFIG_NFSD=m | ||
148 | CONFIG_NFSD_V3=y | ||
149 | CONFIG_CIFS=m | ||
150 | CONFIG_NLS_CODEPAGE_437=m | ||
151 | CONFIG_NLS_CODEPAGE_850=m | ||
152 | CONFIG_NLS_ISO8859_1=m | ||
153 | CONFIG_NLS_UTF8=m | ||
154 | CONFIG_DEBUG_FS=y | ||
155 | CONFIG_FRAME_POINTER=y | ||
156 | CONFIG_MAGIC_SYSRQ=y | ||
157 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atngw100_mrmt_defconfig b/arch/avr32/configs/atngw100_mrmt_defconfig deleted file mode 100644 index ffcc28df9dbc..000000000000 --- a/arch/avr32/configs/atngw100_mrmt_defconfig +++ /dev/null | |||
@@ -1,136 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_BSD_PROCESS_ACCT=y | ||
5 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_BLK_DEV_INITRD=y | ||
8 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
9 | # CONFIG_BASE_FULL is not set | ||
10 | # CONFIG_SLUB_DEBUG is not set | ||
11 | CONFIG_MODULES=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
14 | # CONFIG_BLK_DEV_BSG is not set | ||
15 | # CONFIG_IOSCHED_DEADLINE is not set | ||
16 | # CONFIG_OWNERSHIP_TRACE is not set | ||
17 | # CONFIG_SUSPEND is not set | ||
18 | CONFIG_PM=y | ||
19 | CONFIG_CPU_FREQ=y | ||
20 | CONFIG_CPU_FREQ_GOV_POWERSAVE=y | ||
21 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
22 | CONFIG_CPU_FREQ_GOV_ONDEMAND=y | ||
23 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
24 | CONFIG_NET=y | ||
25 | CONFIG_PACKET=y | ||
26 | CONFIG_UNIX=y | ||
27 | CONFIG_INET=y | ||
28 | CONFIG_IP_PNP=y | ||
29 | CONFIG_IP_PNP_DHCP=y | ||
30 | CONFIG_SYN_COOKIES=y | ||
31 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
32 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
33 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
34 | # CONFIG_INET_LRO is not set | ||
35 | # CONFIG_IPV6 is not set | ||
36 | CONFIG_BT=m | ||
37 | CONFIG_BT_RFCOMM=m | ||
38 | CONFIG_BT_RFCOMM_TTY=y | ||
39 | CONFIG_BT_HIDP=m | ||
40 | CONFIG_BT_HCIUART=m | ||
41 | CONFIG_BT_HCIUART_H4=y | ||
42 | CONFIG_BT_HCIUART_BCSP=y | ||
43 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
44 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
45 | # CONFIG_FW_LOADER is not set | ||
46 | CONFIG_MTD=y | ||
47 | CONFIG_MTD_CMDLINE_PARTS=y | ||
48 | CONFIG_MTD_BLOCK=y | ||
49 | CONFIG_MTD_CFI=y | ||
50 | CONFIG_MTD_CFI_AMDSTD=y | ||
51 | CONFIG_MTD_PHYSMAP=y | ||
52 | CONFIG_MTD_DATAFLASH=y | ||
53 | CONFIG_BLK_DEV_LOOP=y | ||
54 | CONFIG_NETDEVICES=y | ||
55 | CONFIG_MACB=y | ||
56 | # CONFIG_INPUT_MOUSEDEV is not set | ||
57 | CONFIG_INPUT_EVDEV=y | ||
58 | # CONFIG_KEYBOARD_ATKBD is not set | ||
59 | CONFIG_KEYBOARD_GPIO=y | ||
60 | # CONFIG_INPUT_MOUSE is not set | ||
61 | CONFIG_INPUT_TOUCHSCREEN=y | ||
62 | CONFIG_TOUCHSCREEN_ADS7846=m | ||
63 | # CONFIG_SERIO is not set | ||
64 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
65 | # CONFIG_LEGACY_PTYS is not set | ||
66 | CONFIG_SERIAL_ATMEL=y | ||
67 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
68 | # CONFIG_HW_RANDOM is not set | ||
69 | CONFIG_I2C=y | ||
70 | CONFIG_I2C_CHARDEV=y | ||
71 | CONFIG_I2C_GPIO=y | ||
72 | CONFIG_SPI=y | ||
73 | CONFIG_SPI_ATMEL=y | ||
74 | CONFIG_SPI_SPIDEV=y | ||
75 | CONFIG_WATCHDOG=y | ||
76 | CONFIG_AT32AP700X_WDT=y | ||
77 | CONFIG_FB=y | ||
78 | CONFIG_FB_ATMEL=y | ||
79 | CONFIG_LCD_CLASS_DEVICE=y | ||
80 | CONFIG_SOUND=m | ||
81 | CONFIG_SND=m | ||
82 | CONFIG_SND_MIXER_OSS=m | ||
83 | CONFIG_SND_PCM_OSS=m | ||
84 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
85 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
86 | CONFIG_SND_ATMEL_AC97C=m | ||
87 | # CONFIG_SND_SPI is not set | ||
88 | CONFIG_USB_GADGET=m | ||
89 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
90 | CONFIG_USB_MASS_STORAGE=m | ||
91 | CONFIG_USB_G_SERIAL=m | ||
92 | CONFIG_MMC=y | ||
93 | CONFIG_MMC_ATMELMCI=y | ||
94 | CONFIG_NEW_LEDS=y | ||
95 | CONFIG_LEDS_CLASS=y | ||
96 | CONFIG_LEDS_GPIO=y | ||
97 | CONFIG_LEDS_PWM=y | ||
98 | CONFIG_LEDS_TRIGGERS=y | ||
99 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
100 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
101 | CONFIG_RTC_CLASS=y | ||
102 | CONFIG_RTC_DRV_S35390A=m | ||
103 | CONFIG_RTC_DRV_AT32AP700X=m | ||
104 | CONFIG_DMADEVICES=y | ||
105 | CONFIG_UIO=y | ||
106 | CONFIG_PWM=y | ||
107 | CONFIG_PWM_ATMEL=y | ||
108 | CONFIG_EXT2_FS=y | ||
109 | CONFIG_EXT2_FS_XATTR=y | ||
110 | CONFIG_EXT3_FS=y | ||
111 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
112 | # CONFIG_DNOTIFY is not set | ||
113 | CONFIG_MSDOS_FS=y | ||
114 | CONFIG_VFAT_FS=y | ||
115 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
116 | CONFIG_NTFS_FS=m | ||
117 | CONFIG_NTFS_RW=y | ||
118 | CONFIG_TMPFS=y | ||
119 | CONFIG_CONFIGFS_FS=y | ||
120 | CONFIG_JFFS2_FS=y | ||
121 | CONFIG_NFS_FS=y | ||
122 | CONFIG_ROOT_NFS=y | ||
123 | CONFIG_CIFS=m | ||
124 | CONFIG_CIFS_STATS=y | ||
125 | CONFIG_CIFS_WEAK_PW_HASH=y | ||
126 | CONFIG_CIFS_XATTR=y | ||
127 | CONFIG_CIFS_POSIX=y | ||
128 | CONFIG_NLS_CODEPAGE_437=y | ||
129 | CONFIG_NLS_CODEPAGE_850=y | ||
130 | CONFIG_NLS_ISO8859_1=y | ||
131 | CONFIG_NLS_UTF8=y | ||
132 | CONFIG_DEBUG_FS=y | ||
133 | CONFIG_FRAME_POINTER=y | ||
134 | CONFIG_MAGIC_SYSRQ=y | ||
135 | CONFIG_DETECT_HUNG_TASK=y | ||
136 | CONFIG_CRC_CCITT=y | ||
diff --git a/arch/avr32/configs/atngw100mkii_defconfig b/arch/avr32/configs/atngw100mkii_defconfig deleted file mode 100644 index 04962641c936..000000000000 --- a/arch/avr32/configs/atngw100mkii_defconfig +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATNGW100_MKII=y | ||
19 | # CONFIG_OWNERSHIP_TRACE is not set | ||
20 | CONFIG_NMI_DEBUGGING=y | ||
21 | CONFIG_CPU_FREQ=y | ||
22 | # CONFIG_CPU_FREQ_STAT is not set | ||
23 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
24 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
25 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
26 | CONFIG_NET=y | ||
27 | CONFIG_PACKET=y | ||
28 | CONFIG_UNIX=y | ||
29 | CONFIG_XFRM_USER=y | ||
30 | CONFIG_NET_KEY=y | ||
31 | CONFIG_INET=y | ||
32 | CONFIG_IP_MULTICAST=y | ||
33 | CONFIG_IP_ADVANCED_ROUTER=y | ||
34 | CONFIG_IP_PNP=y | ||
35 | CONFIG_IP_PNP_DHCP=y | ||
36 | CONFIG_IP_MROUTE=y | ||
37 | CONFIG_IP_PIMSM_V1=y | ||
38 | CONFIG_SYN_COOKIES=y | ||
39 | CONFIG_INET_AH=y | ||
40 | CONFIG_INET_ESP=y | ||
41 | CONFIG_INET_IPCOMP=y | ||
42 | # CONFIG_INET_LRO is not set | ||
43 | CONFIG_IPV6=y | ||
44 | CONFIG_INET6_AH=y | ||
45 | CONFIG_INET6_ESP=y | ||
46 | CONFIG_INET6_IPCOMP=y | ||
47 | CONFIG_NETFILTER=y | ||
48 | # CONFIG_NETFILTER_ADVANCED is not set | ||
49 | CONFIG_NETFILTER_XTABLES=y | ||
50 | CONFIG_BRIDGE=m | ||
51 | CONFIG_VLAN_8021Q=m | ||
52 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
53 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
54 | # CONFIG_FW_LOADER is not set | ||
55 | CONFIG_MTD=y | ||
56 | CONFIG_MTD_CMDLINE_PARTS=y | ||
57 | CONFIG_MTD_BLOCK=y | ||
58 | CONFIG_MTD_CFI=y | ||
59 | CONFIG_MTD_CFI_INTELEXT=y | ||
60 | CONFIG_MTD_PHYSMAP=y | ||
61 | CONFIG_MTD_DATAFLASH=y | ||
62 | CONFIG_MTD_NAND=y | ||
63 | CONFIG_MTD_NAND_ATMEL=y | ||
64 | CONFIG_MTD_UBI=y | ||
65 | CONFIG_BLK_DEV_LOOP=m | ||
66 | CONFIG_BLK_DEV_NBD=m | ||
67 | CONFIG_BLK_DEV_RAM=m | ||
68 | CONFIG_ATMEL_TCLIB=y | ||
69 | CONFIG_NETDEVICES=y | ||
70 | CONFIG_TUN=m | ||
71 | CONFIG_MACB=y | ||
72 | CONFIG_PPP=m | ||
73 | CONFIG_PPP_BSDCOMP=m | ||
74 | CONFIG_PPP_DEFLATE=m | ||
75 | CONFIG_PPP_FILTER=y | ||
76 | CONFIG_PPP_MPPE=m | ||
77 | CONFIG_PPPOE=m | ||
78 | CONFIG_PPP_ASYNC=m | ||
79 | # CONFIG_INPUT is not set | ||
80 | # CONFIG_SERIO is not set | ||
81 | # CONFIG_VT is not set | ||
82 | # CONFIG_LEGACY_PTYS is not set | ||
83 | # CONFIG_DEVKMEM is not set | ||
84 | CONFIG_SERIAL_ATMEL=y | ||
85 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
86 | # CONFIG_HW_RANDOM is not set | ||
87 | CONFIG_I2C=m | ||
88 | CONFIG_I2C_CHARDEV=m | ||
89 | CONFIG_I2C_GPIO=m | ||
90 | CONFIG_SPI=y | ||
91 | CONFIG_SPI_ATMEL=y | ||
92 | CONFIG_SPI_SPIDEV=m | ||
93 | CONFIG_GPIO_SYSFS=y | ||
94 | # CONFIG_HWMON is not set | ||
95 | CONFIG_WATCHDOG=y | ||
96 | CONFIG_AT32AP700X_WDT=y | ||
97 | CONFIG_USB_GADGET=y | ||
98 | CONFIG_USB_GADGET_VBUS_DRAW=350 | ||
99 | CONFIG_USB_ZERO=m | ||
100 | CONFIG_USB_ETH=m | ||
101 | CONFIG_USB_GADGETFS=m | ||
102 | CONFIG_USB_MASS_STORAGE=m | ||
103 | CONFIG_USB_G_SERIAL=m | ||
104 | CONFIG_USB_CDC_COMPOSITE=m | ||
105 | CONFIG_MMC=y | ||
106 | CONFIG_MMC_TEST=m | ||
107 | CONFIG_MMC_ATMELMCI=y | ||
108 | CONFIG_NEW_LEDS=y | ||
109 | CONFIG_LEDS_CLASS=y | ||
110 | CONFIG_LEDS_GPIO=y | ||
111 | CONFIG_LEDS_TRIGGERS=y | ||
112 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
113 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
114 | CONFIG_RTC_CLASS=y | ||
115 | CONFIG_RTC_DRV_AT32AP700X=y | ||
116 | CONFIG_DMADEVICES=y | ||
117 | CONFIG_EXT2_FS=y | ||
118 | CONFIG_EXT3_FS=y | ||
119 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
120 | # CONFIG_EXT3_FS_XATTR is not set | ||
121 | CONFIG_EXT4_FS=y | ||
122 | # CONFIG_DNOTIFY is not set | ||
123 | CONFIG_FUSE_FS=m | ||
124 | CONFIG_MSDOS_FS=m | ||
125 | CONFIG_VFAT_FS=m | ||
126 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
127 | CONFIG_PROC_KCORE=y | ||
128 | CONFIG_TMPFS=y | ||
129 | CONFIG_CONFIGFS_FS=y | ||
130 | CONFIG_JFFS2_FS=y | ||
131 | CONFIG_UBIFS_FS=y | ||
132 | CONFIG_NFS_FS=y | ||
133 | CONFIG_ROOT_NFS=y | ||
134 | CONFIG_NFSD=m | ||
135 | CONFIG_NFSD_V3=y | ||
136 | CONFIG_CIFS=m | ||
137 | CONFIG_NLS_CODEPAGE_437=m | ||
138 | CONFIG_NLS_CODEPAGE_850=m | ||
139 | CONFIG_NLS_ISO8859_1=m | ||
140 | CONFIG_NLS_UTF8=m | ||
141 | CONFIG_DEBUG_FS=y | ||
142 | CONFIG_FRAME_POINTER=y | ||
143 | CONFIG_MAGIC_SYSRQ=y | ||
144 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atngw100mkii_evklcd100_defconfig b/arch/avr32/configs/atngw100mkii_evklcd100_defconfig deleted file mode 100644 index 89c2cda573da..000000000000 --- a/arch/avr32/configs/atngw100mkii_evklcd100_defconfig +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATNGW100_MKII=y | ||
19 | CONFIG_BOARD_ATNGW100_MKII_LCD=y | ||
20 | CONFIG_BOARD_ATNGW100_EVKLCD10X=y | ||
21 | CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA=y | ||
22 | # CONFIG_OWNERSHIP_TRACE is not set | ||
23 | CONFIG_NMI_DEBUGGING=y | ||
24 | CONFIG_CPU_FREQ=y | ||
25 | # CONFIG_CPU_FREQ_STAT is not set | ||
26 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
27 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
28 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
29 | CONFIG_NET=y | ||
30 | CONFIG_PACKET=y | ||
31 | CONFIG_UNIX=y | ||
32 | CONFIG_XFRM_USER=y | ||
33 | CONFIG_NET_KEY=y | ||
34 | CONFIG_INET=y | ||
35 | CONFIG_IP_MULTICAST=y | ||
36 | CONFIG_IP_ADVANCED_ROUTER=y | ||
37 | CONFIG_IP_PNP=y | ||
38 | CONFIG_IP_PNP_DHCP=y | ||
39 | CONFIG_IP_MROUTE=y | ||
40 | CONFIG_IP_PIMSM_V1=y | ||
41 | CONFIG_SYN_COOKIES=y | ||
42 | CONFIG_INET_AH=y | ||
43 | CONFIG_INET_ESP=y | ||
44 | CONFIG_INET_IPCOMP=y | ||
45 | # CONFIG_INET_LRO is not set | ||
46 | CONFIG_IPV6=y | ||
47 | CONFIG_INET6_AH=y | ||
48 | CONFIG_INET6_ESP=y | ||
49 | CONFIG_INET6_IPCOMP=y | ||
50 | CONFIG_NETFILTER=y | ||
51 | # CONFIG_NETFILTER_ADVANCED is not set | ||
52 | CONFIG_NETFILTER_XTABLES=y | ||
53 | CONFIG_BRIDGE=m | ||
54 | CONFIG_VLAN_8021Q=m | ||
55 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
56 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
57 | # CONFIG_FW_LOADER is not set | ||
58 | CONFIG_MTD=y | ||
59 | CONFIG_MTD_CMDLINE_PARTS=y | ||
60 | CONFIG_MTD_BLOCK=y | ||
61 | CONFIG_MTD_CFI=y | ||
62 | CONFIG_MTD_CFI_INTELEXT=y | ||
63 | CONFIG_MTD_PHYSMAP=y | ||
64 | CONFIG_MTD_DATAFLASH=y | ||
65 | CONFIG_MTD_NAND=y | ||
66 | CONFIG_MTD_NAND_ATMEL=y | ||
67 | CONFIG_MTD_UBI=y | ||
68 | CONFIG_BLK_DEV_LOOP=m | ||
69 | CONFIG_BLK_DEV_NBD=m | ||
70 | CONFIG_BLK_DEV_RAM=m | ||
71 | CONFIG_ATMEL_TCLIB=y | ||
72 | CONFIG_NETDEVICES=y | ||
73 | CONFIG_TUN=m | ||
74 | CONFIG_MACB=y | ||
75 | CONFIG_PPP=m | ||
76 | CONFIG_PPP_BSDCOMP=m | ||
77 | CONFIG_PPP_DEFLATE=m | ||
78 | CONFIG_PPP_FILTER=y | ||
79 | CONFIG_PPP_MPPE=m | ||
80 | CONFIG_PPPOE=m | ||
81 | CONFIG_PPP_ASYNC=m | ||
82 | # CONFIG_INPUT_MOUSEDEV is not set | ||
83 | CONFIG_INPUT_EVDEV=m | ||
84 | # CONFIG_INPUT_KEYBOARD is not set | ||
85 | # CONFIG_INPUT_MOUSE is not set | ||
86 | CONFIG_INPUT_TOUCHSCREEN=y | ||
87 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
88 | # CONFIG_SERIO is not set | ||
89 | # CONFIG_LEGACY_PTYS is not set | ||
90 | CONFIG_SERIAL_ATMEL=y | ||
91 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
92 | # CONFIG_HW_RANDOM is not set | ||
93 | CONFIG_I2C=m | ||
94 | CONFIG_I2C_CHARDEV=m | ||
95 | CONFIG_I2C_GPIO=m | ||
96 | CONFIG_SPI=y | ||
97 | CONFIG_SPI_ATMEL=y | ||
98 | CONFIG_SPI_SPIDEV=m | ||
99 | CONFIG_GPIO_SYSFS=y | ||
100 | # CONFIG_HWMON is not set | ||
101 | CONFIG_WATCHDOG=y | ||
102 | CONFIG_AT32AP700X_WDT=y | ||
103 | CONFIG_FB=y | ||
104 | CONFIG_FB_ATMEL=y | ||
105 | CONFIG_SOUND=y | ||
106 | CONFIG_SND=y | ||
107 | CONFIG_SND_MIXER_OSS=m | ||
108 | CONFIG_SND_PCM_OSS=m | ||
109 | CONFIG_SND_HRTIMER=y | ||
110 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
111 | # CONFIG_SND_DRIVERS is not set | ||
112 | CONFIG_SND_ATMEL_AC97C=m | ||
113 | # CONFIG_SND_SPI is not set | ||
114 | CONFIG_USB_GADGET=y | ||
115 | CONFIG_USB_GADGET_VBUS_DRAW=350 | ||
116 | CONFIG_USB_ZERO=m | ||
117 | CONFIG_USB_ETH=m | ||
118 | CONFIG_USB_GADGETFS=m | ||
119 | CONFIG_USB_MASS_STORAGE=m | ||
120 | CONFIG_USB_G_SERIAL=m | ||
121 | CONFIG_USB_CDC_COMPOSITE=m | ||
122 | CONFIG_MMC=y | ||
123 | CONFIG_MMC_TEST=m | ||
124 | CONFIG_MMC_ATMELMCI=y | ||
125 | CONFIG_NEW_LEDS=y | ||
126 | CONFIG_LEDS_CLASS=y | ||
127 | CONFIG_LEDS_GPIO=y | ||
128 | CONFIG_LEDS_TRIGGERS=y | ||
129 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
130 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
131 | CONFIG_RTC_CLASS=y | ||
132 | CONFIG_RTC_DRV_AT32AP700X=y | ||
133 | CONFIG_DMADEVICES=y | ||
134 | CONFIG_EXT2_FS=y | ||
135 | CONFIG_EXT3_FS=y | ||
136 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
137 | # CONFIG_EXT3_FS_XATTR is not set | ||
138 | CONFIG_EXT4_FS=y | ||
139 | # CONFIG_DNOTIFY is not set | ||
140 | CONFIG_FUSE_FS=m | ||
141 | CONFIG_MSDOS_FS=m | ||
142 | CONFIG_VFAT_FS=m | ||
143 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
144 | CONFIG_PROC_KCORE=y | ||
145 | CONFIG_TMPFS=y | ||
146 | CONFIG_CONFIGFS_FS=y | ||
147 | CONFIG_JFFS2_FS=y | ||
148 | CONFIG_UBIFS_FS=y | ||
149 | CONFIG_NFS_FS=y | ||
150 | CONFIG_ROOT_NFS=y | ||
151 | CONFIG_NFSD=m | ||
152 | CONFIG_NFSD_V3=y | ||
153 | CONFIG_CIFS=m | ||
154 | CONFIG_NLS_CODEPAGE_437=m | ||
155 | CONFIG_NLS_CODEPAGE_850=m | ||
156 | CONFIG_NLS_ISO8859_1=m | ||
157 | CONFIG_NLS_UTF8=m | ||
158 | CONFIG_DEBUG_FS=y | ||
159 | CONFIG_FRAME_POINTER=y | ||
160 | CONFIG_MAGIC_SYSRQ=y | ||
161 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atngw100mkii_evklcd101_defconfig b/arch/avr32/configs/atngw100mkii_evklcd101_defconfig deleted file mode 100644 index 1b4d4a87a356..000000000000 --- a/arch/avr32/configs/atngw100mkii_evklcd101_defconfig +++ /dev/null | |||
@@ -1,160 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATNGW100_MKII=y | ||
19 | CONFIG_BOARD_ATNGW100_MKII_LCD=y | ||
20 | CONFIG_BOARD_ATNGW100_EVKLCD10X=y | ||
21 | # CONFIG_OWNERSHIP_TRACE is not set | ||
22 | CONFIG_NMI_DEBUGGING=y | ||
23 | CONFIG_CPU_FREQ=y | ||
24 | # CONFIG_CPU_FREQ_STAT is not set | ||
25 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
26 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
27 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
28 | CONFIG_NET=y | ||
29 | CONFIG_PACKET=y | ||
30 | CONFIG_UNIX=y | ||
31 | CONFIG_XFRM_USER=y | ||
32 | CONFIG_NET_KEY=y | ||
33 | CONFIG_INET=y | ||
34 | CONFIG_IP_MULTICAST=y | ||
35 | CONFIG_IP_ADVANCED_ROUTER=y | ||
36 | CONFIG_IP_PNP=y | ||
37 | CONFIG_IP_PNP_DHCP=y | ||
38 | CONFIG_IP_MROUTE=y | ||
39 | CONFIG_IP_PIMSM_V1=y | ||
40 | CONFIG_SYN_COOKIES=y | ||
41 | CONFIG_INET_AH=y | ||
42 | CONFIG_INET_ESP=y | ||
43 | CONFIG_INET_IPCOMP=y | ||
44 | # CONFIG_INET_LRO is not set | ||
45 | CONFIG_IPV6=y | ||
46 | CONFIG_INET6_AH=y | ||
47 | CONFIG_INET6_ESP=y | ||
48 | CONFIG_INET6_IPCOMP=y | ||
49 | CONFIG_NETFILTER=y | ||
50 | # CONFIG_NETFILTER_ADVANCED is not set | ||
51 | CONFIG_NETFILTER_XTABLES=y | ||
52 | CONFIG_BRIDGE=m | ||
53 | CONFIG_VLAN_8021Q=m | ||
54 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
55 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
56 | # CONFIG_FW_LOADER is not set | ||
57 | CONFIG_MTD=y | ||
58 | CONFIG_MTD_CMDLINE_PARTS=y | ||
59 | CONFIG_MTD_BLOCK=y | ||
60 | CONFIG_MTD_CFI=y | ||
61 | CONFIG_MTD_CFI_INTELEXT=y | ||
62 | CONFIG_MTD_PHYSMAP=y | ||
63 | CONFIG_MTD_DATAFLASH=y | ||
64 | CONFIG_MTD_NAND=y | ||
65 | CONFIG_MTD_NAND_ATMEL=y | ||
66 | CONFIG_MTD_UBI=y | ||
67 | CONFIG_BLK_DEV_LOOP=m | ||
68 | CONFIG_BLK_DEV_NBD=m | ||
69 | CONFIG_BLK_DEV_RAM=m | ||
70 | CONFIG_ATMEL_TCLIB=y | ||
71 | CONFIG_NETDEVICES=y | ||
72 | CONFIG_TUN=m | ||
73 | CONFIG_MACB=y | ||
74 | CONFIG_PPP=m | ||
75 | CONFIG_PPP_BSDCOMP=m | ||
76 | CONFIG_PPP_DEFLATE=m | ||
77 | CONFIG_PPP_FILTER=y | ||
78 | CONFIG_PPP_MPPE=m | ||
79 | CONFIG_PPPOE=m | ||
80 | CONFIG_PPP_ASYNC=m | ||
81 | # CONFIG_INPUT_MOUSEDEV is not set | ||
82 | CONFIG_INPUT_EVDEV=m | ||
83 | # CONFIG_INPUT_KEYBOARD is not set | ||
84 | # CONFIG_INPUT_MOUSE is not set | ||
85 | CONFIG_INPUT_TOUCHSCREEN=y | ||
86 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
87 | # CONFIG_SERIO is not set | ||
88 | # CONFIG_LEGACY_PTYS is not set | ||
89 | CONFIG_SERIAL_ATMEL=y | ||
90 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
91 | # CONFIG_HW_RANDOM is not set | ||
92 | CONFIG_I2C=m | ||
93 | CONFIG_I2C_CHARDEV=m | ||
94 | CONFIG_I2C_GPIO=m | ||
95 | CONFIG_SPI=y | ||
96 | CONFIG_SPI_ATMEL=y | ||
97 | CONFIG_SPI_SPIDEV=m | ||
98 | CONFIG_GPIO_SYSFS=y | ||
99 | # CONFIG_HWMON is not set | ||
100 | CONFIG_WATCHDOG=y | ||
101 | CONFIG_AT32AP700X_WDT=y | ||
102 | CONFIG_FB=y | ||
103 | CONFIG_FB_ATMEL=y | ||
104 | CONFIG_SOUND=y | ||
105 | CONFIG_SND=y | ||
106 | CONFIG_SND_MIXER_OSS=m | ||
107 | CONFIG_SND_PCM_OSS=m | ||
108 | CONFIG_SND_HRTIMER=y | ||
109 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
110 | # CONFIG_SND_DRIVERS is not set | ||
111 | CONFIG_SND_ATMEL_AC97C=m | ||
112 | # CONFIG_SND_SPI is not set | ||
113 | CONFIG_USB_GADGET=y | ||
114 | CONFIG_USB_GADGET_VBUS_DRAW=350 | ||
115 | CONFIG_USB_ZERO=m | ||
116 | CONFIG_USB_ETH=m | ||
117 | CONFIG_USB_GADGETFS=m | ||
118 | CONFIG_USB_MASS_STORAGE=m | ||
119 | CONFIG_USB_G_SERIAL=m | ||
120 | CONFIG_USB_CDC_COMPOSITE=m | ||
121 | CONFIG_MMC=y | ||
122 | CONFIG_MMC_TEST=m | ||
123 | CONFIG_MMC_ATMELMCI=y | ||
124 | CONFIG_NEW_LEDS=y | ||
125 | CONFIG_LEDS_CLASS=y | ||
126 | CONFIG_LEDS_GPIO=y | ||
127 | CONFIG_LEDS_TRIGGERS=y | ||
128 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
129 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
130 | CONFIG_RTC_CLASS=y | ||
131 | CONFIG_RTC_DRV_AT32AP700X=y | ||
132 | CONFIG_DMADEVICES=y | ||
133 | CONFIG_EXT2_FS=y | ||
134 | CONFIG_EXT3_FS=y | ||
135 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
136 | # CONFIG_EXT3_FS_XATTR is not set | ||
137 | CONFIG_EXT4_FS=y | ||
138 | # CONFIG_DNOTIFY is not set | ||
139 | CONFIG_FUSE_FS=m | ||
140 | CONFIG_MSDOS_FS=m | ||
141 | CONFIG_VFAT_FS=m | ||
142 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
143 | CONFIG_PROC_KCORE=y | ||
144 | CONFIG_TMPFS=y | ||
145 | CONFIG_CONFIGFS_FS=y | ||
146 | CONFIG_JFFS2_FS=y | ||
147 | CONFIG_UBIFS_FS=y | ||
148 | CONFIG_NFS_FS=y | ||
149 | CONFIG_ROOT_NFS=y | ||
150 | CONFIG_NFSD=m | ||
151 | CONFIG_NFSD_V3=y | ||
152 | CONFIG_CIFS=m | ||
153 | CONFIG_NLS_CODEPAGE_437=m | ||
154 | CONFIG_NLS_CODEPAGE_850=m | ||
155 | CONFIG_NLS_ISO8859_1=m | ||
156 | CONFIG_NLS_UTF8=m | ||
157 | CONFIG_DEBUG_FS=y | ||
158 | CONFIG_FRAME_POINTER=y | ||
159 | CONFIG_MAGIC_SYSRQ=y | ||
160 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig deleted file mode 100644 index 9b8b52e54b79..000000000000 --- a/arch/avr32/configs/atstk1002_defconfig +++ /dev/null | |||
@@ -1,157 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | # CONFIG_OWNERSHIP_TRACE is not set | ||
19 | CONFIG_NMI_DEBUGGING=y | ||
20 | CONFIG_CPU_FREQ=y | ||
21 | # CONFIG_CPU_FREQ_STAT is not set | ||
22 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
23 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
24 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
25 | CONFIG_NET=y | ||
26 | CONFIG_PACKET=y | ||
27 | CONFIG_UNIX=y | ||
28 | CONFIG_XFRM_USER=m | ||
29 | CONFIG_NET_KEY=m | ||
30 | CONFIG_INET=y | ||
31 | CONFIG_IP_PNP=y | ||
32 | CONFIG_IP_PNP_DHCP=y | ||
33 | CONFIG_NET_IPIP=m | ||
34 | CONFIG_NET_IPGRE_DEMUX=m | ||
35 | CONFIG_NET_IPGRE=m | ||
36 | CONFIG_INET_AH=m | ||
37 | CONFIG_INET_ESP=m | ||
38 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
39 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
40 | CONFIG_INET_XFRM_MODE_BEET=m | ||
41 | # CONFIG_INET_LRO is not set | ||
42 | CONFIG_INET6_AH=m | ||
43 | CONFIG_INET6_ESP=m | ||
44 | CONFIG_INET6_IPCOMP=m | ||
45 | CONFIG_IPV6_TUNNEL=m | ||
46 | CONFIG_BRIDGE=m | ||
47 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
48 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
49 | # CONFIG_FW_LOADER is not set | ||
50 | CONFIG_MTD=y | ||
51 | CONFIG_MTD_CMDLINE_PARTS=y | ||
52 | CONFIG_MTD_BLOCK=y | ||
53 | CONFIG_MTD_CFI=y | ||
54 | CONFIG_MTD_CFI_AMDSTD=y | ||
55 | CONFIG_MTD_PHYSMAP=y | ||
56 | CONFIG_MTD_UBI=y | ||
57 | CONFIG_BLK_DEV_LOOP=m | ||
58 | CONFIG_BLK_DEV_NBD=m | ||
59 | CONFIG_BLK_DEV_RAM=m | ||
60 | CONFIG_ATMEL_TCLIB=y | ||
61 | CONFIG_ATMEL_SSC=m | ||
62 | # CONFIG_SCSI_PROC_FS is not set | ||
63 | CONFIG_BLK_DEV_SD=m | ||
64 | CONFIG_BLK_DEV_SR=m | ||
65 | # CONFIG_SCSI_LOWLEVEL is not set | ||
66 | CONFIG_ATA=m | ||
67 | # CONFIG_SATA_PMP is not set | ||
68 | CONFIG_PATA_AT32=m | ||
69 | CONFIG_NETDEVICES=y | ||
70 | CONFIG_TUN=m | ||
71 | CONFIG_MACB=y | ||
72 | CONFIG_PPP=m | ||
73 | CONFIG_PPP_BSDCOMP=m | ||
74 | CONFIG_PPP_DEFLATE=m | ||
75 | CONFIG_PPP_ASYNC=m | ||
76 | CONFIG_INPUT=m | ||
77 | CONFIG_INPUT_EVDEV=m | ||
78 | # CONFIG_KEYBOARD_ATKBD is not set | ||
79 | CONFIG_KEYBOARD_GPIO=m | ||
80 | # CONFIG_MOUSE_PS2 is not set | ||
81 | CONFIG_MOUSE_GPIO=m | ||
82 | # CONFIG_SERIO is not set | ||
83 | # CONFIG_VT is not set | ||
84 | # CONFIG_LEGACY_PTYS is not set | ||
85 | # CONFIG_DEVKMEM is not set | ||
86 | CONFIG_SERIAL_ATMEL=y | ||
87 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
88 | # CONFIG_HW_RANDOM is not set | ||
89 | CONFIG_I2C=m | ||
90 | CONFIG_I2C_CHARDEV=m | ||
91 | CONFIG_I2C_GPIO=m | ||
92 | CONFIG_SPI=y | ||
93 | CONFIG_SPI_ATMEL=y | ||
94 | CONFIG_SPI_SPIDEV=m | ||
95 | CONFIG_GPIO_SYSFS=y | ||
96 | # CONFIG_HWMON is not set | ||
97 | CONFIG_WATCHDOG=y | ||
98 | CONFIG_AT32AP700X_WDT=y | ||
99 | CONFIG_FB=y | ||
100 | CONFIG_FB_ATMEL=y | ||
101 | CONFIG_LCD_CLASS_DEVICE=y | ||
102 | CONFIG_LCD_LTV350QV=y | ||
103 | CONFIG_SOUND=m | ||
104 | CONFIG_SND=m | ||
105 | CONFIG_SND_MIXER_OSS=m | ||
106 | CONFIG_SND_PCM_OSS=m | ||
107 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
108 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
109 | CONFIG_SND_AT73C213=m | ||
110 | CONFIG_USB_GADGET=y | ||
111 | CONFIG_USB_ZERO=m | ||
112 | CONFIG_USB_ETH=m | ||
113 | CONFIG_USB_GADGETFS=m | ||
114 | CONFIG_USB_MASS_STORAGE=m | ||
115 | CONFIG_USB_G_SERIAL=m | ||
116 | CONFIG_USB_CDC_COMPOSITE=m | ||
117 | CONFIG_MMC=y | ||
118 | CONFIG_MMC_TEST=m | ||
119 | CONFIG_MMC_ATMELMCI=y | ||
120 | CONFIG_NEW_LEDS=y | ||
121 | CONFIG_LEDS_CLASS=y | ||
122 | CONFIG_LEDS_GPIO=m | ||
123 | CONFIG_LEDS_PWM=m | ||
124 | CONFIG_LEDS_TRIGGERS=y | ||
125 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
126 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | ||
127 | CONFIG_RTC_CLASS=y | ||
128 | CONFIG_RTC_DRV_AT32AP700X=y | ||
129 | CONFIG_DMADEVICES=y | ||
130 | CONFIG_PWM=y | ||
131 | CONFIG_PWM_ATMEL=m | ||
132 | CONFIG_EXT2_FS=y | ||
133 | CONFIG_EXT3_FS=y | ||
134 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
135 | # CONFIG_EXT3_FS_XATTR is not set | ||
136 | CONFIG_EXT4_FS=y | ||
137 | # CONFIG_DNOTIFY is not set | ||
138 | CONFIG_FUSE_FS=m | ||
139 | CONFIG_MSDOS_FS=m | ||
140 | CONFIG_VFAT_FS=m | ||
141 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
142 | CONFIG_PROC_KCORE=y | ||
143 | CONFIG_TMPFS=y | ||
144 | CONFIG_CONFIGFS_FS=y | ||
145 | CONFIG_JFFS2_FS=y | ||
146 | CONFIG_UBIFS_FS=y | ||
147 | CONFIG_NFS_FS=y | ||
148 | CONFIG_ROOT_NFS=y | ||
149 | CONFIG_CIFS=m | ||
150 | CONFIG_NLS_CODEPAGE_437=m | ||
151 | CONFIG_NLS_CODEPAGE_850=m | ||
152 | CONFIG_NLS_ISO8859_1=m | ||
153 | CONFIG_NLS_UTF8=m | ||
154 | CONFIG_DEBUG_FS=y | ||
155 | CONFIG_FRAME_POINTER=y | ||
156 | CONFIG_MAGIC_SYSRQ=y | ||
157 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig deleted file mode 100644 index ccce1a0b7917..000000000000 --- a/arch/avr32/configs/atstk1003_defconfig +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATSTK1003=y | ||
19 | # CONFIG_OWNERSHIP_TRACE is not set | ||
20 | CONFIG_NMI_DEBUGGING=y | ||
21 | CONFIG_CPU_FREQ=y | ||
22 | # CONFIG_CPU_FREQ_STAT is not set | ||
23 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
24 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
25 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
26 | CONFIG_NET=y | ||
27 | CONFIG_PACKET=y | ||
28 | CONFIG_UNIX=y | ||
29 | CONFIG_INET=y | ||
30 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
31 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
32 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
33 | # CONFIG_INET_LRO is not set | ||
34 | # CONFIG_INET_DIAG is not set | ||
35 | # CONFIG_IPV6 is not set | ||
36 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
37 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
38 | # CONFIG_FW_LOADER is not set | ||
39 | CONFIG_MTD=y | ||
40 | CONFIG_MTD_CMDLINE_PARTS=y | ||
41 | CONFIG_MTD_BLOCK=y | ||
42 | CONFIG_MTD_CFI=y | ||
43 | CONFIG_MTD_CFI_AMDSTD=y | ||
44 | CONFIG_MTD_PHYSMAP=y | ||
45 | CONFIG_MTD_UBI=y | ||
46 | CONFIG_BLK_DEV_LOOP=m | ||
47 | CONFIG_BLK_DEV_NBD=m | ||
48 | CONFIG_BLK_DEV_RAM=m | ||
49 | CONFIG_ATMEL_TCLIB=y | ||
50 | CONFIG_ATMEL_SSC=m | ||
51 | # CONFIG_SCSI_PROC_FS is not set | ||
52 | CONFIG_BLK_DEV_SD=m | ||
53 | CONFIG_BLK_DEV_SR=m | ||
54 | # CONFIG_SCSI_LOWLEVEL is not set | ||
55 | CONFIG_ATA=m | ||
56 | # CONFIG_SATA_PMP is not set | ||
57 | CONFIG_PATA_AT32=m | ||
58 | CONFIG_NETDEVICES=y | ||
59 | CONFIG_PPP=m | ||
60 | CONFIG_PPP_BSDCOMP=m | ||
61 | CONFIG_PPP_DEFLATE=m | ||
62 | CONFIG_PPP_ASYNC=m | ||
63 | CONFIG_INPUT=m | ||
64 | CONFIG_INPUT_EVDEV=m | ||
65 | # CONFIG_KEYBOARD_ATKBD is not set | ||
66 | CONFIG_KEYBOARD_GPIO=m | ||
67 | # CONFIG_MOUSE_PS2 is not set | ||
68 | CONFIG_MOUSE_GPIO=m | ||
69 | # CONFIG_SERIO is not set | ||
70 | # CONFIG_VT is not set | ||
71 | # CONFIG_LEGACY_PTYS is not set | ||
72 | # CONFIG_DEVKMEM is not set | ||
73 | CONFIG_SERIAL_ATMEL=y | ||
74 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
75 | # CONFIG_HW_RANDOM is not set | ||
76 | CONFIG_I2C=m | ||
77 | CONFIG_I2C_CHARDEV=m | ||
78 | CONFIG_I2C_GPIO=m | ||
79 | CONFIG_SPI=y | ||
80 | CONFIG_SPI_ATMEL=y | ||
81 | CONFIG_SPI_SPIDEV=m | ||
82 | CONFIG_GPIO_SYSFS=y | ||
83 | # CONFIG_HWMON is not set | ||
84 | CONFIG_WATCHDOG=y | ||
85 | CONFIG_AT32AP700X_WDT=y | ||
86 | CONFIG_SOUND=m | ||
87 | CONFIG_SND=m | ||
88 | CONFIG_SND_MIXER_OSS=m | ||
89 | CONFIG_SND_PCM_OSS=m | ||
90 | # CONFIG_SND_DRIVERS is not set | ||
91 | CONFIG_SND_AT73C213=m | ||
92 | CONFIG_USB_GADGET=y | ||
93 | CONFIG_USB_ZERO=m | ||
94 | CONFIG_USB_ETH=m | ||
95 | CONFIG_USB_GADGETFS=m | ||
96 | CONFIG_USB_MASS_STORAGE=m | ||
97 | CONFIG_USB_G_SERIAL=m | ||
98 | CONFIG_USB_CDC_COMPOSITE=m | ||
99 | CONFIG_MMC=y | ||
100 | CONFIG_MMC_TEST=m | ||
101 | CONFIG_MMC_ATMELMCI=y | ||
102 | CONFIG_NEW_LEDS=y | ||
103 | CONFIG_LEDS_CLASS=y | ||
104 | CONFIG_LEDS_GPIO=m | ||
105 | CONFIG_LEDS_PWM=m | ||
106 | CONFIG_LEDS_TRIGGERS=y | ||
107 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
108 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | ||
109 | CONFIG_RTC_CLASS=y | ||
110 | CONFIG_RTC_DRV_AT32AP700X=y | ||
111 | CONFIG_DMADEVICES=y | ||
112 | CONFIG_PWM=y | ||
113 | CONFIG_PWM_ATMEL=m | ||
114 | CONFIG_EXT2_FS=y | ||
115 | CONFIG_EXT3_FS=y | ||
116 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
117 | # CONFIG_EXT3_FS_XATTR is not set | ||
118 | CONFIG_EXT4_FS=y | ||
119 | # CONFIG_DNOTIFY is not set | ||
120 | CONFIG_FUSE_FS=m | ||
121 | CONFIG_MSDOS_FS=m | ||
122 | CONFIG_VFAT_FS=m | ||
123 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
124 | CONFIG_PROC_KCORE=y | ||
125 | CONFIG_TMPFS=y | ||
126 | CONFIG_CONFIGFS_FS=y | ||
127 | CONFIG_JFFS2_FS=y | ||
128 | CONFIG_UBIFS_FS=y | ||
129 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
130 | CONFIG_NLS_CODEPAGE_437=m | ||
131 | CONFIG_NLS_CODEPAGE_850=m | ||
132 | CONFIG_NLS_ISO8859_1=m | ||
133 | CONFIG_NLS_UTF8=m | ||
134 | CONFIG_DEBUG_FS=y | ||
135 | CONFIG_FRAME_POINTER=y | ||
136 | CONFIG_MAGIC_SYSRQ=y | ||
137 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig deleted file mode 100644 index e64288fc794d..000000000000 --- a/arch/avr32/configs/atstk1004_defconfig +++ /dev/null | |||
@@ -1,135 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATSTK1004=y | ||
19 | # CONFIG_OWNERSHIP_TRACE is not set | ||
20 | CONFIG_NMI_DEBUGGING=y | ||
21 | CONFIG_CPU_FREQ=y | ||
22 | # CONFIG_CPU_FREQ_STAT is not set | ||
23 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
24 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
25 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
26 | CONFIG_NET=y | ||
27 | CONFIG_PACKET=y | ||
28 | CONFIG_UNIX=y | ||
29 | CONFIG_INET=y | ||
30 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
31 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
32 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
33 | # CONFIG_INET_LRO is not set | ||
34 | # CONFIG_INET_DIAG is not set | ||
35 | # CONFIG_IPV6 is not set | ||
36 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
37 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
38 | # CONFIG_FW_LOADER is not set | ||
39 | CONFIG_MTD=y | ||
40 | CONFIG_MTD_CMDLINE_PARTS=y | ||
41 | CONFIG_MTD_BLOCK=y | ||
42 | CONFIG_MTD_CFI=y | ||
43 | CONFIG_MTD_CFI_AMDSTD=y | ||
44 | CONFIG_MTD_PHYSMAP=y | ||
45 | CONFIG_MTD_UBI=y | ||
46 | CONFIG_BLK_DEV_LOOP=m | ||
47 | CONFIG_BLK_DEV_NBD=m | ||
48 | CONFIG_BLK_DEV_RAM=m | ||
49 | CONFIG_ATMEL_TCLIB=y | ||
50 | CONFIG_ATMEL_SSC=m | ||
51 | # CONFIG_SCSI_PROC_FS is not set | ||
52 | CONFIG_BLK_DEV_SD=m | ||
53 | CONFIG_BLK_DEV_SR=m | ||
54 | # CONFIG_SCSI_LOWLEVEL is not set | ||
55 | CONFIG_ATA=m | ||
56 | # CONFIG_SATA_PMP is not set | ||
57 | CONFIG_PATA_AT32=m | ||
58 | CONFIG_NETDEVICES=y | ||
59 | CONFIG_PPP=m | ||
60 | CONFIG_PPP_BSDCOMP=m | ||
61 | CONFIG_PPP_DEFLATE=m | ||
62 | CONFIG_PPP_ASYNC=m | ||
63 | CONFIG_INPUT=m | ||
64 | CONFIG_INPUT_EVDEV=m | ||
65 | # CONFIG_KEYBOARD_ATKBD is not set | ||
66 | CONFIG_KEYBOARD_GPIO=m | ||
67 | # CONFIG_MOUSE_PS2 is not set | ||
68 | CONFIG_MOUSE_GPIO=m | ||
69 | # CONFIG_SERIO is not set | ||
70 | # CONFIG_VT is not set | ||
71 | # CONFIG_LEGACY_PTYS is not set | ||
72 | # CONFIG_DEVKMEM is not set | ||
73 | CONFIG_SERIAL_ATMEL=y | ||
74 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
75 | # CONFIG_HW_RANDOM is not set | ||
76 | CONFIG_I2C=m | ||
77 | CONFIG_I2C_CHARDEV=m | ||
78 | CONFIG_I2C_GPIO=m | ||
79 | CONFIG_SPI=y | ||
80 | CONFIG_SPI_ATMEL=y | ||
81 | CONFIG_SPI_SPIDEV=m | ||
82 | CONFIG_GPIO_SYSFS=y | ||
83 | # CONFIG_HWMON is not set | ||
84 | CONFIG_WATCHDOG=y | ||
85 | CONFIG_AT32AP700X_WDT=y | ||
86 | CONFIG_FB=y | ||
87 | CONFIG_FB_ATMEL=y | ||
88 | CONFIG_LCD_CLASS_DEVICE=y | ||
89 | CONFIG_LCD_LTV350QV=y | ||
90 | CONFIG_USB_GADGET=y | ||
91 | CONFIG_USB_ZERO=m | ||
92 | CONFIG_USB_ETH=m | ||
93 | CONFIG_USB_GADGETFS=m | ||
94 | CONFIG_USB_MASS_STORAGE=m | ||
95 | CONFIG_USB_G_SERIAL=m | ||
96 | CONFIG_USB_CDC_COMPOSITE=m | ||
97 | CONFIG_MMC=y | ||
98 | CONFIG_MMC_TEST=m | ||
99 | CONFIG_MMC_ATMELMCI=y | ||
100 | CONFIG_NEW_LEDS=y | ||
101 | CONFIG_LEDS_CLASS=y | ||
102 | CONFIG_LEDS_GPIO=m | ||
103 | CONFIG_LEDS_PWM=m | ||
104 | CONFIG_LEDS_TRIGGERS=y | ||
105 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
106 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | ||
107 | CONFIG_RTC_CLASS=y | ||
108 | CONFIG_RTC_DRV_AT32AP700X=y | ||
109 | CONFIG_DMADEVICES=y | ||
110 | CONFIG_PWM=y | ||
111 | CONFIG_PWM_ATMEL=m | ||
112 | CONFIG_EXT2_FS=y | ||
113 | CONFIG_EXT3_FS=y | ||
114 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
115 | # CONFIG_EXT3_FS_XATTR is not set | ||
116 | CONFIG_EXT4_FS=y | ||
117 | # CONFIG_DNOTIFY is not set | ||
118 | CONFIG_FUSE_FS=m | ||
119 | CONFIG_MSDOS_FS=m | ||
120 | CONFIG_VFAT_FS=m | ||
121 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
122 | CONFIG_PROC_KCORE=y | ||
123 | CONFIG_TMPFS=y | ||
124 | CONFIG_CONFIGFS_FS=y | ||
125 | CONFIG_JFFS2_FS=y | ||
126 | CONFIG_UBIFS_FS=y | ||
127 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
128 | CONFIG_NLS_CODEPAGE_437=m | ||
129 | CONFIG_NLS_CODEPAGE_850=m | ||
130 | CONFIG_NLS_ISO8859_1=m | ||
131 | CONFIG_NLS_UTF8=m | ||
132 | CONFIG_DEBUG_FS=y | ||
133 | CONFIG_FRAME_POINTER=y | ||
134 | CONFIG_MAGIC_SYSRQ=y | ||
135 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/atstk1006_defconfig b/arch/avr32/configs/atstk1006_defconfig deleted file mode 100644 index 7d669f79ff74..000000000000 --- a/arch/avr32/configs/atstk1006_defconfig +++ /dev/null | |||
@@ -1,160 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_ATSTK1006=y | ||
19 | # CONFIG_OWNERSHIP_TRACE is not set | ||
20 | CONFIG_NMI_DEBUGGING=y | ||
21 | CONFIG_CPU_FREQ=y | ||
22 | # CONFIG_CPU_FREQ_STAT is not set | ||
23 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
24 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
25 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
26 | CONFIG_NET=y | ||
27 | CONFIG_PACKET=y | ||
28 | CONFIG_UNIX=y | ||
29 | CONFIG_XFRM_USER=m | ||
30 | CONFIG_NET_KEY=m | ||
31 | CONFIG_INET=y | ||
32 | CONFIG_IP_PNP=y | ||
33 | CONFIG_IP_PNP_DHCP=y | ||
34 | CONFIG_NET_IPIP=m | ||
35 | CONFIG_NET_IPGRE_DEMUX=m | ||
36 | CONFIG_NET_IPGRE=m | ||
37 | CONFIG_INET_AH=m | ||
38 | CONFIG_INET_ESP=m | ||
39 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
40 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
41 | CONFIG_INET_XFRM_MODE_BEET=m | ||
42 | # CONFIG_INET_LRO is not set | ||
43 | CONFIG_INET6_AH=m | ||
44 | CONFIG_INET6_ESP=m | ||
45 | CONFIG_INET6_IPCOMP=m | ||
46 | CONFIG_IPV6_TUNNEL=m | ||
47 | CONFIG_BRIDGE=m | ||
48 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
49 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
50 | # CONFIG_FW_LOADER is not set | ||
51 | CONFIG_MTD=y | ||
52 | CONFIG_MTD_CMDLINE_PARTS=y | ||
53 | CONFIG_MTD_BLOCK=y | ||
54 | CONFIG_MTD_CFI=y | ||
55 | CONFIG_MTD_CFI_AMDSTD=y | ||
56 | CONFIG_MTD_PHYSMAP=y | ||
57 | CONFIG_MTD_NAND=y | ||
58 | CONFIG_MTD_NAND_ATMEL=y | ||
59 | CONFIG_MTD_UBI=y | ||
60 | CONFIG_BLK_DEV_LOOP=m | ||
61 | CONFIG_BLK_DEV_NBD=m | ||
62 | CONFIG_BLK_DEV_RAM=m | ||
63 | CONFIG_ATMEL_TCLIB=y | ||
64 | CONFIG_ATMEL_SSC=m | ||
65 | # CONFIG_SCSI_PROC_FS is not set | ||
66 | CONFIG_BLK_DEV_SD=m | ||
67 | CONFIG_BLK_DEV_SR=m | ||
68 | # CONFIG_SCSI_LOWLEVEL is not set | ||
69 | CONFIG_ATA=m | ||
70 | # CONFIG_SATA_PMP is not set | ||
71 | CONFIG_PATA_AT32=m | ||
72 | CONFIG_NETDEVICES=y | ||
73 | CONFIG_TUN=m | ||
74 | CONFIG_MACB=y | ||
75 | CONFIG_PPP=m | ||
76 | CONFIG_PPP_BSDCOMP=m | ||
77 | CONFIG_PPP_DEFLATE=m | ||
78 | CONFIG_PPP_ASYNC=m | ||
79 | CONFIG_INPUT=m | ||
80 | CONFIG_INPUT_EVDEV=m | ||
81 | # CONFIG_KEYBOARD_ATKBD is not set | ||
82 | CONFIG_KEYBOARD_GPIO=m | ||
83 | # CONFIG_MOUSE_PS2 is not set | ||
84 | CONFIG_MOUSE_GPIO=m | ||
85 | # CONFIG_SERIO is not set | ||
86 | # CONFIG_VT is not set | ||
87 | # CONFIG_LEGACY_PTYS is not set | ||
88 | # CONFIG_DEVKMEM is not set | ||
89 | CONFIG_SERIAL_ATMEL=y | ||
90 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
91 | # CONFIG_HW_RANDOM is not set | ||
92 | CONFIG_I2C=m | ||
93 | CONFIG_I2C_CHARDEV=m | ||
94 | CONFIG_I2C_GPIO=m | ||
95 | CONFIG_SPI=y | ||
96 | CONFIG_SPI_ATMEL=y | ||
97 | CONFIG_SPI_SPIDEV=m | ||
98 | CONFIG_GPIO_SYSFS=y | ||
99 | # CONFIG_HWMON is not set | ||
100 | CONFIG_WATCHDOG=y | ||
101 | CONFIG_AT32AP700X_WDT=y | ||
102 | CONFIG_FB=y | ||
103 | CONFIG_FB_ATMEL=y | ||
104 | CONFIG_LCD_CLASS_DEVICE=y | ||
105 | CONFIG_LCD_LTV350QV=y | ||
106 | CONFIG_SOUND=m | ||
107 | CONFIG_SND=m | ||
108 | CONFIG_SND_MIXER_OSS=m | ||
109 | CONFIG_SND_PCM_OSS=m | ||
110 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
111 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
112 | CONFIG_SND_AT73C213=m | ||
113 | CONFIG_USB_GADGET=y | ||
114 | CONFIG_USB_ZERO=m | ||
115 | CONFIG_USB_ETH=m | ||
116 | CONFIG_USB_GADGETFS=m | ||
117 | CONFIG_USB_MASS_STORAGE=m | ||
118 | CONFIG_USB_G_SERIAL=m | ||
119 | CONFIG_USB_CDC_COMPOSITE=m | ||
120 | CONFIG_MMC=y | ||
121 | CONFIG_MMC_TEST=m | ||
122 | CONFIG_MMC_ATMELMCI=y | ||
123 | CONFIG_NEW_LEDS=y | ||
124 | CONFIG_LEDS_CLASS=y | ||
125 | CONFIG_LEDS_GPIO=m | ||
126 | CONFIG_LEDS_PWM=m | ||
127 | CONFIG_LEDS_TRIGGERS=y | ||
128 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
129 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | ||
130 | CONFIG_RTC_CLASS=y | ||
131 | CONFIG_RTC_DRV_AT32AP700X=y | ||
132 | CONFIG_DMADEVICES=y | ||
133 | CONFIG_PWM=y | ||
134 | CONFIG_PWM_ATMEL=m | ||
135 | CONFIG_EXT2_FS=y | ||
136 | CONFIG_EXT3_FS=y | ||
137 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
138 | # CONFIG_EXT3_FS_XATTR is not set | ||
139 | CONFIG_EXT4_FS=y | ||
140 | # CONFIG_DNOTIFY is not set | ||
141 | CONFIG_FUSE_FS=m | ||
142 | CONFIG_MSDOS_FS=m | ||
143 | CONFIG_VFAT_FS=m | ||
144 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
145 | CONFIG_PROC_KCORE=y | ||
146 | CONFIG_TMPFS=y | ||
147 | CONFIG_CONFIGFS_FS=y | ||
148 | CONFIG_JFFS2_FS=y | ||
149 | CONFIG_UBIFS_FS=y | ||
150 | CONFIG_NFS_FS=y | ||
151 | CONFIG_ROOT_NFS=y | ||
152 | CONFIG_CIFS=m | ||
153 | CONFIG_NLS_CODEPAGE_437=m | ||
154 | CONFIG_NLS_CODEPAGE_850=m | ||
155 | CONFIG_NLS_ISO8859_1=m | ||
156 | CONFIG_NLS_UTF8=m | ||
157 | CONFIG_DEBUG_FS=y | ||
158 | CONFIG_FRAME_POINTER=y | ||
159 | CONFIG_MAGIC_SYSRQ=y | ||
160 | CONFIG_DETECT_HUNG_TASK=y | ||
diff --git a/arch/avr32/configs/favr-32_defconfig b/arch/avr32/configs/favr-32_defconfig deleted file mode 100644 index 560c52f87d45..000000000000 --- a/arch/avr32/configs/favr-32_defconfig +++ /dev/null | |||
@@ -1,143 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_LOG_BUF_SHIFT=14 | ||
7 | CONFIG_RELAY=y | ||
8 | CONFIG_BLK_DEV_INITRD=y | ||
9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
10 | # CONFIG_BASE_FULL is not set | ||
11 | # CONFIG_COMPAT_BRK is not set | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=m | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | # CONFIG_IOSCHED_DEADLINE is not set | ||
18 | CONFIG_BOARD_FAVR_32=y | ||
19 | # CONFIG_OWNERSHIP_TRACE is not set | ||
20 | CONFIG_NMI_DEBUGGING=y | ||
21 | CONFIG_CPU_FREQ=y | ||
22 | # CONFIG_CPU_FREQ_STAT is not set | ||
23 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
24 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
25 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
26 | CONFIG_NET=y | ||
27 | CONFIG_PACKET=y | ||
28 | CONFIG_UNIX=y | ||
29 | CONFIG_XFRM_USER=m | ||
30 | CONFIG_NET_KEY=m | ||
31 | CONFIG_INET=y | ||
32 | CONFIG_IP_PNP=y | ||
33 | CONFIG_IP_PNP_DHCP=y | ||
34 | CONFIG_NET_IPIP=m | ||
35 | CONFIG_INET_AH=m | ||
36 | CONFIG_INET_ESP=m | ||
37 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
38 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
39 | CONFIG_INET_XFRM_MODE_BEET=m | ||
40 | # CONFIG_INET_LRO is not set | ||
41 | CONFIG_IPV6=y | ||
42 | CONFIG_INET6_AH=m | ||
43 | CONFIG_INET6_ESP=m | ||
44 | CONFIG_INET6_IPCOMP=m | ||
45 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
46 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
47 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
48 | CONFIG_IPV6_SIT=m | ||
49 | CONFIG_IPV6_TUNNEL=m | ||
50 | CONFIG_BRIDGE=m | ||
51 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
52 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
53 | # CONFIG_FW_LOADER is not set | ||
54 | CONFIG_MTD=y | ||
55 | CONFIG_MTD_CMDLINE_PARTS=y | ||
56 | CONFIG_MTD_BLOCK=y | ||
57 | CONFIG_MTD_CFI=y | ||
58 | CONFIG_MTD_CFI_AMDSTD=y | ||
59 | CONFIG_MTD_PHYSMAP=y | ||
60 | CONFIG_BLK_DEV_LOOP=m | ||
61 | CONFIG_BLK_DEV_NBD=m | ||
62 | CONFIG_BLK_DEV_RAM=m | ||
63 | CONFIG_ATMEL_TCLIB=y | ||
64 | CONFIG_ATMEL_SSC=m | ||
65 | CONFIG_NETDEVICES=y | ||
66 | CONFIG_MACB=y | ||
67 | CONFIG_PPP=m | ||
68 | CONFIG_PPP_BSDCOMP=m | ||
69 | CONFIG_PPP_DEFLATE=m | ||
70 | CONFIG_PPP_ASYNC=m | ||
71 | CONFIG_INPUT_MOUSEDEV=m | ||
72 | CONFIG_INPUT_EVDEV=m | ||
73 | # CONFIG_KEYBOARD_ATKBD is not set | ||
74 | CONFIG_KEYBOARD_GPIO=m | ||
75 | # CONFIG_MOUSE_PS2 is not set | ||
76 | CONFIG_MOUSE_GPIO=m | ||
77 | CONFIG_INPUT_TOUCHSCREEN=y | ||
78 | CONFIG_TOUCHSCREEN_ADS7846=m | ||
79 | # CONFIG_SERIO is not set | ||
80 | # CONFIG_CONSOLE_TRANSLATIONS is not set | ||
81 | # CONFIG_LEGACY_PTYS is not set | ||
82 | # CONFIG_DEVKMEM is not set | ||
83 | CONFIG_SERIAL_ATMEL=y | ||
84 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
85 | # CONFIG_HW_RANDOM is not set | ||
86 | CONFIG_I2C=m | ||
87 | CONFIG_I2C_CHARDEV=m | ||
88 | CONFIG_I2C_GPIO=m | ||
89 | CONFIG_SPI=y | ||
90 | CONFIG_SPI_ATMEL=y | ||
91 | CONFIG_SPI_SPIDEV=m | ||
92 | CONFIG_GPIO_SYSFS=y | ||
93 | # CONFIG_HWMON is not set | ||
94 | CONFIG_WATCHDOG=y | ||
95 | CONFIG_AT32AP700X_WDT=y | ||
96 | CONFIG_FB=y | ||
97 | CONFIG_FB_ATMEL=y | ||
98 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
99 | CONFIG_BACKLIGHT_PWM=m | ||
100 | CONFIG_SOUND=m | ||
101 | CONFIG_SOUND_PRIME=m | ||
102 | CONFIG_USB_GADGET=y | ||
103 | CONFIG_USB_ZERO=m | ||
104 | CONFIG_USB_ETH=m | ||
105 | CONFIG_USB_GADGETFS=m | ||
106 | CONFIG_USB_MASS_STORAGE=m | ||
107 | CONFIG_USB_G_SERIAL=m | ||
108 | CONFIG_USB_CDC_COMPOSITE=m | ||
109 | CONFIG_MMC=y | ||
110 | CONFIG_MMC_ATMELMCI=y | ||
111 | CONFIG_NEW_LEDS=y | ||
112 | CONFIG_LEDS_CLASS=y | ||
113 | CONFIG_LEDS_GPIO=y | ||
114 | CONFIG_LEDS_TRIGGERS=y | ||
115 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
116 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
117 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
118 | CONFIG_RTC_CLASS=y | ||
119 | CONFIG_RTC_DRV_AT32AP700X=y | ||
120 | CONFIG_DMADEVICES=y | ||
121 | CONFIG_PWM=y | ||
122 | CONFIG_PWM_ATMEL=y | ||
123 | CONFIG_EXT2_FS=y | ||
124 | CONFIG_EXT3_FS=y | ||
125 | # CONFIG_EXT3_FS_XATTR is not set | ||
126 | # CONFIG_DNOTIFY is not set | ||
127 | CONFIG_FUSE_FS=m | ||
128 | CONFIG_MSDOS_FS=m | ||
129 | CONFIG_VFAT_FS=m | ||
130 | CONFIG_PROC_KCORE=y | ||
131 | CONFIG_TMPFS=y | ||
132 | CONFIG_CONFIGFS_FS=y | ||
133 | CONFIG_JFFS2_FS=y | ||
134 | # CONFIG_JFFS2_FS_WRITEBUFFER is not set | ||
135 | CONFIG_NFS_FS=y | ||
136 | CONFIG_ROOT_NFS=y | ||
137 | CONFIG_NLS_CODEPAGE_437=m | ||
138 | CONFIG_NLS_ISO8859_1=m | ||
139 | CONFIG_NLS_UTF8=m | ||
140 | CONFIG_DEBUG_FS=y | ||
141 | CONFIG_FRAME_POINTER=y | ||
142 | CONFIG_MAGIC_SYSRQ=y | ||
143 | # CONFIG_CRYPTO_HW is not set | ||
diff --git a/arch/avr32/configs/hammerhead_defconfig b/arch/avr32/configs/hammerhead_defconfig deleted file mode 100644 index d57fadb9e6b6..000000000000 --- a/arch/avr32/configs/hammerhead_defconfig +++ /dev/null | |||
@@ -1,145 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_BSD_PROCESS_ACCT=y | ||
7 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
8 | CONFIG_LOG_BUF_SHIFT=14 | ||
9 | CONFIG_BLK_DEV_INITRD=y | ||
10 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
11 | # CONFIG_BASE_FULL is not set | ||
12 | # CONFIG_COMPAT_BRK is not set | ||
13 | CONFIG_PROFILING=y | ||
14 | CONFIG_OPROFILE=m | ||
15 | CONFIG_MODULES=y | ||
16 | CONFIG_MODULE_UNLOAD=y | ||
17 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
18 | # CONFIG_BLK_DEV_BSG is not set | ||
19 | # CONFIG_IOSCHED_DEADLINE is not set | ||
20 | CONFIG_BOARD_HAMMERHEAD=y | ||
21 | CONFIG_BOARD_HAMMERHEAD_USB=y | ||
22 | CONFIG_BOARD_HAMMERHEAD_LCD=y | ||
23 | CONFIG_BOARD_HAMMERHEAD_SND=y | ||
24 | # CONFIG_BOARD_HAMMERHEAD_FPGA is not set | ||
25 | # CONFIG_OWNERSHIP_TRACE is not set | ||
26 | CONFIG_CPU_FREQ=y | ||
27 | # CONFIG_CPU_FREQ_STAT is not set | ||
28 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
29 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
30 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
31 | CONFIG_NET=y | ||
32 | CONFIG_PACKET=y | ||
33 | CONFIG_UNIX=y | ||
34 | CONFIG_XFRM_USER=y | ||
35 | CONFIG_NET_KEY=y | ||
36 | CONFIG_INET=y | ||
37 | CONFIG_IP_MULTICAST=y | ||
38 | CONFIG_IP_ADVANCED_ROUTER=y | ||
39 | CONFIG_IP_PNP=y | ||
40 | CONFIG_IP_PNP_DHCP=y | ||
41 | CONFIG_IP_MROUTE=y | ||
42 | CONFIG_IP_PIMSM_V1=y | ||
43 | CONFIG_SYN_COOKIES=y | ||
44 | CONFIG_INET_AH=y | ||
45 | CONFIG_INET_ESP=y | ||
46 | CONFIG_INET_IPCOMP=y | ||
47 | # CONFIG_INET_LRO is not set | ||
48 | # CONFIG_IPV6 is not set | ||
49 | CONFIG_NETFILTER=y | ||
50 | # CONFIG_NETFILTER_ADVANCED is not set | ||
51 | CONFIG_NETFILTER_XTABLES=y | ||
52 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
53 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
54 | # CONFIG_FW_LOADER is not set | ||
55 | CONFIG_MTD=y | ||
56 | CONFIG_MTD_CMDLINE_PARTS=y | ||
57 | CONFIG_MTD_BLOCK=y | ||
58 | CONFIG_MTD_CFI=y | ||
59 | CONFIG_MTD_CFI_AMDSTD=y | ||
60 | CONFIG_MTD_PHYSMAP=y | ||
61 | CONFIG_MTD_DATAFLASH=y | ||
62 | CONFIG_BLK_DEV_RAM=m | ||
63 | CONFIG_ATMEL_TCLIB=y | ||
64 | CONFIG_SCSI=m | ||
65 | CONFIG_BLK_DEV_SD=m | ||
66 | CONFIG_NETDEVICES=y | ||
67 | CONFIG_MACB=y | ||
68 | CONFIG_INPUT_FF_MEMLESS=m | ||
69 | CONFIG_INPUT_EVDEV=m | ||
70 | CONFIG_INPUT_TOUCHSCREEN=y | ||
71 | # CONFIG_LEGACY_PTYS is not set | ||
72 | CONFIG_SERIAL_ATMEL=y | ||
73 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
74 | # CONFIG_HW_RANDOM is not set | ||
75 | CONFIG_I2C=m | ||
76 | CONFIG_I2C_CHARDEV=m | ||
77 | CONFIG_I2C_GPIO=m | ||
78 | CONFIG_SPI=y | ||
79 | CONFIG_SPI_ATMEL=y | ||
80 | CONFIG_SPI_SPIDEV=m | ||
81 | # CONFIG_HWMON is not set | ||
82 | CONFIG_WATCHDOG=y | ||
83 | CONFIG_AT32AP700X_WDT=y | ||
84 | CONFIG_FB=y | ||
85 | CONFIG_FB_ATMEL=y | ||
86 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
87 | CONFIG_SOUND=m | ||
88 | CONFIG_SND=m | ||
89 | CONFIG_SND_SEQUENCER=m | ||
90 | CONFIG_SND_MIXER_OSS=m | ||
91 | CONFIG_SND_PCM_OSS=m | ||
92 | CONFIG_SND_SEQUENCER_OSS=y | ||
93 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
94 | CONFIG_HID_A4TECH=m | ||
95 | CONFIG_HID_APPLE=m | ||
96 | CONFIG_HID_BELKIN=m | ||
97 | CONFIG_HID_CHERRY=m | ||
98 | CONFIG_HID_CHICONY=m | ||
99 | CONFIG_HID_CYPRESS=m | ||
100 | CONFIG_HID_EZKEY=m | ||
101 | CONFIG_HID_GYRATION=m | ||
102 | CONFIG_HID_LOGITECH=m | ||
103 | CONFIG_HID_MICROSOFT=m | ||
104 | CONFIG_HID_MONTEREY=m | ||
105 | CONFIG_HID_PANTHERLORD=m | ||
106 | CONFIG_HID_PETALYNX=m | ||
107 | CONFIG_HID_SAMSUNG=m | ||
108 | CONFIG_HID_SUNPLUS=m | ||
109 | CONFIG_USB=m | ||
110 | CONFIG_USB_MON=m | ||
111 | CONFIG_USB_ISP116X_HCD=m | ||
112 | CONFIG_USB_STORAGE=m | ||
113 | CONFIG_USB_GADGET=y | ||
114 | CONFIG_USB_ZERO=m | ||
115 | CONFIG_USB_ETH=m | ||
116 | CONFIG_USB_GADGETFS=m | ||
117 | CONFIG_USB_MASS_STORAGE=m | ||
118 | CONFIG_USB_G_SERIAL=m | ||
119 | CONFIG_MMC=m | ||
120 | CONFIG_MMC_ATMELMCI=m | ||
121 | CONFIG_RTC_CLASS=y | ||
122 | CONFIG_RTC_DRV_AT32AP700X=y | ||
123 | CONFIG_EXT2_FS=m | ||
124 | # CONFIG_DNOTIFY is not set | ||
125 | CONFIG_MSDOS_FS=y | ||
126 | CONFIG_VFAT_FS=m | ||
127 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
128 | CONFIG_TMPFS=y | ||
129 | CONFIG_CONFIGFS_FS=y | ||
130 | CONFIG_JFFS2_FS=y | ||
131 | CONFIG_NFS_FS=y | ||
132 | CONFIG_ROOT_NFS=y | ||
133 | CONFIG_NLS_CODEPAGE_437=m | ||
134 | CONFIG_NLS_CODEPAGE_850=m | ||
135 | CONFIG_NLS_ISO8859_1=m | ||
136 | CONFIG_NLS_UTF8=m | ||
137 | CONFIG_FRAME_POINTER=y | ||
138 | CONFIG_MAGIC_SYSRQ=y | ||
139 | CONFIG_CRYPTO_ECB=m | ||
140 | CONFIG_CRYPTO_PCBC=m | ||
141 | CONFIG_CRYPTO_ARC4=m | ||
142 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
143 | CONFIG_CRC_CCITT=m | ||
144 | CONFIG_CRC_ITU_T=m | ||
145 | CONFIG_CRC7=m | ||
diff --git a/arch/avr32/configs/merisc_defconfig b/arch/avr32/configs/merisc_defconfig deleted file mode 100644 index e6a9cb7d574e..000000000000 --- a/arch/avr32/configs/merisc_defconfig +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_BSD_PROCESS_ACCT=y | ||
7 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
8 | CONFIG_LOG_BUF_SHIFT=14 | ||
9 | CONFIG_BLK_DEV_INITRD=y | ||
10 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
11 | # CONFIG_BASE_FULL is not set | ||
12 | CONFIG_MODULES=y | ||
13 | CONFIG_MODULE_UNLOAD=y | ||
14 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
15 | # CONFIG_BLK_DEV_BSG is not set | ||
16 | # CONFIG_IOSCHED_DEADLINE is not set | ||
17 | CONFIG_BOARD_MERISC=y | ||
18 | CONFIG_AP700X_32_BIT_SMC=y | ||
19 | # CONFIG_OWNERSHIP_TRACE is not set | ||
20 | CONFIG_NET=y | ||
21 | CONFIG_PACKET=y | ||
22 | CONFIG_UNIX=y | ||
23 | CONFIG_XFRM_USER=y | ||
24 | CONFIG_NET_KEY=y | ||
25 | CONFIG_INET=y | ||
26 | CONFIG_IP_MULTICAST=y | ||
27 | CONFIG_IP_ADVANCED_ROUTER=y | ||
28 | CONFIG_IP_PNP=y | ||
29 | CONFIG_IP_PNP_DHCP=y | ||
30 | CONFIG_IP_MROUTE=y | ||
31 | CONFIG_IP_PIMSM_V1=y | ||
32 | CONFIG_SYN_COOKIES=y | ||
33 | CONFIG_INET_AH=y | ||
34 | CONFIG_INET_ESP=y | ||
35 | CONFIG_INET_IPCOMP=y | ||
36 | # CONFIG_INET_LRO is not set | ||
37 | # CONFIG_IPV6 is not set | ||
38 | CONFIG_CAN=y | ||
39 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
40 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
41 | # CONFIG_FW_LOADER is not set | ||
42 | CONFIG_MTD=y | ||
43 | CONFIG_MTD_BLOCK=y | ||
44 | CONFIG_MTD_CFI=y | ||
45 | CONFIG_MTD_JEDECPROBE=y | ||
46 | CONFIG_MTD_CFI_AMDSTD=y | ||
47 | CONFIG_MTD_ABSENT=y | ||
48 | CONFIG_MTD_PHYSMAP=y | ||
49 | CONFIG_MTD_BLOCK2MTD=y | ||
50 | CONFIG_BLK_DEV_LOOP=y | ||
51 | CONFIG_ATMEL_SSC=y | ||
52 | CONFIG_SCSI=y | ||
53 | CONFIG_BLK_DEV_SD=y | ||
54 | # CONFIG_SCSI_LOWLEVEL is not set | ||
55 | CONFIG_NETDEVICES=y | ||
56 | CONFIG_MACB=y | ||
57 | # CONFIG_INPUT_MOUSEDEV is not set | ||
58 | CONFIG_INPUT_EVDEV=y | ||
59 | # CONFIG_KEYBOARD_ATKBD is not set | ||
60 | # CONFIG_INPUT_MOUSE is not set | ||
61 | CONFIG_INPUT_TOUCHSCREEN=y | ||
62 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
63 | CONFIG_INPUT_MISC=y | ||
64 | CONFIG_INPUT_UINPUT=y | ||
65 | # CONFIG_SERIO is not set | ||
66 | # CONFIG_CONSOLE_TRANSLATIONS is not set | ||
67 | # CONFIG_LEGACY_PTYS is not set | ||
68 | # CONFIG_DEVKMEM is not set | ||
69 | CONFIG_SERIAL_ATMEL=y | ||
70 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
71 | # CONFIG_HW_RANDOM is not set | ||
72 | CONFIG_I2C=y | ||
73 | CONFIG_I2C_CHARDEV=y | ||
74 | CONFIG_I2C_GPIO=y | ||
75 | CONFIG_SPI=y | ||
76 | CONFIG_SPI_ATMEL=y | ||
77 | CONFIG_SPI_SPIDEV=y | ||
78 | CONFIG_GPIO_SYSFS=y | ||
79 | # CONFIG_HWMON is not set | ||
80 | CONFIG_WATCHDOG=y | ||
81 | CONFIG_FB=y | ||
82 | CONFIG_FB_ATMEL=y | ||
83 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
84 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
85 | CONFIG_LOGO=y | ||
86 | CONFIG_MMC=y | ||
87 | CONFIG_MMC_ATMELMCI=y | ||
88 | CONFIG_NEW_LEDS=y | ||
89 | CONFIG_LEDS_CLASS=y | ||
90 | CONFIG_LEDS_PWM=y | ||
91 | CONFIG_RTC_CLASS=y | ||
92 | # CONFIG_RTC_HCTOSYS is not set | ||
93 | CONFIG_RTC_DRV_PCF8563=y | ||
94 | CONFIG_DMADEVICES=y | ||
95 | CONFIG_UIO=y | ||
96 | CONFIG_PWM=y | ||
97 | CONFIG_PWM_ATMEL=m | ||
98 | CONFIG_EXT2_FS=y | ||
99 | # CONFIG_DNOTIFY is not set | ||
100 | CONFIG_FUSE_FS=y | ||
101 | CONFIG_MSDOS_FS=y | ||
102 | CONFIG_VFAT_FS=y | ||
103 | CONFIG_TMPFS=y | ||
104 | CONFIG_CONFIGFS_FS=y | ||
105 | CONFIG_JFFS2_FS=y | ||
106 | CONFIG_JFFS2_FS_WBUF_VERIFY=y | ||
107 | CONFIG_CRAMFS=y | ||
108 | CONFIG_NFS_FS=y | ||
109 | CONFIG_ROOT_NFS=y | ||
110 | CONFIG_NLS_CODEPAGE_437=y | ||
111 | CONFIG_NLS_CODEPAGE_850=y | ||
112 | CONFIG_NLS_ISO8859_1=y | ||
113 | CONFIG_NLS_UTF8=y | ||
114 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
115 | # CONFIG_CRYPTO_HW is not set | ||
diff --git a/arch/avr32/configs/mimc200_defconfig b/arch/avr32/configs/mimc200_defconfig deleted file mode 100644 index 49c7e890af7b..000000000000 --- a/arch/avr32/configs/mimc200_defconfig +++ /dev/null | |||
@@ -1,114 +0,0 @@ | |||
1 | # CONFIG_LOCALVERSION_AUTO is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_POSIX_MQUEUE=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_BSD_PROCESS_ACCT=y | ||
7 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
8 | CONFIG_LOG_BUF_SHIFT=14 | ||
9 | CONFIG_BLK_DEV_INITRD=y | ||
10 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
11 | # CONFIG_BASE_FULL is not set | ||
12 | # CONFIG_COMPAT_BRK is not set | ||
13 | CONFIG_PROFILING=y | ||
14 | # CONFIG_BLK_DEV_BSG is not set | ||
15 | # CONFIG_IOSCHED_DEADLINE is not set | ||
16 | CONFIG_BOARD_MIMC200=y | ||
17 | # CONFIG_OWNERSHIP_TRACE is not set | ||
18 | CONFIG_NMI_DEBUGGING=y | ||
19 | CONFIG_CPU_FREQ=y | ||
20 | # CONFIG_CPU_FREQ_STAT is not set | ||
21 | CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y | ||
22 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
23 | CONFIG_AVR32_AT32AP_CPUFREQ=y | ||
24 | CONFIG_NET=y | ||
25 | CONFIG_PACKET=y | ||
26 | CONFIG_UNIX=y | ||
27 | CONFIG_XFRM_USER=y | ||
28 | CONFIG_NET_KEY=y | ||
29 | CONFIG_INET=y | ||
30 | CONFIG_IP_MULTICAST=y | ||
31 | CONFIG_IP_ADVANCED_ROUTER=y | ||
32 | CONFIG_IP_PNP=y | ||
33 | CONFIG_IP_PNP_DHCP=y | ||
34 | CONFIG_IP_MROUTE=y | ||
35 | CONFIG_IP_PIMSM_V1=y | ||
36 | CONFIG_SYN_COOKIES=y | ||
37 | CONFIG_INET_AH=y | ||
38 | CONFIG_INET_ESP=y | ||
39 | CONFIG_INET_IPCOMP=y | ||
40 | # CONFIG_INET_LRO is not set | ||
41 | CONFIG_INET6_AH=y | ||
42 | CONFIG_INET6_ESP=y | ||
43 | CONFIG_INET6_IPCOMP=y | ||
44 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
45 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
46 | # CONFIG_FW_LOADER is not set | ||
47 | CONFIG_MTD=y | ||
48 | CONFIG_MTD_CMDLINE_PARTS=y | ||
49 | CONFIG_MTD_BLOCK=y | ||
50 | CONFIG_MTD_CFI=y | ||
51 | CONFIG_MTD_CFI_AMDSTD=y | ||
52 | CONFIG_MTD_PHYSMAP=y | ||
53 | CONFIG_MTD_DATAFLASH=y | ||
54 | CONFIG_ATMEL_TCLIB=y | ||
55 | CONFIG_EEPROM_AT24=y | ||
56 | CONFIG_EEPROM_AT25=y | ||
57 | CONFIG_NETDEVICES=y | ||
58 | CONFIG_MACB=y | ||
59 | # CONFIG_INPUT is not set | ||
60 | # CONFIG_SERIO is not set | ||
61 | # CONFIG_VT is not set | ||
62 | # CONFIG_LEGACY_PTYS is not set | ||
63 | # CONFIG_DEVKMEM is not set | ||
64 | CONFIG_SERIAL_ATMEL=y | ||
65 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
66 | # CONFIG_HW_RANDOM is not set | ||
67 | CONFIG_I2C=y | ||
68 | CONFIG_I2C_CHARDEV=y | ||
69 | CONFIG_I2C_GPIO=y | ||
70 | CONFIG_SPI=y | ||
71 | CONFIG_SPI_ATMEL=y | ||
72 | CONFIG_GPIO_SYSFS=y | ||
73 | # CONFIG_HWMON is not set | ||
74 | CONFIG_WATCHDOG=y | ||
75 | CONFIG_AT32AP700X_WDT=y | ||
76 | CONFIG_FB=y | ||
77 | CONFIG_FB_ATMEL=y | ||
78 | # CONFIG_USB_SUPPORT is not set | ||
79 | CONFIG_MMC=y | ||
80 | CONFIG_MMC_TEST=y | ||
81 | CONFIG_MMC_ATMELMCI=y | ||
82 | CONFIG_MMC_SPI=y | ||
83 | CONFIG_NEW_LEDS=y | ||
84 | CONFIG_LEDS_CLASS=y | ||
85 | CONFIG_LEDS_GPIO=y | ||
86 | CONFIG_LEDS_TRIGGERS=y | ||
87 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
88 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
89 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
90 | CONFIG_RTC_CLASS=y | ||
91 | CONFIG_RTC_DRV_DS1390=y | ||
92 | CONFIG_DMADEVICES=y | ||
93 | CONFIG_EXT2_FS=y | ||
94 | CONFIG_EXT3_FS=y | ||
95 | # CONFIG_EXT3_FS_XATTR is not set | ||
96 | # CONFIG_DNOTIFY is not set | ||
97 | CONFIG_MSDOS_FS=y | ||
98 | CONFIG_VFAT_FS=y | ||
99 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
100 | CONFIG_TMPFS=y | ||
101 | CONFIG_CONFIGFS_FS=y | ||
102 | CONFIG_JFFS2_FS=y | ||
103 | CONFIG_NFS_FS=y | ||
104 | CONFIG_ROOT_NFS=y | ||
105 | CONFIG_NLS_CODEPAGE_437=y | ||
106 | CONFIG_NLS_CODEPAGE_850=y | ||
107 | CONFIG_NLS_ISO8859_1=y | ||
108 | CONFIG_NLS_UTF8=y | ||
109 | CONFIG_FRAME_POINTER=y | ||
110 | CONFIG_MAGIC_SYSRQ=y | ||
111 | CONFIG_CRYPTO_ECB=y | ||
112 | CONFIG_CRYPTO_PCBC=y | ||
113 | CONFIG_CRYPTO_ARC4=y | ||
114 | CONFIG_CRC_CCITT=y | ||
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild deleted file mode 100644 index 3d7ef2c17a7c..000000000000 --- a/arch/avr32/include/asm/Kbuild +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | |||
2 | generic-y += clkdev.h | ||
3 | generic-y += delay.h | ||
4 | generic-y += device.h | ||
5 | generic-y += div64.h | ||
6 | generic-y += emergency-restart.h | ||
7 | generic-y += exec.h | ||
8 | generic-y += futex.h | ||
9 | generic-y += irq_regs.h | ||
10 | generic-y += irq_work.h | ||
11 | generic-y += local.h | ||
12 | generic-y += local64.h | ||
13 | generic-y += mcs_spinlock.h | ||
14 | generic-y += mm-arch-hooks.h | ||
15 | generic-y += param.h | ||
16 | generic-y += percpu.h | ||
17 | generic-y += preempt.h | ||
18 | generic-y += sections.h | ||
19 | generic-y += topology.h | ||
20 | generic-y += trace_clock.h | ||
21 | generic-y += vga.h | ||
22 | generic-y += word-at-a-time.h | ||
23 | generic-y += xor.h | ||
diff --git a/arch/avr32/include/asm/addrspace.h b/arch/avr32/include/asm/addrspace.h deleted file mode 100644 index 5a47a7979648..000000000000 --- a/arch/avr32/include/asm/addrspace.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * Definitions for the address spaces of the AVR32 CPUs. Heavily based on | ||
3 | * include/asm-sh/addrspace.h | ||
4 | * | ||
5 | * Copyright (C) 2004-2006 Atmel Corporation | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_AVR32_ADDRSPACE_H | ||
12 | #define __ASM_AVR32_ADDRSPACE_H | ||
13 | |||
14 | #ifdef CONFIG_MMU | ||
15 | |||
16 | /* Memory segments when segmentation is enabled */ | ||
17 | #define P0SEG 0x00000000 | ||
18 | #define P1SEG 0x80000000 | ||
19 | #define P2SEG 0xa0000000 | ||
20 | #define P3SEG 0xc0000000 | ||
21 | #define P4SEG 0xe0000000 | ||
22 | |||
23 | /* Returns the privileged segment base of a given address */ | ||
24 | #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) | ||
25 | |||
26 | /* Returns the physical address of a PnSEG (n=1,2) address */ | ||
27 | #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) | ||
28 | |||
29 | /* | ||
30 | * Map an address to a certain privileged segment | ||
31 | */ | ||
32 | #define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ | ||
33 | | P1SEG)) | ||
34 | #define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ | ||
35 | | P2SEG)) | ||
36 | #define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ | ||
37 | | P3SEG)) | ||
38 | #define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ | ||
39 | | P4SEG)) | ||
40 | |||
41 | #endif /* CONFIG_MMU */ | ||
42 | |||
43 | #endif /* __ASM_AVR32_ADDRSPACE_H */ | ||
diff --git a/arch/avr32/include/asm/asm-offsets.h b/arch/avr32/include/asm/asm-offsets.h deleted file mode 100644 index d370ee36a182..000000000000 --- a/arch/avr32/include/asm/asm-offsets.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <generated/asm-offsets.h> | ||
diff --git a/arch/avr32/include/asm/asm.h b/arch/avr32/include/asm/asm.h deleted file mode 100644 index a2c64f404b98..000000000000 --- a/arch/avr32/include/asm/asm.h +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_ASM_H__ | ||
9 | #define __ASM_AVR32_ASM_H__ | ||
10 | |||
11 | #include <asm/sysreg.h> | ||
12 | #include <asm/asm-offsets.h> | ||
13 | #include <asm/thread_info.h> | ||
14 | |||
15 | #define mask_interrupts ssrf SYSREG_GM_OFFSET | ||
16 | #define mask_exceptions ssrf SYSREG_EM_OFFSET | ||
17 | #define unmask_interrupts csrf SYSREG_GM_OFFSET | ||
18 | #define unmask_exceptions csrf SYSREG_EM_OFFSET | ||
19 | |||
20 | #ifdef CONFIG_FRAME_POINTER | ||
21 | .macro save_fp | ||
22 | st.w --sp, r7 | ||
23 | .endm | ||
24 | .macro restore_fp | ||
25 | ld.w r7, sp++ | ||
26 | .endm | ||
27 | .macro zero_fp | ||
28 | mov r7, 0 | ||
29 | .endm | ||
30 | #else | ||
31 | .macro save_fp | ||
32 | .endm | ||
33 | .macro restore_fp | ||
34 | .endm | ||
35 | .macro zero_fp | ||
36 | .endm | ||
37 | #endif | ||
38 | .macro get_thread_info reg | ||
39 | mov \reg, sp | ||
40 | andl \reg, ~(THREAD_SIZE - 1) & 0xffff | ||
41 | .endm | ||
42 | |||
43 | /* Save and restore registers */ | ||
44 | .macro save_min sr, tmp=lr | ||
45 | pushm lr | ||
46 | mfsr \tmp, \sr | ||
47 | zero_fp | ||
48 | st.w --sp, \tmp | ||
49 | .endm | ||
50 | |||
51 | .macro restore_min sr, tmp=lr | ||
52 | ld.w \tmp, sp++ | ||
53 | mtsr \sr, \tmp | ||
54 | popm lr | ||
55 | .endm | ||
56 | |||
57 | .macro save_half sr, tmp=lr | ||
58 | save_fp | ||
59 | pushm r8-r9,r10,r11,r12,lr | ||
60 | zero_fp | ||
61 | mfsr \tmp, \sr | ||
62 | st.w --sp, \tmp | ||
63 | .endm | ||
64 | |||
65 | .macro restore_half sr, tmp=lr | ||
66 | ld.w \tmp, sp++ | ||
67 | mtsr \sr, \tmp | ||
68 | popm r8-r9,r10,r11,r12,lr | ||
69 | restore_fp | ||
70 | .endm | ||
71 | |||
72 | .macro save_full_user sr, tmp=lr | ||
73 | stmts --sp, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr | ||
74 | st.w --sp, lr | ||
75 | zero_fp | ||
76 | mfsr \tmp, \sr | ||
77 | st.w --sp, \tmp | ||
78 | .endm | ||
79 | |||
80 | .macro restore_full_user sr, tmp=lr | ||
81 | ld.w \tmp, sp++ | ||
82 | mtsr \sr, \tmp | ||
83 | ld.w lr, sp++ | ||
84 | ldmts sp++, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr | ||
85 | .endm | ||
86 | |||
87 | /* uaccess macros */ | ||
88 | .macro branch_if_kernel scratch, label | ||
89 | get_thread_info \scratch | ||
90 | ld.w \scratch, \scratch[TI_flags] | ||
91 | bld \scratch, TIF_USERSPACE | ||
92 | brcc \label | ||
93 | .endm | ||
94 | |||
95 | .macro ret_if_privileged scratch, addr, size, ret | ||
96 | sub \scratch, \size, 1 | ||
97 | add \scratch, \addr | ||
98 | retcs \ret | ||
99 | retmi \ret | ||
100 | .endm | ||
101 | |||
102 | #endif /* __ASM_AVR32_ASM_H__ */ | ||
diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h deleted file mode 100644 index 3d5ce38a6f0b..000000000000 --- a/arch/avr32/include/asm/atomic.h +++ /dev/null | |||
@@ -1,243 +0,0 @@ | |||
1 | /* | ||
2 | * Atomic operations that C can't guarantee us. Useful for | ||
3 | * resource counting etc. | ||
4 | * | ||
5 | * But use these as seldom as possible since they are slower than | ||
6 | * regular operations. | ||
7 | * | ||
8 | * Copyright (C) 2004-2006 Atmel Corporation | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | #ifndef __ASM_AVR32_ATOMIC_H | ||
15 | #define __ASM_AVR32_ATOMIC_H | ||
16 | |||
17 | #include <linux/types.h> | ||
18 | #include <asm/cmpxchg.h> | ||
19 | |||
20 | #define ATOMIC_INIT(i) { (i) } | ||
21 | |||
22 | #define atomic_read(v) READ_ONCE((v)->counter) | ||
23 | #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) | ||
24 | |||
25 | #define ATOMIC_OP_RETURN(op, asm_op, asm_con) \ | ||
26 | static inline int __atomic_##op##_return(int i, atomic_t *v) \ | ||
27 | { \ | ||
28 | int result; \ | ||
29 | \ | ||
30 | asm volatile( \ | ||
31 | "/* atomic_" #op "_return */\n" \ | ||
32 | "1: ssrf 5\n" \ | ||
33 | " ld.w %0, %2\n" \ | ||
34 | " " #asm_op " %0, %3\n" \ | ||
35 | " stcond %1, %0\n" \ | ||
36 | " brne 1b" \ | ||
37 | : "=&r" (result), "=o" (v->counter) \ | ||
38 | : "m" (v->counter), #asm_con (i) \ | ||
39 | : "cc"); \ | ||
40 | \ | ||
41 | return result; \ | ||
42 | } | ||
43 | |||
44 | #define ATOMIC_FETCH_OP(op, asm_op, asm_con) \ | ||
45 | static inline int __atomic_fetch_##op(int i, atomic_t *v) \ | ||
46 | { \ | ||
47 | int result, val; \ | ||
48 | \ | ||
49 | asm volatile( \ | ||
50 | "/* atomic_fetch_" #op " */\n" \ | ||
51 | "1: ssrf 5\n" \ | ||
52 | " ld.w %0, %3\n" \ | ||
53 | " mov %1, %0\n" \ | ||
54 | " " #asm_op " %1, %4\n" \ | ||
55 | " stcond %2, %1\n" \ | ||
56 | " brne 1b" \ | ||
57 | : "=&r" (result), "=&r" (val), "=o" (v->counter) \ | ||
58 | : "m" (v->counter), #asm_con (i) \ | ||
59 | : "cc"); \ | ||
60 | \ | ||
61 | return result; \ | ||
62 | } | ||
63 | |||
64 | ATOMIC_OP_RETURN(sub, sub, rKs21) | ||
65 | ATOMIC_OP_RETURN(add, add, r) | ||
66 | ATOMIC_FETCH_OP (sub, sub, rKs21) | ||
67 | ATOMIC_FETCH_OP (add, add, r) | ||
68 | |||
69 | #define ATOMIC_OPS(op, asm_op) \ | ||
70 | ATOMIC_OP_RETURN(op, asm_op, r) \ | ||
71 | static inline void atomic_##op(int i, atomic_t *v) \ | ||
72 | { \ | ||
73 | (void)__atomic_##op##_return(i, v); \ | ||
74 | } \ | ||
75 | ATOMIC_FETCH_OP(op, asm_op, r) \ | ||
76 | static inline int atomic_fetch_##op(int i, atomic_t *v) \ | ||
77 | { \ | ||
78 | return __atomic_fetch_##op(i, v); \ | ||
79 | } | ||
80 | |||
81 | ATOMIC_OPS(and, and) | ||
82 | ATOMIC_OPS(or, or) | ||
83 | ATOMIC_OPS(xor, eor) | ||
84 | |||
85 | #undef ATOMIC_OPS | ||
86 | #undef ATOMIC_FETCH_OP | ||
87 | #undef ATOMIC_OP_RETURN | ||
88 | |||
89 | /* | ||
90 | * Probably found the reason why we want to use sub with the signed 21-bit | ||
91 | * limit, it uses one less register than the add instruction that can add up to | ||
92 | * 32-bit values. | ||
93 | * | ||
94 | * Both instructions are 32-bit, to use a 16-bit instruction the immediate is | ||
95 | * very small; 4 bit. | ||
96 | * | ||
97 | * sub 32-bit, type IV, takes a register and subtracts a 21-bit immediate. | ||
98 | * add 32-bit, type II, adds two register values together. | ||
99 | */ | ||
100 | #define IS_21BIT_CONST(i) \ | ||
101 | (__builtin_constant_p(i) && ((i) >= -1048575) && ((i) <= 1048576)) | ||
102 | |||
103 | /* | ||
104 | * atomic_add_return - add integer to atomic variable | ||
105 | * @i: integer value to add | ||
106 | * @v: pointer of type atomic_t | ||
107 | * | ||
108 | * Atomically adds @i to @v. Returns the resulting value. | ||
109 | */ | ||
110 | static inline int atomic_add_return(int i, atomic_t *v) | ||
111 | { | ||
112 | if (IS_21BIT_CONST(i)) | ||
113 | return __atomic_sub_return(-i, v); | ||
114 | |||
115 | return __atomic_add_return(i, v); | ||
116 | } | ||
117 | |||
118 | static inline int atomic_fetch_add(int i, atomic_t *v) | ||
119 | { | ||
120 | if (IS_21BIT_CONST(i)) | ||
121 | return __atomic_fetch_sub(-i, v); | ||
122 | |||
123 | return __atomic_fetch_add(i, v); | ||
124 | } | ||
125 | |||
126 | /* | ||
127 | * atomic_sub_return - subtract the atomic variable | ||
128 | * @i: integer value to subtract | ||
129 | * @v: pointer of type atomic_t | ||
130 | * | ||
131 | * Atomically subtracts @i from @v. Returns the resulting value. | ||
132 | */ | ||
133 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
134 | { | ||
135 | if (IS_21BIT_CONST(i)) | ||
136 | return __atomic_sub_return(i, v); | ||
137 | |||
138 | return __atomic_add_return(-i, v); | ||
139 | } | ||
140 | |||
141 | static inline int atomic_fetch_sub(int i, atomic_t *v) | ||
142 | { | ||
143 | if (IS_21BIT_CONST(i)) | ||
144 | return __atomic_fetch_sub(i, v); | ||
145 | |||
146 | return __atomic_fetch_add(-i, v); | ||
147 | } | ||
148 | |||
149 | /* | ||
150 | * __atomic_add_unless - add unless the number is a given value | ||
151 | * @v: pointer of type atomic_t | ||
152 | * @a: the amount to add to v... | ||
153 | * @u: ...unless v is equal to u. | ||
154 | * | ||
155 | * Atomically adds @a to @v, so long as it was not @u. | ||
156 | * Returns the old value of @v. | ||
157 | */ | ||
158 | static inline int __atomic_add_unless(atomic_t *v, int a, int u) | ||
159 | { | ||
160 | int tmp, old = atomic_read(v); | ||
161 | |||
162 | if (IS_21BIT_CONST(a)) { | ||
163 | asm volatile( | ||
164 | "/* __atomic_sub_unless */\n" | ||
165 | "1: ssrf 5\n" | ||
166 | " ld.w %0, %2\n" | ||
167 | " cp.w %0, %4\n" | ||
168 | " breq 1f\n" | ||
169 | " sub %0, %3\n" | ||
170 | " stcond %1, %0\n" | ||
171 | " brne 1b\n" | ||
172 | "1:" | ||
173 | : "=&r"(tmp), "=o"(v->counter) | ||
174 | : "m"(v->counter), "rKs21"(-a), "rKs21"(u) | ||
175 | : "cc", "memory"); | ||
176 | } else { | ||
177 | asm volatile( | ||
178 | "/* __atomic_add_unless */\n" | ||
179 | "1: ssrf 5\n" | ||
180 | " ld.w %0, %2\n" | ||
181 | " cp.w %0, %4\n" | ||
182 | " breq 1f\n" | ||
183 | " add %0, %3\n" | ||
184 | " stcond %1, %0\n" | ||
185 | " brne 1b\n" | ||
186 | "1:" | ||
187 | : "=&r"(tmp), "=o"(v->counter) | ||
188 | : "m"(v->counter), "r"(a), "ir"(u) | ||
189 | : "cc", "memory"); | ||
190 | } | ||
191 | |||
192 | return old; | ||
193 | } | ||
194 | |||
195 | #undef IS_21BIT_CONST | ||
196 | |||
197 | /* | ||
198 | * atomic_sub_if_positive - conditionally subtract integer from atomic variable | ||
199 | * @i: integer value to subtract | ||
200 | * @v: pointer of type atomic_t | ||
201 | * | ||
202 | * Atomically test @v and subtract @i if @v is greater or equal than @i. | ||
203 | * The function returns the old value of @v minus @i. | ||
204 | */ | ||
205 | static inline int atomic_sub_if_positive(int i, atomic_t *v) | ||
206 | { | ||
207 | int result; | ||
208 | |||
209 | asm volatile( | ||
210 | "/* atomic_sub_if_positive */\n" | ||
211 | "1: ssrf 5\n" | ||
212 | " ld.w %0, %2\n" | ||
213 | " sub %0, %3\n" | ||
214 | " brlt 1f\n" | ||
215 | " stcond %1, %0\n" | ||
216 | " brne 1b\n" | ||
217 | "1:" | ||
218 | : "=&r"(result), "=o"(v->counter) | ||
219 | : "m"(v->counter), "ir"(i) | ||
220 | : "cc", "memory"); | ||
221 | |||
222 | return result; | ||
223 | } | ||
224 | |||
225 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
226 | #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) | ||
227 | |||
228 | #define atomic_sub(i, v) (void)atomic_sub_return(i, v) | ||
229 | #define atomic_add(i, v) (void)atomic_add_return(i, v) | ||
230 | #define atomic_dec(v) atomic_sub(1, (v)) | ||
231 | #define atomic_inc(v) atomic_add(1, (v)) | ||
232 | |||
233 | #define atomic_dec_return(v) atomic_sub_return(1, v) | ||
234 | #define atomic_inc_return(v) atomic_add_return(1, v) | ||
235 | |||
236 | #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) | ||
237 | #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) | ||
238 | #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) | ||
239 | #define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0) | ||
240 | |||
241 | #define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v) | ||
242 | |||
243 | #endif /* __ASM_AVR32_ATOMIC_H */ | ||
diff --git a/arch/avr32/include/asm/barrier.h b/arch/avr32/include/asm/barrier.h deleted file mode 100644 index 715100790fd0..000000000000 --- a/arch/avr32/include/asm/barrier.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_BARRIER_H | ||
9 | #define __ASM_AVR32_BARRIER_H | ||
10 | |||
11 | /* | ||
12 | * Weirdest thing ever.. no full barrier, but it has a write barrier! | ||
13 | */ | ||
14 | #define wmb() asm volatile("sync 0" : : : "memory") | ||
15 | |||
16 | #ifdef CONFIG_SMP | ||
17 | # error "The AVR32 port does not support SMP" | ||
18 | #endif | ||
19 | |||
20 | #include <asm-generic/barrier.h> | ||
21 | |||
22 | #endif /* __ASM_AVR32_BARRIER_H */ | ||
diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h deleted file mode 100644 index 910d5374ce59..000000000000 --- a/arch/avr32/include/asm/bitops.h +++ /dev/null | |||
@@ -1,314 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_BITOPS_H | ||
9 | #define __ASM_AVR32_BITOPS_H | ||
10 | |||
11 | #ifndef _LINUX_BITOPS_H | ||
12 | #error only <linux/bitops.h> can be included directly | ||
13 | #endif | ||
14 | |||
15 | #include <asm/byteorder.h> | ||
16 | #include <asm/barrier.h> | ||
17 | |||
18 | /* | ||
19 | * set_bit - Atomically set a bit in memory | ||
20 | * @nr: the bit to set | ||
21 | * @addr: the address to start counting from | ||
22 | * | ||
23 | * This function is atomic and may not be reordered. See __set_bit() | ||
24 | * if you do not require the atomic guarantees. | ||
25 | * | ||
26 | * Note that @nr may be almost arbitrarily large; this function is not | ||
27 | * restricted to acting on a single-word quantity. | ||
28 | */ | ||
29 | static inline void set_bit(int nr, volatile void * addr) | ||
30 | { | ||
31 | unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; | ||
32 | unsigned long tmp; | ||
33 | |||
34 | if (__builtin_constant_p(nr)) { | ||
35 | asm volatile( | ||
36 | "1: ssrf 5\n" | ||
37 | " ld.w %0, %2\n" | ||
38 | " sbr %0, %3\n" | ||
39 | " stcond %1, %0\n" | ||
40 | " brne 1b" | ||
41 | : "=&r"(tmp), "=o"(*p) | ||
42 | : "m"(*p), "i"(nr) | ||
43 | : "cc"); | ||
44 | } else { | ||
45 | unsigned long mask = 1UL << (nr % BITS_PER_LONG); | ||
46 | asm volatile( | ||
47 | "1: ssrf 5\n" | ||
48 | " ld.w %0, %2\n" | ||
49 | " or %0, %3\n" | ||
50 | " stcond %1, %0\n" | ||
51 | " brne 1b" | ||
52 | : "=&r"(tmp), "=o"(*p) | ||
53 | : "m"(*p), "r"(mask) | ||
54 | : "cc"); | ||
55 | } | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * clear_bit - Clears a bit in memory | ||
60 | * @nr: Bit to clear | ||
61 | * @addr: Address to start counting from | ||
62 | * | ||
63 | * clear_bit() is atomic and may not be reordered. However, it does | ||
64 | * not contain a memory barrier, so if it is used for locking purposes, | ||
65 | * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic() | ||
66 | * in order to ensure changes are visible on other processors. | ||
67 | */ | ||
68 | static inline void clear_bit(int nr, volatile void * addr) | ||
69 | { | ||
70 | unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; | ||
71 | unsigned long tmp; | ||
72 | |||
73 | if (__builtin_constant_p(nr)) { | ||
74 | asm volatile( | ||
75 | "1: ssrf 5\n" | ||
76 | " ld.w %0, %2\n" | ||
77 | " cbr %0, %3\n" | ||
78 | " stcond %1, %0\n" | ||
79 | " brne 1b" | ||
80 | : "=&r"(tmp), "=o"(*p) | ||
81 | : "m"(*p), "i"(nr) | ||
82 | : "cc"); | ||
83 | } else { | ||
84 | unsigned long mask = 1UL << (nr % BITS_PER_LONG); | ||
85 | asm volatile( | ||
86 | "1: ssrf 5\n" | ||
87 | " ld.w %0, %2\n" | ||
88 | " andn %0, %3\n" | ||
89 | " stcond %1, %0\n" | ||
90 | " brne 1b" | ||
91 | : "=&r"(tmp), "=o"(*p) | ||
92 | : "m"(*p), "r"(mask) | ||
93 | : "cc"); | ||
94 | } | ||
95 | } | ||
96 | |||
97 | /* | ||
98 | * change_bit - Toggle a bit in memory | ||
99 | * @nr: Bit to change | ||
100 | * @addr: Address to start counting from | ||
101 | * | ||
102 | * change_bit() is atomic and may not be reordered. | ||
103 | * Note that @nr may be almost arbitrarily large; this function is not | ||
104 | * restricted to acting on a single-word quantity. | ||
105 | */ | ||
106 | static inline void change_bit(int nr, volatile void * addr) | ||
107 | { | ||
108 | unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; | ||
109 | unsigned long mask = 1UL << (nr % BITS_PER_LONG); | ||
110 | unsigned long tmp; | ||
111 | |||
112 | asm volatile( | ||
113 | "1: ssrf 5\n" | ||
114 | " ld.w %0, %2\n" | ||
115 | " eor %0, %3\n" | ||
116 | " stcond %1, %0\n" | ||
117 | " brne 1b" | ||
118 | : "=&r"(tmp), "=o"(*p) | ||
119 | : "m"(*p), "r"(mask) | ||
120 | : "cc"); | ||
121 | } | ||
122 | |||
123 | /* | ||
124 | * test_and_set_bit - Set a bit and return its old value | ||
125 | * @nr: Bit to set | ||
126 | * @addr: Address to count from | ||
127 | * | ||
128 | * This operation is atomic and cannot be reordered. | ||
129 | * It also implies a memory barrier. | ||
130 | */ | ||
131 | static inline int test_and_set_bit(int nr, volatile void * addr) | ||
132 | { | ||
133 | unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; | ||
134 | unsigned long mask = 1UL << (nr % BITS_PER_LONG); | ||
135 | unsigned long tmp, old; | ||
136 | |||
137 | if (__builtin_constant_p(nr)) { | ||
138 | asm volatile( | ||
139 | "1: ssrf 5\n" | ||
140 | " ld.w %0, %3\n" | ||
141 | " mov %2, %0\n" | ||
142 | " sbr %0, %4\n" | ||
143 | " stcond %1, %0\n" | ||
144 | " brne 1b" | ||
145 | : "=&r"(tmp), "=o"(*p), "=&r"(old) | ||
146 | : "m"(*p), "i"(nr) | ||
147 | : "memory", "cc"); | ||
148 | } else { | ||
149 | asm volatile( | ||
150 | "1: ssrf 5\n" | ||
151 | " ld.w %2, %3\n" | ||
152 | " or %0, %2, %4\n" | ||
153 | " stcond %1, %0\n" | ||
154 | " brne 1b" | ||
155 | : "=&r"(tmp), "=o"(*p), "=&r"(old) | ||
156 | : "m"(*p), "r"(mask) | ||
157 | : "memory", "cc"); | ||
158 | } | ||
159 | |||
160 | return (old & mask) != 0; | ||
161 | } | ||
162 | |||
163 | /* | ||
164 | * test_and_clear_bit - Clear a bit and return its old value | ||
165 | * @nr: Bit to clear | ||
166 | * @addr: Address to count from | ||
167 | * | ||
168 | * This operation is atomic and cannot be reordered. | ||
169 | * It also implies a memory barrier. | ||
170 | */ | ||
171 | static inline int test_and_clear_bit(int nr, volatile void * addr) | ||
172 | { | ||
173 | unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; | ||
174 | unsigned long mask = 1UL << (nr % BITS_PER_LONG); | ||
175 | unsigned long tmp, old; | ||
176 | |||
177 | if (__builtin_constant_p(nr)) { | ||
178 | asm volatile( | ||
179 | "1: ssrf 5\n" | ||
180 | " ld.w %0, %3\n" | ||
181 | " mov %2, %0\n" | ||
182 | " cbr %0, %4\n" | ||
183 | " stcond %1, %0\n" | ||
184 | " brne 1b" | ||
185 | : "=&r"(tmp), "=o"(*p), "=&r"(old) | ||
186 | : "m"(*p), "i"(nr) | ||
187 | : "memory", "cc"); | ||
188 | } else { | ||
189 | asm volatile( | ||
190 | "1: ssrf 5\n" | ||
191 | " ld.w %0, %3\n" | ||
192 | " mov %2, %0\n" | ||
193 | " andn %0, %4\n" | ||
194 | " stcond %1, %0\n" | ||
195 | " brne 1b" | ||
196 | : "=&r"(tmp), "=o"(*p), "=&r"(old) | ||
197 | : "m"(*p), "r"(mask) | ||
198 | : "memory", "cc"); | ||
199 | } | ||
200 | |||
201 | return (old & mask) != 0; | ||
202 | } | ||
203 | |||
204 | /* | ||
205 | * test_and_change_bit - Change a bit and return its old value | ||
206 | * @nr: Bit to change | ||
207 | * @addr: Address to count from | ||
208 | * | ||
209 | * This operation is atomic and cannot be reordered. | ||
210 | * It also implies a memory barrier. | ||
211 | */ | ||
212 | static inline int test_and_change_bit(int nr, volatile void * addr) | ||
213 | { | ||
214 | unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; | ||
215 | unsigned long mask = 1UL << (nr % BITS_PER_LONG); | ||
216 | unsigned long tmp, old; | ||
217 | |||
218 | asm volatile( | ||
219 | "1: ssrf 5\n" | ||
220 | " ld.w %2, %3\n" | ||
221 | " eor %0, %2, %4\n" | ||
222 | " stcond %1, %0\n" | ||
223 | " brne 1b" | ||
224 | : "=&r"(tmp), "=o"(*p), "=&r"(old) | ||
225 | : "m"(*p), "r"(mask) | ||
226 | : "memory", "cc"); | ||
227 | |||
228 | return (old & mask) != 0; | ||
229 | } | ||
230 | |||
231 | #include <asm-generic/bitops/non-atomic.h> | ||
232 | |||
233 | /* Find First bit Set */ | ||
234 | static inline unsigned long __ffs(unsigned long word) | ||
235 | { | ||
236 | unsigned long result; | ||
237 | |||
238 | asm("brev %1\n\t" | ||
239 | "clz %0,%1" | ||
240 | : "=r"(result), "=&r"(word) | ||
241 | : "1"(word)); | ||
242 | return result; | ||
243 | } | ||
244 | |||
245 | /* Find First Zero */ | ||
246 | static inline unsigned long ffz(unsigned long word) | ||
247 | { | ||
248 | return __ffs(~word); | ||
249 | } | ||
250 | |||
251 | /* Find Last bit Set */ | ||
252 | static inline int fls(unsigned long word) | ||
253 | { | ||
254 | unsigned long result; | ||
255 | |||
256 | asm("clz %0,%1" : "=r"(result) : "r"(word)); | ||
257 | return 32 - result; | ||
258 | } | ||
259 | |||
260 | static inline int __fls(unsigned long word) | ||
261 | { | ||
262 | return fls(word) - 1; | ||
263 | } | ||
264 | |||
265 | unsigned long find_first_zero_bit(const unsigned long *addr, | ||
266 | unsigned long size); | ||
267 | #define find_first_zero_bit find_first_zero_bit | ||
268 | |||
269 | unsigned long find_next_zero_bit(const unsigned long *addr, | ||
270 | unsigned long size, | ||
271 | unsigned long offset); | ||
272 | #define find_next_zero_bit find_next_zero_bit | ||
273 | |||
274 | unsigned long find_first_bit(const unsigned long *addr, | ||
275 | unsigned long size); | ||
276 | #define find_first_bit find_first_bit | ||
277 | |||
278 | unsigned long find_next_bit(const unsigned long *addr, | ||
279 | unsigned long size, | ||
280 | unsigned long offset); | ||
281 | #define find_next_bit find_next_bit | ||
282 | |||
283 | /* | ||
284 | * ffs: find first bit set. This is defined the same way as | ||
285 | * the libc and compiler builtin ffs routines, therefore | ||
286 | * differs in spirit from the above ffz (man ffs). | ||
287 | * | ||
288 | * The difference is that bit numbering starts at 1, and if no bit is set, | ||
289 | * the function returns 0. | ||
290 | */ | ||
291 | static inline int ffs(unsigned long word) | ||
292 | { | ||
293 | if(word == 0) | ||
294 | return 0; | ||
295 | return __ffs(word) + 1; | ||
296 | } | ||
297 | |||
298 | #include <asm-generic/bitops/fls64.h> | ||
299 | #include <asm-generic/bitops/sched.h> | ||
300 | #include <asm-generic/bitops/hweight.h> | ||
301 | #include <asm-generic/bitops/lock.h> | ||
302 | |||
303 | extern unsigned long find_next_zero_bit_le(const void *addr, | ||
304 | unsigned long size, unsigned long offset); | ||
305 | #define find_next_zero_bit_le find_next_zero_bit_le | ||
306 | |||
307 | extern unsigned long find_next_bit_le(const void *addr, | ||
308 | unsigned long size, unsigned long offset); | ||
309 | #define find_next_bit_le find_next_bit_le | ||
310 | |||
311 | #include <asm-generic/bitops/le.h> | ||
312 | #include <asm-generic/bitops/ext2-atomic.h> | ||
313 | |||
314 | #endif /* __ASM_AVR32_BITOPS_H */ | ||
diff --git a/arch/avr32/include/asm/bug.h b/arch/avr32/include/asm/bug.h deleted file mode 100644 index 85a92d099adb..000000000000 --- a/arch/avr32/include/asm/bug.h +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_BUG_H | ||
9 | #define __ASM_AVR32_BUG_H | ||
10 | |||
11 | #ifdef CONFIG_BUG | ||
12 | |||
13 | /* | ||
14 | * According to our Chief Architect, this compact opcode is very | ||
15 | * unlikely to ever be implemented. | ||
16 | */ | ||
17 | #define AVR32_BUG_OPCODE 0x5df0 | ||
18 | |||
19 | #ifdef CONFIG_DEBUG_BUGVERBOSE | ||
20 | |||
21 | #define _BUG_OR_WARN(flags) \ | ||
22 | asm volatile( \ | ||
23 | "1: .hword %0\n" \ | ||
24 | " .section __bug_table,\"a\",@progbits\n" \ | ||
25 | "2: .long 1b\n" \ | ||
26 | " .long %1\n" \ | ||
27 | " .short %2\n" \ | ||
28 | " .short %3\n" \ | ||
29 | " .org 2b + %4\n" \ | ||
30 | " .previous" \ | ||
31 | : \ | ||
32 | : "i"(AVR32_BUG_OPCODE), "i"(__FILE__), \ | ||
33 | "i"(__LINE__), "i"(flags), \ | ||
34 | "i"(sizeof(struct bug_entry))) | ||
35 | |||
36 | #else | ||
37 | |||
38 | #define _BUG_OR_WARN(flags) \ | ||
39 | asm volatile( \ | ||
40 | "1: .hword %0\n" \ | ||
41 | " .section __bug_table,\"a\",@progbits\n" \ | ||
42 | "2: .long 1b\n" \ | ||
43 | " .short %1\n" \ | ||
44 | " .org 2b + %2\n" \ | ||
45 | " .previous" \ | ||
46 | : \ | ||
47 | : "i"(AVR32_BUG_OPCODE), "i"(flags), \ | ||
48 | "i"(sizeof(struct bug_entry))) | ||
49 | |||
50 | #endif /* CONFIG_DEBUG_BUGVERBOSE */ | ||
51 | |||
52 | #define BUG() \ | ||
53 | do { \ | ||
54 | _BUG_OR_WARN(0); \ | ||
55 | unreachable(); \ | ||
56 | } while (0) | ||
57 | |||
58 | #define WARN_ON(condition) \ | ||
59 | ({ \ | ||
60 | int __ret_warn_on = !!(condition); \ | ||
61 | if (unlikely(__ret_warn_on)) \ | ||
62 | _BUG_OR_WARN(BUGFLAG_WARNING); \ | ||
63 | unlikely(__ret_warn_on); \ | ||
64 | }) | ||
65 | |||
66 | #define HAVE_ARCH_BUG | ||
67 | #define HAVE_ARCH_WARN_ON | ||
68 | |||
69 | #endif /* CONFIG_BUG */ | ||
70 | |||
71 | #include <asm-generic/bug.h> | ||
72 | |||
73 | struct pt_regs; | ||
74 | void die(const char *str, struct pt_regs *regs, long err); | ||
75 | void _exception(long signr, struct pt_regs *regs, int code, | ||
76 | unsigned long addr); | ||
77 | |||
78 | #endif /* __ASM_AVR32_BUG_H */ | ||
diff --git a/arch/avr32/include/asm/bugs.h b/arch/avr32/include/asm/bugs.h deleted file mode 100644 index 278661bbd1b0..000000000000 --- a/arch/avr32/include/asm/bugs.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * This is included by init/main.c to check for architecture-dependent bugs. | ||
3 | * | ||
4 | * Needs: | ||
5 | * void check_bugs(void); | ||
6 | */ | ||
7 | #ifndef __ASM_AVR32_BUGS_H | ||
8 | #define __ASM_AVR32_BUGS_H | ||
9 | |||
10 | static void __init check_bugs(void) | ||
11 | { | ||
12 | boot_cpu_data.loops_per_jiffy = loops_per_jiffy; | ||
13 | } | ||
14 | |||
15 | #endif /* __ASM_AVR32_BUGS_H */ | ||
diff --git a/arch/avr32/include/asm/cache.h b/arch/avr32/include/asm/cache.h deleted file mode 100644 index c3a58a189a91..000000000000 --- a/arch/avr32/include/asm/cache.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_CACHE_H | ||
2 | #define __ASM_AVR32_CACHE_H | ||
3 | |||
4 | #define L1_CACHE_SHIFT 5 | ||
5 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
6 | |||
7 | /* | ||
8 | * Memory returned by kmalloc() may be used for DMA, so we must make | ||
9 | * sure that all such allocations are cache aligned. Otherwise, | ||
10 | * unrelated code may cause parts of the buffer to be read into the | ||
11 | * cache before the transfer is done, causing old data to be seen by | ||
12 | * the CPU. | ||
13 | */ | ||
14 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES | ||
15 | |||
16 | #ifndef __ASSEMBLER__ | ||
17 | struct cache_info { | ||
18 | unsigned int ways; | ||
19 | unsigned int sets; | ||
20 | unsigned int linesz; | ||
21 | }; | ||
22 | #endif /* __ASSEMBLER */ | ||
23 | |||
24 | /* Cache operation constants */ | ||
25 | #define ICACHE_FLUSH 0x00 | ||
26 | #define ICACHE_INVALIDATE 0x01 | ||
27 | #define ICACHE_LOCK 0x02 | ||
28 | #define ICACHE_UNLOCK 0x03 | ||
29 | #define ICACHE_PREFETCH 0x04 | ||
30 | |||
31 | #define DCACHE_FLUSH 0x08 | ||
32 | #define DCACHE_LOCK 0x09 | ||
33 | #define DCACHE_UNLOCK 0x0a | ||
34 | #define DCACHE_INVALIDATE 0x0b | ||
35 | #define DCACHE_CLEAN 0x0c | ||
36 | #define DCACHE_CLEAN_INVAL 0x0d | ||
37 | |||
38 | #endif /* __ASM_AVR32_CACHE_H */ | ||
diff --git a/arch/avr32/include/asm/cacheflush.h b/arch/avr32/include/asm/cacheflush.h deleted file mode 100644 index 96e53820bbbd..000000000000 --- a/arch/avr32/include/asm/cacheflush.h +++ /dev/null | |||
@@ -1,132 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_CACHEFLUSH_H | ||
9 | #define __ASM_AVR32_CACHEFLUSH_H | ||
10 | |||
11 | /* Keep includes the same across arches. */ | ||
12 | #include <linux/mm.h> | ||
13 | |||
14 | #define CACHE_OP_ICACHE_INVALIDATE 0x01 | ||
15 | #define CACHE_OP_DCACHE_INVALIDATE 0x0b | ||
16 | #define CACHE_OP_DCACHE_CLEAN 0x0c | ||
17 | #define CACHE_OP_DCACHE_CLEAN_INVAL 0x0d | ||
18 | |||
19 | /* | ||
20 | * Invalidate any cacheline containing virtual address vaddr without | ||
21 | * writing anything back to memory. | ||
22 | * | ||
23 | * Note that this function may corrupt unrelated data structures when | ||
24 | * applied on buffers that are not cacheline aligned in both ends. | ||
25 | */ | ||
26 | static inline void invalidate_dcache_line(void *vaddr) | ||
27 | { | ||
28 | asm volatile("cache %0[0], %1" | ||
29 | : | ||
30 | : "r"(vaddr), "n"(CACHE_OP_DCACHE_INVALIDATE) | ||
31 | : "memory"); | ||
32 | } | ||
33 | |||
34 | /* | ||
35 | * Make sure any cacheline containing virtual address vaddr is written | ||
36 | * to memory. | ||
37 | */ | ||
38 | static inline void clean_dcache_line(void *vaddr) | ||
39 | { | ||
40 | asm volatile("cache %0[0], %1" | ||
41 | : | ||
42 | : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN) | ||
43 | : "memory"); | ||
44 | } | ||
45 | |||
46 | /* | ||
47 | * Make sure any cacheline containing virtual address vaddr is written | ||
48 | * to memory and then invalidate it. | ||
49 | */ | ||
50 | static inline void flush_dcache_line(void *vaddr) | ||
51 | { | ||
52 | asm volatile("cache %0[0], %1" | ||
53 | : | ||
54 | : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN_INVAL) | ||
55 | : "memory"); | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * Invalidate any instruction cacheline containing virtual address | ||
60 | * vaddr. | ||
61 | */ | ||
62 | static inline void invalidate_icache_line(void *vaddr) | ||
63 | { | ||
64 | asm volatile("cache %0[0], %1" | ||
65 | : | ||
66 | : "r"(vaddr), "n"(CACHE_OP_ICACHE_INVALIDATE) | ||
67 | : "memory"); | ||
68 | } | ||
69 | |||
70 | /* | ||
71 | * Applies the above functions on all lines that are touched by the | ||
72 | * specified virtual address range. | ||
73 | */ | ||
74 | void invalidate_dcache_region(void *start, size_t len); | ||
75 | void clean_dcache_region(void *start, size_t len); | ||
76 | void flush_dcache_region(void *start, size_t len); | ||
77 | void invalidate_icache_region(void *start, size_t len); | ||
78 | |||
79 | /* | ||
80 | * Make sure any pending writes are completed before continuing. | ||
81 | */ | ||
82 | #define flush_write_buffer() asm volatile("sync 0" : : : "memory") | ||
83 | |||
84 | /* | ||
85 | * The following functions are called when a virtual mapping changes. | ||
86 | * We do not need to flush anything in this case. | ||
87 | */ | ||
88 | #define flush_cache_all() do { } while (0) | ||
89 | #define flush_cache_mm(mm) do { } while (0) | ||
90 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
91 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
92 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
93 | #define flush_cache_vmap(start, end) do { } while (0) | ||
94 | #define flush_cache_vunmap(start, end) do { } while (0) | ||
95 | |||
96 | /* | ||
97 | * I think we need to implement this one to be able to reliably | ||
98 | * execute pages from RAMDISK. However, if we implement the | ||
99 | * flush_dcache_*() functions, it might not be needed anymore. | ||
100 | * | ||
101 | * #define flush_icache_page(vma, page) do { } while (0) | ||
102 | */ | ||
103 | extern void flush_icache_page(struct vm_area_struct *vma, struct page *page); | ||
104 | |||
105 | /* | ||
106 | * These are (I think) related to D-cache aliasing. We might need to | ||
107 | * do something here, but only for certain configurations. No such | ||
108 | * configurations exist at this time. | ||
109 | */ | ||
110 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 | ||
111 | #define flush_dcache_page(page) do { } while (0) | ||
112 | #define flush_dcache_mmap_lock(page) do { } while (0) | ||
113 | #define flush_dcache_mmap_unlock(page) do { } while (0) | ||
114 | |||
115 | /* | ||
116 | * These are for I/D cache coherency. In this case, we do need to | ||
117 | * flush with all configurations. | ||
118 | */ | ||
119 | extern void flush_icache_range(unsigned long start, unsigned long end); | ||
120 | |||
121 | extern void copy_to_user_page(struct vm_area_struct *vma, struct page *page, | ||
122 | unsigned long vaddr, void *dst, const void *src, | ||
123 | unsigned long len); | ||
124 | |||
125 | static inline void copy_from_user_page(struct vm_area_struct *vma, | ||
126 | struct page *page, unsigned long vaddr, void *dst, | ||
127 | const void *src, unsigned long len) | ||
128 | { | ||
129 | memcpy(dst, src, len); | ||
130 | } | ||
131 | |||
132 | #endif /* __ASM_AVR32_CACHEFLUSH_H */ | ||
diff --git a/arch/avr32/include/asm/checksum.h b/arch/avr32/include/asm/checksum.h deleted file mode 100644 index 4ab7d5bdaf53..000000000000 --- a/arch/avr32/include/asm/checksum.h +++ /dev/null | |||
@@ -1,150 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_CHECKSUM_H | ||
9 | #define __ASM_AVR32_CHECKSUM_H | ||
10 | |||
11 | /* | ||
12 | * computes the checksum of a memory block at buff, length len, | ||
13 | * and adds in "sum" (32-bit) | ||
14 | * | ||
15 | * returns a 32-bit number suitable for feeding into itself | ||
16 | * or csum_tcpudp_magic | ||
17 | * | ||
18 | * this function must be called with even lengths, except | ||
19 | * for the last fragment, which may be odd | ||
20 | * | ||
21 | * it's best to have buff aligned on a 32-bit boundary | ||
22 | */ | ||
23 | __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
24 | |||
25 | /* | ||
26 | * the same as csum_partial, but copies from src while it | ||
27 | * checksums, and handles user-space pointer exceptions correctly, when needed. | ||
28 | * | ||
29 | * here even more important to align src and dst on a 32-bit (or even | ||
30 | * better 64-bit) boundary | ||
31 | */ | ||
32 | __wsum csum_partial_copy_generic(const void *src, void *dst, int len, | ||
33 | __wsum sum, int *src_err_ptr, | ||
34 | int *dst_err_ptr); | ||
35 | |||
36 | /* | ||
37 | * Note: when you get a NULL pointer exception here this means someone | ||
38 | * passed in an incorrect kernel address to one of these functions. | ||
39 | * | ||
40 | * If you use these functions directly please don't forget the | ||
41 | * access_ok(). | ||
42 | */ | ||
43 | static inline | ||
44 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, | ||
45 | int len, __wsum sum) | ||
46 | { | ||
47 | return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL); | ||
48 | } | ||
49 | |||
50 | static inline | ||
51 | __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
52 | int len, __wsum sum, int *err_ptr) | ||
53 | { | ||
54 | return csum_partial_copy_generic((const void __force *)src, dst, len, | ||
55 | sum, err_ptr, NULL); | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
60 | * which always checksum on 4 octet boundaries. | ||
61 | */ | ||
62 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
63 | { | ||
64 | unsigned int sum, tmp; | ||
65 | |||
66 | __asm__ __volatile__( | ||
67 | " ld.w %0, %1++\n" | ||
68 | " ld.w %3, %1++\n" | ||
69 | " sub %2, 4\n" | ||
70 | " add %0, %3\n" | ||
71 | " ld.w %3, %1++\n" | ||
72 | " adc %0, %0, %3\n" | ||
73 | " ld.w %3, %1++\n" | ||
74 | " adc %0, %0, %3\n" | ||
75 | " acr %0\n" | ||
76 | "1: ld.w %3, %1++\n" | ||
77 | " add %0, %3\n" | ||
78 | " acr %0\n" | ||
79 | " sub %2, 1\n" | ||
80 | " brne 1b\n" | ||
81 | " lsl %3, %0, 16\n" | ||
82 | " andl %0, 0\n" | ||
83 | " mov %2, 0xffff\n" | ||
84 | " add %0, %3\n" | ||
85 | " adc %0, %0, %2\n" | ||
86 | " com %0\n" | ||
87 | " lsr %0, 16\n" | ||
88 | : "=r"(sum), "=r"(iph), "=r"(ihl), "=r"(tmp) | ||
89 | : "1"(iph), "2"(ihl) | ||
90 | : "memory", "cc"); | ||
91 | return (__force __sum16)sum; | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * Fold a partial checksum | ||
96 | */ | ||
97 | |||
98 | static inline __sum16 csum_fold(__wsum sum) | ||
99 | { | ||
100 | unsigned int tmp; | ||
101 | |||
102 | asm(" bfextu %1, %0, 0, 16\n" | ||
103 | " lsr %0, 16\n" | ||
104 | " add %0, %1\n" | ||
105 | " bfextu %1, %0, 16, 16\n" | ||
106 | " add %0, %1" | ||
107 | : "=&r"(sum), "=&r"(tmp) | ||
108 | : "0"(sum)); | ||
109 | |||
110 | return (__force __sum16)~sum; | ||
111 | } | ||
112 | |||
113 | static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, | ||
114 | __u32 len, __u8 proto, | ||
115 | __wsum sum) | ||
116 | { | ||
117 | asm(" add %0, %1\n" | ||
118 | " adc %0, %0, %2\n" | ||
119 | " adc %0, %0, %3\n" | ||
120 | " acr %0" | ||
121 | : "=r"(sum) | ||
122 | : "r"(daddr), "r"(saddr), "r"(len + proto), | ||
123 | "0"(sum) | ||
124 | : "cc"); | ||
125 | |||
126 | return sum; | ||
127 | } | ||
128 | |||
129 | /* | ||
130 | * computes the checksum of the TCP/UDP pseudo-header | ||
131 | * returns a 16-bit checksum, already complemented | ||
132 | */ | ||
133 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, | ||
134 | __u32 len, __u8 proto, | ||
135 | __wsum sum) | ||
136 | { | ||
137 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | ||
138 | } | ||
139 | |||
140 | /* | ||
141 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
142 | * in icmp.c | ||
143 | */ | ||
144 | |||
145 | static inline __sum16 ip_compute_csum(const void *buff, int len) | ||
146 | { | ||
147 | return csum_fold(csum_partial(buff, len, 0)); | ||
148 | } | ||
149 | |||
150 | #endif /* __ASM_AVR32_CHECKSUM_H */ | ||
diff --git a/arch/avr32/include/asm/cmpxchg.h b/arch/avr32/include/asm/cmpxchg.h deleted file mode 100644 index 572739b4c4b4..000000000000 --- a/arch/avr32/include/asm/cmpxchg.h +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | /* | ||
2 | * Atomic operations that C can't guarantee us. Useful for | ||
3 | * resource counting etc. | ||
4 | * | ||
5 | * But use these as seldom as possible since they are slower than | ||
6 | * regular operations. | ||
7 | * | ||
8 | * Copyright (C) 2004-2006 Atmel Corporation | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | #ifndef __ASM_AVR32_CMPXCHG_H | ||
15 | #define __ASM_AVR32_CMPXCHG_H | ||
16 | |||
17 | #define xchg(ptr,x) \ | ||
18 | ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) | ||
19 | |||
20 | extern void __xchg_called_with_bad_pointer(void); | ||
21 | |||
22 | static inline unsigned long xchg_u32(u32 val, volatile u32 *m) | ||
23 | { | ||
24 | u32 ret; | ||
25 | |||
26 | asm volatile("xchg %[ret], %[m], %[val]" | ||
27 | : [ret] "=&r"(ret), "=m"(*m) | ||
28 | : "m"(*m), [m] "r"(m), [val] "r"(val) | ||
29 | : "memory"); | ||
30 | return ret; | ||
31 | } | ||
32 | |||
33 | static inline unsigned long __xchg(unsigned long x, | ||
34 | volatile void *ptr, | ||
35 | int size) | ||
36 | { | ||
37 | switch(size) { | ||
38 | case 4: | ||
39 | return xchg_u32(x, ptr); | ||
40 | default: | ||
41 | __xchg_called_with_bad_pointer(); | ||
42 | return x; | ||
43 | } | ||
44 | } | ||
45 | |||
46 | static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, | ||
47 | unsigned long new) | ||
48 | { | ||
49 | __u32 ret; | ||
50 | |||
51 | asm volatile( | ||
52 | "1: ssrf 5\n" | ||
53 | " ld.w %[ret], %[m]\n" | ||
54 | " cp.w %[ret], %[old]\n" | ||
55 | " brne 2f\n" | ||
56 | " stcond %[m], %[new]\n" | ||
57 | " brne 1b\n" | ||
58 | "2:\n" | ||
59 | : [ret] "=&r"(ret), [m] "=m"(*m) | ||
60 | : "m"(m), [old] "Ks21r"(old), [new] "r"(new) | ||
61 | : "memory", "cc"); | ||
62 | return ret; | ||
63 | } | ||
64 | |||
65 | extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels( | ||
66 | volatile int * m, unsigned long old, unsigned long new); | ||
67 | #define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels | ||
68 | |||
69 | /* This function doesn't exist, so you'll get a linker error | ||
70 | if something tries to do an invalid cmpxchg(). */ | ||
71 | extern void __cmpxchg_called_with_bad_pointer(void); | ||
72 | |||
73 | static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, | ||
74 | unsigned long new, int size) | ||
75 | { | ||
76 | switch (size) { | ||
77 | case 4: | ||
78 | return __cmpxchg_u32(ptr, old, new); | ||
79 | case 8: | ||
80 | return __cmpxchg_u64(ptr, old, new); | ||
81 | } | ||
82 | |||
83 | __cmpxchg_called_with_bad_pointer(); | ||
84 | return old; | ||
85 | } | ||
86 | |||
87 | #define cmpxchg(ptr, old, new) \ | ||
88 | ((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \ | ||
89 | (unsigned long)(new), \ | ||
90 | sizeof(*(ptr)))) | ||
91 | |||
92 | #include <asm-generic/cmpxchg-local.h> | ||
93 | |||
94 | static inline unsigned long __cmpxchg_local(volatile void *ptr, | ||
95 | unsigned long old, | ||
96 | unsigned long new, int size) | ||
97 | { | ||
98 | switch (size) { | ||
99 | case 4: | ||
100 | return __cmpxchg_u32(ptr, old, new); | ||
101 | default: | ||
102 | return __cmpxchg_local_generic(ptr, old, new, size); | ||
103 | } | ||
104 | |||
105 | return old; | ||
106 | } | ||
107 | |||
108 | #define cmpxchg_local(ptr, old, new) \ | ||
109 | ((typeof(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(old), \ | ||
110 | (unsigned long)(new), \ | ||
111 | sizeof(*(ptr)))) | ||
112 | |||
113 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) | ||
114 | |||
115 | #endif /* __ASM_AVR32_CMPXCHG_H */ | ||
diff --git a/arch/avr32/include/asm/current.h b/arch/avr32/include/asm/current.h deleted file mode 100644 index c7b0549eab8a..000000000000 --- a/arch/avr32/include/asm/current.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_CURRENT_H | ||
2 | #define __ASM_AVR32_CURRENT_H | ||
3 | |||
4 | #include <linux/thread_info.h> | ||
5 | |||
6 | struct task_struct; | ||
7 | |||
8 | inline static struct task_struct * get_current(void) | ||
9 | { | ||
10 | return current_thread_info()->task; | ||
11 | } | ||
12 | |||
13 | #define current get_current() | ||
14 | |||
15 | #endif /* __ASM_AVR32_CURRENT_H */ | ||
diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h deleted file mode 100644 index 7388451f9905..000000000000 --- a/arch/avr32/include/asm/dma-mapping.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_DMA_MAPPING_H | ||
2 | #define __ASM_AVR32_DMA_MAPPING_H | ||
3 | |||
4 | extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
5 | int direction); | ||
6 | |||
7 | extern const struct dma_map_ops avr32_dma_ops; | ||
8 | |||
9 | static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) | ||
10 | { | ||
11 | return &avr32_dma_ops; | ||
12 | } | ||
13 | |||
14 | #endif /* __ASM_AVR32_DMA_MAPPING_H */ | ||
diff --git a/arch/avr32/include/asm/dma.h b/arch/avr32/include/asm/dma.h deleted file mode 100644 index 9e91205590ac..000000000000 --- a/arch/avr32/include/asm/dma.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_DMA_H | ||
2 | #define __ASM_AVR32_DMA_H | ||
3 | |||
4 | /* The maximum address that we can perform a DMA transfer to on this platform. | ||
5 | * Not really applicable to AVR32, but some functions need it. */ | ||
6 | #define MAX_DMA_ADDRESS 0xffffffff | ||
7 | |||
8 | #endif /* __ASM_AVR32_DMA_H */ | ||
diff --git a/arch/avr32/include/asm/elf.h b/arch/avr32/include/asm/elf.h deleted file mode 100644 index 0388ece75b02..000000000000 --- a/arch/avr32/include/asm/elf.h +++ /dev/null | |||
@@ -1,105 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_ELF_H | ||
2 | #define __ASM_AVR32_ELF_H | ||
3 | |||
4 | /* AVR32 relocation numbers */ | ||
5 | #define R_AVR32_NONE 0 | ||
6 | #define R_AVR32_32 1 | ||
7 | #define R_AVR32_16 2 | ||
8 | #define R_AVR32_8 3 | ||
9 | #define R_AVR32_32_PCREL 4 | ||
10 | #define R_AVR32_16_PCREL 5 | ||
11 | #define R_AVR32_8_PCREL 6 | ||
12 | #define R_AVR32_DIFF32 7 | ||
13 | #define R_AVR32_DIFF16 8 | ||
14 | #define R_AVR32_DIFF8 9 | ||
15 | #define R_AVR32_GOT32 10 | ||
16 | #define R_AVR32_GOT16 11 | ||
17 | #define R_AVR32_GOT8 12 | ||
18 | #define R_AVR32_21S 13 | ||
19 | #define R_AVR32_16U 14 | ||
20 | #define R_AVR32_16S 15 | ||
21 | #define R_AVR32_8S 16 | ||
22 | #define R_AVR32_8S_EXT 17 | ||
23 | #define R_AVR32_22H_PCREL 18 | ||
24 | #define R_AVR32_18W_PCREL 19 | ||
25 | #define R_AVR32_16B_PCREL 20 | ||
26 | #define R_AVR32_16N_PCREL 21 | ||
27 | #define R_AVR32_14UW_PCREL 22 | ||
28 | #define R_AVR32_11H_PCREL 23 | ||
29 | #define R_AVR32_10UW_PCREL 24 | ||
30 | #define R_AVR32_9H_PCREL 25 | ||
31 | #define R_AVR32_9UW_PCREL 26 | ||
32 | #define R_AVR32_HI16 27 | ||
33 | #define R_AVR32_LO16 28 | ||
34 | #define R_AVR32_GOTPC 29 | ||
35 | #define R_AVR32_GOTCALL 30 | ||
36 | #define R_AVR32_LDA_GOT 31 | ||
37 | #define R_AVR32_GOT21S 32 | ||
38 | #define R_AVR32_GOT18SW 33 | ||
39 | #define R_AVR32_GOT16S 34 | ||
40 | #define R_AVR32_GOT7UW 35 | ||
41 | #define R_AVR32_32_CPENT 36 | ||
42 | #define R_AVR32_CPCALL 37 | ||
43 | #define R_AVR32_16_CP 38 | ||
44 | #define R_AVR32_9W_CP 39 | ||
45 | #define R_AVR32_RELATIVE 40 | ||
46 | #define R_AVR32_GLOB_DAT 41 | ||
47 | #define R_AVR32_JMP_SLOT 42 | ||
48 | #define R_AVR32_ALIGN 43 | ||
49 | |||
50 | /* | ||
51 | * ELF register definitions.. | ||
52 | */ | ||
53 | |||
54 | #include <asm/ptrace.h> | ||
55 | #include <asm/user.h> | ||
56 | |||
57 | typedef unsigned long elf_greg_t; | ||
58 | |||
59 | #define ELF_NGREG (sizeof (struct pt_regs) / sizeof (elf_greg_t)) | ||
60 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
61 | |||
62 | typedef struct user_fpu_struct elf_fpregset_t; | ||
63 | |||
64 | /* | ||
65 | * This is used to ensure we don't load something for the wrong architecture. | ||
66 | */ | ||
67 | #define elf_check_arch(x) ( (x)->e_machine == EM_AVR32 ) | ||
68 | |||
69 | /* | ||
70 | * These are used to set parameters in the core dumps. | ||
71 | */ | ||
72 | #define ELF_CLASS ELFCLASS32 | ||
73 | #ifdef __LITTLE_ENDIAN__ | ||
74 | #define ELF_DATA ELFDATA2LSB | ||
75 | #else | ||
76 | #define ELF_DATA ELFDATA2MSB | ||
77 | #endif | ||
78 | #define ELF_ARCH EM_AVR32 | ||
79 | |||
80 | #define ELF_EXEC_PAGESIZE 4096 | ||
81 | |||
82 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | ||
83 | use of this is to invoke "./ld.so someprog" to test out a new version of | ||
84 | the loader. We need to make sure that it is out of the way of the program | ||
85 | that it will "exec", and that there is sufficient room for the brk. */ | ||
86 | |||
87 | #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) | ||
88 | |||
89 | |||
90 | /* This yields a mask that user programs can use to figure out what | ||
91 | instruction set this CPU supports. This could be done in user space, | ||
92 | but it's not easy, and we've already done it here. */ | ||
93 | |||
94 | #define ELF_HWCAP (0) | ||
95 | |||
96 | /* This yields a string that ld.so will use to load implementation | ||
97 | specific libraries for optimization. This is more specific in | ||
98 | intent than poking at uname or /proc/cpuinfo. | ||
99 | |||
100 | For the moment, we have only optimizations for the Intel generations, | ||
101 | but that could change... */ | ||
102 | |||
103 | #define ELF_PLATFORM (NULL) | ||
104 | |||
105 | #endif /* __ASM_AVR32_ELF_H */ | ||
diff --git a/arch/avr32/include/asm/fb.h b/arch/avr32/include/asm/fb.h deleted file mode 100644 index 41baf84ad402..000000000000 --- a/arch/avr32/include/asm/fb.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef _ASM_FB_H_ | ||
2 | #define _ASM_FB_H_ | ||
3 | |||
4 | #include <linux/fb.h> | ||
5 | #include <linux/fs.h> | ||
6 | #include <asm/page.h> | ||
7 | |||
8 | static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, | ||
9 | unsigned long off) | ||
10 | { | ||
11 | vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot) | ||
12 | & ~_PAGE_CACHABLE) | ||
13 | | (_PAGE_BUFFER | _PAGE_DIRTY)); | ||
14 | } | ||
15 | |||
16 | static inline int fb_is_primary_device(struct fb_info *info) | ||
17 | { | ||
18 | return 0; | ||
19 | } | ||
20 | |||
21 | #endif /* _ASM_FB_H_ */ | ||
diff --git a/arch/avr32/include/asm/ftrace.h b/arch/avr32/include/asm/ftrace.h deleted file mode 100644 index 40a8c178f10d..000000000000 --- a/arch/avr32/include/asm/ftrace.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* empty */ | ||
diff --git a/arch/avr32/include/asm/gpio.h b/arch/avr32/include/asm/gpio.h deleted file mode 100644 index b771f7105964..000000000000 --- a/arch/avr32/include/asm/gpio.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_GPIO_H | ||
2 | #define __ASM_AVR32_GPIO_H | ||
3 | |||
4 | #include <mach/gpio.h> | ||
5 | |||
6 | #endif /* __ASM_AVR32_GPIO_H */ | ||
diff --git a/arch/avr32/include/asm/hardirq.h b/arch/avr32/include/asm/hardirq.h deleted file mode 100644 index 9e36e3ff77d2..000000000000 --- a/arch/avr32/include/asm/hardirq.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_HARDIRQ_H | ||
2 | #define __ASM_AVR32_HARDIRQ_H | ||
3 | #ifndef __ASSEMBLY__ | ||
4 | #include <asm-generic/hardirq.h> | ||
5 | #endif /* __ASSEMBLY__ */ | ||
6 | #endif /* __ASM_AVR32_HARDIRQ_H */ | ||
diff --git a/arch/avr32/include/asm/hw_irq.h b/arch/avr32/include/asm/hw_irq.h deleted file mode 100644 index a36f9fcb8fcd..000000000000 --- a/arch/avr32/include/asm/hw_irq.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_HW_IRQ_H | ||
2 | #define __ASM_AVR32_HW_IRQ_H | ||
3 | |||
4 | static inline void hw_resend_irq(struct irq_chip *h, unsigned int i) | ||
5 | { | ||
6 | /* Nothing to do */ | ||
7 | } | ||
8 | |||
9 | #endif /* __ASM_AVR32_HW_IRQ_H */ | ||
diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h deleted file mode 100644 index f855646e0db7..000000000000 --- a/arch/avr32/include/asm/io.h +++ /dev/null | |||
@@ -1,329 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_IO_H | ||
2 | #define __ASM_AVR32_IO_H | ||
3 | |||
4 | #include <linux/bug.h> | ||
5 | #include <linux/kernel.h> | ||
6 | #include <linux/string.h> | ||
7 | #include <linux/types.h> | ||
8 | |||
9 | #include <asm/addrspace.h> | ||
10 | #include <asm/byteorder.h> | ||
11 | |||
12 | #include <mach/io.h> | ||
13 | |||
14 | /* virt_to_phys will only work when address is in P1 or P2 */ | ||
15 | static __inline__ unsigned long virt_to_phys(volatile void *address) | ||
16 | { | ||
17 | return PHYSADDR(address); | ||
18 | } | ||
19 | |||
20 | static __inline__ void * phys_to_virt(unsigned long address) | ||
21 | { | ||
22 | return (void *)P1SEGADDR(address); | ||
23 | } | ||
24 | |||
25 | #define cached_to_phys(addr) ((unsigned long)PHYSADDR(addr)) | ||
26 | #define uncached_to_phys(addr) ((unsigned long)PHYSADDR(addr)) | ||
27 | #define phys_to_cached(addr) ((void *)P1SEGADDR(addr)) | ||
28 | #define phys_to_uncached(addr) ((void *)P2SEGADDR(addr)) | ||
29 | |||
30 | /* | ||
31 | * Generic IO read/write. These perform native-endian accesses. Note | ||
32 | * that some architectures will want to re-define __raw_{read,write}w. | ||
33 | */ | ||
34 | extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen); | ||
35 | extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); | ||
36 | extern void __raw_writesl(void __iomem *addr, const void *data, int longlen); | ||
37 | |||
38 | extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen); | ||
39 | extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); | ||
40 | extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); | ||
41 | |||
42 | static inline void __raw_writeb(u8 v, volatile void __iomem *addr) | ||
43 | { | ||
44 | *(volatile u8 __force *)addr = v; | ||
45 | } | ||
46 | static inline void __raw_writew(u16 v, volatile void __iomem *addr) | ||
47 | { | ||
48 | *(volatile u16 __force *)addr = v; | ||
49 | } | ||
50 | static inline void __raw_writel(u32 v, volatile void __iomem *addr) | ||
51 | { | ||
52 | *(volatile u32 __force *)addr = v; | ||
53 | } | ||
54 | |||
55 | static inline u8 __raw_readb(const volatile void __iomem *addr) | ||
56 | { | ||
57 | return *(const volatile u8 __force *)addr; | ||
58 | } | ||
59 | static inline u16 __raw_readw(const volatile void __iomem *addr) | ||
60 | { | ||
61 | return *(const volatile u16 __force *)addr; | ||
62 | } | ||
63 | static inline u32 __raw_readl(const volatile void __iomem *addr) | ||
64 | { | ||
65 | return *(const volatile u32 __force *)addr; | ||
66 | } | ||
67 | |||
68 | /* Convert I/O port address to virtual address */ | ||
69 | #ifndef __io | ||
70 | # define __io(p) ((void *)phys_to_uncached(p)) | ||
71 | #endif | ||
72 | |||
73 | /* | ||
74 | * Not really sure about the best way to slow down I/O on | ||
75 | * AVR32. Defining it as a no-op until we have an actual test case. | ||
76 | */ | ||
77 | #define SLOW_DOWN_IO do { } while (0) | ||
78 | |||
79 | #define __BUILD_MEMORY_SINGLE(pfx, bwl, type) \ | ||
80 | static inline void \ | ||
81 | pfx##write##bwl(type val, volatile void __iomem *addr) \ | ||
82 | { \ | ||
83 | volatile type *__addr; \ | ||
84 | type __val; \ | ||
85 | \ | ||
86 | __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \ | ||
87 | __val = pfx##ioswab##bwl(__addr, val); \ | ||
88 | \ | ||
89 | BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ | ||
90 | \ | ||
91 | *__addr = __val; \ | ||
92 | } \ | ||
93 | \ | ||
94 | static inline type pfx##read##bwl(const volatile void __iomem *addr) \ | ||
95 | { \ | ||
96 | volatile type *__addr; \ | ||
97 | type __val; \ | ||
98 | \ | ||
99 | __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \ | ||
100 | \ | ||
101 | BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ | ||
102 | \ | ||
103 | __val = *__addr; \ | ||
104 | return pfx##ioswab##bwl(__addr, __val); \ | ||
105 | } | ||
106 | |||
107 | #define __BUILD_IOPORT_SINGLE(pfx, bwl, type, p, slow) \ | ||
108 | static inline void pfx##out##bwl##p(type val, unsigned long port) \ | ||
109 | { \ | ||
110 | volatile type *__addr; \ | ||
111 | type __val; \ | ||
112 | \ | ||
113 | __addr = __io(__swizzle_addr_##bwl(port)); \ | ||
114 | __val = pfx##ioswab##bwl(__addr, val); \ | ||
115 | \ | ||
116 | BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ | ||
117 | \ | ||
118 | *__addr = __val; \ | ||
119 | slow; \ | ||
120 | } \ | ||
121 | \ | ||
122 | static inline type pfx##in##bwl##p(unsigned long port) \ | ||
123 | { \ | ||
124 | volatile type *__addr; \ | ||
125 | type __val; \ | ||
126 | \ | ||
127 | __addr = __io(__swizzle_addr_##bwl(port)); \ | ||
128 | \ | ||
129 | BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ | ||
130 | \ | ||
131 | __val = *__addr; \ | ||
132 | slow; \ | ||
133 | \ | ||
134 | return pfx##ioswab##bwl(__addr, __val); \ | ||
135 | } | ||
136 | |||
137 | #define __BUILD_MEMORY_PFX(bus, bwl, type) \ | ||
138 | __BUILD_MEMORY_SINGLE(bus, bwl, type) | ||
139 | |||
140 | #define BUILDIO_MEM(bwl, type) \ | ||
141 | __BUILD_MEMORY_PFX(, bwl, type) \ | ||
142 | __BUILD_MEMORY_PFX(__mem_, bwl, type) | ||
143 | |||
144 | #define __BUILD_IOPORT_PFX(bus, bwl, type) \ | ||
145 | __BUILD_IOPORT_SINGLE(bus, bwl, type, ,) \ | ||
146 | __BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO) | ||
147 | |||
148 | #define BUILDIO_IOPORT(bwl, type) \ | ||
149 | __BUILD_IOPORT_PFX(, bwl, type) \ | ||
150 | __BUILD_IOPORT_PFX(__mem_, bwl, type) | ||
151 | |||
152 | BUILDIO_MEM(b, u8) | ||
153 | BUILDIO_MEM(w, u16) | ||
154 | BUILDIO_MEM(l, u32) | ||
155 | |||
156 | BUILDIO_IOPORT(b, u8) | ||
157 | BUILDIO_IOPORT(w, u16) | ||
158 | BUILDIO_IOPORT(l, u32) | ||
159 | |||
160 | #define readb_relaxed readb | ||
161 | #define readw_relaxed readw | ||
162 | #define readl_relaxed readl | ||
163 | |||
164 | #define readb_be __raw_readb | ||
165 | #define readw_be __raw_readw | ||
166 | #define readl_be __raw_readl | ||
167 | |||
168 | #define writeb_relaxed writeb | ||
169 | #define writew_relaxed writew | ||
170 | #define writel_relaxed writel | ||
171 | |||
172 | #define writeb_be __raw_writeb | ||
173 | #define writew_be __raw_writew | ||
174 | #define writel_be __raw_writel | ||
175 | |||
176 | #define __BUILD_MEMORY_STRING(bwl, type) \ | ||
177 | static inline void writes##bwl(volatile void __iomem *addr, \ | ||
178 | const void *data, unsigned int count) \ | ||
179 | { \ | ||
180 | const type *__data = data; \ | ||
181 | \ | ||
182 | while (count--) \ | ||
183 | __mem_write##bwl(*__data++, addr); \ | ||
184 | } \ | ||
185 | \ | ||
186 | static inline void reads##bwl(const volatile void __iomem *addr, \ | ||
187 | void *data, unsigned int count) \ | ||
188 | { \ | ||
189 | type *__data = data; \ | ||
190 | \ | ||
191 | while (count--) \ | ||
192 | *__data++ = __mem_read##bwl(addr); \ | ||
193 | } | ||
194 | |||
195 | #define __BUILD_IOPORT_STRING(bwl, type) \ | ||
196 | static inline void outs##bwl(unsigned long port, const void *data, \ | ||
197 | unsigned int count) \ | ||
198 | { \ | ||
199 | const type *__data = data; \ | ||
200 | \ | ||
201 | while (count--) \ | ||
202 | __mem_out##bwl(*__data++, port); \ | ||
203 | } \ | ||
204 | \ | ||
205 | static inline void ins##bwl(unsigned long port, void *data, \ | ||
206 | unsigned int count) \ | ||
207 | { \ | ||
208 | type *__data = data; \ | ||
209 | \ | ||
210 | while (count--) \ | ||
211 | *__data++ = __mem_in##bwl(port); \ | ||
212 | } | ||
213 | |||
214 | #define BUILDSTRING(bwl, type) \ | ||
215 | __BUILD_MEMORY_STRING(bwl, type) \ | ||
216 | __BUILD_IOPORT_STRING(bwl, type) | ||
217 | |||
218 | BUILDSTRING(b, u8) | ||
219 | BUILDSTRING(w, u16) | ||
220 | BUILDSTRING(l, u32) | ||
221 | |||
222 | /* | ||
223 | * io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be | ||
224 | */ | ||
225 | #ifndef ioread8 | ||
226 | |||
227 | #define ioread8(p) ((unsigned int)readb(p)) | ||
228 | |||
229 | #define ioread16(p) ((unsigned int)readw(p)) | ||
230 | #define ioread16be(p) ((unsigned int)__raw_readw(p)) | ||
231 | |||
232 | #define ioread32(p) ((unsigned int)readl(p)) | ||
233 | #define ioread32be(p) ((unsigned int)__raw_readl(p)) | ||
234 | |||
235 | #define iowrite8(v,p) writeb(v, p) | ||
236 | |||
237 | #define iowrite16(v,p) writew(v, p) | ||
238 | #define iowrite16be(v,p) __raw_writew(v, p) | ||
239 | |||
240 | #define iowrite32(v,p) writel(v, p) | ||
241 | #define iowrite32be(v,p) __raw_writel(v, p) | ||
242 | |||
243 | #define ioread8_rep(p,d,c) readsb(p,d,c) | ||
244 | #define ioread16_rep(p,d,c) readsw(p,d,c) | ||
245 | #define ioread32_rep(p,d,c) readsl(p,d,c) | ||
246 | |||
247 | #define iowrite8_rep(p,s,c) writesb(p,s,c) | ||
248 | #define iowrite16_rep(p,s,c) writesw(p,s,c) | ||
249 | #define iowrite32_rep(p,s,c) writesl(p,s,c) | ||
250 | |||
251 | #endif | ||
252 | |||
253 | static inline void memcpy_fromio(void * to, const volatile void __iomem *from, | ||
254 | unsigned long count) | ||
255 | { | ||
256 | memcpy(to, (const void __force *)from, count); | ||
257 | } | ||
258 | |||
259 | static inline void memcpy_toio(volatile void __iomem *to, const void * from, | ||
260 | unsigned long count) | ||
261 | { | ||
262 | memcpy((void __force *)to, from, count); | ||
263 | } | ||
264 | |||
265 | static inline void memset_io(volatile void __iomem *addr, unsigned char val, | ||
266 | unsigned long count) | ||
267 | { | ||
268 | memset((void __force *)addr, val, count); | ||
269 | } | ||
270 | |||
271 | #define mmiowb() | ||
272 | |||
273 | #define IO_SPACE_LIMIT 0xffffffff | ||
274 | |||
275 | extern void __iomem *__ioremap(unsigned long offset, size_t size, | ||
276 | unsigned long flags); | ||
277 | extern void __iounmap(void __iomem *addr); | ||
278 | |||
279 | /* | ||
280 | * ioremap - map bus memory into CPU space | ||
281 | * @offset bus address of the memory | ||
282 | * @size size of the resource to map | ||
283 | * | ||
284 | * ioremap performs a platform specific sequence of operations to make | ||
285 | * bus memory CPU accessible via the readb/.../writel functions and | ||
286 | * the other mmio helpers. The returned address is not guaranteed to | ||
287 | * be usable directly as a virtual address. | ||
288 | */ | ||
289 | #define ioremap(offset, size) \ | ||
290 | __ioremap((offset), (size), 0) | ||
291 | |||
292 | #define ioremap_nocache(offset, size) \ | ||
293 | __ioremap((offset), (size), 0) | ||
294 | |||
295 | #define iounmap(addr) \ | ||
296 | __iounmap(addr) | ||
297 | |||
298 | #define ioremap_wc ioremap_nocache | ||
299 | #define ioremap_wt ioremap_nocache | ||
300 | #define ioremap_uc ioremap_nocache | ||
301 | |||
302 | #define cached(addr) P1SEGADDR(addr) | ||
303 | #define uncached(addr) P2SEGADDR(addr) | ||
304 | |||
305 | #define virt_to_bus virt_to_phys | ||
306 | #define bus_to_virt phys_to_virt | ||
307 | #define page_to_bus page_to_phys | ||
308 | #define bus_to_page phys_to_page | ||
309 | |||
310 | /* | ||
311 | * Create a virtual mapping cookie for an IO port range. There exists | ||
312 | * no such thing as port-based I/O on AVR32, so a regular ioremap() | ||
313 | * should do what we need. | ||
314 | */ | ||
315 | #define ioport_map(port, nr) ioremap(port, nr) | ||
316 | #define ioport_unmap(port) iounmap(port) | ||
317 | |||
318 | /* | ||
319 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
320 | * access | ||
321 | */ | ||
322 | #define xlate_dev_mem_ptr(p) __va(p) | ||
323 | |||
324 | /* | ||
325 | * Convert a virtual cached pointer to an uncached pointer | ||
326 | */ | ||
327 | #define xlate_dev_kmem_ptr(p) p | ||
328 | |||
329 | #endif /* __ASM_AVR32_IO_H */ | ||
diff --git a/arch/avr32/include/asm/irq.h b/arch/avr32/include/asm/irq.h deleted file mode 100644 index 6fa8913f8548..000000000000 --- a/arch/avr32/include/asm/irq.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_IRQ_H | ||
2 | #define __ASM_AVR32_IRQ_H | ||
3 | |||
4 | #define NR_INTERNAL_IRQS 64 | ||
5 | |||
6 | #include <mach/irq.h> | ||
7 | |||
8 | #ifndef NR_IRQS | ||
9 | #define NR_IRQS (NR_INTERNAL_IRQS) | ||
10 | #endif | ||
11 | |||
12 | #define irq_canonicalize(i) (i) | ||
13 | |||
14 | #ifndef __ASSEMBLER__ | ||
15 | int nmi_enable(void); | ||
16 | void nmi_disable(void); | ||
17 | |||
18 | /* | ||
19 | * Returns a bitmask of pending interrupts in a group. | ||
20 | */ | ||
21 | extern unsigned long intc_get_pending(unsigned int group); | ||
22 | #endif | ||
23 | |||
24 | #endif /* __ASM_AVR32_IOCTLS_H */ | ||
diff --git a/arch/avr32/include/asm/irqflags.h b/arch/avr32/include/asm/irqflags.h deleted file mode 100644 index 006e9487372d..000000000000 --- a/arch/avr32/include/asm/irqflags.h +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_IRQFLAGS_H | ||
9 | #define __ASM_AVR32_IRQFLAGS_H | ||
10 | |||
11 | #include <linux/types.h> | ||
12 | #include <asm/sysreg.h> | ||
13 | |||
14 | static inline unsigned long arch_local_save_flags(void) | ||
15 | { | ||
16 | return sysreg_read(SR); | ||
17 | } | ||
18 | |||
19 | /* | ||
20 | * This will restore ALL status register flags, not only the interrupt | ||
21 | * mask flag. | ||
22 | * | ||
23 | * The empty asm statement informs the compiler of this fact while | ||
24 | * also serving as a barrier. | ||
25 | */ | ||
26 | static inline void arch_local_irq_restore(unsigned long flags) | ||
27 | { | ||
28 | sysreg_write(SR, flags); | ||
29 | asm volatile("" : : : "memory", "cc"); | ||
30 | } | ||
31 | |||
32 | static inline void arch_local_irq_disable(void) | ||
33 | { | ||
34 | asm volatile("ssrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory"); | ||
35 | } | ||
36 | |||
37 | static inline void arch_local_irq_enable(void) | ||
38 | { | ||
39 | asm volatile("csrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory"); | ||
40 | } | ||
41 | |||
42 | static inline bool arch_irqs_disabled_flags(unsigned long flags) | ||
43 | { | ||
44 | return (flags & SYSREG_BIT(GM)) != 0; | ||
45 | } | ||
46 | |||
47 | static inline bool arch_irqs_disabled(void) | ||
48 | { | ||
49 | return arch_irqs_disabled_flags(arch_local_save_flags()); | ||
50 | } | ||
51 | |||
52 | static inline unsigned long arch_local_irq_save(void) | ||
53 | { | ||
54 | unsigned long flags = arch_local_save_flags(); | ||
55 | |||
56 | arch_local_irq_disable(); | ||
57 | |||
58 | return flags; | ||
59 | } | ||
60 | |||
61 | #endif /* __ASM_AVR32_IRQFLAGS_H */ | ||
diff --git a/arch/avr32/include/asm/kdebug.h b/arch/avr32/include/asm/kdebug.h deleted file mode 100644 index f930ce286803..000000000000 --- a/arch/avr32/include/asm/kdebug.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_KDEBUG_H | ||
2 | #define __ASM_AVR32_KDEBUG_H | ||
3 | |||
4 | /* Grossly misnamed. */ | ||
5 | enum die_val { | ||
6 | DIE_BREAKPOINT, | ||
7 | DIE_SSTEP, | ||
8 | DIE_NMI, | ||
9 | DIE_OOPS, | ||
10 | }; | ||
11 | |||
12 | #endif /* __ASM_AVR32_KDEBUG_H */ | ||
diff --git a/arch/avr32/include/asm/kmap_types.h b/arch/avr32/include/asm/kmap_types.h deleted file mode 100644 index 479330b89796..000000000000 --- a/arch/avr32/include/asm/kmap_types.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_KMAP_TYPES_H | ||
2 | #define __ASM_AVR32_KMAP_TYPES_H | ||
3 | |||
4 | #ifdef CONFIG_DEBUG_HIGHMEM | ||
5 | # define KM_TYPE_NR 29 | ||
6 | #else | ||
7 | # define KM_TYPE_NR 14 | ||
8 | #endif | ||
9 | |||
10 | #endif /* __ASM_AVR32_KMAP_TYPES_H */ | ||
diff --git a/arch/avr32/include/asm/kprobes.h b/arch/avr32/include/asm/kprobes.h deleted file mode 100644 index 28dfc61ad384..000000000000 --- a/arch/avr32/include/asm/kprobes.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* | ||
2 | * Kernel Probes (KProbes) | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Atmel Corporation | ||
5 | * Copyright (C) IBM Corporation, 2002, 2004 | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_AVR32_KPROBES_H | ||
12 | #define __ASM_AVR32_KPROBES_H | ||
13 | |||
14 | #include <asm-generic/kprobes.h> | ||
15 | |||
16 | #define BREAKPOINT_INSTRUCTION 0xd673 /* breakpoint */ | ||
17 | |||
18 | #ifdef CONFIG_KPROBES | ||
19 | #include <linux/types.h> | ||
20 | |||
21 | typedef u16 kprobe_opcode_t; | ||
22 | #define MAX_INSN_SIZE 2 | ||
23 | #define MAX_STACK_SIZE 64 /* 32 would probably be OK */ | ||
24 | |||
25 | #define kretprobe_blacklist_size 0 | ||
26 | |||
27 | #define arch_remove_kprobe(p) do { } while (0) | ||
28 | |||
29 | /* Architecture specific copy of original instruction */ | ||
30 | struct arch_specific_insn { | ||
31 | kprobe_opcode_t insn[MAX_INSN_SIZE]; | ||
32 | }; | ||
33 | |||
34 | struct prev_kprobe { | ||
35 | struct kprobe *kp; | ||
36 | unsigned int status; | ||
37 | }; | ||
38 | |||
39 | /* per-cpu kprobe control block */ | ||
40 | struct kprobe_ctlblk { | ||
41 | unsigned int kprobe_status; | ||
42 | struct prev_kprobe prev_kprobe; | ||
43 | struct pt_regs jprobe_saved_regs; | ||
44 | char jprobes_stack[MAX_STACK_SIZE]; | ||
45 | }; | ||
46 | |||
47 | extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr); | ||
48 | extern int kprobe_exceptions_notify(struct notifier_block *self, | ||
49 | unsigned long val, void *data); | ||
50 | |||
51 | #define flush_insn_slot(p) do { } while (0) | ||
52 | |||
53 | #endif /* CONFIG_KPROBES */ | ||
54 | #endif /* __ASM_AVR32_KPROBES_H */ | ||
diff --git a/arch/avr32/include/asm/linkage.h b/arch/avr32/include/asm/linkage.h deleted file mode 100644 index f7b285e910d4..000000000000 --- a/arch/avr32/include/asm/linkage.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __ASM_LINKAGE_H | ||
2 | #define __ASM_LINKAGE_H | ||
3 | |||
4 | #define __ALIGN .balign 2 | ||
5 | #define __ALIGN_STR ".balign 2" | ||
6 | |||
7 | #endif /* __ASM_LINKAGE_H */ | ||
diff --git a/arch/avr32/include/asm/mmu.h b/arch/avr32/include/asm/mmu.h deleted file mode 100644 index 60c2d2650d32..000000000000 --- a/arch/avr32/include/asm/mmu.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_MMU_H | ||
2 | #define __ASM_AVR32_MMU_H | ||
3 | |||
4 | /* Default "unsigned long" context */ | ||
5 | typedef unsigned long mm_context_t; | ||
6 | |||
7 | #define MMU_ITLB_ENTRIES 64 | ||
8 | #define MMU_DTLB_ENTRIES 64 | ||
9 | |||
10 | #endif /* __ASM_AVR32_MMU_H */ | ||
diff --git a/arch/avr32/include/asm/mmu_context.h b/arch/avr32/include/asm/mmu_context.h deleted file mode 100644 index cd87abba8db7..000000000000 --- a/arch/avr32/include/asm/mmu_context.h +++ /dev/null | |||
@@ -1,150 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * ASID handling taken from SH implementation. | ||
5 | * Copyright (C) 1999 Niibe Yutaka | ||
6 | * Copyright (C) 2003 Paul Mundt | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #ifndef __ASM_AVR32_MMU_CONTEXT_H | ||
13 | #define __ASM_AVR32_MMU_CONTEXT_H | ||
14 | |||
15 | #include <linux/mm_types.h> | ||
16 | |||
17 | #include <asm/tlbflush.h> | ||
18 | #include <asm/sysreg.h> | ||
19 | #include <asm-generic/mm_hooks.h> | ||
20 | |||
21 | /* | ||
22 | * The MMU "context" consists of two things: | ||
23 | * (a) TLB cache version | ||
24 | * (b) ASID (Address Space IDentifier) | ||
25 | */ | ||
26 | #define MMU_CONTEXT_ASID_MASK 0x000000ff | ||
27 | #define MMU_CONTEXT_VERSION_MASK 0xffffff00 | ||
28 | #define MMU_CONTEXT_FIRST_VERSION 0x00000100 | ||
29 | #define NO_CONTEXT 0 | ||
30 | |||
31 | #define MMU_NO_ASID 0x100 | ||
32 | |||
33 | /* Virtual Page Number mask */ | ||
34 | #define MMU_VPN_MASK 0xfffff000 | ||
35 | |||
36 | /* Cache of MMU context last used */ | ||
37 | extern unsigned long mmu_context_cache; | ||
38 | |||
39 | /* | ||
40 | * Get MMU context if needed | ||
41 | */ | ||
42 | static inline void | ||
43 | get_mmu_context(struct mm_struct *mm) | ||
44 | { | ||
45 | unsigned long mc = mmu_context_cache; | ||
46 | |||
47 | if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0) | ||
48 | /* It's up to date, do nothing */ | ||
49 | return; | ||
50 | |||
51 | /* It's old, we need to get new context with new version */ | ||
52 | mc = ++mmu_context_cache; | ||
53 | if (!(mc & MMU_CONTEXT_ASID_MASK)) { | ||
54 | /* | ||
55 | * We have exhausted all ASIDs of this version. | ||
56 | * Flush the TLB and start new cycle. | ||
57 | */ | ||
58 | flush_tlb_all(); | ||
59 | /* | ||
60 | * Fix version. Note that we avoid version #0 | ||
61 | * to distinguish NO_CONTEXT. | ||
62 | */ | ||
63 | if (!mc) | ||
64 | mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; | ||
65 | } | ||
66 | mm->context = mc; | ||
67 | } | ||
68 | |||
69 | /* | ||
70 | * Initialize the context related info for a new mm_struct | ||
71 | * instance. | ||
72 | */ | ||
73 | static inline int init_new_context(struct task_struct *tsk, | ||
74 | struct mm_struct *mm) | ||
75 | { | ||
76 | mm->context = NO_CONTEXT; | ||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * Destroy context related info for an mm_struct that is about | ||
82 | * to be put to rest. | ||
83 | */ | ||
84 | static inline void destroy_context(struct mm_struct *mm) | ||
85 | { | ||
86 | /* Do nothing */ | ||
87 | } | ||
88 | |||
89 | static inline void set_asid(unsigned long asid) | ||
90 | { | ||
91 | /* XXX: We're destroying TLBEHI[8:31] */ | ||
92 | sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK); | ||
93 | cpu_sync_pipeline(); | ||
94 | } | ||
95 | |||
96 | static inline unsigned long get_asid(void) | ||
97 | { | ||
98 | unsigned long asid; | ||
99 | |||
100 | asid = sysreg_read(TLBEHI); | ||
101 | return asid & MMU_CONTEXT_ASID_MASK; | ||
102 | } | ||
103 | |||
104 | static inline void activate_context(struct mm_struct *mm) | ||
105 | { | ||
106 | get_mmu_context(mm); | ||
107 | set_asid(mm->context & MMU_CONTEXT_ASID_MASK); | ||
108 | } | ||
109 | |||
110 | static inline void switch_mm(struct mm_struct *prev, | ||
111 | struct mm_struct *next, | ||
112 | struct task_struct *tsk) | ||
113 | { | ||
114 | if (likely(prev != next)) { | ||
115 | unsigned long __pgdir = (unsigned long)next->pgd; | ||
116 | |||
117 | sysreg_write(PTBR, __pgdir); | ||
118 | activate_context(next); | ||
119 | } | ||
120 | } | ||
121 | |||
122 | #define deactivate_mm(tsk,mm) do { } while(0) | ||
123 | |||
124 | #define activate_mm(prev, next) switch_mm((prev), (next), NULL) | ||
125 | |||
126 | static inline void | ||
127 | enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | ||
128 | { | ||
129 | } | ||
130 | |||
131 | |||
132 | static inline void enable_mmu(void) | ||
133 | { | ||
134 | sysreg_write(MMUCR, (SYSREG_BIT(MMUCR_S) | ||
135 | | SYSREG_BIT(E) | ||
136 | | SYSREG_BIT(MMUCR_I))); | ||
137 | nop(); nop(); nop(); nop(); nop(); nop(); nop(); nop(); | ||
138 | |||
139 | if (mmu_context_cache == NO_CONTEXT) | ||
140 | mmu_context_cache = MMU_CONTEXT_FIRST_VERSION; | ||
141 | |||
142 | set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK); | ||
143 | } | ||
144 | |||
145 | static inline void disable_mmu(void) | ||
146 | { | ||
147 | sysreg_write(MMUCR, SYSREG_BIT(MMUCR_S)); | ||
148 | } | ||
149 | |||
150 | #endif /* __ASM_AVR32_MMU_CONTEXT_H */ | ||
diff --git a/arch/avr32/include/asm/module.h b/arch/avr32/include/asm/module.h deleted file mode 100644 index 3f083d385a64..000000000000 --- a/arch/avr32/include/asm/module.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_MODULE_H | ||
2 | #define __ASM_AVR32_MODULE_H | ||
3 | |||
4 | #include <asm-generic/module.h> | ||
5 | |||
6 | struct mod_arch_syminfo { | ||
7 | unsigned long got_offset; | ||
8 | int got_initialized; | ||
9 | }; | ||
10 | |||
11 | struct mod_arch_specific { | ||
12 | /* Starting offset of got in the module core memory. */ | ||
13 | unsigned long got_offset; | ||
14 | /* Size of the got. */ | ||
15 | unsigned long got_size; | ||
16 | /* Number of symbols in syminfo. */ | ||
17 | int nsyms; | ||
18 | /* Additional symbol information (got offsets). */ | ||
19 | struct mod_arch_syminfo *syminfo; | ||
20 | }; | ||
21 | |||
22 | #define MODULE_PROC_FAMILY "AVR32v1" | ||
23 | |||
24 | #define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | ||
25 | |||
26 | #endif /* __ASM_AVR32_MODULE_H */ | ||
diff --git a/arch/avr32/include/asm/ocd.h b/arch/avr32/include/asm/ocd.h deleted file mode 100644 index 6bef09490235..000000000000 --- a/arch/avr32/include/asm/ocd.h +++ /dev/null | |||
@@ -1,543 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 OCD Interface and register definitions | ||
3 | * | ||
4 | * Copyright (C) 2004-2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_AVR32_OCD_H | ||
11 | #define __ASM_AVR32_OCD_H | ||
12 | |||
13 | /* OCD Register offsets. Abbreviations used below: | ||
14 | * | ||
15 | * BP Breakpoint | ||
16 | * Comm Communication | ||
17 | * DT Data Trace | ||
18 | * PC Program Counter | ||
19 | * PID Process ID | ||
20 | * R/W Read/Write | ||
21 | * WP Watchpoint | ||
22 | */ | ||
23 | #define OCD_DID 0x0000 /* Device ID */ | ||
24 | #define OCD_DC 0x0008 /* Development Control */ | ||
25 | #define OCD_DS 0x0010 /* Development Status */ | ||
26 | #define OCD_RWCS 0x001c /* R/W Access Control */ | ||
27 | #define OCD_RWA 0x0024 /* R/W Access Address */ | ||
28 | #define OCD_RWD 0x0028 /* R/W Access Data */ | ||
29 | #define OCD_WT 0x002c /* Watchpoint Trigger */ | ||
30 | #define OCD_DTC 0x0034 /* Data Trace Control */ | ||
31 | #define OCD_DTSA0 0x0038 /* DT Start Addr Channel 0 */ | ||
32 | #define OCD_DTSA1 0x003c /* DT Start Addr Channel 1 */ | ||
33 | #define OCD_DTEA0 0x0048 /* DT End Addr Channel 0 */ | ||
34 | #define OCD_DTEA1 0x004c /* DT End Addr Channel 1 */ | ||
35 | #define OCD_BWC0A 0x0058 /* PC BP/WP Control 0A */ | ||
36 | #define OCD_BWC0B 0x005c /* PC BP/WP Control 0B */ | ||
37 | #define OCD_BWC1A 0x0060 /* PC BP/WP Control 1A */ | ||
38 | #define OCD_BWC1B 0x0064 /* PC BP/WP Control 1B */ | ||
39 | #define OCD_BWC2A 0x0068 /* PC BP/WP Control 2A */ | ||
40 | #define OCD_BWC2B 0x006c /* PC BP/WP Control 2B */ | ||
41 | #define OCD_BWC3A 0x0070 /* Data BP/WP Control 3A */ | ||
42 | #define OCD_BWC3B 0x0074 /* Data BP/WP Control 3B */ | ||
43 | #define OCD_BWA0A 0x0078 /* PC BP/WP Address 0A */ | ||
44 | #define OCD_BWA0B 0x007c /* PC BP/WP Address 0B */ | ||
45 | #define OCD_BWA1A 0x0080 /* PC BP/WP Address 1A */ | ||
46 | #define OCD_BWA1B 0x0084 /* PC BP/WP Address 1B */ | ||
47 | #define OCD_BWA2A 0x0088 /* PC BP/WP Address 2A */ | ||
48 | #define OCD_BWA2B 0x008c /* PC BP/WP Address 2B */ | ||
49 | #define OCD_BWA3A 0x0090 /* Data BP/WP Address 3A */ | ||
50 | #define OCD_BWA3B 0x0094 /* Data BP/WP Address 3B */ | ||
51 | #define OCD_NXCFG 0x0100 /* Nexus Configuration */ | ||
52 | #define OCD_DINST 0x0104 /* Debug Instruction */ | ||
53 | #define OCD_DPC 0x0108 /* Debug Program Counter */ | ||
54 | #define OCD_CPUCM 0x010c /* CPU Control Mask */ | ||
55 | #define OCD_DCCPU 0x0110 /* Debug Comm CPU */ | ||
56 | #define OCD_DCEMU 0x0114 /* Debug Comm Emulator */ | ||
57 | #define OCD_DCSR 0x0118 /* Debug Comm Status */ | ||
58 | #define OCD_PID 0x011c /* Ownership Trace PID */ | ||
59 | #define OCD_EPC0 0x0120 /* Event Pair Control 0 */ | ||
60 | #define OCD_EPC1 0x0124 /* Event Pair Control 1 */ | ||
61 | #define OCD_EPC2 0x0128 /* Event Pair Control 2 */ | ||
62 | #define OCD_EPC3 0x012c /* Event Pair Control 3 */ | ||
63 | #define OCD_AXC 0x0130 /* AUX port Control */ | ||
64 | |||
65 | /* Bits in DID */ | ||
66 | #define OCD_DID_MID_START 1 | ||
67 | #define OCD_DID_MID_SIZE 11 | ||
68 | #define OCD_DID_PN_START 12 | ||
69 | #define OCD_DID_PN_SIZE 16 | ||
70 | #define OCD_DID_RN_START 28 | ||
71 | #define OCD_DID_RN_SIZE 4 | ||
72 | |||
73 | /* Bits in DC */ | ||
74 | #define OCD_DC_TM_START 0 | ||
75 | #define OCD_DC_TM_SIZE 2 | ||
76 | #define OCD_DC_EIC_START 3 | ||
77 | #define OCD_DC_EIC_SIZE 2 | ||
78 | #define OCD_DC_OVC_START 5 | ||
79 | #define OCD_DC_OVC_SIZE 3 | ||
80 | #define OCD_DC_SS_BIT 8 | ||
81 | #define OCD_DC_DBR_BIT 12 | ||
82 | #define OCD_DC_DBE_BIT 13 | ||
83 | #define OCD_DC_EOS_START 20 | ||
84 | #define OCD_DC_EOS_SIZE 2 | ||
85 | #define OCD_DC_SQA_BIT 22 | ||
86 | #define OCD_DC_IRP_BIT 23 | ||
87 | #define OCD_DC_IFM_BIT 24 | ||
88 | #define OCD_DC_TOZ_BIT 25 | ||
89 | #define OCD_DC_TSR_BIT 26 | ||
90 | #define OCD_DC_RID_BIT 27 | ||
91 | #define OCD_DC_ORP_BIT 28 | ||
92 | #define OCD_DC_MM_BIT 29 | ||
93 | #define OCD_DC_RES_BIT 30 | ||
94 | #define OCD_DC_ABORT_BIT 31 | ||
95 | |||
96 | /* Bits in DS */ | ||
97 | #define OCD_DS_SSS_BIT 0 | ||
98 | #define OCD_DS_SWB_BIT 1 | ||
99 | #define OCD_DS_HWB_BIT 2 | ||
100 | #define OCD_DS_HWE_BIT 3 | ||
101 | #define OCD_DS_STP_BIT 4 | ||
102 | #define OCD_DS_DBS_BIT 5 | ||
103 | #define OCD_DS_BP_START 8 | ||
104 | #define OCD_DS_BP_SIZE 8 | ||
105 | #define OCD_DS_INC_BIT 24 | ||
106 | #define OCD_DS_BOZ_BIT 25 | ||
107 | #define OCD_DS_DBA_BIT 26 | ||
108 | #define OCD_DS_EXB_BIT 27 | ||
109 | #define OCD_DS_NTBF_BIT 28 | ||
110 | |||
111 | /* Bits in RWCS */ | ||
112 | #define OCD_RWCS_DV_BIT 0 | ||
113 | #define OCD_RWCS_ERR_BIT 1 | ||
114 | #define OCD_RWCS_CNT_START 2 | ||
115 | #define OCD_RWCS_CNT_SIZE 14 | ||
116 | #define OCD_RWCS_CRC_BIT 19 | ||
117 | #define OCD_RWCS_NTBC_START 20 | ||
118 | #define OCD_RWCS_NTBC_SIZE 2 | ||
119 | #define OCD_RWCS_NTE_BIT 22 | ||
120 | #define OCD_RWCS_NTAP_BIT 23 | ||
121 | #define OCD_RWCS_WRAPPED_BIT 24 | ||
122 | #define OCD_RWCS_CCTRL_START 25 | ||
123 | #define OCD_RWCS_CCTRL_SIZE 2 | ||
124 | #define OCD_RWCS_SZ_START 27 | ||
125 | #define OCD_RWCS_SZ_SIZE 3 | ||
126 | #define OCD_RWCS_RW_BIT 30 | ||
127 | #define OCD_RWCS_AC_BIT 31 | ||
128 | |||
129 | /* Bits in RWA */ | ||
130 | #define OCD_RWA_RWA_START 0 | ||
131 | #define OCD_RWA_RWA_SIZE 32 | ||
132 | |||
133 | /* Bits in RWD */ | ||
134 | #define OCD_RWD_RWD_START 0 | ||
135 | #define OCD_RWD_RWD_SIZE 32 | ||
136 | |||
137 | /* Bits in WT */ | ||
138 | #define OCD_WT_DTE_START 20 | ||
139 | #define OCD_WT_DTE_SIZE 3 | ||
140 | #define OCD_WT_DTS_START 23 | ||
141 | #define OCD_WT_DTS_SIZE 3 | ||
142 | #define OCD_WT_PTE_START 26 | ||
143 | #define OCD_WT_PTE_SIZE 3 | ||
144 | #define OCD_WT_PTS_START 29 | ||
145 | #define OCD_WT_PTS_SIZE 3 | ||
146 | |||
147 | /* Bits in DTC */ | ||
148 | #define OCD_DTC_T0WP_BIT 0 | ||
149 | #define OCD_DTC_T1WP_BIT 1 | ||
150 | #define OCD_DTC_ASID0EN_BIT 2 | ||
151 | #define OCD_DTC_ASID0_START 3 | ||
152 | #define OCD_DTC_ASID0_SIZE 8 | ||
153 | #define OCD_DTC_ASID1EN_BIT 11 | ||
154 | #define OCD_DTC_ASID1_START 12 | ||
155 | #define OCD_DTC_ASID1_SIZE 8 | ||
156 | #define OCD_DTC_RWT1_START 28 | ||
157 | #define OCD_DTC_RWT1_SIZE 2 | ||
158 | #define OCD_DTC_RWT0_START 30 | ||
159 | #define OCD_DTC_RWT0_SIZE 2 | ||
160 | |||
161 | /* Bits in DTSA0 */ | ||
162 | #define OCD_DTSA0_DTSA_START 0 | ||
163 | #define OCD_DTSA0_DTSA_SIZE 32 | ||
164 | |||
165 | /* Bits in DTSA1 */ | ||
166 | #define OCD_DTSA1_DTSA_START 0 | ||
167 | #define OCD_DTSA1_DTSA_SIZE 32 | ||
168 | |||
169 | /* Bits in DTEA0 */ | ||
170 | #define OCD_DTEA0_DTEA_START 0 | ||
171 | #define OCD_DTEA0_DTEA_SIZE 32 | ||
172 | |||
173 | /* Bits in DTEA1 */ | ||
174 | #define OCD_DTEA1_DTEA_START 0 | ||
175 | #define OCD_DTEA1_DTEA_SIZE 32 | ||
176 | |||
177 | /* Bits in BWC0A */ | ||
178 | #define OCD_BWC0A_ASIDEN_BIT 0 | ||
179 | #define OCD_BWC0A_ASID_START 1 | ||
180 | #define OCD_BWC0A_ASID_SIZE 8 | ||
181 | #define OCD_BWC0A_EOC_BIT 14 | ||
182 | #define OCD_BWC0A_AME_BIT 25 | ||
183 | #define OCD_BWC0A_BWE_START 30 | ||
184 | #define OCD_BWC0A_BWE_SIZE 2 | ||
185 | |||
186 | /* Bits in BWC0B */ | ||
187 | #define OCD_BWC0B_ASIDEN_BIT 0 | ||
188 | #define OCD_BWC0B_ASID_START 1 | ||
189 | #define OCD_BWC0B_ASID_SIZE 8 | ||
190 | #define OCD_BWC0B_EOC_BIT 14 | ||
191 | #define OCD_BWC0B_AME_BIT 25 | ||
192 | #define OCD_BWC0B_BWE_START 30 | ||
193 | #define OCD_BWC0B_BWE_SIZE 2 | ||
194 | |||
195 | /* Bits in BWC1A */ | ||
196 | #define OCD_BWC1A_ASIDEN_BIT 0 | ||
197 | #define OCD_BWC1A_ASID_START 1 | ||
198 | #define OCD_BWC1A_ASID_SIZE 8 | ||
199 | #define OCD_BWC1A_EOC_BIT 14 | ||
200 | #define OCD_BWC1A_AME_BIT 25 | ||
201 | #define OCD_BWC1A_BWE_START 30 | ||
202 | #define OCD_BWC1A_BWE_SIZE 2 | ||
203 | |||
204 | /* Bits in BWC1B */ | ||
205 | #define OCD_BWC1B_ASIDEN_BIT 0 | ||
206 | #define OCD_BWC1B_ASID_START 1 | ||
207 | #define OCD_BWC1B_ASID_SIZE 8 | ||
208 | #define OCD_BWC1B_EOC_BIT 14 | ||
209 | #define OCD_BWC1B_AME_BIT 25 | ||
210 | #define OCD_BWC1B_BWE_START 30 | ||
211 | #define OCD_BWC1B_BWE_SIZE 2 | ||
212 | |||
213 | /* Bits in BWC2A */ | ||
214 | #define OCD_BWC2A_ASIDEN_BIT 0 | ||
215 | #define OCD_BWC2A_ASID_START 1 | ||
216 | #define OCD_BWC2A_ASID_SIZE 8 | ||
217 | #define OCD_BWC2A_EOC_BIT 14 | ||
218 | #define OCD_BWC2A_AMB_START 20 | ||
219 | #define OCD_BWC2A_AMB_SIZE 5 | ||
220 | #define OCD_BWC2A_AME_BIT 25 | ||
221 | #define OCD_BWC2A_BWE_START 30 | ||
222 | #define OCD_BWC2A_BWE_SIZE 2 | ||
223 | |||
224 | /* Bits in BWC2B */ | ||
225 | #define OCD_BWC2B_ASIDEN_BIT 0 | ||
226 | #define OCD_BWC2B_ASID_START 1 | ||
227 | #define OCD_BWC2B_ASID_SIZE 8 | ||
228 | #define OCD_BWC2B_EOC_BIT 14 | ||
229 | #define OCD_BWC2B_AME_BIT 25 | ||
230 | #define OCD_BWC2B_BWE_START 30 | ||
231 | #define OCD_BWC2B_BWE_SIZE 2 | ||
232 | |||
233 | /* Bits in BWC3A */ | ||
234 | #define OCD_BWC3A_ASIDEN_BIT 0 | ||
235 | #define OCD_BWC3A_ASID_START 1 | ||
236 | #define OCD_BWC3A_ASID_SIZE 8 | ||
237 | #define OCD_BWC3A_SIZE_START 9 | ||
238 | #define OCD_BWC3A_SIZE_SIZE 3 | ||
239 | #define OCD_BWC3A_EOC_BIT 14 | ||
240 | #define OCD_BWC3A_BWO_START 16 | ||
241 | #define OCD_BWC3A_BWO_SIZE 2 | ||
242 | #define OCD_BWC3A_BME_START 20 | ||
243 | #define OCD_BWC3A_BME_SIZE 4 | ||
244 | #define OCD_BWC3A_BRW_START 28 | ||
245 | #define OCD_BWC3A_BRW_SIZE 2 | ||
246 | #define OCD_BWC3A_BWE_START 30 | ||
247 | #define OCD_BWC3A_BWE_SIZE 2 | ||
248 | |||
249 | /* Bits in BWC3B */ | ||
250 | #define OCD_BWC3B_ASIDEN_BIT 0 | ||
251 | #define OCD_BWC3B_ASID_START 1 | ||
252 | #define OCD_BWC3B_ASID_SIZE 8 | ||
253 | #define OCD_BWC3B_SIZE_START 9 | ||
254 | #define OCD_BWC3B_SIZE_SIZE 3 | ||
255 | #define OCD_BWC3B_EOC_BIT 14 | ||
256 | #define OCD_BWC3B_BWO_START 16 | ||
257 | #define OCD_BWC3B_BWO_SIZE 2 | ||
258 | #define OCD_BWC3B_BME_START 20 | ||
259 | #define OCD_BWC3B_BME_SIZE 4 | ||
260 | #define OCD_BWC3B_BRW_START 28 | ||
261 | #define OCD_BWC3B_BRW_SIZE 2 | ||
262 | #define OCD_BWC3B_BWE_START 30 | ||
263 | #define OCD_BWC3B_BWE_SIZE 2 | ||
264 | |||
265 | /* Bits in BWA0A */ | ||
266 | #define OCD_BWA0A_BWA_START 0 | ||
267 | #define OCD_BWA0A_BWA_SIZE 32 | ||
268 | |||
269 | /* Bits in BWA0B */ | ||
270 | #define OCD_BWA0B_BWA_START 0 | ||
271 | #define OCD_BWA0B_BWA_SIZE 32 | ||
272 | |||
273 | /* Bits in BWA1A */ | ||
274 | #define OCD_BWA1A_BWA_START 0 | ||
275 | #define OCD_BWA1A_BWA_SIZE 32 | ||
276 | |||
277 | /* Bits in BWA1B */ | ||
278 | #define OCD_BWA1B_BWA_START 0 | ||
279 | #define OCD_BWA1B_BWA_SIZE 32 | ||
280 | |||
281 | /* Bits in BWA2A */ | ||
282 | #define OCD_BWA2A_BWA_START 0 | ||
283 | #define OCD_BWA2A_BWA_SIZE 32 | ||
284 | |||
285 | /* Bits in BWA2B */ | ||
286 | #define OCD_BWA2B_BWA_START 0 | ||
287 | #define OCD_BWA2B_BWA_SIZE 32 | ||
288 | |||
289 | /* Bits in BWA3A */ | ||
290 | #define OCD_BWA3A_BWA_START 0 | ||
291 | #define OCD_BWA3A_BWA_SIZE 32 | ||
292 | |||
293 | /* Bits in BWA3B */ | ||
294 | #define OCD_BWA3B_BWA_START 0 | ||
295 | #define OCD_BWA3B_BWA_SIZE 32 | ||
296 | |||
297 | /* Bits in NXCFG */ | ||
298 | #define OCD_NXCFG_NXARCH_START 0 | ||
299 | #define OCD_NXCFG_NXARCH_SIZE 4 | ||
300 | #define OCD_NXCFG_NXOCD_START 4 | ||
301 | #define OCD_NXCFG_NXOCD_SIZE 4 | ||
302 | #define OCD_NXCFG_NXPCB_START 8 | ||
303 | #define OCD_NXCFG_NXPCB_SIZE 4 | ||
304 | #define OCD_NXCFG_NXDB_START 12 | ||
305 | #define OCD_NXCFG_NXDB_SIZE 4 | ||
306 | #define OCD_NXCFG_MXMSEO_BIT 16 | ||
307 | #define OCD_NXCFG_NXMDO_START 17 | ||
308 | #define OCD_NXCFG_NXMDO_SIZE 4 | ||
309 | #define OCD_NXCFG_NXPT_BIT 21 | ||
310 | #define OCD_NXCFG_NXOT_BIT 22 | ||
311 | #define OCD_NXCFG_NXDWT_BIT 23 | ||
312 | #define OCD_NXCFG_NXDRT_BIT 24 | ||
313 | #define OCD_NXCFG_NXDTC_START 25 | ||
314 | #define OCD_NXCFG_NXDTC_SIZE 3 | ||
315 | #define OCD_NXCFG_NXDMA_BIT 28 | ||
316 | |||
317 | /* Bits in DINST */ | ||
318 | #define OCD_DINST_DINST_START 0 | ||
319 | #define OCD_DINST_DINST_SIZE 32 | ||
320 | |||
321 | /* Bits in CPUCM */ | ||
322 | #define OCD_CPUCM_BEM_BIT 1 | ||
323 | #define OCD_CPUCM_FEM_BIT 2 | ||
324 | #define OCD_CPUCM_REM_BIT 3 | ||
325 | #define OCD_CPUCM_IBEM_BIT 4 | ||
326 | #define OCD_CPUCM_IEEM_BIT 5 | ||
327 | |||
328 | /* Bits in DCCPU */ | ||
329 | #define OCD_DCCPU_DATA_START 0 | ||
330 | #define OCD_DCCPU_DATA_SIZE 32 | ||
331 | |||
332 | /* Bits in DCEMU */ | ||
333 | #define OCD_DCEMU_DATA_START 0 | ||
334 | #define OCD_DCEMU_DATA_SIZE 32 | ||
335 | |||
336 | /* Bits in DCSR */ | ||
337 | #define OCD_DCSR_CPUD_BIT 0 | ||
338 | #define OCD_DCSR_EMUD_BIT 1 | ||
339 | |||
340 | /* Bits in PID */ | ||
341 | #define OCD_PID_PROCESS_START 0 | ||
342 | #define OCD_PID_PROCESS_SIZE 32 | ||
343 | |||
344 | /* Bits in EPC0 */ | ||
345 | #define OCD_EPC0_RNG_START 0 | ||
346 | #define OCD_EPC0_RNG_SIZE 2 | ||
347 | #define OCD_EPC0_CE_BIT 4 | ||
348 | #define OCD_EPC0_ECNT_START 16 | ||
349 | #define OCD_EPC0_ECNT_SIZE 16 | ||
350 | |||
351 | /* Bits in EPC1 */ | ||
352 | #define OCD_EPC1_RNG_START 0 | ||
353 | #define OCD_EPC1_RNG_SIZE 2 | ||
354 | #define OCD_EPC1_ATB_BIT 5 | ||
355 | #define OCD_EPC1_AM_BIT 6 | ||
356 | |||
357 | /* Bits in EPC2 */ | ||
358 | #define OCD_EPC2_RNG_START 0 | ||
359 | #define OCD_EPC2_RNG_SIZE 2 | ||
360 | #define OCD_EPC2_DB_START 2 | ||
361 | #define OCD_EPC2_DB_SIZE 2 | ||
362 | |||
363 | /* Bits in EPC3 */ | ||
364 | #define OCD_EPC3_RNG_START 0 | ||
365 | #define OCD_EPC3_RNG_SIZE 2 | ||
366 | #define OCD_EPC3_DWE_BIT 2 | ||
367 | |||
368 | /* Bits in AXC */ | ||
369 | #define OCD_AXC_DIV_START 0 | ||
370 | #define OCD_AXC_DIV_SIZE 4 | ||
371 | #define OCD_AXC_AXE_BIT 8 | ||
372 | #define OCD_AXC_AXS_BIT 9 | ||
373 | #define OCD_AXC_DDR_BIT 10 | ||
374 | #define OCD_AXC_LS_BIT 11 | ||
375 | #define OCD_AXC_REX_BIT 12 | ||
376 | #define OCD_AXC_REXTEN_BIT 13 | ||
377 | |||
378 | /* Constants for DC:EIC */ | ||
379 | #define OCD_EIC_PROGRAM_AND_DATA_TRACE 0 | ||
380 | #define OCD_EIC_BREAKPOINT 1 | ||
381 | #define OCD_EIC_NOP 2 | ||
382 | |||
383 | /* Constants for DC:OVC */ | ||
384 | #define OCD_OVC_OVERRUN 0 | ||
385 | #define OCD_OVC_DELAY_CPU_BTM 1 | ||
386 | #define OCD_OVC_DELAY_CPU_DTM 2 | ||
387 | #define OCD_OVC_DELAY_CPU_BTM_DTM 3 | ||
388 | |||
389 | /* Constants for DC:EOS */ | ||
390 | #define OCD_EOS_NOP 0 | ||
391 | #define OCD_EOS_DEBUG_MODE 1 | ||
392 | #define OCD_EOS_BREAKPOINT_WATCHPOINT 2 | ||
393 | #define OCD_EOS_THQ 3 | ||
394 | |||
395 | /* Constants for RWCS:NTBC */ | ||
396 | #define OCD_NTBC_OVERWRITE 0 | ||
397 | #define OCD_NTBC_DISABLE 1 | ||
398 | #define OCD_NTBC_BREAKPOINT 2 | ||
399 | |||
400 | /* Constants for RWCS:CCTRL */ | ||
401 | #define OCD_CCTRL_AUTO 0 | ||
402 | #define OCD_CCTRL_CACHED 1 | ||
403 | #define OCD_CCTRL_UNCACHED 2 | ||
404 | |||
405 | /* Constants for RWCS:SZ */ | ||
406 | #define OCD_SZ_BYTE 0 | ||
407 | #define OCD_SZ_HALFWORD 1 | ||
408 | #define OCD_SZ_WORD 2 | ||
409 | |||
410 | /* Constants for WT:PTS */ | ||
411 | #define OCD_PTS_DISABLED 0 | ||
412 | #define OCD_PTS_PROGRAM_0B 1 | ||
413 | #define OCD_PTS_PROGRAM_1A 2 | ||
414 | #define OCD_PTS_PROGRAM_1B 3 | ||
415 | #define OCD_PTS_PROGRAM_2A 4 | ||
416 | #define OCD_PTS_PROGRAM_2B 5 | ||
417 | #define OCD_PTS_DATA_3A 6 | ||
418 | #define OCD_PTS_DATA_3B 7 | ||
419 | |||
420 | /* Constants for DTC:RWT1 */ | ||
421 | #define OCD_RWT1_NO_TRACE 0 | ||
422 | #define OCD_RWT1_DATA_READ 1 | ||
423 | #define OCD_RWT1_DATA_WRITE 2 | ||
424 | #define OCD_RWT1_DATA_READ_WRITE 3 | ||
425 | |||
426 | /* Constants for DTC:RWT0 */ | ||
427 | #define OCD_RWT0_NO_TRACE 0 | ||
428 | #define OCD_RWT0_DATA_READ 1 | ||
429 | #define OCD_RWT0_DATA_WRITE 2 | ||
430 | #define OCD_RWT0_DATA_READ_WRITE 3 | ||
431 | |||
432 | /* Constants for BWC0A:BWE */ | ||
433 | #define OCD_BWE_DISABLED 0 | ||
434 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
435 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
436 | |||
437 | /* Constants for BWC0B:BWE */ | ||
438 | #define OCD_BWE_DISABLED 0 | ||
439 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
440 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
441 | |||
442 | /* Constants for BWC1A:BWE */ | ||
443 | #define OCD_BWE_DISABLED 0 | ||
444 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
445 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
446 | |||
447 | /* Constants for BWC1B:BWE */ | ||
448 | #define OCD_BWE_DISABLED 0 | ||
449 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
450 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
451 | |||
452 | /* Constants for BWC2A:BWE */ | ||
453 | #define OCD_BWE_DISABLED 0 | ||
454 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
455 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
456 | |||
457 | /* Constants for BWC2B:BWE */ | ||
458 | #define OCD_BWE_DISABLED 0 | ||
459 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
460 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
461 | |||
462 | /* Constants for BWC3A:SIZE */ | ||
463 | #define OCD_SIZE_BYTE_ACCESS 4 | ||
464 | #define OCD_SIZE_HALFWORD_ACCESS 5 | ||
465 | #define OCD_SIZE_WORD_ACCESS 6 | ||
466 | #define OCD_SIZE_DOUBLE_WORD_ACCESS 7 | ||
467 | |||
468 | /* Constants for BWC3A:BRW */ | ||
469 | #define OCD_BRW_READ_BREAK 0 | ||
470 | #define OCD_BRW_WRITE_BREAK 1 | ||
471 | #define OCD_BRW_ANY_ACCES_BREAK 2 | ||
472 | |||
473 | /* Constants for BWC3A:BWE */ | ||
474 | #define OCD_BWE_DISABLED 0 | ||
475 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
476 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
477 | |||
478 | /* Constants for BWC3B:SIZE */ | ||
479 | #define OCD_SIZE_BYTE_ACCESS 4 | ||
480 | #define OCD_SIZE_HALFWORD_ACCESS 5 | ||
481 | #define OCD_SIZE_WORD_ACCESS 6 | ||
482 | #define OCD_SIZE_DOUBLE_WORD_ACCESS 7 | ||
483 | |||
484 | /* Constants for BWC3B:BRW */ | ||
485 | #define OCD_BRW_READ_BREAK 0 | ||
486 | #define OCD_BRW_WRITE_BREAK 1 | ||
487 | #define OCD_BRW_ANY_ACCES_BREAK 2 | ||
488 | |||
489 | /* Constants for BWC3B:BWE */ | ||
490 | #define OCD_BWE_DISABLED 0 | ||
491 | #define OCD_BWE_BREAKPOINT_ENABLED 1 | ||
492 | #define OCD_BWE_WATCHPOINT_ENABLED 3 | ||
493 | |||
494 | /* Constants for EPC0:RNG */ | ||
495 | #define OCD_RNG_DISABLED 0 | ||
496 | #define OCD_RNG_EXCLUSIVE 1 | ||
497 | #define OCD_RNG_INCLUSIVE 2 | ||
498 | |||
499 | /* Constants for EPC1:RNG */ | ||
500 | #define OCD_RNG_DISABLED 0 | ||
501 | #define OCD_RNG_EXCLUSIVE 1 | ||
502 | #define OCD_RNG_INCLUSIVE 2 | ||
503 | |||
504 | /* Constants for EPC2:RNG */ | ||
505 | #define OCD_RNG_DISABLED 0 | ||
506 | #define OCD_RNG_EXCLUSIVE 1 | ||
507 | #define OCD_RNG_INCLUSIVE 2 | ||
508 | |||
509 | /* Constants for EPC2:DB */ | ||
510 | #define OCD_DB_DISABLED 0 | ||
511 | #define OCD_DB_CHAINED_B 1 | ||
512 | #define OCD_DB_CHAINED_A 2 | ||
513 | #define OCD_DB_AHAINED_A_AND_B 3 | ||
514 | |||
515 | /* Constants for EPC3:RNG */ | ||
516 | #define OCD_RNG_DISABLED 0 | ||
517 | #define OCD_RNG_EXCLUSIVE 1 | ||
518 | #define OCD_RNG_INCLUSIVE 2 | ||
519 | |||
520 | #ifndef __ASSEMBLER__ | ||
521 | |||
522 | /* Register access macros */ | ||
523 | static inline unsigned long __ocd_read(unsigned int reg) | ||
524 | { | ||
525 | return __builtin_mfdr(reg); | ||
526 | } | ||
527 | |||
528 | static inline void __ocd_write(unsigned int reg, unsigned long value) | ||
529 | { | ||
530 | __builtin_mtdr(reg, value); | ||
531 | } | ||
532 | |||
533 | #define ocd_read(reg) __ocd_read(OCD_##reg) | ||
534 | #define ocd_write(reg, value) __ocd_write(OCD_##reg, value) | ||
535 | |||
536 | struct task_struct; | ||
537 | |||
538 | void ocd_enable(struct task_struct *child); | ||
539 | void ocd_disable(struct task_struct *child); | ||
540 | |||
541 | #endif /* !__ASSEMBLER__ */ | ||
542 | |||
543 | #endif /* __ASM_AVR32_OCD_H */ | ||
diff --git a/arch/avr32/include/asm/page.h b/arch/avr32/include/asm/page.h deleted file mode 100644 index c5d2a3e2c62f..000000000000 --- a/arch/avr32/include/asm/page.h +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_PAGE_H | ||
9 | #define __ASM_AVR32_PAGE_H | ||
10 | |||
11 | #include <linux/const.h> | ||
12 | |||
13 | /* PAGE_SHIFT determines the page size */ | ||
14 | #define PAGE_SHIFT 12 | ||
15 | #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) | ||
16 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
17 | #define PTE_MASK PAGE_MASK | ||
18 | |||
19 | #ifndef __ASSEMBLY__ | ||
20 | |||
21 | #include <asm/addrspace.h> | ||
22 | |||
23 | extern void clear_page(void *to); | ||
24 | extern void copy_page(void *to, void *from); | ||
25 | |||
26 | #define clear_user_page(page, vaddr, pg) clear_page(page) | ||
27 | #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) | ||
28 | |||
29 | /* | ||
30 | * These are used to make use of C type-checking.. | ||
31 | */ | ||
32 | typedef struct { unsigned long pte; } pte_t; | ||
33 | typedef struct { unsigned long pgd; } pgd_t; | ||
34 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
35 | typedef struct page *pgtable_t; | ||
36 | |||
37 | #define pte_val(x) ((x).pte) | ||
38 | #define pgd_val(x) ((x).pgd) | ||
39 | #define pgprot_val(x) ((x).pgprot) | ||
40 | |||
41 | #define __pte(x) ((pte_t) { (x) }) | ||
42 | #define __pgd(x) ((pgd_t) { (x) }) | ||
43 | #define __pgprot(x) ((pgprot_t) { (x) }) | ||
44 | |||
45 | /* FIXME: These should be removed soon */ | ||
46 | extern unsigned long memory_start, memory_end; | ||
47 | |||
48 | /* Pure 2^n version of get_order */ | ||
49 | static inline int get_order(unsigned long size) | ||
50 | { | ||
51 | unsigned lz; | ||
52 | |||
53 | size = (size - 1) >> PAGE_SHIFT; | ||
54 | asm("clz %0, %1" : "=r"(lz) : "r"(size)); | ||
55 | return 32 - lz; | ||
56 | } | ||
57 | |||
58 | #endif /* !__ASSEMBLY__ */ | ||
59 | |||
60 | /* | ||
61 | * The hardware maps the virtual addresses 0x80000000 -> 0x9fffffff | ||
62 | * permanently to the physical addresses 0x00000000 -> 0x1fffffff when | ||
63 | * segmentation is enabled. We want to make use of this in order to | ||
64 | * minimize TLB pressure. | ||
65 | */ | ||
66 | #define PAGE_OFFSET (0x80000000UL) | ||
67 | |||
68 | /* | ||
69 | * ALSA uses virt_to_page() on DMA pages, which I'm not entirely sure | ||
70 | * is a good idea. Anyway, we can't simply subtract PAGE_OFFSET here | ||
71 | * in that case, so we'll have to mask out the three most significant | ||
72 | * bits of the address instead... | ||
73 | * | ||
74 | * What's the difference between __pa() and virt_to_phys() anyway? | ||
75 | */ | ||
76 | #define __pa(x) PHYSADDR(x) | ||
77 | #define __va(x) ((void *)(P1SEGADDR(x))) | ||
78 | |||
79 | #define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT) | ||
80 | |||
81 | #define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) | ||
82 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | ||
83 | |||
84 | #ifndef CONFIG_NEED_MULTIPLE_NODES | ||
85 | |||
86 | #define ARCH_PFN_OFFSET (CONFIG_PHYS_OFFSET >> PAGE_SHIFT) | ||
87 | |||
88 | #define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (ARCH_PFN_OFFSET + max_mapnr)) | ||
89 | #endif /* CONFIG_NEED_MULTIPLE_NODES */ | ||
90 | |||
91 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) | ||
92 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | ||
93 | |||
94 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ | ||
95 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
96 | |||
97 | /* | ||
98 | * Memory above this physical address will be considered highmem. | ||
99 | */ | ||
100 | #define HIGHMEM_START 0x20000000UL | ||
101 | |||
102 | #include <asm-generic/memory_model.h> | ||
103 | |||
104 | #endif /* __ASM_AVR32_PAGE_H */ | ||
diff --git a/arch/avr32/include/asm/pci.h b/arch/avr32/include/asm/pci.h deleted file mode 100644 index 0f5f134b896a..000000000000 --- a/arch/avr32/include/asm/pci.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_PCI_H__ | ||
2 | #define __ASM_AVR32_PCI_H__ | ||
3 | |||
4 | /* We don't support PCI yet, but some drivers require this file anyway */ | ||
5 | |||
6 | #define PCI_DMA_BUS_IS_PHYS (1) | ||
7 | |||
8 | #endif /* __ASM_AVR32_PCI_H__ */ | ||
diff --git a/arch/avr32/include/asm/pgalloc.h b/arch/avr32/include/asm/pgalloc.h deleted file mode 100644 index db039cb368be..000000000000 --- a/arch/avr32/include/asm/pgalloc.h +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_PGALLOC_H | ||
9 | #define __ASM_AVR32_PGALLOC_H | ||
10 | |||
11 | #include <linux/mm.h> | ||
12 | #include <linux/quicklist.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/pgtable.h> | ||
15 | |||
16 | #define QUICK_PGD 0 /* Preserve kernel mappings over free */ | ||
17 | #define QUICK_PT 1 /* Zero on free */ | ||
18 | |||
19 | static inline void pmd_populate_kernel(struct mm_struct *mm, | ||
20 | pmd_t *pmd, pte_t *pte) | ||
21 | { | ||
22 | set_pmd(pmd, __pmd((unsigned long)pte)); | ||
23 | } | ||
24 | |||
25 | static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, | ||
26 | pgtable_t pte) | ||
27 | { | ||
28 | set_pmd(pmd, __pmd((unsigned long)page_address(pte))); | ||
29 | } | ||
30 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
31 | |||
32 | static inline void pgd_ctor(void *x) | ||
33 | { | ||
34 | pgd_t *pgd = x; | ||
35 | |||
36 | memcpy(pgd + USER_PTRS_PER_PGD, | ||
37 | swapper_pg_dir + USER_PTRS_PER_PGD, | ||
38 | (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); | ||
39 | } | ||
40 | |||
41 | /* | ||
42 | * Allocate and free page tables | ||
43 | */ | ||
44 | static inline pgd_t *pgd_alloc(struct mm_struct *mm) | ||
45 | { | ||
46 | return quicklist_alloc(QUICK_PGD, GFP_KERNEL, pgd_ctor); | ||
47 | } | ||
48 | |||
49 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
50 | { | ||
51 | quicklist_free(QUICK_PGD, NULL, pgd); | ||
52 | } | ||
53 | |||
54 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | ||
55 | unsigned long address) | ||
56 | { | ||
57 | return quicklist_alloc(QUICK_PT, GFP_KERNEL, NULL); | ||
58 | } | ||
59 | |||
60 | static inline pgtable_t pte_alloc_one(struct mm_struct *mm, | ||
61 | unsigned long address) | ||
62 | { | ||
63 | struct page *page; | ||
64 | void *pg; | ||
65 | |||
66 | pg = quicklist_alloc(QUICK_PT, GFP_KERNEL, NULL); | ||
67 | if (!pg) | ||
68 | return NULL; | ||
69 | |||
70 | page = virt_to_page(pg); | ||
71 | if (!pgtable_page_ctor(page)) { | ||
72 | quicklist_free(QUICK_PT, NULL, pg); | ||
73 | return NULL; | ||
74 | } | ||
75 | |||
76 | return page; | ||
77 | } | ||
78 | |||
79 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | ||
80 | { | ||
81 | quicklist_free(QUICK_PT, NULL, pte); | ||
82 | } | ||
83 | |||
84 | static inline void pte_free(struct mm_struct *mm, pgtable_t pte) | ||
85 | { | ||
86 | pgtable_page_dtor(pte); | ||
87 | quicklist_free_page(QUICK_PT, NULL, pte); | ||
88 | } | ||
89 | |||
90 | #define __pte_free_tlb(tlb,pte,addr) \ | ||
91 | do { \ | ||
92 | pgtable_page_dtor(pte); \ | ||
93 | tlb_remove_page((tlb), pte); \ | ||
94 | } while (0) | ||
95 | |||
96 | static inline void check_pgt_cache(void) | ||
97 | { | ||
98 | quicklist_trim(QUICK_PGD, NULL, 25, 16); | ||
99 | quicklist_trim(QUICK_PT, NULL, 25, 16); | ||
100 | } | ||
101 | |||
102 | #endif /* __ASM_AVR32_PGALLOC_H */ | ||
diff --git a/arch/avr32/include/asm/pgtable-2level.h b/arch/avr32/include/asm/pgtable-2level.h deleted file mode 100644 index d5b1c63993ec..000000000000 --- a/arch/avr32/include/asm/pgtable-2level.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_PGTABLE_2LEVEL_H | ||
9 | #define __ASM_AVR32_PGTABLE_2LEVEL_H | ||
10 | |||
11 | #define __ARCH_USE_5LEVEL_HACK | ||
12 | #include <asm-generic/pgtable-nopmd.h> | ||
13 | |||
14 | /* | ||
15 | * Traditional 2-level paging structure | ||
16 | */ | ||
17 | #define PGDIR_SHIFT 22 | ||
18 | #define PTRS_PER_PGD 1024 | ||
19 | |||
20 | #define PTRS_PER_PTE 1024 | ||
21 | |||
22 | #ifndef __ASSEMBLY__ | ||
23 | #define pte_ERROR(e) \ | ||
24 | printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) | ||
25 | #define pgd_ERROR(e) \ | ||
26 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) | ||
27 | |||
28 | /* | ||
29 | * Certain architectures need to do special things when PTEs | ||
30 | * within a page table are directly modified. Thus, the following | ||
31 | * hook is made available. | ||
32 | */ | ||
33 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) | ||
34 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep, pteval) | ||
35 | |||
36 | /* | ||
37 | * (pmds are folded into pgds so this doesn't get actually called, | ||
38 | * but the define is needed for a generic inline function.) | ||
39 | */ | ||
40 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | ||
41 | |||
42 | #define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT))) | ||
43 | #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
44 | #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
45 | |||
46 | #endif /* !__ASSEMBLY__ */ | ||
47 | |||
48 | #endif /* __ASM_AVR32_PGTABLE_2LEVEL_H */ | ||
diff --git a/arch/avr32/include/asm/pgtable.h b/arch/avr32/include/asm/pgtable.h deleted file mode 100644 index 35800664076e..000000000000 --- a/arch/avr32/include/asm/pgtable.h +++ /dev/null | |||
@@ -1,347 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_PGTABLE_H | ||
9 | #define __ASM_AVR32_PGTABLE_H | ||
10 | |||
11 | #include <asm/addrspace.h> | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | #include <linux/sched.h> | ||
15 | |||
16 | #endif /* !__ASSEMBLY__ */ | ||
17 | |||
18 | /* | ||
19 | * Use two-level page tables just as the i386 (without PAE) | ||
20 | */ | ||
21 | #include <asm/pgtable-2level.h> | ||
22 | |||
23 | /* | ||
24 | * The following code might need some cleanup when the values are | ||
25 | * final... | ||
26 | */ | ||
27 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
28 | #define PMD_MASK (~(PMD_SIZE-1)) | ||
29 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
30 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | ||
31 | |||
32 | #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) | ||
33 | #define FIRST_USER_ADDRESS 0UL | ||
34 | |||
35 | #ifndef __ASSEMBLY__ | ||
36 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; | ||
37 | extern void paging_init(void); | ||
38 | |||
39 | /* | ||
40 | * ZERO_PAGE is a global shared page that is always zero: used for | ||
41 | * zero-mapped memory areas etc. | ||
42 | */ | ||
43 | extern struct page *empty_zero_page; | ||
44 | #define ZERO_PAGE(vaddr) (empty_zero_page) | ||
45 | |||
46 | /* | ||
47 | * Just any arbitrary offset to the start of the vmalloc VM area: the | ||
48 | * current 8 MiB value just means that there will be a 8 MiB "hole" | ||
49 | * after the uncached physical memory (P2 segment) until the vmalloc | ||
50 | * area starts. That means that any out-of-bounds memory accesses will | ||
51 | * hopefully be caught; we don't know if the end of the P1/P2 segments | ||
52 | * are actually used for anything, but it is anyway safer to let the | ||
53 | * MMU catch these kinds of errors than to rely on the memory bus. | ||
54 | * | ||
55 | * A "hole" of the same size is added to the end of the P3 segment as | ||
56 | * well. It might seem wasteful to use 16 MiB of virtual address space | ||
57 | * on this, but we do have 512 MiB of it... | ||
58 | * | ||
59 | * The vmalloc() routines leave a hole of 4 KiB between each vmalloced | ||
60 | * area for the same reason. | ||
61 | */ | ||
62 | #define VMALLOC_OFFSET (8 * 1024 * 1024) | ||
63 | #define VMALLOC_START (P3SEG + VMALLOC_OFFSET) | ||
64 | #define VMALLOC_END (P4SEG - VMALLOC_OFFSET) | ||
65 | #endif /* !__ASSEMBLY__ */ | ||
66 | |||
67 | /* | ||
68 | * Page flags. Some of these flags are not directly supported by | ||
69 | * hardware, so we have to emulate them. | ||
70 | */ | ||
71 | #define _TLBEHI_BIT_VALID 9 | ||
72 | #define _TLBEHI_VALID (1 << _TLBEHI_BIT_VALID) | ||
73 | |||
74 | #define _PAGE_BIT_WT 0 /* W-bit : write-through */ | ||
75 | #define _PAGE_BIT_DIRTY 1 /* D-bit : page changed */ | ||
76 | #define _PAGE_BIT_SZ0 2 /* SZ0-bit : Size of page */ | ||
77 | #define _PAGE_BIT_SZ1 3 /* SZ1-bit : Size of page */ | ||
78 | #define _PAGE_BIT_EXECUTE 4 /* X-bit : execute access allowed */ | ||
79 | #define _PAGE_BIT_RW 5 /* AP0-bit : write access allowed */ | ||
80 | #define _PAGE_BIT_USER 6 /* AP1-bit : user space access allowed */ | ||
81 | #define _PAGE_BIT_BUFFER 7 /* B-bit : bufferable */ | ||
82 | #define _PAGE_BIT_GLOBAL 8 /* G-bit : global (ignore ASID) */ | ||
83 | #define _PAGE_BIT_CACHABLE 9 /* C-bit : cachable */ | ||
84 | |||
85 | /* If we drop support for 1K pages, we get two extra bits */ | ||
86 | #define _PAGE_BIT_PRESENT 10 | ||
87 | #define _PAGE_BIT_ACCESSED 11 /* software: page was accessed */ | ||
88 | |||
89 | #define _PAGE_WT (1 << _PAGE_BIT_WT) | ||
90 | #define _PAGE_DIRTY (1 << _PAGE_BIT_DIRTY) | ||
91 | #define _PAGE_EXECUTE (1 << _PAGE_BIT_EXECUTE) | ||
92 | #define _PAGE_RW (1 << _PAGE_BIT_RW) | ||
93 | #define _PAGE_USER (1 << _PAGE_BIT_USER) | ||
94 | #define _PAGE_BUFFER (1 << _PAGE_BIT_BUFFER) | ||
95 | #define _PAGE_GLOBAL (1 << _PAGE_BIT_GLOBAL) | ||
96 | #define _PAGE_CACHABLE (1 << _PAGE_BIT_CACHABLE) | ||
97 | |||
98 | /* Software flags */ | ||
99 | #define _PAGE_ACCESSED (1 << _PAGE_BIT_ACCESSED) | ||
100 | #define _PAGE_PRESENT (1 << _PAGE_BIT_PRESENT) | ||
101 | |||
102 | /* | ||
103 | * Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is | ||
104 | * usually called _PAGE_PROTNONE on other architectures. | ||
105 | * | ||
106 | * XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If | ||
107 | * so, we can encode all possible page sizes (although we can't really | ||
108 | * support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED | ||
109 | * bits) | ||
110 | * | ||
111 | */ | ||
112 | #define _PAGE_TYPE_MASK ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1)) | ||
113 | #define _PAGE_TYPE_NONE (0 << _PAGE_BIT_SZ0) | ||
114 | #define _PAGE_TYPE_SMALL (1 << _PAGE_BIT_SZ0) | ||
115 | #define _PAGE_TYPE_MEDIUM (2 << _PAGE_BIT_SZ0) | ||
116 | #define _PAGE_TYPE_LARGE (3 << _PAGE_BIT_SZ0) | ||
117 | |||
118 | /* | ||
119 | * Mask which drop software flags. We currently can't handle more than | ||
120 | * 512 MiB of physical memory, so we can use bits 29-31 for other | ||
121 | * stuff. With a fixed 4K page size, we can use bits 10-11 as well as | ||
122 | * bits 2-3 (SZ) | ||
123 | */ | ||
124 | #define _PAGE_FLAGS_HARDWARE_MASK 0xfffff3ff | ||
125 | |||
126 | #define _PAGE_FLAGS_CACHE_MASK (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT) | ||
127 | |||
128 | /* Flags that may be modified by software */ | ||
129 | #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \ | ||
130 | | _PAGE_FLAGS_CACHE_MASK) | ||
131 | |||
132 | #define _PAGE_FLAGS_READ (_PAGE_CACHABLE | _PAGE_BUFFER) | ||
133 | #define _PAGE_FLAGS_WRITE (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY) | ||
134 | |||
135 | #define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \ | ||
136 | | _PAGE_ACCESSED) | ||
137 | |||
138 | #define PAGE_NONE (_PAGE_ACCESSED | _PAGE_TYPE_NONE) | ||
139 | #define PAGE_READ (_PAGE_FLAGS_READ | _PAGE_USER) | ||
140 | #define PAGE_EXEC (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER) | ||
141 | #define PAGE_WRITE (_PAGE_FLAGS_WRITE | _PAGE_USER) | ||
142 | #define PAGE_KERNEL _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL) | ||
143 | #define PAGE_KERNEL_RO _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL) | ||
144 | |||
145 | #define _PAGE_P(x) _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY)) | ||
146 | #define _PAGE_S(x) _PAGE_NORMAL(x) | ||
147 | |||
148 | #define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ) | ||
149 | #define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ) | ||
150 | |||
151 | #ifndef __ASSEMBLY__ | ||
152 | /* | ||
153 | * The hardware supports flags for write- and execute access. Read is | ||
154 | * always allowed if the page is loaded into the TLB, so the "-w-", | ||
155 | * "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx", | ||
156 | * respectively. | ||
157 | * | ||
158 | * The "---" case is handled by software; the page will simply not be | ||
159 | * loaded into the TLB if the page type is _PAGE_TYPE_NONE. | ||
160 | */ | ||
161 | |||
162 | #define __P000 __pgprot(PAGE_NONE) | ||
163 | #define __P001 _PAGE_P(PAGE_READ) | ||
164 | #define __P010 _PAGE_P(PAGE_WRITE) | ||
165 | #define __P011 _PAGE_P(PAGE_WRITE | PAGE_READ) | ||
166 | #define __P100 _PAGE_P(PAGE_EXEC) | ||
167 | #define __P101 _PAGE_P(PAGE_EXEC | PAGE_READ) | ||
168 | #define __P110 _PAGE_P(PAGE_EXEC | PAGE_WRITE) | ||
169 | #define __P111 _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ) | ||
170 | |||
171 | #define __S000 __pgprot(PAGE_NONE) | ||
172 | #define __S001 _PAGE_S(PAGE_READ) | ||
173 | #define __S010 _PAGE_S(PAGE_WRITE) | ||
174 | #define __S011 _PAGE_S(PAGE_WRITE | PAGE_READ) | ||
175 | #define __S100 _PAGE_S(PAGE_EXEC) | ||
176 | #define __S101 _PAGE_S(PAGE_EXEC | PAGE_READ) | ||
177 | #define __S110 _PAGE_S(PAGE_EXEC | PAGE_WRITE) | ||
178 | #define __S111 _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ) | ||
179 | |||
180 | #define pte_none(x) (!pte_val(x)) | ||
181 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) | ||
182 | |||
183 | #define pte_clear(mm,addr,xp) \ | ||
184 | do { \ | ||
185 | set_pte_at(mm, addr, xp, __pte(0)); \ | ||
186 | } while (0) | ||
187 | |||
188 | /* | ||
189 | * The following only work if pte_present() is true. | ||
190 | * Undefined behaviour if not.. | ||
191 | */ | ||
192 | static inline int pte_write(pte_t pte) | ||
193 | { | ||
194 | return pte_val(pte) & _PAGE_RW; | ||
195 | } | ||
196 | static inline int pte_dirty(pte_t pte) | ||
197 | { | ||
198 | return pte_val(pte) & _PAGE_DIRTY; | ||
199 | } | ||
200 | static inline int pte_young(pte_t pte) | ||
201 | { | ||
202 | return pte_val(pte) & _PAGE_ACCESSED; | ||
203 | } | ||
204 | static inline int pte_special(pte_t pte) | ||
205 | { | ||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | /* Mutator functions for PTE bits */ | ||
210 | static inline pte_t pte_wrprotect(pte_t pte) | ||
211 | { | ||
212 | set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); | ||
213 | return pte; | ||
214 | } | ||
215 | static inline pte_t pte_mkclean(pte_t pte) | ||
216 | { | ||
217 | set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); | ||
218 | return pte; | ||
219 | } | ||
220 | static inline pte_t pte_mkold(pte_t pte) | ||
221 | { | ||
222 | set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); | ||
223 | return pte; | ||
224 | } | ||
225 | static inline pte_t pte_mkwrite(pte_t pte) | ||
226 | { | ||
227 | set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); | ||
228 | return pte; | ||
229 | } | ||
230 | static inline pte_t pte_mkdirty(pte_t pte) | ||
231 | { | ||
232 | set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); | ||
233 | return pte; | ||
234 | } | ||
235 | static inline pte_t pte_mkyoung(pte_t pte) | ||
236 | { | ||
237 | set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); | ||
238 | return pte; | ||
239 | } | ||
240 | static inline pte_t pte_mkspecial(pte_t pte) | ||
241 | { | ||
242 | return pte; | ||
243 | } | ||
244 | |||
245 | #define pmd_none(x) (!pmd_val(x)) | ||
246 | #define pmd_present(x) (pmd_val(x)) | ||
247 | |||
248 | static inline void pmd_clear(pmd_t *pmdp) | ||
249 | { | ||
250 | set_pmd(pmdp, __pmd(0)); | ||
251 | } | ||
252 | |||
253 | #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) | ||
254 | |||
255 | /* | ||
256 | * Permanent address of a page. We don't support highmem, so this is | ||
257 | * trivial. | ||
258 | */ | ||
259 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | ||
260 | #define pte_page(x) (pfn_to_page(pte_pfn(x))) | ||
261 | |||
262 | /* | ||
263 | * Mark the prot value as uncacheable and unbufferable | ||
264 | */ | ||
265 | #define pgprot_noncached(prot) \ | ||
266 | __pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE)) | ||
267 | |||
268 | /* | ||
269 | * Mark the prot value as uncacheable but bufferable | ||
270 | */ | ||
271 | #define pgprot_writecombine(prot) \ | ||
272 | __pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER) | ||
273 | |||
274 | /* | ||
275 | * Conversion functions: convert a page and protection to a page entry, | ||
276 | * and a page entry and page directory to the page they refer to. | ||
277 | * | ||
278 | * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) | ||
279 | */ | ||
280 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | ||
281 | |||
282 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
283 | { | ||
284 | set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | ||
285 | | pgprot_val(newprot))); | ||
286 | return pte; | ||
287 | } | ||
288 | |||
289 | #define page_pte(page) page_pte_prot(page, __pgprot(0)) | ||
290 | |||
291 | #define pmd_page_vaddr(pmd) pmd_val(pmd) | ||
292 | #define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) | ||
293 | |||
294 | /* to find an entry in a page-table-directory. */ | ||
295 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) \ | ||
296 | & (PTRS_PER_PGD - 1)) | ||
297 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) | ||
298 | |||
299 | /* to find an entry in a kernel page-table-directory */ | ||
300 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
301 | |||
302 | /* Find an entry in the third-level page table.. */ | ||
303 | #define pte_index(address) \ | ||
304 | ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
305 | #define pte_offset(dir, address) \ | ||
306 | ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) | ||
307 | #define pte_offset_kernel(dir, address) \ | ||
308 | ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) | ||
309 | #define pte_offset_map(dir, address) pte_offset_kernel(dir, address) | ||
310 | #define pte_unmap(pte) do { } while (0) | ||
311 | |||
312 | struct vm_area_struct; | ||
313 | extern void update_mmu_cache(struct vm_area_struct * vma, | ||
314 | unsigned long address, pte_t *ptep); | ||
315 | |||
316 | /* | ||
317 | * Encode and decode a swap entry | ||
318 | * | ||
319 | * Constraints: | ||
320 | * _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE) | ||
321 | * _PAGE_PRESENT at bit 10 | ||
322 | * | ||
323 | * We encode the type into bits 4-9 and offset into bits 11-31. This | ||
324 | * gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per | ||
325 | * device, and 64 possible types. | ||
326 | * | ||
327 | * NOTE: We should set ZEROs at the position of _PAGE_PRESENT | ||
328 | * and _PAGE_PROTNONE bits | ||
329 | */ | ||
330 | #define __swp_type(x) (((x).val >> 4) & 0x3f) | ||
331 | #define __swp_offset(x) ((x).val >> 11) | ||
332 | #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) }) | ||
333 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
334 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
335 | |||
336 | typedef pte_t *pte_addr_t; | ||
337 | |||
338 | #define kern_addr_valid(addr) (1) | ||
339 | |||
340 | /* No page table caches to initialize (?) */ | ||
341 | #define pgtable_cache_init() do { } while(0) | ||
342 | |||
343 | #include <asm-generic/pgtable.h> | ||
344 | |||
345 | #endif /* !__ASSEMBLY__ */ | ||
346 | |||
347 | #endif /* __ASM_AVR32_PGTABLE_H */ | ||
diff --git a/arch/avr32/include/asm/processor.h b/arch/avr32/include/asm/processor.h deleted file mode 100644 index 972adcc1e8f4..000000000000 --- a/arch/avr32/include/asm/processor.h +++ /dev/null | |||
@@ -1,166 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_PROCESSOR_H | ||
9 | #define __ASM_AVR32_PROCESSOR_H | ||
10 | |||
11 | #include <asm/page.h> | ||
12 | #include <asm/cache.h> | ||
13 | |||
14 | #define TASK_SIZE 0x80000000 | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | #define STACK_TOP TASK_SIZE | ||
18 | #define STACK_TOP_MAX STACK_TOP | ||
19 | #endif | ||
20 | |||
21 | #ifndef __ASSEMBLY__ | ||
22 | |||
23 | static inline void *current_text_addr(void) | ||
24 | { | ||
25 | register void *pc asm("pc"); | ||
26 | return pc; | ||
27 | } | ||
28 | |||
29 | enum arch_type { | ||
30 | ARCH_AVR32A, | ||
31 | ARCH_AVR32B, | ||
32 | ARCH_MAX | ||
33 | }; | ||
34 | |||
35 | enum cpu_type { | ||
36 | CPU_MORGAN, | ||
37 | CPU_AT32AP, | ||
38 | CPU_MAX | ||
39 | }; | ||
40 | |||
41 | enum tlb_config { | ||
42 | TLB_NONE, | ||
43 | TLB_SPLIT, | ||
44 | TLB_UNIFIED, | ||
45 | TLB_INVALID | ||
46 | }; | ||
47 | |||
48 | #define AVR32_FEATURE_RMW (1 << 0) | ||
49 | #define AVR32_FEATURE_DSP (1 << 1) | ||
50 | #define AVR32_FEATURE_SIMD (1 << 2) | ||
51 | #define AVR32_FEATURE_OCD (1 << 3) | ||
52 | #define AVR32_FEATURE_PCTR (1 << 4) | ||
53 | #define AVR32_FEATURE_JAVA (1 << 5) | ||
54 | #define AVR32_FEATURE_FPU (1 << 6) | ||
55 | |||
56 | struct avr32_cpuinfo { | ||
57 | struct clk *clk; | ||
58 | unsigned long loops_per_jiffy; | ||
59 | enum arch_type arch_type; | ||
60 | enum cpu_type cpu_type; | ||
61 | unsigned short arch_revision; | ||
62 | unsigned short cpu_revision; | ||
63 | enum tlb_config tlb_config; | ||
64 | unsigned long features; | ||
65 | u32 device_id; | ||
66 | |||
67 | struct cache_info icache; | ||
68 | struct cache_info dcache; | ||
69 | }; | ||
70 | |||
71 | static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu) | ||
72 | { | ||
73 | return (cpu->device_id >> 1) & 0x7f; | ||
74 | } | ||
75 | static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu) | ||
76 | { | ||
77 | return (cpu->device_id >> 12) & 0xffff; | ||
78 | } | ||
79 | static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu) | ||
80 | { | ||
81 | return (cpu->device_id >> 28) & 0x0f; | ||
82 | } | ||
83 | |||
84 | extern struct avr32_cpuinfo boot_cpu_data; | ||
85 | |||
86 | /* No SMP support so far */ | ||
87 | #define current_cpu_data boot_cpu_data | ||
88 | |||
89 | /* This decides where the kernel will search for a free chunk of vm | ||
90 | * space during mmap's | ||
91 | */ | ||
92 | #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3)) | ||
93 | |||
94 | #define cpu_relax() barrier() | ||
95 | #define cpu_sync_pipeline() asm volatile("sub pc, -2" : : : "memory") | ||
96 | |||
97 | struct cpu_context { | ||
98 | unsigned long sr; | ||
99 | unsigned long pc; | ||
100 | unsigned long ksp; /* Kernel stack pointer */ | ||
101 | unsigned long r7; | ||
102 | unsigned long r6; | ||
103 | unsigned long r5; | ||
104 | unsigned long r4; | ||
105 | unsigned long r3; | ||
106 | unsigned long r2; | ||
107 | unsigned long r1; | ||
108 | unsigned long r0; | ||
109 | }; | ||
110 | |||
111 | /* This struct contains the CPU context as stored by switch_to() */ | ||
112 | struct thread_struct { | ||
113 | struct cpu_context cpu_context; | ||
114 | unsigned long single_step_addr; | ||
115 | u16 single_step_insn; | ||
116 | }; | ||
117 | |||
118 | #define INIT_THREAD { \ | ||
119 | .cpu_context = { \ | ||
120 | .ksp = sizeof(init_stack) + (long)&init_stack, \ | ||
121 | }, \ | ||
122 | } | ||
123 | |||
124 | /* | ||
125 | * Do necessary setup to start up a newly executed thread. | ||
126 | */ | ||
127 | #define start_thread(regs, new_pc, new_sp) \ | ||
128 | do { \ | ||
129 | memset(regs, 0, sizeof(*regs)); \ | ||
130 | regs->sr = MODE_USER; \ | ||
131 | regs->pc = new_pc & ~1; \ | ||
132 | regs->sp = new_sp; \ | ||
133 | } while(0) | ||
134 | |||
135 | struct task_struct; | ||
136 | |||
137 | /* Free all resources held by a thread */ | ||
138 | extern void release_thread(struct task_struct *); | ||
139 | |||
140 | /* Return saved PC of a blocked thread */ | ||
141 | #define thread_saved_pc(tsk) ((tsk)->thread.cpu_context.pc) | ||
142 | |||
143 | struct pt_regs; | ||
144 | extern unsigned long get_wchan(struct task_struct *p); | ||
145 | extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl); | ||
146 | extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp, | ||
147 | struct pt_regs *regs, const char *log_lvl); | ||
148 | |||
149 | #define task_pt_regs(p) \ | ||
150 | ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1) | ||
151 | |||
152 | #define KSTK_EIP(tsk) ((tsk)->thread.cpu_context.pc) | ||
153 | #define KSTK_ESP(tsk) ((tsk)->thread.cpu_context.ksp) | ||
154 | |||
155 | #define ARCH_HAS_PREFETCH | ||
156 | |||
157 | static inline void prefetch(const void *x) | ||
158 | { | ||
159 | const char *c = x; | ||
160 | asm volatile("pref %0" : : "r"(c)); | ||
161 | } | ||
162 | #define PREFETCH_STRIDE L1_CACHE_BYTES | ||
163 | |||
164 | #endif /* __ASSEMBLY__ */ | ||
165 | |||
166 | #endif /* __ASM_AVR32_PROCESSOR_H */ | ||
diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h deleted file mode 100644 index 630e4f9bf5f0..000000000000 --- a/arch/avr32/include/asm/ptrace.h +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_PTRACE_H | ||
9 | #define __ASM_AVR32_PTRACE_H | ||
10 | |||
11 | #include <uapi/asm/ptrace.h> | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | |||
15 | #include <asm/ocd.h> | ||
16 | |||
17 | #define arch_has_single_step() (1) | ||
18 | |||
19 | #define arch_ptrace_attach(child) ocd_enable(child) | ||
20 | |||
21 | #define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) | ||
22 | #define instruction_pointer(regs) ((regs)->pc) | ||
23 | #define profile_pc(regs) instruction_pointer(regs) | ||
24 | #define user_stack_pointer(regs) ((regs)->sp) | ||
25 | |||
26 | static __inline__ int valid_user_regs(struct pt_regs *regs) | ||
27 | { | ||
28 | /* | ||
29 | * Some of the Java bits might be acceptable if/when we | ||
30 | * implement some support for that stuff... | ||
31 | */ | ||
32 | if ((regs->sr & 0xffff0000) == 0) | ||
33 | return 1; | ||
34 | |||
35 | /* | ||
36 | * Force status register flags to be sane and report this | ||
37 | * illegal behaviour... | ||
38 | */ | ||
39 | regs->sr &= 0x0000ffff; | ||
40 | return 0; | ||
41 | } | ||
42 | |||
43 | |||
44 | #endif /* ! __ASSEMBLY__ */ | ||
45 | #endif /* __ASM_AVR32_PTRACE_H */ | ||
diff --git a/arch/avr32/include/asm/serial.h b/arch/avr32/include/asm/serial.h deleted file mode 100644 index 5ecaebc22b02..000000000000 --- a/arch/avr32/include/asm/serial.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef _ASM_SERIAL_H | ||
2 | #define _ASM_SERIAL_H | ||
3 | |||
4 | /* | ||
5 | * This assumes you have a 1.8432 MHz clock for your UART. | ||
6 | * | ||
7 | * It'd be nice if someone built a serial card with a 24.576 MHz | ||
8 | * clock, since the 16550A is capable of handling a top speed of 1.5 | ||
9 | * megabits/second; but this requires the faster clock. | ||
10 | */ | ||
11 | #define BASE_BAUD (1843200 / 16) | ||
12 | |||
13 | #endif /* _ASM_SERIAL_H */ | ||
diff --git a/arch/avr32/include/asm/setup.h b/arch/avr32/include/asm/setup.h deleted file mode 100644 index 73490ae0c476..000000000000 --- a/arch/avr32/include/asm/setup.h +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * Based on linux/include/asm-arm/setup.h | ||
5 | * Copyright (C) 1997-1999 Russell King | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef __ASM_AVR32_SETUP_H__ | ||
12 | #define __ASM_AVR32_SETUP_H__ | ||
13 | |||
14 | #include <uapi/asm/setup.h> | ||
15 | |||
16 | |||
17 | /* Magic number indicating that a tag table is present */ | ||
18 | #define ATAG_MAGIC 0xa2a25441 | ||
19 | |||
20 | #ifndef __ASSEMBLY__ | ||
21 | |||
22 | /* | ||
23 | * Generic memory range, used by several tags. | ||
24 | * | ||
25 | * addr is always physical. | ||
26 | * size is measured in bytes. | ||
27 | * next is for use by the OS, e.g. for grouping regions into | ||
28 | * linked lists. | ||
29 | */ | ||
30 | struct tag_mem_range { | ||
31 | u32 addr; | ||
32 | u32 size; | ||
33 | struct tag_mem_range * next; | ||
34 | }; | ||
35 | |||
36 | /* The list ends with an ATAG_NONE node. */ | ||
37 | #define ATAG_NONE 0x00000000 | ||
38 | |||
39 | struct tag_header { | ||
40 | u32 size; | ||
41 | u32 tag; | ||
42 | }; | ||
43 | |||
44 | /* The list must start with an ATAG_CORE node */ | ||
45 | #define ATAG_CORE 0x54410001 | ||
46 | |||
47 | struct tag_core { | ||
48 | u32 flags; | ||
49 | u32 pagesize; | ||
50 | u32 rootdev; | ||
51 | }; | ||
52 | |||
53 | /* it is allowed to have multiple ATAG_MEM nodes */ | ||
54 | #define ATAG_MEM 0x54410002 | ||
55 | /* ATAG_MEM uses tag_mem_range */ | ||
56 | |||
57 | /* command line: \0 terminated string */ | ||
58 | #define ATAG_CMDLINE 0x54410003 | ||
59 | |||
60 | struct tag_cmdline { | ||
61 | char cmdline[1]; /* this is the minimum size */ | ||
62 | }; | ||
63 | |||
64 | /* Ramdisk image (may be compressed) */ | ||
65 | #define ATAG_RDIMG 0x54410004 | ||
66 | /* ATAG_RDIMG uses tag_mem_range */ | ||
67 | |||
68 | /* Information about various clocks present in the system */ | ||
69 | #define ATAG_CLOCK 0x54410005 | ||
70 | |||
71 | struct tag_clock { | ||
72 | u32 clock_id; /* Which clock are we talking about? */ | ||
73 | u32 clock_flags; /* Special features */ | ||
74 | u64 clock_hz; /* Clock speed in Hz */ | ||
75 | }; | ||
76 | |||
77 | /* The clock types we know about */ | ||
78 | #define CLOCK_BOOTCPU 0 | ||
79 | |||
80 | /* Memory reserved for the system (e.g. the bootloader) */ | ||
81 | #define ATAG_RSVD_MEM 0x54410006 | ||
82 | /* ATAG_RSVD_MEM uses tag_mem_range */ | ||
83 | |||
84 | /* Ethernet information */ | ||
85 | |||
86 | #define ATAG_ETHERNET 0x54410007 | ||
87 | |||
88 | struct tag_ethernet { | ||
89 | u8 mac_index; | ||
90 | u8 mii_phy_addr; | ||
91 | u8 hw_address[6]; | ||
92 | }; | ||
93 | |||
94 | #define ETH_INVALID_PHY 0xff | ||
95 | |||
96 | /* board information */ | ||
97 | #define ATAG_BOARDINFO 0x54410008 | ||
98 | |||
99 | struct tag_boardinfo { | ||
100 | u32 board_number; | ||
101 | }; | ||
102 | |||
103 | struct tag { | ||
104 | struct tag_header hdr; | ||
105 | union { | ||
106 | struct tag_core core; | ||
107 | struct tag_mem_range mem_range; | ||
108 | struct tag_cmdline cmdline; | ||
109 | struct tag_clock clock; | ||
110 | struct tag_ethernet ethernet; | ||
111 | struct tag_boardinfo boardinfo; | ||
112 | } u; | ||
113 | }; | ||
114 | |||
115 | struct tagtable { | ||
116 | u32 tag; | ||
117 | int (*parse)(struct tag *); | ||
118 | }; | ||
119 | |||
120 | #define __tag __used __attribute__((__section__(".taglist.init"))) | ||
121 | #define __tagtable(tag, fn) \ | ||
122 | static struct tagtable __tagtable_##fn __tag = { tag, fn } | ||
123 | |||
124 | #define tag_member_present(tag,member) \ | ||
125 | ((unsigned long)(&((struct tag *)0L)->member + 1) \ | ||
126 | <= (tag)->hdr.size * 4) | ||
127 | |||
128 | #define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size)) | ||
129 | #define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) | ||
130 | |||
131 | #define for_each_tag(t,base) \ | ||
132 | for (t = base; t->hdr.size; t = tag_next(t)) | ||
133 | |||
134 | extern struct tag *bootloader_tags; | ||
135 | |||
136 | extern resource_size_t fbmem_start; | ||
137 | extern resource_size_t fbmem_size; | ||
138 | extern u32 board_number; | ||
139 | |||
140 | void setup_processor(void); | ||
141 | |||
142 | #endif /* !__ASSEMBLY__ */ | ||
143 | |||
144 | #endif /* __ASM_AVR32_SETUP_H__ */ | ||
diff --git a/arch/avr32/include/asm/shmparam.h b/arch/avr32/include/asm/shmparam.h deleted file mode 100644 index 3681266c77f7..000000000000 --- a/arch/avr32/include/asm/shmparam.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_SHMPARAM_H | ||
2 | #define __ASM_AVR32_SHMPARAM_H | ||
3 | |||
4 | #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ | ||
5 | |||
6 | #endif /* __ASM_AVR32_SHMPARAM_H */ | ||
diff --git a/arch/avr32/include/asm/signal.h b/arch/avr32/include/asm/signal.h deleted file mode 100644 index d875eb6a3f3c..000000000000 --- a/arch/avr32/include/asm/signal.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_SIGNAL_H | ||
9 | #define __ASM_AVR32_SIGNAL_H | ||
10 | |||
11 | #include <uapi/asm/signal.h> | ||
12 | |||
13 | /* Most things should be clean enough to redefine this at will, if care | ||
14 | is taken to make libc match. */ | ||
15 | |||
16 | #define _NSIG 64 | ||
17 | #define _NSIG_BPW 32 | ||
18 | #define _NSIG_WORDS (_NSIG / _NSIG_BPW) | ||
19 | |||
20 | typedef unsigned long old_sigset_t; /* at least 32 bits */ | ||
21 | |||
22 | typedef struct { | ||
23 | unsigned long sig[_NSIG_WORDS]; | ||
24 | } sigset_t; | ||
25 | |||
26 | #define __ARCH_HAS_SA_RESTORER | ||
27 | |||
28 | #include <asm/sigcontext.h> | ||
29 | #undef __HAVE_ARCH_SIG_BITOPS | ||
30 | |||
31 | #endif | ||
diff --git a/arch/avr32/include/asm/string.h b/arch/avr32/include/asm/string.h deleted file mode 100644 index c91a623cd585..000000000000 --- a/arch/avr32/include/asm/string.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_STRING_H | ||
9 | #define __ASM_AVR32_STRING_H | ||
10 | |||
11 | #define __HAVE_ARCH_MEMSET | ||
12 | extern void *memset(void *b, int c, size_t len); | ||
13 | |||
14 | #define __HAVE_ARCH_MEMCPY | ||
15 | extern void *memcpy(void *to, const void *from, size_t len); | ||
16 | |||
17 | #endif /* __ASM_AVR32_STRING_H */ | ||
diff --git a/arch/avr32/include/asm/switch_to.h b/arch/avr32/include/asm/switch_to.h deleted file mode 100644 index 6f00581c3d4f..000000000000 --- a/arch/avr32/include/asm/switch_to.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_SWITCH_TO_H | ||
9 | #define __ASM_AVR32_SWITCH_TO_H | ||
10 | |||
11 | /* | ||
12 | * Help PathFinder and other Nexus-compliant debuggers keep track of | ||
13 | * the current PID by emitting an Ownership Trace Message each time we | ||
14 | * switch task. | ||
15 | */ | ||
16 | #ifdef CONFIG_OWNERSHIP_TRACE | ||
17 | #include <asm/ocd.h> | ||
18 | #define ocd_switch(prev, next) \ | ||
19 | do { \ | ||
20 | ocd_write(PID, prev->pid); \ | ||
21 | ocd_write(PID, next->pid); \ | ||
22 | } while(0) | ||
23 | #else | ||
24 | #define ocd_switch(prev, next) | ||
25 | #endif | ||
26 | |||
27 | /* | ||
28 | * switch_to(prev, next, last) should switch from task `prev' to task | ||
29 | * `next'. `prev' will never be the same as `next'. | ||
30 | * | ||
31 | * We just delegate everything to the __switch_to assembly function, | ||
32 | * which is implemented in arch/avr32/kernel/switch_to.S | ||
33 | * | ||
34 | * mb() tells GCC not to cache `current' across this call. | ||
35 | */ | ||
36 | struct cpu_context; | ||
37 | struct task_struct; | ||
38 | extern struct task_struct *__switch_to(struct task_struct *, | ||
39 | struct cpu_context *, | ||
40 | struct cpu_context *); | ||
41 | #define switch_to(prev, next, last) \ | ||
42 | do { \ | ||
43 | ocd_switch(prev, next); \ | ||
44 | last = __switch_to(prev, &prev->thread.cpu_context + 1, \ | ||
45 | &next->thread.cpu_context); \ | ||
46 | } while (0) | ||
47 | |||
48 | |||
49 | #endif /* __ASM_AVR32_SWITCH_TO_H */ | ||
diff --git a/arch/avr32/include/asm/syscalls.h b/arch/avr32/include/asm/syscalls.h deleted file mode 100644 index 244f2acab546..000000000000 --- a/arch/avr32/include/asm/syscalls.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * syscalls.h - Linux syscall interfaces (arch-specific) | ||
3 | * | ||
4 | * Copyright (c) 2008 Jaswinder Singh | ||
5 | * | ||
6 | * This file is released under the GPLv2. | ||
7 | * See the file COPYING for more details. | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_AVR32_SYSCALLS_H | ||
11 | #define _ASM_AVR32_SYSCALLS_H | ||
12 | |||
13 | #include <linux/compiler.h> | ||
14 | #include <linux/linkage.h> | ||
15 | #include <linux/types.h> | ||
16 | #include <linux/signal.h> | ||
17 | |||
18 | /* mm/cache.c */ | ||
19 | asmlinkage int sys_cacheflush(int, void __user *, size_t); | ||
20 | |||
21 | #endif /* _ASM_AVR32_SYSCALLS_H */ | ||
diff --git a/arch/avr32/include/asm/sysreg.h b/arch/avr32/include/asm/sysreg.h deleted file mode 100644 index d4e0950170ca..000000000000 --- a/arch/avr32/include/asm/sysreg.h +++ /dev/null | |||
@@ -1,291 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 System Registers | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_AVR32_SYSREG_H | ||
11 | #define __ASM_AVR32_SYSREG_H | ||
12 | |||
13 | /* sysreg register offsets */ | ||
14 | #define SYSREG_SR 0x0000 | ||
15 | #define SYSREG_EVBA 0x0004 | ||
16 | #define SYSREG_ACBA 0x0008 | ||
17 | #define SYSREG_CPUCR 0x000c | ||
18 | #define SYSREG_ECR 0x0010 | ||
19 | #define SYSREG_RSR_SUP 0x0014 | ||
20 | #define SYSREG_RSR_INT0 0x0018 | ||
21 | #define SYSREG_RSR_INT1 0x001c | ||
22 | #define SYSREG_RSR_INT2 0x0020 | ||
23 | #define SYSREG_RSR_INT3 0x0024 | ||
24 | #define SYSREG_RSR_EX 0x0028 | ||
25 | #define SYSREG_RSR_NMI 0x002c | ||
26 | #define SYSREG_RSR_DBG 0x0030 | ||
27 | #define SYSREG_RAR_SUP 0x0034 | ||
28 | #define SYSREG_RAR_INT0 0x0038 | ||
29 | #define SYSREG_RAR_INT1 0x003c | ||
30 | #define SYSREG_RAR_INT2 0x0040 | ||
31 | #define SYSREG_RAR_INT3 0x0044 | ||
32 | #define SYSREG_RAR_EX 0x0048 | ||
33 | #define SYSREG_RAR_NMI 0x004c | ||
34 | #define SYSREG_RAR_DBG 0x0050 | ||
35 | #define SYSREG_JECR 0x0054 | ||
36 | #define SYSREG_JOSP 0x0058 | ||
37 | #define SYSREG_JAVA_LV0 0x005c | ||
38 | #define SYSREG_JAVA_LV1 0x0060 | ||
39 | #define SYSREG_JAVA_LV2 0x0064 | ||
40 | #define SYSREG_JAVA_LV3 0x0068 | ||
41 | #define SYSREG_JAVA_LV4 0x006c | ||
42 | #define SYSREG_JAVA_LV5 0x0070 | ||
43 | #define SYSREG_JAVA_LV6 0x0074 | ||
44 | #define SYSREG_JAVA_LV7 0x0078 | ||
45 | #define SYSREG_JTBA 0x007c | ||
46 | #define SYSREG_JBCR 0x0080 | ||
47 | #define SYSREG_CONFIG0 0x0100 | ||
48 | #define SYSREG_CONFIG1 0x0104 | ||
49 | #define SYSREG_COUNT 0x0108 | ||
50 | #define SYSREG_COMPARE 0x010c | ||
51 | #define SYSREG_TLBEHI 0x0110 | ||
52 | #define SYSREG_TLBELO 0x0114 | ||
53 | #define SYSREG_PTBR 0x0118 | ||
54 | #define SYSREG_TLBEAR 0x011c | ||
55 | #define SYSREG_MMUCR 0x0120 | ||
56 | #define SYSREG_TLBARLO 0x0124 | ||
57 | #define SYSREG_TLBARHI 0x0128 | ||
58 | #define SYSREG_PCCNT 0x012c | ||
59 | #define SYSREG_PCNT0 0x0130 | ||
60 | #define SYSREG_PCNT1 0x0134 | ||
61 | #define SYSREG_PCCR 0x0138 | ||
62 | #define SYSREG_BEAR 0x013c | ||
63 | #define SYSREG_SABAL 0x0300 | ||
64 | #define SYSREG_SABAH 0x0304 | ||
65 | #define SYSREG_SABD 0x0308 | ||
66 | |||
67 | /* Bitfields in SR */ | ||
68 | #define SYSREG_SR_C_OFFSET 0 | ||
69 | #define SYSREG_SR_C_SIZE 1 | ||
70 | #define SYSREG_Z_OFFSET 1 | ||
71 | #define SYSREG_Z_SIZE 1 | ||
72 | #define SYSREG_SR_N_OFFSET 2 | ||
73 | #define SYSREG_SR_N_SIZE 1 | ||
74 | #define SYSREG_SR_V_OFFSET 3 | ||
75 | #define SYSREG_SR_V_SIZE 1 | ||
76 | #define SYSREG_Q_OFFSET 4 | ||
77 | #define SYSREG_Q_SIZE 1 | ||
78 | #define SYSREG_L_OFFSET 5 | ||
79 | #define SYSREG_L_SIZE 1 | ||
80 | #define SYSREG_T_OFFSET 14 | ||
81 | #define SYSREG_T_SIZE 1 | ||
82 | #define SYSREG_SR_R_OFFSET 15 | ||
83 | #define SYSREG_SR_R_SIZE 1 | ||
84 | #define SYSREG_GM_OFFSET 16 | ||
85 | #define SYSREG_GM_SIZE 1 | ||
86 | #define SYSREG_I0M_OFFSET 17 | ||
87 | #define SYSREG_I0M_SIZE 1 | ||
88 | #define SYSREG_I1M_OFFSET 18 | ||
89 | #define SYSREG_I1M_SIZE 1 | ||
90 | #define SYSREG_I2M_OFFSET 19 | ||
91 | #define SYSREG_I2M_SIZE 1 | ||
92 | #define SYSREG_I3M_OFFSET 20 | ||
93 | #define SYSREG_I3M_SIZE 1 | ||
94 | #define SYSREG_EM_OFFSET 21 | ||
95 | #define SYSREG_EM_SIZE 1 | ||
96 | #define SYSREG_MODE_OFFSET 22 | ||
97 | #define SYSREG_MODE_SIZE 3 | ||
98 | #define SYSREG_M0_OFFSET 22 | ||
99 | #define SYSREG_M0_SIZE 1 | ||
100 | #define SYSREG_M1_OFFSET 23 | ||
101 | #define SYSREG_M1_SIZE 1 | ||
102 | #define SYSREG_M2_OFFSET 24 | ||
103 | #define SYSREG_M2_SIZE 1 | ||
104 | #define SYSREG_SR_D_OFFSET 26 | ||
105 | #define SYSREG_SR_D_SIZE 1 | ||
106 | #define SYSREG_DM_OFFSET 27 | ||
107 | #define SYSREG_DM_SIZE 1 | ||
108 | #define SYSREG_SR_J_OFFSET 28 | ||
109 | #define SYSREG_SR_J_SIZE 1 | ||
110 | #define SYSREG_H_OFFSET 29 | ||
111 | #define SYSREG_H_SIZE 1 | ||
112 | |||
113 | /* Bitfields in CPUCR */ | ||
114 | #define SYSREG_BI_OFFSET 0 | ||
115 | #define SYSREG_BI_SIZE 1 | ||
116 | #define SYSREG_BE_OFFSET 1 | ||
117 | #define SYSREG_BE_SIZE 1 | ||
118 | #define SYSREG_FE_OFFSET 2 | ||
119 | #define SYSREG_FE_SIZE 1 | ||
120 | #define SYSREG_RE_OFFSET 3 | ||
121 | #define SYSREG_RE_SIZE 1 | ||
122 | #define SYSREG_IBE_OFFSET 4 | ||
123 | #define SYSREG_IBE_SIZE 1 | ||
124 | #define SYSREG_IEE_OFFSET 5 | ||
125 | #define SYSREG_IEE_SIZE 1 | ||
126 | |||
127 | /* Bitfields in CONFIG0 */ | ||
128 | #define SYSREG_CONFIG0_R_OFFSET 0 | ||
129 | #define SYSREG_CONFIG0_R_SIZE 1 | ||
130 | #define SYSREG_CONFIG0_D_OFFSET 1 | ||
131 | #define SYSREG_CONFIG0_D_SIZE 1 | ||
132 | #define SYSREG_CONFIG0_S_OFFSET 2 | ||
133 | #define SYSREG_CONFIG0_S_SIZE 1 | ||
134 | #define SYSREG_CONFIG0_O_OFFSET 3 | ||
135 | #define SYSREG_CONFIG0_O_SIZE 1 | ||
136 | #define SYSREG_CONFIG0_P_OFFSET 4 | ||
137 | #define SYSREG_CONFIG0_P_SIZE 1 | ||
138 | #define SYSREG_CONFIG0_J_OFFSET 5 | ||
139 | #define SYSREG_CONFIG0_J_SIZE 1 | ||
140 | #define SYSREG_CONFIG0_F_OFFSET 6 | ||
141 | #define SYSREG_CONFIG0_F_SIZE 1 | ||
142 | #define SYSREG_MMUT_OFFSET 7 | ||
143 | #define SYSREG_MMUT_SIZE 3 | ||
144 | #define SYSREG_AR_OFFSET 10 | ||
145 | #define SYSREG_AR_SIZE 3 | ||
146 | #define SYSREG_AT_OFFSET 13 | ||
147 | #define SYSREG_AT_SIZE 3 | ||
148 | #define SYSREG_PROCESSORREVISION_OFFSET 16 | ||
149 | #define SYSREG_PROCESSORREVISION_SIZE 8 | ||
150 | #define SYSREG_PROCESSORID_OFFSET 24 | ||
151 | #define SYSREG_PROCESSORID_SIZE 8 | ||
152 | |||
153 | /* Bitfields in CONFIG1 */ | ||
154 | #define SYSREG_DASS_OFFSET 0 | ||
155 | #define SYSREG_DASS_SIZE 3 | ||
156 | #define SYSREG_DLSZ_OFFSET 3 | ||
157 | #define SYSREG_DLSZ_SIZE 3 | ||
158 | #define SYSREG_DSET_OFFSET 6 | ||
159 | #define SYSREG_DSET_SIZE 4 | ||
160 | #define SYSREG_IASS_OFFSET 10 | ||
161 | #define SYSREG_IASS_SIZE 3 | ||
162 | #define SYSREG_ILSZ_OFFSET 13 | ||
163 | #define SYSREG_ILSZ_SIZE 3 | ||
164 | #define SYSREG_ISET_OFFSET 16 | ||
165 | #define SYSREG_ISET_SIZE 4 | ||
166 | #define SYSREG_DMMUSZ_OFFSET 20 | ||
167 | #define SYSREG_DMMUSZ_SIZE 6 | ||
168 | #define SYSREG_IMMUSZ_OFFSET 26 | ||
169 | #define SYSREG_IMMUSZ_SIZE 6 | ||
170 | |||
171 | /* Bitfields in TLBEHI */ | ||
172 | #define SYSREG_ASID_OFFSET 0 | ||
173 | #define SYSREG_ASID_SIZE 8 | ||
174 | #define SYSREG_TLBEHI_I_OFFSET 8 | ||
175 | #define SYSREG_TLBEHI_I_SIZE 1 | ||
176 | #define SYSREG_TLBEHI_V_OFFSET 9 | ||
177 | #define SYSREG_TLBEHI_V_SIZE 1 | ||
178 | #define SYSREG_VPN_OFFSET 10 | ||
179 | #define SYSREG_VPN_SIZE 22 | ||
180 | |||
181 | /* Bitfields in TLBELO */ | ||
182 | #define SYSREG_W_OFFSET 0 | ||
183 | #define SYSREG_W_SIZE 1 | ||
184 | #define SYSREG_TLBELO_D_OFFSET 1 | ||
185 | #define SYSREG_TLBELO_D_SIZE 1 | ||
186 | #define SYSREG_SZ_OFFSET 2 | ||
187 | #define SYSREG_SZ_SIZE 2 | ||
188 | #define SYSREG_AP_OFFSET 4 | ||
189 | #define SYSREG_AP_SIZE 3 | ||
190 | #define SYSREG_B_OFFSET 7 | ||
191 | #define SYSREG_B_SIZE 1 | ||
192 | #define SYSREG_G_OFFSET 8 | ||
193 | #define SYSREG_G_SIZE 1 | ||
194 | #define SYSREG_TLBELO_C_OFFSET 9 | ||
195 | #define SYSREG_TLBELO_C_SIZE 1 | ||
196 | #define SYSREG_PFN_OFFSET 10 | ||
197 | #define SYSREG_PFN_SIZE 22 | ||
198 | |||
199 | /* Bitfields in MMUCR */ | ||
200 | #define SYSREG_E_OFFSET 0 | ||
201 | #define SYSREG_E_SIZE 1 | ||
202 | #define SYSREG_M_OFFSET 1 | ||
203 | #define SYSREG_M_SIZE 1 | ||
204 | #define SYSREG_MMUCR_I_OFFSET 2 | ||
205 | #define SYSREG_MMUCR_I_SIZE 1 | ||
206 | #define SYSREG_MMUCR_N_OFFSET 3 | ||
207 | #define SYSREG_MMUCR_N_SIZE 1 | ||
208 | #define SYSREG_MMUCR_S_OFFSET 4 | ||
209 | #define SYSREG_MMUCR_S_SIZE 1 | ||
210 | #define SYSREG_DLA_OFFSET 8 | ||
211 | #define SYSREG_DLA_SIZE 6 | ||
212 | #define SYSREG_DRP_OFFSET 14 | ||
213 | #define SYSREG_DRP_SIZE 6 | ||
214 | #define SYSREG_ILA_OFFSET 20 | ||
215 | #define SYSREG_ILA_SIZE 6 | ||
216 | #define SYSREG_IRP_OFFSET 26 | ||
217 | #define SYSREG_IRP_SIZE 6 | ||
218 | |||
219 | /* Bitfields in PCCR */ | ||
220 | #define SYSREG_PCCR_E_OFFSET 0 | ||
221 | #define SYSREG_PCCR_E_SIZE 1 | ||
222 | #define SYSREG_PCCR_R_OFFSET 1 | ||
223 | #define SYSREG_PCCR_R_SIZE 1 | ||
224 | #define SYSREG_PCCR_C_OFFSET 2 | ||
225 | #define SYSREG_PCCR_C_SIZE 1 | ||
226 | #define SYSREG_PCCR_S_OFFSET 3 | ||
227 | #define SYSREG_PCCR_S_SIZE 1 | ||
228 | #define SYSREG_IEC_OFFSET 4 | ||
229 | #define SYSREG_IEC_SIZE 1 | ||
230 | #define SYSREG_IE0_OFFSET 5 | ||
231 | #define SYSREG_IE0_SIZE 1 | ||
232 | #define SYSREG_IE1_OFFSET 6 | ||
233 | #define SYSREG_IE1_SIZE 1 | ||
234 | #define SYSREG_FC_OFFSET 8 | ||
235 | #define SYSREG_FC_SIZE 1 | ||
236 | #define SYSREG_F0_OFFSET 9 | ||
237 | #define SYSREG_F0_SIZE 1 | ||
238 | #define SYSREG_F1_OFFSET 10 | ||
239 | #define SYSREG_F1_SIZE 1 | ||
240 | #define SYSREG_CONF0_OFFSET 12 | ||
241 | #define SYSREG_CONF0_SIZE 6 | ||
242 | #define SYSREG_CONF1_OFFSET 18 | ||
243 | #define SYSREG_CONF1_SIZE 6 | ||
244 | |||
245 | /* Constants for ECR */ | ||
246 | #define ECR_UNRECOVERABLE 0 | ||
247 | #define ECR_TLB_MULTIPLE 1 | ||
248 | #define ECR_BUS_ERROR_WRITE 2 | ||
249 | #define ECR_BUS_ERROR_READ 3 | ||
250 | #define ECR_NMI 4 | ||
251 | #define ECR_ADDR_ALIGN_X 5 | ||
252 | #define ECR_PROTECTION_X 6 | ||
253 | #define ECR_DEBUG 7 | ||
254 | #define ECR_ILLEGAL_OPCODE 8 | ||
255 | #define ECR_UNIMPL_INSTRUCTION 9 | ||
256 | #define ECR_PRIVILEGE_VIOLATION 10 | ||
257 | #define ECR_FPE 11 | ||
258 | #define ECR_COPROC_ABSENT 12 | ||
259 | #define ECR_ADDR_ALIGN_R 13 | ||
260 | #define ECR_ADDR_ALIGN_W 14 | ||
261 | #define ECR_PROTECTION_R 15 | ||
262 | #define ECR_PROTECTION_W 16 | ||
263 | #define ECR_DTLB_MODIFIED 17 | ||
264 | #define ECR_TLB_MISS_X 20 | ||
265 | #define ECR_TLB_MISS_R 24 | ||
266 | #define ECR_TLB_MISS_W 28 | ||
267 | |||
268 | /* Bit manipulation macros */ | ||
269 | #define SYSREG_BIT(name) \ | ||
270 | (1 << SYSREG_##name##_OFFSET) | ||
271 | #define SYSREG_BF(name,value) \ | ||
272 | (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \ | ||
273 | << SYSREG_##name##_OFFSET) | ||
274 | #define SYSREG_BFEXT(name,value)\ | ||
275 | (((value) >> SYSREG_##name##_OFFSET) \ | ||
276 | & ((1 << SYSREG_##name##_SIZE) - 1)) | ||
277 | #define SYSREG_BFINS(name,value,old) \ | ||
278 | (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \ | ||
279 | << SYSREG_##name##_OFFSET)) \ | ||
280 | | SYSREG_BF(name,value)) | ||
281 | |||
282 | /* Register access macros */ | ||
283 | #ifdef __CHECKER__ | ||
284 | extern unsigned long __builtin_mfsr(unsigned long reg); | ||
285 | extern void __builtin_mtsr(unsigned long reg, unsigned long value); | ||
286 | #endif | ||
287 | |||
288 | #define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg) | ||
289 | #define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value) | ||
290 | |||
291 | #endif /* __ASM_AVR32_SYSREG_H */ | ||
diff --git a/arch/avr32/include/asm/termios.h b/arch/avr32/include/asm/termios.h deleted file mode 100644 index 9d594376dbd6..000000000000 --- a/arch/avr32/include/asm/termios.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_TERMIOS_H | ||
9 | #define __ASM_AVR32_TERMIOS_H | ||
10 | |||
11 | #include <uapi/asm/termios.h> | ||
12 | |||
13 | /* intr=^C quit=^\ erase=del kill=^U | ||
14 | eof=^D vtime=\0 vmin=\1 sxtc=\0 | ||
15 | start=^Q stop=^S susp=^Z eol=\0 | ||
16 | reprint=^R discard=^U werase=^W lnext=^V | ||
17 | eol2=\0 | ||
18 | */ | ||
19 | #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" | ||
20 | |||
21 | #include <asm-generic/termios-base.h> | ||
22 | |||
23 | #endif /* __ASM_AVR32_TERMIOS_H */ | ||
diff --git a/arch/avr32/include/asm/thread_info.h b/arch/avr32/include/asm/thread_info.h deleted file mode 100644 index d4d3079541ea..000000000000 --- a/arch/avr32/include/asm/thread_info.h +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_THREAD_INFO_H | ||
9 | #define __ASM_AVR32_THREAD_INFO_H | ||
10 | |||
11 | #include <asm/page.h> | ||
12 | |||
13 | #define THREAD_SIZE_ORDER 1 | ||
14 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | #include <asm/types.h> | ||
18 | |||
19 | struct task_struct; | ||
20 | |||
21 | struct thread_info { | ||
22 | struct task_struct *task; /* main task structure */ | ||
23 | unsigned long flags; /* low level flags */ | ||
24 | __u32 cpu; | ||
25 | __s32 preempt_count; /* 0 => preemptable, <0 => BUG */ | ||
26 | __u32 rar_saved; /* return address... */ | ||
27 | __u32 rsr_saved; /* ...and status register | ||
28 | saved by debug handler | ||
29 | when setting up | ||
30 | trampoline */ | ||
31 | __u8 supervisor_stack[0]; | ||
32 | }; | ||
33 | |||
34 | #define INIT_THREAD_INFO(tsk) \ | ||
35 | { \ | ||
36 | .task = &tsk, \ | ||
37 | .flags = 0, \ | ||
38 | .cpu = 0, \ | ||
39 | .preempt_count = INIT_PREEMPT_COUNT, \ | ||
40 | } | ||
41 | |||
42 | #define init_thread_info (init_thread_union.thread_info) | ||
43 | #define init_stack (init_thread_union.stack) | ||
44 | |||
45 | /* | ||
46 | * Get the thread information struct from C. | ||
47 | * We do the usual trick and use the lower end of the stack for this | ||
48 | */ | ||
49 | static inline struct thread_info *current_thread_info(void) | ||
50 | { | ||
51 | unsigned long addr = ~(THREAD_SIZE - 1); | ||
52 | |||
53 | asm("and %0, sp" : "=r"(addr) : "0"(addr)); | ||
54 | return (struct thread_info *)addr; | ||
55 | } | ||
56 | |||
57 | #define get_thread_info(ti) get_task_struct((ti)->task) | ||
58 | #define put_thread_info(ti) put_task_struct((ti)->task) | ||
59 | |||
60 | #endif /* !__ASSEMBLY__ */ | ||
61 | |||
62 | /* | ||
63 | * Thread information flags | ||
64 | * - these are process state flags that various assembly files may need to access | ||
65 | * - pending work-to-be-done flags are in LSW | ||
66 | * - other flags in MSW | ||
67 | */ | ||
68 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
69 | #define TIF_SIGPENDING 1 /* signal pending */ | ||
70 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | ||
71 | #define TIF_BREAKPOINT 4 /* enter monitor mode on return */ | ||
72 | #define TIF_SINGLE_STEP 5 /* single step in progress */ | ||
73 | #define TIF_MEMDIE 6 /* is terminating due to OOM killer */ | ||
74 | #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */ | ||
75 | #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */ | ||
76 | #define TIF_NOTIFY_RESUME 9 /* callback before returning to user */ | ||
77 | #define TIF_DEBUG 30 /* debugging enabled */ | ||
78 | #define TIF_USERSPACE 31 /* true if FS sets userspace */ | ||
79 | |||
80 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) | ||
81 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) | ||
82 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) | ||
83 | #define _TIF_BREAKPOINT (1 << TIF_BREAKPOINT) | ||
84 | #define _TIF_SINGLE_STEP (1 << TIF_SINGLE_STEP) | ||
85 | #define _TIF_MEMDIE (1 << TIF_MEMDIE) | ||
86 | #define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP) | ||
87 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) | ||
88 | |||
89 | /* Note: The masks below must never span more than 16 bits! */ | ||
90 | |||
91 | /* work to do on interrupt/exception return */ | ||
92 | #define _TIF_WORK_MASK \ | ||
93 | (_TIF_SIGPENDING \ | ||
94 | | _TIF_NOTIFY_RESUME \ | ||
95 | | _TIF_NEED_RESCHED \ | ||
96 | | _TIF_BREAKPOINT) | ||
97 | |||
98 | /* work to do on any return to userspace */ | ||
99 | #define _TIF_ALLWORK_MASK (_TIF_WORK_MASK | _TIF_SYSCALL_TRACE) | ||
100 | /* work to do on return from debug mode */ | ||
101 | #define _TIF_DBGWORK_MASK (_TIF_WORK_MASK & ~_TIF_BREAKPOINT) | ||
102 | |||
103 | #endif /* __ASM_AVR32_THREAD_INFO_H */ | ||
diff --git a/arch/avr32/include/asm/timex.h b/arch/avr32/include/asm/timex.h deleted file mode 100644 index 187dcf38b210..000000000000 --- a/arch/avr32/include/asm/timex.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_TIMEX_H | ||
9 | #define __ASM_AVR32_TIMEX_H | ||
10 | |||
11 | /* | ||
12 | * This is the frequency of the timer used for Linux's timer interrupt. | ||
13 | * The value should be defined as accurate as possible or under certain | ||
14 | * circumstances Linux timekeeping might become inaccurate or fail. | ||
15 | * | ||
16 | * For many system the exact clockrate of the timer isn't known but due to | ||
17 | * the way this value is used we can get away with a wrong value as long | ||
18 | * as this value is: | ||
19 | * | ||
20 | * - a multiple of HZ | ||
21 | * - a divisor of the actual rate | ||
22 | * | ||
23 | * 500000 is a good such cheat value. | ||
24 | * | ||
25 | * The obscure number 1193182 is the same as used by the original i8254 | ||
26 | * time in legacy PC hardware; the chip is never found in AVR32 systems. | ||
27 | */ | ||
28 | #define CLOCK_TICK_RATE 500000 /* Underlying HZ */ | ||
29 | |||
30 | typedef unsigned long cycles_t; | ||
31 | |||
32 | static inline cycles_t get_cycles (void) | ||
33 | { | ||
34 | return 0; | ||
35 | } | ||
36 | |||
37 | #define ARCH_HAS_READ_CURRENT_TIMER | ||
38 | |||
39 | #endif /* __ASM_AVR32_TIMEX_H */ | ||
diff --git a/arch/avr32/include/asm/tlb.h b/arch/avr32/include/asm/tlb.h deleted file mode 100644 index 5c55f9ce7c7d..000000000000 --- a/arch/avr32/include/asm/tlb.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_TLB_H | ||
9 | #define __ASM_AVR32_TLB_H | ||
10 | |||
11 | #define tlb_start_vma(tlb, vma) \ | ||
12 | flush_cache_range(vma, vma->vm_start, vma->vm_end) | ||
13 | |||
14 | #define tlb_end_vma(tlb, vma) \ | ||
15 | flush_tlb_range(vma, vma->vm_start, vma->vm_end) | ||
16 | |||
17 | #define __tlb_remove_tlb_entry(tlb, pte, address) do { } while(0) | ||
18 | |||
19 | /* | ||
20 | * Flush whole TLB for MM | ||
21 | */ | ||
22 | #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) | ||
23 | |||
24 | #include <asm-generic/tlb.h> | ||
25 | |||
26 | /* | ||
27 | * For debugging purposes | ||
28 | */ | ||
29 | extern void show_dtlb_entry(unsigned int index); | ||
30 | extern void dump_dtlb(void); | ||
31 | |||
32 | #endif /* __ASM_AVR32_TLB_H */ | ||
diff --git a/arch/avr32/include/asm/tlbflush.h b/arch/avr32/include/asm/tlbflush.h deleted file mode 100644 index bf90a786f6be..000000000000 --- a/arch/avr32/include/asm/tlbflush.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_TLBFLUSH_H | ||
9 | #define __ASM_AVR32_TLBFLUSH_H | ||
10 | |||
11 | #include <asm/mmu.h> | ||
12 | |||
13 | /* | ||
14 | * TLB flushing: | ||
15 | * | ||
16 | * - flush_tlb() flushes the current mm struct TLBs | ||
17 | * - flush_tlb_all() flushes all processes' TLB entries | ||
18 | * - flush_tlb_mm(mm) flushes the specified mm context TLBs | ||
19 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
20 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
21 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
22 | */ | ||
23 | extern void flush_tlb(void); | ||
24 | extern void flush_tlb_all(void); | ||
25 | extern void flush_tlb_mm(struct mm_struct *mm); | ||
26 | extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | ||
27 | unsigned long end); | ||
28 | extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page); | ||
29 | |||
30 | extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); | ||
31 | |||
32 | #endif /* __ASM_AVR32_TLBFLUSH_H */ | ||
diff --git a/arch/avr32/include/asm/traps.h b/arch/avr32/include/asm/traps.h deleted file mode 100644 index 6a8fb944f414..000000000000 --- a/arch/avr32/include/asm/traps.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_TRAPS_H | ||
9 | #define __ASM_AVR32_TRAPS_H | ||
10 | |||
11 | #include <linux/list.h> | ||
12 | |||
13 | struct undef_hook { | ||
14 | struct list_head node; | ||
15 | u32 insn_mask; | ||
16 | u32 insn_val; | ||
17 | int (*fn)(struct pt_regs *regs, u32 insn); | ||
18 | }; | ||
19 | |||
20 | void register_undef_hook(struct undef_hook *hook); | ||
21 | void unregister_undef_hook(struct undef_hook *hook); | ||
22 | |||
23 | #endif /* __ASM_AVR32_TRAPS_H */ | ||
diff --git a/arch/avr32/include/asm/types.h b/arch/avr32/include/asm/types.h deleted file mode 100644 index 59324058069c..000000000000 --- a/arch/avr32/include/asm/types.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_TYPES_H | ||
9 | #define __ASM_AVR32_TYPES_H | ||
10 | |||
11 | #include <uapi/asm/types.h> | ||
12 | |||
13 | /* | ||
14 | * These aren't exported outside the kernel to avoid name space clashes | ||
15 | */ | ||
16 | |||
17 | #define BITS_PER_LONG 32 | ||
18 | |||
19 | #endif /* __ASM_AVR32_TYPES_H */ | ||
diff --git a/arch/avr32/include/asm/uaccess.h b/arch/avr32/include/asm/uaccess.h deleted file mode 100644 index b1ec1fa06463..000000000000 --- a/arch/avr32/include/asm/uaccess.h +++ /dev/null | |||
@@ -1,337 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_UACCESS_H | ||
9 | #define __ASM_AVR32_UACCESS_H | ||
10 | |||
11 | #include <linux/errno.h> | ||
12 | #include <linux/sched.h> | ||
13 | |||
14 | #define VERIFY_READ 0 | ||
15 | #define VERIFY_WRITE 1 | ||
16 | |||
17 | typedef struct { | ||
18 | unsigned int is_user_space; | ||
19 | } mm_segment_t; | ||
20 | |||
21 | /* | ||
22 | * The fs value determines whether argument validity checking should be | ||
23 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
24 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
25 | * | ||
26 | * For historical reasons (Data Segment Register?), these macros are misnamed. | ||
27 | */ | ||
28 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
29 | #define segment_eq(a, b) ((a).is_user_space == (b).is_user_space) | ||
30 | |||
31 | #define USER_ADDR_LIMIT 0x80000000 | ||
32 | |||
33 | #define KERNEL_DS MAKE_MM_SEG(0) | ||
34 | #define USER_DS MAKE_MM_SEG(1) | ||
35 | |||
36 | #define get_ds() (KERNEL_DS) | ||
37 | |||
38 | static inline mm_segment_t get_fs(void) | ||
39 | { | ||
40 | return MAKE_MM_SEG(test_thread_flag(TIF_USERSPACE)); | ||
41 | } | ||
42 | |||
43 | static inline void set_fs(mm_segment_t s) | ||
44 | { | ||
45 | if (s.is_user_space) | ||
46 | set_thread_flag(TIF_USERSPACE); | ||
47 | else | ||
48 | clear_thread_flag(TIF_USERSPACE); | ||
49 | } | ||
50 | |||
51 | /* | ||
52 | * Test whether a block of memory is a valid user space address. | ||
53 | * Returns 0 if the range is valid, nonzero otherwise. | ||
54 | * | ||
55 | * We do the following checks: | ||
56 | * 1. Is the access from kernel space? | ||
57 | * 2. Does (addr + size) set the carry bit? | ||
58 | * 3. Is (addr + size) a negative number (i.e. >= 0x80000000)? | ||
59 | * | ||
60 | * If yes on the first check, access is granted. | ||
61 | * If no on any of the others, access is denied. | ||
62 | */ | ||
63 | #define __range_ok(addr, size) \ | ||
64 | (test_thread_flag(TIF_USERSPACE) \ | ||
65 | && (((unsigned long)(addr) >= 0x80000000) \ | ||
66 | || ((unsigned long)(size) > 0x80000000) \ | ||
67 | || (((unsigned long)(addr) + (unsigned long)(size)) > 0x80000000))) | ||
68 | |||
69 | #define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0)) | ||
70 | |||
71 | /* Generic arbitrary sized copy. Return the number of bytes NOT copied */ | ||
72 | extern __kernel_size_t __copy_user(void *to, const void *from, | ||
73 | __kernel_size_t n); | ||
74 | |||
75 | extern __kernel_size_t copy_to_user(void __user *to, const void *from, | ||
76 | __kernel_size_t n); | ||
77 | extern __kernel_size_t ___copy_from_user(void *to, const void __user *from, | ||
78 | __kernel_size_t n); | ||
79 | |||
80 | static inline __kernel_size_t __copy_to_user(void __user *to, const void *from, | ||
81 | __kernel_size_t n) | ||
82 | { | ||
83 | return __copy_user((void __force *)to, from, n); | ||
84 | } | ||
85 | static inline __kernel_size_t __copy_from_user(void *to, | ||
86 | const void __user *from, | ||
87 | __kernel_size_t n) | ||
88 | { | ||
89 | return __copy_user(to, (const void __force *)from, n); | ||
90 | } | ||
91 | static inline __kernel_size_t copy_from_user(void *to, | ||
92 | const void __user *from, | ||
93 | __kernel_size_t n) | ||
94 | { | ||
95 | size_t res = ___copy_from_user(to, from, n); | ||
96 | if (unlikely(res)) | ||
97 | memset(to + (n - res), 0, res); | ||
98 | return res; | ||
99 | } | ||
100 | |||
101 | #define __copy_to_user_inatomic __copy_to_user | ||
102 | #define __copy_from_user_inatomic __copy_from_user | ||
103 | |||
104 | /* | ||
105 | * put_user: - Write a simple value into user space. | ||
106 | * @x: Value to copy to user space. | ||
107 | * @ptr: Destination address, in user space. | ||
108 | * | ||
109 | * Context: User context only. This function may sleep if pagefaults are | ||
110 | * enabled. | ||
111 | * | ||
112 | * This macro copies a single simple value from kernel space to user | ||
113 | * space. It supports simple types like char and int, but not larger | ||
114 | * data types like structures or arrays. | ||
115 | * | ||
116 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
117 | * to the result of dereferencing @ptr. | ||
118 | * | ||
119 | * Returns zero on success, or -EFAULT on error. | ||
120 | */ | ||
121 | #define put_user(x, ptr) \ | ||
122 | __put_user_check((x), (ptr), sizeof(*(ptr))) | ||
123 | |||
124 | /* | ||
125 | * get_user: - Get a simple variable from user space. | ||
126 | * @x: Variable to store result. | ||
127 | * @ptr: Source address, in user space. | ||
128 | * | ||
129 | * Context: User context only. This function may sleep if pagefaults are | ||
130 | * enabled. | ||
131 | * | ||
132 | * This macro copies a single simple variable from user space to kernel | ||
133 | * space. It supports simple types like char and int, but not larger | ||
134 | * data types like structures or arrays. | ||
135 | * | ||
136 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
137 | * dereferencing @ptr must be assignable to @x without a cast. | ||
138 | * | ||
139 | * Returns zero on success, or -EFAULT on error. | ||
140 | * On error, the variable @x is set to zero. | ||
141 | */ | ||
142 | #define get_user(x, ptr) \ | ||
143 | __get_user_check((x), (ptr), sizeof(*(ptr))) | ||
144 | |||
145 | /* | ||
146 | * __put_user: - Write a simple value into user space, with less checking. | ||
147 | * @x: Value to copy to user space. | ||
148 | * @ptr: Destination address, in user space. | ||
149 | * | ||
150 | * Context: User context only. This function may sleep if pagefaults are | ||
151 | * enabled. | ||
152 | * | ||
153 | * This macro copies a single simple value from kernel space to user | ||
154 | * space. It supports simple types like char and int, but not larger | ||
155 | * data types like structures or arrays. | ||
156 | * | ||
157 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
158 | * to the result of dereferencing @ptr. | ||
159 | * | ||
160 | * Caller must check the pointer with access_ok() before calling this | ||
161 | * function. | ||
162 | * | ||
163 | * Returns zero on success, or -EFAULT on error. | ||
164 | */ | ||
165 | #define __put_user(x, ptr) \ | ||
166 | __put_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
167 | |||
168 | /* | ||
169 | * __get_user: - Get a simple variable from user space, with less checking. | ||
170 | * @x: Variable to store result. | ||
171 | * @ptr: Source address, in user space. | ||
172 | * | ||
173 | * Context: User context only. This function may sleep if pagefaults are | ||
174 | * enabled. | ||
175 | * | ||
176 | * This macro copies a single simple variable from user space to kernel | ||
177 | * space. It supports simple types like char and int, but not larger | ||
178 | * data types like structures or arrays. | ||
179 | * | ||
180 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
181 | * dereferencing @ptr must be assignable to @x without a cast. | ||
182 | * | ||
183 | * Caller must check the pointer with access_ok() before calling this | ||
184 | * function. | ||
185 | * | ||
186 | * Returns zero on success, or -EFAULT on error. | ||
187 | * On error, the variable @x is set to zero. | ||
188 | */ | ||
189 | #define __get_user(x, ptr) \ | ||
190 | __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
191 | |||
192 | extern int __get_user_bad(void); | ||
193 | extern int __put_user_bad(void); | ||
194 | |||
195 | #define __get_user_nocheck(x, ptr, size) \ | ||
196 | ({ \ | ||
197 | unsigned long __gu_val = 0; \ | ||
198 | int __gu_err = 0; \ | ||
199 | \ | ||
200 | switch (size) { \ | ||
201 | case 1: __get_user_asm("ub", __gu_val, ptr, __gu_err); break; \ | ||
202 | case 2: __get_user_asm("uh", __gu_val, ptr, __gu_err); break; \ | ||
203 | case 4: __get_user_asm("w", __gu_val, ptr, __gu_err); break; \ | ||
204 | default: __gu_err = __get_user_bad(); break; \ | ||
205 | } \ | ||
206 | \ | ||
207 | x = (__force typeof(*(ptr)))__gu_val; \ | ||
208 | __gu_err; \ | ||
209 | }) | ||
210 | |||
211 | #define __get_user_check(x, ptr, size) \ | ||
212 | ({ \ | ||
213 | unsigned long __gu_val = 0; \ | ||
214 | const typeof(*(ptr)) __user * __gu_addr = (ptr); \ | ||
215 | int __gu_err = 0; \ | ||
216 | \ | ||
217 | if (access_ok(VERIFY_READ, __gu_addr, size)) { \ | ||
218 | switch (size) { \ | ||
219 | case 1: \ | ||
220 | __get_user_asm("ub", __gu_val, __gu_addr, \ | ||
221 | __gu_err); \ | ||
222 | break; \ | ||
223 | case 2: \ | ||
224 | __get_user_asm("uh", __gu_val, __gu_addr, \ | ||
225 | __gu_err); \ | ||
226 | break; \ | ||
227 | case 4: \ | ||
228 | __get_user_asm("w", __gu_val, __gu_addr, \ | ||
229 | __gu_err); \ | ||
230 | break; \ | ||
231 | default: \ | ||
232 | __gu_err = __get_user_bad(); \ | ||
233 | break; \ | ||
234 | } \ | ||
235 | } else { \ | ||
236 | __gu_err = -EFAULT; \ | ||
237 | } \ | ||
238 | x = (__force typeof(*(ptr)))__gu_val; \ | ||
239 | __gu_err; \ | ||
240 | }) | ||
241 | |||
242 | #define __get_user_asm(suffix, __gu_val, ptr, __gu_err) \ | ||
243 | asm volatile( \ | ||
244 | "1: ld." suffix " %1, %3 \n" \ | ||
245 | "2: \n" \ | ||
246 | " .subsection 1 \n" \ | ||
247 | "3: mov %0, %4 \n" \ | ||
248 | " rjmp 2b \n" \ | ||
249 | " .subsection 0 \n" \ | ||
250 | " .section __ex_table, \"a\" \n" \ | ||
251 | " .long 1b, 3b \n" \ | ||
252 | " .previous \n" \ | ||
253 | : "=r"(__gu_err), "=r"(__gu_val) \ | ||
254 | : "0"(__gu_err), "m"(*(ptr)), "i"(-EFAULT)) | ||
255 | |||
256 | #define __put_user_nocheck(x, ptr, size) \ | ||
257 | ({ \ | ||
258 | typeof(*(ptr)) __pu_val; \ | ||
259 | int __pu_err = 0; \ | ||
260 | \ | ||
261 | __pu_val = (x); \ | ||
262 | switch (size) { \ | ||
263 | case 1: __put_user_asm("b", ptr, __pu_val, __pu_err); break; \ | ||
264 | case 2: __put_user_asm("h", ptr, __pu_val, __pu_err); break; \ | ||
265 | case 4: __put_user_asm("w", ptr, __pu_val, __pu_err); break; \ | ||
266 | case 8: __put_user_asm("d", ptr, __pu_val, __pu_err); break; \ | ||
267 | default: __pu_err = __put_user_bad(); break; \ | ||
268 | } \ | ||
269 | __pu_err; \ | ||
270 | }) | ||
271 | |||
272 | #define __put_user_check(x, ptr, size) \ | ||
273 | ({ \ | ||
274 | typeof(*(ptr)) __pu_val; \ | ||
275 | typeof(*(ptr)) __user *__pu_addr = (ptr); \ | ||
276 | int __pu_err = 0; \ | ||
277 | \ | ||
278 | __pu_val = (x); \ | ||
279 | if (access_ok(VERIFY_WRITE, __pu_addr, size)) { \ | ||
280 | switch (size) { \ | ||
281 | case 1: \ | ||
282 | __put_user_asm("b", __pu_addr, __pu_val, \ | ||
283 | __pu_err); \ | ||
284 | break; \ | ||
285 | case 2: \ | ||
286 | __put_user_asm("h", __pu_addr, __pu_val, \ | ||
287 | __pu_err); \ | ||
288 | break; \ | ||
289 | case 4: \ | ||
290 | __put_user_asm("w", __pu_addr, __pu_val, \ | ||
291 | __pu_err); \ | ||
292 | break; \ | ||
293 | case 8: \ | ||
294 | __put_user_asm("d", __pu_addr, __pu_val, \ | ||
295 | __pu_err); \ | ||
296 | break; \ | ||
297 | default: \ | ||
298 | __pu_err = __put_user_bad(); \ | ||
299 | break; \ | ||
300 | } \ | ||
301 | } else { \ | ||
302 | __pu_err = -EFAULT; \ | ||
303 | } \ | ||
304 | __pu_err; \ | ||
305 | }) | ||
306 | |||
307 | #define __put_user_asm(suffix, ptr, __pu_val, __gu_err) \ | ||
308 | asm volatile( \ | ||
309 | "1: st." suffix " %1, %3 \n" \ | ||
310 | "2: \n" \ | ||
311 | " .subsection 1 \n" \ | ||
312 | "3: mov %0, %4 \n" \ | ||
313 | " rjmp 2b \n" \ | ||
314 | " .subsection 0 \n" \ | ||
315 | " .section __ex_table, \"a\" \n" \ | ||
316 | " .long 1b, 3b \n" \ | ||
317 | " .previous \n" \ | ||
318 | : "=r"(__gu_err), "=m"(*(ptr)) \ | ||
319 | : "0"(__gu_err), "r"(__pu_val), "i"(-EFAULT)) | ||
320 | |||
321 | extern __kernel_size_t clear_user(void __user *addr, __kernel_size_t size); | ||
322 | extern __kernel_size_t __clear_user(void __user *addr, __kernel_size_t size); | ||
323 | |||
324 | extern long strncpy_from_user(char *dst, const char __user *src, long count); | ||
325 | extern long __strncpy_from_user(char *dst, const char __user *src, long count); | ||
326 | |||
327 | extern long strnlen_user(const char __user *__s, long __n); | ||
328 | extern long __strnlen_user(const char __user *__s, long __n); | ||
329 | |||
330 | #define strlen_user(s) strnlen_user(s, ~0UL >> 1) | ||
331 | |||
332 | struct exception_table_entry | ||
333 | { | ||
334 | unsigned long insn, fixup; | ||
335 | }; | ||
336 | |||
337 | #endif /* __ASM_AVR32_UACCESS_H */ | ||
diff --git a/arch/avr32/include/asm/ucontext.h b/arch/avr32/include/asm/ucontext.h deleted file mode 100644 index ac7259c2a799..000000000000 --- a/arch/avr32/include/asm/ucontext.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_UCONTEXT_H | ||
2 | #define __ASM_AVR32_UCONTEXT_H | ||
3 | |||
4 | struct ucontext { | ||
5 | unsigned long uc_flags; | ||
6 | struct ucontext * uc_link; | ||
7 | stack_t uc_stack; | ||
8 | struct sigcontext uc_mcontext; | ||
9 | sigset_t uc_sigmask; | ||
10 | }; | ||
11 | |||
12 | #endif /* __ASM_AVR32_UCONTEXT_H */ | ||
diff --git a/arch/avr32/include/asm/unaligned.h b/arch/avr32/include/asm/unaligned.h deleted file mode 100644 index 041877290470..000000000000 --- a/arch/avr32/include/asm/unaligned.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef _ASM_AVR32_UNALIGNED_H | ||
2 | #define _ASM_AVR32_UNALIGNED_H | ||
3 | |||
4 | /* | ||
5 | * AVR32 can handle some unaligned accesses, depending on the | ||
6 | * implementation. The AVR32 AP implementation can handle unaligned | ||
7 | * words, but halfwords must be halfword-aligned, and doublewords must | ||
8 | * be word-aligned. | ||
9 | * | ||
10 | * However, swapped word loads must be word-aligned so we can't | ||
11 | * optimize word loads in general. | ||
12 | */ | ||
13 | |||
14 | #include <linux/unaligned/be_struct.h> | ||
15 | #include <linux/unaligned/le_byteshift.h> | ||
16 | #include <linux/unaligned/generic.h> | ||
17 | |||
18 | #define get_unaligned __get_unaligned_be | ||
19 | #define put_unaligned __put_unaligned_be | ||
20 | |||
21 | #endif /* _ASM_AVR32_UNALIGNED_H */ | ||
diff --git a/arch/avr32/include/asm/unistd.h b/arch/avr32/include/asm/unistd.h deleted file mode 100644 index 2011bee3f252..000000000000 --- a/arch/avr32/include/asm/unistd.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __ASM_AVR32_UNISTD_H | ||
9 | #define __ASM_AVR32_UNISTD_H | ||
10 | |||
11 | #include <uapi/asm/unistd.h> | ||
12 | |||
13 | #define NR_syscalls 321 | ||
14 | |||
15 | /* Old stuff */ | ||
16 | #define __IGNORE_uselib | ||
17 | #define __IGNORE_mmap | ||
18 | |||
19 | /* NUMA stuff */ | ||
20 | #define __IGNORE_mbind | ||
21 | #define __IGNORE_get_mempolicy | ||
22 | #define __IGNORE_set_mempolicy | ||
23 | #define __IGNORE_migrate_pages | ||
24 | #define __IGNORE_move_pages | ||
25 | |||
26 | /* SMP stuff */ | ||
27 | #define __IGNORE_getcpu | ||
28 | |||
29 | #define __ARCH_WANT_STAT64 | ||
30 | #define __ARCH_WANT_SYS_ALARM | ||
31 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
32 | #define __ARCH_WANT_SYS_PAUSE | ||
33 | #define __ARCH_WANT_SYS_TIME | ||
34 | #define __ARCH_WANT_SYS_UTIME | ||
35 | #define __ARCH_WANT_SYS_WAITPID | ||
36 | #define __ARCH_WANT_SYS_FADVISE64 | ||
37 | #define __ARCH_WANT_SYS_GETPGRP | ||
38 | #define __ARCH_WANT_SYS_LLSEEK | ||
39 | #define __ARCH_WANT_SYS_GETPGRP | ||
40 | #define __ARCH_WANT_SYS_FORK | ||
41 | #define __ARCH_WANT_SYS_VFORK | ||
42 | #define __ARCH_WANT_SYS_CLONE | ||
43 | |||
44 | #endif /* __ASM_AVR32_UNISTD_H */ | ||
diff --git a/arch/avr32/include/asm/user.h b/arch/avr32/include/asm/user.h deleted file mode 100644 index 7e9152f81f5e..000000000000 --- a/arch/avr32/include/asm/user.h +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | * | ||
8 | * Note: We may not need these definitions for AVR32, as we don't | ||
9 | * support a.out. | ||
10 | */ | ||
11 | #ifndef __ASM_AVR32_USER_H | ||
12 | #define __ASM_AVR32_USER_H | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | #include <asm/ptrace.h> | ||
16 | #include <asm/page.h> | ||
17 | |||
18 | /* | ||
19 | * Core file format: The core file is written in such a way that gdb | ||
20 | * can understand it and provide useful information to the user (under | ||
21 | * linux we use the `trad-core' bfd). The file contents are as follows: | ||
22 | * | ||
23 | * upage: 1 page consisting of a user struct that tells gdb | ||
24 | * what is present in the file. Directly after this is a | ||
25 | * copy of the task_struct, which is currently not used by gdb, | ||
26 | * but it may come in handy at some point. All of the registers | ||
27 | * are stored as part of the upage. The upage should always be | ||
28 | * only one page long. | ||
29 | * data: The data segment follows next. We use current->end_text to | ||
30 | * current->brk to pick up all of the user variables, plus any memory | ||
31 | * that may have been sbrk'ed. No attempt is made to determine if a | ||
32 | * page is demand-zero or if a page is totally unused, we just cover | ||
33 | * the entire range. All of the addresses are rounded in such a way | ||
34 | * that an integral number of pages is written. | ||
35 | * stack: We need the stack information in order to get a meaningful | ||
36 | * backtrace. We need to write the data from usp to | ||
37 | * current->start_stack, so we round each of these in order to be able | ||
38 | * to write an integer number of pages. | ||
39 | */ | ||
40 | |||
41 | struct user_fpu_struct { | ||
42 | /* We have no FPU (yet) */ | ||
43 | }; | ||
44 | |||
45 | struct user { | ||
46 | struct pt_regs regs; /* entire machine state */ | ||
47 | size_t u_tsize; /* text size (pages) */ | ||
48 | size_t u_dsize; /* data size (pages) */ | ||
49 | size_t u_ssize; /* stack size (pages) */ | ||
50 | unsigned long start_code; /* text starting address */ | ||
51 | unsigned long start_data; /* data starting address */ | ||
52 | unsigned long start_stack; /* stack starting address */ | ||
53 | long int signal; /* signal causing core dump */ | ||
54 | unsigned long u_ar0; /* help gdb find registers */ | ||
55 | unsigned long magic; /* identifies a core file */ | ||
56 | char u_comm[32]; /* user command name */ | ||
57 | }; | ||
58 | |||
59 | #define NBPG PAGE_SIZE | ||
60 | #define UPAGES 1 | ||
61 | #define HOST_TEXT_START_ADDR (u.start_code) | ||
62 | #define HOST_DATA_START_ADDR (u.start_data) | ||
63 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) | ||
64 | |||
65 | #endif /* __ASM_AVR32_USER_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/Kbuild b/arch/avr32/include/uapi/asm/Kbuild deleted file mode 100644 index 08d8a3d76ea8..000000000000 --- a/arch/avr32/include/uapi/asm/Kbuild +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | # UAPI Header export list | ||
2 | include include/uapi/asm-generic/Kbuild.asm | ||
3 | |||
4 | header-y += auxvec.h | ||
5 | header-y += byteorder.h | ||
6 | header-y += cachectl.h | ||
7 | header-y += msgbuf.h | ||
8 | header-y += param.h | ||
9 | header-y += posix_types.h | ||
10 | header-y += ptrace.h | ||
11 | header-y += sembuf.h | ||
12 | header-y += setup.h | ||
13 | header-y += shmbuf.h | ||
14 | header-y += sigcontext.h | ||
15 | header-y += signal.h | ||
16 | header-y += socket.h | ||
17 | header-y += sockios.h | ||
18 | header-y += stat.h | ||
19 | header-y += swab.h | ||
20 | header-y += termbits.h | ||
21 | header-y += termios.h | ||
22 | header-y += types.h | ||
23 | header-y += unistd.h | ||
24 | generic-y += bitsperlong.h | ||
25 | generic-y += errno.h | ||
26 | generic-y += fcntl.h | ||
27 | generic-y += ioctl.h | ||
28 | generic-y += ioctls.h | ||
29 | generic-y += ipcbuf.h | ||
30 | generic-y += kvm_para.h | ||
31 | generic-y += mman.h | ||
32 | generic-y += param.h | ||
33 | generic-y += poll.h | ||
34 | generic-y += resource.h | ||
35 | generic-y += siginfo.h | ||
36 | generic-y += statfs.h | ||
diff --git a/arch/avr32/include/uapi/asm/auxvec.h b/arch/avr32/include/uapi/asm/auxvec.h deleted file mode 100644 index 4f02da3ffefa..000000000000 --- a/arch/avr32/include/uapi/asm/auxvec.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_AUXVEC_H | ||
2 | #define _UAPI__ASM_AVR32_AUXVEC_H | ||
3 | |||
4 | #endif /* _UAPI__ASM_AVR32_AUXVEC_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/byteorder.h b/arch/avr32/include/uapi/asm/byteorder.h deleted file mode 100644 index 71242f0d39c6..000000000000 --- a/arch/avr32/include/uapi/asm/byteorder.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 endian-conversion functions. | ||
3 | */ | ||
4 | #ifndef _UAPI__ASM_AVR32_BYTEORDER_H | ||
5 | #define _UAPI__ASM_AVR32_BYTEORDER_H | ||
6 | |||
7 | #include <linux/byteorder/big_endian.h> | ||
8 | |||
9 | #endif /* _UAPI__ASM_AVR32_BYTEORDER_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/cachectl.h b/arch/avr32/include/uapi/asm/cachectl.h deleted file mode 100644 index 573a9584dd57..000000000000 --- a/arch/avr32/include/uapi/asm/cachectl.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_CACHECTL_H | ||
2 | #define _UAPI__ASM_AVR32_CACHECTL_H | ||
3 | |||
4 | /* | ||
5 | * Operations that can be performed through the cacheflush system call | ||
6 | */ | ||
7 | |||
8 | /* Clean the data cache, then invalidate the icache */ | ||
9 | #define CACHE_IFLUSH 0 | ||
10 | |||
11 | #endif /* _UAPI__ASM_AVR32_CACHECTL_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/msgbuf.h b/arch/avr32/include/uapi/asm/msgbuf.h deleted file mode 100644 index 9eae6effad14..000000000000 --- a/arch/avr32/include/uapi/asm/msgbuf.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_MSGBUF_H | ||
2 | #define _UAPI__ASM_AVR32_MSGBUF_H | ||
3 | |||
4 | /* | ||
5 | * The msqid64_ds structure for i386 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct msqid64_ds { | ||
15 | struct ipc64_perm msg_perm; | ||
16 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
19 | unsigned long __unused2; | ||
20 | __kernel_time_t msg_ctime; /* last change time */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
23 | unsigned long msg_qnum; /* number of messages in queue */ | ||
24 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
25 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
26 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
27 | unsigned long __unused4; | ||
28 | unsigned long __unused5; | ||
29 | }; | ||
30 | |||
31 | #endif /* _UAPI__ASM_AVR32_MSGBUF_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/posix_types.h b/arch/avr32/include/uapi/asm/posix_types.h deleted file mode 100644 index 5b813a8abf09..000000000000 --- a/arch/avr32/include/uapi/asm/posix_types.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_POSIX_TYPES_H | ||
9 | #define _UAPI__ASM_AVR32_POSIX_TYPES_H | ||
10 | |||
11 | /* | ||
12 | * This file is generally used by user-level software, so you need to | ||
13 | * be a little careful about namespace pollution etc. Also, we cannot | ||
14 | * assume GCC is being used. | ||
15 | */ | ||
16 | |||
17 | typedef unsigned short __kernel_mode_t; | ||
18 | #define __kernel_mode_t __kernel_mode_t | ||
19 | |||
20 | typedef unsigned short __kernel_ipc_pid_t; | ||
21 | #define __kernel_ipc_pid_t __kernel_ipc_pid_t | ||
22 | |||
23 | typedef unsigned long __kernel_size_t; | ||
24 | typedef long __kernel_ssize_t; | ||
25 | typedef int __kernel_ptrdiff_t; | ||
26 | #define __kernel_size_t __kernel_size_t | ||
27 | |||
28 | typedef unsigned short __kernel_old_uid_t; | ||
29 | typedef unsigned short __kernel_old_gid_t; | ||
30 | #define __kernel_old_uid_t __kernel_old_uid_t | ||
31 | |||
32 | typedef unsigned short __kernel_old_dev_t; | ||
33 | #define __kernel_old_dev_t __kernel_old_dev_t | ||
34 | |||
35 | #include <asm-generic/posix_types.h> | ||
36 | |||
37 | #endif /* _UAPI__ASM_AVR32_POSIX_TYPES_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/ptrace.h b/arch/avr32/include/uapi/asm/ptrace.h deleted file mode 100644 index fe8c16275bc0..000000000000 --- a/arch/avr32/include/uapi/asm/ptrace.h +++ /dev/null | |||
@@ -1,126 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_PTRACE_H | ||
9 | #define _UAPI__ASM_AVR32_PTRACE_H | ||
10 | |||
11 | #define PTRACE_GETREGS 12 | ||
12 | #define PTRACE_SETREGS 13 | ||
13 | |||
14 | /* | ||
15 | * Status Register bits | ||
16 | */ | ||
17 | #define SR_H 0x20000000 | ||
18 | #define SR_J 0x10000000 | ||
19 | #define SR_DM 0x08000000 | ||
20 | #define SR_D 0x04000000 | ||
21 | #define MODE_NMI 0x01c00000 | ||
22 | #define MODE_EXCEPTION 0x01800000 | ||
23 | #define MODE_INT3 0x01400000 | ||
24 | #define MODE_INT2 0x01000000 | ||
25 | #define MODE_INT1 0x00c00000 | ||
26 | #define MODE_INT0 0x00800000 | ||
27 | #define MODE_SUPERVISOR 0x00400000 | ||
28 | #define MODE_USER 0x00000000 | ||
29 | #define MODE_MASK 0x01c00000 | ||
30 | #define SR_EM 0x00200000 | ||
31 | #define SR_I3M 0x00100000 | ||
32 | #define SR_I2M 0x00080000 | ||
33 | #define SR_I1M 0x00040000 | ||
34 | #define SR_I0M 0x00020000 | ||
35 | #define SR_GM 0x00010000 | ||
36 | |||
37 | #define SR_H_BIT 29 | ||
38 | #define SR_J_BIT 28 | ||
39 | #define SR_DM_BIT 27 | ||
40 | #define SR_D_BIT 26 | ||
41 | #define MODE_SHIFT 22 | ||
42 | #define SR_EM_BIT 21 | ||
43 | #define SR_I3M_BIT 20 | ||
44 | #define SR_I2M_BIT 19 | ||
45 | #define SR_I1M_BIT 18 | ||
46 | #define SR_I0M_BIT 17 | ||
47 | #define SR_GM_BIT 16 | ||
48 | |||
49 | /* The user-visible part */ | ||
50 | #define SR_L 0x00000020 | ||
51 | #define SR_Q 0x00000010 | ||
52 | #define SR_V 0x00000008 | ||
53 | #define SR_N 0x00000004 | ||
54 | #define SR_Z 0x00000002 | ||
55 | #define SR_C 0x00000001 | ||
56 | |||
57 | #define SR_L_BIT 5 | ||
58 | #define SR_Q_BIT 4 | ||
59 | #define SR_V_BIT 3 | ||
60 | #define SR_N_BIT 2 | ||
61 | #define SR_Z_BIT 1 | ||
62 | #define SR_C_BIT 0 | ||
63 | |||
64 | /* | ||
65 | * The order is defined by the stmts instruction. r0 is stored first, | ||
66 | * so it gets the highest address. | ||
67 | * | ||
68 | * Registers 0-12 are general-purpose registers (r12 is normally used for | ||
69 | * the function return value). | ||
70 | * Register 13 is the stack pointer | ||
71 | * Register 14 is the link register | ||
72 | * Register 15 is the program counter (retrieved from the RAR sysreg) | ||
73 | */ | ||
74 | #define FRAME_SIZE_FULL 72 | ||
75 | #define REG_R12_ORIG 68 | ||
76 | #define REG_R0 64 | ||
77 | #define REG_R1 60 | ||
78 | #define REG_R2 56 | ||
79 | #define REG_R3 52 | ||
80 | #define REG_R4 48 | ||
81 | #define REG_R5 44 | ||
82 | #define REG_R6 40 | ||
83 | #define REG_R7 36 | ||
84 | #define REG_R8 32 | ||
85 | #define REG_R9 28 | ||
86 | #define REG_R10 24 | ||
87 | #define REG_R11 20 | ||
88 | #define REG_R12 16 | ||
89 | #define REG_SP 12 | ||
90 | #define REG_LR 8 | ||
91 | |||
92 | #define FRAME_SIZE_MIN 8 | ||
93 | #define REG_PC 4 | ||
94 | #define REG_SR 0 | ||
95 | |||
96 | #ifndef __ASSEMBLY__ | ||
97 | struct pt_regs { | ||
98 | /* These are always saved */ | ||
99 | unsigned long sr; | ||
100 | unsigned long pc; | ||
101 | |||
102 | /* These are sometimes saved */ | ||
103 | unsigned long lr; | ||
104 | unsigned long sp; | ||
105 | unsigned long r12; | ||
106 | unsigned long r11; | ||
107 | unsigned long r10; | ||
108 | unsigned long r9; | ||
109 | unsigned long r8; | ||
110 | unsigned long r7; | ||
111 | unsigned long r6; | ||
112 | unsigned long r5; | ||
113 | unsigned long r4; | ||
114 | unsigned long r3; | ||
115 | unsigned long r2; | ||
116 | unsigned long r1; | ||
117 | unsigned long r0; | ||
118 | |||
119 | /* Only saved on system call */ | ||
120 | unsigned long r12_orig; | ||
121 | }; | ||
122 | |||
123 | |||
124 | #endif /* ! __ASSEMBLY__ */ | ||
125 | |||
126 | #endif /* _UAPI__ASM_AVR32_PTRACE_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/sembuf.h b/arch/avr32/include/uapi/asm/sembuf.h deleted file mode 100644 index 6c6f7cf1e75a..000000000000 --- a/arch/avr32/include/uapi/asm/sembuf.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_SEMBUF_H | ||
2 | #define _UAPI__ASM_AVR32_SEMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The semid64_ds structure for AVR32 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct semid64_ds { | ||
15 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
16 | __kernel_time_t sem_otime; /* last semop time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t sem_ctime; /* last change time */ | ||
19 | unsigned long __unused2; | ||
20 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long __unused4; | ||
23 | }; | ||
24 | |||
25 | #endif /* _UAPI__ASM_AVR32_SEMBUF_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/setup.h b/arch/avr32/include/uapi/asm/setup.h deleted file mode 100644 index a654df7dba46..000000000000 --- a/arch/avr32/include/uapi/asm/setup.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * Based on linux/include/asm-arm/setup.h | ||
5 | * Copyright (C) 1997-1999 Russell King | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #ifndef _UAPI__ASM_AVR32_SETUP_H__ | ||
12 | #define _UAPI__ASM_AVR32_SETUP_H__ | ||
13 | |||
14 | #define COMMAND_LINE_SIZE 256 | ||
15 | |||
16 | #endif /* _UAPI__ASM_AVR32_SETUP_H__ */ | ||
diff --git a/arch/avr32/include/uapi/asm/shmbuf.h b/arch/avr32/include/uapi/asm/shmbuf.h deleted file mode 100644 index b94cf8b60b73..000000000000 --- a/arch/avr32/include/uapi/asm/shmbuf.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_SHMBUF_H | ||
2 | #define _UAPI__ASM_AVR32_SHMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The shmid64_ds structure for i386 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct shmid64_ds { | ||
15 | struct ipc64_perm shm_perm; /* operation perms */ | ||
16 | size_t shm_segsz; /* size of segment (bytes) */ | ||
17 | __kernel_time_t shm_atime; /* last attach time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t shm_dtime; /* last detach time */ | ||
20 | unsigned long __unused2; | ||
21 | __kernel_time_t shm_ctime; /* last change time */ | ||
22 | unsigned long __unused3; | ||
23 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
24 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
25 | unsigned long shm_nattch; /* no. of current attaches */ | ||
26 | unsigned long __unused4; | ||
27 | unsigned long __unused5; | ||
28 | }; | ||
29 | |||
30 | struct shminfo64 { | ||
31 | unsigned long shmmax; | ||
32 | unsigned long shmmin; | ||
33 | unsigned long shmmni; | ||
34 | unsigned long shmseg; | ||
35 | unsigned long shmall; | ||
36 | unsigned long __unused1; | ||
37 | unsigned long __unused2; | ||
38 | unsigned long __unused3; | ||
39 | unsigned long __unused4; | ||
40 | }; | ||
41 | |||
42 | #endif /* _UAPI__ASM_AVR32_SHMBUF_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/sigcontext.h b/arch/avr32/include/uapi/asm/sigcontext.h deleted file mode 100644 index 27e56bf6377f..000000000000 --- a/arch/avr32/include/uapi/asm/sigcontext.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_SIGCONTEXT_H | ||
9 | #define _UAPI__ASM_AVR32_SIGCONTEXT_H | ||
10 | |||
11 | struct sigcontext { | ||
12 | unsigned long oldmask; | ||
13 | |||
14 | /* CPU registers */ | ||
15 | unsigned long sr; | ||
16 | unsigned long pc; | ||
17 | unsigned long lr; | ||
18 | unsigned long sp; | ||
19 | unsigned long r12; | ||
20 | unsigned long r11; | ||
21 | unsigned long r10; | ||
22 | unsigned long r9; | ||
23 | unsigned long r8; | ||
24 | unsigned long r7; | ||
25 | unsigned long r6; | ||
26 | unsigned long r5; | ||
27 | unsigned long r4; | ||
28 | unsigned long r3; | ||
29 | unsigned long r2; | ||
30 | unsigned long r1; | ||
31 | unsigned long r0; | ||
32 | }; | ||
33 | |||
34 | #endif /* _UAPI__ASM_AVR32_SIGCONTEXT_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/signal.h b/arch/avr32/include/uapi/asm/signal.h deleted file mode 100644 index ffe8c770cafd..000000000000 --- a/arch/avr32/include/uapi/asm/signal.h +++ /dev/null | |||
@@ -1,121 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_SIGNAL_H | ||
9 | #define _UAPI__ASM_AVR32_SIGNAL_H | ||
10 | |||
11 | #include <linux/types.h> | ||
12 | |||
13 | /* Avoid too many header ordering problems. */ | ||
14 | struct siginfo; | ||
15 | |||
16 | #ifndef __KERNEL__ | ||
17 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
18 | |||
19 | #define NSIG 32 | ||
20 | typedef unsigned long sigset_t; | ||
21 | |||
22 | #endif /* __KERNEL__ */ | ||
23 | |||
24 | #define SIGHUP 1 | ||
25 | #define SIGINT 2 | ||
26 | #define SIGQUIT 3 | ||
27 | #define SIGILL 4 | ||
28 | #define SIGTRAP 5 | ||
29 | #define SIGABRT 6 | ||
30 | #define SIGIOT 6 | ||
31 | #define SIGBUS 7 | ||
32 | #define SIGFPE 8 | ||
33 | #define SIGKILL 9 | ||
34 | #define SIGUSR1 10 | ||
35 | #define SIGSEGV 11 | ||
36 | #define SIGUSR2 12 | ||
37 | #define SIGPIPE 13 | ||
38 | #define SIGALRM 14 | ||
39 | #define SIGTERM 15 | ||
40 | #define SIGSTKFLT 16 | ||
41 | #define SIGCHLD 17 | ||
42 | #define SIGCONT 18 | ||
43 | #define SIGSTOP 19 | ||
44 | #define SIGTSTP 20 | ||
45 | #define SIGTTIN 21 | ||
46 | #define SIGTTOU 22 | ||
47 | #define SIGURG 23 | ||
48 | #define SIGXCPU 24 | ||
49 | #define SIGXFSZ 25 | ||
50 | #define SIGVTALRM 26 | ||
51 | #define SIGPROF 27 | ||
52 | #define SIGWINCH 28 | ||
53 | #define SIGIO 29 | ||
54 | #define SIGPOLL SIGIO | ||
55 | /* | ||
56 | #define SIGLOST 29 | ||
57 | */ | ||
58 | #define SIGPWR 30 | ||
59 | #define SIGSYS 31 | ||
60 | #define SIGUNUSED 31 | ||
61 | |||
62 | /* These should not be considered constants from userland. */ | ||
63 | #define SIGRTMIN 32 | ||
64 | #define SIGRTMAX (_NSIG-1) | ||
65 | |||
66 | /* | ||
67 | * SA_FLAGS values: | ||
68 | * | ||
69 | * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. | ||
70 | * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. | ||
71 | * SA_SIGINFO deliver the signal with SIGINFO structs | ||
72 | * SA_ONSTACK indicates that a registered stack_t will be used. | ||
73 | * SA_RESTART flag to get restarting signals (which were the default long ago) | ||
74 | * SA_NODEFER prevents the current signal from being masked in the handler. | ||
75 | * SA_RESETHAND clears the handler when the signal is delivered. | ||
76 | * | ||
77 | * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single | ||
78 | * Unix names RESETHAND and NODEFER respectively. | ||
79 | */ | ||
80 | #define SA_NOCLDSTOP 0x00000001 | ||
81 | #define SA_NOCLDWAIT 0x00000002 | ||
82 | #define SA_SIGINFO 0x00000004 | ||
83 | #define SA_RESTORER 0x04000000 | ||
84 | #define SA_ONSTACK 0x08000000 | ||
85 | #define SA_RESTART 0x10000000 | ||
86 | #define SA_NODEFER 0x40000000 | ||
87 | #define SA_RESETHAND 0x80000000 | ||
88 | |||
89 | #define SA_NOMASK SA_NODEFER | ||
90 | #define SA_ONESHOT SA_RESETHAND | ||
91 | |||
92 | #define MINSIGSTKSZ 2048 | ||
93 | #define SIGSTKSZ 8192 | ||
94 | |||
95 | #include <asm-generic/signal-defs.h> | ||
96 | |||
97 | #ifndef __KERNEL__ | ||
98 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
99 | |||
100 | struct sigaction { | ||
101 | union { | ||
102 | __sighandler_t _sa_handler; | ||
103 | void (*_sa_sigaction)(int, struct siginfo *, void *); | ||
104 | } _u; | ||
105 | sigset_t sa_mask; | ||
106 | unsigned long sa_flags; | ||
107 | void (*sa_restorer)(void); | ||
108 | }; | ||
109 | |||
110 | #define sa_handler _u._sa_handler | ||
111 | #define sa_sigaction _u._sa_sigaction | ||
112 | |||
113 | #endif /* __KERNEL__ */ | ||
114 | |||
115 | typedef struct sigaltstack { | ||
116 | void __user *ss_sp; | ||
117 | int ss_flags; | ||
118 | size_t ss_size; | ||
119 | } stack_t; | ||
120 | |||
121 | #endif /* _UAPI__ASM_AVR32_SIGNAL_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/socket.h b/arch/avr32/include/uapi/asm/socket.h deleted file mode 100644 index 5a650426f357..000000000000 --- a/arch/avr32/include/uapi/asm/socket.h +++ /dev/null | |||
@@ -1,95 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_SOCKET_H | ||
2 | #define _UAPI__ASM_AVR32_SOCKET_H | ||
3 | |||
4 | #include <asm/sockios.h> | ||
5 | |||
6 | /* For setsockopt(2) */ | ||
7 | #define SOL_SOCKET 1 | ||
8 | |||
9 | #define SO_DEBUG 1 | ||
10 | #define SO_REUSEADDR 2 | ||
11 | #define SO_TYPE 3 | ||
12 | #define SO_ERROR 4 | ||
13 | #define SO_DONTROUTE 5 | ||
14 | #define SO_BROADCAST 6 | ||
15 | #define SO_SNDBUF 7 | ||
16 | #define SO_RCVBUF 8 | ||
17 | #define SO_SNDBUFFORCE 32 | ||
18 | #define SO_RCVBUFFORCE 33 | ||
19 | #define SO_KEEPALIVE 9 | ||
20 | #define SO_OOBINLINE 10 | ||
21 | #define SO_NO_CHECK 11 | ||
22 | #define SO_PRIORITY 12 | ||
23 | #define SO_LINGER 13 | ||
24 | #define SO_BSDCOMPAT 14 | ||
25 | #define SO_REUSEPORT 15 | ||
26 | #define SO_PASSCRED 16 | ||
27 | #define SO_PEERCRED 17 | ||
28 | #define SO_RCVLOWAT 18 | ||
29 | #define SO_SNDLOWAT 19 | ||
30 | #define SO_RCVTIMEO 20 | ||
31 | #define SO_SNDTIMEO 21 | ||
32 | |||
33 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
34 | #define SO_SECURITY_AUTHENTICATION 22 | ||
35 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 23 | ||
36 | #define SO_SECURITY_ENCRYPTION_NETWORK 24 | ||
37 | |||
38 | #define SO_BINDTODEVICE 25 | ||
39 | |||
40 | /* Socket filtering */ | ||
41 | #define SO_ATTACH_FILTER 26 | ||
42 | #define SO_DETACH_FILTER 27 | ||
43 | #define SO_GET_FILTER SO_ATTACH_FILTER | ||
44 | |||
45 | #define SO_PEERNAME 28 | ||
46 | #define SO_TIMESTAMP 29 | ||
47 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
48 | |||
49 | #define SO_ACCEPTCONN 30 | ||
50 | |||
51 | #define SO_PEERSEC 31 | ||
52 | #define SO_PASSSEC 34 | ||
53 | #define SO_TIMESTAMPNS 35 | ||
54 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
55 | |||
56 | #define SO_MARK 36 | ||
57 | |||
58 | #define SO_TIMESTAMPING 37 | ||
59 | #define SCM_TIMESTAMPING SO_TIMESTAMPING | ||
60 | |||
61 | #define SO_PROTOCOL 38 | ||
62 | #define SO_DOMAIN 39 | ||
63 | |||
64 | #define SO_RXQ_OVFL 40 | ||
65 | |||
66 | #define SO_WIFI_STATUS 41 | ||
67 | #define SCM_WIFI_STATUS SO_WIFI_STATUS | ||
68 | #define SO_PEEK_OFF 42 | ||
69 | |||
70 | /* Instruct lower device to use last 4-bytes of skb data as FCS */ | ||
71 | #define SO_NOFCS 43 | ||
72 | |||
73 | #define SO_LOCK_FILTER 44 | ||
74 | |||
75 | #define SO_SELECT_ERR_QUEUE 45 | ||
76 | |||
77 | #define SO_BUSY_POLL 46 | ||
78 | |||
79 | #define SO_MAX_PACING_RATE 47 | ||
80 | |||
81 | #define SO_BPF_EXTENSIONS 48 | ||
82 | |||
83 | #define SO_INCOMING_CPU 49 | ||
84 | |||
85 | #define SO_ATTACH_BPF 50 | ||
86 | #define SO_DETACH_BPF SO_DETACH_FILTER | ||
87 | |||
88 | #define SO_ATTACH_REUSEPORT_CBPF 51 | ||
89 | #define SO_ATTACH_REUSEPORT_EBPF 52 | ||
90 | |||
91 | #define SO_CNX_ADVICE 53 | ||
92 | |||
93 | #define SCM_TIMESTAMPING_OPT_STATS 54 | ||
94 | |||
95 | #endif /* _UAPI__ASM_AVR32_SOCKET_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/sockios.h b/arch/avr32/include/uapi/asm/sockios.h deleted file mode 100644 index d04785453532..000000000000 --- a/arch/avr32/include/uapi/asm/sockios.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_SOCKIOS_H | ||
2 | #define _UAPI__ASM_AVR32_SOCKIOS_H | ||
3 | |||
4 | /* Socket-level I/O control calls. */ | ||
5 | #define FIOSETOWN 0x8901 | ||
6 | #define SIOCSPGRP 0x8902 | ||
7 | #define FIOGETOWN 0x8903 | ||
8 | #define SIOCGPGRP 0x8904 | ||
9 | #define SIOCATMARK 0x8905 | ||
10 | #define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ | ||
11 | #define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ | ||
12 | |||
13 | #endif /* _UAPI__ASM_AVR32_SOCKIOS_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/stat.h b/arch/avr32/include/uapi/asm/stat.h deleted file mode 100644 index c06acef7fce7..000000000000 --- a/arch/avr32/include/uapi/asm/stat.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_STAT_H | ||
9 | #define _UAPI__ASM_AVR32_STAT_H | ||
10 | |||
11 | struct __old_kernel_stat { | ||
12 | unsigned short st_dev; | ||
13 | unsigned short st_ino; | ||
14 | unsigned short st_mode; | ||
15 | unsigned short st_nlink; | ||
16 | unsigned short st_uid; | ||
17 | unsigned short st_gid; | ||
18 | unsigned short st_rdev; | ||
19 | unsigned long st_size; | ||
20 | unsigned long st_atime; | ||
21 | unsigned long st_mtime; | ||
22 | unsigned long st_ctime; | ||
23 | }; | ||
24 | |||
25 | struct stat { | ||
26 | unsigned long st_dev; | ||
27 | unsigned long st_ino; | ||
28 | unsigned short st_mode; | ||
29 | unsigned short st_nlink; | ||
30 | unsigned short st_uid; | ||
31 | unsigned short st_gid; | ||
32 | unsigned long st_rdev; | ||
33 | unsigned long st_size; | ||
34 | unsigned long st_blksize; | ||
35 | unsigned long st_blocks; | ||
36 | unsigned long st_atime; | ||
37 | unsigned long st_atime_nsec; | ||
38 | unsigned long st_mtime; | ||
39 | unsigned long st_mtime_nsec; | ||
40 | unsigned long st_ctime; | ||
41 | unsigned long st_ctime_nsec; | ||
42 | unsigned long __unused4; | ||
43 | unsigned long __unused5; | ||
44 | }; | ||
45 | |||
46 | #define STAT_HAVE_NSEC 1 | ||
47 | |||
48 | struct stat64 { | ||
49 | unsigned long long st_dev; | ||
50 | |||
51 | unsigned long long st_ino; | ||
52 | unsigned int st_mode; | ||
53 | unsigned int st_nlink; | ||
54 | |||
55 | unsigned long st_uid; | ||
56 | unsigned long st_gid; | ||
57 | |||
58 | unsigned long long st_rdev; | ||
59 | |||
60 | long long st_size; | ||
61 | unsigned long __pad1; /* align 64-bit st_blocks */ | ||
62 | unsigned long st_blksize; | ||
63 | |||
64 | unsigned long long st_blocks; /* Number 512-byte blocks allocated. */ | ||
65 | |||
66 | unsigned long st_atime; | ||
67 | unsigned long st_atime_nsec; | ||
68 | |||
69 | unsigned long st_mtime; | ||
70 | unsigned long st_mtime_nsec; | ||
71 | |||
72 | unsigned long st_ctime; | ||
73 | unsigned long st_ctime_nsec; | ||
74 | |||
75 | unsigned long __unused1; | ||
76 | unsigned long __unused2; | ||
77 | }; | ||
78 | |||
79 | #endif /* _UAPI__ASM_AVR32_STAT_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/swab.h b/arch/avr32/include/uapi/asm/swab.h deleted file mode 100644 index 1a03549e7dc5..000000000000 --- a/arch/avr32/include/uapi/asm/swab.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 byteswapping functions. | ||
3 | */ | ||
4 | #ifndef _UAPI__ASM_AVR32_SWAB_H | ||
5 | #define _UAPI__ASM_AVR32_SWAB_H | ||
6 | |||
7 | #include <linux/types.h> | ||
8 | #include <linux/compiler.h> | ||
9 | |||
10 | #define __SWAB_64_THRU_32__ | ||
11 | |||
12 | #ifdef __CHECKER__ | ||
13 | extern unsigned long __builtin_bswap_32(unsigned long x); | ||
14 | extern unsigned short __builtin_bswap_16(unsigned short x); | ||
15 | #endif | ||
16 | |||
17 | /* | ||
18 | * avr32-linux-gcc versions earlier than 4.2 improperly sign-extends | ||
19 | * the result. | ||
20 | */ | ||
21 | #if !(__GNUC__ == 4 && __GNUC_MINOR__ < 2) | ||
22 | static inline __attribute_const__ __u16 __arch_swab16(__u16 val) | ||
23 | { | ||
24 | return __builtin_bswap_16(val); | ||
25 | } | ||
26 | #define __arch_swab16 __arch_swab16 | ||
27 | |||
28 | static inline __attribute_const__ __u32 __arch_swab32(__u32 val) | ||
29 | { | ||
30 | return __builtin_bswap_32(val); | ||
31 | } | ||
32 | #define __arch_swab32 __arch_swab32 | ||
33 | #endif | ||
34 | |||
35 | #endif /* _UAPI__ASM_AVR32_SWAB_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/termbits.h b/arch/avr32/include/uapi/asm/termbits.h deleted file mode 100644 index 32789ccb38f8..000000000000 --- a/arch/avr32/include/uapi/asm/termbits.h +++ /dev/null | |||
@@ -1,196 +0,0 @@ | |||
1 | #ifndef _UAPI__ASM_AVR32_TERMBITS_H | ||
2 | #define _UAPI__ASM_AVR32_TERMBITS_H | ||
3 | |||
4 | #include <linux/posix_types.h> | ||
5 | |||
6 | typedef unsigned char cc_t; | ||
7 | typedef unsigned int speed_t; | ||
8 | typedef unsigned int tcflag_t; | ||
9 | |||
10 | #define NCCS 19 | ||
11 | struct termios { | ||
12 | tcflag_t c_iflag; /* input mode flags */ | ||
13 | tcflag_t c_oflag; /* output mode flags */ | ||
14 | tcflag_t c_cflag; /* control mode flags */ | ||
15 | tcflag_t c_lflag; /* local mode flags */ | ||
16 | cc_t c_line; /* line discipline */ | ||
17 | cc_t c_cc[NCCS]; /* control characters */ | ||
18 | }; | ||
19 | |||
20 | struct termios2 { | ||
21 | tcflag_t c_iflag; /* input mode flags */ | ||
22 | tcflag_t c_oflag; /* output mode flags */ | ||
23 | tcflag_t c_cflag; /* control mode flags */ | ||
24 | tcflag_t c_lflag; /* local mode flags */ | ||
25 | cc_t c_line; /* line discipline */ | ||
26 | cc_t c_cc[NCCS]; /* control characters */ | ||
27 | speed_t c_ispeed; /* input speed */ | ||
28 | speed_t c_ospeed; /* output speed */ | ||
29 | }; | ||
30 | |||
31 | struct ktermios { | ||
32 | tcflag_t c_iflag; /* input mode flags */ | ||
33 | tcflag_t c_oflag; /* output mode flags */ | ||
34 | tcflag_t c_cflag; /* control mode flags */ | ||
35 | tcflag_t c_lflag; /* local mode flags */ | ||
36 | cc_t c_line; /* line discipline */ | ||
37 | cc_t c_cc[NCCS]; /* control characters */ | ||
38 | speed_t c_ispeed; /* input speed */ | ||
39 | speed_t c_ospeed; /* output speed */ | ||
40 | }; | ||
41 | |||
42 | /* c_cc characters */ | ||
43 | #define VINTR 0 | ||
44 | #define VQUIT 1 | ||
45 | #define VERASE 2 | ||
46 | #define VKILL 3 | ||
47 | #define VEOF 4 | ||
48 | #define VTIME 5 | ||
49 | #define VMIN 6 | ||
50 | #define VSWTC 7 | ||
51 | #define VSTART 8 | ||
52 | #define VSTOP 9 | ||
53 | #define VSUSP 10 | ||
54 | #define VEOL 11 | ||
55 | #define VREPRINT 12 | ||
56 | #define VDISCARD 13 | ||
57 | #define VWERASE 14 | ||
58 | #define VLNEXT 15 | ||
59 | #define VEOL2 16 | ||
60 | |||
61 | /* c_iflag bits */ | ||
62 | #define IGNBRK 0000001 | ||
63 | #define BRKINT 0000002 | ||
64 | #define IGNPAR 0000004 | ||
65 | #define PARMRK 0000010 | ||
66 | #define INPCK 0000020 | ||
67 | #define ISTRIP 0000040 | ||
68 | #define INLCR 0000100 | ||
69 | #define IGNCR 0000200 | ||
70 | #define ICRNL 0000400 | ||
71 | #define IUCLC 0001000 | ||
72 | #define IXON 0002000 | ||
73 | #define IXANY 0004000 | ||
74 | #define IXOFF 0010000 | ||
75 | #define IMAXBEL 0020000 | ||
76 | #define IUTF8 0040000 | ||
77 | |||
78 | /* c_oflag bits */ | ||
79 | #define OPOST 0000001 | ||
80 | #define OLCUC 0000002 | ||
81 | #define ONLCR 0000004 | ||
82 | #define OCRNL 0000010 | ||
83 | #define ONOCR 0000020 | ||
84 | #define ONLRET 0000040 | ||
85 | #define OFILL 0000100 | ||
86 | #define OFDEL 0000200 | ||
87 | #define NLDLY 0000400 | ||
88 | #define NL0 0000000 | ||
89 | #define NL1 0000400 | ||
90 | #define CRDLY 0003000 | ||
91 | #define CR0 0000000 | ||
92 | #define CR1 0001000 | ||
93 | #define CR2 0002000 | ||
94 | #define CR3 0003000 | ||
95 | #define TABDLY 0014000 | ||
96 | #define TAB0 0000000 | ||
97 | #define TAB1 0004000 | ||
98 | #define TAB2 0010000 | ||
99 | #define TAB3 0014000 | ||
100 | #define XTABS 0014000 | ||
101 | #define BSDLY 0020000 | ||
102 | #define BS0 0000000 | ||
103 | #define BS1 0020000 | ||
104 | #define VTDLY 0040000 | ||
105 | #define VT0 0000000 | ||
106 | #define VT1 0040000 | ||
107 | #define FFDLY 0100000 | ||
108 | #define FF0 0000000 | ||
109 | #define FF1 0100000 | ||
110 | |||
111 | /* c_cflag bit meaning */ | ||
112 | #define CBAUD 0010017 | ||
113 | #define B0 0000000 /* hang up */ | ||
114 | #define B50 0000001 | ||
115 | #define B75 0000002 | ||
116 | #define B110 0000003 | ||
117 | #define B134 0000004 | ||
118 | #define B150 0000005 | ||
119 | #define B200 0000006 | ||
120 | #define B300 0000007 | ||
121 | #define B600 0000010 | ||
122 | #define B1200 0000011 | ||
123 | #define B1800 0000012 | ||
124 | #define B2400 0000013 | ||
125 | #define B4800 0000014 | ||
126 | #define B9600 0000015 | ||
127 | #define B19200 0000016 | ||
128 | #define B38400 0000017 | ||
129 | #define EXTA B19200 | ||
130 | #define EXTB B38400 | ||
131 | #define CSIZE 0000060 | ||
132 | #define CS5 0000000 | ||
133 | #define CS6 0000020 | ||
134 | #define CS7 0000040 | ||
135 | #define CS8 0000060 | ||
136 | #define CSTOPB 0000100 | ||
137 | #define CREAD 0000200 | ||
138 | #define PARENB 0000400 | ||
139 | #define PARODD 0001000 | ||
140 | #define HUPCL 0002000 | ||
141 | #define CLOCAL 0004000 | ||
142 | #define CBAUDEX 0010000 | ||
143 | #define B57600 0010001 | ||
144 | #define B115200 0010002 | ||
145 | #define B230400 0010003 | ||
146 | #define B460800 0010004 | ||
147 | #define B500000 0010005 | ||
148 | #define B576000 0010006 | ||
149 | #define B921600 0010007 | ||
150 | #define B1000000 0010010 | ||
151 | #define B1152000 0010011 | ||
152 | #define B1500000 0010012 | ||
153 | #define B2000000 0010013 | ||
154 | #define B2500000 0010014 | ||
155 | #define B3000000 0010015 | ||
156 | #define B3500000 0010016 | ||
157 | #define B4000000 0010017 | ||
158 | #define CIBAUD 002003600000 /* input baud rate (not used) */ | ||
159 | #define CMSPAR 010000000000 /* mark or space (stick) parity */ | ||
160 | #define CRTSCTS 020000000000 /* flow control */ | ||
161 | |||
162 | /* c_lflag bits */ | ||
163 | #define ISIG 0000001 | ||
164 | #define ICANON 0000002 | ||
165 | #define XCASE 0000004 | ||
166 | #define ECHO 0000010 | ||
167 | #define ECHOE 0000020 | ||
168 | #define ECHOK 0000040 | ||
169 | #define ECHONL 0000100 | ||
170 | #define NOFLSH 0000200 | ||
171 | #define TOSTOP 0000400 | ||
172 | #define ECHOCTL 0001000 | ||
173 | #define ECHOPRT 0002000 | ||
174 | #define ECHOKE 0004000 | ||
175 | #define FLUSHO 0010000 | ||
176 | #define PENDIN 0040000 | ||
177 | #define IEXTEN 0100000 | ||
178 | #define EXTPROC 0200000 | ||
179 | |||
180 | /* tcflow() and TCXONC use these */ | ||
181 | #define TCOOFF 0 | ||
182 | #define TCOON 1 | ||
183 | #define TCIOFF 2 | ||
184 | #define TCION 3 | ||
185 | |||
186 | /* tcflush() and TCFLSH use these */ | ||
187 | #define TCIFLUSH 0 | ||
188 | #define TCOFLUSH 1 | ||
189 | #define TCIOFLUSH 2 | ||
190 | |||
191 | /* tcsetattr uses these */ | ||
192 | #define TCSANOW 0 | ||
193 | #define TCSADRAIN 1 | ||
194 | #define TCSAFLUSH 2 | ||
195 | |||
196 | #endif /* _UAPI__ASM_AVR32_TERMBITS_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/termios.h b/arch/avr32/include/uapi/asm/termios.h deleted file mode 100644 index c8a0081556c4..000000000000 --- a/arch/avr32/include/uapi/asm/termios.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_TERMIOS_H | ||
9 | #define _UAPI__ASM_AVR32_TERMIOS_H | ||
10 | |||
11 | #include <asm/termbits.h> | ||
12 | #include <asm/ioctls.h> | ||
13 | |||
14 | struct winsize { | ||
15 | unsigned short ws_row; | ||
16 | unsigned short ws_col; | ||
17 | unsigned short ws_xpixel; | ||
18 | unsigned short ws_ypixel; | ||
19 | }; | ||
20 | |||
21 | #define NCC 8 | ||
22 | struct termio { | ||
23 | unsigned short c_iflag; /* input mode flags */ | ||
24 | unsigned short c_oflag; /* output mode flags */ | ||
25 | unsigned short c_cflag; /* control mode flags */ | ||
26 | unsigned short c_lflag; /* local mode flags */ | ||
27 | unsigned char c_line; /* line discipline */ | ||
28 | unsigned char c_cc[NCC]; /* control characters */ | ||
29 | }; | ||
30 | |||
31 | /* modem lines */ | ||
32 | #define TIOCM_LE 0x001 | ||
33 | #define TIOCM_DTR 0x002 | ||
34 | #define TIOCM_RTS 0x004 | ||
35 | #define TIOCM_ST 0x008 | ||
36 | #define TIOCM_SR 0x010 | ||
37 | #define TIOCM_CTS 0x020 | ||
38 | #define TIOCM_CAR 0x040 | ||
39 | #define TIOCM_RNG 0x080 | ||
40 | #define TIOCM_DSR 0x100 | ||
41 | #define TIOCM_CD TIOCM_CAR | ||
42 | #define TIOCM_RI TIOCM_RNG | ||
43 | #define TIOCM_OUT1 0x2000 | ||
44 | #define TIOCM_OUT2 0x4000 | ||
45 | #define TIOCM_LOOP 0x8000 | ||
46 | |||
47 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
48 | |||
49 | #endif /* _UAPI__ASM_AVR32_TERMIOS_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/types.h b/arch/avr32/include/uapi/asm/types.h deleted file mode 100644 index 7c986c4e99b5..000000000000 --- a/arch/avr32/include/uapi/asm/types.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_TYPES_H | ||
9 | #define _UAPI__ASM_AVR32_TYPES_H | ||
10 | |||
11 | #include <asm-generic/int-ll64.h> | ||
12 | |||
13 | #endif /* _UAPI__ASM_AVR32_TYPES_H */ | ||
diff --git a/arch/avr32/include/uapi/asm/unistd.h b/arch/avr32/include/uapi/asm/unistd.h deleted file mode 100644 index 236505d889d0..000000000000 --- a/arch/avr32/include/uapi/asm/unistd.h +++ /dev/null | |||
@@ -1,347 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef _UAPI__ASM_AVR32_UNISTD_H | ||
9 | #define _UAPI__ASM_AVR32_UNISTD_H | ||
10 | |||
11 | /* | ||
12 | * This file contains the system call numbers. | ||
13 | */ | ||
14 | |||
15 | #define __NR_restart_syscall 0 | ||
16 | #define __NR_exit 1 | ||
17 | #define __NR_fork 2 | ||
18 | #define __NR_read 3 | ||
19 | #define __NR_write 4 | ||
20 | #define __NR_open 5 | ||
21 | #define __NR_close 6 | ||
22 | #define __NR_umask 7 | ||
23 | #define __NR_creat 8 | ||
24 | #define __NR_link 9 | ||
25 | #define __NR_unlink 10 | ||
26 | #define __NR_execve 11 | ||
27 | #define __NR_chdir 12 | ||
28 | #define __NR_time 13 | ||
29 | #define __NR_mknod 14 | ||
30 | #define __NR_chmod 15 | ||
31 | #define __NR_chown 16 | ||
32 | #define __NR_lchown 17 | ||
33 | #define __NR_lseek 18 | ||
34 | #define __NR__llseek 19 | ||
35 | #define __NR_getpid 20 | ||
36 | #define __NR_mount 21 | ||
37 | #define __NR_umount2 22 | ||
38 | #define __NR_setuid 23 | ||
39 | #define __NR_getuid 24 | ||
40 | #define __NR_stime 25 | ||
41 | #define __NR_ptrace 26 | ||
42 | #define __NR_alarm 27 | ||
43 | #define __NR_pause 28 | ||
44 | #define __NR_utime 29 | ||
45 | #define __NR_stat 30 | ||
46 | #define __NR_fstat 31 | ||
47 | #define __NR_lstat 32 | ||
48 | #define __NR_access 33 | ||
49 | #define __NR_chroot 34 | ||
50 | #define __NR_sync 35 | ||
51 | #define __NR_fsync 36 | ||
52 | #define __NR_kill 37 | ||
53 | #define __NR_rename 38 | ||
54 | #define __NR_mkdir 39 | ||
55 | #define __NR_rmdir 40 | ||
56 | #define __NR_dup 41 | ||
57 | #define __NR_pipe 42 | ||
58 | #define __NR_times 43 | ||
59 | #define __NR_clone 44 | ||
60 | #define __NR_brk 45 | ||
61 | #define __NR_setgid 46 | ||
62 | #define __NR_getgid 47 | ||
63 | #define __NR_getcwd 48 | ||
64 | #define __NR_geteuid 49 | ||
65 | #define __NR_getegid 50 | ||
66 | #define __NR_acct 51 | ||
67 | #define __NR_setfsuid 52 | ||
68 | #define __NR_setfsgid 53 | ||
69 | #define __NR_ioctl 54 | ||
70 | #define __NR_fcntl 55 | ||
71 | #define __NR_setpgid 56 | ||
72 | #define __NR_mremap 57 | ||
73 | #define __NR_setresuid 58 | ||
74 | #define __NR_getresuid 59 | ||
75 | #define __NR_setreuid 60 | ||
76 | #define __NR_setregid 61 | ||
77 | #define __NR_ustat 62 | ||
78 | #define __NR_dup2 63 | ||
79 | #define __NR_getppid 64 | ||
80 | #define __NR_getpgrp 65 | ||
81 | #define __NR_setsid 66 | ||
82 | #define __NR_rt_sigaction 67 | ||
83 | #define __NR_rt_sigreturn 68 | ||
84 | #define __NR_rt_sigprocmask 69 | ||
85 | #define __NR_rt_sigpending 70 | ||
86 | #define __NR_rt_sigtimedwait 71 | ||
87 | #define __NR_rt_sigqueueinfo 72 | ||
88 | #define __NR_rt_sigsuspend 73 | ||
89 | #define __NR_sethostname 74 | ||
90 | #define __NR_setrlimit 75 | ||
91 | #define __NR_getrlimit 76 /* SuS compliant getrlimit */ | ||
92 | #define __NR_getrusage 77 | ||
93 | #define __NR_gettimeofday 78 | ||
94 | #define __NR_settimeofday 79 | ||
95 | #define __NR_getgroups 80 | ||
96 | #define __NR_setgroups 81 | ||
97 | #define __NR_select 82 | ||
98 | #define __NR_symlink 83 | ||
99 | #define __NR_fchdir 84 | ||
100 | #define __NR_readlink 85 | ||
101 | #define __NR_pread 86 | ||
102 | #define __NR_pwrite 87 | ||
103 | #define __NR_swapon 88 | ||
104 | #define __NR_reboot 89 | ||
105 | #define __NR_mmap2 90 | ||
106 | #define __NR_munmap 91 | ||
107 | #define __NR_truncate 92 | ||
108 | #define __NR_ftruncate 93 | ||
109 | #define __NR_fchmod 94 | ||
110 | #define __NR_fchown 95 | ||
111 | #define __NR_getpriority 96 | ||
112 | #define __NR_setpriority 97 | ||
113 | #define __NR_wait4 98 | ||
114 | #define __NR_statfs 99 | ||
115 | #define __NR_fstatfs 100 | ||
116 | #define __NR_vhangup 101 | ||
117 | #define __NR_sigaltstack 102 | ||
118 | #define __NR_syslog 103 | ||
119 | #define __NR_setitimer 104 | ||
120 | #define __NR_getitimer 105 | ||
121 | #define __NR_swapoff 106 | ||
122 | #define __NR_sysinfo 107 | ||
123 | /* 108 was __NR_ipc for a little while */ | ||
124 | #define __NR_sendfile 109 | ||
125 | #define __NR_setdomainname 110 | ||
126 | #define __NR_uname 111 | ||
127 | #define __NR_adjtimex 112 | ||
128 | #define __NR_mprotect 113 | ||
129 | #define __NR_vfork 114 | ||
130 | #define __NR_init_module 115 | ||
131 | #define __NR_delete_module 116 | ||
132 | #define __NR_quotactl 117 | ||
133 | #define __NR_getpgid 118 | ||
134 | #define __NR_bdflush 119 | ||
135 | #define __NR_sysfs 120 | ||
136 | #define __NR_personality 121 | ||
137 | #define __NR_afs_syscall 122 /* Syscall for Andrew File System */ | ||
138 | #define __NR_getdents 123 | ||
139 | #define __NR_flock 124 | ||
140 | #define __NR_msync 125 | ||
141 | #define __NR_readv 126 | ||
142 | #define __NR_writev 127 | ||
143 | #define __NR_getsid 128 | ||
144 | #define __NR_fdatasync 129 | ||
145 | #define __NR__sysctl 130 | ||
146 | #define __NR_mlock 131 | ||
147 | #define __NR_munlock 132 | ||
148 | #define __NR_mlockall 133 | ||
149 | #define __NR_munlockall 134 | ||
150 | #define __NR_sched_setparam 135 | ||
151 | #define __NR_sched_getparam 136 | ||
152 | #define __NR_sched_setscheduler 137 | ||
153 | #define __NR_sched_getscheduler 138 | ||
154 | #define __NR_sched_yield 139 | ||
155 | #define __NR_sched_get_priority_max 140 | ||
156 | #define __NR_sched_get_priority_min 141 | ||
157 | #define __NR_sched_rr_get_interval 142 | ||
158 | #define __NR_nanosleep 143 | ||
159 | #define __NR_poll 144 | ||
160 | #define __NR_nfsservctl 145 | ||
161 | #define __NR_setresgid 146 | ||
162 | #define __NR_getresgid 147 | ||
163 | #define __NR_prctl 148 | ||
164 | #define __NR_socket 149 | ||
165 | #define __NR_bind 150 | ||
166 | #define __NR_connect 151 | ||
167 | #define __NR_listen 152 | ||
168 | #define __NR_accept 153 | ||
169 | #define __NR_getsockname 154 | ||
170 | #define __NR_getpeername 155 | ||
171 | #define __NR_socketpair 156 | ||
172 | #define __NR_send 157 | ||
173 | #define __NR_recv 158 | ||
174 | #define __NR_sendto 159 | ||
175 | #define __NR_recvfrom 160 | ||
176 | #define __NR_shutdown 161 | ||
177 | #define __NR_setsockopt 162 | ||
178 | #define __NR_getsockopt 163 | ||
179 | #define __NR_sendmsg 164 | ||
180 | #define __NR_recvmsg 165 | ||
181 | #define __NR_truncate64 166 | ||
182 | #define __NR_ftruncate64 167 | ||
183 | #define __NR_stat64 168 | ||
184 | #define __NR_lstat64 169 | ||
185 | #define __NR_fstat64 170 | ||
186 | #define __NR_pivot_root 171 | ||
187 | #define __NR_mincore 172 | ||
188 | #define __NR_madvise 173 | ||
189 | #define __NR_getdents64 174 | ||
190 | #define __NR_fcntl64 175 | ||
191 | #define __NR_gettid 176 | ||
192 | #define __NR_readahead 177 | ||
193 | #define __NR_setxattr 178 | ||
194 | #define __NR_lsetxattr 179 | ||
195 | #define __NR_fsetxattr 180 | ||
196 | #define __NR_getxattr 181 | ||
197 | #define __NR_lgetxattr 182 | ||
198 | #define __NR_fgetxattr 183 | ||
199 | #define __NR_listxattr 184 | ||
200 | #define __NR_llistxattr 185 | ||
201 | #define __NR_flistxattr 186 | ||
202 | #define __NR_removexattr 187 | ||
203 | #define __NR_lremovexattr 188 | ||
204 | #define __NR_fremovexattr 189 | ||
205 | #define __NR_tkill 190 | ||
206 | #define __NR_sendfile64 191 | ||
207 | #define __NR_futex 192 | ||
208 | #define __NR_sched_setaffinity 193 | ||
209 | #define __NR_sched_getaffinity 194 | ||
210 | #define __NR_capget 195 | ||
211 | #define __NR_capset 196 | ||
212 | #define __NR_io_setup 197 | ||
213 | #define __NR_io_destroy 198 | ||
214 | #define __NR_io_getevents 199 | ||
215 | #define __NR_io_submit 200 | ||
216 | #define __NR_io_cancel 201 | ||
217 | #define __NR_fadvise64 202 | ||
218 | #define __NR_exit_group 203 | ||
219 | #define __NR_lookup_dcookie 204 | ||
220 | #define __NR_epoll_create 205 | ||
221 | #define __NR_epoll_ctl 206 | ||
222 | #define __NR_epoll_wait 207 | ||
223 | #define __NR_remap_file_pages 208 | ||
224 | #define __NR_set_tid_address 209 | ||
225 | #define __NR_timer_create 210 | ||
226 | #define __NR_timer_settime 211 | ||
227 | #define __NR_timer_gettime 212 | ||
228 | #define __NR_timer_getoverrun 213 | ||
229 | #define __NR_timer_delete 214 | ||
230 | #define __NR_clock_settime 215 | ||
231 | #define __NR_clock_gettime 216 | ||
232 | #define __NR_clock_getres 217 | ||
233 | #define __NR_clock_nanosleep 218 | ||
234 | #define __NR_statfs64 219 | ||
235 | #define __NR_fstatfs64 220 | ||
236 | #define __NR_tgkill 221 | ||
237 | /* 222 reserved for tux */ | ||
238 | #define __NR_utimes 223 | ||
239 | #define __NR_fadvise64_64 224 | ||
240 | #define __NR_cacheflush 225 | ||
241 | #define __NR_vserver 226 | ||
242 | #define __NR_mq_open 227 | ||
243 | #define __NR_mq_unlink 228 | ||
244 | #define __NR_mq_timedsend 229 | ||
245 | #define __NR_mq_timedreceive 230 | ||
246 | #define __NR_mq_notify 231 | ||
247 | #define __NR_mq_getsetattr 232 | ||
248 | #define __NR_kexec_load 233 | ||
249 | #define __NR_waitid 234 | ||
250 | #define __NR_add_key 235 | ||
251 | #define __NR_request_key 236 | ||
252 | #define __NR_keyctl 237 | ||
253 | #define __NR_ioprio_set 238 | ||
254 | #define __NR_ioprio_get 239 | ||
255 | #define __NR_inotify_init 240 | ||
256 | #define __NR_inotify_add_watch 241 | ||
257 | #define __NR_inotify_rm_watch 242 | ||
258 | #define __NR_openat 243 | ||
259 | #define __NR_mkdirat 244 | ||
260 | #define __NR_mknodat 245 | ||
261 | #define __NR_fchownat 246 | ||
262 | #define __NR_futimesat 247 | ||
263 | #define __NR_fstatat64 248 | ||
264 | #define __NR_unlinkat 249 | ||
265 | #define __NR_renameat 250 | ||
266 | #define __NR_linkat 251 | ||
267 | #define __NR_symlinkat 252 | ||
268 | #define __NR_readlinkat 253 | ||
269 | #define __NR_fchmodat 254 | ||
270 | #define __NR_faccessat 255 | ||
271 | #define __NR_pselect6 256 | ||
272 | #define __NR_ppoll 257 | ||
273 | #define __NR_unshare 258 | ||
274 | #define __NR_set_robust_list 259 | ||
275 | #define __NR_get_robust_list 260 | ||
276 | #define __NR_splice 261 | ||
277 | #define __NR_sync_file_range 262 | ||
278 | #define __NR_tee 263 | ||
279 | #define __NR_vmsplice 264 | ||
280 | #define __NR_epoll_pwait 265 | ||
281 | #define __NR_msgget 266 | ||
282 | #define __NR_msgsnd 267 | ||
283 | #define __NR_msgrcv 268 | ||
284 | #define __NR_msgctl 269 | ||
285 | #define __NR_semget 270 | ||
286 | #define __NR_semop 271 | ||
287 | #define __NR_semctl 272 | ||
288 | #define __NR_semtimedop 273 | ||
289 | #define __NR_shmat 274 | ||
290 | #define __NR_shmget 275 | ||
291 | #define __NR_shmdt 276 | ||
292 | #define __NR_shmctl 277 | ||
293 | #define __NR_utimensat 278 | ||
294 | #define __NR_signalfd 279 | ||
295 | /* 280 was __NR_timerfd */ | ||
296 | #define __NR_eventfd 281 | ||
297 | /* 282 was half-implemented __NR_recvmmsg */ | ||
298 | #define __NR_setns 283 | ||
299 | #define __NR_pread64 284 | ||
300 | #define __NR_pwrite64 285 | ||
301 | #define __NR_timerfd_create 286 | ||
302 | #define __NR_fallocate 287 | ||
303 | #define __NR_timerfd_settime 288 | ||
304 | #define __NR_timerfd_gettime 289 | ||
305 | #define __NR_signalfd4 290 | ||
306 | #define __NR_eventfd2 291 | ||
307 | #define __NR_epoll_create1 292 | ||
308 | #define __NR_dup3 293 | ||
309 | #define __NR_pipe2 294 | ||
310 | #define __NR_inotify_init1 295 | ||
311 | #define __NR_preadv 296 | ||
312 | #define __NR_pwritev 297 | ||
313 | #define __NR_rt_tgsigqueueinfo 298 | ||
314 | #define __NR_perf_event_open 299 | ||
315 | #define __NR_recvmmsg 300 | ||
316 | #define __NR_fanotify_init 301 | ||
317 | #define __NR_fanotify_mark 302 | ||
318 | #define __NR_prlimit64 303 | ||
319 | #define __NR_name_to_handle_at 304 | ||
320 | #define __NR_open_by_handle_at 305 | ||
321 | #define __NR_clock_adjtime 306 | ||
322 | #define __NR_syncfs 307 | ||
323 | #define __NR_sendmmsg 308 | ||
324 | #define __NR_process_vm_readv 309 | ||
325 | #define __NR_process_vm_writev 310 | ||
326 | #define __NR_kcmp 311 | ||
327 | #define __NR_finit_module 312 | ||
328 | #define __NR_sched_setattr 313 | ||
329 | #define __NR_sched_getattr 314 | ||
330 | #define __NR_renameat2 315 | ||
331 | #define __NR_seccomp 316 | ||
332 | #define __NR_getrandom 317 | ||
333 | #define __NR_memfd_create 318 | ||
334 | #define __NR_bpf 319 | ||
335 | #define __NR_execveat 320 | ||
336 | #define __NR_accept4 321 | ||
337 | #define __NR_userfaultfd 322 | ||
338 | #define __NR_membarrier 323 | ||
339 | #define __NR_mlock2 324 | ||
340 | #define __NR_copy_file_range 325 | ||
341 | #define __NR_preadv2 326 | ||
342 | #define __NR_pwritev2 327 | ||
343 | #define __NR_pkey_mprotect 328 | ||
344 | #define __NR_pkey_alloc 329 | ||
345 | #define __NR_pkey_free 330 | ||
346 | |||
347 | #endif /* _UAPI__ASM_AVR32_UNISTD_H */ | ||
diff --git a/arch/avr32/kernel/.gitignore b/arch/avr32/kernel/.gitignore deleted file mode 100644 index c5f676c3c224..000000000000 --- a/arch/avr32/kernel/.gitignore +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | vmlinux.lds | ||
diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile deleted file mode 100644 index 119a2e41defe..000000000000 --- a/arch/avr32/kernel/Makefile +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the Linux/AVR32 kernel. | ||
3 | # | ||
4 | |||
5 | extra-y := head.o vmlinux.lds | ||
6 | |||
7 | obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o | ||
8 | obj-y += syscall_table.o syscall-stubs.o irq.o | ||
9 | obj-y += setup.o traps.o ocd.o ptrace.o | ||
10 | obj-y += signal.o process.o time.o | ||
11 | obj-y += switch_to.o cpu.o | ||
12 | obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o | ||
13 | obj-$(CONFIG_KPROBES) += kprobes.o | ||
14 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | ||
15 | obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o | ||
diff --git a/arch/avr32/kernel/asm-offsets.c b/arch/avr32/kernel/asm-offsets.c deleted file mode 100644 index 2c9764fe3532..000000000000 --- a/arch/avr32/kernel/asm-offsets.c +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * Generate definitions needed by assembly language modules. | ||
3 | * This code generates raw asm output which is post-processed | ||
4 | * to extract and format the required data. | ||
5 | */ | ||
6 | |||
7 | #include <linux/mm.h> | ||
8 | #include <linux/sched.h> | ||
9 | #include <linux/thread_info.h> | ||
10 | #include <linux/kbuild.h> | ||
11 | |||
12 | void foo(void) | ||
13 | { | ||
14 | OFFSET(TI_task, thread_info, task); | ||
15 | OFFSET(TI_flags, thread_info, flags); | ||
16 | OFFSET(TI_cpu, thread_info, cpu); | ||
17 | OFFSET(TI_preempt_count, thread_info, preempt_count); | ||
18 | OFFSET(TI_rar_saved, thread_info, rar_saved); | ||
19 | OFFSET(TI_rsr_saved, thread_info, rsr_saved); | ||
20 | BLANK(); | ||
21 | OFFSET(TSK_active_mm, task_struct, active_mm); | ||
22 | BLANK(); | ||
23 | OFFSET(MM_pgd, mm_struct, pgd); | ||
24 | } | ||
diff --git a/arch/avr32/kernel/avr32_ksyms.c b/arch/avr32/kernel/avr32_ksyms.c deleted file mode 100644 index 0d05fd095468..000000000000 --- a/arch/avr32/kernel/avr32_ksyms.c +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* | ||
2 | * Export AVR32-specific functions for loadable modules. | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/delay.h> | ||
11 | #include <linux/io.h> | ||
12 | #include <linux/module.h> | ||
13 | |||
14 | #include <asm/checksum.h> | ||
15 | #include <linux/uaccess.h> | ||
16 | |||
17 | /* | ||
18 | * GCC functions | ||
19 | */ | ||
20 | extern unsigned long long __avr32_lsl64(unsigned long long u, unsigned long b); | ||
21 | extern unsigned long long __avr32_lsr64(unsigned long long u, unsigned long b); | ||
22 | extern unsigned long long __avr32_asr64(unsigned long long u, unsigned long b); | ||
23 | EXPORT_SYMBOL(__avr32_lsl64); | ||
24 | EXPORT_SYMBOL(__avr32_lsr64); | ||
25 | EXPORT_SYMBOL(__avr32_asr64); | ||
26 | |||
27 | /* | ||
28 | * String functions | ||
29 | */ | ||
30 | EXPORT_SYMBOL(memset); | ||
31 | EXPORT_SYMBOL(memcpy); | ||
32 | |||
33 | EXPORT_SYMBOL(clear_page); | ||
34 | EXPORT_SYMBOL(copy_page); | ||
35 | |||
36 | /* | ||
37 | * Userspace access stuff. | ||
38 | */ | ||
39 | EXPORT_SYMBOL(___copy_from_user); | ||
40 | EXPORT_SYMBOL(copy_to_user); | ||
41 | EXPORT_SYMBOL(__copy_user); | ||
42 | EXPORT_SYMBOL(strncpy_from_user); | ||
43 | EXPORT_SYMBOL(__strncpy_from_user); | ||
44 | EXPORT_SYMBOL(clear_user); | ||
45 | EXPORT_SYMBOL(__clear_user); | ||
46 | EXPORT_SYMBOL(strnlen_user); | ||
47 | |||
48 | EXPORT_SYMBOL(csum_partial); | ||
49 | EXPORT_SYMBOL(csum_partial_copy_generic); | ||
50 | |||
51 | /* Delay loops (lib/delay.S) */ | ||
52 | EXPORT_SYMBOL(__ndelay); | ||
53 | EXPORT_SYMBOL(__udelay); | ||
54 | EXPORT_SYMBOL(__const_udelay); | ||
55 | |||
56 | /* Bit operations (lib/findbit.S) */ | ||
57 | EXPORT_SYMBOL(find_first_zero_bit); | ||
58 | EXPORT_SYMBOL(find_next_zero_bit); | ||
59 | EXPORT_SYMBOL(find_first_bit); | ||
60 | EXPORT_SYMBOL(find_next_bit); | ||
61 | EXPORT_SYMBOL(find_next_bit_le); | ||
62 | EXPORT_SYMBOL(find_next_zero_bit_le); | ||
63 | |||
64 | /* I/O primitives (lib/io-*.S) */ | ||
65 | EXPORT_SYMBOL(__raw_readsb); | ||
66 | EXPORT_SYMBOL(__raw_readsw); | ||
67 | EXPORT_SYMBOL(__raw_readsl); | ||
68 | EXPORT_SYMBOL(__raw_writesb); | ||
69 | EXPORT_SYMBOL(__raw_writesw); | ||
70 | EXPORT_SYMBOL(__raw_writesl); | ||
diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c deleted file mode 100644 index 0341ae27c9ec..000000000000 --- a/arch/avr32/kernel/cpu.c +++ /dev/null | |||
@@ -1,410 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/init.h> | ||
9 | #include <linux/device.h> | ||
10 | #include <linux/seq_file.h> | ||
11 | #include <linux/cpu.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/percpu.h> | ||
14 | #include <linux/param.h> | ||
15 | #include <linux/errno.h> | ||
16 | #include <linux/clk.h> | ||
17 | |||
18 | #include <asm/setup.h> | ||
19 | #include <asm/sysreg.h> | ||
20 | |||
21 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | ||
22 | |||
23 | #ifdef CONFIG_PERFORMANCE_COUNTERS | ||
24 | |||
25 | /* | ||
26 | * XXX: If/when a SMP-capable implementation of AVR32 will ever be | ||
27 | * made, we must make sure that the code executes on the correct CPU. | ||
28 | */ | ||
29 | static ssize_t show_pc0event(struct device *dev, | ||
30 | struct device_attribute *attr, char *buf) | ||
31 | { | ||
32 | unsigned long pccr; | ||
33 | |||
34 | pccr = sysreg_read(PCCR); | ||
35 | return sprintf(buf, "0x%lx\n", (pccr >> 12) & 0x3f); | ||
36 | } | ||
37 | static ssize_t store_pc0event(struct device *dev, | ||
38 | struct device_attribute *attr, const char *buf, | ||
39 | size_t count) | ||
40 | { | ||
41 | unsigned long val; | ||
42 | int ret; | ||
43 | |||
44 | ret = kstrtoul(buf, 0, &val); | ||
45 | if (ret) | ||
46 | return ret; | ||
47 | if (val > 0x3f) | ||
48 | return -EINVAL; | ||
49 | val = (val << 12) | (sysreg_read(PCCR) & 0xfffc0fff); | ||
50 | sysreg_write(PCCR, val); | ||
51 | return count; | ||
52 | } | ||
53 | static ssize_t show_pc0count(struct device *dev, | ||
54 | struct device_attribute *attr, char *buf) | ||
55 | { | ||
56 | unsigned long pcnt0; | ||
57 | |||
58 | pcnt0 = sysreg_read(PCNT0); | ||
59 | return sprintf(buf, "%lu\n", pcnt0); | ||
60 | } | ||
61 | static ssize_t store_pc0count(struct device *dev, | ||
62 | struct device_attribute *attr, | ||
63 | const char *buf, size_t count) | ||
64 | { | ||
65 | unsigned long val; | ||
66 | int ret; | ||
67 | |||
68 | ret = kstrtoul(buf, 0, &val); | ||
69 | if (ret) | ||
70 | return ret; | ||
71 | sysreg_write(PCNT0, val); | ||
72 | |||
73 | return count; | ||
74 | } | ||
75 | |||
76 | static ssize_t show_pc1event(struct device *dev, | ||
77 | struct device_attribute *attr, char *buf) | ||
78 | { | ||
79 | unsigned long pccr; | ||
80 | |||
81 | pccr = sysreg_read(PCCR); | ||
82 | return sprintf(buf, "0x%lx\n", (pccr >> 18) & 0x3f); | ||
83 | } | ||
84 | static ssize_t store_pc1event(struct device *dev, | ||
85 | struct device_attribute *attr, const char *buf, | ||
86 | size_t count) | ||
87 | { | ||
88 | unsigned long val; | ||
89 | int ret; | ||
90 | |||
91 | ret = kstrtoul(buf, 0, &val); | ||
92 | if (ret) | ||
93 | return ret; | ||
94 | if (val > 0x3f) | ||
95 | return -EINVAL; | ||
96 | val = (val << 18) | (sysreg_read(PCCR) & 0xff03ffff); | ||
97 | sysreg_write(PCCR, val); | ||
98 | return count; | ||
99 | } | ||
100 | static ssize_t show_pc1count(struct device *dev, | ||
101 | struct device_attribute *attr, char *buf) | ||
102 | { | ||
103 | unsigned long pcnt1; | ||
104 | |||
105 | pcnt1 = sysreg_read(PCNT1); | ||
106 | return sprintf(buf, "%lu\n", pcnt1); | ||
107 | } | ||
108 | static ssize_t store_pc1count(struct device *dev, | ||
109 | struct device_attribute *attr, const char *buf, | ||
110 | size_t count) | ||
111 | { | ||
112 | unsigned long val; | ||
113 | int ret; | ||
114 | |||
115 | ret = kstrtoul(buf, 0, &val); | ||
116 | if (ret) | ||
117 | return ret; | ||
118 | sysreg_write(PCNT1, val); | ||
119 | |||
120 | return count; | ||
121 | } | ||
122 | |||
123 | static ssize_t show_pccycles(struct device *dev, | ||
124 | struct device_attribute *attr, char *buf) | ||
125 | { | ||
126 | unsigned long pccnt; | ||
127 | |||
128 | pccnt = sysreg_read(PCCNT); | ||
129 | return sprintf(buf, "%lu\n", pccnt); | ||
130 | } | ||
131 | static ssize_t store_pccycles(struct device *dev, | ||
132 | struct device_attribute *attr, const char *buf, | ||
133 | size_t count) | ||
134 | { | ||
135 | unsigned long val; | ||
136 | int ret; | ||
137 | |||
138 | ret = kstrtoul(buf, 0, &val); | ||
139 | if (ret) | ||
140 | return ret; | ||
141 | sysreg_write(PCCNT, val); | ||
142 | |||
143 | return count; | ||
144 | } | ||
145 | |||
146 | static ssize_t show_pcenable(struct device *dev, | ||
147 | struct device_attribute *attr, char *buf) | ||
148 | { | ||
149 | unsigned long pccr; | ||
150 | |||
151 | pccr = sysreg_read(PCCR); | ||
152 | return sprintf(buf, "%c\n", (pccr & 1)?'1':'0'); | ||
153 | } | ||
154 | static ssize_t store_pcenable(struct device *dev, | ||
155 | struct device_attribute *attr, const char *buf, | ||
156 | size_t count) | ||
157 | { | ||
158 | unsigned long pccr, val; | ||
159 | int ret; | ||
160 | |||
161 | ret = kstrtoul(buf, 0, &val); | ||
162 | if (ret) | ||
163 | return ret; | ||
164 | if (val) | ||
165 | val = 1; | ||
166 | |||
167 | pccr = sysreg_read(PCCR); | ||
168 | pccr = (pccr & ~1UL) | val; | ||
169 | sysreg_write(PCCR, pccr); | ||
170 | |||
171 | return count; | ||
172 | } | ||
173 | |||
174 | static DEVICE_ATTR(pc0event, 0600, show_pc0event, store_pc0event); | ||
175 | static DEVICE_ATTR(pc0count, 0600, show_pc0count, store_pc0count); | ||
176 | static DEVICE_ATTR(pc1event, 0600, show_pc1event, store_pc1event); | ||
177 | static DEVICE_ATTR(pc1count, 0600, show_pc1count, store_pc1count); | ||
178 | static DEVICE_ATTR(pccycles, 0600, show_pccycles, store_pccycles); | ||
179 | static DEVICE_ATTR(pcenable, 0600, show_pcenable, store_pcenable); | ||
180 | |||
181 | #endif /* CONFIG_PERFORMANCE_COUNTERS */ | ||
182 | |||
183 | static int __init topology_init(void) | ||
184 | { | ||
185 | int cpu; | ||
186 | |||
187 | for_each_possible_cpu(cpu) { | ||
188 | struct cpu *c = &per_cpu(cpu_devices, cpu); | ||
189 | |||
190 | register_cpu(c, cpu); | ||
191 | |||
192 | #ifdef CONFIG_PERFORMANCE_COUNTERS | ||
193 | device_create_file(&c->dev, &dev_attr_pc0event); | ||
194 | device_create_file(&c->dev, &dev_attr_pc0count); | ||
195 | device_create_file(&c->dev, &dev_attr_pc1event); | ||
196 | device_create_file(&c->dev, &dev_attr_pc1count); | ||
197 | device_create_file(&c->dev, &dev_attr_pccycles); | ||
198 | device_create_file(&c->dev, &dev_attr_pcenable); | ||
199 | #endif | ||
200 | } | ||
201 | |||
202 | return 0; | ||
203 | } | ||
204 | |||
205 | subsys_initcall(topology_init); | ||
206 | |||
207 | struct chip_id_map { | ||
208 | u16 mid; | ||
209 | u16 pn; | ||
210 | const char *name; | ||
211 | }; | ||
212 | |||
213 | static const struct chip_id_map chip_names[] = { | ||
214 | { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" }, | ||
215 | }; | ||
216 | #define NR_CHIP_NAMES ARRAY_SIZE(chip_names) | ||
217 | |||
218 | static const char *cpu_names[] = { | ||
219 | "Morgan", | ||
220 | "AP7", | ||
221 | }; | ||
222 | #define NR_CPU_NAMES ARRAY_SIZE(cpu_names) | ||
223 | |||
224 | static const char *arch_names[] = { | ||
225 | "AVR32A", | ||
226 | "AVR32B", | ||
227 | }; | ||
228 | #define NR_ARCH_NAMES ARRAY_SIZE(arch_names) | ||
229 | |||
230 | static const char *mmu_types[] = { | ||
231 | "No MMU", | ||
232 | "ITLB and DTLB", | ||
233 | "Shared TLB", | ||
234 | "MPU" | ||
235 | }; | ||
236 | |||
237 | static const char *cpu_feature_flags[] = { | ||
238 | "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu", | ||
239 | }; | ||
240 | |||
241 | static const char *get_chip_name(struct avr32_cpuinfo *cpu) | ||
242 | { | ||
243 | unsigned int i; | ||
244 | unsigned int mid = avr32_get_manufacturer_id(cpu); | ||
245 | unsigned int pn = avr32_get_product_number(cpu); | ||
246 | |||
247 | for (i = 0; i < NR_CHIP_NAMES; i++) { | ||
248 | if (chip_names[i].mid == mid && chip_names[i].pn == pn) | ||
249 | return chip_names[i].name; | ||
250 | } | ||
251 | |||
252 | return "(unknown)"; | ||
253 | } | ||
254 | |||
255 | void __init setup_processor(void) | ||
256 | { | ||
257 | unsigned long config0, config1; | ||
258 | unsigned long features; | ||
259 | unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type; | ||
260 | unsigned device_id; | ||
261 | unsigned tmp; | ||
262 | unsigned i; | ||
263 | |||
264 | config0 = sysreg_read(CONFIG0); | ||
265 | config1 = sysreg_read(CONFIG1); | ||
266 | cpu_id = SYSREG_BFEXT(PROCESSORID, config0); | ||
267 | cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0); | ||
268 | arch_id = SYSREG_BFEXT(AT, config0); | ||
269 | arch_rev = SYSREG_BFEXT(AR, config0); | ||
270 | mmu_type = SYSREG_BFEXT(MMUT, config0); | ||
271 | |||
272 | device_id = ocd_read(DID); | ||
273 | |||
274 | boot_cpu_data.arch_type = arch_id; | ||
275 | boot_cpu_data.cpu_type = cpu_id; | ||
276 | boot_cpu_data.arch_revision = arch_rev; | ||
277 | boot_cpu_data.cpu_revision = cpu_rev; | ||
278 | boot_cpu_data.tlb_config = mmu_type; | ||
279 | boot_cpu_data.device_id = device_id; | ||
280 | |||
281 | tmp = SYSREG_BFEXT(ILSZ, config1); | ||
282 | if (tmp) { | ||
283 | boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1); | ||
284 | boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1); | ||
285 | boot_cpu_data.icache.linesz = 1 << (tmp + 1); | ||
286 | } | ||
287 | tmp = SYSREG_BFEXT(DLSZ, config1); | ||
288 | if (tmp) { | ||
289 | boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1); | ||
290 | boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1); | ||
291 | boot_cpu_data.dcache.linesz = 1 << (tmp + 1); | ||
292 | } | ||
293 | |||
294 | if ((cpu_id >= NR_CPU_NAMES) || (arch_id >= NR_ARCH_NAMES)) { | ||
295 | printk ("Unknown CPU configuration (ID %02x, arch %02x), " | ||
296 | "continuing anyway...\n", | ||
297 | cpu_id, arch_id); | ||
298 | return; | ||
299 | } | ||
300 | |||
301 | printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data), | ||
302 | avr32_get_chip_revision(&boot_cpu_data) + 'A'); | ||
303 | printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n", | ||
304 | cpu_names[cpu_id], cpu_id, cpu_rev, | ||
305 | arch_names[arch_id], arch_rev); | ||
306 | printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]); | ||
307 | |||
308 | printk ("CPU: features:"); | ||
309 | features = 0; | ||
310 | if (config0 & SYSREG_BIT(CONFIG0_R)) | ||
311 | features |= AVR32_FEATURE_RMW; | ||
312 | if (config0 & SYSREG_BIT(CONFIG0_D)) | ||
313 | features |= AVR32_FEATURE_DSP; | ||
314 | if (config0 & SYSREG_BIT(CONFIG0_S)) | ||
315 | features |= AVR32_FEATURE_SIMD; | ||
316 | if (config0 & SYSREG_BIT(CONFIG0_O)) | ||
317 | features |= AVR32_FEATURE_OCD; | ||
318 | if (config0 & SYSREG_BIT(CONFIG0_P)) | ||
319 | features |= AVR32_FEATURE_PCTR; | ||
320 | if (config0 & SYSREG_BIT(CONFIG0_J)) | ||
321 | features |= AVR32_FEATURE_JAVA; | ||
322 | if (config0 & SYSREG_BIT(CONFIG0_F)) | ||
323 | features |= AVR32_FEATURE_FPU; | ||
324 | |||
325 | for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) | ||
326 | if (features & (1 << i)) | ||
327 | printk(" %s", cpu_feature_flags[i]); | ||
328 | |||
329 | printk("\n"); | ||
330 | boot_cpu_data.features = features; | ||
331 | } | ||
332 | |||
333 | #ifdef CONFIG_PROC_FS | ||
334 | static int c_show(struct seq_file *m, void *v) | ||
335 | { | ||
336 | unsigned int icache_size, dcache_size; | ||
337 | unsigned int cpu = smp_processor_id(); | ||
338 | unsigned int freq; | ||
339 | unsigned int i; | ||
340 | |||
341 | icache_size = boot_cpu_data.icache.ways * | ||
342 | boot_cpu_data.icache.sets * | ||
343 | boot_cpu_data.icache.linesz; | ||
344 | dcache_size = boot_cpu_data.dcache.ways * | ||
345 | boot_cpu_data.dcache.sets * | ||
346 | boot_cpu_data.dcache.linesz; | ||
347 | |||
348 | seq_printf(m, "processor\t: %d\n", cpu); | ||
349 | |||
350 | seq_printf(m, "chip type\t: %s revision %c\n", | ||
351 | get_chip_name(&boot_cpu_data), | ||
352 | avr32_get_chip_revision(&boot_cpu_data) + 'A'); | ||
353 | if (boot_cpu_data.arch_type < NR_ARCH_NAMES) | ||
354 | seq_printf(m, "cpu arch\t: %s revision %d\n", | ||
355 | arch_names[boot_cpu_data.arch_type], | ||
356 | boot_cpu_data.arch_revision); | ||
357 | if (boot_cpu_data.cpu_type < NR_CPU_NAMES) | ||
358 | seq_printf(m, "cpu core\t: %s revision %d\n", | ||
359 | cpu_names[boot_cpu_data.cpu_type], | ||
360 | boot_cpu_data.cpu_revision); | ||
361 | |||
362 | freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000; | ||
363 | seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000); | ||
364 | |||
365 | seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n", | ||
366 | icache_size >> 10, | ||
367 | boot_cpu_data.icache.ways, | ||
368 | boot_cpu_data.icache.sets, | ||
369 | boot_cpu_data.icache.linesz); | ||
370 | seq_printf(m, "d-cache\t\t: %dK (%u ways x %u sets x %u)\n", | ||
371 | dcache_size >> 10, | ||
372 | boot_cpu_data.dcache.ways, | ||
373 | boot_cpu_data.dcache.sets, | ||
374 | boot_cpu_data.dcache.linesz); | ||
375 | |||
376 | seq_printf(m, "features\t:"); | ||
377 | for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) | ||
378 | if (boot_cpu_data.features & (1 << i)) | ||
379 | seq_printf(m, " %s", cpu_feature_flags[i]); | ||
380 | |||
381 | seq_printf(m, "\nbogomips\t: %lu.%02lu\n", | ||
382 | boot_cpu_data.loops_per_jiffy / (500000/HZ), | ||
383 | (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100); | ||
384 | |||
385 | return 0; | ||
386 | } | ||
387 | |||
388 | static void *c_start(struct seq_file *m, loff_t *pos) | ||
389 | { | ||
390 | return *pos < 1 ? (void *)1 : NULL; | ||
391 | } | ||
392 | |||
393 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | ||
394 | { | ||
395 | ++*pos; | ||
396 | return NULL; | ||
397 | } | ||
398 | |||
399 | static void c_stop(struct seq_file *m, void *v) | ||
400 | { | ||
401 | |||
402 | } | ||
403 | |||
404 | const struct seq_operations cpuinfo_op = { | ||
405 | .start = c_start, | ||
406 | .next = c_next, | ||
407 | .stop = c_stop, | ||
408 | .show = c_show | ||
409 | }; | ||
410 | #endif /* CONFIG_PROC_FS */ | ||
diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S deleted file mode 100644 index 7301f4806bbe..000000000000 --- a/arch/avr32/kernel/entry-avr32b.S +++ /dev/null | |||
@@ -1,877 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * This file contains the low-level entry-points into the kernel, that is, | ||
11 | * exception handlers, debug trap handlers, interrupt handlers and the | ||
12 | * system call handler. | ||
13 | */ | ||
14 | #include <linux/errno.h> | ||
15 | |||
16 | #include <asm/asm.h> | ||
17 | #include <asm/hardirq.h> | ||
18 | #include <asm/irq.h> | ||
19 | #include <asm/ocd.h> | ||
20 | #include <asm/page.h> | ||
21 | #include <asm/pgtable.h> | ||
22 | #include <asm/ptrace.h> | ||
23 | #include <asm/sysreg.h> | ||
24 | #include <asm/thread_info.h> | ||
25 | #include <asm/unistd.h> | ||
26 | |||
27 | #ifdef CONFIG_PREEMPT | ||
28 | # define preempt_stop mask_interrupts | ||
29 | #else | ||
30 | # define preempt_stop | ||
31 | # define fault_resume_kernel fault_restore_all | ||
32 | #endif | ||
33 | |||
34 | #define __MASK(x) ((1 << (x)) - 1) | ||
35 | #define IRQ_MASK ((__MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT) | \ | ||
36 | (__MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)) | ||
37 | |||
38 | .section .ex.text,"ax",@progbits | ||
39 | .align 2 | ||
40 | exception_vectors: | ||
41 | bral handle_critical | ||
42 | .align 2 | ||
43 | bral handle_critical | ||
44 | .align 2 | ||
45 | bral do_bus_error_write | ||
46 | .align 2 | ||
47 | bral do_bus_error_read | ||
48 | .align 2 | ||
49 | bral do_nmi_ll | ||
50 | .align 2 | ||
51 | bral handle_address_fault | ||
52 | .align 2 | ||
53 | bral handle_protection_fault | ||
54 | .align 2 | ||
55 | bral handle_debug | ||
56 | .align 2 | ||
57 | bral do_illegal_opcode_ll | ||
58 | .align 2 | ||
59 | bral do_illegal_opcode_ll | ||
60 | .align 2 | ||
61 | bral do_illegal_opcode_ll | ||
62 | .align 2 | ||
63 | bral do_fpe_ll | ||
64 | .align 2 | ||
65 | bral do_illegal_opcode_ll | ||
66 | .align 2 | ||
67 | bral handle_address_fault | ||
68 | .align 2 | ||
69 | bral handle_address_fault | ||
70 | .align 2 | ||
71 | bral handle_protection_fault | ||
72 | .align 2 | ||
73 | bral handle_protection_fault | ||
74 | .align 2 | ||
75 | bral do_dtlb_modified | ||
76 | |||
77 | #define tlbmiss_save pushm r0-r3 | ||
78 | #define tlbmiss_restore popm r0-r3 | ||
79 | |||
80 | .org 0x50 | ||
81 | .global itlb_miss | ||
82 | itlb_miss: | ||
83 | tlbmiss_save | ||
84 | rjmp tlb_miss_common | ||
85 | |||
86 | .org 0x60 | ||
87 | dtlb_miss_read: | ||
88 | tlbmiss_save | ||
89 | rjmp tlb_miss_common | ||
90 | |||
91 | .org 0x70 | ||
92 | dtlb_miss_write: | ||
93 | tlbmiss_save | ||
94 | |||
95 | .global tlb_miss_common | ||
96 | .align 2 | ||
97 | tlb_miss_common: | ||
98 | mfsr r0, SYSREG_TLBEAR | ||
99 | mfsr r1, SYSREG_PTBR | ||
100 | |||
101 | /* | ||
102 | * First level lookup: The PGD contains virtual pointers to | ||
103 | * the second-level page tables, but they may be NULL if not | ||
104 | * present. | ||
105 | */ | ||
106 | pgtbl_lookup: | ||
107 | lsr r2, r0, PGDIR_SHIFT | ||
108 | ld.w r3, r1[r2 << 2] | ||
109 | bfextu r1, r0, PAGE_SHIFT, PGDIR_SHIFT - PAGE_SHIFT | ||
110 | cp.w r3, 0 | ||
111 | breq page_table_not_present | ||
112 | |||
113 | /* Second level lookup */ | ||
114 | ld.w r2, r3[r1 << 2] | ||
115 | mfsr r0, SYSREG_TLBARLO | ||
116 | bld r2, _PAGE_BIT_PRESENT | ||
117 | brcc page_not_present | ||
118 | |||
119 | /* Mark the page as accessed */ | ||
120 | sbr r2, _PAGE_BIT_ACCESSED | ||
121 | st.w r3[r1 << 2], r2 | ||
122 | |||
123 | /* Drop software flags */ | ||
124 | andl r2, _PAGE_FLAGS_HARDWARE_MASK & 0xffff | ||
125 | mtsr SYSREG_TLBELO, r2 | ||
126 | |||
127 | /* Figure out which entry we want to replace */ | ||
128 | mfsr r1, SYSREG_MMUCR | ||
129 | clz r2, r0 | ||
130 | brcc 1f | ||
131 | mov r3, -1 /* All entries have been accessed, */ | ||
132 | mov r2, 0 /* so start at 0 */ | ||
133 | mtsr SYSREG_TLBARLO, r3 /* and reset TLBAR */ | ||
134 | |||
135 | 1: bfins r1, r2, SYSREG_DRP_OFFSET, SYSREG_DRP_SIZE | ||
136 | mtsr SYSREG_MMUCR, r1 | ||
137 | tlbw | ||
138 | |||
139 | tlbmiss_restore | ||
140 | rete | ||
141 | |||
142 | /* The slow path of the TLB miss handler */ | ||
143 | .align 2 | ||
144 | page_table_not_present: | ||
145 | /* Do we need to synchronize with swapper_pg_dir? */ | ||
146 | bld r0, 31 | ||
147 | brcs sync_with_swapper_pg_dir | ||
148 | |||
149 | page_not_present: | ||
150 | tlbmiss_restore | ||
151 | sub sp, 4 | ||
152 | stmts --sp, r0-lr | ||
153 | call save_full_context_ex | ||
154 | mfsr r12, SYSREG_ECR | ||
155 | mov r11, sp | ||
156 | call do_page_fault | ||
157 | rjmp ret_from_exception | ||
158 | |||
159 | .align 2 | ||
160 | sync_with_swapper_pg_dir: | ||
161 | /* | ||
162 | * If swapper_pg_dir contains a non-NULL second-level page | ||
163 | * table pointer, copy it into the current PGD. If not, we | ||
164 | * must handle it as a full-blown page fault. | ||
165 | * | ||
166 | * Jumping back to pgtbl_lookup causes an unnecessary lookup, | ||
167 | * but it is guaranteed to be a cache hit, it won't happen | ||
168 | * very often, and we absolutely do not want to sacrifice any | ||
169 | * performance in the fast path in order to improve this. | ||
170 | */ | ||
171 | mov r1, lo(swapper_pg_dir) | ||
172 | orh r1, hi(swapper_pg_dir) | ||
173 | ld.w r3, r1[r2 << 2] | ||
174 | cp.w r3, 0 | ||
175 | breq page_not_present | ||
176 | mfsr r1, SYSREG_PTBR | ||
177 | st.w r1[r2 << 2], r3 | ||
178 | rjmp pgtbl_lookup | ||
179 | |||
180 | /* | ||
181 | * We currently have two bytes left at this point until we | ||
182 | * crash into the system call handler... | ||
183 | * | ||
184 | * Don't worry, the assembler will let us know. | ||
185 | */ | ||
186 | |||
187 | |||
188 | /* --- System Call --- */ | ||
189 | |||
190 | .org 0x100 | ||
191 | system_call: | ||
192 | #ifdef CONFIG_PREEMPT | ||
193 | mask_interrupts | ||
194 | #endif | ||
195 | pushm r12 /* r12_orig */ | ||
196 | stmts --sp, r0-lr | ||
197 | |||
198 | mfsr r0, SYSREG_RAR_SUP | ||
199 | mfsr r1, SYSREG_RSR_SUP | ||
200 | #ifdef CONFIG_PREEMPT | ||
201 | unmask_interrupts | ||
202 | #endif | ||
203 | zero_fp | ||
204 | stm --sp, r0-r1 | ||
205 | |||
206 | /* check for syscall tracing */ | ||
207 | get_thread_info r0 | ||
208 | ld.w r1, r0[TI_flags] | ||
209 | bld r1, TIF_SYSCALL_TRACE | ||
210 | brcs syscall_trace_enter | ||
211 | |||
212 | syscall_trace_cont: | ||
213 | cp.w r8, NR_syscalls | ||
214 | brhs syscall_badsys | ||
215 | |||
216 | lddpc lr, syscall_table_addr | ||
217 | ld.w lr, lr[r8 << 2] | ||
218 | mov r8, r5 /* 5th argument (6th is pushed by stub) */ | ||
219 | icall lr | ||
220 | |||
221 | .global syscall_return | ||
222 | syscall_return: | ||
223 | get_thread_info r0 | ||
224 | mask_interrupts /* make sure we don't miss an interrupt | ||
225 | setting need_resched or sigpending | ||
226 | between sampling and the rets */ | ||
227 | |||
228 | /* Store the return value so that the correct value is loaded below */ | ||
229 | stdsp sp[REG_R12], r12 | ||
230 | |||
231 | ld.w r1, r0[TI_flags] | ||
232 | andl r1, _TIF_ALLWORK_MASK, COH | ||
233 | brne syscall_exit_work | ||
234 | |||
235 | syscall_exit_cont: | ||
236 | popm r8-r9 | ||
237 | mtsr SYSREG_RAR_SUP, r8 | ||
238 | mtsr SYSREG_RSR_SUP, r9 | ||
239 | ldmts sp++, r0-lr | ||
240 | sub sp, -4 /* r12_orig */ | ||
241 | rets | ||
242 | |||
243 | .align 2 | ||
244 | syscall_table_addr: | ||
245 | .long sys_call_table | ||
246 | |||
247 | syscall_badsys: | ||
248 | mov r12, -ENOSYS | ||
249 | rjmp syscall_return | ||
250 | |||
251 | .global ret_from_fork | ||
252 | ret_from_fork: | ||
253 | call schedule_tail | ||
254 | mov r12, 0 | ||
255 | rjmp syscall_return | ||
256 | |||
257 | .global ret_from_kernel_thread | ||
258 | ret_from_kernel_thread: | ||
259 | call schedule_tail | ||
260 | mov r12, r0 | ||
261 | mov lr, r2 /* syscall_return */ | ||
262 | mov pc, r1 | ||
263 | |||
264 | syscall_trace_enter: | ||
265 | pushm r8-r12 | ||
266 | call syscall_trace | ||
267 | popm r8-r12 | ||
268 | rjmp syscall_trace_cont | ||
269 | |||
270 | syscall_exit_work: | ||
271 | bld r1, TIF_SYSCALL_TRACE | ||
272 | brcc 1f | ||
273 | unmask_interrupts | ||
274 | call syscall_trace | ||
275 | mask_interrupts | ||
276 | ld.w r1, r0[TI_flags] | ||
277 | |||
278 | 1: bld r1, TIF_NEED_RESCHED | ||
279 | brcc 2f | ||
280 | unmask_interrupts | ||
281 | call schedule | ||
282 | mask_interrupts | ||
283 | ld.w r1, r0[TI_flags] | ||
284 | rjmp 1b | ||
285 | |||
286 | 2: mov r2, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME | ||
287 | tst r1, r2 | ||
288 | breq 3f | ||
289 | unmask_interrupts | ||
290 | mov r12, sp | ||
291 | mov r11, r0 | ||
292 | call do_notify_resume | ||
293 | mask_interrupts | ||
294 | ld.w r1, r0[TI_flags] | ||
295 | rjmp 1b | ||
296 | |||
297 | 3: bld r1, TIF_BREAKPOINT | ||
298 | brcc syscall_exit_cont | ||
299 | rjmp enter_monitor_mode | ||
300 | |||
301 | /* This function expects to find offending PC in SYSREG_RAR_EX */ | ||
302 | .type save_full_context_ex, @function | ||
303 | .align 2 | ||
304 | save_full_context_ex: | ||
305 | mfsr r11, SYSREG_RAR_EX | ||
306 | sub r9, pc, . - debug_trampoline | ||
307 | mfsr r8, SYSREG_RSR_EX | ||
308 | cp.w r9, r11 | ||
309 | breq 3f | ||
310 | mov r12, r8 | ||
311 | andh r8, (MODE_MASK >> 16), COH | ||
312 | brne 2f | ||
313 | |||
314 | 1: pushm r11, r12 /* PC and SR */ | ||
315 | unmask_exceptions | ||
316 | ret r12 | ||
317 | |||
318 | 2: sub r10, sp, -(FRAME_SIZE_FULL - REG_LR) | ||
319 | stdsp sp[4], r10 /* replace saved SP */ | ||
320 | rjmp 1b | ||
321 | |||
322 | /* | ||
323 | * The debug handler set up a trampoline to make us | ||
324 | * automatically enter monitor mode upon return, but since | ||
325 | * we're saving the full context, we must assume that the | ||
326 | * exception handler might want to alter the return address | ||
327 | * and/or status register. So we need to restore the original | ||
328 | * context and enter monitor mode manually after the exception | ||
329 | * has been handled. | ||
330 | */ | ||
331 | 3: get_thread_info r8 | ||
332 | ld.w r11, r8[TI_rar_saved] | ||
333 | ld.w r12, r8[TI_rsr_saved] | ||
334 | rjmp 1b | ||
335 | .size save_full_context_ex, . - save_full_context_ex | ||
336 | |||
337 | /* Low-level exception handlers */ | ||
338 | handle_critical: | ||
339 | /* | ||
340 | * AT32AP700x errata: | ||
341 | * | ||
342 | * After a Java stack overflow or underflow trap, any CPU | ||
343 | * memory access may cause erratic behavior. This will happen | ||
344 | * when the four least significant bits of the JOSP system | ||
345 | * register contains any value between 9 and 15 (inclusive). | ||
346 | * | ||
347 | * Possible workarounds: | ||
348 | * - Don't use the Java Extension Module | ||
349 | * - Ensure that the stack overflow and underflow trap | ||
350 | * handlers do not do any memory access or trigger any | ||
351 | * exceptions before the overflow/underflow condition is | ||
352 | * cleared (by incrementing or decrementing the JOSP) | ||
353 | * - Make sure that JOSP does not contain any problematic | ||
354 | * value before doing any exception or interrupt | ||
355 | * processing. | ||
356 | * - Set up a critical exception handler which writes a | ||
357 | * known-to-be-safe value, e.g. 4, to JOSP before doing | ||
358 | * any further processing. | ||
359 | * | ||
360 | * We'll use the last workaround for now since we cannot | ||
361 | * guarantee that user space processes don't use Java mode. | ||
362 | * Non-well-behaving userland will be terminated with extreme | ||
363 | * prejudice. | ||
364 | */ | ||
365 | #ifdef CONFIG_CPU_AT32AP700X | ||
366 | /* | ||
367 | * There's a chance we can't touch memory, so temporarily | ||
368 | * borrow PTBR to save the stack pointer while we fix things | ||
369 | * up... | ||
370 | */ | ||
371 | mtsr SYSREG_PTBR, sp | ||
372 | mov sp, 4 | ||
373 | mtsr SYSREG_JOSP, sp | ||
374 | mfsr sp, SYSREG_PTBR | ||
375 | sub pc, -2 | ||
376 | |||
377 | /* Push most of pt_regs on stack. We'll do the rest later */ | ||
378 | sub sp, 4 | ||
379 | pushm r0-r12 | ||
380 | |||
381 | /* PTBR mirrors current_thread_info()->task->active_mm->pgd */ | ||
382 | get_thread_info r0 | ||
383 | ld.w r1, r0[TI_task] | ||
384 | ld.w r2, r1[TSK_active_mm] | ||
385 | ld.w r3, r2[MM_pgd] | ||
386 | mtsr SYSREG_PTBR, r3 | ||
387 | #else | ||
388 | sub sp, 4 | ||
389 | pushm r0-r12 | ||
390 | #endif | ||
391 | sub r0, sp, -(14 * 4) | ||
392 | mov r1, lr | ||
393 | mfsr r2, SYSREG_RAR_EX | ||
394 | mfsr r3, SYSREG_RSR_EX | ||
395 | pushm r0-r3 | ||
396 | |||
397 | mfsr r12, SYSREG_ECR | ||
398 | mov r11, sp | ||
399 | call do_critical_exception | ||
400 | |||
401 | /* We should never get here... */ | ||
402 | bad_return: | ||
403 | sub r12, pc, (. - 1f) | ||
404 | lddpc pc, 2f | ||
405 | .align 2 | ||
406 | 1: .asciz "Return from critical exception!" | ||
407 | 2: .long panic | ||
408 | |||
409 | .align 1 | ||
410 | do_bus_error_write: | ||
411 | sub sp, 4 | ||
412 | stmts --sp, r0-lr | ||
413 | call save_full_context_ex | ||
414 | mov r11, 1 | ||
415 | rjmp 1f | ||
416 | |||
417 | do_bus_error_read: | ||
418 | sub sp, 4 | ||
419 | stmts --sp, r0-lr | ||
420 | call save_full_context_ex | ||
421 | mov r11, 0 | ||
422 | 1: mfsr r12, SYSREG_BEAR | ||
423 | mov r10, sp | ||
424 | call do_bus_error | ||
425 | rjmp ret_from_exception | ||
426 | |||
427 | .align 1 | ||
428 | do_nmi_ll: | ||
429 | sub sp, 4 | ||
430 | stmts --sp, r0-lr | ||
431 | mfsr r9, SYSREG_RSR_NMI | ||
432 | mfsr r8, SYSREG_RAR_NMI | ||
433 | bfextu r0, r9, MODE_SHIFT, 3 | ||
434 | brne 2f | ||
435 | |||
436 | 1: pushm r8, r9 /* PC and SR */ | ||
437 | mfsr r12, SYSREG_ECR | ||
438 | mov r11, sp | ||
439 | call do_nmi | ||
440 | popm r8-r9 | ||
441 | mtsr SYSREG_RAR_NMI, r8 | ||
442 | tst r0, r0 | ||
443 | mtsr SYSREG_RSR_NMI, r9 | ||
444 | brne 3f | ||
445 | |||
446 | ldmts sp++, r0-lr | ||
447 | sub sp, -4 /* skip r12_orig */ | ||
448 | rete | ||
449 | |||
450 | 2: sub r10, sp, -(FRAME_SIZE_FULL - REG_LR) | ||
451 | stdsp sp[4], r10 /* replace saved SP */ | ||
452 | rjmp 1b | ||
453 | |||
454 | 3: popm lr | ||
455 | sub sp, -4 /* skip sp */ | ||
456 | popm r0-r12 | ||
457 | sub sp, -4 /* skip r12_orig */ | ||
458 | rete | ||
459 | |||
460 | handle_address_fault: | ||
461 | sub sp, 4 | ||
462 | stmts --sp, r0-lr | ||
463 | call save_full_context_ex | ||
464 | mfsr r12, SYSREG_ECR | ||
465 | mov r11, sp | ||
466 | call do_address_exception | ||
467 | rjmp ret_from_exception | ||
468 | |||
469 | handle_protection_fault: | ||
470 | sub sp, 4 | ||
471 | stmts --sp, r0-lr | ||
472 | call save_full_context_ex | ||
473 | mfsr r12, SYSREG_ECR | ||
474 | mov r11, sp | ||
475 | call do_page_fault | ||
476 | rjmp ret_from_exception | ||
477 | |||
478 | .align 1 | ||
479 | do_illegal_opcode_ll: | ||
480 | sub sp, 4 | ||
481 | stmts --sp, r0-lr | ||
482 | call save_full_context_ex | ||
483 | mfsr r12, SYSREG_ECR | ||
484 | mov r11, sp | ||
485 | call do_illegal_opcode | ||
486 | rjmp ret_from_exception | ||
487 | |||
488 | do_dtlb_modified: | ||
489 | pushm r0-r3 | ||
490 | mfsr r1, SYSREG_TLBEAR | ||
491 | mfsr r0, SYSREG_PTBR | ||
492 | lsr r2, r1, PGDIR_SHIFT | ||
493 | ld.w r0, r0[r2 << 2] | ||
494 | lsl r1, (32 - PGDIR_SHIFT) | ||
495 | lsr r1, (32 - PGDIR_SHIFT) + PAGE_SHIFT | ||
496 | |||
497 | /* Translate to virtual address in P1 */ | ||
498 | andl r0, 0xf000 | ||
499 | sbr r0, 31 | ||
500 | add r2, r0, r1 << 2 | ||
501 | ld.w r3, r2[0] | ||
502 | sbr r3, _PAGE_BIT_DIRTY | ||
503 | mov r0, r3 | ||
504 | st.w r2[0], r3 | ||
505 | |||
506 | /* The page table is up-to-date. Update the TLB entry as well */ | ||
507 | andl r0, lo(_PAGE_FLAGS_HARDWARE_MASK) | ||
508 | mtsr SYSREG_TLBELO, r0 | ||
509 | |||
510 | /* MMUCR[DRP] is updated automatically, so let's go... */ | ||
511 | tlbw | ||
512 | |||
513 | popm r0-r3 | ||
514 | rete | ||
515 | |||
516 | do_fpe_ll: | ||
517 | sub sp, 4 | ||
518 | stmts --sp, r0-lr | ||
519 | call save_full_context_ex | ||
520 | unmask_interrupts | ||
521 | mov r12, 26 | ||
522 | mov r11, sp | ||
523 | call do_fpe | ||
524 | rjmp ret_from_exception | ||
525 | |||
526 | ret_from_exception: | ||
527 | mask_interrupts | ||
528 | lddsp r4, sp[REG_SR] | ||
529 | |||
530 | andh r4, (MODE_MASK >> 16), COH | ||
531 | brne fault_resume_kernel | ||
532 | |||
533 | get_thread_info r0 | ||
534 | ld.w r1, r0[TI_flags] | ||
535 | andl r1, _TIF_WORK_MASK, COH | ||
536 | brne fault_exit_work | ||
537 | |||
538 | fault_resume_user: | ||
539 | popm r8-r9 | ||
540 | mask_exceptions | ||
541 | mtsr SYSREG_RAR_EX, r8 | ||
542 | mtsr SYSREG_RSR_EX, r9 | ||
543 | ldmts sp++, r0-lr | ||
544 | sub sp, -4 | ||
545 | rete | ||
546 | |||
547 | fault_resume_kernel: | ||
548 | #ifdef CONFIG_PREEMPT | ||
549 | get_thread_info r0 | ||
550 | ld.w r2, r0[TI_preempt_count] | ||
551 | cp.w r2, 0 | ||
552 | brne 1f | ||
553 | ld.w r1, r0[TI_flags] | ||
554 | bld r1, TIF_NEED_RESCHED | ||
555 | brcc 1f | ||
556 | lddsp r4, sp[REG_SR] | ||
557 | bld r4, SYSREG_GM_OFFSET | ||
558 | brcs 1f | ||
559 | call preempt_schedule_irq | ||
560 | 1: | ||
561 | #endif | ||
562 | |||
563 | popm r8-r9 | ||
564 | mask_exceptions | ||
565 | mfsr r1, SYSREG_SR | ||
566 | mtsr SYSREG_RAR_EX, r8 | ||
567 | mtsr SYSREG_RSR_EX, r9 | ||
568 | popm lr | ||
569 | sub sp, -4 /* ignore SP */ | ||
570 | popm r0-r12 | ||
571 | sub sp, -4 /* ignore r12_orig */ | ||
572 | rete | ||
573 | |||
574 | irq_exit_work: | ||
575 | /* Switch to exception mode so that we can share the same code. */ | ||
576 | mfsr r8, SYSREG_SR | ||
577 | cbr r8, SYSREG_M0_OFFSET | ||
578 | orh r8, hi(SYSREG_BIT(M1) | SYSREG_BIT(M2)) | ||
579 | mtsr SYSREG_SR, r8 | ||
580 | sub pc, -2 | ||
581 | get_thread_info r0 | ||
582 | ld.w r1, r0[TI_flags] | ||
583 | |||
584 | fault_exit_work: | ||
585 | bld r1, TIF_NEED_RESCHED | ||
586 | brcc 1f | ||
587 | unmask_interrupts | ||
588 | call schedule | ||
589 | mask_interrupts | ||
590 | ld.w r1, r0[TI_flags] | ||
591 | rjmp fault_exit_work | ||
592 | |||
593 | 1: mov r2, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME | ||
594 | tst r1, r2 | ||
595 | breq 2f | ||
596 | unmask_interrupts | ||
597 | mov r12, sp | ||
598 | mov r11, r0 | ||
599 | call do_notify_resume | ||
600 | mask_interrupts | ||
601 | ld.w r1, r0[TI_flags] | ||
602 | rjmp fault_exit_work | ||
603 | |||
604 | 2: bld r1, TIF_BREAKPOINT | ||
605 | brcc fault_resume_user | ||
606 | rjmp enter_monitor_mode | ||
607 | |||
608 | .section .kprobes.text, "ax", @progbits | ||
609 | .type handle_debug, @function | ||
610 | handle_debug: | ||
611 | sub sp, 4 /* r12_orig */ | ||
612 | stmts --sp, r0-lr | ||
613 | mfsr r8, SYSREG_RAR_DBG | ||
614 | mfsr r9, SYSREG_RSR_DBG | ||
615 | unmask_exceptions | ||
616 | pushm r8-r9 | ||
617 | bfextu r9, r9, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE | ||
618 | brne debug_fixup_regs | ||
619 | |||
620 | .Ldebug_fixup_cont: | ||
621 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
622 | call trace_hardirqs_off | ||
623 | #endif | ||
624 | mov r12, sp | ||
625 | call do_debug | ||
626 | mov sp, r12 | ||
627 | |||
628 | lddsp r2, sp[REG_SR] | ||
629 | bfextu r3, r2, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE | ||
630 | brne debug_resume_kernel | ||
631 | |||
632 | get_thread_info r0 | ||
633 | ld.w r1, r0[TI_flags] | ||
634 | mov r2, _TIF_DBGWORK_MASK | ||
635 | tst r1, r2 | ||
636 | brne debug_exit_work | ||
637 | |||
638 | bld r1, TIF_SINGLE_STEP | ||
639 | brcc 1f | ||
640 | mfdr r4, OCD_DC | ||
641 | sbr r4, OCD_DC_SS_BIT | ||
642 | mtdr OCD_DC, r4 | ||
643 | |||
644 | 1: popm r10,r11 | ||
645 | mask_exceptions | ||
646 | mtsr SYSREG_RSR_DBG, r11 | ||
647 | mtsr SYSREG_RAR_DBG, r10 | ||
648 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
649 | call trace_hardirqs_on | ||
650 | 1: | ||
651 | #endif | ||
652 | ldmts sp++, r0-lr | ||
653 | sub sp, -4 | ||
654 | retd | ||
655 | .size handle_debug, . - handle_debug | ||
656 | |||
657 | /* Mode of the trapped context is in r9 */ | ||
658 | .type debug_fixup_regs, @function | ||
659 | debug_fixup_regs: | ||
660 | mfsr r8, SYSREG_SR | ||
661 | mov r10, r8 | ||
662 | bfins r8, r9, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE | ||
663 | mtsr SYSREG_SR, r8 | ||
664 | sub pc, -2 | ||
665 | stdsp sp[REG_LR], lr | ||
666 | mtsr SYSREG_SR, r10 | ||
667 | sub pc, -2 | ||
668 | sub r8, sp, -FRAME_SIZE_FULL | ||
669 | stdsp sp[REG_SP], r8 | ||
670 | rjmp .Ldebug_fixup_cont | ||
671 | .size debug_fixup_regs, . - debug_fixup_regs | ||
672 | |||
673 | .type debug_resume_kernel, @function | ||
674 | debug_resume_kernel: | ||
675 | mask_exceptions | ||
676 | popm r10, r11 | ||
677 | mtsr SYSREG_RAR_DBG, r10 | ||
678 | mtsr SYSREG_RSR_DBG, r11 | ||
679 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
680 | bld r11, SYSREG_GM_OFFSET | ||
681 | brcc 1f | ||
682 | call trace_hardirqs_on | ||
683 | 1: | ||
684 | #endif | ||
685 | mfsr r2, SYSREG_SR | ||
686 | mov r1, r2 | ||
687 | bfins r2, r3, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE | ||
688 | mtsr SYSREG_SR, r2 | ||
689 | sub pc, -2 | ||
690 | popm lr | ||
691 | mtsr SYSREG_SR, r1 | ||
692 | sub pc, -2 | ||
693 | sub sp, -4 /* skip SP */ | ||
694 | popm r0-r12 | ||
695 | sub sp, -4 | ||
696 | retd | ||
697 | .size debug_resume_kernel, . - debug_resume_kernel | ||
698 | |||
699 | .type debug_exit_work, @function | ||
700 | debug_exit_work: | ||
701 | /* | ||
702 | * We must return from Monitor Mode using a retd, and we must | ||
703 | * not schedule since that involves the D bit in SR getting | ||
704 | * cleared by something other than the debug hardware. This | ||
705 | * may cause undefined behaviour according to the Architecture | ||
706 | * manual. | ||
707 | * | ||
708 | * So we fix up the return address and status and return to a | ||
709 | * stub below in Exception mode. From there, we can follow the | ||
710 | * normal exception return path. | ||
711 | * | ||
712 | * The real return address and status registers are stored on | ||
713 | * the stack in the way the exception return path understands, | ||
714 | * so no need to fix anything up there. | ||
715 | */ | ||
716 | sub r8, pc, . - fault_exit_work | ||
717 | mtsr SYSREG_RAR_DBG, r8 | ||
718 | mov r9, 0 | ||
719 | orh r9, hi(SR_EM | SR_GM | MODE_EXCEPTION) | ||
720 | mtsr SYSREG_RSR_DBG, r9 | ||
721 | sub pc, -2 | ||
722 | retd | ||
723 | .size debug_exit_work, . - debug_exit_work | ||
724 | |||
725 | .set rsr_int0, SYSREG_RSR_INT0 | ||
726 | .set rsr_int1, SYSREG_RSR_INT1 | ||
727 | .set rsr_int2, SYSREG_RSR_INT2 | ||
728 | .set rsr_int3, SYSREG_RSR_INT3 | ||
729 | .set rar_int0, SYSREG_RAR_INT0 | ||
730 | .set rar_int1, SYSREG_RAR_INT1 | ||
731 | .set rar_int2, SYSREG_RAR_INT2 | ||
732 | .set rar_int3, SYSREG_RAR_INT3 | ||
733 | |||
734 | .macro IRQ_LEVEL level | ||
735 | .type irq_level\level, @function | ||
736 | irq_level\level: | ||
737 | sub sp, 4 /* r12_orig */ | ||
738 | stmts --sp,r0-lr | ||
739 | mfsr r8, rar_int\level | ||
740 | mfsr r9, rsr_int\level | ||
741 | |||
742 | #ifdef CONFIG_PREEMPT | ||
743 | sub r11, pc, (. - system_call) | ||
744 | cp.w r11, r8 | ||
745 | breq 4f | ||
746 | #endif | ||
747 | |||
748 | pushm r8-r9 | ||
749 | |||
750 | mov r11, sp | ||
751 | mov r12, \level | ||
752 | |||
753 | call do_IRQ | ||
754 | |||
755 | lddsp r4, sp[REG_SR] | ||
756 | bfextu r4, r4, SYSREG_M0_OFFSET, 3 | ||
757 | cp.w r4, MODE_SUPERVISOR >> SYSREG_M0_OFFSET | ||
758 | breq 2f | ||
759 | cp.w r4, MODE_USER >> SYSREG_M0_OFFSET | ||
760 | #ifdef CONFIG_PREEMPT | ||
761 | brne 3f | ||
762 | #else | ||
763 | brne 1f | ||
764 | #endif | ||
765 | |||
766 | get_thread_info r0 | ||
767 | ld.w r1, r0[TI_flags] | ||
768 | andl r1, _TIF_WORK_MASK, COH | ||
769 | brne irq_exit_work | ||
770 | |||
771 | 1: | ||
772 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
773 | call trace_hardirqs_on | ||
774 | #endif | ||
775 | popm r8-r9 | ||
776 | mtsr rar_int\level, r8 | ||
777 | mtsr rsr_int\level, r9 | ||
778 | ldmts sp++,r0-lr | ||
779 | sub sp, -4 /* ignore r12_orig */ | ||
780 | rete | ||
781 | |||
782 | #ifdef CONFIG_PREEMPT | ||
783 | 4: mask_interrupts | ||
784 | mfsr r8, rsr_int\level | ||
785 | sbr r8, 16 | ||
786 | mtsr rsr_int\level, r8 | ||
787 | ldmts sp++, r0-lr | ||
788 | sub sp, -4 /* ignore r12_orig */ | ||
789 | rete | ||
790 | #endif | ||
791 | |||
792 | 2: get_thread_info r0 | ||
793 | ld.w r1, r0[TI_flags] | ||
794 | bld r1, TIF_CPU_GOING_TO_SLEEP | ||
795 | #ifdef CONFIG_PREEMPT | ||
796 | brcc 3f | ||
797 | #else | ||
798 | brcc 1b | ||
799 | #endif | ||
800 | sub r1, pc, . - cpu_idle_skip_sleep | ||
801 | stdsp sp[REG_PC], r1 | ||
802 | #ifdef CONFIG_PREEMPT | ||
803 | 3: get_thread_info r0 | ||
804 | ld.w r2, r0[TI_preempt_count] | ||
805 | cp.w r2, 0 | ||
806 | brne 1b | ||
807 | ld.w r1, r0[TI_flags] | ||
808 | bld r1, TIF_NEED_RESCHED | ||
809 | brcc 1b | ||
810 | lddsp r4, sp[REG_SR] | ||
811 | bld r4, SYSREG_GM_OFFSET | ||
812 | brcs 1b | ||
813 | call preempt_schedule_irq | ||
814 | #endif | ||
815 | rjmp 1b | ||
816 | .endm | ||
817 | |||
818 | .section .irq.text,"ax",@progbits | ||
819 | |||
820 | .global irq_level0 | ||
821 | .global irq_level1 | ||
822 | .global irq_level2 | ||
823 | .global irq_level3 | ||
824 | IRQ_LEVEL 0 | ||
825 | IRQ_LEVEL 1 | ||
826 | IRQ_LEVEL 2 | ||
827 | IRQ_LEVEL 3 | ||
828 | |||
829 | .section .kprobes.text, "ax", @progbits | ||
830 | .type enter_monitor_mode, @function | ||
831 | enter_monitor_mode: | ||
832 | /* | ||
833 | * We need to enter monitor mode to do a single step. The | ||
834 | * monitor code will alter the return address so that we | ||
835 | * return directly to the user instead of returning here. | ||
836 | */ | ||
837 | breakpoint | ||
838 | rjmp breakpoint_failed | ||
839 | |||
840 | .size enter_monitor_mode, . - enter_monitor_mode | ||
841 | |||
842 | .type debug_trampoline, @function | ||
843 | .global debug_trampoline | ||
844 | debug_trampoline: | ||
845 | /* | ||
846 | * Save the registers on the stack so that the monitor code | ||
847 | * can find them easily. | ||
848 | */ | ||
849 | sub sp, 4 /* r12_orig */ | ||
850 | stmts --sp, r0-lr | ||
851 | get_thread_info r0 | ||
852 | ld.w r8, r0[TI_rar_saved] | ||
853 | ld.w r9, r0[TI_rsr_saved] | ||
854 | pushm r8-r9 | ||
855 | |||
856 | /* | ||
857 | * The monitor code will alter the return address so we don't | ||
858 | * return here. | ||
859 | */ | ||
860 | breakpoint | ||
861 | rjmp breakpoint_failed | ||
862 | .size debug_trampoline, . - debug_trampoline | ||
863 | |||
864 | .type breakpoint_failed, @function | ||
865 | breakpoint_failed: | ||
866 | /* | ||
867 | * Something went wrong. Perhaps the debug hardware isn't | ||
868 | * enabled? | ||
869 | */ | ||
870 | lda.w r12, msg_breakpoint_failed | ||
871 | mov r11, sp | ||
872 | mov r10, 9 /* SIGKILL */ | ||
873 | call die | ||
874 | 1: rjmp 1b | ||
875 | |||
876 | msg_breakpoint_failed: | ||
877 | .asciz "Failed to enter Debug Mode" | ||
diff --git a/arch/avr32/kernel/head.S b/arch/avr32/kernel/head.S deleted file mode 100644 index 59eae6dfbed2..000000000000 --- a/arch/avr32/kernel/head.S +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * Non-board-specific low-level startup code | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/linkage.h> | ||
11 | |||
12 | #include <asm/page.h> | ||
13 | |||
14 | .section .init.text,"ax" | ||
15 | .global kernel_entry | ||
16 | kernel_entry: | ||
17 | /* Start the show */ | ||
18 | lddpc pc, kernel_start_addr | ||
19 | |||
20 | .align 2 | ||
21 | kernel_start_addr: | ||
22 | .long start_kernel | ||
diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c deleted file mode 100644 index 900e49b2258b..000000000000 --- a/arch/avr32/kernel/irq.c +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * Based on arch/i386/kernel/irq.c | ||
5 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/irq.h> | ||
14 | #include <linux/kernel_stat.h> | ||
15 | #include <linux/proc_fs.h> | ||
16 | #include <linux/seq_file.h> | ||
17 | #include <linux/device.h> | ||
18 | |||
19 | /* May be overridden by platform code */ | ||
20 | int __weak nmi_enable(void) | ||
21 | { | ||
22 | return -ENOSYS; | ||
23 | } | ||
24 | |||
25 | void __weak nmi_disable(void) | ||
26 | { | ||
27 | |||
28 | } | ||
diff --git a/arch/avr32/kernel/kprobes.c b/arch/avr32/kernel/kprobes.c deleted file mode 100644 index a94ece4a72c8..000000000000 --- a/arch/avr32/kernel/kprobes.c +++ /dev/null | |||
@@ -1,267 +0,0 @@ | |||
1 | /* | ||
2 | * Kernel Probes (KProbes) | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Atmel Corporation | ||
5 | * | ||
6 | * Based on arch/ppc64/kernel/kprobes.c | ||
7 | * Copyright (C) IBM Corporation, 2002, 2004 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kprobes.h> | ||
15 | #include <linux/ptrace.h> | ||
16 | |||
17 | #include <asm/cacheflush.h> | ||
18 | #include <linux/kdebug.h> | ||
19 | #include <asm/ocd.h> | ||
20 | |||
21 | DEFINE_PER_CPU(struct kprobe *, current_kprobe); | ||
22 | static unsigned long kprobe_status; | ||
23 | static struct pt_regs jprobe_saved_regs; | ||
24 | |||
25 | struct kretprobe_blackpoint kretprobe_blacklist[] = {{NULL, NULL}}; | ||
26 | |||
27 | int __kprobes arch_prepare_kprobe(struct kprobe *p) | ||
28 | { | ||
29 | int ret = 0; | ||
30 | |||
31 | if ((unsigned long)p->addr & 0x01) { | ||
32 | printk("Attempt to register kprobe at an unaligned address\n"); | ||
33 | ret = -EINVAL; | ||
34 | } | ||
35 | |||
36 | /* XXX: Might be a good idea to check if p->addr is a valid | ||
37 | * kernel address as well... */ | ||
38 | |||
39 | if (!ret) { | ||
40 | pr_debug("copy kprobe at %p\n", p->addr); | ||
41 | memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); | ||
42 | p->opcode = *p->addr; | ||
43 | } | ||
44 | |||
45 | return ret; | ||
46 | } | ||
47 | |||
48 | void __kprobes arch_arm_kprobe(struct kprobe *p) | ||
49 | { | ||
50 | pr_debug("arming kprobe at %p\n", p->addr); | ||
51 | ocd_enable(NULL); | ||
52 | *p->addr = BREAKPOINT_INSTRUCTION; | ||
53 | flush_icache_range((unsigned long)p->addr, | ||
54 | (unsigned long)p->addr + sizeof(kprobe_opcode_t)); | ||
55 | } | ||
56 | |||
57 | void __kprobes arch_disarm_kprobe(struct kprobe *p) | ||
58 | { | ||
59 | pr_debug("disarming kprobe at %p\n", p->addr); | ||
60 | ocd_disable(NULL); | ||
61 | *p->addr = p->opcode; | ||
62 | flush_icache_range((unsigned long)p->addr, | ||
63 | (unsigned long)p->addr + sizeof(kprobe_opcode_t)); | ||
64 | } | ||
65 | |||
66 | static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) | ||
67 | { | ||
68 | unsigned long dc; | ||
69 | |||
70 | pr_debug("preparing to singlestep over %p (PC=%08lx)\n", | ||
71 | p->addr, regs->pc); | ||
72 | |||
73 | BUG_ON(!(sysreg_read(SR) & SYSREG_BIT(SR_D))); | ||
74 | |||
75 | dc = ocd_read(DC); | ||
76 | dc |= 1 << OCD_DC_SS_BIT; | ||
77 | ocd_write(DC, dc); | ||
78 | |||
79 | /* | ||
80 | * We must run the instruction from its original location | ||
81 | * since it may actually reference PC. | ||
82 | * | ||
83 | * TODO: Do the instruction replacement directly in icache. | ||
84 | */ | ||
85 | *p->addr = p->opcode; | ||
86 | flush_icache_range((unsigned long)p->addr, | ||
87 | (unsigned long)p->addr + sizeof(kprobe_opcode_t)); | ||
88 | } | ||
89 | |||
90 | static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs) | ||
91 | { | ||
92 | unsigned long dc; | ||
93 | |||
94 | pr_debug("resuming execution at PC=%08lx\n", regs->pc); | ||
95 | |||
96 | dc = ocd_read(DC); | ||
97 | dc &= ~(1 << OCD_DC_SS_BIT); | ||
98 | ocd_write(DC, dc); | ||
99 | |||
100 | *p->addr = BREAKPOINT_INSTRUCTION; | ||
101 | flush_icache_range((unsigned long)p->addr, | ||
102 | (unsigned long)p->addr + sizeof(kprobe_opcode_t)); | ||
103 | } | ||
104 | |||
105 | static void __kprobes set_current_kprobe(struct kprobe *p) | ||
106 | { | ||
107 | __this_cpu_write(current_kprobe, p); | ||
108 | } | ||
109 | |||
110 | static int __kprobes kprobe_handler(struct pt_regs *regs) | ||
111 | { | ||
112 | struct kprobe *p; | ||
113 | void *addr = (void *)regs->pc; | ||
114 | int ret = 0; | ||
115 | |||
116 | pr_debug("kprobe_handler: kprobe_running=%p\n", | ||
117 | kprobe_running()); | ||
118 | |||
119 | /* | ||
120 | * We don't want to be preempted for the entire | ||
121 | * duration of kprobe processing | ||
122 | */ | ||
123 | preempt_disable(); | ||
124 | |||
125 | /* Check that we're not recursing */ | ||
126 | if (kprobe_running()) { | ||
127 | p = get_kprobe(addr); | ||
128 | if (p) { | ||
129 | if (kprobe_status == KPROBE_HIT_SS) { | ||
130 | printk("FIXME: kprobe hit while single-stepping!\n"); | ||
131 | goto no_kprobe; | ||
132 | } | ||
133 | |||
134 | printk("FIXME: kprobe hit while handling another kprobe\n"); | ||
135 | goto no_kprobe; | ||
136 | } else { | ||
137 | p = kprobe_running(); | ||
138 | if (p->break_handler && p->break_handler(p, regs)) | ||
139 | goto ss_probe; | ||
140 | } | ||
141 | /* If it's not ours, can't be delete race, (we hold lock). */ | ||
142 | goto no_kprobe; | ||
143 | } | ||
144 | |||
145 | p = get_kprobe(addr); | ||
146 | if (!p) | ||
147 | goto no_kprobe; | ||
148 | |||
149 | kprobe_status = KPROBE_HIT_ACTIVE; | ||
150 | set_current_kprobe(p); | ||
151 | if (p->pre_handler && p->pre_handler(p, regs)) | ||
152 | /* handler has already set things up, so skip ss setup */ | ||
153 | return 1; | ||
154 | |||
155 | ss_probe: | ||
156 | prepare_singlestep(p, regs); | ||
157 | kprobe_status = KPROBE_HIT_SS; | ||
158 | return 1; | ||
159 | |||
160 | no_kprobe: | ||
161 | preempt_enable_no_resched(); | ||
162 | return ret; | ||
163 | } | ||
164 | |||
165 | static int __kprobes post_kprobe_handler(struct pt_regs *regs) | ||
166 | { | ||
167 | struct kprobe *cur = kprobe_running(); | ||
168 | |||
169 | pr_debug("post_kprobe_handler, cur=%p\n", cur); | ||
170 | |||
171 | if (!cur) | ||
172 | return 0; | ||
173 | |||
174 | if (cur->post_handler) { | ||
175 | kprobe_status = KPROBE_HIT_SSDONE; | ||
176 | cur->post_handler(cur, regs, 0); | ||
177 | } | ||
178 | |||
179 | resume_execution(cur, regs); | ||
180 | reset_current_kprobe(); | ||
181 | preempt_enable_no_resched(); | ||
182 | |||
183 | return 1; | ||
184 | } | ||
185 | |||
186 | int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr) | ||
187 | { | ||
188 | struct kprobe *cur = kprobe_running(); | ||
189 | |||
190 | pr_debug("kprobe_fault_handler: trapnr=%d\n", trapnr); | ||
191 | |||
192 | if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr)) | ||
193 | return 1; | ||
194 | |||
195 | if (kprobe_status & KPROBE_HIT_SS) { | ||
196 | resume_execution(cur, regs); | ||
197 | preempt_enable_no_resched(); | ||
198 | } | ||
199 | return 0; | ||
200 | } | ||
201 | |||
202 | /* | ||
203 | * Wrapper routine to for handling exceptions. | ||
204 | */ | ||
205 | int __kprobes kprobe_exceptions_notify(struct notifier_block *self, | ||
206 | unsigned long val, void *data) | ||
207 | { | ||
208 | struct die_args *args = (struct die_args *)data; | ||
209 | int ret = NOTIFY_DONE; | ||
210 | |||
211 | pr_debug("kprobe_exceptions_notify: val=%lu, data=%p\n", | ||
212 | val, data); | ||
213 | |||
214 | switch (val) { | ||
215 | case DIE_BREAKPOINT: | ||
216 | if (kprobe_handler(args->regs)) | ||
217 | ret = NOTIFY_STOP; | ||
218 | break; | ||
219 | case DIE_SSTEP: | ||
220 | if (post_kprobe_handler(args->regs)) | ||
221 | ret = NOTIFY_STOP; | ||
222 | break; | ||
223 | default: | ||
224 | break; | ||
225 | } | ||
226 | |||
227 | return ret; | ||
228 | } | ||
229 | |||
230 | int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) | ||
231 | { | ||
232 | struct jprobe *jp = container_of(p, struct jprobe, kp); | ||
233 | |||
234 | memcpy(&jprobe_saved_regs, regs, sizeof(struct pt_regs)); | ||
235 | |||
236 | /* | ||
237 | * TODO: We should probably save some of the stack here as | ||
238 | * well, since gcc may pass arguments on the stack for certain | ||
239 | * functions (lots of arguments, large aggregates, varargs) | ||
240 | */ | ||
241 | |||
242 | /* setup return addr to the jprobe handler routine */ | ||
243 | regs->pc = (unsigned long)jp->entry; | ||
244 | return 1; | ||
245 | } | ||
246 | |||
247 | void __kprobes jprobe_return(void) | ||
248 | { | ||
249 | asm volatile("breakpoint" ::: "memory"); | ||
250 | } | ||
251 | |||
252 | int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) | ||
253 | { | ||
254 | /* | ||
255 | * FIXME - we should ideally be validating that we got here 'cos | ||
256 | * of the "trap" in jprobe_return() above, before restoring the | ||
257 | * saved regs... | ||
258 | */ | ||
259 | memcpy(regs, &jprobe_saved_regs, sizeof(struct pt_regs)); | ||
260 | return 1; | ||
261 | } | ||
262 | |||
263 | int __init arch_init_kprobes(void) | ||
264 | { | ||
265 | /* TODO: Register kretprobe trampoline */ | ||
266 | return 0; | ||
267 | } | ||
diff --git a/arch/avr32/kernel/module.c b/arch/avr32/kernel/module.c deleted file mode 100644 index 2b4c54c04cb6..000000000000 --- a/arch/avr32/kernel/module.c +++ /dev/null | |||
@@ -1,291 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32-specific kernel module loader | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Atmel Corporation | ||
5 | * | ||
6 | * GOT initialization parts are based on the s390 version | ||
7 | * Copyright (C) 2002, 2003 IBM Deutschland Entwicklung GmbH, | ||
8 | * IBM Corporation | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/bug.h> | ||
16 | #include <linux/elf.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/moduleloader.h> | ||
20 | #include <linux/vmalloc.h> | ||
21 | |||
22 | void module_arch_freeing_init(struct module *mod) | ||
23 | { | ||
24 | vfree(mod->arch.syminfo); | ||
25 | mod->arch.syminfo = NULL; | ||
26 | } | ||
27 | |||
28 | static inline int check_rela(Elf32_Rela *rela, struct module *module, | ||
29 | char *strings, Elf32_Sym *symbols) | ||
30 | { | ||
31 | struct mod_arch_syminfo *info; | ||
32 | |||
33 | info = module->arch.syminfo + ELF32_R_SYM(rela->r_info); | ||
34 | switch (ELF32_R_TYPE(rela->r_info)) { | ||
35 | case R_AVR32_GOT32: | ||
36 | case R_AVR32_GOT16: | ||
37 | case R_AVR32_GOT8: | ||
38 | case R_AVR32_GOT21S: | ||
39 | case R_AVR32_GOT18SW: /* mcall */ | ||
40 | case R_AVR32_GOT16S: /* ld.w */ | ||
41 | if (rela->r_addend != 0) { | ||
42 | printk(KERN_ERR | ||
43 | "GOT relocation against %s at offset %u with addend\n", | ||
44 | strings + symbols[ELF32_R_SYM(rela->r_info)].st_name, | ||
45 | rela->r_offset); | ||
46 | return -ENOEXEC; | ||
47 | } | ||
48 | if (info->got_offset == -1UL) { | ||
49 | info->got_offset = module->arch.got_size; | ||
50 | module->arch.got_size += sizeof(void *); | ||
51 | } | ||
52 | pr_debug("GOT[%3lu] %s\n", info->got_offset, | ||
53 | strings + symbols[ELF32_R_SYM(rela->r_info)].st_name); | ||
54 | break; | ||
55 | } | ||
56 | |||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, | ||
61 | char *secstrings, struct module *module) | ||
62 | { | ||
63 | Elf32_Shdr *symtab; | ||
64 | Elf32_Sym *symbols; | ||
65 | Elf32_Rela *rela; | ||
66 | char *strings; | ||
67 | int nrela, i, j; | ||
68 | int ret; | ||
69 | |||
70 | /* Find the symbol table */ | ||
71 | symtab = NULL; | ||
72 | for (i = 0; i < hdr->e_shnum; i++) | ||
73 | switch (sechdrs[i].sh_type) { | ||
74 | case SHT_SYMTAB: | ||
75 | symtab = &sechdrs[i]; | ||
76 | break; | ||
77 | } | ||
78 | if (!symtab) { | ||
79 | printk(KERN_ERR "module %s: no symbol table\n", module->name); | ||
80 | return -ENOEXEC; | ||
81 | } | ||
82 | |||
83 | /* Allocate room for one syminfo structure per symbol. */ | ||
84 | module->arch.nsyms = symtab->sh_size / sizeof(Elf_Sym); | ||
85 | module->arch.syminfo = vmalloc(module->arch.nsyms | ||
86 | * sizeof(struct mod_arch_syminfo)); | ||
87 | if (!module->arch.syminfo) | ||
88 | return -ENOMEM; | ||
89 | |||
90 | symbols = (void *)hdr + symtab->sh_offset; | ||
91 | strings = (void *)hdr + sechdrs[symtab->sh_link].sh_offset; | ||
92 | for (i = 0; i < module->arch.nsyms; i++) { | ||
93 | if (symbols[i].st_shndx == SHN_UNDEF && | ||
94 | strcmp(strings + symbols[i].st_name, | ||
95 | "_GLOBAL_OFFSET_TABLE_") == 0) | ||
96 | /* "Define" it as absolute. */ | ||
97 | symbols[i].st_shndx = SHN_ABS; | ||
98 | module->arch.syminfo[i].got_offset = -1UL; | ||
99 | module->arch.syminfo[i].got_initialized = 0; | ||
100 | } | ||
101 | |||
102 | /* Allocate GOT entries for symbols that need it. */ | ||
103 | module->arch.got_size = 0; | ||
104 | for (i = 0; i < hdr->e_shnum; i++) { | ||
105 | if (sechdrs[i].sh_type != SHT_RELA) | ||
106 | continue; | ||
107 | nrela = sechdrs[i].sh_size / sizeof(Elf32_Rela); | ||
108 | rela = (void *)hdr + sechdrs[i].sh_offset; | ||
109 | for (j = 0; j < nrela; j++) { | ||
110 | ret = check_rela(rela + j, module, | ||
111 | strings, symbols); | ||
112 | if (ret) | ||
113 | goto out_free_syminfo; | ||
114 | } | ||
115 | } | ||
116 | |||
117 | /* | ||
118 | * Increase core size to make room for GOT and set start | ||
119 | * offset for GOT. | ||
120 | */ | ||
121 | module->core_layout.size = ALIGN(module->core_layout.size, 4); | ||
122 | module->arch.got_offset = module->core_layout.size; | ||
123 | module->core_layout.size += module->arch.got_size; | ||
124 | |||
125 | return 0; | ||
126 | |||
127 | out_free_syminfo: | ||
128 | vfree(module->arch.syminfo); | ||
129 | module->arch.syminfo = NULL; | ||
130 | |||
131 | return ret; | ||
132 | } | ||
133 | |||
134 | static inline int reloc_overflow(struct module *module, const char *reloc_name, | ||
135 | Elf32_Addr relocation) | ||
136 | { | ||
137 | printk(KERN_ERR "module %s: Value %lx does not fit relocation %s\n", | ||
138 | module->name, (unsigned long)relocation, reloc_name); | ||
139 | return -ENOEXEC; | ||
140 | } | ||
141 | |||
142 | #define get_u16(loc) (*((uint16_t *)loc)) | ||
143 | #define put_u16(loc, val) (*((uint16_t *)loc) = (val)) | ||
144 | |||
145 | int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab, | ||
146 | unsigned int symindex, unsigned int relindex, | ||
147 | struct module *module) | ||
148 | { | ||
149 | Elf32_Shdr *symsec = sechdrs + symindex; | ||
150 | Elf32_Shdr *relsec = sechdrs + relindex; | ||
151 | Elf32_Shdr *dstsec = sechdrs + relsec->sh_info; | ||
152 | Elf32_Rela *rel = (void *)relsec->sh_addr; | ||
153 | unsigned int i; | ||
154 | int ret = 0; | ||
155 | |||
156 | for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rela); i++, rel++) { | ||
157 | struct mod_arch_syminfo *info; | ||
158 | Elf32_Sym *sym; | ||
159 | Elf32_Addr relocation; | ||
160 | uint32_t *location; | ||
161 | uint32_t value; | ||
162 | |||
163 | location = (void *)dstsec->sh_addr + rel->r_offset; | ||
164 | sym = (Elf32_Sym *)symsec->sh_addr + ELF32_R_SYM(rel->r_info); | ||
165 | relocation = sym->st_value + rel->r_addend; | ||
166 | |||
167 | info = module->arch.syminfo + ELF32_R_SYM(rel->r_info); | ||
168 | |||
169 | /* Initialize GOT entry if necessary */ | ||
170 | switch (ELF32_R_TYPE(rel->r_info)) { | ||
171 | case R_AVR32_GOT32: | ||
172 | case R_AVR32_GOT16: | ||
173 | case R_AVR32_GOT8: | ||
174 | case R_AVR32_GOT21S: | ||
175 | case R_AVR32_GOT18SW: | ||
176 | case R_AVR32_GOT16S: | ||
177 | if (!info->got_initialized) { | ||
178 | Elf32_Addr *gotent; | ||
179 | |||
180 | gotent = (module->core_layout.base | ||
181 | + module->arch.got_offset | ||
182 | + info->got_offset); | ||
183 | *gotent = relocation; | ||
184 | info->got_initialized = 1; | ||
185 | } | ||
186 | |||
187 | relocation = info->got_offset; | ||
188 | break; | ||
189 | } | ||
190 | |||
191 | switch (ELF32_R_TYPE(rel->r_info)) { | ||
192 | case R_AVR32_32: | ||
193 | case R_AVR32_32_CPENT: | ||
194 | *location = relocation; | ||
195 | break; | ||
196 | case R_AVR32_22H_PCREL: | ||
197 | relocation -= (Elf32_Addr)location; | ||
198 | if ((relocation & 0xffe00001) != 0 | ||
199 | && (relocation & 0xffc00001) != 0xffc00000) | ||
200 | return reloc_overflow(module, | ||
201 | "R_AVR32_22H_PCREL", | ||
202 | relocation); | ||
203 | relocation >>= 1; | ||
204 | |||
205 | value = *location; | ||
206 | value = ((value & 0xe1ef0000) | ||
207 | | (relocation & 0xffff) | ||
208 | | ((relocation & 0x10000) << 4) | ||
209 | | ((relocation & 0x1e0000) << 8)); | ||
210 | *location = value; | ||
211 | break; | ||
212 | case R_AVR32_11H_PCREL: | ||
213 | relocation -= (Elf32_Addr)location; | ||
214 | if ((relocation & 0xfffffc01) != 0 | ||
215 | && (relocation & 0xfffff801) != 0xfffff800) | ||
216 | return reloc_overflow(module, | ||
217 | "R_AVR32_11H_PCREL", | ||
218 | relocation); | ||
219 | value = get_u16(location); | ||
220 | value = ((value & 0xf00c) | ||
221 | | ((relocation & 0x1fe) << 3) | ||
222 | | ((relocation & 0x600) >> 9)); | ||
223 | put_u16(location, value); | ||
224 | break; | ||
225 | case R_AVR32_9H_PCREL: | ||
226 | relocation -= (Elf32_Addr)location; | ||
227 | if ((relocation & 0xffffff01) != 0 | ||
228 | && (relocation & 0xfffffe01) != 0xfffffe00) | ||
229 | return reloc_overflow(module, | ||
230 | "R_AVR32_9H_PCREL", | ||
231 | relocation); | ||
232 | value = get_u16(location); | ||
233 | value = ((value & 0xf00f) | ||
234 | | ((relocation & 0x1fe) << 3)); | ||
235 | put_u16(location, value); | ||
236 | break; | ||
237 | case R_AVR32_9UW_PCREL: | ||
238 | relocation -= ((Elf32_Addr)location) & 0xfffffffc; | ||
239 | if ((relocation & 0xfffffc03) != 0) | ||
240 | return reloc_overflow(module, | ||
241 | "R_AVR32_9UW_PCREL", | ||
242 | relocation); | ||
243 | value = get_u16(location); | ||
244 | value = ((value & 0xf80f) | ||
245 | | ((relocation & 0x1fc) << 2)); | ||
246 | put_u16(location, value); | ||
247 | break; | ||
248 | case R_AVR32_GOTPC: | ||
249 | /* | ||
250 | * R6 = PC - (PC - GOT) | ||
251 | * | ||
252 | * At this point, relocation contains the | ||
253 | * value of PC. Just subtract the value of | ||
254 | * GOT, and we're done. | ||
255 | */ | ||
256 | pr_debug("GOTPC: PC=0x%x, got_offset=0x%lx, core=0x%p\n", | ||
257 | relocation, module->arch.got_offset, | ||
258 | module->core_layout.base); | ||
259 | relocation -= ((unsigned long)module->core_layout.base | ||
260 | + module->arch.got_offset); | ||
261 | *location = relocation; | ||
262 | break; | ||
263 | case R_AVR32_GOT18SW: | ||
264 | if ((relocation & 0xfffe0003) != 0 | ||
265 | && (relocation & 0xfffc0000) != 0xfffc0000) | ||
266 | return reloc_overflow(module, "R_AVR32_GOT18SW", | ||
267 | relocation); | ||
268 | relocation >>= 2; | ||
269 | /* fall through */ | ||
270 | case R_AVR32_GOT16S: | ||
271 | if ((relocation & 0xffff8000) != 0 | ||
272 | && (relocation & 0xffff0000) != 0xffff0000) | ||
273 | return reloc_overflow(module, "R_AVR32_GOT16S", | ||
274 | relocation); | ||
275 | pr_debug("GOT reloc @ 0x%x -> %u\n", | ||
276 | rel->r_offset, relocation); | ||
277 | value = *location; | ||
278 | value = ((value & 0xffff0000) | ||
279 | | (relocation & 0xffff)); | ||
280 | *location = value; | ||
281 | break; | ||
282 | |||
283 | default: | ||
284 | printk(KERN_ERR "module %s: Unknown relocation: %u\n", | ||
285 | module->name, ELF32_R_TYPE(rel->r_info)); | ||
286 | return -ENOEXEC; | ||
287 | } | ||
288 | } | ||
289 | |||
290 | return ret; | ||
291 | } | ||
diff --git a/arch/avr32/kernel/nmi_debug.c b/arch/avr32/kernel/nmi_debug.c deleted file mode 100644 index 25823049bb99..000000000000 --- a/arch/avr32/kernel/nmi_debug.c +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/delay.h> | ||
9 | #include <linux/kdebug.h> | ||
10 | #include <linux/notifier.h> | ||
11 | #include <linux/sched.h> | ||
12 | #include <linux/sched/debug.h> | ||
13 | |||
14 | #include <asm/irq.h> | ||
15 | |||
16 | enum nmi_action { | ||
17 | NMI_SHOW_STATE = 1 << 0, | ||
18 | NMI_SHOW_REGS = 1 << 1, | ||
19 | NMI_DIE = 1 << 2, | ||
20 | NMI_DEBOUNCE = 1 << 3, | ||
21 | }; | ||
22 | |||
23 | static unsigned long nmi_actions; | ||
24 | |||
25 | static int nmi_debug_notify(struct notifier_block *self, | ||
26 | unsigned long val, void *data) | ||
27 | { | ||
28 | struct die_args *args = data; | ||
29 | |||
30 | if (likely(val != DIE_NMI)) | ||
31 | return NOTIFY_DONE; | ||
32 | |||
33 | if (nmi_actions & NMI_SHOW_STATE) | ||
34 | show_state(); | ||
35 | if (nmi_actions & NMI_SHOW_REGS) | ||
36 | show_regs(args->regs); | ||
37 | if (nmi_actions & NMI_DEBOUNCE) | ||
38 | mdelay(10); | ||
39 | if (nmi_actions & NMI_DIE) | ||
40 | return NOTIFY_BAD; | ||
41 | |||
42 | return NOTIFY_OK; | ||
43 | } | ||
44 | |||
45 | static struct notifier_block nmi_debug_nb = { | ||
46 | .notifier_call = nmi_debug_notify, | ||
47 | }; | ||
48 | |||
49 | static int __init nmi_debug_setup(char *str) | ||
50 | { | ||
51 | char *p, *sep; | ||
52 | |||
53 | register_die_notifier(&nmi_debug_nb); | ||
54 | if (nmi_enable()) { | ||
55 | printk(KERN_WARNING "Unable to enable NMI.\n"); | ||
56 | return 0; | ||
57 | } | ||
58 | |||
59 | if (*str != '=') | ||
60 | return 0; | ||
61 | |||
62 | for (p = str + 1; *p; p = sep + 1) { | ||
63 | sep = strchr(p, ','); | ||
64 | if (sep) | ||
65 | *sep = 0; | ||
66 | if (strcmp(p, "state") == 0) | ||
67 | nmi_actions |= NMI_SHOW_STATE; | ||
68 | else if (strcmp(p, "regs") == 0) | ||
69 | nmi_actions |= NMI_SHOW_REGS; | ||
70 | else if (strcmp(p, "debounce") == 0) | ||
71 | nmi_actions |= NMI_DEBOUNCE; | ||
72 | else if (strcmp(p, "die") == 0) | ||
73 | nmi_actions |= NMI_DIE; | ||
74 | else | ||
75 | printk(KERN_WARNING "NMI: Unrecognized action `%s'\n", | ||
76 | p); | ||
77 | if (!sep) | ||
78 | break; | ||
79 | } | ||
80 | |||
81 | return 0; | ||
82 | } | ||
83 | __setup("nmi_debug", nmi_debug_setup); | ||
diff --git a/arch/avr32/kernel/ocd.c b/arch/avr32/kernel/ocd.c deleted file mode 100644 index 1b0245d4e0ca..000000000000 --- a/arch/avr32/kernel/ocd.c +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/init.h> | ||
9 | #include <linux/sched.h> | ||
10 | #include <linux/spinlock.h> | ||
11 | |||
12 | #include <asm/ocd.h> | ||
13 | |||
14 | static long ocd_count; | ||
15 | static spinlock_t ocd_lock; | ||
16 | |||
17 | /** | ||
18 | * ocd_enable - enable on-chip debugging | ||
19 | * @child: task to be debugged | ||
20 | * | ||
21 | * If @child is non-NULL, ocd_enable() first checks if debugging has | ||
22 | * already been enabled for @child, and if it has, does nothing. | ||
23 | * | ||
24 | * If @child is NULL (e.g. when debugging the kernel), or debugging | ||
25 | * has not already been enabled for it, ocd_enable() increments the | ||
26 | * reference count and enables the debugging hardware. | ||
27 | */ | ||
28 | void ocd_enable(struct task_struct *child) | ||
29 | { | ||
30 | u32 dc; | ||
31 | |||
32 | if (child) | ||
33 | pr_debug("ocd_enable: child=%s [%u]\n", | ||
34 | child->comm, child->pid); | ||
35 | else | ||
36 | pr_debug("ocd_enable (no child)\n"); | ||
37 | |||
38 | if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) { | ||
39 | spin_lock(&ocd_lock); | ||
40 | ocd_count++; | ||
41 | dc = ocd_read(DC); | ||
42 | dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT); | ||
43 | ocd_write(DC, dc); | ||
44 | spin_unlock(&ocd_lock); | ||
45 | } | ||
46 | } | ||
47 | |||
48 | /** | ||
49 | * ocd_disable - disable on-chip debugging | ||
50 | * @child: task that was being debugged, but isn't anymore | ||
51 | * | ||
52 | * If @child is non-NULL, ocd_disable() checks if debugging is enabled | ||
53 | * for @child, and if it isn't, does nothing. | ||
54 | * | ||
55 | * If @child is NULL (e.g. when debugging the kernel), or debugging is | ||
56 | * enabled, ocd_disable() decrements the reference count, and if it | ||
57 | * reaches zero, disables the debugging hardware. | ||
58 | */ | ||
59 | void ocd_disable(struct task_struct *child) | ||
60 | { | ||
61 | u32 dc; | ||
62 | |||
63 | if (!child) | ||
64 | pr_debug("ocd_disable (no child)\n"); | ||
65 | else if (test_tsk_thread_flag(child, TIF_DEBUG)) | ||
66 | pr_debug("ocd_disable: child=%s [%u]\n", | ||
67 | child->comm, child->pid); | ||
68 | |||
69 | if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) { | ||
70 | spin_lock(&ocd_lock); | ||
71 | ocd_count--; | ||
72 | |||
73 | WARN_ON(ocd_count < 0); | ||
74 | |||
75 | if (ocd_count <= 0) { | ||
76 | dc = ocd_read(DC); | ||
77 | dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT)); | ||
78 | ocd_write(DC, dc); | ||
79 | } | ||
80 | spin_unlock(&ocd_lock); | ||
81 | } | ||
82 | } | ||
83 | |||
84 | #ifdef CONFIG_DEBUG_FS | ||
85 | #include <linux/debugfs.h> | ||
86 | #include <linux/module.h> | ||
87 | |||
88 | static struct dentry *ocd_debugfs_root; | ||
89 | static struct dentry *ocd_debugfs_DC; | ||
90 | static struct dentry *ocd_debugfs_DS; | ||
91 | static struct dentry *ocd_debugfs_count; | ||
92 | |||
93 | static int ocd_DC_get(void *data, u64 *val) | ||
94 | { | ||
95 | *val = ocd_read(DC); | ||
96 | return 0; | ||
97 | } | ||
98 | static int ocd_DC_set(void *data, u64 val) | ||
99 | { | ||
100 | ocd_write(DC, val); | ||
101 | return 0; | ||
102 | } | ||
103 | DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n"); | ||
104 | |||
105 | static int ocd_DS_get(void *data, u64 *val) | ||
106 | { | ||
107 | *val = ocd_read(DS); | ||
108 | return 0; | ||
109 | } | ||
110 | DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n"); | ||
111 | |||
112 | static int ocd_count_get(void *data, u64 *val) | ||
113 | { | ||
114 | *val = ocd_count; | ||
115 | return 0; | ||
116 | } | ||
117 | DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n"); | ||
118 | |||
119 | static void ocd_debugfs_init(void) | ||
120 | { | ||
121 | struct dentry *root; | ||
122 | |||
123 | root = debugfs_create_dir("ocd", NULL); | ||
124 | if (IS_ERR(root) || !root) | ||
125 | goto err_root; | ||
126 | ocd_debugfs_root = root; | ||
127 | |||
128 | ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR, | ||
129 | root, NULL, &fops_DC); | ||
130 | if (!ocd_debugfs_DC) | ||
131 | goto err_DC; | ||
132 | |||
133 | ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root, | ||
134 | NULL, &fops_DS); | ||
135 | if (!ocd_debugfs_DS) | ||
136 | goto err_DS; | ||
137 | |||
138 | ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root, | ||
139 | NULL, &fops_count); | ||
140 | if (!ocd_debugfs_count) | ||
141 | goto err_count; | ||
142 | |||
143 | return; | ||
144 | |||
145 | err_count: | ||
146 | debugfs_remove(ocd_debugfs_DS); | ||
147 | err_DS: | ||
148 | debugfs_remove(ocd_debugfs_DC); | ||
149 | err_DC: | ||
150 | debugfs_remove(ocd_debugfs_root); | ||
151 | err_root: | ||
152 | printk(KERN_WARNING "OCD: Failed to create debugfs entries\n"); | ||
153 | } | ||
154 | #else | ||
155 | static inline void ocd_debugfs_init(void) | ||
156 | { | ||
157 | |||
158 | } | ||
159 | #endif | ||
160 | |||
161 | static int __init ocd_init(void) | ||
162 | { | ||
163 | spin_lock_init(&ocd_lock); | ||
164 | ocd_debugfs_init(); | ||
165 | return 0; | ||
166 | } | ||
167 | arch_initcall(ocd_init); | ||
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c deleted file mode 100644 index ad0dfccedb79..000000000000 --- a/arch/avr32/kernel/process.c +++ /dev/null | |||
@@ -1,358 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/sched.h> | ||
9 | #include <linux/sched/debug.h> | ||
10 | #include <linux/sched/task.h> | ||
11 | #include <linux/sched/task_stack.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/kallsyms.h> | ||
14 | #include <linux/fs.h> | ||
15 | #include <linux/pm.h> | ||
16 | #include <linux/ptrace.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/reboot.h> | ||
19 | #include <linux/tick.h> | ||
20 | #include <linux/uaccess.h> | ||
21 | #include <linux/unistd.h> | ||
22 | |||
23 | #include <asm/sysreg.h> | ||
24 | #include <asm/ocd.h> | ||
25 | #include <asm/syscalls.h> | ||
26 | |||
27 | #include <mach/pm.h> | ||
28 | |||
29 | void (*pm_power_off)(void); | ||
30 | EXPORT_SYMBOL(pm_power_off); | ||
31 | |||
32 | /* | ||
33 | * This file handles the architecture-dependent parts of process handling.. | ||
34 | */ | ||
35 | |||
36 | void arch_cpu_idle(void) | ||
37 | { | ||
38 | cpu_enter_idle(); | ||
39 | } | ||
40 | |||
41 | void machine_halt(void) | ||
42 | { | ||
43 | /* | ||
44 | * Enter Stop mode. The 32 kHz oscillator will keep running so | ||
45 | * the RTC will keep the time properly and the system will | ||
46 | * boot quickly. | ||
47 | */ | ||
48 | asm volatile("sleep 3\n\t" | ||
49 | "sub pc, -2"); | ||
50 | } | ||
51 | |||
52 | void machine_power_off(void) | ||
53 | { | ||
54 | if (pm_power_off) | ||
55 | pm_power_off(); | ||
56 | } | ||
57 | |||
58 | void machine_restart(char *cmd) | ||
59 | { | ||
60 | ocd_write(DC, (1 << OCD_DC_DBE_BIT)); | ||
61 | ocd_write(DC, (1 << OCD_DC_RES_BIT)); | ||
62 | while (1) ; | ||
63 | } | ||
64 | |||
65 | /* | ||
66 | * Free current thread data structures etc | ||
67 | */ | ||
68 | void exit_thread(struct task_struct *tsk) | ||
69 | { | ||
70 | ocd_disable(tsk); | ||
71 | } | ||
72 | |||
73 | void flush_thread(void) | ||
74 | { | ||
75 | /* nothing to do */ | ||
76 | } | ||
77 | |||
78 | void release_thread(struct task_struct *dead_task) | ||
79 | { | ||
80 | /* do nothing */ | ||
81 | } | ||
82 | |||
83 | static void dump_mem(const char *str, const char *log_lvl, | ||
84 | unsigned long bottom, unsigned long top) | ||
85 | { | ||
86 | unsigned long p; | ||
87 | int i; | ||
88 | |||
89 | printk("%s%s(0x%08lx to 0x%08lx)\n", log_lvl, str, bottom, top); | ||
90 | |||
91 | for (p = bottom & ~31; p < top; ) { | ||
92 | printk("%s%04lx: ", log_lvl, p & 0xffff); | ||
93 | |||
94 | for (i = 0; i < 8; i++, p += 4) { | ||
95 | unsigned int val; | ||
96 | |||
97 | if (p < bottom || p >= top) | ||
98 | printk(" "); | ||
99 | else { | ||
100 | if (__get_user(val, (unsigned int __user *)p)) { | ||
101 | printk("\n"); | ||
102 | goto out; | ||
103 | } | ||
104 | printk("%08x ", val); | ||
105 | } | ||
106 | } | ||
107 | printk("\n"); | ||
108 | } | ||
109 | |||
110 | out: | ||
111 | return; | ||
112 | } | ||
113 | |||
114 | static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p) | ||
115 | { | ||
116 | return (p > (unsigned long)tinfo) | ||
117 | && (p < (unsigned long)tinfo + THREAD_SIZE - 3); | ||
118 | } | ||
119 | |||
120 | #ifdef CONFIG_FRAME_POINTER | ||
121 | static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp, | ||
122 | struct pt_regs *regs, const char *log_lvl) | ||
123 | { | ||
124 | unsigned long lr, fp; | ||
125 | struct thread_info *tinfo; | ||
126 | |||
127 | if (regs) | ||
128 | fp = regs->r7; | ||
129 | else if (tsk == current) | ||
130 | asm("mov %0, r7" : "=r"(fp)); | ||
131 | else | ||
132 | fp = tsk->thread.cpu_context.r7; | ||
133 | |||
134 | /* | ||
135 | * Walk the stack as long as the frame pointer (a) is within | ||
136 | * the kernel stack of the task, and (b) it doesn't move | ||
137 | * downwards. | ||
138 | */ | ||
139 | tinfo = task_thread_info(tsk); | ||
140 | printk("%sCall trace:\n", log_lvl); | ||
141 | while (valid_stack_ptr(tinfo, fp)) { | ||
142 | unsigned long new_fp; | ||
143 | |||
144 | lr = *(unsigned long *)fp; | ||
145 | #ifdef CONFIG_KALLSYMS | ||
146 | printk("%s [<%08lx>] ", log_lvl, lr); | ||
147 | #else | ||
148 | printk(" [<%08lx>] ", lr); | ||
149 | #endif | ||
150 | print_symbol("%s\n", lr); | ||
151 | |||
152 | new_fp = *(unsigned long *)(fp + 4); | ||
153 | if (new_fp <= fp) | ||
154 | break; | ||
155 | fp = new_fp; | ||
156 | } | ||
157 | printk("\n"); | ||
158 | } | ||
159 | #else | ||
160 | static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp, | ||
161 | struct pt_regs *regs, const char *log_lvl) | ||
162 | { | ||
163 | unsigned long addr; | ||
164 | |||
165 | printk("%sCall trace:\n", log_lvl); | ||
166 | |||
167 | while (!kstack_end(sp)) { | ||
168 | addr = *sp++; | ||
169 | if (kernel_text_address(addr)) { | ||
170 | #ifdef CONFIG_KALLSYMS | ||
171 | printk("%s [<%08lx>] ", log_lvl, addr); | ||
172 | #else | ||
173 | printk(" [<%08lx>] ", addr); | ||
174 | #endif | ||
175 | print_symbol("%s\n", addr); | ||
176 | } | ||
177 | } | ||
178 | printk("\n"); | ||
179 | } | ||
180 | #endif | ||
181 | |||
182 | void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp, | ||
183 | struct pt_regs *regs, const char *log_lvl) | ||
184 | { | ||
185 | struct thread_info *tinfo; | ||
186 | |||
187 | if (sp == 0) { | ||
188 | if (tsk) | ||
189 | sp = tsk->thread.cpu_context.ksp; | ||
190 | else | ||
191 | sp = (unsigned long)&tinfo; | ||
192 | } | ||
193 | if (!tsk) | ||
194 | tsk = current; | ||
195 | |||
196 | tinfo = task_thread_info(tsk); | ||
197 | |||
198 | if (valid_stack_ptr(tinfo, sp)) { | ||
199 | dump_mem("Stack: ", log_lvl, sp, | ||
200 | THREAD_SIZE + (unsigned long)tinfo); | ||
201 | show_trace_log_lvl(tsk, (unsigned long *)sp, regs, log_lvl); | ||
202 | } | ||
203 | } | ||
204 | |||
205 | void show_stack(struct task_struct *tsk, unsigned long *stack) | ||
206 | { | ||
207 | show_stack_log_lvl(tsk, (unsigned long)stack, NULL, ""); | ||
208 | } | ||
209 | |||
210 | static const char *cpu_modes[] = { | ||
211 | "Application", "Supervisor", "Interrupt level 0", "Interrupt level 1", | ||
212 | "Interrupt level 2", "Interrupt level 3", "Exception", "NMI" | ||
213 | }; | ||
214 | |||
215 | void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl) | ||
216 | { | ||
217 | unsigned long sp = regs->sp; | ||
218 | unsigned long lr = regs->lr; | ||
219 | unsigned long mode = (regs->sr & MODE_MASK) >> MODE_SHIFT; | ||
220 | |||
221 | show_regs_print_info(log_lvl); | ||
222 | |||
223 | if (!user_mode(regs)) { | ||
224 | sp = (unsigned long)regs + FRAME_SIZE_FULL; | ||
225 | |||
226 | printk("%s", log_lvl); | ||
227 | print_symbol("PC is at %s\n", instruction_pointer(regs)); | ||
228 | printk("%s", log_lvl); | ||
229 | print_symbol("LR is at %s\n", lr); | ||
230 | } | ||
231 | |||
232 | printk("%spc : [<%08lx>] lr : [<%08lx>] %s\n" | ||
233 | "%ssp : %08lx r12: %08lx r11: %08lx\n", | ||
234 | log_lvl, instruction_pointer(regs), lr, print_tainted(), | ||
235 | log_lvl, sp, regs->r12, regs->r11); | ||
236 | printk("%sr10: %08lx r9 : %08lx r8 : %08lx\n", | ||
237 | log_lvl, regs->r10, regs->r9, regs->r8); | ||
238 | printk("%sr7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", | ||
239 | log_lvl, regs->r7, regs->r6, regs->r5, regs->r4); | ||
240 | printk("%sr3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", | ||
241 | log_lvl, regs->r3, regs->r2, regs->r1, regs->r0); | ||
242 | printk("%sFlags: %c%c%c%c%c\n", log_lvl, | ||
243 | regs->sr & SR_Q ? 'Q' : 'q', | ||
244 | regs->sr & SR_V ? 'V' : 'v', | ||
245 | regs->sr & SR_N ? 'N' : 'n', | ||
246 | regs->sr & SR_Z ? 'Z' : 'z', | ||
247 | regs->sr & SR_C ? 'C' : 'c'); | ||
248 | printk("%sMode bits: %c%c%c%c%c%c%c%c%c%c\n", log_lvl, | ||
249 | regs->sr & SR_H ? 'H' : 'h', | ||
250 | regs->sr & SR_J ? 'J' : 'j', | ||
251 | regs->sr & SR_DM ? 'M' : 'm', | ||
252 | regs->sr & SR_D ? 'D' : 'd', | ||
253 | regs->sr & SR_EM ? 'E' : 'e', | ||
254 | regs->sr & SR_I3M ? '3' : '.', | ||
255 | regs->sr & SR_I2M ? '2' : '.', | ||
256 | regs->sr & SR_I1M ? '1' : '.', | ||
257 | regs->sr & SR_I0M ? '0' : '.', | ||
258 | regs->sr & SR_GM ? 'G' : 'g'); | ||
259 | printk("%sCPU Mode: %s\n", log_lvl, cpu_modes[mode]); | ||
260 | } | ||
261 | |||
262 | void show_regs(struct pt_regs *regs) | ||
263 | { | ||
264 | unsigned long sp = regs->sp; | ||
265 | |||
266 | if (!user_mode(regs)) | ||
267 | sp = (unsigned long)regs + FRAME_SIZE_FULL; | ||
268 | |||
269 | show_regs_log_lvl(regs, ""); | ||
270 | show_trace_log_lvl(current, (unsigned long *)sp, regs, ""); | ||
271 | } | ||
272 | EXPORT_SYMBOL(show_regs); | ||
273 | |||
274 | /* Fill in the fpu structure for a core dump. This is easy -- we don't have any */ | ||
275 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu) | ||
276 | { | ||
277 | /* Not valid */ | ||
278 | return 0; | ||
279 | } | ||
280 | |||
281 | asmlinkage void ret_from_fork(void); | ||
282 | asmlinkage void ret_from_kernel_thread(void); | ||
283 | asmlinkage void syscall_return(void); | ||
284 | |||
285 | int copy_thread(unsigned long clone_flags, unsigned long usp, | ||
286 | unsigned long arg, | ||
287 | struct task_struct *p) | ||
288 | { | ||
289 | struct pt_regs *childregs = task_pt_regs(p); | ||
290 | |||
291 | if (unlikely(p->flags & PF_KTHREAD)) { | ||
292 | memset(childregs, 0, sizeof(struct pt_regs)); | ||
293 | p->thread.cpu_context.r0 = arg; | ||
294 | p->thread.cpu_context.r1 = usp; /* fn */ | ||
295 | p->thread.cpu_context.r2 = (unsigned long)syscall_return; | ||
296 | p->thread.cpu_context.pc = (unsigned long)ret_from_kernel_thread; | ||
297 | childregs->sr = MODE_SUPERVISOR; | ||
298 | } else { | ||
299 | *childregs = *current_pt_regs(); | ||
300 | if (usp) | ||
301 | childregs->sp = usp; | ||
302 | childregs->r12 = 0; /* Set return value for child */ | ||
303 | p->thread.cpu_context.pc = (unsigned long)ret_from_fork; | ||
304 | } | ||
305 | |||
306 | p->thread.cpu_context.sr = MODE_SUPERVISOR | SR_GM; | ||
307 | p->thread.cpu_context.ksp = (unsigned long)childregs; | ||
308 | |||
309 | clear_tsk_thread_flag(p, TIF_DEBUG); | ||
310 | if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG)) | ||
311 | ocd_enable(p); | ||
312 | |||
313 | return 0; | ||
314 | } | ||
315 | |||
316 | /* | ||
317 | * This function is supposed to answer the question "who called | ||
318 | * schedule()?" | ||
319 | */ | ||
320 | unsigned long get_wchan(struct task_struct *p) | ||
321 | { | ||
322 | unsigned long pc; | ||
323 | unsigned long stack_page; | ||
324 | |||
325 | if (!p || p == current || p->state == TASK_RUNNING) | ||
326 | return 0; | ||
327 | |||
328 | stack_page = (unsigned long)task_stack_page(p); | ||
329 | BUG_ON(!stack_page); | ||
330 | |||
331 | /* | ||
332 | * The stored value of PC is either the address right after | ||
333 | * the call to __switch_to() or ret_from_fork. | ||
334 | */ | ||
335 | pc = thread_saved_pc(p); | ||
336 | if (in_sched_functions(pc)) { | ||
337 | #ifdef CONFIG_FRAME_POINTER | ||
338 | unsigned long fp = p->thread.cpu_context.r7; | ||
339 | BUG_ON(fp < stack_page || fp > (THREAD_SIZE + stack_page)); | ||
340 | pc = *(unsigned long *)fp; | ||
341 | #else | ||
342 | /* | ||
343 | * We depend on the frame size of schedule here, which | ||
344 | * is actually quite ugly. It might be possible to | ||
345 | * determine the frame size automatically at build | ||
346 | * time by doing this: | ||
347 | * - compile sched/core.c | ||
348 | * - disassemble the resulting sched.o | ||
349 | * - look for 'sub sp,??' shortly after '<schedule>:' | ||
350 | */ | ||
351 | unsigned long sp = p->thread.cpu_context.ksp + 16; | ||
352 | BUG_ON(sp < stack_page || sp > (THREAD_SIZE + stack_page)); | ||
353 | pc = *(unsigned long *)sp; | ||
354 | #endif | ||
355 | } | ||
356 | |||
357 | return pc; | ||
358 | } | ||
diff --git a/arch/avr32/kernel/ptrace.c b/arch/avr32/kernel/ptrace.c deleted file mode 100644 index 41a14e96a1db..000000000000 --- a/arch/avr32/kernel/ptrace.c +++ /dev/null | |||
@@ -1,357 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #undef DEBUG | ||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/sched.h> | ||
11 | #include <linux/sched/task_stack.h> | ||
12 | #include <linux/mm.h> | ||
13 | #include <linux/ptrace.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/user.h> | ||
16 | #include <linux/security.h> | ||
17 | #include <linux/unistd.h> | ||
18 | #include <linux/notifier.h> | ||
19 | |||
20 | #include <asm/traps.h> | ||
21 | #include <linux/uaccess.h> | ||
22 | #include <asm/ocd.h> | ||
23 | #include <asm/mmu_context.h> | ||
24 | #include <linux/kdebug.h> | ||
25 | |||
26 | static struct pt_regs *get_user_regs(struct task_struct *tsk) | ||
27 | { | ||
28 | return (struct pt_regs *)((unsigned long)task_stack_page(tsk) + | ||
29 | THREAD_SIZE - sizeof(struct pt_regs)); | ||
30 | } | ||
31 | |||
32 | void user_enable_single_step(struct task_struct *tsk) | ||
33 | { | ||
34 | pr_debug("user_enable_single_step: pid=%u, PC=0x%08lx, SR=0x%08lx\n", | ||
35 | tsk->pid, task_pt_regs(tsk)->pc, task_pt_regs(tsk)->sr); | ||
36 | |||
37 | /* | ||
38 | * We can't schedule in Debug mode, so when TIF_BREAKPOINT is | ||
39 | * set, the system call or exception handler will do a | ||
40 | * breakpoint to enter monitor mode before returning to | ||
41 | * userspace. | ||
42 | * | ||
43 | * The monitor code will then notice that TIF_SINGLE_STEP is | ||
44 | * set and return to userspace with single stepping enabled. | ||
45 | * The CPU will then enter monitor mode again after exactly | ||
46 | * one instruction has been executed, and the monitor code | ||
47 | * will then send a SIGTRAP to the process. | ||
48 | */ | ||
49 | set_tsk_thread_flag(tsk, TIF_BREAKPOINT); | ||
50 | set_tsk_thread_flag(tsk, TIF_SINGLE_STEP); | ||
51 | } | ||
52 | |||
53 | void user_disable_single_step(struct task_struct *child) | ||
54 | { | ||
55 | /* XXX(hch): a no-op here seems wrong.. */ | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * Called by kernel/ptrace.c when detaching | ||
60 | * | ||
61 | * Make sure any single step bits, etc. are not set | ||
62 | */ | ||
63 | void ptrace_disable(struct task_struct *child) | ||
64 | { | ||
65 | clear_tsk_thread_flag(child, TIF_SINGLE_STEP); | ||
66 | clear_tsk_thread_flag(child, TIF_BREAKPOINT); | ||
67 | ocd_disable(child); | ||
68 | } | ||
69 | |||
70 | /* | ||
71 | * Read the word at offset "offset" into the task's "struct user". We | ||
72 | * actually access the pt_regs struct stored on the kernel stack. | ||
73 | */ | ||
74 | static int ptrace_read_user(struct task_struct *tsk, unsigned long offset, | ||
75 | unsigned long __user *data) | ||
76 | { | ||
77 | unsigned long *regs; | ||
78 | unsigned long value; | ||
79 | |||
80 | if (offset & 3 || offset >= sizeof(struct user)) { | ||
81 | printk("ptrace_read_user: invalid offset 0x%08lx\n", offset); | ||
82 | return -EIO; | ||
83 | } | ||
84 | |||
85 | regs = (unsigned long *)get_user_regs(tsk); | ||
86 | |||
87 | value = 0; | ||
88 | if (offset < sizeof(struct pt_regs)) | ||
89 | value = regs[offset / sizeof(regs[0])]; | ||
90 | |||
91 | pr_debug("ptrace_read_user(%s[%u], %#lx, %p) -> %#lx\n", | ||
92 | tsk->comm, tsk->pid, offset, data, value); | ||
93 | |||
94 | return put_user(value, data); | ||
95 | } | ||
96 | |||
97 | /* | ||
98 | * Write the word "value" to offset "offset" into the task's "struct | ||
99 | * user". We actually access the pt_regs struct stored on the kernel | ||
100 | * stack. | ||
101 | */ | ||
102 | static int ptrace_write_user(struct task_struct *tsk, unsigned long offset, | ||
103 | unsigned long value) | ||
104 | { | ||
105 | unsigned long *regs; | ||
106 | |||
107 | pr_debug("ptrace_write_user(%s[%u], %#lx, %#lx)\n", | ||
108 | tsk->comm, tsk->pid, offset, value); | ||
109 | |||
110 | if (offset & 3 || offset >= sizeof(struct user)) { | ||
111 | pr_debug(" invalid offset 0x%08lx\n", offset); | ||
112 | return -EIO; | ||
113 | } | ||
114 | |||
115 | if (offset >= sizeof(struct pt_regs)) | ||
116 | return 0; | ||
117 | |||
118 | regs = (unsigned long *)get_user_regs(tsk); | ||
119 | regs[offset / sizeof(regs[0])] = value; | ||
120 | |||
121 | return 0; | ||
122 | } | ||
123 | |||
124 | static int ptrace_getregs(struct task_struct *tsk, void __user *uregs) | ||
125 | { | ||
126 | struct pt_regs *regs = get_user_regs(tsk); | ||
127 | |||
128 | return copy_to_user(uregs, regs, sizeof(*regs)) ? -EFAULT : 0; | ||
129 | } | ||
130 | |||
131 | static int ptrace_setregs(struct task_struct *tsk, const void __user *uregs) | ||
132 | { | ||
133 | struct pt_regs newregs; | ||
134 | int ret; | ||
135 | |||
136 | ret = -EFAULT; | ||
137 | if (copy_from_user(&newregs, uregs, sizeof(newregs)) == 0) { | ||
138 | struct pt_regs *regs = get_user_regs(tsk); | ||
139 | |||
140 | ret = -EINVAL; | ||
141 | if (valid_user_regs(&newregs)) { | ||
142 | *regs = newregs; | ||
143 | ret = 0; | ||
144 | } | ||
145 | } | ||
146 | |||
147 | return ret; | ||
148 | } | ||
149 | |||
150 | long arch_ptrace(struct task_struct *child, long request, | ||
151 | unsigned long addr, unsigned long data) | ||
152 | { | ||
153 | int ret; | ||
154 | void __user *datap = (void __user *) data; | ||
155 | |||
156 | switch (request) { | ||
157 | /* Read the word at location addr in the child process */ | ||
158 | case PTRACE_PEEKTEXT: | ||
159 | case PTRACE_PEEKDATA: | ||
160 | ret = generic_ptrace_peekdata(child, addr, data); | ||
161 | break; | ||
162 | |||
163 | case PTRACE_PEEKUSR: | ||
164 | ret = ptrace_read_user(child, addr, datap); | ||
165 | break; | ||
166 | |||
167 | /* Write the word in data at location addr */ | ||
168 | case PTRACE_POKETEXT: | ||
169 | case PTRACE_POKEDATA: | ||
170 | ret = generic_ptrace_pokedata(child, addr, data); | ||
171 | break; | ||
172 | |||
173 | case PTRACE_POKEUSR: | ||
174 | ret = ptrace_write_user(child, addr, data); | ||
175 | break; | ||
176 | |||
177 | case PTRACE_GETREGS: | ||
178 | ret = ptrace_getregs(child, datap); | ||
179 | break; | ||
180 | |||
181 | case PTRACE_SETREGS: | ||
182 | ret = ptrace_setregs(child, datap); | ||
183 | break; | ||
184 | |||
185 | default: | ||
186 | ret = ptrace_request(child, request, addr, data); | ||
187 | break; | ||
188 | } | ||
189 | |||
190 | return ret; | ||
191 | } | ||
192 | |||
193 | asmlinkage void syscall_trace(void) | ||
194 | { | ||
195 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | ||
196 | return; | ||
197 | if (!(current->ptrace & PT_PTRACED)) | ||
198 | return; | ||
199 | |||
200 | /* The 0x80 provides a way for the tracing parent to | ||
201 | * distinguish between a syscall stop and SIGTRAP delivery */ | ||
202 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) | ||
203 | ? 0x80 : 0)); | ||
204 | |||
205 | /* | ||
206 | * this isn't the same as continuing with a signal, but it | ||
207 | * will do for normal use. strace only continues with a | ||
208 | * signal if the stopping signal is not SIGTRAP. -brl | ||
209 | */ | ||
210 | if (current->exit_code) { | ||
211 | pr_debug("syscall_trace: sending signal %d to PID %u\n", | ||
212 | current->exit_code, current->pid); | ||
213 | send_sig(current->exit_code, current, 1); | ||
214 | current->exit_code = 0; | ||
215 | } | ||
216 | } | ||
217 | |||
218 | /* | ||
219 | * debug_trampoline() is an assembly stub which will store all user | ||
220 | * registers on the stack and execute a breakpoint instruction. | ||
221 | * | ||
222 | * If we single-step into an exception handler which runs with | ||
223 | * interrupts disabled the whole time so it doesn't have to check for | ||
224 | * pending work, its return address will be modified so that it ends | ||
225 | * up returning to debug_trampoline. | ||
226 | * | ||
227 | * If the exception handler decides to store the user context and | ||
228 | * enable interrupts after all, it will restore the original return | ||
229 | * address and status register value. Before it returns, it will | ||
230 | * notice that TIF_BREAKPOINT is set and execute a breakpoint | ||
231 | * instruction. | ||
232 | */ | ||
233 | extern void debug_trampoline(void); | ||
234 | |||
235 | asmlinkage struct pt_regs *do_debug(struct pt_regs *regs) | ||
236 | { | ||
237 | struct thread_info *ti; | ||
238 | unsigned long trampoline_addr; | ||
239 | u32 status; | ||
240 | u32 ctrl; | ||
241 | int code; | ||
242 | |||
243 | status = ocd_read(DS); | ||
244 | ti = current_thread_info(); | ||
245 | code = TRAP_BRKPT; | ||
246 | |||
247 | pr_debug("do_debug: status=0x%08x PC=0x%08lx SR=0x%08lx tif=0x%08lx\n", | ||
248 | status, regs->pc, regs->sr, ti->flags); | ||
249 | |||
250 | if (!user_mode(regs)) { | ||
251 | unsigned long die_val = DIE_BREAKPOINT; | ||
252 | |||
253 | if (status & (1 << OCD_DS_SSS_BIT)) | ||
254 | die_val = DIE_SSTEP; | ||
255 | |||
256 | if (notify_die(die_val, "ptrace", regs, 0, 0, SIGTRAP) | ||
257 | == NOTIFY_STOP) | ||
258 | return regs; | ||
259 | |||
260 | if ((status & (1 << OCD_DS_SWB_BIT)) | ||
261 | && test_and_clear_ti_thread_flag( | ||
262 | ti, TIF_BREAKPOINT)) { | ||
263 | /* | ||
264 | * Explicit breakpoint from trampoline or | ||
265 | * exception/syscall/interrupt handler. | ||
266 | * | ||
267 | * The real saved regs are on the stack right | ||
268 | * after the ones we saved on entry. | ||
269 | */ | ||
270 | regs++; | ||
271 | pr_debug(" -> TIF_BREAKPOINT done, adjusted regs:" | ||
272 | "PC=0x%08lx SR=0x%08lx\n", | ||
273 | regs->pc, regs->sr); | ||
274 | BUG_ON(!user_mode(regs)); | ||
275 | |||
276 | if (test_thread_flag(TIF_SINGLE_STEP)) { | ||
277 | pr_debug("Going to do single step...\n"); | ||
278 | return regs; | ||
279 | } | ||
280 | |||
281 | /* | ||
282 | * No TIF_SINGLE_STEP means we're done | ||
283 | * stepping over a syscall. Do the trap now. | ||
284 | */ | ||
285 | code = TRAP_TRACE; | ||
286 | } else if ((status & (1 << OCD_DS_SSS_BIT)) | ||
287 | && test_ti_thread_flag(ti, TIF_SINGLE_STEP)) { | ||
288 | |||
289 | pr_debug("Stepped into something, " | ||
290 | "setting TIF_BREAKPOINT...\n"); | ||
291 | set_ti_thread_flag(ti, TIF_BREAKPOINT); | ||
292 | |||
293 | /* | ||
294 | * We stepped into an exception, interrupt or | ||
295 | * syscall handler. Some exception handlers | ||
296 | * don't check for pending work, so we need to | ||
297 | * set up a trampoline just in case. | ||
298 | * | ||
299 | * The exception entry code will undo the | ||
300 | * trampoline stuff if it does a full context | ||
301 | * save (which also means that it'll check for | ||
302 | * pending work later.) | ||
303 | */ | ||
304 | if ((regs->sr & MODE_MASK) == MODE_EXCEPTION) { | ||
305 | trampoline_addr | ||
306 | = (unsigned long)&debug_trampoline; | ||
307 | |||
308 | pr_debug("Setting up trampoline...\n"); | ||
309 | ti->rar_saved = sysreg_read(RAR_EX); | ||
310 | ti->rsr_saved = sysreg_read(RSR_EX); | ||
311 | sysreg_write(RAR_EX, trampoline_addr); | ||
312 | sysreg_write(RSR_EX, (MODE_EXCEPTION | ||
313 | | SR_EM | SR_GM)); | ||
314 | BUG_ON(ti->rsr_saved & MODE_MASK); | ||
315 | } | ||
316 | |||
317 | /* | ||
318 | * If we stepped into a system call, we | ||
319 | * shouldn't do a single step after we return | ||
320 | * since the return address is right after the | ||
321 | * "scall" instruction we were told to step | ||
322 | * over. | ||
323 | */ | ||
324 | if ((regs->sr & MODE_MASK) == MODE_SUPERVISOR) { | ||
325 | pr_debug("Supervisor; no single step\n"); | ||
326 | clear_ti_thread_flag(ti, TIF_SINGLE_STEP); | ||
327 | } | ||
328 | |||
329 | ctrl = ocd_read(DC); | ||
330 | ctrl &= ~(1 << OCD_DC_SS_BIT); | ||
331 | ocd_write(DC, ctrl); | ||
332 | |||
333 | return regs; | ||
334 | } else { | ||
335 | printk(KERN_ERR "Unexpected OCD_DS value: 0x%08x\n", | ||
336 | status); | ||
337 | printk(KERN_ERR "Thread flags: 0x%08lx\n", ti->flags); | ||
338 | die("Unhandled debug trap in kernel mode", | ||
339 | regs, SIGTRAP); | ||
340 | } | ||
341 | } else if (status & (1 << OCD_DS_SSS_BIT)) { | ||
342 | /* Single step in user mode */ | ||
343 | code = TRAP_TRACE; | ||
344 | |||
345 | ctrl = ocd_read(DC); | ||
346 | ctrl &= ~(1 << OCD_DC_SS_BIT); | ||
347 | ocd_write(DC, ctrl); | ||
348 | } | ||
349 | |||
350 | pr_debug("Sending SIGTRAP: code=%d PC=0x%08lx SR=0x%08lx\n", | ||
351 | code, regs->pc, regs->sr); | ||
352 | |||
353 | clear_thread_flag(TIF_SINGLE_STEP); | ||
354 | _exception(SIGTRAP, regs, code, instruction_pointer(regs)); | ||
355 | |||
356 | return regs; | ||
357 | } | ||
diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c deleted file mode 100644 index e6928896da2a..000000000000 --- a/arch/avr32/kernel/setup.c +++ /dev/null | |||
@@ -1,609 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/clk.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/initrd.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/console.h> | ||
14 | #include <linux/ioport.h> | ||
15 | #include <linux/bootmem.h> | ||
16 | #include <linux/fs.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/pfn.h> | ||
19 | #include <linux/root_dev.h> | ||
20 | #include <linux/cpu.h> | ||
21 | #include <linux/kernel.h> | ||
22 | |||
23 | #include <asm/sections.h> | ||
24 | #include <asm/processor.h> | ||
25 | #include <asm/pgtable.h> | ||
26 | #include <asm/setup.h> | ||
27 | #include <asm/sysreg.h> | ||
28 | |||
29 | #include <mach/board.h> | ||
30 | #include <mach/init.h> | ||
31 | |||
32 | extern int root_mountflags; | ||
33 | |||
34 | /* | ||
35 | * Initialize loops_per_jiffy as 5000000 (500MIPS). | ||
36 | * Better make it too large than too small... | ||
37 | */ | ||
38 | struct avr32_cpuinfo boot_cpu_data = { | ||
39 | .loops_per_jiffy = 5000000 | ||
40 | }; | ||
41 | EXPORT_SYMBOL(boot_cpu_data); | ||
42 | |||
43 | static char __initdata command_line[COMMAND_LINE_SIZE]; | ||
44 | |||
45 | /* | ||
46 | * Standard memory resources | ||
47 | */ | ||
48 | static struct resource __initdata kernel_data = { | ||
49 | .name = "Kernel data", | ||
50 | .start = 0, | ||
51 | .end = 0, | ||
52 | .flags = IORESOURCE_SYSTEM_RAM, | ||
53 | }; | ||
54 | static struct resource __initdata kernel_code = { | ||
55 | .name = "Kernel code", | ||
56 | .start = 0, | ||
57 | .end = 0, | ||
58 | .flags = IORESOURCE_SYSTEM_RAM, | ||
59 | .sibling = &kernel_data, | ||
60 | }; | ||
61 | |||
62 | /* | ||
63 | * Available system RAM and reserved regions as singly linked | ||
64 | * lists. These lists are traversed using the sibling pointer in | ||
65 | * struct resource and are kept sorted at all times. | ||
66 | */ | ||
67 | static struct resource *__initdata system_ram; | ||
68 | static struct resource *__initdata reserved = &kernel_code; | ||
69 | |||
70 | /* | ||
71 | * We need to allocate these before the bootmem allocator is up and | ||
72 | * running, so we need this "cache". 32 entries are probably enough | ||
73 | * for all but the most insanely complex systems. | ||
74 | */ | ||
75 | static struct resource __initdata res_cache[32]; | ||
76 | static unsigned int __initdata res_cache_next_free; | ||
77 | |||
78 | static void __init resource_init(void) | ||
79 | { | ||
80 | struct resource *mem, *res; | ||
81 | struct resource *new; | ||
82 | |||
83 | kernel_code.start = __pa(init_mm.start_code); | ||
84 | |||
85 | for (mem = system_ram; mem; mem = mem->sibling) { | ||
86 | new = alloc_bootmem_low(sizeof(struct resource)); | ||
87 | memcpy(new, mem, sizeof(struct resource)); | ||
88 | |||
89 | new->sibling = NULL; | ||
90 | if (request_resource(&iomem_resource, new)) | ||
91 | printk(KERN_WARNING "Bad RAM resource %08x-%08x\n", | ||
92 | mem->start, mem->end); | ||
93 | } | ||
94 | |||
95 | for (res = reserved; res; res = res->sibling) { | ||
96 | new = alloc_bootmem_low(sizeof(struct resource)); | ||
97 | memcpy(new, res, sizeof(struct resource)); | ||
98 | |||
99 | new->sibling = NULL; | ||
100 | if (insert_resource(&iomem_resource, new)) | ||
101 | printk(KERN_WARNING | ||
102 | "Bad reserved resource %s (%08x-%08x)\n", | ||
103 | res->name, res->start, res->end); | ||
104 | } | ||
105 | } | ||
106 | |||
107 | static void __init | ||
108 | add_physical_memory(resource_size_t start, resource_size_t end) | ||
109 | { | ||
110 | struct resource *new, *next, **pprev; | ||
111 | |||
112 | for (pprev = &system_ram, next = system_ram; next; | ||
113 | pprev = &next->sibling, next = next->sibling) { | ||
114 | if (end < next->start) | ||
115 | break; | ||
116 | if (start <= next->end) { | ||
117 | printk(KERN_WARNING | ||
118 | "Warning: Physical memory map is broken\n"); | ||
119 | printk(KERN_WARNING | ||
120 | "Warning: %08x-%08x overlaps %08x-%08x\n", | ||
121 | start, end, next->start, next->end); | ||
122 | return; | ||
123 | } | ||
124 | } | ||
125 | |||
126 | if (res_cache_next_free >= ARRAY_SIZE(res_cache)) { | ||
127 | printk(KERN_WARNING | ||
128 | "Warning: Failed to add physical memory %08x-%08x\n", | ||
129 | start, end); | ||
130 | return; | ||
131 | } | ||
132 | |||
133 | new = &res_cache[res_cache_next_free++]; | ||
134 | new->start = start; | ||
135 | new->end = end; | ||
136 | new->name = "System RAM"; | ||
137 | new->flags = IORESOURCE_SYSTEM_RAM; | ||
138 | |||
139 | *pprev = new; | ||
140 | } | ||
141 | |||
142 | static int __init | ||
143 | add_reserved_region(resource_size_t start, resource_size_t end, | ||
144 | const char *name) | ||
145 | { | ||
146 | struct resource *new, *next, **pprev; | ||
147 | |||
148 | if (end < start) | ||
149 | return -EINVAL; | ||
150 | |||
151 | if (res_cache_next_free >= ARRAY_SIZE(res_cache)) | ||
152 | return -ENOMEM; | ||
153 | |||
154 | for (pprev = &reserved, next = reserved; next; | ||
155 | pprev = &next->sibling, next = next->sibling) { | ||
156 | if (end < next->start) | ||
157 | break; | ||
158 | if (start <= next->end) | ||
159 | return -EBUSY; | ||
160 | } | ||
161 | |||
162 | new = &res_cache[res_cache_next_free++]; | ||
163 | new->start = start; | ||
164 | new->end = end; | ||
165 | new->name = name; | ||
166 | new->sibling = next; | ||
167 | new->flags = IORESOURCE_MEM; | ||
168 | |||
169 | *pprev = new; | ||
170 | |||
171 | return 0; | ||
172 | } | ||
173 | |||
174 | static unsigned long __init | ||
175 | find_free_region(const struct resource *mem, resource_size_t size, | ||
176 | resource_size_t align) | ||
177 | { | ||
178 | struct resource *res; | ||
179 | unsigned long target; | ||
180 | |||
181 | target = ALIGN(mem->start, align); | ||
182 | for (res = reserved; res; res = res->sibling) { | ||
183 | if ((target + size) <= res->start) | ||
184 | break; | ||
185 | if (target <= res->end) | ||
186 | target = ALIGN(res->end + 1, align); | ||
187 | } | ||
188 | |||
189 | if ((target + size) > (mem->end + 1)) | ||
190 | return mem->end + 1; | ||
191 | |||
192 | return target; | ||
193 | } | ||
194 | |||
195 | static int __init | ||
196 | alloc_reserved_region(resource_size_t *start, resource_size_t size, | ||
197 | resource_size_t align, const char *name) | ||
198 | { | ||
199 | struct resource *mem; | ||
200 | resource_size_t target; | ||
201 | int ret; | ||
202 | |||
203 | for (mem = system_ram; mem; mem = mem->sibling) { | ||
204 | target = find_free_region(mem, size, align); | ||
205 | if (target <= mem->end) { | ||
206 | ret = add_reserved_region(target, target + size - 1, | ||
207 | name); | ||
208 | if (!ret) | ||
209 | *start = target; | ||
210 | return ret; | ||
211 | } | ||
212 | } | ||
213 | |||
214 | return -ENOMEM; | ||
215 | } | ||
216 | |||
217 | /* | ||
218 | * Early framebuffer allocation. Works as follows: | ||
219 | * - If fbmem_size is zero, nothing will be allocated or reserved. | ||
220 | * - If fbmem_start is zero when setup_bootmem() is called, | ||
221 | * a block of fbmem_size bytes will be reserved before bootmem | ||
222 | * initialization. It will be aligned to the largest page size | ||
223 | * that fbmem_size is a multiple of. | ||
224 | * - If fbmem_start is nonzero, an area of size fbmem_size will be | ||
225 | * reserved at the physical address fbmem_start if possible. If | ||
226 | * it collides with other reserved memory, a different block of | ||
227 | * same size will be allocated, just as if fbmem_start was zero. | ||
228 | * | ||
229 | * Board-specific code may use these variables to set up platform data | ||
230 | * for the framebuffer driver if fbmem_size is nonzero. | ||
231 | */ | ||
232 | resource_size_t __initdata fbmem_start; | ||
233 | resource_size_t __initdata fbmem_size; | ||
234 | |||
235 | /* | ||
236 | * "fbmem=xxx[kKmM]" allocates the specified amount of boot memory for | ||
237 | * use as framebuffer. | ||
238 | * | ||
239 | * "fbmem=xxx[kKmM]@yyy[kKmM]" defines a memory region of size xxx and | ||
240 | * starting at yyy to be reserved for use as framebuffer. | ||
241 | * | ||
242 | * The kernel won't verify that the memory region starting at yyy | ||
243 | * actually contains usable RAM. | ||
244 | */ | ||
245 | static int __init early_parse_fbmem(char *p) | ||
246 | { | ||
247 | int ret; | ||
248 | unsigned long align; | ||
249 | |||
250 | fbmem_size = memparse(p, &p); | ||
251 | if (*p == '@') { | ||
252 | fbmem_start = memparse(p + 1, &p); | ||
253 | ret = add_reserved_region(fbmem_start, | ||
254 | fbmem_start + fbmem_size - 1, | ||
255 | "Framebuffer"); | ||
256 | if (ret) { | ||
257 | printk(KERN_WARNING | ||
258 | "Failed to reserve framebuffer memory\n"); | ||
259 | fbmem_start = 0; | ||
260 | } | ||
261 | } | ||
262 | |||
263 | if (!fbmem_start) { | ||
264 | if ((fbmem_size & 0x000fffffUL) == 0) | ||
265 | align = 0x100000; /* 1 MiB */ | ||
266 | else if ((fbmem_size & 0x0000ffffUL) == 0) | ||
267 | align = 0x10000; /* 64 KiB */ | ||
268 | else | ||
269 | align = 0x1000; /* 4 KiB */ | ||
270 | |||
271 | ret = alloc_reserved_region(&fbmem_start, fbmem_size, | ||
272 | align, "Framebuffer"); | ||
273 | if (ret) { | ||
274 | printk(KERN_WARNING | ||
275 | "Failed to allocate framebuffer memory\n"); | ||
276 | fbmem_size = 0; | ||
277 | } else { | ||
278 | memset(__va(fbmem_start), 0, fbmem_size); | ||
279 | } | ||
280 | } | ||
281 | |||
282 | return 0; | ||
283 | } | ||
284 | early_param("fbmem", early_parse_fbmem); | ||
285 | |||
286 | /* | ||
287 | * Pick out the memory size. We look for mem=size@start, | ||
288 | * where start and size are "size[KkMmGg]" | ||
289 | */ | ||
290 | static int __init early_mem(char *p) | ||
291 | { | ||
292 | resource_size_t size, start; | ||
293 | |||
294 | start = system_ram->start; | ||
295 | size = memparse(p, &p); | ||
296 | if (*p == '@') | ||
297 | start = memparse(p + 1, &p); | ||
298 | |||
299 | system_ram->start = start; | ||
300 | system_ram->end = system_ram->start + size - 1; | ||
301 | return 0; | ||
302 | } | ||
303 | early_param("mem", early_mem); | ||
304 | |||
305 | static int __init parse_tag_core(struct tag *tag) | ||
306 | { | ||
307 | if (tag->hdr.size > 2) { | ||
308 | if ((tag->u.core.flags & 1) == 0) | ||
309 | root_mountflags &= ~MS_RDONLY; | ||
310 | ROOT_DEV = new_decode_dev(tag->u.core.rootdev); | ||
311 | } | ||
312 | return 0; | ||
313 | } | ||
314 | __tagtable(ATAG_CORE, parse_tag_core); | ||
315 | |||
316 | static int __init parse_tag_mem(struct tag *tag) | ||
317 | { | ||
318 | unsigned long start, end; | ||
319 | |||
320 | /* | ||
321 | * Ignore zero-sized entries. If we're running standalone, the | ||
322 | * SDRAM code may emit such entries if something goes | ||
323 | * wrong... | ||
324 | */ | ||
325 | if (tag->u.mem_range.size == 0) | ||
326 | return 0; | ||
327 | |||
328 | start = tag->u.mem_range.addr; | ||
329 | end = tag->u.mem_range.addr + tag->u.mem_range.size - 1; | ||
330 | |||
331 | add_physical_memory(start, end); | ||
332 | return 0; | ||
333 | } | ||
334 | __tagtable(ATAG_MEM, parse_tag_mem); | ||
335 | |||
336 | static int __init parse_tag_rdimg(struct tag *tag) | ||
337 | { | ||
338 | #ifdef CONFIG_BLK_DEV_INITRD | ||
339 | struct tag_mem_range *mem = &tag->u.mem_range; | ||
340 | int ret; | ||
341 | |||
342 | if (initrd_start) { | ||
343 | printk(KERN_WARNING | ||
344 | "Warning: Only the first initrd image will be used\n"); | ||
345 | return 0; | ||
346 | } | ||
347 | |||
348 | ret = add_reserved_region(mem->addr, mem->addr + mem->size - 1, | ||
349 | "initrd"); | ||
350 | if (ret) { | ||
351 | printk(KERN_WARNING | ||
352 | "Warning: Failed to reserve initrd memory\n"); | ||
353 | return ret; | ||
354 | } | ||
355 | |||
356 | initrd_start = (unsigned long)__va(mem->addr); | ||
357 | initrd_end = initrd_start + mem->size; | ||
358 | #else | ||
359 | printk(KERN_WARNING "RAM disk image present, but " | ||
360 | "no initrd support in kernel, ignoring\n"); | ||
361 | #endif | ||
362 | |||
363 | return 0; | ||
364 | } | ||
365 | __tagtable(ATAG_RDIMG, parse_tag_rdimg); | ||
366 | |||
367 | static int __init parse_tag_rsvd_mem(struct tag *tag) | ||
368 | { | ||
369 | struct tag_mem_range *mem = &tag->u.mem_range; | ||
370 | |||
371 | return add_reserved_region(mem->addr, mem->addr + mem->size - 1, | ||
372 | "Reserved"); | ||
373 | } | ||
374 | __tagtable(ATAG_RSVD_MEM, parse_tag_rsvd_mem); | ||
375 | |||
376 | static int __init parse_tag_cmdline(struct tag *tag) | ||
377 | { | ||
378 | strlcpy(boot_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE); | ||
379 | return 0; | ||
380 | } | ||
381 | __tagtable(ATAG_CMDLINE, parse_tag_cmdline); | ||
382 | |||
383 | static int __init parse_tag_clock(struct tag *tag) | ||
384 | { | ||
385 | /* | ||
386 | * We'll figure out the clocks by peeking at the system | ||
387 | * manager regs directly. | ||
388 | */ | ||
389 | return 0; | ||
390 | } | ||
391 | __tagtable(ATAG_CLOCK, parse_tag_clock); | ||
392 | |||
393 | /* | ||
394 | * The board_number correspond to the bd->bi_board_number in U-Boot. This | ||
395 | * parameter is only available during initialisation and can be used in some | ||
396 | * kind of board identification. | ||
397 | */ | ||
398 | u32 __initdata board_number; | ||
399 | |||
400 | static int __init parse_tag_boardinfo(struct tag *tag) | ||
401 | { | ||
402 | board_number = tag->u.boardinfo.board_number; | ||
403 | |||
404 | return 0; | ||
405 | } | ||
406 | __tagtable(ATAG_BOARDINFO, parse_tag_boardinfo); | ||
407 | |||
408 | /* | ||
409 | * Scan the tag table for this tag, and call its parse function. The | ||
410 | * tag table is built by the linker from all the __tagtable | ||
411 | * declarations. | ||
412 | */ | ||
413 | static int __init parse_tag(struct tag *tag) | ||
414 | { | ||
415 | extern struct tagtable __tagtable_begin, __tagtable_end; | ||
416 | struct tagtable *t; | ||
417 | |||
418 | for (t = &__tagtable_begin; t < &__tagtable_end; t++) | ||
419 | if (tag->hdr.tag == t->tag) { | ||
420 | t->parse(tag); | ||
421 | break; | ||
422 | } | ||
423 | |||
424 | return t < &__tagtable_end; | ||
425 | } | ||
426 | |||
427 | /* | ||
428 | * Parse all tags in the list we got from the boot loader | ||
429 | */ | ||
430 | static void __init parse_tags(struct tag *t) | ||
431 | { | ||
432 | for (; t->hdr.tag != ATAG_NONE; t = tag_next(t)) | ||
433 | if (!parse_tag(t)) | ||
434 | printk(KERN_WARNING | ||
435 | "Ignoring unrecognised tag 0x%08x\n", | ||
436 | t->hdr.tag); | ||
437 | } | ||
438 | |||
439 | /* | ||
440 | * Find a free memory region large enough for storing the | ||
441 | * bootmem bitmap. | ||
442 | */ | ||
443 | static unsigned long __init | ||
444 | find_bootmap_pfn(const struct resource *mem) | ||
445 | { | ||
446 | unsigned long bootmap_pages, bootmap_len; | ||
447 | unsigned long node_pages = PFN_UP(resource_size(mem)); | ||
448 | unsigned long bootmap_start; | ||
449 | |||
450 | bootmap_pages = bootmem_bootmap_pages(node_pages); | ||
451 | bootmap_len = bootmap_pages << PAGE_SHIFT; | ||
452 | |||
453 | /* | ||
454 | * Find a large enough region without reserved pages for | ||
455 | * storing the bootmem bitmap. We can take advantage of the | ||
456 | * fact that all lists have been sorted. | ||
457 | * | ||
458 | * We have to check that we don't collide with any reserved | ||
459 | * regions, which includes the kernel image and any RAMDISK | ||
460 | * images. | ||
461 | */ | ||
462 | bootmap_start = find_free_region(mem, bootmap_len, PAGE_SIZE); | ||
463 | |||
464 | return bootmap_start >> PAGE_SHIFT; | ||
465 | } | ||
466 | |||
467 | #define MAX_LOWMEM HIGHMEM_START | ||
468 | #define MAX_LOWMEM_PFN PFN_DOWN(MAX_LOWMEM) | ||
469 | |||
470 | static void __init setup_bootmem(void) | ||
471 | { | ||
472 | unsigned bootmap_size; | ||
473 | unsigned long first_pfn, bootmap_pfn, pages; | ||
474 | unsigned long max_pfn, max_low_pfn; | ||
475 | unsigned node = 0; | ||
476 | struct resource *res; | ||
477 | |||
478 | printk(KERN_INFO "Physical memory:\n"); | ||
479 | for (res = system_ram; res; res = res->sibling) | ||
480 | printk(" %08x-%08x\n", res->start, res->end); | ||
481 | printk(KERN_INFO "Reserved memory:\n"); | ||
482 | for (res = reserved; res; res = res->sibling) | ||
483 | printk(" %08x-%08x: %s\n", | ||
484 | res->start, res->end, res->name); | ||
485 | |||
486 | nodes_clear(node_online_map); | ||
487 | |||
488 | if (system_ram->sibling) | ||
489 | printk(KERN_WARNING "Only using first memory bank\n"); | ||
490 | |||
491 | for (res = system_ram; res; res = NULL) { | ||
492 | first_pfn = PFN_UP(res->start); | ||
493 | max_low_pfn = max_pfn = PFN_DOWN(res->end + 1); | ||
494 | bootmap_pfn = find_bootmap_pfn(res); | ||
495 | if (bootmap_pfn > max_pfn) | ||
496 | panic("No space for bootmem bitmap!\n"); | ||
497 | |||
498 | if (max_low_pfn > MAX_LOWMEM_PFN) { | ||
499 | max_low_pfn = MAX_LOWMEM_PFN; | ||
500 | #ifndef CONFIG_HIGHMEM | ||
501 | /* | ||
502 | * Lowmem is memory that can be addressed | ||
503 | * directly through P1/P2 | ||
504 | */ | ||
505 | printk(KERN_WARNING | ||
506 | "Node %u: Only %ld MiB of memory will be used.\n", | ||
507 | node, MAX_LOWMEM >> 20); | ||
508 | printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n"); | ||
509 | #else | ||
510 | #error HIGHMEM is not supported by AVR32 yet | ||
511 | #endif | ||
512 | } | ||
513 | |||
514 | /* Initialize the boot-time allocator with low memory only. */ | ||
515 | bootmap_size = init_bootmem_node(NODE_DATA(node), bootmap_pfn, | ||
516 | first_pfn, max_low_pfn); | ||
517 | |||
518 | /* | ||
519 | * Register fully available RAM pages with the bootmem | ||
520 | * allocator. | ||
521 | */ | ||
522 | pages = max_low_pfn - first_pfn; | ||
523 | free_bootmem_node (NODE_DATA(node), PFN_PHYS(first_pfn), | ||
524 | PFN_PHYS(pages)); | ||
525 | |||
526 | /* Reserve space for the bootmem bitmap... */ | ||
527 | reserve_bootmem_node(NODE_DATA(node), | ||
528 | PFN_PHYS(bootmap_pfn), | ||
529 | bootmap_size, | ||
530 | BOOTMEM_DEFAULT); | ||
531 | |||
532 | /* ...and any other reserved regions. */ | ||
533 | for (res = reserved; res; res = res->sibling) { | ||
534 | if (res->start > PFN_PHYS(max_pfn)) | ||
535 | break; | ||
536 | |||
537 | /* | ||
538 | * resource_init will complain about partial | ||
539 | * overlaps, so we'll just ignore such | ||
540 | * resources for now. | ||
541 | */ | ||
542 | if (res->start >= PFN_PHYS(first_pfn) | ||
543 | && res->end < PFN_PHYS(max_pfn)) | ||
544 | reserve_bootmem_node(NODE_DATA(node), | ||
545 | res->start, | ||
546 | resource_size(res), | ||
547 | BOOTMEM_DEFAULT); | ||
548 | } | ||
549 | |||
550 | node_set_online(node); | ||
551 | } | ||
552 | } | ||
553 | |||
554 | void __init setup_arch (char **cmdline_p) | ||
555 | { | ||
556 | struct clk *cpu_clk; | ||
557 | |||
558 | init_mm.start_code = (unsigned long)_stext; | ||
559 | init_mm.end_code = (unsigned long)_etext; | ||
560 | init_mm.end_data = (unsigned long)_edata; | ||
561 | init_mm.brk = (unsigned long)_end; | ||
562 | |||
563 | /* | ||
564 | * Include .init section to make allocations easier. It will | ||
565 | * be removed before the resource is actually requested. | ||
566 | */ | ||
567 | kernel_code.start = __pa(__init_begin); | ||
568 | kernel_code.end = __pa(init_mm.end_code - 1); | ||
569 | kernel_data.start = __pa(init_mm.end_code); | ||
570 | kernel_data.end = __pa(init_mm.brk - 1); | ||
571 | |||
572 | parse_tags(bootloader_tags); | ||
573 | |||
574 | setup_processor(); | ||
575 | setup_platform(); | ||
576 | setup_board(); | ||
577 | |||
578 | cpu_clk = clk_get(NULL, "cpu"); | ||
579 | if (IS_ERR(cpu_clk)) { | ||
580 | printk(KERN_WARNING "Warning: Unable to get CPU clock\n"); | ||
581 | } else { | ||
582 | unsigned long cpu_hz = clk_get_rate(cpu_clk); | ||
583 | |||
584 | /* | ||
585 | * Well, duh, but it's probably a good idea to | ||
586 | * increment the use count. | ||
587 | */ | ||
588 | clk_enable(cpu_clk); | ||
589 | |||
590 | boot_cpu_data.clk = cpu_clk; | ||
591 | boot_cpu_data.loops_per_jiffy = cpu_hz * 4; | ||
592 | printk("CPU: Running at %lu.%03lu MHz\n", | ||
593 | ((cpu_hz + 500) / 1000) / 1000, | ||
594 | ((cpu_hz + 500) / 1000) % 1000); | ||
595 | } | ||
596 | |||
597 | strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); | ||
598 | *cmdline_p = command_line; | ||
599 | parse_early_param(); | ||
600 | |||
601 | setup_bootmem(); | ||
602 | |||
603 | #ifdef CONFIG_VT | ||
604 | conswitchp = &dummy_con; | ||
605 | #endif | ||
606 | |||
607 | paging_init(); | ||
608 | resource_init(); | ||
609 | } | ||
diff --git a/arch/avr32/kernel/signal.c b/arch/avr32/kernel/signal.c deleted file mode 100644 index b5fcc4914fe4..000000000000 --- a/arch/avr32/kernel/signal.c +++ /dev/null | |||
@@ -1,288 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * Based on linux/arch/sh/kernel/signal.c | ||
5 | * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima | ||
6 | * Copyright (C) 1991, 1992 Linus Torvalds | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/sched.h> | ||
14 | #include <linux/mm.h> | ||
15 | #include <linux/errno.h> | ||
16 | #include <linux/ptrace.h> | ||
17 | #include <linux/unistd.h> | ||
18 | #include <linux/tracehook.h> | ||
19 | |||
20 | #include <linux/uaccess.h> | ||
21 | #include <asm/ucontext.h> | ||
22 | #include <asm/syscalls.h> | ||
23 | |||
24 | struct rt_sigframe | ||
25 | { | ||
26 | struct siginfo info; | ||
27 | struct ucontext uc; | ||
28 | unsigned long retcode; | ||
29 | }; | ||
30 | |||
31 | static int | ||
32 | restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) | ||
33 | { | ||
34 | int err = 0; | ||
35 | |||
36 | #define COPY(x) err |= __get_user(regs->x, &sc->x) | ||
37 | COPY(sr); | ||
38 | COPY(pc); | ||
39 | COPY(lr); | ||
40 | COPY(sp); | ||
41 | COPY(r12); | ||
42 | COPY(r11); | ||
43 | COPY(r10); | ||
44 | COPY(r9); | ||
45 | COPY(r8); | ||
46 | COPY(r7); | ||
47 | COPY(r6); | ||
48 | COPY(r5); | ||
49 | COPY(r4); | ||
50 | COPY(r3); | ||
51 | COPY(r2); | ||
52 | COPY(r1); | ||
53 | COPY(r0); | ||
54 | #undef COPY | ||
55 | |||
56 | /* | ||
57 | * Don't allow anyone to pretend they're running in supervisor | ||
58 | * mode or something... | ||
59 | */ | ||
60 | err |= !valid_user_regs(regs); | ||
61 | |||
62 | return err; | ||
63 | } | ||
64 | |||
65 | |||
66 | asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) | ||
67 | { | ||
68 | struct rt_sigframe __user *frame; | ||
69 | sigset_t set; | ||
70 | |||
71 | /* Always make any pending restarted system calls return -EINTR */ | ||
72 | current->restart_block.fn = do_no_restart_syscall; | ||
73 | |||
74 | frame = (struct rt_sigframe __user *)regs->sp; | ||
75 | pr_debug("SIG return: frame = %p\n", frame); | ||
76 | |||
77 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
78 | goto badframe; | ||
79 | |||
80 | if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) | ||
81 | goto badframe; | ||
82 | |||
83 | set_current_blocked(&set); | ||
84 | |||
85 | if (restore_sigcontext(regs, &frame->uc.uc_mcontext)) | ||
86 | goto badframe; | ||
87 | |||
88 | if (restore_altstack(&frame->uc.uc_stack)) | ||
89 | goto badframe; | ||
90 | |||
91 | pr_debug("Context restored: pc = %08lx, lr = %08lx, sp = %08lx\n", | ||
92 | regs->pc, regs->lr, regs->sp); | ||
93 | |||
94 | return regs->r12; | ||
95 | |||
96 | badframe: | ||
97 | force_sig(SIGSEGV, current); | ||
98 | return 0; | ||
99 | } | ||
100 | |||
101 | static int | ||
102 | setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs) | ||
103 | { | ||
104 | int err = 0; | ||
105 | |||
106 | #define COPY(x) err |= __put_user(regs->x, &sc->x) | ||
107 | COPY(sr); | ||
108 | COPY(pc); | ||
109 | COPY(lr); | ||
110 | COPY(sp); | ||
111 | COPY(r12); | ||
112 | COPY(r11); | ||
113 | COPY(r10); | ||
114 | COPY(r9); | ||
115 | COPY(r8); | ||
116 | COPY(r7); | ||
117 | COPY(r6); | ||
118 | COPY(r5); | ||
119 | COPY(r4); | ||
120 | COPY(r3); | ||
121 | COPY(r2); | ||
122 | COPY(r1); | ||
123 | COPY(r0); | ||
124 | #undef COPY | ||
125 | |||
126 | return err; | ||
127 | } | ||
128 | |||
129 | static inline void __user * | ||
130 | get_sigframe(struct ksignal *ksig, struct pt_regs *regs, int framesize) | ||
131 | { | ||
132 | unsigned long sp = sigsp(regs->sp, ksig); | ||
133 | |||
134 | return (void __user *)((sp - framesize) & ~3); | ||
135 | } | ||
136 | |||
137 | static int | ||
138 | setup_rt_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs) | ||
139 | { | ||
140 | struct rt_sigframe __user *frame; | ||
141 | int err = 0; | ||
142 | |||
143 | frame = get_sigframe(ksig, regs, sizeof(*frame)); | ||
144 | err = -EFAULT; | ||
145 | if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) | ||
146 | goto out; | ||
147 | |||
148 | /* | ||
149 | * Set up the return code: | ||
150 | * | ||
151 | * mov r8, __NR_rt_sigreturn | ||
152 | * scall | ||
153 | * | ||
154 | * Note: This will blow up since we're using a non-executable | ||
155 | * stack. Better use SA_RESTORER. | ||
156 | */ | ||
157 | #if __NR_rt_sigreturn > 127 | ||
158 | # error __NR_rt_sigreturn must be < 127 to fit in a short mov | ||
159 | #endif | ||
160 | err = __put_user(0x3008d733 | (__NR_rt_sigreturn << 20), | ||
161 | &frame->retcode); | ||
162 | |||
163 | err |= copy_siginfo_to_user(&frame->info, &ksig->info); | ||
164 | |||
165 | /* Set up the ucontext */ | ||
166 | err |= __put_user(0, &frame->uc.uc_flags); | ||
167 | err |= __put_user(NULL, &frame->uc.uc_link); | ||
168 | err |= __save_altstack(&frame->uc.uc_stack, regs->sp); | ||
169 | err |= setup_sigcontext(&frame->uc.uc_mcontext, regs); | ||
170 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | ||
171 | |||
172 | if (err) | ||
173 | goto out; | ||
174 | |||
175 | regs->r12 = ksig->sig; | ||
176 | regs->r11 = (unsigned long) &frame->info; | ||
177 | regs->r10 = (unsigned long) &frame->uc; | ||
178 | regs->sp = (unsigned long) frame; | ||
179 | if (ksig->ka.sa.sa_flags & SA_RESTORER) | ||
180 | regs->lr = (unsigned long)ksig->ka.sa.sa_restorer; | ||
181 | else { | ||
182 | printk(KERN_NOTICE "[%s:%d] did not set SA_RESTORER\n", | ||
183 | current->comm, current->pid); | ||
184 | regs->lr = (unsigned long) &frame->retcode; | ||
185 | } | ||
186 | |||
187 | pr_debug("SIG deliver [%s:%d]: sig=%d sp=0x%lx pc=0x%lx->0x%p lr=0x%lx\n", | ||
188 | current->comm, current->pid, ksig->sig, regs->sp, | ||
189 | regs->pc, ksig->ka.sa.sa_handler, regs->lr); | ||
190 | |||
191 | regs->pc = (unsigned long)ksig->ka.sa.sa_handler; | ||
192 | |||
193 | out: | ||
194 | return err; | ||
195 | } | ||
196 | |||
197 | static inline void setup_syscall_restart(struct pt_regs *regs) | ||
198 | { | ||
199 | if (regs->r12 == -ERESTART_RESTARTBLOCK) | ||
200 | regs->r8 = __NR_restart_syscall; | ||
201 | else | ||
202 | regs->r12 = regs->r12_orig; | ||
203 | regs->pc -= 2; | ||
204 | } | ||
205 | |||
206 | static inline void | ||
207 | handle_signal(struct ksignal *ksig, struct pt_regs *regs, int syscall) | ||
208 | { | ||
209 | int ret; | ||
210 | |||
211 | /* | ||
212 | * Set up the stack frame | ||
213 | */ | ||
214 | ret = setup_rt_frame(ksig, sigmask_to_save(), regs); | ||
215 | |||
216 | /* | ||
217 | * Check that the resulting registers are sane | ||
218 | */ | ||
219 | ret |= !valid_user_regs(regs); | ||
220 | |||
221 | /* | ||
222 | * Block the signal if we were successful. | ||
223 | */ | ||
224 | signal_setup_done(ret, ksig, 0); | ||
225 | } | ||
226 | |||
227 | /* | ||
228 | * Note that 'init' is a special process: it doesn't get signals it | ||
229 | * doesn't want to handle. Thus you cannot kill init even with a | ||
230 | * SIGKILL even by mistake. | ||
231 | */ | ||
232 | static void do_signal(struct pt_regs *regs, int syscall) | ||
233 | { | ||
234 | struct ksignal ksig; | ||
235 | |||
236 | /* | ||
237 | * We want the common case to go fast, which is why we may in | ||
238 | * certain cases get here from kernel mode. Just return | ||
239 | * without doing anything if so. | ||
240 | */ | ||
241 | if (!user_mode(regs)) | ||
242 | return; | ||
243 | |||
244 | get_signal(&ksig); | ||
245 | if (syscall) { | ||
246 | switch (regs->r12) { | ||
247 | case -ERESTART_RESTARTBLOCK: | ||
248 | case -ERESTARTNOHAND: | ||
249 | if (ksig.sig > 0) { | ||
250 | regs->r12 = -EINTR; | ||
251 | break; | ||
252 | } | ||
253 | /* fall through */ | ||
254 | case -ERESTARTSYS: | ||
255 | if (ksig.sig > 0 && !(ksig.ka.sa.sa_flags & SA_RESTART)) { | ||
256 | regs->r12 = -EINTR; | ||
257 | break; | ||
258 | } | ||
259 | /* fall through */ | ||
260 | case -ERESTARTNOINTR: | ||
261 | setup_syscall_restart(regs); | ||
262 | } | ||
263 | } | ||
264 | |||
265 | if (!ksig.sig) { | ||
266 | /* No signal to deliver -- put the saved sigmask back */ | ||
267 | restore_saved_sigmask(); | ||
268 | return; | ||
269 | } | ||
270 | |||
271 | handle_signal(&ksig, regs, syscall); | ||
272 | } | ||
273 | |||
274 | asmlinkage void do_notify_resume(struct pt_regs *regs, struct thread_info *ti) | ||
275 | { | ||
276 | int syscall = 0; | ||
277 | |||
278 | if ((sysreg_read(SR) & MODE_MASK) == MODE_SUPERVISOR) | ||
279 | syscall = 1; | ||
280 | |||
281 | if (ti->flags & _TIF_SIGPENDING) | ||
282 | do_signal(regs, syscall); | ||
283 | |||
284 | if (ti->flags & _TIF_NOTIFY_RESUME) { | ||
285 | clear_thread_flag(TIF_NOTIFY_RESUME); | ||
286 | tracehook_notify_resume(regs); | ||
287 | } | ||
288 | } | ||
diff --git a/arch/avr32/kernel/stacktrace.c b/arch/avr32/kernel/stacktrace.c deleted file mode 100644 index f8cc995cf0e0..000000000000 --- a/arch/avr32/kernel/stacktrace.c +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* | ||
2 | * Stack trace management functions | ||
3 | * | ||
4 | * Copyright (C) 2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/sched.h> | ||
11 | #include <linux/sched/task_stack.h> | ||
12 | #include <linux/stacktrace.h> | ||
13 | #include <linux/thread_info.h> | ||
14 | #include <linux/module.h> | ||
15 | |||
16 | register unsigned long current_frame_pointer asm("r7"); | ||
17 | |||
18 | struct stackframe { | ||
19 | unsigned long lr; | ||
20 | unsigned long fp; | ||
21 | }; | ||
22 | |||
23 | /* | ||
24 | * Save stack-backtrace addresses into a stack_trace buffer. | ||
25 | */ | ||
26 | void save_stack_trace(struct stack_trace *trace) | ||
27 | { | ||
28 | unsigned long low, high; | ||
29 | unsigned long fp; | ||
30 | struct stackframe *frame; | ||
31 | int skip = trace->skip; | ||
32 | |||
33 | low = (unsigned long)task_stack_page(current); | ||
34 | high = low + THREAD_SIZE; | ||
35 | fp = current_frame_pointer; | ||
36 | |||
37 | while (fp >= low && fp <= (high - 8)) { | ||
38 | frame = (struct stackframe *)fp; | ||
39 | |||
40 | if (skip) { | ||
41 | skip--; | ||
42 | } else { | ||
43 | trace->entries[trace->nr_entries++] = frame->lr; | ||
44 | if (trace->nr_entries >= trace->max_entries) | ||
45 | break; | ||
46 | } | ||
47 | |||
48 | /* | ||
49 | * The next frame must be at a higher address than the | ||
50 | * current frame. | ||
51 | */ | ||
52 | low = fp + 8; | ||
53 | fp = frame->fp; | ||
54 | } | ||
55 | } | ||
56 | EXPORT_SYMBOL_GPL(save_stack_trace); | ||
diff --git a/arch/avr32/kernel/switch_to.S b/arch/avr32/kernel/switch_to.S deleted file mode 100644 index a48d046723c5..000000000000 --- a/arch/avr32/kernel/switch_to.S +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <asm/sysreg.h> | ||
10 | |||
11 | .text | ||
12 | .global __switch_to | ||
13 | .type __switch_to, @function | ||
14 | |||
15 | /* Switch thread context from "prev" to "next", returning "last" | ||
16 | * r12 : prev | ||
17 | * r11 : &prev->thread + 1 | ||
18 | * r10 : &next->thread | ||
19 | */ | ||
20 | __switch_to: | ||
21 | stm --r11, r0,r1,r2,r3,r4,r5,r6,r7,sp,lr | ||
22 | mfsr r9, SYSREG_SR | ||
23 | st.w --r11, r9 | ||
24 | ld.w r8, r10++ | ||
25 | /* | ||
26 | * schedule() may have been called from a mode with a different | ||
27 | * set of registers. Make sure we don't lose anything here. | ||
28 | */ | ||
29 | pushm r10,r12 | ||
30 | mtsr SYSREG_SR, r8 | ||
31 | frs /* flush the return stack */ | ||
32 | sub pc, -2 /* flush the pipeline */ | ||
33 | popm r10,r12 | ||
34 | ldm r10++, r0,r1,r2,r3,r4,r5,r6,r7,sp,pc | ||
35 | .size __switch_to, . - __switch_to | ||
diff --git a/arch/avr32/kernel/syscall-stubs.S b/arch/avr32/kernel/syscall-stubs.S deleted file mode 100644 index cb256534ed92..000000000000 --- a/arch/avr32/kernel/syscall-stubs.S +++ /dev/null | |||
@@ -1,153 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * Stubs for syscalls that require access to pt_regs or that take more | ||
11 | * than five parameters. | ||
12 | */ | ||
13 | |||
14 | #define ARG6 r3 | ||
15 | |||
16 | .text | ||
17 | .global __sys_rt_sigsuspend | ||
18 | .type __sys_rt_sigsuspend,@function | ||
19 | __sys_rt_sigsuspend: | ||
20 | mov r10, sp | ||
21 | rjmp sys_rt_sigsuspend | ||
22 | |||
23 | .global __sys_rt_sigreturn | ||
24 | .type __sys_rt_sigreturn,@function | ||
25 | __sys_rt_sigreturn: | ||
26 | mov r12, sp | ||
27 | rjmp sys_rt_sigreturn | ||
28 | |||
29 | .global __sys_mmap2 | ||
30 | .type __sys_mmap2,@function | ||
31 | __sys_mmap2: | ||
32 | pushm lr | ||
33 | st.w --sp, ARG6 | ||
34 | call sys_mmap_pgoff | ||
35 | sub sp, -4 | ||
36 | popm pc | ||
37 | |||
38 | .global __sys_sendto | ||
39 | .type __sys_sendto,@function | ||
40 | __sys_sendto: | ||
41 | pushm lr | ||
42 | st.w --sp, ARG6 | ||
43 | call sys_sendto | ||
44 | sub sp, -4 | ||
45 | popm pc | ||
46 | |||
47 | .global __sys_recvfrom | ||
48 | .type __sys_recvfrom,@function | ||
49 | __sys_recvfrom: | ||
50 | pushm lr | ||
51 | st.w --sp, ARG6 | ||
52 | call sys_recvfrom | ||
53 | sub sp, -4 | ||
54 | popm pc | ||
55 | |||
56 | .global __sys_pselect6 | ||
57 | .type __sys_pselect6,@function | ||
58 | __sys_pselect6: | ||
59 | pushm lr | ||
60 | st.w --sp, ARG6 | ||
61 | call sys_pselect6 | ||
62 | sub sp, -4 | ||
63 | popm pc | ||
64 | |||
65 | .global __sys_splice | ||
66 | .type __sys_splice,@function | ||
67 | __sys_splice: | ||
68 | pushm lr | ||
69 | st.w --sp, ARG6 | ||
70 | call sys_splice | ||
71 | sub sp, -4 | ||
72 | popm pc | ||
73 | |||
74 | .global __sys_epoll_pwait | ||
75 | .type __sys_epoll_pwait,@function | ||
76 | __sys_epoll_pwait: | ||
77 | pushm lr | ||
78 | st.w --sp, ARG6 | ||
79 | call sys_epoll_pwait | ||
80 | sub sp, -4 | ||
81 | popm pc | ||
82 | |||
83 | .global __sys_sync_file_range | ||
84 | .type __sys_sync_file_range,@function | ||
85 | __sys_sync_file_range: | ||
86 | pushm lr | ||
87 | st.w --sp, ARG6 | ||
88 | call sys_sync_file_range | ||
89 | sub sp, -4 | ||
90 | popm pc | ||
91 | |||
92 | .global __sys_fallocate | ||
93 | .type __sys_fallocate,@function | ||
94 | __sys_fallocate: | ||
95 | pushm lr | ||
96 | st.w --sp, ARG6 | ||
97 | call sys_fallocate | ||
98 | sub sp, -4 | ||
99 | popm pc | ||
100 | |||
101 | .global __sys_fanotify_mark | ||
102 | .type __sys_fanotify_mark,@function | ||
103 | __sys_fanotify_mark: | ||
104 | pushm lr | ||
105 | st.w --sp, ARG6 | ||
106 | call sys_fanotify_mark | ||
107 | sub sp, -4 | ||
108 | popm pc | ||
109 | |||
110 | .global __sys_process_vm_readv | ||
111 | .type __sys_process_vm_readv,@function | ||
112 | __sys_process_vm_readv: | ||
113 | pushm lr | ||
114 | st.w --sp, ARG6 | ||
115 | call sys_process_vm_readv | ||
116 | sub sp, -4 | ||
117 | popm pc | ||
118 | |||
119 | .global __sys_process_vm_writev | ||
120 | .type __sys_process_vm_writev,@function | ||
121 | __sys_process_vm_writev: | ||
122 | pushm lr | ||
123 | st.w --sp, ARG6 | ||
124 | call sys_process_vm_writev | ||
125 | sub sp, -4 | ||
126 | popm pc | ||
127 | |||
128 | .global __sys_copy_file_range | ||
129 | .type __sys_copy_file_range,@function | ||
130 | __sys_copy_file_range: | ||
131 | pushm lr | ||
132 | st.w --sp, ARG6 | ||
133 | call sys_copy_file_range | ||
134 | sub sp, -4 | ||
135 | popm pc | ||
136 | |||
137 | .global __sys_preadv2 | ||
138 | .type __sys_preadv2,@function | ||
139 | __sys_preadv2: | ||
140 | pushm lr | ||
141 | st.w --sp, ARG6 | ||
142 | call sys_preadv2 | ||
143 | sub sp, -4 | ||
144 | popm pc | ||
145 | |||
146 | .global __sys_pwritev2 | ||
147 | .type __sys_pwritev2,@function | ||
148 | __sys_pwritev2: | ||
149 | pushm lr | ||
150 | st.w --sp, ARG6 | ||
151 | call sys_pwritev2 | ||
152 | sub sp, -4 | ||
153 | popm pc | ||
diff --git a/arch/avr32/kernel/syscall_table.S b/arch/avr32/kernel/syscall_table.S deleted file mode 100644 index 774ce57f4948..000000000000 --- a/arch/avr32/kernel/syscall_table.S +++ /dev/null | |||
@@ -1,347 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 system call table | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | .section .rodata,"a",@progbits | ||
12 | .type sys_call_table,@object | ||
13 | .global sys_call_table | ||
14 | .align 2 | ||
15 | sys_call_table: | ||
16 | .long sys_restart_syscall | ||
17 | .long sys_exit | ||
18 | .long sys_fork | ||
19 | .long sys_read | ||
20 | .long sys_write | ||
21 | .long sys_open | ||
22 | .long sys_close | ||
23 | .long sys_umask | ||
24 | .long sys_creat | ||
25 | .long sys_link | ||
26 | .long sys_unlink /* 10 */ | ||
27 | .long sys_execve | ||
28 | .long sys_chdir | ||
29 | .long sys_time | ||
30 | .long sys_mknod | ||
31 | .long sys_chmod | ||
32 | .long sys_chown | ||
33 | .long sys_lchown | ||
34 | .long sys_lseek | ||
35 | .long sys_llseek | ||
36 | .long sys_getpid /* 20 */ | ||
37 | .long sys_mount | ||
38 | .long sys_umount | ||
39 | .long sys_setuid | ||
40 | .long sys_getuid | ||
41 | .long sys_stime | ||
42 | .long sys_ptrace | ||
43 | .long sys_alarm | ||
44 | .long sys_pause | ||
45 | .long sys_utime | ||
46 | .long sys_newstat /* 30 */ | ||
47 | .long sys_newfstat | ||
48 | .long sys_newlstat | ||
49 | .long sys_access | ||
50 | .long sys_chroot | ||
51 | .long sys_sync | ||
52 | .long sys_fsync | ||
53 | .long sys_kill | ||
54 | .long sys_rename | ||
55 | .long sys_mkdir | ||
56 | .long sys_rmdir /* 40 */ | ||
57 | .long sys_dup | ||
58 | .long sys_pipe | ||
59 | .long sys_times | ||
60 | .long sys_clone | ||
61 | .long sys_brk | ||
62 | .long sys_setgid | ||
63 | .long sys_getgid | ||
64 | .long sys_getcwd | ||
65 | .long sys_geteuid | ||
66 | .long sys_getegid /* 50 */ | ||
67 | .long sys_acct | ||
68 | .long sys_setfsuid | ||
69 | .long sys_setfsgid | ||
70 | .long sys_ioctl | ||
71 | .long sys_fcntl | ||
72 | .long sys_setpgid | ||
73 | .long sys_mremap | ||
74 | .long sys_setresuid | ||
75 | .long sys_getresuid | ||
76 | .long sys_setreuid /* 60 */ | ||
77 | .long sys_setregid | ||
78 | .long sys_ustat | ||
79 | .long sys_dup2 | ||
80 | .long sys_getppid | ||
81 | .long sys_getpgrp | ||
82 | .long sys_setsid | ||
83 | .long sys_rt_sigaction | ||
84 | .long __sys_rt_sigreturn | ||
85 | .long sys_rt_sigprocmask | ||
86 | .long sys_rt_sigpending /* 70 */ | ||
87 | .long sys_rt_sigtimedwait | ||
88 | .long sys_rt_sigqueueinfo | ||
89 | .long __sys_rt_sigsuspend | ||
90 | .long sys_sethostname | ||
91 | .long sys_setrlimit | ||
92 | .long sys_getrlimit | ||
93 | .long sys_getrusage | ||
94 | .long sys_gettimeofday | ||
95 | .long sys_settimeofday | ||
96 | .long sys_getgroups /* 80 */ | ||
97 | .long sys_setgroups | ||
98 | .long sys_select | ||
99 | .long sys_symlink | ||
100 | .long sys_fchdir | ||
101 | .long sys_readlink | ||
102 | .long sys_pread64 | ||
103 | .long sys_pwrite64 | ||
104 | .long sys_swapon | ||
105 | .long sys_reboot | ||
106 | .long __sys_mmap2 /* 90 */ | ||
107 | .long sys_munmap | ||
108 | .long sys_truncate | ||
109 | .long sys_ftruncate | ||
110 | .long sys_fchmod | ||
111 | .long sys_fchown | ||
112 | .long sys_getpriority | ||
113 | .long sys_setpriority | ||
114 | .long sys_wait4 | ||
115 | .long sys_statfs | ||
116 | .long sys_fstatfs /* 100 */ | ||
117 | .long sys_vhangup | ||
118 | .long sys_sigaltstack | ||
119 | .long sys_syslog | ||
120 | .long sys_setitimer | ||
121 | .long sys_getitimer | ||
122 | .long sys_swapoff | ||
123 | .long sys_sysinfo | ||
124 | .long sys_ni_syscall /* was sys_ipc briefly */ | ||
125 | .long sys_sendfile | ||
126 | .long sys_setdomainname /* 110 */ | ||
127 | .long sys_newuname | ||
128 | .long sys_adjtimex | ||
129 | .long sys_mprotect | ||
130 | .long sys_vfork | ||
131 | .long sys_init_module | ||
132 | .long sys_delete_module | ||
133 | .long sys_quotactl | ||
134 | .long sys_getpgid | ||
135 | .long sys_bdflush | ||
136 | .long sys_sysfs /* 120 */ | ||
137 | .long sys_personality | ||
138 | .long sys_ni_syscall /* reserved for afs_syscall */ | ||
139 | .long sys_getdents | ||
140 | .long sys_flock | ||
141 | .long sys_msync | ||
142 | .long sys_readv | ||
143 | .long sys_writev | ||
144 | .long sys_getsid | ||
145 | .long sys_fdatasync | ||
146 | .long sys_sysctl /* 130 */ | ||
147 | .long sys_mlock | ||
148 | .long sys_munlock | ||
149 | .long sys_mlockall | ||
150 | .long sys_munlockall | ||
151 | .long sys_sched_setparam | ||
152 | .long sys_sched_getparam | ||
153 | .long sys_sched_setscheduler | ||
154 | .long sys_sched_getscheduler | ||
155 | .long sys_sched_yield | ||
156 | .long sys_sched_get_priority_max /* 140 */ | ||
157 | .long sys_sched_get_priority_min | ||
158 | .long sys_sched_rr_get_interval | ||
159 | .long sys_nanosleep | ||
160 | .long sys_poll | ||
161 | .long sys_ni_syscall /* 145 was nfsservctl */ | ||
162 | .long sys_setresgid | ||
163 | .long sys_getresgid | ||
164 | .long sys_prctl | ||
165 | .long sys_socket | ||
166 | .long sys_bind /* 150 */ | ||
167 | .long sys_connect | ||
168 | .long sys_listen | ||
169 | .long sys_accept | ||
170 | .long sys_getsockname | ||
171 | .long sys_getpeername | ||
172 | .long sys_socketpair | ||
173 | .long sys_send | ||
174 | .long sys_recv | ||
175 | .long __sys_sendto | ||
176 | .long __sys_recvfrom /* 160 */ | ||
177 | .long sys_shutdown | ||
178 | .long sys_setsockopt | ||
179 | .long sys_getsockopt | ||
180 | .long sys_sendmsg | ||
181 | .long sys_recvmsg | ||
182 | .long sys_truncate64 | ||
183 | .long sys_ftruncate64 | ||
184 | .long sys_stat64 | ||
185 | .long sys_lstat64 | ||
186 | .long sys_fstat64 /* 170 */ | ||
187 | .long sys_pivot_root | ||
188 | .long sys_mincore | ||
189 | .long sys_madvise | ||
190 | .long sys_getdents64 | ||
191 | .long sys_fcntl64 | ||
192 | .long sys_gettid | ||
193 | .long sys_readahead | ||
194 | .long sys_setxattr | ||
195 | .long sys_lsetxattr | ||
196 | .long sys_fsetxattr /* 180 */ | ||
197 | .long sys_getxattr | ||
198 | .long sys_lgetxattr | ||
199 | .long sys_fgetxattr | ||
200 | .long sys_listxattr | ||
201 | .long sys_llistxattr | ||
202 | .long sys_flistxattr | ||
203 | .long sys_removexattr | ||
204 | .long sys_lremovexattr | ||
205 | .long sys_fremovexattr | ||
206 | .long sys_tkill /* 190 */ | ||
207 | .long sys_sendfile64 | ||
208 | .long sys_futex | ||
209 | .long sys_sched_setaffinity | ||
210 | .long sys_sched_getaffinity | ||
211 | .long sys_capget | ||
212 | .long sys_capset | ||
213 | .long sys_io_setup | ||
214 | .long sys_io_destroy | ||
215 | .long sys_io_getevents | ||
216 | .long sys_io_submit /* 200 */ | ||
217 | .long sys_io_cancel | ||
218 | .long sys_fadvise64 | ||
219 | .long sys_exit_group | ||
220 | .long sys_lookup_dcookie | ||
221 | .long sys_epoll_create | ||
222 | .long sys_epoll_ctl | ||
223 | .long sys_epoll_wait | ||
224 | .long sys_remap_file_pages | ||
225 | .long sys_set_tid_address | ||
226 | .long sys_timer_create /* 210 */ | ||
227 | .long sys_timer_settime | ||
228 | .long sys_timer_gettime | ||
229 | .long sys_timer_getoverrun | ||
230 | .long sys_timer_delete | ||
231 | .long sys_clock_settime | ||
232 | .long sys_clock_gettime | ||
233 | .long sys_clock_getres | ||
234 | .long sys_clock_nanosleep | ||
235 | .long sys_statfs64 | ||
236 | .long sys_fstatfs64 /* 220 */ | ||
237 | .long sys_tgkill | ||
238 | .long sys_ni_syscall /* reserved for TUX */ | ||
239 | .long sys_utimes | ||
240 | .long sys_fadvise64_64 | ||
241 | .long sys_cacheflush | ||
242 | .long sys_ni_syscall /* sys_vserver */ | ||
243 | .long sys_mq_open | ||
244 | .long sys_mq_unlink | ||
245 | .long sys_mq_timedsend | ||
246 | .long sys_mq_timedreceive /* 230 */ | ||
247 | .long sys_mq_notify | ||
248 | .long sys_mq_getsetattr | ||
249 | .long sys_kexec_load | ||
250 | .long sys_waitid | ||
251 | .long sys_add_key | ||
252 | .long sys_request_key | ||
253 | .long sys_keyctl | ||
254 | .long sys_ioprio_set | ||
255 | .long sys_ioprio_get | ||
256 | .long sys_inotify_init /* 240 */ | ||
257 | .long sys_inotify_add_watch | ||
258 | .long sys_inotify_rm_watch | ||
259 | .long sys_openat | ||
260 | .long sys_mkdirat | ||
261 | .long sys_mknodat | ||
262 | .long sys_fchownat | ||
263 | .long sys_futimesat | ||
264 | .long sys_fstatat64 | ||
265 | .long sys_unlinkat | ||
266 | .long sys_renameat /* 250 */ | ||
267 | .long sys_linkat | ||
268 | .long sys_symlinkat | ||
269 | .long sys_readlinkat | ||
270 | .long sys_fchmodat | ||
271 | .long sys_faccessat | ||
272 | .long __sys_pselect6 | ||
273 | .long sys_ppoll | ||
274 | .long sys_unshare | ||
275 | .long sys_set_robust_list | ||
276 | .long sys_get_robust_list /* 260 */ | ||
277 | .long __sys_splice | ||
278 | .long __sys_sync_file_range | ||
279 | .long sys_tee | ||
280 | .long sys_vmsplice | ||
281 | .long __sys_epoll_pwait | ||
282 | .long sys_msgget | ||
283 | .long sys_msgsnd | ||
284 | .long sys_msgrcv | ||
285 | .long sys_msgctl | ||
286 | .long sys_semget /* 270 */ | ||
287 | .long sys_semop | ||
288 | .long sys_semctl | ||
289 | .long sys_semtimedop | ||
290 | .long sys_shmat | ||
291 | .long sys_shmget | ||
292 | .long sys_shmdt | ||
293 | .long sys_shmctl | ||
294 | .long sys_utimensat | ||
295 | .long sys_signalfd | ||
296 | .long sys_ni_syscall /* 280, was sys_timerfd */ | ||
297 | .long sys_eventfd | ||
298 | .long sys_ni_syscall /* 282, was half-implemented recvmmsg */ | ||
299 | .long sys_setns | ||
300 | .long sys_pread64 | ||
301 | .long sys_pwrite64 | ||
302 | .long sys_timerfd_create | ||
303 | .long __sys_fallocate | ||
304 | .long sys_timerfd_settime | ||
305 | .long sys_timerfd_gettime | ||
306 | .long sys_signalfd4 /* 290 */ | ||
307 | .long sys_eventfd2 | ||
308 | .long sys_epoll_create1 | ||
309 | .long sys_dup3 | ||
310 | .long sys_pipe2 | ||
311 | .long sys_inotify_init1 | ||
312 | .long sys_preadv | ||
313 | .long sys_pwritev | ||
314 | .long sys_rt_tgsigqueueinfo | ||
315 | .long sys_perf_event_open | ||
316 | .long sys_recvmmsg /* 300 */ | ||
317 | .long sys_fanotify_init | ||
318 | .long __sys_fanotify_mark | ||
319 | .long sys_prlimit64 | ||
320 | .long sys_name_to_handle_at | ||
321 | .long sys_open_by_handle_at | ||
322 | .long sys_clock_adjtime | ||
323 | .long sys_syncfs | ||
324 | .long sys_sendmmsg | ||
325 | .long __sys_process_vm_readv | ||
326 | .long __sys_process_vm_writev /* 310 */ | ||
327 | .long sys_kcmp | ||
328 | .long sys_finit_module | ||
329 | .long sys_sched_setattr | ||
330 | .long sys_sched_getattr | ||
331 | .long sys_renameat2 | ||
332 | .long sys_seccomp | ||
333 | .long sys_getrandom | ||
334 | .long sys_memfd_create | ||
335 | .long sys_bpf | ||
336 | .long sys_execveat /* 320 */ | ||
337 | .long sys_accept4 | ||
338 | .long sys_userfaultfd | ||
339 | .long sys_membarrier | ||
340 | .long sys_mlock2 | ||
341 | .long __sys_copy_file_range | ||
342 | .long __sys_preadv2 | ||
343 | .long __sys_pwritev2 | ||
344 | .long sys_pkey_mprotect | ||
345 | .long sys_pkey_alloc | ||
346 | .long sys_pkey_free /* 330 */ | ||
347 | .long sys_ni_syscall /* r8 is saturated at nr_syscalls */ | ||
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c deleted file mode 100644 index 4d9b69615979..000000000000 --- a/arch/avr32/kernel/time.c +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2007 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/clk.h> | ||
9 | #include <linux/clockchips.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/interrupt.h> | ||
12 | #include <linux/irq.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/time.h> | ||
15 | #include <linux/cpu.h> | ||
16 | |||
17 | #include <asm/sysreg.h> | ||
18 | |||
19 | #include <mach/pm.h> | ||
20 | |||
21 | static bool disable_cpu_idle_poll; | ||
22 | |||
23 | static u64 read_cycle_count(struct clocksource *cs) | ||
24 | { | ||
25 | return (u64)sysreg_read(COUNT); | ||
26 | } | ||
27 | |||
28 | /* | ||
29 | * The architectural cycle count registers are a fine clocksource unless | ||
30 | * the system idle loop use sleep states like "idle": the CPU cycles | ||
31 | * measured by COUNT (and COMPARE) don't happen during sleep states. | ||
32 | * Their duration also changes if cpufreq changes the CPU clock rate. | ||
33 | * So we rate the clocksource using COUNT as very low quality. | ||
34 | */ | ||
35 | static struct clocksource counter = { | ||
36 | .name = "avr32_counter", | ||
37 | .rating = 50, | ||
38 | .read = read_cycle_count, | ||
39 | .mask = CLOCKSOURCE_MASK(32), | ||
40 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
41 | }; | ||
42 | |||
43 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
44 | { | ||
45 | struct clock_event_device *evdev = dev_id; | ||
46 | |||
47 | if (unlikely(!(intc_get_pending(0) & 1))) | ||
48 | return IRQ_NONE; | ||
49 | |||
50 | /* | ||
51 | * Disable the interrupt until the clockevent subsystem | ||
52 | * reprograms it. | ||
53 | */ | ||
54 | sysreg_write(COMPARE, 0); | ||
55 | |||
56 | evdev->event_handler(evdev); | ||
57 | return IRQ_HANDLED; | ||
58 | } | ||
59 | |||
60 | static struct irqaction timer_irqaction = { | ||
61 | .handler = timer_interrupt, | ||
62 | /* Oprofile uses the same irq as the timer, so allow it to be shared */ | ||
63 | .flags = IRQF_TIMER | IRQF_SHARED, | ||
64 | .name = "avr32_comparator", | ||
65 | }; | ||
66 | |||
67 | static int comparator_next_event(unsigned long delta, | ||
68 | struct clock_event_device *evdev) | ||
69 | { | ||
70 | unsigned long flags; | ||
71 | |||
72 | raw_local_irq_save(flags); | ||
73 | |||
74 | /* The time to read COUNT then update COMPARE must be less | ||
75 | * than the min_delta_ns value for this clockevent source. | ||
76 | */ | ||
77 | sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1); | ||
78 | |||
79 | raw_local_irq_restore(flags); | ||
80 | |||
81 | return 0; | ||
82 | } | ||
83 | |||
84 | static int comparator_shutdown(struct clock_event_device *evdev) | ||
85 | { | ||
86 | pr_debug("%s: %s\n", __func__, evdev->name); | ||
87 | sysreg_write(COMPARE, 0); | ||
88 | |||
89 | if (disable_cpu_idle_poll) { | ||
90 | disable_cpu_idle_poll = false; | ||
91 | /* | ||
92 | * Only disable idle poll if we have forced that | ||
93 | * in a previous call. | ||
94 | */ | ||
95 | cpu_idle_poll_ctrl(false); | ||
96 | } | ||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | static int comparator_set_oneshot(struct clock_event_device *evdev) | ||
101 | { | ||
102 | pr_debug("%s: %s\n", __func__, evdev->name); | ||
103 | |||
104 | disable_cpu_idle_poll = true; | ||
105 | /* | ||
106 | * If we're using the COUNT and COMPARE registers we | ||
107 | * need to force idle poll. | ||
108 | */ | ||
109 | cpu_idle_poll_ctrl(true); | ||
110 | |||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static struct clock_event_device comparator = { | ||
115 | .name = "avr32_comparator", | ||
116 | .features = CLOCK_EVT_FEAT_ONESHOT, | ||
117 | .shift = 16, | ||
118 | .rating = 50, | ||
119 | .set_next_event = comparator_next_event, | ||
120 | .set_state_shutdown = comparator_shutdown, | ||
121 | .set_state_oneshot = comparator_set_oneshot, | ||
122 | .tick_resume = comparator_set_oneshot, | ||
123 | }; | ||
124 | |||
125 | void read_persistent_clock(struct timespec *ts) | ||
126 | { | ||
127 | ts->tv_sec = mktime(2007, 1, 1, 0, 0, 0); | ||
128 | ts->tv_nsec = 0; | ||
129 | } | ||
130 | |||
131 | void __init time_init(void) | ||
132 | { | ||
133 | unsigned long counter_hz; | ||
134 | int ret; | ||
135 | |||
136 | /* figure rate for counter */ | ||
137 | counter_hz = clk_get_rate(boot_cpu_data.clk); | ||
138 | ret = clocksource_register_hz(&counter, counter_hz); | ||
139 | if (ret) | ||
140 | pr_debug("timer: could not register clocksource: %d\n", ret); | ||
141 | |||
142 | /* setup COMPARE clockevent */ | ||
143 | comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift); | ||
144 | comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator); | ||
145 | comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1; | ||
146 | comparator.cpumask = cpumask_of(0); | ||
147 | |||
148 | sysreg_write(COMPARE, 0); | ||
149 | timer_irqaction.dev_id = &comparator; | ||
150 | |||
151 | ret = setup_irq(0, &timer_irqaction); | ||
152 | if (ret) | ||
153 | pr_debug("timer: could not request IRQ 0: %d\n", ret); | ||
154 | else { | ||
155 | clockevents_register_device(&comparator); | ||
156 | |||
157 | pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name, | ||
158 | ((counter_hz + 500) / 1000) / 1000, | ||
159 | ((counter_hz + 500) / 1000) % 1000); | ||
160 | } | ||
161 | } | ||
diff --git a/arch/avr32/kernel/traps.c b/arch/avr32/kernel/traps.c deleted file mode 100644 index 50b541325025..000000000000 --- a/arch/avr32/kernel/traps.c +++ /dev/null | |||
@@ -1,262 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/bug.h> | ||
10 | #include <linux/hardirq.h> | ||
11 | #include <linux/init.h> | ||
12 | #include <linux/kallsyms.h> | ||
13 | #include <linux/kdebug.h> | ||
14 | #include <linux/extable.h> | ||
15 | #include <linux/module.h> /* print_modules */ | ||
16 | #include <linux/notifier.h> | ||
17 | #include <linux/sched/signal.h> | ||
18 | #include <linux/uaccess.h> | ||
19 | |||
20 | #include <asm/addrspace.h> | ||
21 | #include <asm/mmu_context.h> | ||
22 | #include <asm/ocd.h> | ||
23 | #include <asm/sysreg.h> | ||
24 | #include <asm/traps.h> | ||
25 | |||
26 | static DEFINE_SPINLOCK(die_lock); | ||
27 | |||
28 | void die(const char *str, struct pt_regs *regs, long err) | ||
29 | { | ||
30 | static int die_counter; | ||
31 | |||
32 | console_verbose(); | ||
33 | spin_lock_irq(&die_lock); | ||
34 | bust_spinlocks(1); | ||
35 | |||
36 | printk(KERN_ALERT "Oops: %s, sig: %ld [#%d]\n", | ||
37 | str, err, ++die_counter); | ||
38 | |||
39 | printk(KERN_EMERG); | ||
40 | |||
41 | #ifdef CONFIG_PREEMPT | ||
42 | printk(KERN_CONT "PREEMPT "); | ||
43 | #endif | ||
44 | #ifdef CONFIG_FRAME_POINTER | ||
45 | printk(KERN_CONT "FRAME_POINTER "); | ||
46 | #endif | ||
47 | if (current_cpu_data.features & AVR32_FEATURE_OCD) { | ||
48 | unsigned long did = ocd_read(DID); | ||
49 | printk(KERN_CONT "chip: 0x%03lx:0x%04lx rev %lu\n", | ||
50 | (did >> 1) & 0x7ff, | ||
51 | (did >> 12) & 0x7fff, | ||
52 | (did >> 28) & 0xf); | ||
53 | } else { | ||
54 | printk(KERN_CONT "cpu: arch %u r%u / core %u r%u\n", | ||
55 | current_cpu_data.arch_type, | ||
56 | current_cpu_data.arch_revision, | ||
57 | current_cpu_data.cpu_type, | ||
58 | current_cpu_data.cpu_revision); | ||
59 | } | ||
60 | |||
61 | print_modules(); | ||
62 | show_regs_log_lvl(regs, KERN_EMERG); | ||
63 | show_stack_log_lvl(current, regs->sp, regs, KERN_EMERG); | ||
64 | bust_spinlocks(0); | ||
65 | add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); | ||
66 | spin_unlock_irq(&die_lock); | ||
67 | |||
68 | if (in_interrupt()) | ||
69 | panic("Fatal exception in interrupt"); | ||
70 | |||
71 | if (panic_on_oops) | ||
72 | panic("Fatal exception"); | ||
73 | |||
74 | do_exit(err); | ||
75 | } | ||
76 | |||
77 | void _exception(long signr, struct pt_regs *regs, int code, | ||
78 | unsigned long addr) | ||
79 | { | ||
80 | siginfo_t info; | ||
81 | |||
82 | if (!user_mode(regs)) { | ||
83 | const struct exception_table_entry *fixup; | ||
84 | |||
85 | /* Are we prepared to handle this kernel fault? */ | ||
86 | fixup = search_exception_tables(regs->pc); | ||
87 | if (fixup) { | ||
88 | regs->pc = fixup->fixup; | ||
89 | return; | ||
90 | } | ||
91 | die("Unhandled exception in kernel mode", regs, signr); | ||
92 | } | ||
93 | |||
94 | memset(&info, 0, sizeof(info)); | ||
95 | info.si_signo = signr; | ||
96 | info.si_code = code; | ||
97 | info.si_addr = (void __user *)addr; | ||
98 | force_sig_info(signr, &info, current); | ||
99 | } | ||
100 | |||
101 | asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs) | ||
102 | { | ||
103 | int ret; | ||
104 | |||
105 | nmi_enter(); | ||
106 | |||
107 | ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT); | ||
108 | switch (ret) { | ||
109 | case NOTIFY_OK: | ||
110 | case NOTIFY_STOP: | ||
111 | break; | ||
112 | case NOTIFY_BAD: | ||
113 | die("Fatal Non-Maskable Interrupt", regs, SIGINT); | ||
114 | default: | ||
115 | printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n"); | ||
116 | nmi_disable(); | ||
117 | break; | ||
118 | } | ||
119 | nmi_exit(); | ||
120 | } | ||
121 | |||
122 | asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs) | ||
123 | { | ||
124 | die("Critical exception", regs, SIGKILL); | ||
125 | } | ||
126 | |||
127 | asmlinkage void do_address_exception(unsigned long ecr, struct pt_regs *regs) | ||
128 | { | ||
129 | _exception(SIGBUS, regs, BUS_ADRALN, regs->pc); | ||
130 | } | ||
131 | |||
132 | /* This way of handling undefined instructions is stolen from ARM */ | ||
133 | static LIST_HEAD(undef_hook); | ||
134 | static DEFINE_SPINLOCK(undef_lock); | ||
135 | |||
136 | void register_undef_hook(struct undef_hook *hook) | ||
137 | { | ||
138 | spin_lock_irq(&undef_lock); | ||
139 | list_add(&hook->node, &undef_hook); | ||
140 | spin_unlock_irq(&undef_lock); | ||
141 | } | ||
142 | |||
143 | void unregister_undef_hook(struct undef_hook *hook) | ||
144 | { | ||
145 | spin_lock_irq(&undef_lock); | ||
146 | list_del(&hook->node); | ||
147 | spin_unlock_irq(&undef_lock); | ||
148 | } | ||
149 | |||
150 | static int do_cop_absent(u32 insn) | ||
151 | { | ||
152 | int cop_nr; | ||
153 | u32 cpucr; | ||
154 | |||
155 | if ((insn & 0xfdf00000) == 0xf1900000) | ||
156 | /* LDC0 */ | ||
157 | cop_nr = 0; | ||
158 | else | ||
159 | cop_nr = (insn >> 13) & 0x7; | ||
160 | |||
161 | /* Try enabling the coprocessor */ | ||
162 | cpucr = sysreg_read(CPUCR); | ||
163 | cpucr |= (1 << (24 + cop_nr)); | ||
164 | sysreg_write(CPUCR, cpucr); | ||
165 | |||
166 | cpucr = sysreg_read(CPUCR); | ||
167 | if (!(cpucr & (1 << (24 + cop_nr)))) | ||
168 | return -ENODEV; | ||
169 | |||
170 | return 0; | ||
171 | } | ||
172 | |||
173 | #ifdef CONFIG_BUG | ||
174 | int is_valid_bugaddr(unsigned long pc) | ||
175 | { | ||
176 | unsigned short opcode; | ||
177 | |||
178 | if (pc < PAGE_OFFSET) | ||
179 | return 0; | ||
180 | if (probe_kernel_address((u16 *)pc, opcode)) | ||
181 | return 0; | ||
182 | |||
183 | return opcode == AVR32_BUG_OPCODE; | ||
184 | } | ||
185 | #endif | ||
186 | |||
187 | asmlinkage void do_illegal_opcode(unsigned long ecr, struct pt_regs *regs) | ||
188 | { | ||
189 | u32 insn; | ||
190 | struct undef_hook *hook; | ||
191 | void __user *pc; | ||
192 | long code; | ||
193 | |||
194 | #ifdef CONFIG_BUG | ||
195 | if (!user_mode(regs) && (ecr == ECR_ILLEGAL_OPCODE)) { | ||
196 | enum bug_trap_type type; | ||
197 | |||
198 | type = report_bug(regs->pc, regs); | ||
199 | switch (type) { | ||
200 | case BUG_TRAP_TYPE_NONE: | ||
201 | break; | ||
202 | case BUG_TRAP_TYPE_WARN: | ||
203 | regs->pc += 2; | ||
204 | return; | ||
205 | case BUG_TRAP_TYPE_BUG: | ||
206 | die("Kernel BUG", regs, SIGKILL); | ||
207 | } | ||
208 | } | ||
209 | #endif | ||
210 | |||
211 | local_irq_enable(); | ||
212 | |||
213 | if (user_mode(regs)) { | ||
214 | pc = (void __user *)instruction_pointer(regs); | ||
215 | if (get_user(insn, (u32 __user *)pc)) | ||
216 | goto invalid_area; | ||
217 | |||
218 | if (ecr == ECR_COPROC_ABSENT && !do_cop_absent(insn)) | ||
219 | return; | ||
220 | |||
221 | spin_lock_irq(&undef_lock); | ||
222 | list_for_each_entry(hook, &undef_hook, node) { | ||
223 | if ((insn & hook->insn_mask) == hook->insn_val) { | ||
224 | if (hook->fn(regs, insn) == 0) { | ||
225 | spin_unlock_irq(&undef_lock); | ||
226 | return; | ||
227 | } | ||
228 | } | ||
229 | } | ||
230 | spin_unlock_irq(&undef_lock); | ||
231 | } | ||
232 | |||
233 | switch (ecr) { | ||
234 | case ECR_PRIVILEGE_VIOLATION: | ||
235 | code = ILL_PRVOPC; | ||
236 | break; | ||
237 | case ECR_COPROC_ABSENT: | ||
238 | code = ILL_COPROC; | ||
239 | break; | ||
240 | default: | ||
241 | code = ILL_ILLOPC; | ||
242 | break; | ||
243 | } | ||
244 | |||
245 | _exception(SIGILL, regs, code, regs->pc); | ||
246 | return; | ||
247 | |||
248 | invalid_area: | ||
249 | _exception(SIGSEGV, regs, SEGV_MAPERR, regs->pc); | ||
250 | } | ||
251 | |||
252 | asmlinkage void do_fpe(unsigned long ecr, struct pt_regs *regs) | ||
253 | { | ||
254 | /* We have no FPU yet */ | ||
255 | _exception(SIGILL, regs, ILL_COPROC, regs->pc); | ||
256 | } | ||
257 | |||
258 | |||
259 | void __init trap_init(void) | ||
260 | { | ||
261 | |||
262 | } | ||
diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S deleted file mode 100644 index 17f2730eb497..000000000000 --- a/arch/avr32/kernel/vmlinux.lds.S +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 linker script for the Linux kernel | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #define LOAD_OFFSET 0x00000000 | ||
11 | #include <asm-generic/vmlinux.lds.h> | ||
12 | #include <asm/cache.h> | ||
13 | #include <asm/thread_info.h> | ||
14 | |||
15 | OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") | ||
16 | OUTPUT_ARCH(avr32) | ||
17 | ENTRY(_start) | ||
18 | |||
19 | /* Big endian */ | ||
20 | jiffies = jiffies_64 + 4; | ||
21 | |||
22 | SECTIONS | ||
23 | { | ||
24 | . = CONFIG_ENTRY_ADDRESS; | ||
25 | .init : AT(ADDR(.init) - LOAD_OFFSET) { | ||
26 | _text = .; | ||
27 | __init_begin = .; | ||
28 | _sinittext = .; | ||
29 | *(.text.reset) | ||
30 | INIT_TEXT | ||
31 | /* | ||
32 | * .exit.text is discarded at runtime, not | ||
33 | * link time, to deal with references from | ||
34 | * __bug_table | ||
35 | */ | ||
36 | EXIT_TEXT | ||
37 | _einittext = .; | ||
38 | . = ALIGN(4); | ||
39 | __tagtable_begin = .; | ||
40 | *(.taglist.init) | ||
41 | __tagtable_end = .; | ||
42 | } | ||
43 | INIT_DATA_SECTION(16) | ||
44 | . = ALIGN(PAGE_SIZE); | ||
45 | __init_end = .; | ||
46 | |||
47 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | ||
48 | _evba = .; | ||
49 | _stext = .; | ||
50 | *(.ex.text) | ||
51 | *(.irq.text) | ||
52 | KPROBES_TEXT | ||
53 | TEXT_TEXT | ||
54 | SCHED_TEXT | ||
55 | CPUIDLE_TEXT | ||
56 | LOCK_TEXT | ||
57 | *(.fixup) | ||
58 | *(.gnu.warning) | ||
59 | _etext = .; | ||
60 | } = 0xd703d703 | ||
61 | |||
62 | EXCEPTION_TABLE(4) | ||
63 | RODATA | ||
64 | |||
65 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | ||
66 | _data = .; | ||
67 | _sdata = .; | ||
68 | |||
69 | INIT_TASK_DATA(THREAD_SIZE) | ||
70 | PAGE_ALIGNED_DATA(PAGE_SIZE); | ||
71 | CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) | ||
72 | *(.data.rel*) | ||
73 | DATA_DATA | ||
74 | CONSTRUCTORS | ||
75 | |||
76 | _edata = .; | ||
77 | } | ||
78 | |||
79 | BSS_SECTION(0, 8, 8) | ||
80 | _end = .; | ||
81 | |||
82 | DWARF_DEBUG | ||
83 | |||
84 | /* When something in the kernel is NOT compiled as a module, the module | ||
85 | * cleanup code and data are put into these segments. Both can then be | ||
86 | * thrown away, as cleanup code is never called unless it's a module. | ||
87 | */ | ||
88 | DISCARDS | ||
89 | } | ||
diff --git a/arch/avr32/lib/Makefile b/arch/avr32/lib/Makefile deleted file mode 100644 index 084d95bac5e7..000000000000 --- a/arch/avr32/lib/Makefile +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for AVR32-specific library files | ||
3 | # | ||
4 | |||
5 | lib-y := copy_user.o clear_user.o | ||
6 | lib-y += strncpy_from_user.o strnlen_user.o | ||
7 | lib-y += delay.o memset.o memcpy.o findbit.o | ||
8 | lib-y += csum_partial.o csum_partial_copy_generic.o | ||
9 | lib-y += io-readsw.o io-readsl.o io-writesw.o io-writesl.o | ||
10 | lib-y += io-readsb.o io-writesb.o | ||
11 | lib-y += __avr32_lsl64.o __avr32_lsr64.o __avr32_asr64.o | ||
diff --git a/arch/avr32/lib/__avr32_asr64.S b/arch/avr32/lib/__avr32_asr64.S deleted file mode 100644 index 368b6bca4c76..000000000000 --- a/arch/avr32/lib/__avr32_asr64.S +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * DWtype __avr32_asr64(DWtype u, word_type b) | ||
11 | */ | ||
12 | .text | ||
13 | .global __avr32_asr64 | ||
14 | .type __avr32_asr64,@function | ||
15 | __avr32_asr64: | ||
16 | cp.w r12, 0 | ||
17 | reteq r12 | ||
18 | |||
19 | rsub r9, r12, 32 | ||
20 | brle 1f | ||
21 | |||
22 | lsl r8, r11, r9 | ||
23 | lsr r10, r10, r12 | ||
24 | asr r11, r11, r12 | ||
25 | or r10, r8 | ||
26 | retal r12 | ||
27 | |||
28 | 1: neg r9 | ||
29 | asr r10, r11, r9 | ||
30 | asr r11, 31 | ||
31 | retal r12 | ||
diff --git a/arch/avr32/lib/__avr32_lsl64.S b/arch/avr32/lib/__avr32_lsl64.S deleted file mode 100644 index f1dbc2b36257..000000000000 --- a/arch/avr32/lib/__avr32_lsl64.S +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * DWtype __avr32_lsl64(DWtype u, word_type b) | ||
11 | */ | ||
12 | .text | ||
13 | .global __avr32_lsl64 | ||
14 | .type __avr32_lsl64,@function | ||
15 | __avr32_lsl64: | ||
16 | cp.w r12, 0 | ||
17 | reteq r12 | ||
18 | |||
19 | rsub r9, r12, 32 | ||
20 | brle 1f | ||
21 | |||
22 | lsr r8, r10, r9 | ||
23 | lsl r10, r10, r12 | ||
24 | lsl r11, r11, r12 | ||
25 | or r11, r8 | ||
26 | retal r12 | ||
27 | |||
28 | 1: neg r9 | ||
29 | lsl r11, r10, r9 | ||
30 | mov r10, 0 | ||
31 | retal r12 | ||
diff --git a/arch/avr32/lib/__avr32_lsr64.S b/arch/avr32/lib/__avr32_lsr64.S deleted file mode 100644 index e65bb7f0d24c..000000000000 --- a/arch/avr32/lib/__avr32_lsr64.S +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * DWtype __avr32_lsr64(DWtype u, word_type b) | ||
11 | */ | ||
12 | .text | ||
13 | .global __avr32_lsr64 | ||
14 | .type __avr32_lsr64,@function | ||
15 | __avr32_lsr64: | ||
16 | cp.w r12, 0 | ||
17 | reteq r12 | ||
18 | |||
19 | rsub r9, r12, 32 | ||
20 | brle 1f | ||
21 | |||
22 | lsl r8, r11, r9 | ||
23 | lsr r11, r11, r12 | ||
24 | lsr r10, r10, r12 | ||
25 | or r10, r8 | ||
26 | retal r12 | ||
27 | |||
28 | 1: neg r9 | ||
29 | lsr r10, r11, r9 | ||
30 | mov r11, 0 | ||
31 | retal r12 | ||
diff --git a/arch/avr32/lib/clear_user.S b/arch/avr32/lib/clear_user.S deleted file mode 100644 index d8991b6f8eb7..000000000000 --- a/arch/avr32/lib/clear_user.S +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <asm/page.h> | ||
9 | #include <asm/thread_info.h> | ||
10 | #include <asm/asm.h> | ||
11 | |||
12 | .text | ||
13 | .align 1 | ||
14 | .global clear_user | ||
15 | .type clear_user, "function" | ||
16 | clear_user: | ||
17 | branch_if_kernel r8, __clear_user | ||
18 | ret_if_privileged r8, r12, r11, r11 | ||
19 | |||
20 | .global __clear_user | ||
21 | .type __clear_user, "function" | ||
22 | __clear_user: | ||
23 | mov r9, r12 | ||
24 | mov r8, 0 | ||
25 | andl r9, 3, COH | ||
26 | brne 5f | ||
27 | |||
28 | 1: sub r11, 4 | ||
29 | brlt 2f | ||
30 | |||
31 | 10: st.w r12++, r8 | ||
32 | sub r11, 4 | ||
33 | brge 10b | ||
34 | |||
35 | 2: sub r11, -4 | ||
36 | reteq 0 | ||
37 | |||
38 | /* Unaligned count or address */ | ||
39 | bld r11, 1 | ||
40 | brcc 12f | ||
41 | 11: st.h r12++, r8 | ||
42 | sub r11, 2 | ||
43 | reteq 0 | ||
44 | 12: st.b r12++, r8 | ||
45 | retal 0 | ||
46 | |||
47 | /* Unaligned address */ | ||
48 | 5: cp.w r11, 4 | ||
49 | brlt 2b | ||
50 | |||
51 | lsl r9, 2 | ||
52 | add pc, pc, r9 | ||
53 | 13: st.b r12++, r8 | ||
54 | sub r11, 1 | ||
55 | 14: st.b r12++, r8 | ||
56 | sub r11, 1 | ||
57 | 15: st.b r12++, r8 | ||
58 | sub r11, 1 | ||
59 | rjmp 1b | ||
60 | |||
61 | .size clear_user, . - clear_user | ||
62 | .size __clear_user, . - __clear_user | ||
63 | |||
64 | .section .fixup, "ax" | ||
65 | .align 1 | ||
66 | 18: sub r11, -4 | ||
67 | 19: retal r11 | ||
68 | |||
69 | .section __ex_table, "a" | ||
70 | .align 2 | ||
71 | .long 10b, 18b | ||
72 | .long 11b, 19b | ||
73 | .long 12b, 19b | ||
74 | .long 13b, 19b | ||
75 | .long 14b, 19b | ||
76 | .long 15b, 19b | ||
diff --git a/arch/avr32/lib/copy_user.S b/arch/avr32/lib/copy_user.S deleted file mode 100644 index 075373471da1..000000000000 --- a/arch/avr32/lib/copy_user.S +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | /* | ||
2 | * Copy to/from userspace with optional address space checking. | ||
3 | * | ||
4 | * Copyright 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <asm/page.h> | ||
11 | #include <asm/thread_info.h> | ||
12 | #include <asm/asm.h> | ||
13 | |||
14 | /* | ||
15 | * __kernel_size_t | ||
16 | * __copy_user(void *to, const void *from, __kernel_size_t n) | ||
17 | * | ||
18 | * Returns the number of bytes not copied. Might be off by | ||
19 | * max 3 bytes if we get a fault in the main loop. | ||
20 | * | ||
21 | * The address-space checking functions simply fall through to | ||
22 | * the non-checking version. | ||
23 | */ | ||
24 | .text | ||
25 | .align 1 | ||
26 | .global ___copy_from_user | ||
27 | .type ___copy_from_user, @function | ||
28 | ___copy_from_user: | ||
29 | branch_if_kernel r8, __copy_user | ||
30 | ret_if_privileged r8, r11, r10, r10 | ||
31 | rjmp __copy_user | ||
32 | .size ___copy_from_user, . - ___copy_from_user | ||
33 | |||
34 | .global copy_to_user | ||
35 | .type copy_to_user, @function | ||
36 | copy_to_user: | ||
37 | branch_if_kernel r8, __copy_user | ||
38 | ret_if_privileged r8, r12, r10, r10 | ||
39 | .size copy_to_user, . - copy_to_user | ||
40 | |||
41 | .global __copy_user | ||
42 | .type __copy_user, @function | ||
43 | __copy_user: | ||
44 | mov r9, r11 | ||
45 | andl r9, 3, COH | ||
46 | brne 6f | ||
47 | |||
48 | /* At this point, from is word-aligned */ | ||
49 | 1: sub r10, 4 | ||
50 | brlt 3f | ||
51 | |||
52 | 2: | ||
53 | 10: ld.w r8, r11++ | ||
54 | 11: st.w r12++, r8 | ||
55 | sub r10, 4 | ||
56 | brge 2b | ||
57 | |||
58 | 3: sub r10, -4 | ||
59 | reteq 0 | ||
60 | |||
61 | /* | ||
62 | * Handle unaligned count. Need to be careful with r10 here so | ||
63 | * that we return the correct value even if we get a fault | ||
64 | */ | ||
65 | 4: | ||
66 | 20: ld.ub r8, r11++ | ||
67 | 21: st.b r12++, r8 | ||
68 | sub r10, 1 | ||
69 | reteq 0 | ||
70 | 22: ld.ub r8, r11++ | ||
71 | 23: st.b r12++, r8 | ||
72 | sub r10, 1 | ||
73 | reteq 0 | ||
74 | 24: ld.ub r8, r11++ | ||
75 | 25: st.b r12++, r8 | ||
76 | retal 0 | ||
77 | |||
78 | /* Handle unaligned from-pointer */ | ||
79 | 6: cp.w r10, 4 | ||
80 | brlt 4b | ||
81 | rsub r9, r9, 4 | ||
82 | |||
83 | 30: ld.ub r8, r11++ | ||
84 | 31: st.b r12++, r8 | ||
85 | sub r10, 1 | ||
86 | sub r9, 1 | ||
87 | breq 1b | ||
88 | 32: ld.ub r8, r11++ | ||
89 | 33: st.b r12++, r8 | ||
90 | sub r10, 1 | ||
91 | sub r9, 1 | ||
92 | breq 1b | ||
93 | 34: ld.ub r8, r11++ | ||
94 | 35: st.b r12++, r8 | ||
95 | sub r10, 1 | ||
96 | rjmp 1b | ||
97 | .size __copy_user, . - __copy_user | ||
98 | |||
99 | .section .fixup,"ax" | ||
100 | .align 1 | ||
101 | 19: sub r10, -4 | ||
102 | 29: retal r10 | ||
103 | |||
104 | .section __ex_table,"a" | ||
105 | .align 2 | ||
106 | .long 10b, 19b | ||
107 | .long 11b, 19b | ||
108 | .long 20b, 29b | ||
109 | .long 21b, 29b | ||
110 | .long 22b, 29b | ||
111 | .long 23b, 29b | ||
112 | .long 24b, 29b | ||
113 | .long 25b, 29b | ||
114 | .long 30b, 29b | ||
115 | .long 31b, 29b | ||
116 | .long 32b, 29b | ||
117 | .long 33b, 29b | ||
118 | .long 34b, 29b | ||
119 | .long 35b, 29b | ||
diff --git a/arch/avr32/lib/csum_partial.S b/arch/avr32/lib/csum_partial.S deleted file mode 100644 index 6a262b528eb7..000000000000 --- a/arch/avr32/lib/csum_partial.S +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * unsigned int csum_partial(const unsigned char *buff, | ||
11 | * int len, unsigned int sum) | ||
12 | */ | ||
13 | .text | ||
14 | .global csum_partial | ||
15 | .type csum_partial,"function" | ||
16 | .align 1 | ||
17 | csum_partial: | ||
18 | /* checksum complete words, aligned or not */ | ||
19 | 3: sub r11, 4 | ||
20 | brlt 5f | ||
21 | 4: ld.w r9, r12++ | ||
22 | add r10, r9 | ||
23 | acr r10 | ||
24 | sub r11, 4 | ||
25 | brge 4b | ||
26 | |||
27 | /* return if we had a whole number of words */ | ||
28 | 5: sub r11, -4 | ||
29 | reteq r10 | ||
30 | |||
31 | /* checksum any remaining bytes at the end */ | ||
32 | mov r9, 0 | ||
33 | mov r8, 0 | ||
34 | cp r11, 2 | ||
35 | brlt 6f | ||
36 | ld.uh r9, r12++ | ||
37 | sub r11, 2 | ||
38 | breq 7f | ||
39 | lsl r9, 16 | ||
40 | 6: ld.ub r8, r12++ | ||
41 | lsl r8, 8 | ||
42 | 7: or r9, r8 | ||
43 | add r10, r9 | ||
44 | acr r10 | ||
45 | |||
46 | retal r10 | ||
47 | .size csum_partial, . - csum_partial | ||
diff --git a/arch/avr32/lib/csum_partial_copy_generic.S b/arch/avr32/lib/csum_partial_copy_generic.S deleted file mode 100644 index a3a0f9b8929c..000000000000 --- a/arch/avr32/lib/csum_partial_copy_generic.S +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <asm/errno.h> | ||
9 | #include <asm/asm.h> | ||
10 | |||
11 | /* | ||
12 | * unsigned int csum_partial_copy_generic(const char *src, char *dst, int len | ||
13 | * int sum, int *src_err_ptr, | ||
14 | * int *dst_err_ptr) | ||
15 | * | ||
16 | * Copy src to dst while checksumming, otherwise like csum_partial. | ||
17 | */ | ||
18 | |||
19 | .macro ld_src size, reg, ptr | ||
20 | 9999: ld.\size \reg, \ptr | ||
21 | .section __ex_table, "a" | ||
22 | .long 9999b, fixup_ld_src | ||
23 | .previous | ||
24 | .endm | ||
25 | |||
26 | .macro st_dst size, ptr, reg | ||
27 | 9999: st.\size \ptr, \reg | ||
28 | .section __ex_table, "a" | ||
29 | .long 9999b, fixup_st_dst | ||
30 | .previous | ||
31 | .endm | ||
32 | |||
33 | .text | ||
34 | .global csum_partial_copy_generic | ||
35 | .type csum_partial_copy_generic,"function" | ||
36 | .align 1 | ||
37 | csum_partial_copy_generic: | ||
38 | pushm r4-r7,lr | ||
39 | |||
40 | /* The inner loop */ | ||
41 | 1: sub r10, 4 | ||
42 | brlt 5f | ||
43 | 2: ld_src w, r5, r12++ | ||
44 | st_dst w, r11++, r5 | ||
45 | add r9, r5 | ||
46 | acr r9 | ||
47 | sub r10, 4 | ||
48 | brge 2b | ||
49 | |||
50 | /* return if we had a whole number of words */ | ||
51 | 5: sub r10, -4 | ||
52 | brne 7f | ||
53 | |||
54 | 6: mov r12, r9 | ||
55 | popm r4-r7,pc | ||
56 | |||
57 | /* handle additional bytes at the tail */ | ||
58 | 7: mov r5, 0 | ||
59 | mov r4, 32 | ||
60 | 8: ld_src ub, r6, r12++ | ||
61 | st_dst b, r11++, r6 | ||
62 | lsl r5, 8 | ||
63 | sub r4, 8 | ||
64 | bfins r5, r6, 0, 8 | ||
65 | sub r10, 1 | ||
66 | brne 8b | ||
67 | |||
68 | lsl r5, r5, r4 | ||
69 | add r9, r5 | ||
70 | acr r9 | ||
71 | rjmp 6b | ||
72 | |||
73 | /* Exception handler */ | ||
74 | .section .fixup,"ax" | ||
75 | .align 1 | ||
76 | fixup_ld_src: | ||
77 | mov r9, -EFAULT | ||
78 | cp.w r8, 0 | ||
79 | breq 1f | ||
80 | st.w r8[0], r9 | ||
81 | |||
82 | 1: /* | ||
83 | * TODO: zero the complete destination - computing the rest | ||
84 | * is too much work | ||
85 | */ | ||
86 | |||
87 | mov r9, 0 | ||
88 | rjmp 6b | ||
89 | |||
90 | fixup_st_dst: | ||
91 | mov r9, -EFAULT | ||
92 | lddsp r8, sp[20] | ||
93 | cp.w r8, 0 | ||
94 | breq 1f | ||
95 | st.w r8[0], r9 | ||
96 | 1: mov r9, 0 | ||
97 | rjmp 6b | ||
98 | |||
99 | .previous | ||
diff --git a/arch/avr32/lib/delay.c b/arch/avr32/lib/delay.c deleted file mode 100644 index c2f4a07dcda1..000000000000 --- a/arch/avr32/lib/delay.c +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * Precise Delay Loops for avr32 | ||
3 | * | ||
4 | * Copyright (C) 1993 Linus Torvalds | ||
5 | * Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz> | ||
6 | * Copyright (C) 2005-2006 Atmel Corporation | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/delay.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/timex.h> | ||
16 | #include <linux/param.h> | ||
17 | #include <linux/types.h> | ||
18 | #include <linux/init.h> | ||
19 | |||
20 | #include <asm/processor.h> | ||
21 | #include <asm/sysreg.h> | ||
22 | |||
23 | int read_current_timer(unsigned long *timer_value) | ||
24 | { | ||
25 | *timer_value = sysreg_read(COUNT); | ||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | void __delay(unsigned long loops) | ||
30 | { | ||
31 | unsigned bclock, now; | ||
32 | |||
33 | bclock = sysreg_read(COUNT); | ||
34 | do { | ||
35 | now = sysreg_read(COUNT); | ||
36 | } while ((now - bclock) < loops); | ||
37 | } | ||
38 | |||
39 | inline void __const_udelay(unsigned long xloops) | ||
40 | { | ||
41 | unsigned long long loops; | ||
42 | |||
43 | asm("mulu.d %0, %1, %2" | ||
44 | : "=r"(loops) | ||
45 | : "r"(current_cpu_data.loops_per_jiffy * HZ), "r"(xloops)); | ||
46 | __delay(loops >> 32); | ||
47 | } | ||
48 | |||
49 | void __udelay(unsigned long usecs) | ||
50 | { | ||
51 | __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */ | ||
52 | } | ||
53 | |||
54 | void __ndelay(unsigned long nsecs) | ||
55 | { | ||
56 | __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */ | ||
57 | } | ||
diff --git a/arch/avr32/lib/findbit.S b/arch/avr32/lib/findbit.S deleted file mode 100644 index b93586460be6..000000000000 --- a/arch/avr32/lib/findbit.S +++ /dev/null | |||
@@ -1,185 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/linkage.h> | ||
9 | |||
10 | .text | ||
11 | /* | ||
12 | * unsigned long find_first_zero_bit(const unsigned long *addr, | ||
13 | * unsigned long size) | ||
14 | */ | ||
15 | ENTRY(find_first_zero_bit) | ||
16 | cp.w r11, 0 | ||
17 | reteq r11 | ||
18 | mov r9, r11 | ||
19 | 1: ld.w r8, r12[0] | ||
20 | com r8 | ||
21 | brne .L_found | ||
22 | sub r12, -4 | ||
23 | sub r9, 32 | ||
24 | brgt 1b | ||
25 | retal r11 | ||
26 | |||
27 | /* | ||
28 | * unsigned long find_next_zero_bit(const unsigned long *addr, | ||
29 | * unsigned long size, | ||
30 | * unsigned long offset) | ||
31 | */ | ||
32 | ENTRY(find_next_zero_bit) | ||
33 | lsr r8, r10, 5 | ||
34 | sub r9, r11, r10 | ||
35 | retle r11 | ||
36 | |||
37 | lsl r8, 2 | ||
38 | add r12, r8 | ||
39 | andl r10, 31, COH | ||
40 | breq 1f | ||
41 | |||
42 | /* offset is not word-aligned. Handle the first (32 - r10) bits */ | ||
43 | ld.w r8, r12[0] | ||
44 | com r8 | ||
45 | sub r12, -4 | ||
46 | lsr r8, r8, r10 | ||
47 | brne .L_found | ||
48 | |||
49 | /* r9 = r9 - (32 - r10) = r9 + r10 - 32 */ | ||
50 | add r9, r10 | ||
51 | sub r9, 32 | ||
52 | retle r11 | ||
53 | |||
54 | /* Main loop. offset must be word-aligned */ | ||
55 | 1: ld.w r8, r12[0] | ||
56 | com r8 | ||
57 | brne .L_found | ||
58 | sub r12, -4 | ||
59 | sub r9, 32 | ||
60 | brgt 1b | ||
61 | retal r11 | ||
62 | |||
63 | /* Common return path for when a bit is actually found. */ | ||
64 | .L_found: | ||
65 | brev r8 | ||
66 | clz r10, r8 | ||
67 | rsub r9, r11 | ||
68 | add r10, r9 | ||
69 | |||
70 | /* XXX: If we don't have to return exactly "size" when the bit | ||
71 | is not found, we may drop this "min" thing */ | ||
72 | min r12, r11, r10 | ||
73 | retal r12 | ||
74 | |||
75 | /* | ||
76 | * unsigned long find_first_bit(const unsigned long *addr, | ||
77 | * unsigned long size) | ||
78 | */ | ||
79 | ENTRY(find_first_bit) | ||
80 | cp.w r11, 0 | ||
81 | reteq r11 | ||
82 | mov r9, r11 | ||
83 | 1: ld.w r8, r12[0] | ||
84 | cp.w r8, 0 | ||
85 | brne .L_found | ||
86 | sub r12, -4 | ||
87 | sub r9, 32 | ||
88 | brgt 1b | ||
89 | retal r11 | ||
90 | |||
91 | /* | ||
92 | * unsigned long find_next_bit(const unsigned long *addr, | ||
93 | * unsigned long size, | ||
94 | * unsigned long offset) | ||
95 | */ | ||
96 | ENTRY(find_next_bit) | ||
97 | lsr r8, r10, 5 | ||
98 | sub r9, r11, r10 | ||
99 | retle r11 | ||
100 | |||
101 | lsl r8, 2 | ||
102 | add r12, r8 | ||
103 | andl r10, 31, COH | ||
104 | breq 1f | ||
105 | |||
106 | /* offset is not word-aligned. Handle the first (32 - r10) bits */ | ||
107 | ld.w r8, r12[0] | ||
108 | sub r12, -4 | ||
109 | lsr r8, r8, r10 | ||
110 | brne .L_found | ||
111 | |||
112 | /* r9 = r9 - (32 - r10) = r9 + r10 - 32 */ | ||
113 | add r9, r10 | ||
114 | sub r9, 32 | ||
115 | retle r11 | ||
116 | |||
117 | /* Main loop. offset must be word-aligned */ | ||
118 | 1: ld.w r8, r12[0] | ||
119 | cp.w r8, 0 | ||
120 | brne .L_found | ||
121 | sub r12, -4 | ||
122 | sub r9, 32 | ||
123 | brgt 1b | ||
124 | retal r11 | ||
125 | |||
126 | ENTRY(find_next_bit_le) | ||
127 | lsr r8, r10, 5 | ||
128 | sub r9, r11, r10 | ||
129 | retle r11 | ||
130 | |||
131 | lsl r8, 2 | ||
132 | add r12, r8 | ||
133 | andl r10, 31, COH | ||
134 | breq 1f | ||
135 | |||
136 | /* offset is not word-aligned. Handle the first (32 - r10) bits */ | ||
137 | ldswp.w r8, r12[0] | ||
138 | sub r12, -4 | ||
139 | lsr r8, r8, r10 | ||
140 | brne .L_found | ||
141 | |||
142 | /* r9 = r9 - (32 - r10) = r9 + r10 - 32 */ | ||
143 | add r9, r10 | ||
144 | sub r9, 32 | ||
145 | retle r11 | ||
146 | |||
147 | /* Main loop. offset must be word-aligned */ | ||
148 | 1: ldswp.w r8, r12[0] | ||
149 | cp.w r8, 0 | ||
150 | brne .L_found | ||
151 | sub r12, -4 | ||
152 | sub r9, 32 | ||
153 | brgt 1b | ||
154 | retal r11 | ||
155 | |||
156 | ENTRY(find_next_zero_bit_le) | ||
157 | lsr r8, r10, 5 | ||
158 | sub r9, r11, r10 | ||
159 | retle r11 | ||
160 | |||
161 | lsl r8, 2 | ||
162 | add r12, r8 | ||
163 | andl r10, 31, COH | ||
164 | breq 1f | ||
165 | |||
166 | /* offset is not word-aligned. Handle the first (32 - r10) bits */ | ||
167 | ldswp.w r8, r12[0] | ||
168 | sub r12, -4 | ||
169 | com r8 | ||
170 | lsr r8, r8, r10 | ||
171 | brne .L_found | ||
172 | |||
173 | /* r9 = r9 - (32 - r10) = r9 + r10 - 32 */ | ||
174 | add r9, r10 | ||
175 | sub r9, 32 | ||
176 | retle r11 | ||
177 | |||
178 | /* Main loop. offset must be word-aligned */ | ||
179 | 1: ldswp.w r8, r12[0] | ||
180 | com r8 | ||
181 | brne .L_found | ||
182 | sub r12, -4 | ||
183 | sub r9, 32 | ||
184 | brgt 1b | ||
185 | retal r11 | ||
diff --git a/arch/avr32/lib/io-readsb.S b/arch/avr32/lib/io-readsb.S deleted file mode 100644 index cb2d86945559..000000000000 --- a/arch/avr32/lib/io-readsb.S +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | .text | ||
10 | .Lnot_word_aligned: | ||
11 | 1: ld.ub r8, r12[0] | ||
12 | sub r10, 1 | ||
13 | st.b r11++, r8 | ||
14 | reteq r12 | ||
15 | tst r11, r9 | ||
16 | brne 1b | ||
17 | |||
18 | /* fall through */ | ||
19 | |||
20 | .global __raw_readsb | ||
21 | .type __raw_readsb,@function | ||
22 | __raw_readsb: | ||
23 | cp.w r10, 0 | ||
24 | mov r9, 3 | ||
25 | reteq r12 | ||
26 | |||
27 | tst r11, r9 | ||
28 | brne .Lnot_word_aligned | ||
29 | |||
30 | sub r10, 4 | ||
31 | brlt 2f | ||
32 | |||
33 | 1: ldins.b r8:t, r12[0] | ||
34 | ldins.b r8:u, r12[0] | ||
35 | ldins.b r8:l, r12[0] | ||
36 | ldins.b r8:b, r12[0] | ||
37 | st.w r11++, r8 | ||
38 | sub r10, 4 | ||
39 | brge 1b | ||
40 | |||
41 | 2: sub r10, -4 | ||
42 | reteq r12 | ||
43 | |||
44 | 3: ld.ub r8, r12[0] | ||
45 | sub r10, 1 | ||
46 | st.b r11++, r8 | ||
47 | brne 3b | ||
48 | |||
49 | retal r12 | ||
diff --git a/arch/avr32/lib/io-readsl.S b/arch/avr32/lib/io-readsl.S deleted file mode 100644 index b103511ed6c4..000000000000 --- a/arch/avr32/lib/io-readsl.S +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | .global __raw_readsl | ||
10 | .type __raw_readsl,@function | ||
11 | __raw_readsl: | ||
12 | cp.w r10, 0 | ||
13 | reteq r12 | ||
14 | |||
15 | /* | ||
16 | * If r11 isn't properly aligned, we might get an exception on | ||
17 | * some implementations. But there's not much we can do about it. | ||
18 | */ | ||
19 | 1: ld.w r8, r12[0] | ||
20 | sub r10, 1 | ||
21 | st.w r11++, r8 | ||
22 | brne 1b | ||
23 | |||
24 | retal r12 | ||
diff --git a/arch/avr32/lib/io-readsw.S b/arch/avr32/lib/io-readsw.S deleted file mode 100644 index 456be9909027..000000000000 --- a/arch/avr32/lib/io-readsw.S +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | .Lnot_word_aligned: | ||
10 | /* | ||
11 | * Bad alignment will cause a hardware exception, which is as | ||
12 | * good as anything. No need for us to check for proper alignment. | ||
13 | */ | ||
14 | ld.uh r8, r12[0] | ||
15 | sub r10, 1 | ||
16 | st.h r11++, r8 | ||
17 | |||
18 | /* fall through */ | ||
19 | |||
20 | .global __raw_readsw | ||
21 | .type __raw_readsw,@function | ||
22 | __raw_readsw: | ||
23 | cp.w r10, 0 | ||
24 | reteq r12 | ||
25 | mov r9, 3 | ||
26 | tst r11, r9 | ||
27 | brne .Lnot_word_aligned | ||
28 | |||
29 | sub r10, 2 | ||
30 | brlt 2f | ||
31 | |||
32 | 1: ldins.h r8:t, r12[0] | ||
33 | ldins.h r8:b, r12[0] | ||
34 | st.w r11++, r8 | ||
35 | sub r10, 2 | ||
36 | brge 1b | ||
37 | |||
38 | 2: sub r10, -2 | ||
39 | reteq r12 | ||
40 | |||
41 | ld.uh r8, r12[0] | ||
42 | st.h r11++, r8 | ||
43 | retal r12 | ||
diff --git a/arch/avr32/lib/io-writesb.S b/arch/avr32/lib/io-writesb.S deleted file mode 100644 index b4ebaacccf68..000000000000 --- a/arch/avr32/lib/io-writesb.S +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | .text | ||
10 | .Lnot_word_aligned: | ||
11 | 1: ld.ub r8, r11++ | ||
12 | sub r10, 1 | ||
13 | st.b r12[0], r8 | ||
14 | reteq r12 | ||
15 | tst r11, r9 | ||
16 | brne 1b | ||
17 | |||
18 | /* fall through */ | ||
19 | |||
20 | .global __raw_writesb | ||
21 | .type __raw_writesb,@function | ||
22 | __raw_writesb: | ||
23 | cp.w r10, 0 | ||
24 | mov r9, 3 | ||
25 | reteq r12 | ||
26 | |||
27 | tst r11, r9 | ||
28 | brne .Lnot_word_aligned | ||
29 | |||
30 | sub r10, 4 | ||
31 | brlt 2f | ||
32 | |||
33 | 1: ld.w r8, r11++ | ||
34 | bfextu r9, r8, 24, 8 | ||
35 | st.b r12[0], r9 | ||
36 | bfextu r9, r8, 16, 8 | ||
37 | st.b r12[0], r9 | ||
38 | bfextu r9, r8, 8, 8 | ||
39 | st.b r12[0], r9 | ||
40 | st.b r12[0], r8 | ||
41 | sub r10, 4 | ||
42 | brge 1b | ||
43 | |||
44 | 2: sub r10, -4 | ||
45 | reteq r12 | ||
46 | |||
47 | 3: ld.ub r8, r11++ | ||
48 | sub r10, 1 | ||
49 | st.b r12[0], r8 | ||
50 | brne 3b | ||
51 | |||
52 | retal r12 | ||
diff --git a/arch/avr32/lib/io-writesl.S b/arch/avr32/lib/io-writesl.S deleted file mode 100644 index 22138b3a16e5..000000000000 --- a/arch/avr32/lib/io-writesl.S +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | .global __raw_writesl | ||
10 | .type __raw_writesl,@function | ||
11 | __raw_writesl: | ||
12 | cp.w r10, 0 | ||
13 | reteq r12 | ||
14 | |||
15 | 1: ld.w r8, r11++ | ||
16 | sub r10, 1 | ||
17 | st.w r12[0], r8 | ||
18 | brne 1b | ||
19 | |||
20 | retal r12 | ||
diff --git a/arch/avr32/lib/io-writesw.S b/arch/avr32/lib/io-writesw.S deleted file mode 100644 index 8c4a53f1c52a..000000000000 --- a/arch/avr32/lib/io-writesw.S +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | .Lnot_word_aligned: | ||
10 | ld.uh r8, r11++ | ||
11 | sub r10, 1 | ||
12 | st.h r12[0], r8 | ||
13 | |||
14 | .global __raw_writesw | ||
15 | .type __raw_writesw,@function | ||
16 | __raw_writesw: | ||
17 | cp.w r10, 0 | ||
18 | mov r9, 3 | ||
19 | reteq r12 | ||
20 | tst r11, r9 | ||
21 | brne .Lnot_word_aligned | ||
22 | |||
23 | sub r10, 2 | ||
24 | brlt 2f | ||
25 | |||
26 | 1: ld.w r8, r11++ | ||
27 | bfextu r9, r8, 16, 16 | ||
28 | st.h r12[0], r9 | ||
29 | st.h r12[0], r8 | ||
30 | sub r10, 2 | ||
31 | brge 1b | ||
32 | |||
33 | 2: sub r10, -2 | ||
34 | reteq r12 | ||
35 | |||
36 | ld.uh r8, r11++ | ||
37 | st.h r12[0], r8 | ||
38 | retal r12 | ||
diff --git a/arch/avr32/lib/memcpy.S b/arch/avr32/lib/memcpy.S deleted file mode 100644 index c2ca49d705af..000000000000 --- a/arch/avr32/lib/memcpy.S +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * void *memcpy(void *to, const void *from, unsigned long n) | ||
11 | * | ||
12 | * This implementation does word-aligned loads in the main loop, | ||
13 | * possibly sacrificing alignment of stores. | ||
14 | * | ||
15 | * Hopefully, in most cases, both "to" and "from" will be | ||
16 | * word-aligned to begin with. | ||
17 | */ | ||
18 | .text | ||
19 | .global memcpy | ||
20 | .type memcpy, @function | ||
21 | memcpy: | ||
22 | mov r9, r11 | ||
23 | andl r9, 3, COH | ||
24 | brne 1f | ||
25 | |||
26 | /* At this point, "from" is word-aligned */ | ||
27 | 2: mov r9, r12 | ||
28 | 5: sub r10, 4 | ||
29 | brlt 4f | ||
30 | |||
31 | 3: ld.w r8, r11++ | ||
32 | sub r10, 4 | ||
33 | st.w r12++, r8 | ||
34 | brge 3b | ||
35 | |||
36 | 4: neg r10 | ||
37 | reteq r9 | ||
38 | |||
39 | /* Handle unaligned count */ | ||
40 | lsl r10, 2 | ||
41 | add pc, pc, r10 | ||
42 | ld.ub r8, r11++ | ||
43 | st.b r12++, r8 | ||
44 | ld.ub r8, r11++ | ||
45 | st.b r12++, r8 | ||
46 | ld.ub r8, r11++ | ||
47 | st.b r12++, r8 | ||
48 | retal r9 | ||
49 | |||
50 | /* Handle unaligned "from" pointer */ | ||
51 | 1: sub r10, 4 | ||
52 | movlt r9, r12 | ||
53 | brlt 4b | ||
54 | add r10, r9 | ||
55 | lsl r9, 2 | ||
56 | add pc, pc, r9 | ||
57 | ld.ub r8, r11++ | ||
58 | st.b r12++, r8 | ||
59 | ld.ub r8, r11++ | ||
60 | st.b r12++, r8 | ||
61 | ld.ub r8, r11++ | ||
62 | st.b r12++, r8 | ||
63 | mov r8, r12 | ||
64 | add pc, pc, r9 | ||
65 | sub r8, 1 | ||
66 | nop | ||
67 | sub r8, 1 | ||
68 | nop | ||
69 | sub r8, 1 | ||
70 | nop | ||
71 | mov r9, r8 | ||
72 | rjmp 5b | ||
diff --git a/arch/avr32/lib/memset.S b/arch/avr32/lib/memset.S deleted file mode 100644 index 40da32c0480c..000000000000 --- a/arch/avr32/lib/memset.S +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * Based on linux/arch/arm/lib/memset.S | ||
5 | * Copyright (C) 1995-2000 Russell King | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * ASM optimised string functions | ||
12 | */ | ||
13 | #include <asm/asm.h> | ||
14 | |||
15 | /* | ||
16 | * r12: void *b | ||
17 | * r11: int c | ||
18 | * r10: size_t len | ||
19 | * | ||
20 | * Returns b in r12 | ||
21 | */ | ||
22 | .text | ||
23 | .global memset | ||
24 | .type memset, @function | ||
25 | .align 5 | ||
26 | memset: | ||
27 | mov r9, r12 | ||
28 | mov r8, r12 | ||
29 | or r11, r11, r11 << 8 | ||
30 | andl r9, 3, COH | ||
31 | brne 1f | ||
32 | |||
33 | 2: or r11, r11, r11 << 16 | ||
34 | sub r10, 4 | ||
35 | brlt 5f | ||
36 | |||
37 | /* Let's do some real work */ | ||
38 | 4: st.w r8++, r11 | ||
39 | sub r10, 4 | ||
40 | brge 4b | ||
41 | |||
42 | /* | ||
43 | * When we get here, we've got less than 4 bytes to set. r10 | ||
44 | * might be negative. | ||
45 | */ | ||
46 | 5: sub r10, -4 | ||
47 | reteq r12 | ||
48 | |||
49 | /* Fastpath ends here, exactly 32 bytes from memset */ | ||
50 | |||
51 | /* Handle unaligned count or pointer */ | ||
52 | bld r10, 1 | ||
53 | brcc 6f | ||
54 | st.b r8++, r11 | ||
55 | st.b r8++, r11 | ||
56 | bld r10, 0 | ||
57 | retcc r12 | ||
58 | 6: st.b r8++, r11 | ||
59 | retal r12 | ||
60 | |||
61 | /* Handle unaligned pointer */ | ||
62 | 1: sub r10, 4 | ||
63 | brlt 5b | ||
64 | add r10, r9 | ||
65 | lsl r9, 1 | ||
66 | add pc, r9 | ||
67 | st.b r8++, r11 | ||
68 | st.b r8++, r11 | ||
69 | st.b r8++, r11 | ||
70 | rjmp 2b | ||
71 | |||
72 | .size memset, . - memset | ||
diff --git a/arch/avr32/lib/strncpy_from_user.S b/arch/avr32/lib/strncpy_from_user.S deleted file mode 100644 index 72bd50599ec6..000000000000 --- a/arch/avr32/lib/strncpy_from_user.S +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * Copy to/from userspace with optional address space checking. | ||
3 | * | ||
4 | * Copyright 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/errno.h> | ||
11 | |||
12 | #include <asm/page.h> | ||
13 | #include <asm/thread_info.h> | ||
14 | #include <asm/asm.h> | ||
15 | |||
16 | /* | ||
17 | * long strncpy_from_user(char *dst, const char *src, long count) | ||
18 | * | ||
19 | * On success, returns the length of the string, not including | ||
20 | * the terminating NUL. | ||
21 | * | ||
22 | * If the string is longer than count, returns count | ||
23 | * | ||
24 | * If userspace access fails, returns -EFAULT | ||
25 | */ | ||
26 | .text | ||
27 | .align 1 | ||
28 | .global strncpy_from_user | ||
29 | .type strncpy_from_user, "function" | ||
30 | strncpy_from_user: | ||
31 | mov r9, -EFAULT | ||
32 | branch_if_kernel r8, __strncpy_from_user | ||
33 | ret_if_privileged r8, r11, r10, r9 | ||
34 | |||
35 | .global __strncpy_from_user | ||
36 | .type __strncpy_from_user, "function" | ||
37 | __strncpy_from_user: | ||
38 | cp.w r10, 0 | ||
39 | reteq 0 | ||
40 | |||
41 | mov r9, r10 | ||
42 | |||
43 | 1: ld.ub r8, r11++ | ||
44 | st.b r12++, r8 | ||
45 | cp.w r8, 0 | ||
46 | breq 2f | ||
47 | sub r9, 1 | ||
48 | brne 1b | ||
49 | |||
50 | 2: sub r10, r9 | ||
51 | retal r10 | ||
52 | |||
53 | .section .fixup, "ax" | ||
54 | .align 1 | ||
55 | 3: mov r12, -EFAULT | ||
56 | retal r12 | ||
57 | |||
58 | .section __ex_table, "a" | ||
59 | .align 2 | ||
60 | .long 1b, 3b | ||
diff --git a/arch/avr32/lib/strnlen_user.S b/arch/avr32/lib/strnlen_user.S deleted file mode 100644 index e46f4724962b..000000000000 --- a/arch/avr32/lib/strnlen_user.S +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* | ||
2 | * Copy to/from userspace with optional address space checking. | ||
3 | * | ||
4 | * Copyright 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <asm/page.h> | ||
11 | #include <asm/thread_info.h> | ||
12 | #include <asm/processor.h> | ||
13 | #include <asm/asm.h> | ||
14 | |||
15 | .text | ||
16 | .align 1 | ||
17 | .global strnlen_user | ||
18 | .type strnlen_user, "function" | ||
19 | strnlen_user: | ||
20 | branch_if_kernel r8, __strnlen_user | ||
21 | sub r8, r11, 1 | ||
22 | add r8, r12 | ||
23 | retcs 0 | ||
24 | brmi adjust_length /* do a closer inspection */ | ||
25 | |||
26 | .global __strnlen_user | ||
27 | .type __strnlen_user, "function" | ||
28 | __strnlen_user: | ||
29 | mov r10, r12 | ||
30 | |||
31 | 10: ld.ub r8, r12++ | ||
32 | cp.w r8, 0 | ||
33 | breq 2f | ||
34 | sub r11, 1 | ||
35 | brne 10b | ||
36 | |||
37 | sub r12, -1 | ||
38 | 2: sub r12, r10 | ||
39 | retal r12 | ||
40 | |||
41 | |||
42 | .type adjust_length, "function" | ||
43 | adjust_length: | ||
44 | cp.w r12, 0 /* addr must always be < TASK_SIZE */ | ||
45 | retmi 0 | ||
46 | |||
47 | pushm lr | ||
48 | lddpc lr, _task_size | ||
49 | sub r11, lr, r12 | ||
50 | mov r9, r11 | ||
51 | call __strnlen_user | ||
52 | cp.w r12, r9 | ||
53 | brgt 1f | ||
54 | popm pc | ||
55 | 1: popm pc, r12=0 | ||
56 | |||
57 | .align 2 | ||
58 | _task_size: | ||
59 | .long TASK_SIZE | ||
60 | |||
61 | .section .fixup, "ax" | ||
62 | .align 1 | ||
63 | 19: retal 0 | ||
64 | |||
65 | .section __ex_table, "a" | ||
66 | .align 2 | ||
67 | .long 10b, 19b | ||
diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig deleted file mode 100644 index a7bbcc82058e..000000000000 --- a/arch/avr32/mach-at32ap/Kconfig +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | if PLATFORM_AT32AP | ||
2 | |||
3 | menu "Atmel AVR32 AP options" | ||
4 | |||
5 | choice | ||
6 | prompt "AT32AP700x static memory bus width" | ||
7 | depends on CPU_AT32AP700X | ||
8 | default AP700X_16_BIT_SMC | ||
9 | help | ||
10 | Define the width of the AP7000 external static memory interface. | ||
11 | This is used to determine how to mangle the address and/or data | ||
12 | when doing little-endian port access. | ||
13 | |||
14 | The current code can only support a single external memory bus | ||
15 | width for all chip selects, excluding the flash (which is using | ||
16 | raw access and is thus not affected by any of this.) | ||
17 | |||
18 | config AP700X_32_BIT_SMC | ||
19 | bool "32 bit" | ||
20 | |||
21 | config AP700X_16_BIT_SMC | ||
22 | bool "16 bit" | ||
23 | |||
24 | config AP700X_8_BIT_SMC | ||
25 | bool "8 bit" | ||
26 | |||
27 | endchoice | ||
28 | |||
29 | endmenu | ||
30 | |||
31 | endif # PLATFORM_AT32AP | ||
diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile deleted file mode 100644 index fc09ec4bc725..000000000000 --- a/arch/avr32/mach-at32ap/Makefile +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | obj-y += pdc.o clock.o intc.o extint.o pio.o hsmc.o | ||
2 | obj-y += hmatrix.o | ||
3 | obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o pm-at32ap700x.o | ||
4 | obj-$(CONFIG_PM) += pm.o | ||
5 | |||
6 | ifeq ($(CONFIG_PM_DEBUG),y) | ||
7 | CFLAGS_pm.o += -DDEBUG | ||
8 | endif | ||
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c deleted file mode 100644 index 00d6dcc1d9b6..000000000000 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ /dev/null | |||
@@ -1,2368 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/clk.h> | ||
9 | #include <linux/delay.h> | ||
10 | #include <linux/platform_data/dma-dw.h> | ||
11 | #include <linux/fb.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/dma-mapping.h> | ||
15 | #include <linux/slab.h> | ||
16 | #include <linux/gpio.h> | ||
17 | #include <linux/spi/spi.h> | ||
18 | #include <linux/usb/atmel_usba_udc.h> | ||
19 | |||
20 | #include <linux/atmel-mci.h> | ||
21 | |||
22 | #include <asm/io.h> | ||
23 | #include <asm/irq.h> | ||
24 | |||
25 | #include <mach/at32ap700x.h> | ||
26 | #include <mach/board.h> | ||
27 | #include <mach/hmatrix.h> | ||
28 | #include <mach/portmux.h> | ||
29 | #include <mach/sram.h> | ||
30 | |||
31 | #include <sound/atmel-abdac.h> | ||
32 | #include <sound/atmel-ac97c.h> | ||
33 | |||
34 | #include <video/atmel_lcdc.h> | ||
35 | |||
36 | #include "clock.h" | ||
37 | #include "pio.h" | ||
38 | #include "pm.h" | ||
39 | |||
40 | |||
41 | #define PBMEM(base) \ | ||
42 | { \ | ||
43 | .start = base, \ | ||
44 | .end = base + 0x3ff, \ | ||
45 | .flags = IORESOURCE_MEM, \ | ||
46 | } | ||
47 | #define IRQ(num) \ | ||
48 | { \ | ||
49 | .start = num, \ | ||
50 | .end = num, \ | ||
51 | .flags = IORESOURCE_IRQ, \ | ||
52 | } | ||
53 | #define NAMED_IRQ(num, _name) \ | ||
54 | { \ | ||
55 | .start = num, \ | ||
56 | .end = num, \ | ||
57 | .name = _name, \ | ||
58 | .flags = IORESOURCE_IRQ, \ | ||
59 | } | ||
60 | |||
61 | /* REVISIT these assume *every* device supports DMA, but several | ||
62 | * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. | ||
63 | */ | ||
64 | #define DEFINE_DEV(_name, _id) \ | ||
65 | static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \ | ||
66 | static struct platform_device _name##_id##_device = { \ | ||
67 | .name = #_name, \ | ||
68 | .id = _id, \ | ||
69 | .dev = { \ | ||
70 | .dma_mask = &_name##_id##_dma_mask, \ | ||
71 | .coherent_dma_mask = DMA_BIT_MASK(32), \ | ||
72 | }, \ | ||
73 | .resource = _name##_id##_resource, \ | ||
74 | .num_resources = ARRAY_SIZE(_name##_id##_resource), \ | ||
75 | } | ||
76 | #define DEFINE_DEV_DATA(_name, _id) \ | ||
77 | static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \ | ||
78 | static struct platform_device _name##_id##_device = { \ | ||
79 | .name = #_name, \ | ||
80 | .id = _id, \ | ||
81 | .dev = { \ | ||
82 | .dma_mask = &_name##_id##_dma_mask, \ | ||
83 | .platform_data = &_name##_id##_data, \ | ||
84 | .coherent_dma_mask = DMA_BIT_MASK(32), \ | ||
85 | }, \ | ||
86 | .resource = _name##_id##_resource, \ | ||
87 | .num_resources = ARRAY_SIZE(_name##_id##_resource), \ | ||
88 | } | ||
89 | |||
90 | #define select_peripheral(port, pin_mask, periph, flags) \ | ||
91 | at32_select_periph(GPIO_##port##_BASE, pin_mask, \ | ||
92 | GPIO_##periph, flags) | ||
93 | |||
94 | #define DEV_CLK(_name, devname, bus, _index) \ | ||
95 | static struct clk devname##_##_name = { \ | ||
96 | .name = #_name, \ | ||
97 | .dev = &devname##_device.dev, \ | ||
98 | .parent = &bus##_clk, \ | ||
99 | .mode = bus##_clk_mode, \ | ||
100 | .get_rate = bus##_clk_get_rate, \ | ||
101 | .index = _index, \ | ||
102 | } | ||
103 | |||
104 | static DEFINE_SPINLOCK(pm_lock); | ||
105 | |||
106 | static struct clk osc0; | ||
107 | static struct clk osc1; | ||
108 | |||
109 | static unsigned long osc_get_rate(struct clk *clk) | ||
110 | { | ||
111 | return at32_board_osc_rates[clk->index]; | ||
112 | } | ||
113 | |||
114 | static unsigned long pll_get_rate(struct clk *clk, unsigned long control) | ||
115 | { | ||
116 | unsigned long div, mul, rate; | ||
117 | |||
118 | div = PM_BFEXT(PLLDIV, control) + 1; | ||
119 | mul = PM_BFEXT(PLLMUL, control) + 1; | ||
120 | |||
121 | rate = clk->parent->get_rate(clk->parent); | ||
122 | rate = (rate + div / 2) / div; | ||
123 | rate *= mul; | ||
124 | |||
125 | return rate; | ||
126 | } | ||
127 | |||
128 | static long pll_set_rate(struct clk *clk, unsigned long rate, | ||
129 | u32 *pll_ctrl) | ||
130 | { | ||
131 | unsigned long mul; | ||
132 | unsigned long mul_best_fit = 0; | ||
133 | unsigned long div; | ||
134 | unsigned long div_min; | ||
135 | unsigned long div_max; | ||
136 | unsigned long div_best_fit = 0; | ||
137 | unsigned long base; | ||
138 | unsigned long pll_in; | ||
139 | unsigned long actual = 0; | ||
140 | unsigned long rate_error; | ||
141 | unsigned long rate_error_prev = ~0UL; | ||
142 | u32 ctrl; | ||
143 | |||
144 | /* Rate must be between 80 MHz and 200 Mhz. */ | ||
145 | if (rate < 80000000UL || rate > 200000000UL) | ||
146 | return -EINVAL; | ||
147 | |||
148 | ctrl = PM_BF(PLLOPT, 4); | ||
149 | base = clk->parent->get_rate(clk->parent); | ||
150 | |||
151 | /* PLL input frequency must be between 6 MHz and 32 MHz. */ | ||
152 | div_min = DIV_ROUND_UP(base, 32000000UL); | ||
153 | div_max = base / 6000000UL; | ||
154 | |||
155 | if (div_max < div_min) | ||
156 | return -EINVAL; | ||
157 | |||
158 | for (div = div_min; div <= div_max; div++) { | ||
159 | pll_in = (base + div / 2) / div; | ||
160 | mul = (rate + pll_in / 2) / pll_in; | ||
161 | |||
162 | if (mul == 0) | ||
163 | continue; | ||
164 | |||
165 | actual = pll_in * mul; | ||
166 | rate_error = abs(actual - rate); | ||
167 | |||
168 | if (rate_error < rate_error_prev) { | ||
169 | mul_best_fit = mul; | ||
170 | div_best_fit = div; | ||
171 | rate_error_prev = rate_error; | ||
172 | } | ||
173 | |||
174 | if (rate_error == 0) | ||
175 | break; | ||
176 | } | ||
177 | |||
178 | if (div_best_fit == 0) | ||
179 | return -EINVAL; | ||
180 | |||
181 | ctrl |= PM_BF(PLLMUL, mul_best_fit - 1); | ||
182 | ctrl |= PM_BF(PLLDIV, div_best_fit - 1); | ||
183 | ctrl |= PM_BF(PLLCOUNT, 16); | ||
184 | |||
185 | if (clk->parent == &osc1) | ||
186 | ctrl |= PM_BIT(PLLOSC); | ||
187 | |||
188 | *pll_ctrl = ctrl; | ||
189 | |||
190 | return actual; | ||
191 | } | ||
192 | |||
193 | static unsigned long pll0_get_rate(struct clk *clk) | ||
194 | { | ||
195 | u32 control; | ||
196 | |||
197 | control = pm_readl(PLL0); | ||
198 | |||
199 | return pll_get_rate(clk, control); | ||
200 | } | ||
201 | |||
202 | static void pll1_mode(struct clk *clk, int enabled) | ||
203 | { | ||
204 | unsigned long timeout; | ||
205 | u32 status; | ||
206 | u32 ctrl; | ||
207 | |||
208 | ctrl = pm_readl(PLL1); | ||
209 | |||
210 | if (enabled) { | ||
211 | if (!PM_BFEXT(PLLMUL, ctrl) && !PM_BFEXT(PLLDIV, ctrl)) { | ||
212 | pr_debug("clk %s: failed to enable, rate not set\n", | ||
213 | clk->name); | ||
214 | return; | ||
215 | } | ||
216 | |||
217 | ctrl |= PM_BIT(PLLEN); | ||
218 | pm_writel(PLL1, ctrl); | ||
219 | |||
220 | /* Wait for PLL lock. */ | ||
221 | for (timeout = 10000; timeout; timeout--) { | ||
222 | status = pm_readl(ISR); | ||
223 | if (status & PM_BIT(LOCK1)) | ||
224 | break; | ||
225 | udelay(10); | ||
226 | } | ||
227 | |||
228 | if (!(status & PM_BIT(LOCK1))) | ||
229 | printk(KERN_ERR "clk %s: timeout waiting for lock\n", | ||
230 | clk->name); | ||
231 | } else { | ||
232 | ctrl &= ~PM_BIT(PLLEN); | ||
233 | pm_writel(PLL1, ctrl); | ||
234 | } | ||
235 | } | ||
236 | |||
237 | static unsigned long pll1_get_rate(struct clk *clk) | ||
238 | { | ||
239 | u32 control; | ||
240 | |||
241 | control = pm_readl(PLL1); | ||
242 | |||
243 | return pll_get_rate(clk, control); | ||
244 | } | ||
245 | |||
246 | static long pll1_set_rate(struct clk *clk, unsigned long rate, int apply) | ||
247 | { | ||
248 | u32 ctrl = 0; | ||
249 | unsigned long actual_rate; | ||
250 | |||
251 | actual_rate = pll_set_rate(clk, rate, &ctrl); | ||
252 | |||
253 | if (apply) { | ||
254 | if (actual_rate != rate) | ||
255 | return -EINVAL; | ||
256 | if (clk->users > 0) | ||
257 | return -EBUSY; | ||
258 | pr_debug(KERN_INFO "clk %s: new rate %lu (actual rate %lu)\n", | ||
259 | clk->name, rate, actual_rate); | ||
260 | pm_writel(PLL1, ctrl); | ||
261 | } | ||
262 | |||
263 | return actual_rate; | ||
264 | } | ||
265 | |||
266 | static int pll1_set_parent(struct clk *clk, struct clk *parent) | ||
267 | { | ||
268 | u32 ctrl; | ||
269 | |||
270 | if (clk->users > 0) | ||
271 | return -EBUSY; | ||
272 | |||
273 | ctrl = pm_readl(PLL1); | ||
274 | WARN_ON(ctrl & PM_BIT(PLLEN)); | ||
275 | |||
276 | if (parent == &osc0) | ||
277 | ctrl &= ~PM_BIT(PLLOSC); | ||
278 | else if (parent == &osc1) | ||
279 | ctrl |= PM_BIT(PLLOSC); | ||
280 | else | ||
281 | return -EINVAL; | ||
282 | |||
283 | pm_writel(PLL1, ctrl); | ||
284 | clk->parent = parent; | ||
285 | |||
286 | return 0; | ||
287 | } | ||
288 | |||
289 | /* | ||
290 | * The AT32AP7000 has five primary clock sources: One 32kHz | ||
291 | * oscillator, two crystal oscillators and two PLLs. | ||
292 | */ | ||
293 | static struct clk osc32k = { | ||
294 | .name = "osc32k", | ||
295 | .get_rate = osc_get_rate, | ||
296 | .users = 1, | ||
297 | .index = 0, | ||
298 | }; | ||
299 | static struct clk osc0 = { | ||
300 | .name = "osc0", | ||
301 | .get_rate = osc_get_rate, | ||
302 | .users = 1, | ||
303 | .index = 1, | ||
304 | }; | ||
305 | static struct clk osc1 = { | ||
306 | .name = "osc1", | ||
307 | .get_rate = osc_get_rate, | ||
308 | .index = 2, | ||
309 | }; | ||
310 | static struct clk pll0 = { | ||
311 | .name = "pll0", | ||
312 | .get_rate = pll0_get_rate, | ||
313 | .parent = &osc0, | ||
314 | }; | ||
315 | static struct clk pll1 = { | ||
316 | .name = "pll1", | ||
317 | .mode = pll1_mode, | ||
318 | .get_rate = pll1_get_rate, | ||
319 | .set_rate = pll1_set_rate, | ||
320 | .set_parent = pll1_set_parent, | ||
321 | .parent = &osc0, | ||
322 | }; | ||
323 | |||
324 | /* | ||
325 | * The main clock can be either osc0 or pll0. The boot loader may | ||
326 | * have chosen one for us, so we don't really know which one until we | ||
327 | * have a look at the SM. | ||
328 | */ | ||
329 | static struct clk *main_clock; | ||
330 | |||
331 | /* | ||
332 | * Synchronous clocks are generated from the main clock. The clocks | ||
333 | * must satisfy the constraint | ||
334 | * fCPU >= fHSB >= fPB | ||
335 | * i.e. each clock must not be faster than its parent. | ||
336 | */ | ||
337 | static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) | ||
338 | { | ||
339 | return main_clock->get_rate(main_clock) >> shift; | ||
340 | }; | ||
341 | |||
342 | static void cpu_clk_mode(struct clk *clk, int enabled) | ||
343 | { | ||
344 | unsigned long flags; | ||
345 | u32 mask; | ||
346 | |||
347 | spin_lock_irqsave(&pm_lock, flags); | ||
348 | mask = pm_readl(CPU_MASK); | ||
349 | if (enabled) | ||
350 | mask |= 1 << clk->index; | ||
351 | else | ||
352 | mask &= ~(1 << clk->index); | ||
353 | pm_writel(CPU_MASK, mask); | ||
354 | spin_unlock_irqrestore(&pm_lock, flags); | ||
355 | } | ||
356 | |||
357 | static unsigned long cpu_clk_get_rate(struct clk *clk) | ||
358 | { | ||
359 | unsigned long cksel, shift = 0; | ||
360 | |||
361 | cksel = pm_readl(CKSEL); | ||
362 | if (cksel & PM_BIT(CPUDIV)) | ||
363 | shift = PM_BFEXT(CPUSEL, cksel) + 1; | ||
364 | |||
365 | return bus_clk_get_rate(clk, shift); | ||
366 | } | ||
367 | |||
368 | static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) | ||
369 | { | ||
370 | u32 control; | ||
371 | unsigned long parent_rate, child_div, actual_rate, div; | ||
372 | |||
373 | parent_rate = clk->parent->get_rate(clk->parent); | ||
374 | control = pm_readl(CKSEL); | ||
375 | |||
376 | if (control & PM_BIT(HSBDIV)) | ||
377 | child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); | ||
378 | else | ||
379 | child_div = 1; | ||
380 | |||
381 | if (rate > 3 * (parent_rate / 4) || child_div == 1) { | ||
382 | actual_rate = parent_rate; | ||
383 | control &= ~PM_BIT(CPUDIV); | ||
384 | } else { | ||
385 | unsigned int cpusel; | ||
386 | div = (parent_rate + rate / 2) / rate; | ||
387 | if (div > child_div) | ||
388 | div = child_div; | ||
389 | cpusel = (div > 1) ? (fls(div) - 2) : 0; | ||
390 | control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); | ||
391 | actual_rate = parent_rate / (1 << (cpusel + 1)); | ||
392 | } | ||
393 | |||
394 | pr_debug("clk %s: new rate %lu (actual rate %lu)\n", | ||
395 | clk->name, rate, actual_rate); | ||
396 | |||
397 | if (apply) | ||
398 | pm_writel(CKSEL, control); | ||
399 | |||
400 | return actual_rate; | ||
401 | } | ||
402 | |||
403 | static void hsb_clk_mode(struct clk *clk, int enabled) | ||
404 | { | ||
405 | unsigned long flags; | ||
406 | u32 mask; | ||
407 | |||
408 | spin_lock_irqsave(&pm_lock, flags); | ||
409 | mask = pm_readl(HSB_MASK); | ||
410 | if (enabled) | ||
411 | mask |= 1 << clk->index; | ||
412 | else | ||
413 | mask &= ~(1 << clk->index); | ||
414 | pm_writel(HSB_MASK, mask); | ||
415 | spin_unlock_irqrestore(&pm_lock, flags); | ||
416 | } | ||
417 | |||
418 | static unsigned long hsb_clk_get_rate(struct clk *clk) | ||
419 | { | ||
420 | unsigned long cksel, shift = 0; | ||
421 | |||
422 | cksel = pm_readl(CKSEL); | ||
423 | if (cksel & PM_BIT(HSBDIV)) | ||
424 | shift = PM_BFEXT(HSBSEL, cksel) + 1; | ||
425 | |||
426 | return bus_clk_get_rate(clk, shift); | ||
427 | } | ||
428 | |||
429 | void pba_clk_mode(struct clk *clk, int enabled) | ||
430 | { | ||
431 | unsigned long flags; | ||
432 | u32 mask; | ||
433 | |||
434 | spin_lock_irqsave(&pm_lock, flags); | ||
435 | mask = pm_readl(PBA_MASK); | ||
436 | if (enabled) | ||
437 | mask |= 1 << clk->index; | ||
438 | else | ||
439 | mask &= ~(1 << clk->index); | ||
440 | pm_writel(PBA_MASK, mask); | ||
441 | spin_unlock_irqrestore(&pm_lock, flags); | ||
442 | } | ||
443 | |||
444 | unsigned long pba_clk_get_rate(struct clk *clk) | ||
445 | { | ||
446 | unsigned long cksel, shift = 0; | ||
447 | |||
448 | cksel = pm_readl(CKSEL); | ||
449 | if (cksel & PM_BIT(PBADIV)) | ||
450 | shift = PM_BFEXT(PBASEL, cksel) + 1; | ||
451 | |||
452 | return bus_clk_get_rate(clk, shift); | ||
453 | } | ||
454 | |||
455 | static void pbb_clk_mode(struct clk *clk, int enabled) | ||
456 | { | ||
457 | unsigned long flags; | ||
458 | u32 mask; | ||
459 | |||
460 | spin_lock_irqsave(&pm_lock, flags); | ||
461 | mask = pm_readl(PBB_MASK); | ||
462 | if (enabled) | ||
463 | mask |= 1 << clk->index; | ||
464 | else | ||
465 | mask &= ~(1 << clk->index); | ||
466 | pm_writel(PBB_MASK, mask); | ||
467 | spin_unlock_irqrestore(&pm_lock, flags); | ||
468 | } | ||
469 | |||
470 | static unsigned long pbb_clk_get_rate(struct clk *clk) | ||
471 | { | ||
472 | unsigned long cksel, shift = 0; | ||
473 | |||
474 | cksel = pm_readl(CKSEL); | ||
475 | if (cksel & PM_BIT(PBBDIV)) | ||
476 | shift = PM_BFEXT(PBBSEL, cksel) + 1; | ||
477 | |||
478 | return bus_clk_get_rate(clk, shift); | ||
479 | } | ||
480 | |||
481 | static struct clk cpu_clk = { | ||
482 | .name = "cpu", | ||
483 | .get_rate = cpu_clk_get_rate, | ||
484 | .set_rate = cpu_clk_set_rate, | ||
485 | .users = 1, | ||
486 | }; | ||
487 | static struct clk hsb_clk = { | ||
488 | .name = "hsb", | ||
489 | .parent = &cpu_clk, | ||
490 | .get_rate = hsb_clk_get_rate, | ||
491 | }; | ||
492 | static struct clk pba_clk = { | ||
493 | .name = "pba", | ||
494 | .parent = &hsb_clk, | ||
495 | .mode = hsb_clk_mode, | ||
496 | .get_rate = pba_clk_get_rate, | ||
497 | .index = 1, | ||
498 | }; | ||
499 | static struct clk pbb_clk = { | ||
500 | .name = "pbb", | ||
501 | .parent = &hsb_clk, | ||
502 | .mode = hsb_clk_mode, | ||
503 | .get_rate = pbb_clk_get_rate, | ||
504 | .users = 1, | ||
505 | .index = 2, | ||
506 | }; | ||
507 | |||
508 | /* -------------------------------------------------------------------- | ||
509 | * Generic Clock operations | ||
510 | * -------------------------------------------------------------------- */ | ||
511 | |||
512 | static void genclk_mode(struct clk *clk, int enabled) | ||
513 | { | ||
514 | u32 control; | ||
515 | |||
516 | control = pm_readl(GCCTRL(clk->index)); | ||
517 | if (enabled) | ||
518 | control |= PM_BIT(CEN); | ||
519 | else | ||
520 | control &= ~PM_BIT(CEN); | ||
521 | pm_writel(GCCTRL(clk->index), control); | ||
522 | } | ||
523 | |||
524 | static unsigned long genclk_get_rate(struct clk *clk) | ||
525 | { | ||
526 | u32 control; | ||
527 | unsigned long div = 1; | ||
528 | |||
529 | control = pm_readl(GCCTRL(clk->index)); | ||
530 | if (control & PM_BIT(DIVEN)) | ||
531 | div = 2 * (PM_BFEXT(DIV, control) + 1); | ||
532 | |||
533 | return clk->parent->get_rate(clk->parent) / div; | ||
534 | } | ||
535 | |||
536 | static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) | ||
537 | { | ||
538 | u32 control; | ||
539 | unsigned long parent_rate, actual_rate, div; | ||
540 | |||
541 | parent_rate = clk->parent->get_rate(clk->parent); | ||
542 | control = pm_readl(GCCTRL(clk->index)); | ||
543 | |||
544 | if (rate > 3 * parent_rate / 4) { | ||
545 | actual_rate = parent_rate; | ||
546 | control &= ~PM_BIT(DIVEN); | ||
547 | } else { | ||
548 | div = (parent_rate + rate) / (2 * rate) - 1; | ||
549 | control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); | ||
550 | actual_rate = parent_rate / (2 * (div + 1)); | ||
551 | } | ||
552 | |||
553 | dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", | ||
554 | clk->name, rate, actual_rate); | ||
555 | |||
556 | if (apply) | ||
557 | pm_writel(GCCTRL(clk->index), control); | ||
558 | |||
559 | return actual_rate; | ||
560 | } | ||
561 | |||
562 | int genclk_set_parent(struct clk *clk, struct clk *parent) | ||
563 | { | ||
564 | u32 control; | ||
565 | |||
566 | dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", | ||
567 | clk->name, parent->name, clk->parent->name); | ||
568 | |||
569 | control = pm_readl(GCCTRL(clk->index)); | ||
570 | |||
571 | if (parent == &osc1 || parent == &pll1) | ||
572 | control |= PM_BIT(OSCSEL); | ||
573 | else if (parent == &osc0 || parent == &pll0) | ||
574 | control &= ~PM_BIT(OSCSEL); | ||
575 | else | ||
576 | return -EINVAL; | ||
577 | |||
578 | if (parent == &pll0 || parent == &pll1) | ||
579 | control |= PM_BIT(PLLSEL); | ||
580 | else | ||
581 | control &= ~PM_BIT(PLLSEL); | ||
582 | |||
583 | pm_writel(GCCTRL(clk->index), control); | ||
584 | clk->parent = parent; | ||
585 | |||
586 | return 0; | ||
587 | } | ||
588 | |||
589 | static void __init genclk_init_parent(struct clk *clk) | ||
590 | { | ||
591 | u32 control; | ||
592 | struct clk *parent; | ||
593 | |||
594 | BUG_ON(clk->index > 7); | ||
595 | |||
596 | control = pm_readl(GCCTRL(clk->index)); | ||
597 | if (control & PM_BIT(OSCSEL)) | ||
598 | parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; | ||
599 | else | ||
600 | parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; | ||
601 | |||
602 | clk->parent = parent; | ||
603 | } | ||
604 | |||
605 | static struct resource dw_dmac0_resource[] = { | ||
606 | PBMEM(0xff200000), | ||
607 | IRQ(2), | ||
608 | }; | ||
609 | DEFINE_DEV(dw_dmac, 0); | ||
610 | DEV_CLK(hclk, dw_dmac0, hsb, 10); | ||
611 | |||
612 | /* -------------------------------------------------------------------- | ||
613 | * System peripherals | ||
614 | * -------------------------------------------------------------------- */ | ||
615 | static struct resource at32_pm0_resource[] = { | ||
616 | { | ||
617 | .start = 0xfff00000, | ||
618 | .end = 0xfff0007f, | ||
619 | .flags = IORESOURCE_MEM, | ||
620 | }, | ||
621 | IRQ(20), | ||
622 | }; | ||
623 | |||
624 | static struct resource at32ap700x_rtc0_resource[] = { | ||
625 | { | ||
626 | .start = 0xfff00080, | ||
627 | .end = 0xfff000af, | ||
628 | .flags = IORESOURCE_MEM, | ||
629 | }, | ||
630 | IRQ(21), | ||
631 | }; | ||
632 | |||
633 | static struct resource at32_wdt0_resource[] = { | ||
634 | { | ||
635 | .start = 0xfff000b0, | ||
636 | .end = 0xfff000cf, | ||
637 | .flags = IORESOURCE_MEM, | ||
638 | }, | ||
639 | }; | ||
640 | |||
641 | static struct resource at32_eic0_resource[] = { | ||
642 | { | ||
643 | .start = 0xfff00100, | ||
644 | .end = 0xfff0013f, | ||
645 | .flags = IORESOURCE_MEM, | ||
646 | }, | ||
647 | IRQ(19), | ||
648 | }; | ||
649 | |||
650 | DEFINE_DEV(at32_pm, 0); | ||
651 | DEFINE_DEV(at32ap700x_rtc, 0); | ||
652 | DEFINE_DEV(at32_wdt, 0); | ||
653 | DEFINE_DEV(at32_eic, 0); | ||
654 | |||
655 | /* | ||
656 | * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this | ||
657 | * is always running. | ||
658 | */ | ||
659 | static struct clk at32_pm_pclk = { | ||
660 | .name = "pclk", | ||
661 | .dev = &at32_pm0_device.dev, | ||
662 | .parent = &pbb_clk, | ||
663 | .mode = pbb_clk_mode, | ||
664 | .get_rate = pbb_clk_get_rate, | ||
665 | .users = 1, | ||
666 | .index = 0, | ||
667 | }; | ||
668 | |||
669 | static struct resource intc0_resource[] = { | ||
670 | PBMEM(0xfff00400), | ||
671 | }; | ||
672 | struct platform_device at32_intc0_device = { | ||
673 | .name = "intc", | ||
674 | .id = 0, | ||
675 | .resource = intc0_resource, | ||
676 | .num_resources = ARRAY_SIZE(intc0_resource), | ||
677 | }; | ||
678 | DEV_CLK(pclk, at32_intc0, pbb, 1); | ||
679 | |||
680 | static struct clk ebi_clk = { | ||
681 | .name = "ebi", | ||
682 | .parent = &hsb_clk, | ||
683 | .mode = hsb_clk_mode, | ||
684 | .get_rate = hsb_clk_get_rate, | ||
685 | .users = 1, | ||
686 | }; | ||
687 | static struct clk hramc_clk = { | ||
688 | .name = "hramc", | ||
689 | .parent = &hsb_clk, | ||
690 | .mode = hsb_clk_mode, | ||
691 | .get_rate = hsb_clk_get_rate, | ||
692 | .users = 1, | ||
693 | .index = 3, | ||
694 | }; | ||
695 | static struct clk sdramc_clk = { | ||
696 | .name = "sdramc_clk", | ||
697 | .parent = &pbb_clk, | ||
698 | .mode = pbb_clk_mode, | ||
699 | .get_rate = pbb_clk_get_rate, | ||
700 | .users = 1, | ||
701 | .index = 14, | ||
702 | }; | ||
703 | |||
704 | static struct resource smc0_resource[] = { | ||
705 | PBMEM(0xfff03400), | ||
706 | }; | ||
707 | DEFINE_DEV(smc, 0); | ||
708 | DEV_CLK(pclk, smc0, pbb, 13); | ||
709 | DEV_CLK(mck, smc0, hsb, 0); | ||
710 | |||
711 | static struct platform_device pdc_device = { | ||
712 | .name = "pdc", | ||
713 | .id = 0, | ||
714 | }; | ||
715 | DEV_CLK(hclk, pdc, hsb, 4); | ||
716 | DEV_CLK(pclk, pdc, pba, 16); | ||
717 | |||
718 | static struct clk pico_clk = { | ||
719 | .name = "pico", | ||
720 | .parent = &cpu_clk, | ||
721 | .mode = cpu_clk_mode, | ||
722 | .get_rate = cpu_clk_get_rate, | ||
723 | .users = 1, | ||
724 | }; | ||
725 | |||
726 | /* -------------------------------------------------------------------- | ||
727 | * HMATRIX | ||
728 | * -------------------------------------------------------------------- */ | ||
729 | |||
730 | struct clk at32_hmatrix_clk = { | ||
731 | .name = "hmatrix_clk", | ||
732 | .parent = &pbb_clk, | ||
733 | .mode = pbb_clk_mode, | ||
734 | .get_rate = pbb_clk_get_rate, | ||
735 | .index = 2, | ||
736 | .users = 1, | ||
737 | }; | ||
738 | |||
739 | /* | ||
740 | * Set bits in the HMATRIX Special Function Register (SFR) used by the | ||
741 | * External Bus Interface (EBI). This can be used to enable special | ||
742 | * features like CompactFlash support, NAND Flash support, etc. on | ||
743 | * certain chipselects. | ||
744 | */ | ||
745 | static inline void set_ebi_sfr_bits(u32 mask) | ||
746 | { | ||
747 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, mask); | ||
748 | } | ||
749 | |||
750 | /* -------------------------------------------------------------------- | ||
751 | * Timer/Counter (TC) | ||
752 | * -------------------------------------------------------------------- */ | ||
753 | |||
754 | static struct resource at32_tcb0_resource[] = { | ||
755 | PBMEM(0xfff00c00), | ||
756 | IRQ(22), | ||
757 | }; | ||
758 | static struct platform_device at32_tcb0_device = { | ||
759 | .name = "atmel_tcb", | ||
760 | .id = 0, | ||
761 | .resource = at32_tcb0_resource, | ||
762 | .num_resources = ARRAY_SIZE(at32_tcb0_resource), | ||
763 | }; | ||
764 | DEV_CLK(t0_clk, at32_tcb0, pbb, 3); | ||
765 | |||
766 | static struct resource at32_tcb1_resource[] = { | ||
767 | PBMEM(0xfff01000), | ||
768 | IRQ(23), | ||
769 | }; | ||
770 | static struct platform_device at32_tcb1_device = { | ||
771 | .name = "atmel_tcb", | ||
772 | .id = 1, | ||
773 | .resource = at32_tcb1_resource, | ||
774 | .num_resources = ARRAY_SIZE(at32_tcb1_resource), | ||
775 | }; | ||
776 | DEV_CLK(t0_clk, at32_tcb1, pbb, 4); | ||
777 | |||
778 | /* -------------------------------------------------------------------- | ||
779 | * PIO | ||
780 | * -------------------------------------------------------------------- */ | ||
781 | |||
782 | static struct resource pio0_resource[] = { | ||
783 | PBMEM(0xffe02800), | ||
784 | IRQ(13), | ||
785 | }; | ||
786 | DEFINE_DEV(pio, 0); | ||
787 | DEV_CLK(mck, pio0, pba, 10); | ||
788 | |||
789 | static struct resource pio1_resource[] = { | ||
790 | PBMEM(0xffe02c00), | ||
791 | IRQ(14), | ||
792 | }; | ||
793 | DEFINE_DEV(pio, 1); | ||
794 | DEV_CLK(mck, pio1, pba, 11); | ||
795 | |||
796 | static struct resource pio2_resource[] = { | ||
797 | PBMEM(0xffe03000), | ||
798 | IRQ(15), | ||
799 | }; | ||
800 | DEFINE_DEV(pio, 2); | ||
801 | DEV_CLK(mck, pio2, pba, 12); | ||
802 | |||
803 | static struct resource pio3_resource[] = { | ||
804 | PBMEM(0xffe03400), | ||
805 | IRQ(16), | ||
806 | }; | ||
807 | DEFINE_DEV(pio, 3); | ||
808 | DEV_CLK(mck, pio3, pba, 13); | ||
809 | |||
810 | static struct resource pio4_resource[] = { | ||
811 | PBMEM(0xffe03800), | ||
812 | IRQ(17), | ||
813 | }; | ||
814 | DEFINE_DEV(pio, 4); | ||
815 | DEV_CLK(mck, pio4, pba, 14); | ||
816 | |||
817 | static int __init system_device_init(void) | ||
818 | { | ||
819 | platform_device_register(&at32_pm0_device); | ||
820 | platform_device_register(&at32_intc0_device); | ||
821 | platform_device_register(&at32ap700x_rtc0_device); | ||
822 | platform_device_register(&at32_wdt0_device); | ||
823 | platform_device_register(&at32_eic0_device); | ||
824 | platform_device_register(&smc0_device); | ||
825 | platform_device_register(&pdc_device); | ||
826 | platform_device_register(&dw_dmac0_device); | ||
827 | |||
828 | platform_device_register(&at32_tcb0_device); | ||
829 | platform_device_register(&at32_tcb1_device); | ||
830 | |||
831 | platform_device_register(&pio0_device); | ||
832 | platform_device_register(&pio1_device); | ||
833 | platform_device_register(&pio2_device); | ||
834 | platform_device_register(&pio3_device); | ||
835 | platform_device_register(&pio4_device); | ||
836 | |||
837 | return 0; | ||
838 | } | ||
839 | core_initcall(system_device_init); | ||
840 | |||
841 | /* -------------------------------------------------------------------- | ||
842 | * PSIF | ||
843 | * -------------------------------------------------------------------- */ | ||
844 | static struct resource atmel_psif0_resource[] __initdata = { | ||
845 | { | ||
846 | .start = 0xffe03c00, | ||
847 | .end = 0xffe03cff, | ||
848 | .flags = IORESOURCE_MEM, | ||
849 | }, | ||
850 | IRQ(18), | ||
851 | }; | ||
852 | static struct clk atmel_psif0_pclk = { | ||
853 | .name = "pclk", | ||
854 | .parent = &pba_clk, | ||
855 | .mode = pba_clk_mode, | ||
856 | .get_rate = pba_clk_get_rate, | ||
857 | .index = 15, | ||
858 | }; | ||
859 | |||
860 | static struct resource atmel_psif1_resource[] __initdata = { | ||
861 | { | ||
862 | .start = 0xffe03d00, | ||
863 | .end = 0xffe03dff, | ||
864 | .flags = IORESOURCE_MEM, | ||
865 | }, | ||
866 | IRQ(18), | ||
867 | }; | ||
868 | static struct clk atmel_psif1_pclk = { | ||
869 | .name = "pclk", | ||
870 | .parent = &pba_clk, | ||
871 | .mode = pba_clk_mode, | ||
872 | .get_rate = pba_clk_get_rate, | ||
873 | .index = 15, | ||
874 | }; | ||
875 | |||
876 | struct platform_device *__init at32_add_device_psif(unsigned int id) | ||
877 | { | ||
878 | struct platform_device *pdev; | ||
879 | u32 pin_mask; | ||
880 | |||
881 | if (!(id == 0 || id == 1)) | ||
882 | return NULL; | ||
883 | |||
884 | pdev = platform_device_alloc("atmel_psif", id); | ||
885 | if (!pdev) | ||
886 | return NULL; | ||
887 | |||
888 | switch (id) { | ||
889 | case 0: | ||
890 | pin_mask = (1 << 8) | (1 << 9); /* CLOCK & DATA */ | ||
891 | |||
892 | if (platform_device_add_resources(pdev, atmel_psif0_resource, | ||
893 | ARRAY_SIZE(atmel_psif0_resource))) | ||
894 | goto err_add_resources; | ||
895 | atmel_psif0_pclk.dev = &pdev->dev; | ||
896 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
897 | break; | ||
898 | case 1: | ||
899 | pin_mask = (1 << 11) | (1 << 12); /* CLOCK & DATA */ | ||
900 | |||
901 | if (platform_device_add_resources(pdev, atmel_psif1_resource, | ||
902 | ARRAY_SIZE(atmel_psif1_resource))) | ||
903 | goto err_add_resources; | ||
904 | atmel_psif1_pclk.dev = &pdev->dev; | ||
905 | select_peripheral(PIOB, pin_mask, PERIPH_A, 0); | ||
906 | break; | ||
907 | default: | ||
908 | return NULL; | ||
909 | } | ||
910 | |||
911 | platform_device_add(pdev); | ||
912 | return pdev; | ||
913 | |||
914 | err_add_resources: | ||
915 | platform_device_put(pdev); | ||
916 | return NULL; | ||
917 | } | ||
918 | |||
919 | /* -------------------------------------------------------------------- | ||
920 | * USART | ||
921 | * -------------------------------------------------------------------- */ | ||
922 | |||
923 | static struct atmel_uart_data atmel_usart0_data = { | ||
924 | .use_dma_tx = 1, | ||
925 | .use_dma_rx = 1, | ||
926 | }; | ||
927 | static struct resource atmel_usart0_resource[] = { | ||
928 | PBMEM(0xffe00c00), | ||
929 | IRQ(6), | ||
930 | }; | ||
931 | DEFINE_DEV_DATA(atmel_usart, 0); | ||
932 | DEV_CLK(usart, atmel_usart0, pba, 3); | ||
933 | |||
934 | static struct atmel_uart_data atmel_usart1_data = { | ||
935 | .use_dma_tx = 1, | ||
936 | .use_dma_rx = 1, | ||
937 | }; | ||
938 | static struct resource atmel_usart1_resource[] = { | ||
939 | PBMEM(0xffe01000), | ||
940 | IRQ(7), | ||
941 | }; | ||
942 | DEFINE_DEV_DATA(atmel_usart, 1); | ||
943 | DEV_CLK(usart, atmel_usart1, pba, 4); | ||
944 | |||
945 | static struct atmel_uart_data atmel_usart2_data = { | ||
946 | .use_dma_tx = 1, | ||
947 | .use_dma_rx = 1, | ||
948 | }; | ||
949 | static struct resource atmel_usart2_resource[] = { | ||
950 | PBMEM(0xffe01400), | ||
951 | IRQ(8), | ||
952 | }; | ||
953 | DEFINE_DEV_DATA(atmel_usart, 2); | ||
954 | DEV_CLK(usart, atmel_usart2, pba, 5); | ||
955 | |||
956 | static struct atmel_uart_data atmel_usart3_data = { | ||
957 | .use_dma_tx = 1, | ||
958 | .use_dma_rx = 1, | ||
959 | }; | ||
960 | static struct resource atmel_usart3_resource[] = { | ||
961 | PBMEM(0xffe01800), | ||
962 | IRQ(9), | ||
963 | }; | ||
964 | DEFINE_DEV_DATA(atmel_usart, 3); | ||
965 | DEV_CLK(usart, atmel_usart3, pba, 6); | ||
966 | |||
967 | static inline void configure_usart0_pins(int flags) | ||
968 | { | ||
969 | u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */ | ||
970 | if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 6); | ||
971 | if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 7); | ||
972 | if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 10); | ||
973 | |||
974 | select_peripheral(PIOA, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP); | ||
975 | } | ||
976 | |||
977 | static inline void configure_usart1_pins(int flags) | ||
978 | { | ||
979 | u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */ | ||
980 | if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 19); | ||
981 | if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 20); | ||
982 | if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 16); | ||
983 | |||
984 | select_peripheral(PIOA, pin_mask, PERIPH_A, AT32_GPIOF_PULLUP); | ||
985 | } | ||
986 | |||
987 | static inline void configure_usart2_pins(int flags) | ||
988 | { | ||
989 | u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */ | ||
990 | if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 30); | ||
991 | if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 29); | ||
992 | if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 28); | ||
993 | |||
994 | select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP); | ||
995 | } | ||
996 | |||
997 | static inline void configure_usart3_pins(int flags) | ||
998 | { | ||
999 | u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */ | ||
1000 | if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 16); | ||
1001 | if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 15); | ||
1002 | if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 19); | ||
1003 | |||
1004 | select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP); | ||
1005 | } | ||
1006 | |||
1007 | static struct platform_device *__initdata at32_usarts[4]; | ||
1008 | |||
1009 | void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags) | ||
1010 | { | ||
1011 | struct platform_device *pdev; | ||
1012 | struct atmel_uart_data *pdata; | ||
1013 | |||
1014 | switch (hw_id) { | ||
1015 | case 0: | ||
1016 | pdev = &atmel_usart0_device; | ||
1017 | configure_usart0_pins(flags); | ||
1018 | break; | ||
1019 | case 1: | ||
1020 | pdev = &atmel_usart1_device; | ||
1021 | configure_usart1_pins(flags); | ||
1022 | break; | ||
1023 | case 2: | ||
1024 | pdev = &atmel_usart2_device; | ||
1025 | configure_usart2_pins(flags); | ||
1026 | break; | ||
1027 | case 3: | ||
1028 | pdev = &atmel_usart3_device; | ||
1029 | configure_usart3_pins(flags); | ||
1030 | break; | ||
1031 | default: | ||
1032 | return; | ||
1033 | } | ||
1034 | |||
1035 | if (PXSEG(pdev->resource[0].start) == P4SEG) { | ||
1036 | /* Addresses in the P4 segment are permanently mapped 1:1 */ | ||
1037 | struct atmel_uart_data *data = pdev->dev.platform_data; | ||
1038 | data->regs = (void __iomem *)pdev->resource[0].start; | ||
1039 | } | ||
1040 | |||
1041 | pdev->id = line; | ||
1042 | pdata = pdev->dev.platform_data; | ||
1043 | pdata->num = line; | ||
1044 | at32_usarts[line] = pdev; | ||
1045 | } | ||
1046 | |||
1047 | struct platform_device *__init at32_add_device_usart(unsigned int id) | ||
1048 | { | ||
1049 | platform_device_register(at32_usarts[id]); | ||
1050 | return at32_usarts[id]; | ||
1051 | } | ||
1052 | |||
1053 | void __init at32_setup_serial_console(unsigned int usart_id) | ||
1054 | { | ||
1055 | #ifdef CONFIG_SERIAL_ATMEL | ||
1056 | atmel_default_console_device = at32_usarts[usart_id]; | ||
1057 | #endif | ||
1058 | } | ||
1059 | |||
1060 | /* -------------------------------------------------------------------- | ||
1061 | * Ethernet | ||
1062 | * -------------------------------------------------------------------- */ | ||
1063 | |||
1064 | #ifdef CONFIG_CPU_AT32AP7000 | ||
1065 | static struct macb_platform_data macb0_data; | ||
1066 | static struct resource macb0_resource[] = { | ||
1067 | PBMEM(0xfff01800), | ||
1068 | IRQ(25), | ||
1069 | }; | ||
1070 | DEFINE_DEV_DATA(macb, 0); | ||
1071 | DEV_CLK(hclk, macb0, hsb, 8); | ||
1072 | DEV_CLK(pclk, macb0, pbb, 6); | ||
1073 | |||
1074 | static struct macb_platform_data macb1_data; | ||
1075 | static struct resource macb1_resource[] = { | ||
1076 | PBMEM(0xfff01c00), | ||
1077 | IRQ(26), | ||
1078 | }; | ||
1079 | DEFINE_DEV_DATA(macb, 1); | ||
1080 | DEV_CLK(hclk, macb1, hsb, 9); | ||
1081 | DEV_CLK(pclk, macb1, pbb, 7); | ||
1082 | |||
1083 | struct platform_device *__init | ||
1084 | at32_add_device_eth(unsigned int id, struct macb_platform_data *data) | ||
1085 | { | ||
1086 | struct platform_device *pdev; | ||
1087 | u32 pin_mask; | ||
1088 | |||
1089 | switch (id) { | ||
1090 | case 0: | ||
1091 | pdev = &macb0_device; | ||
1092 | |||
1093 | pin_mask = (1 << 3); /* TXD0 */ | ||
1094 | pin_mask |= (1 << 4); /* TXD1 */ | ||
1095 | pin_mask |= (1 << 7); /* TXEN */ | ||
1096 | pin_mask |= (1 << 8); /* TXCK */ | ||
1097 | pin_mask |= (1 << 9); /* RXD0 */ | ||
1098 | pin_mask |= (1 << 10); /* RXD1 */ | ||
1099 | pin_mask |= (1 << 13); /* RXER */ | ||
1100 | pin_mask |= (1 << 15); /* RXDV */ | ||
1101 | pin_mask |= (1 << 16); /* MDC */ | ||
1102 | pin_mask |= (1 << 17); /* MDIO */ | ||
1103 | |||
1104 | if (!data->is_rmii) { | ||
1105 | pin_mask |= (1 << 0); /* COL */ | ||
1106 | pin_mask |= (1 << 1); /* CRS */ | ||
1107 | pin_mask |= (1 << 2); /* TXER */ | ||
1108 | pin_mask |= (1 << 5); /* TXD2 */ | ||
1109 | pin_mask |= (1 << 6); /* TXD3 */ | ||
1110 | pin_mask |= (1 << 11); /* RXD2 */ | ||
1111 | pin_mask |= (1 << 12); /* RXD3 */ | ||
1112 | pin_mask |= (1 << 14); /* RXCK */ | ||
1113 | #ifndef CONFIG_BOARD_MIMC200 | ||
1114 | pin_mask |= (1 << 18); /* SPD */ | ||
1115 | #endif | ||
1116 | } | ||
1117 | |||
1118 | select_peripheral(PIOC, pin_mask, PERIPH_A, 0); | ||
1119 | |||
1120 | break; | ||
1121 | |||
1122 | case 1: | ||
1123 | pdev = &macb1_device; | ||
1124 | |||
1125 | pin_mask = (1 << 13); /* TXD0 */ | ||
1126 | pin_mask |= (1 << 14); /* TXD1 */ | ||
1127 | pin_mask |= (1 << 11); /* TXEN */ | ||
1128 | pin_mask |= (1 << 12); /* TXCK */ | ||
1129 | pin_mask |= (1 << 10); /* RXD0 */ | ||
1130 | pin_mask |= (1 << 6); /* RXD1 */ | ||
1131 | pin_mask |= (1 << 5); /* RXER */ | ||
1132 | pin_mask |= (1 << 4); /* RXDV */ | ||
1133 | pin_mask |= (1 << 3); /* MDC */ | ||
1134 | pin_mask |= (1 << 2); /* MDIO */ | ||
1135 | |||
1136 | #ifndef CONFIG_BOARD_MIMC200 | ||
1137 | if (!data->is_rmii) | ||
1138 | pin_mask |= (1 << 15); /* SPD */ | ||
1139 | #endif | ||
1140 | |||
1141 | select_peripheral(PIOD, pin_mask, PERIPH_B, 0); | ||
1142 | |||
1143 | if (!data->is_rmii) { | ||
1144 | pin_mask = (1 << 19); /* COL */ | ||
1145 | pin_mask |= (1 << 23); /* CRS */ | ||
1146 | pin_mask |= (1 << 26); /* TXER */ | ||
1147 | pin_mask |= (1 << 27); /* TXD2 */ | ||
1148 | pin_mask |= (1 << 28); /* TXD3 */ | ||
1149 | pin_mask |= (1 << 29); /* RXD2 */ | ||
1150 | pin_mask |= (1 << 30); /* RXD3 */ | ||
1151 | pin_mask |= (1 << 24); /* RXCK */ | ||
1152 | |||
1153 | select_peripheral(PIOC, pin_mask, PERIPH_B, 0); | ||
1154 | } | ||
1155 | break; | ||
1156 | |||
1157 | default: | ||
1158 | return NULL; | ||
1159 | } | ||
1160 | |||
1161 | memcpy(pdev->dev.platform_data, data, sizeof(struct macb_platform_data)); | ||
1162 | platform_device_register(pdev); | ||
1163 | |||
1164 | return pdev; | ||
1165 | } | ||
1166 | #endif | ||
1167 | |||
1168 | /* -------------------------------------------------------------------- | ||
1169 | * SPI | ||
1170 | * -------------------------------------------------------------------- */ | ||
1171 | static struct resource atmel_spi0_resource[] = { | ||
1172 | PBMEM(0xffe00000), | ||
1173 | IRQ(3), | ||
1174 | }; | ||
1175 | DEFINE_DEV(atmel_spi, 0); | ||
1176 | DEV_CLK(spi_clk, atmel_spi0, pba, 0); | ||
1177 | |||
1178 | static struct resource atmel_spi1_resource[] = { | ||
1179 | PBMEM(0xffe00400), | ||
1180 | IRQ(4), | ||
1181 | }; | ||
1182 | DEFINE_DEV(atmel_spi, 1); | ||
1183 | DEV_CLK(spi_clk, atmel_spi1, pba, 1); | ||
1184 | |||
1185 | void __init | ||
1186 | at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, unsigned int n) | ||
1187 | { | ||
1188 | /* | ||
1189 | * Manage the chipselects as GPIOs, normally using the same pins | ||
1190 | * the SPI controller expects; but boards can use other pins. | ||
1191 | */ | ||
1192 | static u8 __initdata spi_pins[][4] = { | ||
1193 | { GPIO_PIN_PA(3), GPIO_PIN_PA(4), | ||
1194 | GPIO_PIN_PA(5), GPIO_PIN_PA(20) }, | ||
1195 | { GPIO_PIN_PB(2), GPIO_PIN_PB(3), | ||
1196 | GPIO_PIN_PB(4), GPIO_PIN_PA(27) }, | ||
1197 | }; | ||
1198 | unsigned int pin, mode; | ||
1199 | |||
1200 | /* There are only 2 SPI controllers */ | ||
1201 | if (bus_num > 1) | ||
1202 | return; | ||
1203 | |||
1204 | for (; n; n--, b++) { | ||
1205 | b->bus_num = bus_num; | ||
1206 | if (b->chip_select >= 4) | ||
1207 | continue; | ||
1208 | pin = (unsigned)b->controller_data; | ||
1209 | if (!pin) { | ||
1210 | pin = spi_pins[bus_num][b->chip_select]; | ||
1211 | b->controller_data = (void *)pin; | ||
1212 | } | ||
1213 | mode = AT32_GPIOF_OUTPUT; | ||
1214 | if (!(b->mode & SPI_CS_HIGH)) | ||
1215 | mode |= AT32_GPIOF_HIGH; | ||
1216 | at32_select_gpio(pin, mode); | ||
1217 | } | ||
1218 | } | ||
1219 | |||
1220 | struct platform_device *__init | ||
1221 | at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) | ||
1222 | { | ||
1223 | struct platform_device *pdev; | ||
1224 | u32 pin_mask; | ||
1225 | |||
1226 | switch (id) { | ||
1227 | case 0: | ||
1228 | pdev = &atmel_spi0_device; | ||
1229 | pin_mask = (1 << 1) | (1 << 2); /* MOSI & SCK */ | ||
1230 | |||
1231 | /* pullup MISO so a level is always defined */ | ||
1232 | select_peripheral(PIOA, (1 << 0), PERIPH_A, AT32_GPIOF_PULLUP); | ||
1233 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
1234 | |||
1235 | at32_spi_setup_slaves(0, b, n); | ||
1236 | break; | ||
1237 | |||
1238 | case 1: | ||
1239 | pdev = &atmel_spi1_device; | ||
1240 | pin_mask = (1 << 1) | (1 << 5); /* MOSI */ | ||
1241 | |||
1242 | /* pullup MISO so a level is always defined */ | ||
1243 | select_peripheral(PIOB, (1 << 0), PERIPH_B, AT32_GPIOF_PULLUP); | ||
1244 | select_peripheral(PIOB, pin_mask, PERIPH_B, 0); | ||
1245 | |||
1246 | at32_spi_setup_slaves(1, b, n); | ||
1247 | break; | ||
1248 | |||
1249 | default: | ||
1250 | return NULL; | ||
1251 | } | ||
1252 | |||
1253 | spi_register_board_info(b, n); | ||
1254 | platform_device_register(pdev); | ||
1255 | return pdev; | ||
1256 | } | ||
1257 | |||
1258 | /* -------------------------------------------------------------------- | ||
1259 | * TWI | ||
1260 | * -------------------------------------------------------------------- */ | ||
1261 | static struct resource atmel_twi0_resource[] __initdata = { | ||
1262 | PBMEM(0xffe00800), | ||
1263 | IRQ(5), | ||
1264 | }; | ||
1265 | static struct clk atmel_twi0_pclk = { | ||
1266 | .name = "twi_pclk", | ||
1267 | .parent = &pba_clk, | ||
1268 | .mode = pba_clk_mode, | ||
1269 | .get_rate = pba_clk_get_rate, | ||
1270 | .index = 2, | ||
1271 | }; | ||
1272 | |||
1273 | struct platform_device *__init at32_add_device_twi(unsigned int id, | ||
1274 | struct i2c_board_info *b, | ||
1275 | unsigned int n) | ||
1276 | { | ||
1277 | struct platform_device *pdev; | ||
1278 | u32 pin_mask; | ||
1279 | |||
1280 | if (id != 0) | ||
1281 | return NULL; | ||
1282 | |||
1283 | pdev = platform_device_alloc("atmel_twi", id); | ||
1284 | if (!pdev) | ||
1285 | return NULL; | ||
1286 | |||
1287 | if (platform_device_add_resources(pdev, atmel_twi0_resource, | ||
1288 | ARRAY_SIZE(atmel_twi0_resource))) | ||
1289 | goto err_add_resources; | ||
1290 | |||
1291 | pin_mask = (1 << 6) | (1 << 7); /* SDA & SDL */ | ||
1292 | |||
1293 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
1294 | |||
1295 | atmel_twi0_pclk.dev = &pdev->dev; | ||
1296 | |||
1297 | if (b) | ||
1298 | i2c_register_board_info(id, b, n); | ||
1299 | |||
1300 | platform_device_add(pdev); | ||
1301 | return pdev; | ||
1302 | |||
1303 | err_add_resources: | ||
1304 | platform_device_put(pdev); | ||
1305 | return NULL; | ||
1306 | } | ||
1307 | |||
1308 | /* -------------------------------------------------------------------- | ||
1309 | * MMC | ||
1310 | * -------------------------------------------------------------------- */ | ||
1311 | static struct resource atmel_mci0_resource[] __initdata = { | ||
1312 | PBMEM(0xfff02400), | ||
1313 | IRQ(28), | ||
1314 | }; | ||
1315 | static struct clk atmel_mci0_pclk = { | ||
1316 | .name = "mci_clk", | ||
1317 | .parent = &pbb_clk, | ||
1318 | .mode = pbb_clk_mode, | ||
1319 | .get_rate = pbb_clk_get_rate, | ||
1320 | .index = 9, | ||
1321 | }; | ||
1322 | |||
1323 | static bool at32_mci_dma_filter(struct dma_chan *chan, void *pdata) | ||
1324 | { | ||
1325 | struct dw_dma_slave *sl = pdata; | ||
1326 | |||
1327 | if (!sl) | ||
1328 | return false; | ||
1329 | |||
1330 | if (sl->dma_dev == chan->device->dev) { | ||
1331 | chan->private = sl; | ||
1332 | return true; | ||
1333 | } | ||
1334 | |||
1335 | return false; | ||
1336 | } | ||
1337 | |||
1338 | struct platform_device *__init | ||
1339 | at32_add_device_mci(unsigned int id, struct mci_platform_data *data) | ||
1340 | { | ||
1341 | struct platform_device *pdev; | ||
1342 | struct dw_dma_slave *slave; | ||
1343 | u32 pioa_mask; | ||
1344 | u32 piob_mask; | ||
1345 | |||
1346 | if (id != 0 || !data) | ||
1347 | return NULL; | ||
1348 | |||
1349 | /* Must have at least one usable slot */ | ||
1350 | if (!data->slot[0].bus_width && !data->slot[1].bus_width) | ||
1351 | return NULL; | ||
1352 | |||
1353 | pdev = platform_device_alloc("atmel_mci", id); | ||
1354 | if (!pdev) | ||
1355 | goto fail; | ||
1356 | |||
1357 | if (platform_device_add_resources(pdev, atmel_mci0_resource, | ||
1358 | ARRAY_SIZE(atmel_mci0_resource))) | ||
1359 | goto fail; | ||
1360 | |||
1361 | slave = kzalloc(sizeof(*slave), GFP_KERNEL); | ||
1362 | if (!slave) | ||
1363 | goto fail; | ||
1364 | |||
1365 | slave->dma_dev = &dw_dmac0_device.dev; | ||
1366 | slave->src_id = 0; | ||
1367 | slave->dst_id = 1; | ||
1368 | slave->m_master = 1; | ||
1369 | slave->p_master = 0; | ||
1370 | |||
1371 | data->dma_slave = slave; | ||
1372 | data->dma_filter = at32_mci_dma_filter; | ||
1373 | |||
1374 | if (platform_device_add_data(pdev, data, | ||
1375 | sizeof(struct mci_platform_data))) | ||
1376 | goto fail_free; | ||
1377 | |||
1378 | /* CLK line is common to both slots */ | ||
1379 | pioa_mask = 1 << 10; | ||
1380 | |||
1381 | switch (data->slot[0].bus_width) { | ||
1382 | case 4: | ||
1383 | pioa_mask |= 1 << 13; /* DATA1 */ | ||
1384 | pioa_mask |= 1 << 14; /* DATA2 */ | ||
1385 | pioa_mask |= 1 << 15; /* DATA3 */ | ||
1386 | /* fall through */ | ||
1387 | case 1: | ||
1388 | pioa_mask |= 1 << 11; /* CMD */ | ||
1389 | pioa_mask |= 1 << 12; /* DATA0 */ | ||
1390 | |||
1391 | if (gpio_is_valid(data->slot[0].detect_pin)) | ||
1392 | at32_select_gpio(data->slot[0].detect_pin, 0); | ||
1393 | if (gpio_is_valid(data->slot[0].wp_pin)) | ||
1394 | at32_select_gpio(data->slot[0].wp_pin, 0); | ||
1395 | break; | ||
1396 | case 0: | ||
1397 | /* Slot is unused */ | ||
1398 | break; | ||
1399 | default: | ||
1400 | goto fail_free; | ||
1401 | } | ||
1402 | |||
1403 | select_peripheral(PIOA, pioa_mask, PERIPH_A, 0); | ||
1404 | piob_mask = 0; | ||
1405 | |||
1406 | switch (data->slot[1].bus_width) { | ||
1407 | case 4: | ||
1408 | piob_mask |= 1 << 8; /* DATA1 */ | ||
1409 | piob_mask |= 1 << 9; /* DATA2 */ | ||
1410 | piob_mask |= 1 << 10; /* DATA3 */ | ||
1411 | /* fall through */ | ||
1412 | case 1: | ||
1413 | piob_mask |= 1 << 6; /* CMD */ | ||
1414 | piob_mask |= 1 << 7; /* DATA0 */ | ||
1415 | select_peripheral(PIOB, piob_mask, PERIPH_B, 0); | ||
1416 | |||
1417 | if (gpio_is_valid(data->slot[1].detect_pin)) | ||
1418 | at32_select_gpio(data->slot[1].detect_pin, 0); | ||
1419 | if (gpio_is_valid(data->slot[1].wp_pin)) | ||
1420 | at32_select_gpio(data->slot[1].wp_pin, 0); | ||
1421 | break; | ||
1422 | case 0: | ||
1423 | /* Slot is unused */ | ||
1424 | break; | ||
1425 | default: | ||
1426 | if (!data->slot[0].bus_width) | ||
1427 | goto fail_free; | ||
1428 | |||
1429 | data->slot[1].bus_width = 0; | ||
1430 | break; | ||
1431 | } | ||
1432 | |||
1433 | atmel_mci0_pclk.dev = &pdev->dev; | ||
1434 | |||
1435 | platform_device_add(pdev); | ||
1436 | return pdev; | ||
1437 | |||
1438 | fail_free: | ||
1439 | kfree(slave); | ||
1440 | fail: | ||
1441 | data->dma_slave = NULL; | ||
1442 | platform_device_put(pdev); | ||
1443 | return NULL; | ||
1444 | } | ||
1445 | |||
1446 | /* -------------------------------------------------------------------- | ||
1447 | * LCDC | ||
1448 | * -------------------------------------------------------------------- */ | ||
1449 | #if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) | ||
1450 | static struct atmel_lcdfb_pdata atmel_lcdfb0_data; | ||
1451 | static struct resource atmel_lcdfb0_resource[] = { | ||
1452 | { | ||
1453 | .start = 0xff000000, | ||
1454 | .end = 0xff000fff, | ||
1455 | .flags = IORESOURCE_MEM, | ||
1456 | }, | ||
1457 | IRQ(1), | ||
1458 | { | ||
1459 | /* Placeholder for pre-allocated fb memory */ | ||
1460 | .start = 0x00000000, | ||
1461 | .end = 0x00000000, | ||
1462 | .flags = 0, | ||
1463 | }, | ||
1464 | }; | ||
1465 | DEFINE_DEV_DATA(atmel_lcdfb, 0); | ||
1466 | DEV_CLK(hclk, atmel_lcdfb0, hsb, 7); | ||
1467 | static struct clk atmel_lcdfb0_pixclk = { | ||
1468 | .name = "lcdc_clk", | ||
1469 | .dev = &atmel_lcdfb0_device.dev, | ||
1470 | .mode = genclk_mode, | ||
1471 | .get_rate = genclk_get_rate, | ||
1472 | .set_rate = genclk_set_rate, | ||
1473 | .set_parent = genclk_set_parent, | ||
1474 | .index = 7, | ||
1475 | }; | ||
1476 | |||
1477 | struct platform_device *__init | ||
1478 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_pdata *data, | ||
1479 | unsigned long fbmem_start, unsigned long fbmem_len, | ||
1480 | u64 pin_mask) | ||
1481 | { | ||
1482 | struct platform_device *pdev; | ||
1483 | struct atmel_lcdfb_pdata *info; | ||
1484 | struct fb_monspecs *monspecs; | ||
1485 | struct fb_videomode *modedb; | ||
1486 | unsigned int modedb_size; | ||
1487 | u32 portc_mask, portd_mask, porte_mask; | ||
1488 | |||
1489 | /* | ||
1490 | * Do a deep copy of the fb data, monspecs and modedb. Make | ||
1491 | * sure all allocations are done before setting up the | ||
1492 | * portmux. | ||
1493 | */ | ||
1494 | monspecs = kmemdup(data->default_monspecs, | ||
1495 | sizeof(struct fb_monspecs), GFP_KERNEL); | ||
1496 | if (!monspecs) | ||
1497 | return NULL; | ||
1498 | |||
1499 | modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; | ||
1500 | modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); | ||
1501 | if (!modedb) | ||
1502 | goto err_dup_modedb; | ||
1503 | monspecs->modedb = modedb; | ||
1504 | |||
1505 | switch (id) { | ||
1506 | case 0: | ||
1507 | pdev = &atmel_lcdfb0_device; | ||
1508 | |||
1509 | if (pin_mask == 0ULL) | ||
1510 | /* Default to "full" lcdc control signals and 24bit */ | ||
1511 | pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL; | ||
1512 | |||
1513 | /* LCDC on port C */ | ||
1514 | portc_mask = pin_mask & 0xfff80000; | ||
1515 | select_peripheral(PIOC, portc_mask, PERIPH_A, 0); | ||
1516 | |||
1517 | /* LCDC on port D */ | ||
1518 | portd_mask = pin_mask & 0x0003ffff; | ||
1519 | select_peripheral(PIOD, portd_mask, PERIPH_A, 0); | ||
1520 | |||
1521 | /* LCDC on port E */ | ||
1522 | porte_mask = (pin_mask >> 32) & 0x0007ffff; | ||
1523 | select_peripheral(PIOE, porte_mask, PERIPH_B, 0); | ||
1524 | |||
1525 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); | ||
1526 | clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); | ||
1527 | break; | ||
1528 | |||
1529 | default: | ||
1530 | goto err_invalid_id; | ||
1531 | } | ||
1532 | |||
1533 | if (fbmem_len) { | ||
1534 | pdev->resource[2].start = fbmem_start; | ||
1535 | pdev->resource[2].end = fbmem_start + fbmem_len - 1; | ||
1536 | pdev->resource[2].flags = IORESOURCE_MEM; | ||
1537 | } | ||
1538 | |||
1539 | info = pdev->dev.platform_data; | ||
1540 | memcpy(info, data, sizeof(struct atmel_lcdfb_pdata)); | ||
1541 | info->default_monspecs = monspecs; | ||
1542 | |||
1543 | pdev->name = "at32ap-lcdfb"; | ||
1544 | |||
1545 | platform_device_register(pdev); | ||
1546 | return pdev; | ||
1547 | |||
1548 | err_invalid_id: | ||
1549 | kfree(modedb); | ||
1550 | err_dup_modedb: | ||
1551 | kfree(monspecs); | ||
1552 | return NULL; | ||
1553 | } | ||
1554 | #endif | ||
1555 | |||
1556 | /* -------------------------------------------------------------------- | ||
1557 | * PWM | ||
1558 | * -------------------------------------------------------------------- */ | ||
1559 | static struct resource atmel_pwm0_resource[] __initdata = { | ||
1560 | PBMEM(0xfff01400), | ||
1561 | IRQ(24), | ||
1562 | }; | ||
1563 | static struct clk atmel_pwm0_mck = { | ||
1564 | .name = "at91sam9rl-pwm", | ||
1565 | .parent = &pbb_clk, | ||
1566 | .mode = pbb_clk_mode, | ||
1567 | .get_rate = pbb_clk_get_rate, | ||
1568 | .index = 5, | ||
1569 | }; | ||
1570 | |||
1571 | struct platform_device *__init at32_add_device_pwm(u32 mask) | ||
1572 | { | ||
1573 | struct platform_device *pdev; | ||
1574 | u32 pin_mask; | ||
1575 | |||
1576 | if (!mask) | ||
1577 | return NULL; | ||
1578 | |||
1579 | pdev = platform_device_alloc("at91sam9rl-pwm", 0); | ||
1580 | if (!pdev) | ||
1581 | return NULL; | ||
1582 | |||
1583 | if (platform_device_add_resources(pdev, atmel_pwm0_resource, | ||
1584 | ARRAY_SIZE(atmel_pwm0_resource))) | ||
1585 | goto out_free_pdev; | ||
1586 | |||
1587 | pin_mask = 0; | ||
1588 | if (mask & (1 << 0)) | ||
1589 | pin_mask |= (1 << 28); | ||
1590 | if (mask & (1 << 1)) | ||
1591 | pin_mask |= (1 << 29); | ||
1592 | if (pin_mask > 0) | ||
1593 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
1594 | |||
1595 | pin_mask = 0; | ||
1596 | if (mask & (1 << 2)) | ||
1597 | pin_mask |= (1 << 21); | ||
1598 | if (mask & (1 << 3)) | ||
1599 | pin_mask |= (1 << 22); | ||
1600 | if (pin_mask > 0) | ||
1601 | select_peripheral(PIOA, pin_mask, PERIPH_B, 0); | ||
1602 | |||
1603 | atmel_pwm0_mck.dev = &pdev->dev; | ||
1604 | |||
1605 | platform_device_add(pdev); | ||
1606 | |||
1607 | return pdev; | ||
1608 | |||
1609 | out_free_pdev: | ||
1610 | platform_device_put(pdev); | ||
1611 | return NULL; | ||
1612 | } | ||
1613 | |||
1614 | /* -------------------------------------------------------------------- | ||
1615 | * SSC | ||
1616 | * -------------------------------------------------------------------- */ | ||
1617 | static struct resource ssc0_resource[] = { | ||
1618 | PBMEM(0xffe01c00), | ||
1619 | IRQ(10), | ||
1620 | }; | ||
1621 | DEFINE_DEV(ssc, 0); | ||
1622 | DEV_CLK(pclk, ssc0, pba, 7); | ||
1623 | |||
1624 | static struct resource ssc1_resource[] = { | ||
1625 | PBMEM(0xffe02000), | ||
1626 | IRQ(11), | ||
1627 | }; | ||
1628 | DEFINE_DEV(ssc, 1); | ||
1629 | DEV_CLK(pclk, ssc1, pba, 8); | ||
1630 | |||
1631 | static struct resource ssc2_resource[] = { | ||
1632 | PBMEM(0xffe02400), | ||
1633 | IRQ(12), | ||
1634 | }; | ||
1635 | DEFINE_DEV(ssc, 2); | ||
1636 | DEV_CLK(pclk, ssc2, pba, 9); | ||
1637 | |||
1638 | struct platform_device *__init | ||
1639 | at32_add_device_ssc(unsigned int id, unsigned int flags) | ||
1640 | { | ||
1641 | struct platform_device *pdev; | ||
1642 | u32 pin_mask = 0; | ||
1643 | |||
1644 | switch (id) { | ||
1645 | case 0: | ||
1646 | pdev = &ssc0_device; | ||
1647 | if (flags & ATMEL_SSC_RF) | ||
1648 | pin_mask |= (1 << 21); /* RF */ | ||
1649 | if (flags & ATMEL_SSC_RK) | ||
1650 | pin_mask |= (1 << 22); /* RK */ | ||
1651 | if (flags & ATMEL_SSC_TK) | ||
1652 | pin_mask |= (1 << 23); /* TK */ | ||
1653 | if (flags & ATMEL_SSC_TF) | ||
1654 | pin_mask |= (1 << 24); /* TF */ | ||
1655 | if (flags & ATMEL_SSC_TD) | ||
1656 | pin_mask |= (1 << 25); /* TD */ | ||
1657 | if (flags & ATMEL_SSC_RD) | ||
1658 | pin_mask |= (1 << 26); /* RD */ | ||
1659 | |||
1660 | if (pin_mask > 0) | ||
1661 | select_peripheral(PIOA, pin_mask, PERIPH_A, 0); | ||
1662 | |||
1663 | break; | ||
1664 | case 1: | ||
1665 | pdev = &ssc1_device; | ||
1666 | if (flags & ATMEL_SSC_RF) | ||
1667 | pin_mask |= (1 << 0); /* RF */ | ||
1668 | if (flags & ATMEL_SSC_RK) | ||
1669 | pin_mask |= (1 << 1); /* RK */ | ||
1670 | if (flags & ATMEL_SSC_TK) | ||
1671 | pin_mask |= (1 << 2); /* TK */ | ||
1672 | if (flags & ATMEL_SSC_TF) | ||
1673 | pin_mask |= (1 << 3); /* TF */ | ||
1674 | if (flags & ATMEL_SSC_TD) | ||
1675 | pin_mask |= (1 << 4); /* TD */ | ||
1676 | if (flags & ATMEL_SSC_RD) | ||
1677 | pin_mask |= (1 << 5); /* RD */ | ||
1678 | |||
1679 | if (pin_mask > 0) | ||
1680 | select_peripheral(PIOA, pin_mask, PERIPH_B, 0); | ||
1681 | |||
1682 | break; | ||
1683 | case 2: | ||
1684 | pdev = &ssc2_device; | ||
1685 | if (flags & ATMEL_SSC_TD) | ||
1686 | pin_mask |= (1 << 13); /* TD */ | ||
1687 | if (flags & ATMEL_SSC_RD) | ||
1688 | pin_mask |= (1 << 14); /* RD */ | ||
1689 | if (flags & ATMEL_SSC_TK) | ||
1690 | pin_mask |= (1 << 15); /* TK */ | ||
1691 | if (flags & ATMEL_SSC_TF) | ||
1692 | pin_mask |= (1 << 16); /* TF */ | ||
1693 | if (flags & ATMEL_SSC_RF) | ||
1694 | pin_mask |= (1 << 17); /* RF */ | ||
1695 | if (flags & ATMEL_SSC_RK) | ||
1696 | pin_mask |= (1 << 18); /* RK */ | ||
1697 | |||
1698 | if (pin_mask > 0) | ||
1699 | select_peripheral(PIOB, pin_mask, PERIPH_A, 0); | ||
1700 | |||
1701 | break; | ||
1702 | default: | ||
1703 | return NULL; | ||
1704 | } | ||
1705 | |||
1706 | platform_device_register(pdev); | ||
1707 | return pdev; | ||
1708 | } | ||
1709 | |||
1710 | /* -------------------------------------------------------------------- | ||
1711 | * USB Device Controller | ||
1712 | * -------------------------------------------------------------------- */ | ||
1713 | static struct resource usba0_resource[] __initdata = { | ||
1714 | { | ||
1715 | .start = 0xff300000, | ||
1716 | .end = 0xff3fffff, | ||
1717 | .flags = IORESOURCE_MEM, | ||
1718 | }, { | ||
1719 | .start = 0xfff03000, | ||
1720 | .end = 0xfff033ff, | ||
1721 | .flags = IORESOURCE_MEM, | ||
1722 | }, | ||
1723 | IRQ(31), | ||
1724 | }; | ||
1725 | static struct clk usba0_pclk = { | ||
1726 | .name = "pclk", | ||
1727 | .parent = &pbb_clk, | ||
1728 | .mode = pbb_clk_mode, | ||
1729 | .get_rate = pbb_clk_get_rate, | ||
1730 | .index = 12, | ||
1731 | }; | ||
1732 | static struct clk usba0_hclk = { | ||
1733 | .name = "hclk", | ||
1734 | .parent = &hsb_clk, | ||
1735 | .mode = hsb_clk_mode, | ||
1736 | .get_rate = hsb_clk_get_rate, | ||
1737 | .index = 6, | ||
1738 | }; | ||
1739 | |||
1740 | #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ | ||
1741 | [idx] = { \ | ||
1742 | .name = nam, \ | ||
1743 | .index = idx, \ | ||
1744 | .fifo_size = maxpkt, \ | ||
1745 | .nr_banks = maxbk, \ | ||
1746 | .can_dma = dma, \ | ||
1747 | .can_isoc = isoc, \ | ||
1748 | } | ||
1749 | |||
1750 | static struct usba_ep_data at32_usba_ep[] __initdata = { | ||
1751 | EP("ep0", 0, 64, 1, 0, 0), | ||
1752 | EP("ep1", 1, 512, 2, 1, 1), | ||
1753 | EP("ep2", 2, 512, 2, 1, 1), | ||
1754 | EP("ep3-int", 3, 64, 3, 1, 0), | ||
1755 | EP("ep4-int", 4, 64, 3, 1, 0), | ||
1756 | EP("ep5", 5, 1024, 3, 1, 1), | ||
1757 | EP("ep6", 6, 1024, 3, 1, 1), | ||
1758 | }; | ||
1759 | |||
1760 | #undef EP | ||
1761 | |||
1762 | struct platform_device *__init | ||
1763 | at32_add_device_usba(unsigned int id, struct usba_platform_data *data) | ||
1764 | { | ||
1765 | /* | ||
1766 | * pdata doesn't have room for any endpoints, so we need to | ||
1767 | * append room for the ones we need right after it. | ||
1768 | */ | ||
1769 | struct { | ||
1770 | struct usba_platform_data pdata; | ||
1771 | struct usba_ep_data ep[7]; | ||
1772 | } usba_data; | ||
1773 | struct platform_device *pdev; | ||
1774 | |||
1775 | if (id != 0) | ||
1776 | return NULL; | ||
1777 | |||
1778 | pdev = platform_device_alloc("atmel_usba_udc", 0); | ||
1779 | if (!pdev) | ||
1780 | return NULL; | ||
1781 | |||
1782 | if (platform_device_add_resources(pdev, usba0_resource, | ||
1783 | ARRAY_SIZE(usba0_resource))) | ||
1784 | goto out_free_pdev; | ||
1785 | |||
1786 | if (data) { | ||
1787 | usba_data.pdata.vbus_pin = data->vbus_pin; | ||
1788 | usba_data.pdata.vbus_pin_inverted = data->vbus_pin_inverted; | ||
1789 | } else { | ||
1790 | usba_data.pdata.vbus_pin = -EINVAL; | ||
1791 | usba_data.pdata.vbus_pin_inverted = -EINVAL; | ||
1792 | } | ||
1793 | |||
1794 | data = &usba_data.pdata; | ||
1795 | data->num_ep = ARRAY_SIZE(at32_usba_ep); | ||
1796 | memcpy(data->ep, at32_usba_ep, sizeof(at32_usba_ep)); | ||
1797 | |||
1798 | if (platform_device_add_data(pdev, data, sizeof(usba_data))) | ||
1799 | goto out_free_pdev; | ||
1800 | |||
1801 | if (gpio_is_valid(data->vbus_pin)) | ||
1802 | at32_select_gpio(data->vbus_pin, 0); | ||
1803 | |||
1804 | usba0_pclk.dev = &pdev->dev; | ||
1805 | usba0_hclk.dev = &pdev->dev; | ||
1806 | |||
1807 | platform_device_add(pdev); | ||
1808 | |||
1809 | return pdev; | ||
1810 | |||
1811 | out_free_pdev: | ||
1812 | platform_device_put(pdev); | ||
1813 | return NULL; | ||
1814 | } | ||
1815 | |||
1816 | /* -------------------------------------------------------------------- | ||
1817 | * IDE / CompactFlash | ||
1818 | * -------------------------------------------------------------------- */ | ||
1819 | #if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001) | ||
1820 | static struct resource at32_smc_cs4_resource[] __initdata = { | ||
1821 | { | ||
1822 | .start = 0x04000000, | ||
1823 | .end = 0x07ffffff, | ||
1824 | .flags = IORESOURCE_MEM, | ||
1825 | }, | ||
1826 | IRQ(~0UL), /* Magic IRQ will be overridden */ | ||
1827 | }; | ||
1828 | static struct resource at32_smc_cs5_resource[] __initdata = { | ||
1829 | { | ||
1830 | .start = 0x20000000, | ||
1831 | .end = 0x23ffffff, | ||
1832 | .flags = IORESOURCE_MEM, | ||
1833 | }, | ||
1834 | IRQ(~0UL), /* Magic IRQ will be overridden */ | ||
1835 | }; | ||
1836 | |||
1837 | static int __init at32_init_ide_or_cf(struct platform_device *pdev, | ||
1838 | unsigned int cs, unsigned int extint) | ||
1839 | { | ||
1840 | static unsigned int extint_pin_map[4] __initdata = { | ||
1841 | (1 << 25), | ||
1842 | (1 << 26), | ||
1843 | (1 << 27), | ||
1844 | (1 << 28), | ||
1845 | }; | ||
1846 | static bool common_pins_initialized __initdata = false; | ||
1847 | unsigned int extint_pin; | ||
1848 | int ret; | ||
1849 | u32 pin_mask; | ||
1850 | |||
1851 | if (extint >= ARRAY_SIZE(extint_pin_map)) | ||
1852 | return -EINVAL; | ||
1853 | extint_pin = extint_pin_map[extint]; | ||
1854 | |||
1855 | switch (cs) { | ||
1856 | case 4: | ||
1857 | ret = platform_device_add_resources(pdev, | ||
1858 | at32_smc_cs4_resource, | ||
1859 | ARRAY_SIZE(at32_smc_cs4_resource)); | ||
1860 | if (ret) | ||
1861 | return ret; | ||
1862 | |||
1863 | /* NCS4 -> OE_N */ | ||
1864 | select_peripheral(PIOE, (1 << 21), PERIPH_A, 0); | ||
1865 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE); | ||
1866 | break; | ||
1867 | case 5: | ||
1868 | ret = platform_device_add_resources(pdev, | ||
1869 | at32_smc_cs5_resource, | ||
1870 | ARRAY_SIZE(at32_smc_cs5_resource)); | ||
1871 | if (ret) | ||
1872 | return ret; | ||
1873 | |||
1874 | /* NCS5 -> OE_N */ | ||
1875 | select_peripheral(PIOE, (1 << 22), PERIPH_A, 0); | ||
1876 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE); | ||
1877 | break; | ||
1878 | default: | ||
1879 | return -EINVAL; | ||
1880 | } | ||
1881 | |||
1882 | if (!common_pins_initialized) { | ||
1883 | pin_mask = (1 << 19); /* CFCE1 -> CS0_N */ | ||
1884 | pin_mask |= (1 << 20); /* CFCE2 -> CS1_N */ | ||
1885 | pin_mask |= (1 << 23); /* CFRNW -> DIR */ | ||
1886 | pin_mask |= (1 << 24); /* NWAIT <- IORDY */ | ||
1887 | |||
1888 | select_peripheral(PIOE, pin_mask, PERIPH_A, 0); | ||
1889 | |||
1890 | common_pins_initialized = true; | ||
1891 | } | ||
1892 | |||
1893 | select_peripheral(PIOB, extint_pin, PERIPH_A, AT32_GPIOF_DEGLITCH); | ||
1894 | |||
1895 | pdev->resource[1].start = EIM_IRQ_BASE + extint; | ||
1896 | pdev->resource[1].end = pdev->resource[1].start; | ||
1897 | |||
1898 | return 0; | ||
1899 | } | ||
1900 | |||
1901 | struct platform_device *__init | ||
1902 | at32_add_device_ide(unsigned int id, unsigned int extint, | ||
1903 | struct ide_platform_data *data) | ||
1904 | { | ||
1905 | struct platform_device *pdev; | ||
1906 | |||
1907 | pdev = platform_device_alloc("at32_ide", id); | ||
1908 | if (!pdev) | ||
1909 | goto fail; | ||
1910 | |||
1911 | if (platform_device_add_data(pdev, data, | ||
1912 | sizeof(struct ide_platform_data))) | ||
1913 | goto fail; | ||
1914 | |||
1915 | if (at32_init_ide_or_cf(pdev, data->cs, extint)) | ||
1916 | goto fail; | ||
1917 | |||
1918 | platform_device_add(pdev); | ||
1919 | return pdev; | ||
1920 | |||
1921 | fail: | ||
1922 | platform_device_put(pdev); | ||
1923 | return NULL; | ||
1924 | } | ||
1925 | |||
1926 | struct platform_device *__init | ||
1927 | at32_add_device_cf(unsigned int id, unsigned int extint, | ||
1928 | struct cf_platform_data *data) | ||
1929 | { | ||
1930 | struct platform_device *pdev; | ||
1931 | |||
1932 | pdev = platform_device_alloc("at32_cf", id); | ||
1933 | if (!pdev) | ||
1934 | goto fail; | ||
1935 | |||
1936 | if (platform_device_add_data(pdev, data, | ||
1937 | sizeof(struct cf_platform_data))) | ||
1938 | goto fail; | ||
1939 | |||
1940 | if (at32_init_ide_or_cf(pdev, data->cs, extint)) | ||
1941 | goto fail; | ||
1942 | |||
1943 | if (gpio_is_valid(data->detect_pin)) | ||
1944 | at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); | ||
1945 | if (gpio_is_valid(data->reset_pin)) | ||
1946 | at32_select_gpio(data->reset_pin, 0); | ||
1947 | if (gpio_is_valid(data->vcc_pin)) | ||
1948 | at32_select_gpio(data->vcc_pin, 0); | ||
1949 | /* READY is used as extint, so we can't select it as gpio */ | ||
1950 | |||
1951 | platform_device_add(pdev); | ||
1952 | return pdev; | ||
1953 | |||
1954 | fail: | ||
1955 | platform_device_put(pdev); | ||
1956 | return NULL; | ||
1957 | } | ||
1958 | #endif | ||
1959 | |||
1960 | /* -------------------------------------------------------------------- | ||
1961 | * NAND Flash / SmartMedia | ||
1962 | * -------------------------------------------------------------------- */ | ||
1963 | static struct resource smc_cs3_resource[] __initdata = { | ||
1964 | { | ||
1965 | .start = 0x0c000000, | ||
1966 | .end = 0x0fffffff, | ||
1967 | .flags = IORESOURCE_MEM, | ||
1968 | }, { | ||
1969 | .start = 0xfff03c00, | ||
1970 | .end = 0xfff03fff, | ||
1971 | .flags = IORESOURCE_MEM, | ||
1972 | }, | ||
1973 | }; | ||
1974 | |||
1975 | struct platform_device *__init | ||
1976 | at32_add_device_nand(unsigned int id, struct atmel_nand_data *data) | ||
1977 | { | ||
1978 | struct platform_device *pdev; | ||
1979 | |||
1980 | if (id != 0 || !data) | ||
1981 | return NULL; | ||
1982 | |||
1983 | pdev = platform_device_alloc("atmel_nand", id); | ||
1984 | if (!pdev) | ||
1985 | goto fail; | ||
1986 | |||
1987 | if (platform_device_add_resources(pdev, smc_cs3_resource, | ||
1988 | ARRAY_SIZE(smc_cs3_resource))) | ||
1989 | goto fail; | ||
1990 | |||
1991 | /* For at32ap7000, we use the reset workaround for nand driver */ | ||
1992 | data->need_reset_workaround = true; | ||
1993 | |||
1994 | if (platform_device_add_data(pdev, data, | ||
1995 | sizeof(struct atmel_nand_data))) | ||
1996 | goto fail; | ||
1997 | |||
1998 | hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_NAND_ENABLE); | ||
1999 | if (data->enable_pin) | ||
2000 | at32_select_gpio(data->enable_pin, | ||
2001 | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); | ||
2002 | if (data->rdy_pin) | ||
2003 | at32_select_gpio(data->rdy_pin, 0); | ||
2004 | if (data->det_pin) | ||
2005 | at32_select_gpio(data->det_pin, 0); | ||
2006 | |||
2007 | platform_device_add(pdev); | ||
2008 | return pdev; | ||
2009 | |||
2010 | fail: | ||
2011 | platform_device_put(pdev); | ||
2012 | return NULL; | ||
2013 | } | ||
2014 | |||
2015 | /* -------------------------------------------------------------------- | ||
2016 | * AC97C | ||
2017 | * -------------------------------------------------------------------- */ | ||
2018 | static struct resource atmel_ac97c0_resource[] __initdata = { | ||
2019 | PBMEM(0xfff02800), | ||
2020 | IRQ(29), | ||
2021 | }; | ||
2022 | static struct clk atmel_ac97c0_pclk = { | ||
2023 | .name = "pclk", | ||
2024 | .parent = &pbb_clk, | ||
2025 | .mode = pbb_clk_mode, | ||
2026 | .get_rate = pbb_clk_get_rate, | ||
2027 | .index = 10, | ||
2028 | }; | ||
2029 | |||
2030 | struct platform_device *__init | ||
2031 | at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, | ||
2032 | unsigned int flags) | ||
2033 | { | ||
2034 | struct platform_device *pdev; | ||
2035 | struct dw_dma_slave *rx_dws; | ||
2036 | struct dw_dma_slave *tx_dws; | ||
2037 | struct ac97c_platform_data _data; | ||
2038 | u32 pin_mask; | ||
2039 | |||
2040 | if (id != 0) | ||
2041 | return NULL; | ||
2042 | |||
2043 | pdev = platform_device_alloc("atmel_ac97c", id); | ||
2044 | if (!pdev) | ||
2045 | return NULL; | ||
2046 | |||
2047 | if (platform_device_add_resources(pdev, atmel_ac97c0_resource, | ||
2048 | ARRAY_SIZE(atmel_ac97c0_resource))) | ||
2049 | goto out_free_resources; | ||
2050 | |||
2051 | if (!data) { | ||
2052 | data = &_data; | ||
2053 | memset(data, 0, sizeof(struct ac97c_platform_data)); | ||
2054 | data->reset_pin = -ENODEV; | ||
2055 | } | ||
2056 | |||
2057 | rx_dws = &data->rx_dws; | ||
2058 | tx_dws = &data->tx_dws; | ||
2059 | |||
2060 | /* Check if DMA slave interface for capture should be configured. */ | ||
2061 | if (flags & AC97C_CAPTURE) { | ||
2062 | rx_dws->dma_dev = &dw_dmac0_device.dev; | ||
2063 | rx_dws->src_id = 3; | ||
2064 | rx_dws->m_master = 0; | ||
2065 | rx_dws->p_master = 1; | ||
2066 | } | ||
2067 | |||
2068 | /* Check if DMA slave interface for playback should be configured. */ | ||
2069 | if (flags & AC97C_PLAYBACK) { | ||
2070 | tx_dws->dma_dev = &dw_dmac0_device.dev; | ||
2071 | tx_dws->dst_id = 4; | ||
2072 | tx_dws->m_master = 0; | ||
2073 | tx_dws->p_master = 1; | ||
2074 | } | ||
2075 | |||
2076 | if (platform_device_add_data(pdev, data, | ||
2077 | sizeof(struct ac97c_platform_data))) | ||
2078 | goto out_free_resources; | ||
2079 | |||
2080 | /* SDO | SYNC | SCLK | SDI */ | ||
2081 | pin_mask = (1 << 20) | (1 << 21) | (1 << 22) | (1 << 23); | ||
2082 | |||
2083 | select_peripheral(PIOB, pin_mask, PERIPH_B, 0); | ||
2084 | |||
2085 | if (gpio_is_valid(data->reset_pin)) | ||
2086 | at32_select_gpio(data->reset_pin, AT32_GPIOF_OUTPUT | ||
2087 | | AT32_GPIOF_HIGH); | ||
2088 | |||
2089 | atmel_ac97c0_pclk.dev = &pdev->dev; | ||
2090 | |||
2091 | platform_device_add(pdev); | ||
2092 | return pdev; | ||
2093 | |||
2094 | out_free_resources: | ||
2095 | platform_device_put(pdev); | ||
2096 | return NULL; | ||
2097 | } | ||
2098 | |||
2099 | /* -------------------------------------------------------------------- | ||
2100 | * ABDAC | ||
2101 | * -------------------------------------------------------------------- */ | ||
2102 | static struct resource abdac0_resource[] __initdata = { | ||
2103 | PBMEM(0xfff02000), | ||
2104 | IRQ(27), | ||
2105 | }; | ||
2106 | static struct clk abdac0_pclk = { | ||
2107 | .name = "pclk", | ||
2108 | .parent = &pbb_clk, | ||
2109 | .mode = pbb_clk_mode, | ||
2110 | .get_rate = pbb_clk_get_rate, | ||
2111 | .index = 8, | ||
2112 | }; | ||
2113 | static struct clk abdac0_sample_clk = { | ||
2114 | .name = "sample_clk", | ||
2115 | .mode = genclk_mode, | ||
2116 | .get_rate = genclk_get_rate, | ||
2117 | .set_rate = genclk_set_rate, | ||
2118 | .set_parent = genclk_set_parent, | ||
2119 | .index = 6, | ||
2120 | }; | ||
2121 | |||
2122 | struct platform_device *__init | ||
2123 | at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data) | ||
2124 | { | ||
2125 | struct platform_device *pdev; | ||
2126 | struct dw_dma_slave *dws; | ||
2127 | u32 pin_mask; | ||
2128 | |||
2129 | if (id != 0 || !data) | ||
2130 | return NULL; | ||
2131 | |||
2132 | pdev = platform_device_alloc("atmel_abdac", id); | ||
2133 | if (!pdev) | ||
2134 | return NULL; | ||
2135 | |||
2136 | if (platform_device_add_resources(pdev, abdac0_resource, | ||
2137 | ARRAY_SIZE(abdac0_resource))) | ||
2138 | goto out_free_resources; | ||
2139 | |||
2140 | dws = &data->dws; | ||
2141 | |||
2142 | dws->dma_dev = &dw_dmac0_device.dev; | ||
2143 | dws->dst_id = 2; | ||
2144 | dws->m_master = 0; | ||
2145 | dws->p_master = 1; | ||
2146 | |||
2147 | if (platform_device_add_data(pdev, data, | ||
2148 | sizeof(struct atmel_abdac_pdata))) | ||
2149 | goto out_free_resources; | ||
2150 | |||
2151 | pin_mask = (1 << 20) | (1 << 22); /* DATA1 & DATAN1 */ | ||
2152 | pin_mask |= (1 << 21) | (1 << 23); /* DATA0 & DATAN0 */ | ||
2153 | |||
2154 | select_peripheral(PIOB, pin_mask, PERIPH_A, 0); | ||
2155 | |||
2156 | abdac0_pclk.dev = &pdev->dev; | ||
2157 | abdac0_sample_clk.dev = &pdev->dev; | ||
2158 | |||
2159 | platform_device_add(pdev); | ||
2160 | return pdev; | ||
2161 | |||
2162 | out_free_resources: | ||
2163 | platform_device_put(pdev); | ||
2164 | return NULL; | ||
2165 | } | ||
2166 | |||
2167 | /* -------------------------------------------------------------------- | ||
2168 | * GCLK | ||
2169 | * -------------------------------------------------------------------- */ | ||
2170 | static struct clk gclk0 = { | ||
2171 | .name = "gclk0", | ||
2172 | .mode = genclk_mode, | ||
2173 | .get_rate = genclk_get_rate, | ||
2174 | .set_rate = genclk_set_rate, | ||
2175 | .set_parent = genclk_set_parent, | ||
2176 | .index = 0, | ||
2177 | }; | ||
2178 | static struct clk gclk1 = { | ||
2179 | .name = "gclk1", | ||
2180 | .mode = genclk_mode, | ||
2181 | .get_rate = genclk_get_rate, | ||
2182 | .set_rate = genclk_set_rate, | ||
2183 | .set_parent = genclk_set_parent, | ||
2184 | .index = 1, | ||
2185 | }; | ||
2186 | static struct clk gclk2 = { | ||
2187 | .name = "gclk2", | ||
2188 | .mode = genclk_mode, | ||
2189 | .get_rate = genclk_get_rate, | ||
2190 | .set_rate = genclk_set_rate, | ||
2191 | .set_parent = genclk_set_parent, | ||
2192 | .index = 2, | ||
2193 | }; | ||
2194 | static struct clk gclk3 = { | ||
2195 | .name = "gclk3", | ||
2196 | .mode = genclk_mode, | ||
2197 | .get_rate = genclk_get_rate, | ||
2198 | .set_rate = genclk_set_rate, | ||
2199 | .set_parent = genclk_set_parent, | ||
2200 | .index = 3, | ||
2201 | }; | ||
2202 | static struct clk gclk4 = { | ||
2203 | .name = "gclk4", | ||
2204 | .mode = genclk_mode, | ||
2205 | .get_rate = genclk_get_rate, | ||
2206 | .set_rate = genclk_set_rate, | ||
2207 | .set_parent = genclk_set_parent, | ||
2208 | .index = 4, | ||
2209 | }; | ||
2210 | |||
2211 | static __initdata struct clk *init_clocks[] = { | ||
2212 | &osc32k, | ||
2213 | &osc0, | ||
2214 | &osc1, | ||
2215 | &pll0, | ||
2216 | &pll1, | ||
2217 | &cpu_clk, | ||
2218 | &hsb_clk, | ||
2219 | &pba_clk, | ||
2220 | &pbb_clk, | ||
2221 | &at32_pm_pclk, | ||
2222 | &at32_intc0_pclk, | ||
2223 | &at32_hmatrix_clk, | ||
2224 | &ebi_clk, | ||
2225 | &hramc_clk, | ||
2226 | &sdramc_clk, | ||
2227 | &smc0_pclk, | ||
2228 | &smc0_mck, | ||
2229 | &pdc_hclk, | ||
2230 | &pdc_pclk, | ||
2231 | &dw_dmac0_hclk, | ||
2232 | &pico_clk, | ||
2233 | &pio0_mck, | ||
2234 | &pio1_mck, | ||
2235 | &pio2_mck, | ||
2236 | &pio3_mck, | ||
2237 | &pio4_mck, | ||
2238 | &at32_tcb0_t0_clk, | ||
2239 | &at32_tcb1_t0_clk, | ||
2240 | &atmel_psif0_pclk, | ||
2241 | &atmel_psif1_pclk, | ||
2242 | &atmel_usart0_usart, | ||
2243 | &atmel_usart1_usart, | ||
2244 | &atmel_usart2_usart, | ||
2245 | &atmel_usart3_usart, | ||
2246 | &atmel_pwm0_mck, | ||
2247 | #if defined(CONFIG_CPU_AT32AP7000) | ||
2248 | &macb0_hclk, | ||
2249 | &macb0_pclk, | ||
2250 | &macb1_hclk, | ||
2251 | &macb1_pclk, | ||
2252 | #endif | ||
2253 | &atmel_spi0_spi_clk, | ||
2254 | &atmel_spi1_spi_clk, | ||
2255 | &atmel_twi0_pclk, | ||
2256 | &atmel_mci0_pclk, | ||
2257 | #if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) | ||
2258 | &atmel_lcdfb0_hclk, | ||
2259 | &atmel_lcdfb0_pixclk, | ||
2260 | #endif | ||
2261 | &ssc0_pclk, | ||
2262 | &ssc1_pclk, | ||
2263 | &ssc2_pclk, | ||
2264 | &usba0_hclk, | ||
2265 | &usba0_pclk, | ||
2266 | &atmel_ac97c0_pclk, | ||
2267 | &abdac0_pclk, | ||
2268 | &abdac0_sample_clk, | ||
2269 | &gclk0, | ||
2270 | &gclk1, | ||
2271 | &gclk2, | ||
2272 | &gclk3, | ||
2273 | &gclk4, | ||
2274 | }; | ||
2275 | |||
2276 | void __init setup_platform(void) | ||
2277 | { | ||
2278 | u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; | ||
2279 | int i; | ||
2280 | |||
2281 | if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { | ||
2282 | main_clock = &pll0; | ||
2283 | cpu_clk.parent = &pll0; | ||
2284 | } else { | ||
2285 | main_clock = &osc0; | ||
2286 | cpu_clk.parent = &osc0; | ||
2287 | } | ||
2288 | |||
2289 | if (pm_readl(PLL0) & PM_BIT(PLLOSC)) | ||
2290 | pll0.parent = &osc1; | ||
2291 | if (pm_readl(PLL1) & PM_BIT(PLLOSC)) | ||
2292 | pll1.parent = &osc1; | ||
2293 | |||
2294 | genclk_init_parent(&gclk0); | ||
2295 | genclk_init_parent(&gclk1); | ||
2296 | genclk_init_parent(&gclk2); | ||
2297 | genclk_init_parent(&gclk3); | ||
2298 | genclk_init_parent(&gclk4); | ||
2299 | #if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) | ||
2300 | genclk_init_parent(&atmel_lcdfb0_pixclk); | ||
2301 | #endif | ||
2302 | genclk_init_parent(&abdac0_sample_clk); | ||
2303 | |||
2304 | /* | ||
2305 | * Build initial dynamic clock list by registering all clocks | ||
2306 | * from the array. | ||
2307 | * At the same time, turn on all clocks that have at least one | ||
2308 | * user already, and turn off everything else. We only do this | ||
2309 | * for module clocks, and even though it isn't particularly | ||
2310 | * pretty to check the address of the mode function, it should | ||
2311 | * do the trick... | ||
2312 | */ | ||
2313 | for (i = 0; i < ARRAY_SIZE(init_clocks); i++) { | ||
2314 | struct clk *clk = init_clocks[i]; | ||
2315 | |||
2316 | /* first, register clock */ | ||
2317 | at32_clk_register(clk); | ||
2318 | |||
2319 | if (clk->users == 0) | ||
2320 | continue; | ||
2321 | |||
2322 | if (clk->mode == &cpu_clk_mode) | ||
2323 | cpu_mask |= 1 << clk->index; | ||
2324 | else if (clk->mode == &hsb_clk_mode) | ||
2325 | hsb_mask |= 1 << clk->index; | ||
2326 | else if (clk->mode == &pba_clk_mode) | ||
2327 | pba_mask |= 1 << clk->index; | ||
2328 | else if (clk->mode == &pbb_clk_mode) | ||
2329 | pbb_mask |= 1 << clk->index; | ||
2330 | } | ||
2331 | |||
2332 | pm_writel(CPU_MASK, cpu_mask); | ||
2333 | pm_writel(HSB_MASK, hsb_mask); | ||
2334 | pm_writel(PBA_MASK, pba_mask); | ||
2335 | pm_writel(PBB_MASK, pbb_mask); | ||
2336 | |||
2337 | /* Initialize the port muxes */ | ||
2338 | at32_init_pio(&pio0_device); | ||
2339 | at32_init_pio(&pio1_device); | ||
2340 | at32_init_pio(&pio2_device); | ||
2341 | at32_init_pio(&pio3_device); | ||
2342 | at32_init_pio(&pio4_device); | ||
2343 | } | ||
2344 | |||
2345 | struct gen_pool *sram_pool; | ||
2346 | |||
2347 | static int __init sram_init(void) | ||
2348 | { | ||
2349 | struct gen_pool *pool; | ||
2350 | |||
2351 | /* 1KiB granularity */ | ||
2352 | pool = gen_pool_create(10, -1); | ||
2353 | if (!pool) | ||
2354 | goto fail; | ||
2355 | |||
2356 | if (gen_pool_add(pool, 0x24000000, 0x8000, -1)) | ||
2357 | goto err_pool_add; | ||
2358 | |||
2359 | sram_pool = pool; | ||
2360 | return 0; | ||
2361 | |||
2362 | err_pool_add: | ||
2363 | gen_pool_destroy(pool); | ||
2364 | fail: | ||
2365 | pr_err("Failed to create SRAM pool\n"); | ||
2366 | return -ENOMEM; | ||
2367 | } | ||
2368 | core_initcall(sram_init); | ||
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c deleted file mode 100644 index fdf1caecb7b9..000000000000 --- a/arch/avr32/mach-at32ap/clock.c +++ /dev/null | |||
@@ -1,334 +0,0 @@ | |||
1 | /* | ||
2 | * Clock management for AT32AP CPUs | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * Based on arch/arm/mach-at91/clock.c | ||
7 | * Copyright (C) 2005 David Brownell | ||
8 | * Copyright (C) 2005 Ivan Kokshaysky | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | #include <linux/clk.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/export.h> | ||
17 | #include <linux/device.h> | ||
18 | #include <linux/string.h> | ||
19 | #include <linux/list.h> | ||
20 | |||
21 | #include <mach/chip.h> | ||
22 | |||
23 | #include "clock.h" | ||
24 | |||
25 | /* at32 clock list */ | ||
26 | static LIST_HEAD(at32_clock_list); | ||
27 | |||
28 | static DEFINE_SPINLOCK(clk_lock); | ||
29 | static DEFINE_SPINLOCK(clk_list_lock); | ||
30 | |||
31 | void at32_clk_register(struct clk *clk) | ||
32 | { | ||
33 | spin_lock(&clk_list_lock); | ||
34 | /* add the new item to the end of the list */ | ||
35 | list_add_tail(&clk->list, &at32_clock_list); | ||
36 | spin_unlock(&clk_list_lock); | ||
37 | } | ||
38 | |||
39 | static struct clk *__clk_get(struct device *dev, const char *id) | ||
40 | { | ||
41 | struct clk *clk; | ||
42 | |||
43 | list_for_each_entry(clk, &at32_clock_list, list) { | ||
44 | if (clk->dev == dev && strcmp(id, clk->name) == 0) { | ||
45 | return clk; | ||
46 | } | ||
47 | } | ||
48 | |||
49 | return ERR_PTR(-ENOENT); | ||
50 | } | ||
51 | |||
52 | struct clk *clk_get(struct device *dev, const char *id) | ||
53 | { | ||
54 | struct clk *clk; | ||
55 | |||
56 | spin_lock(&clk_list_lock); | ||
57 | clk = __clk_get(dev, id); | ||
58 | spin_unlock(&clk_list_lock); | ||
59 | |||
60 | return clk; | ||
61 | } | ||
62 | |||
63 | EXPORT_SYMBOL(clk_get); | ||
64 | |||
65 | void clk_put(struct clk *clk) | ||
66 | { | ||
67 | /* clocks are static for now, we can't free them */ | ||
68 | } | ||
69 | EXPORT_SYMBOL(clk_put); | ||
70 | |||
71 | static void __clk_enable(struct clk *clk) | ||
72 | { | ||
73 | if (clk->parent) | ||
74 | __clk_enable(clk->parent); | ||
75 | if (clk->users++ == 0 && clk->mode) | ||
76 | clk->mode(clk, 1); | ||
77 | } | ||
78 | |||
79 | int clk_enable(struct clk *clk) | ||
80 | { | ||
81 | unsigned long flags; | ||
82 | |||
83 | if (!clk) | ||
84 | return 0; | ||
85 | |||
86 | spin_lock_irqsave(&clk_lock, flags); | ||
87 | __clk_enable(clk); | ||
88 | spin_unlock_irqrestore(&clk_lock, flags); | ||
89 | |||
90 | return 0; | ||
91 | } | ||
92 | EXPORT_SYMBOL(clk_enable); | ||
93 | |||
94 | static void __clk_disable(struct clk *clk) | ||
95 | { | ||
96 | if (clk->users == 0) { | ||
97 | printk(KERN_ERR "%s: mismatched disable\n", clk->name); | ||
98 | WARN_ON(1); | ||
99 | return; | ||
100 | } | ||
101 | |||
102 | if (--clk->users == 0 && clk->mode) | ||
103 | clk->mode(clk, 0); | ||
104 | if (clk->parent) | ||
105 | __clk_disable(clk->parent); | ||
106 | } | ||
107 | |||
108 | void clk_disable(struct clk *clk) | ||
109 | { | ||
110 | unsigned long flags; | ||
111 | |||
112 | if (IS_ERR_OR_NULL(clk)) | ||
113 | return; | ||
114 | |||
115 | spin_lock_irqsave(&clk_lock, flags); | ||
116 | __clk_disable(clk); | ||
117 | spin_unlock_irqrestore(&clk_lock, flags); | ||
118 | } | ||
119 | EXPORT_SYMBOL(clk_disable); | ||
120 | |||
121 | unsigned long clk_get_rate(struct clk *clk) | ||
122 | { | ||
123 | unsigned long flags; | ||
124 | unsigned long rate; | ||
125 | |||
126 | if (!clk) | ||
127 | return 0; | ||
128 | |||
129 | spin_lock_irqsave(&clk_lock, flags); | ||
130 | rate = clk->get_rate(clk); | ||
131 | spin_unlock_irqrestore(&clk_lock, flags); | ||
132 | |||
133 | return rate; | ||
134 | } | ||
135 | EXPORT_SYMBOL(clk_get_rate); | ||
136 | |||
137 | long clk_round_rate(struct clk *clk, unsigned long rate) | ||
138 | { | ||
139 | unsigned long flags, actual_rate; | ||
140 | |||
141 | if (!clk) | ||
142 | return 0; | ||
143 | |||
144 | if (!clk->set_rate) | ||
145 | return -ENOSYS; | ||
146 | |||
147 | spin_lock_irqsave(&clk_lock, flags); | ||
148 | actual_rate = clk->set_rate(clk, rate, 0); | ||
149 | spin_unlock_irqrestore(&clk_lock, flags); | ||
150 | |||
151 | return actual_rate; | ||
152 | } | ||
153 | EXPORT_SYMBOL(clk_round_rate); | ||
154 | |||
155 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
156 | { | ||
157 | unsigned long flags; | ||
158 | long ret; | ||
159 | |||
160 | if (!clk) | ||
161 | return 0; | ||
162 | |||
163 | if (!clk->set_rate) | ||
164 | return -ENOSYS; | ||
165 | |||
166 | spin_lock_irqsave(&clk_lock, flags); | ||
167 | ret = clk->set_rate(clk, rate, 1); | ||
168 | spin_unlock_irqrestore(&clk_lock, flags); | ||
169 | |||
170 | return (ret < 0) ? ret : 0; | ||
171 | } | ||
172 | EXPORT_SYMBOL(clk_set_rate); | ||
173 | |||
174 | int clk_set_parent(struct clk *clk, struct clk *parent) | ||
175 | { | ||
176 | unsigned long flags; | ||
177 | int ret; | ||
178 | |||
179 | if (!clk) | ||
180 | return 0; | ||
181 | |||
182 | if (!clk->set_parent) | ||
183 | return -ENOSYS; | ||
184 | |||
185 | spin_lock_irqsave(&clk_lock, flags); | ||
186 | ret = clk->set_parent(clk, parent); | ||
187 | spin_unlock_irqrestore(&clk_lock, flags); | ||
188 | |||
189 | return ret; | ||
190 | } | ||
191 | EXPORT_SYMBOL(clk_set_parent); | ||
192 | |||
193 | struct clk *clk_get_parent(struct clk *clk) | ||
194 | { | ||
195 | return !clk ? NULL : clk->parent; | ||
196 | } | ||
197 | EXPORT_SYMBOL(clk_get_parent); | ||
198 | |||
199 | |||
200 | |||
201 | #ifdef CONFIG_DEBUG_FS | ||
202 | |||
203 | /* /sys/kernel/debug/at32ap_clk */ | ||
204 | |||
205 | #include <linux/io.h> | ||
206 | #include <linux/debugfs.h> | ||
207 | #include <linux/seq_file.h> | ||
208 | #include "pm.h" | ||
209 | |||
210 | |||
211 | #define NEST_DELTA 2 | ||
212 | #define NEST_MAX 6 | ||
213 | |||
214 | struct clkinf { | ||
215 | struct seq_file *s; | ||
216 | unsigned nest; | ||
217 | }; | ||
218 | |||
219 | static void | ||
220 | dump_clock(struct clk *parent, struct clkinf *r) | ||
221 | { | ||
222 | unsigned nest = r->nest; | ||
223 | char buf[16 + NEST_MAX]; | ||
224 | struct clk *clk; | ||
225 | unsigned i; | ||
226 | |||
227 | /* skip clocks coupled to devices that aren't registered */ | ||
228 | if (parent->dev && !dev_name(parent->dev) && !parent->users) | ||
229 | return; | ||
230 | |||
231 | /* <nest spaces> name <pad to end> */ | ||
232 | memset(buf, ' ', sizeof(buf) - 1); | ||
233 | buf[sizeof(buf) - 1] = 0; | ||
234 | i = strlen(parent->name); | ||
235 | memcpy(buf + nest, parent->name, | ||
236 | min(i, (unsigned)(sizeof(buf) - 1 - nest))); | ||
237 | |||
238 | seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz", | ||
239 | buf, parent->set_parent ? '*' : ' ', | ||
240 | parent->users, | ||
241 | parent->users ? "on" : "off", /* NOTE: not-paranoid!! */ | ||
242 | clk_get_rate(parent)); | ||
243 | if (parent->dev) | ||
244 | seq_printf(r->s, ", for %s", dev_name(parent->dev)); | ||
245 | seq_putc(r->s, '\n'); | ||
246 | |||
247 | /* cost of this scan is small, but not linear... */ | ||
248 | r->nest = nest + NEST_DELTA; | ||
249 | |||
250 | list_for_each_entry(clk, &at32_clock_list, list) { | ||
251 | if (clk->parent == parent) | ||
252 | dump_clock(clk, r); | ||
253 | } | ||
254 | r->nest = nest; | ||
255 | } | ||
256 | |||
257 | static int clk_show(struct seq_file *s, void *unused) | ||
258 | { | ||
259 | struct clkinf r; | ||
260 | int i; | ||
261 | struct clk *clk; | ||
262 | |||
263 | /* show all the power manager registers */ | ||
264 | seq_printf(s, | ||
265 | "MCCTRL = %8x\n" | ||
266 | "CKSEL = %8x\n" | ||
267 | "CPUMASK = %8x\n" | ||
268 | "HSBMASK = %8x\n" | ||
269 | "PBAMASK = %8x\n" | ||
270 | "PBBMASK = %8x\n" | ||
271 | "PLL0 = %8x\n" | ||
272 | "PLL1 = %8x\n" | ||
273 | "IMR = %8x\n", | ||
274 | pm_readl(MCCTRL), | ||
275 | pm_readl(CKSEL), | ||
276 | pm_readl(CPU_MASK), | ||
277 | pm_readl(HSB_MASK), | ||
278 | pm_readl(PBA_MASK), | ||
279 | pm_readl(PBB_MASK), | ||
280 | pm_readl(PLL0), | ||
281 | pm_readl(PLL1), | ||
282 | pm_readl(IMR)); | ||
283 | for (i = 0; i < 8; i++) { | ||
284 | if (i == 5) | ||
285 | continue; | ||
286 | seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i))); | ||
287 | } | ||
288 | |||
289 | seq_putc(s, '\n'); | ||
290 | r.s = s; | ||
291 | r.nest = 0; | ||
292 | /* protected from changes on the list while dumping */ | ||
293 | spin_lock(&clk_list_lock); | ||
294 | |||
295 | /* show clock tree as derived from the three oscillators */ | ||
296 | clk = __clk_get(NULL, "osc32k"); | ||
297 | dump_clock(clk, &r); | ||
298 | clk_put(clk); | ||
299 | |||
300 | clk = __clk_get(NULL, "osc0"); | ||
301 | dump_clock(clk, &r); | ||
302 | clk_put(clk); | ||
303 | |||
304 | clk = __clk_get(NULL, "osc1"); | ||
305 | dump_clock(clk, &r); | ||
306 | clk_put(clk); | ||
307 | |||
308 | spin_unlock(&clk_list_lock); | ||
309 | |||
310 | return 0; | ||
311 | } | ||
312 | |||
313 | static int clk_open(struct inode *inode, struct file *file) | ||
314 | { | ||
315 | return single_open(file, clk_show, NULL); | ||
316 | } | ||
317 | |||
318 | static const struct file_operations clk_operations = { | ||
319 | .open = clk_open, | ||
320 | .read = seq_read, | ||
321 | .llseek = seq_lseek, | ||
322 | .release = single_release, | ||
323 | }; | ||
324 | |||
325 | static int __init clk_debugfs_init(void) | ||
326 | { | ||
327 | (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO, | ||
328 | NULL, NULL, &clk_operations); | ||
329 | |||
330 | return 0; | ||
331 | } | ||
332 | postcore_initcall(clk_debugfs_init); | ||
333 | |||
334 | #endif | ||
diff --git a/arch/avr32/mach-at32ap/clock.h b/arch/avr32/mach-at32ap/clock.h deleted file mode 100644 index 4c7ebbdc6dfa..000000000000 --- a/arch/avr32/mach-at32ap/clock.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * Clock management for AT32AP CPUs | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * Based on arch/arm/mach-at91/clock.c | ||
7 | * Copyright (C) 2005 David Brownell | ||
8 | * Copyright (C) 2005 Ivan Kokshaysky | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | #include <linux/clk.h> | ||
15 | #include <linux/list.h> | ||
16 | |||
17 | |||
18 | void at32_clk_register(struct clk *clk); | ||
19 | |||
20 | struct clk { | ||
21 | struct list_head list; /* linking element */ | ||
22 | const char *name; /* Clock name/function */ | ||
23 | struct device *dev; /* Device the clock is used by */ | ||
24 | struct clk *parent; /* Parent clock, if any */ | ||
25 | void (*mode)(struct clk *clk, int enabled); | ||
26 | unsigned long (*get_rate)(struct clk *clk); | ||
27 | long (*set_rate)(struct clk *clk, unsigned long rate, | ||
28 | int apply); | ||
29 | int (*set_parent)(struct clk *clk, struct clk *parent); | ||
30 | u16 users; /* Enabled if non-zero */ | ||
31 | u16 index; /* Sibling index */ | ||
32 | }; | ||
33 | |||
34 | unsigned long pba_clk_get_rate(struct clk *clk); | ||
35 | void pba_clk_mode(struct clk *clk, int enabled); | ||
diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c deleted file mode 100644 index 96cabad68489..000000000000 --- a/arch/avr32/mach-at32ap/extint.c +++ /dev/null | |||
@@ -1,271 +0,0 @@ | |||
1 | /* | ||
2 | * External interrupt handling for AT32AP CPUs | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/errno.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/irq.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/random.h> | ||
17 | #include <linux/slab.h> | ||
18 | |||
19 | #include <asm/io.h> | ||
20 | |||
21 | /* EIC register offsets */ | ||
22 | #define EIC_IER 0x0000 | ||
23 | #define EIC_IDR 0x0004 | ||
24 | #define EIC_IMR 0x0008 | ||
25 | #define EIC_ISR 0x000c | ||
26 | #define EIC_ICR 0x0010 | ||
27 | #define EIC_MODE 0x0014 | ||
28 | #define EIC_EDGE 0x0018 | ||
29 | #define EIC_LEVEL 0x001c | ||
30 | #define EIC_NMIC 0x0024 | ||
31 | |||
32 | /* Bitfields in NMIC */ | ||
33 | #define EIC_NMIC_ENABLE (1 << 0) | ||
34 | |||
35 | /* Bit manipulation macros */ | ||
36 | #define EIC_BIT(name) \ | ||
37 | (1 << EIC_##name##_OFFSET) | ||
38 | #define EIC_BF(name,value) \ | ||
39 | (((value) & ((1 << EIC_##name##_SIZE) - 1)) \ | ||
40 | << EIC_##name##_OFFSET) | ||
41 | #define EIC_BFEXT(name,value) \ | ||
42 | (((value) >> EIC_##name##_OFFSET) \ | ||
43 | & ((1 << EIC_##name##_SIZE) - 1)) | ||
44 | #define EIC_BFINS(name,value,old) \ | ||
45 | (((old) & ~(((1 << EIC_##name##_SIZE) - 1) \ | ||
46 | << EIC_##name##_OFFSET)) \ | ||
47 | | EIC_BF(name,value)) | ||
48 | |||
49 | /* Register access macros */ | ||
50 | #define eic_readl(port,reg) \ | ||
51 | __raw_readl((port)->regs + EIC_##reg) | ||
52 | #define eic_writel(port,reg,value) \ | ||
53 | __raw_writel((value), (port)->regs + EIC_##reg) | ||
54 | |||
55 | struct eic { | ||
56 | void __iomem *regs; | ||
57 | struct irq_chip *chip; | ||
58 | unsigned int first_irq; | ||
59 | }; | ||
60 | |||
61 | static struct eic *nmi_eic; | ||
62 | static bool nmi_enabled; | ||
63 | |||
64 | static void eic_ack_irq(struct irq_data *d) | ||
65 | { | ||
66 | struct eic *eic = irq_data_get_irq_chip_data(d); | ||
67 | eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq)); | ||
68 | } | ||
69 | |||
70 | static void eic_mask_irq(struct irq_data *d) | ||
71 | { | ||
72 | struct eic *eic = irq_data_get_irq_chip_data(d); | ||
73 | eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq)); | ||
74 | } | ||
75 | |||
76 | static void eic_mask_ack_irq(struct irq_data *d) | ||
77 | { | ||
78 | struct eic *eic = irq_data_get_irq_chip_data(d); | ||
79 | eic_writel(eic, ICR, 1 << (d->irq - eic->first_irq)); | ||
80 | eic_writel(eic, IDR, 1 << (d->irq - eic->first_irq)); | ||
81 | } | ||
82 | |||
83 | static void eic_unmask_irq(struct irq_data *d) | ||
84 | { | ||
85 | struct eic *eic = irq_data_get_irq_chip_data(d); | ||
86 | eic_writel(eic, IER, 1 << (d->irq - eic->first_irq)); | ||
87 | } | ||
88 | |||
89 | static int eic_set_irq_type(struct irq_data *d, unsigned int flow_type) | ||
90 | { | ||
91 | struct eic *eic = irq_data_get_irq_chip_data(d); | ||
92 | unsigned int irq = d->irq; | ||
93 | unsigned int i = irq - eic->first_irq; | ||
94 | u32 mode, edge, level; | ||
95 | |||
96 | flow_type &= IRQ_TYPE_SENSE_MASK; | ||
97 | if (flow_type == IRQ_TYPE_NONE) | ||
98 | flow_type = IRQ_TYPE_LEVEL_LOW; | ||
99 | |||
100 | mode = eic_readl(eic, MODE); | ||
101 | edge = eic_readl(eic, EDGE); | ||
102 | level = eic_readl(eic, LEVEL); | ||
103 | |||
104 | switch (flow_type) { | ||
105 | case IRQ_TYPE_LEVEL_LOW: | ||
106 | mode |= 1 << i; | ||
107 | level &= ~(1 << i); | ||
108 | break; | ||
109 | case IRQ_TYPE_LEVEL_HIGH: | ||
110 | mode |= 1 << i; | ||
111 | level |= 1 << i; | ||
112 | break; | ||
113 | case IRQ_TYPE_EDGE_RISING: | ||
114 | mode &= ~(1 << i); | ||
115 | edge |= 1 << i; | ||
116 | break; | ||
117 | case IRQ_TYPE_EDGE_FALLING: | ||
118 | mode &= ~(1 << i); | ||
119 | edge &= ~(1 << i); | ||
120 | break; | ||
121 | default: | ||
122 | return -EINVAL; | ||
123 | } | ||
124 | |||
125 | eic_writel(eic, MODE, mode); | ||
126 | eic_writel(eic, EDGE, edge); | ||
127 | eic_writel(eic, LEVEL, level); | ||
128 | |||
129 | irqd_set_trigger_type(d, flow_type); | ||
130 | if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) | ||
131 | irq_set_handler_locked(d, handle_level_irq); | ||
132 | else | ||
133 | irq_set_handler_locked(d, handle_edge_irq); | ||
134 | |||
135 | return IRQ_SET_MASK_OK_NOCOPY; | ||
136 | } | ||
137 | |||
138 | static struct irq_chip eic_chip = { | ||
139 | .name = "eic", | ||
140 | .irq_ack = eic_ack_irq, | ||
141 | .irq_mask = eic_mask_irq, | ||
142 | .irq_mask_ack = eic_mask_ack_irq, | ||
143 | .irq_unmask = eic_unmask_irq, | ||
144 | .irq_set_type = eic_set_irq_type, | ||
145 | }; | ||
146 | |||
147 | static void demux_eic_irq(struct irq_desc *desc) | ||
148 | { | ||
149 | struct eic *eic = irq_desc_get_handler_data(desc); | ||
150 | unsigned long status, pending; | ||
151 | unsigned int i; | ||
152 | |||
153 | status = eic_readl(eic, ISR); | ||
154 | pending = status & eic_readl(eic, IMR); | ||
155 | |||
156 | while (pending) { | ||
157 | i = fls(pending) - 1; | ||
158 | pending &= ~(1 << i); | ||
159 | |||
160 | generic_handle_irq(i + eic->first_irq); | ||
161 | } | ||
162 | } | ||
163 | |||
164 | int nmi_enable(void) | ||
165 | { | ||
166 | nmi_enabled = true; | ||
167 | |||
168 | if (nmi_eic) | ||
169 | eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE); | ||
170 | |||
171 | return 0; | ||
172 | } | ||
173 | |||
174 | void nmi_disable(void) | ||
175 | { | ||
176 | if (nmi_eic) | ||
177 | eic_writel(nmi_eic, NMIC, 0); | ||
178 | |||
179 | nmi_enabled = false; | ||
180 | } | ||
181 | |||
182 | static int __init eic_probe(struct platform_device *pdev) | ||
183 | { | ||
184 | struct eic *eic; | ||
185 | struct resource *regs; | ||
186 | unsigned int i; | ||
187 | unsigned int nr_of_irqs; | ||
188 | unsigned int int_irq; | ||
189 | int ret; | ||
190 | u32 pattern; | ||
191 | |||
192 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
193 | int_irq = platform_get_irq(pdev, 0); | ||
194 | if (!regs || (int)int_irq <= 0) { | ||
195 | dev_dbg(&pdev->dev, "missing regs and/or irq resource\n"); | ||
196 | return -ENXIO; | ||
197 | } | ||
198 | |||
199 | ret = -ENOMEM; | ||
200 | eic = kzalloc(sizeof(struct eic), GFP_KERNEL); | ||
201 | if (!eic) { | ||
202 | dev_dbg(&pdev->dev, "no memory for eic structure\n"); | ||
203 | goto err_kzalloc; | ||
204 | } | ||
205 | |||
206 | eic->first_irq = EIM_IRQ_BASE + 32 * pdev->id; | ||
207 | eic->regs = ioremap(regs->start, resource_size(regs)); | ||
208 | if (!eic->regs) { | ||
209 | dev_dbg(&pdev->dev, "failed to map regs\n"); | ||
210 | goto err_ioremap; | ||
211 | } | ||
212 | |||
213 | /* | ||
214 | * Find out how many interrupt lines that are actually | ||
215 | * implemented in hardware. | ||
216 | */ | ||
217 | eic_writel(eic, IDR, ~0UL); | ||
218 | eic_writel(eic, MODE, ~0UL); | ||
219 | pattern = eic_readl(eic, MODE); | ||
220 | nr_of_irqs = fls(pattern); | ||
221 | |||
222 | /* Trigger on low level unless overridden by driver */ | ||
223 | eic_writel(eic, EDGE, 0UL); | ||
224 | eic_writel(eic, LEVEL, 0UL); | ||
225 | |||
226 | eic->chip = &eic_chip; | ||
227 | |||
228 | for (i = 0; i < nr_of_irqs; i++) { | ||
229 | irq_set_chip_and_handler(eic->first_irq + i, &eic_chip, | ||
230 | handle_level_irq); | ||
231 | irq_set_chip_data(eic->first_irq + i, eic); | ||
232 | } | ||
233 | |||
234 | irq_set_chained_handler_and_data(int_irq, demux_eic_irq, eic); | ||
235 | |||
236 | if (pdev->id == 0) { | ||
237 | nmi_eic = eic; | ||
238 | if (nmi_enabled) | ||
239 | /* | ||
240 | * Someone tried to enable NMI before we were | ||
241 | * ready. Do it now. | ||
242 | */ | ||
243 | nmi_enable(); | ||
244 | } | ||
245 | |||
246 | dev_info(&pdev->dev, | ||
247 | "External Interrupt Controller at 0x%p, IRQ %u\n", | ||
248 | eic->regs, int_irq); | ||
249 | dev_info(&pdev->dev, | ||
250 | "Handling %u external IRQs, starting with IRQ %u\n", | ||
251 | nr_of_irqs, eic->first_irq); | ||
252 | |||
253 | return 0; | ||
254 | |||
255 | err_ioremap: | ||
256 | kfree(eic); | ||
257 | err_kzalloc: | ||
258 | return ret; | ||
259 | } | ||
260 | |||
261 | static struct platform_driver eic_driver = { | ||
262 | .driver = { | ||
263 | .name = "at32_eic", | ||
264 | }, | ||
265 | }; | ||
266 | |||
267 | static int __init eic_init(void) | ||
268 | { | ||
269 | return platform_driver_probe(&eic_driver, eic_probe); | ||
270 | } | ||
271 | arch_initcall(eic_init); | ||
diff --git a/arch/avr32/mach-at32ap/hmatrix.c b/arch/avr32/mach-at32ap/hmatrix.c deleted file mode 100644 index 48f5ede77468..000000000000 --- a/arch/avr32/mach-at32ap/hmatrix.c +++ /dev/null | |||
@@ -1,88 +0,0 @@ | |||
1 | /* | ||
2 | * High-Speed Bus Matrix helper functions | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/io.h> | ||
12 | |||
13 | #include <mach/chip.h> | ||
14 | #include <mach/hmatrix.h> | ||
15 | |||
16 | static inline void __hmatrix_write_reg(unsigned long offset, u32 value) | ||
17 | { | ||
18 | __raw_writel(value, (void __iomem __force *)(HMATRIX_BASE + offset)); | ||
19 | } | ||
20 | |||
21 | static inline u32 __hmatrix_read_reg(unsigned long offset) | ||
22 | { | ||
23 | return __raw_readl((void __iomem __force *)(HMATRIX_BASE + offset)); | ||
24 | } | ||
25 | |||
26 | /** | ||
27 | * hmatrix_write_reg - write HMATRIX configuration register | ||
28 | * @offset: register offset | ||
29 | * @value: value to be written to the register at @offset | ||
30 | */ | ||
31 | void hmatrix_write_reg(unsigned long offset, u32 value) | ||
32 | { | ||
33 | clk_enable(&at32_hmatrix_clk); | ||
34 | __hmatrix_write_reg(offset, value); | ||
35 | __hmatrix_read_reg(offset); | ||
36 | clk_disable(&at32_hmatrix_clk); | ||
37 | } | ||
38 | |||
39 | /** | ||
40 | * hmatrix_read_reg - read HMATRIX configuration register | ||
41 | * @offset: register offset | ||
42 | * | ||
43 | * Returns the value of the register at @offset. | ||
44 | */ | ||
45 | u32 hmatrix_read_reg(unsigned long offset) | ||
46 | { | ||
47 | u32 value; | ||
48 | |||
49 | clk_enable(&at32_hmatrix_clk); | ||
50 | value = __hmatrix_read_reg(offset); | ||
51 | clk_disable(&at32_hmatrix_clk); | ||
52 | |||
53 | return value; | ||
54 | } | ||
55 | |||
56 | /** | ||
57 | * hmatrix_sfr_set_bits - set bits in a slave's Special Function Register | ||
58 | * @slave_id: operate on the SFR belonging to this slave | ||
59 | * @mask: mask of bits to be set in the SFR | ||
60 | */ | ||
61 | void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask) | ||
62 | { | ||
63 | u32 value; | ||
64 | |||
65 | clk_enable(&at32_hmatrix_clk); | ||
66 | value = __hmatrix_read_reg(HMATRIX_SFR(slave_id)); | ||
67 | value |= mask; | ||
68 | __hmatrix_write_reg(HMATRIX_SFR(slave_id), value); | ||
69 | __hmatrix_read_reg(HMATRIX_SFR(slave_id)); | ||
70 | clk_disable(&at32_hmatrix_clk); | ||
71 | } | ||
72 | |||
73 | /** | ||
74 | * hmatrix_sfr_set_bits - clear bits in a slave's Special Function Register | ||
75 | * @slave_id: operate on the SFR belonging to this slave | ||
76 | * @mask: mask of bits to be cleared in the SFR | ||
77 | */ | ||
78 | void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask) | ||
79 | { | ||
80 | u32 value; | ||
81 | |||
82 | clk_enable(&at32_hmatrix_clk); | ||
83 | value = __hmatrix_read_reg(HMATRIX_SFR(slave_id)); | ||
84 | value &= ~mask; | ||
85 | __hmatrix_write_reg(HMATRIX_SFR(slave_id), value); | ||
86 | __hmatrix_read_reg(HMATRIX_SFR(slave_id)); | ||
87 | clk_disable(&at32_hmatrix_clk); | ||
88 | } | ||
diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c deleted file mode 100644 index f66245e6e63e..000000000000 --- a/arch/avr32/mach-at32ap/hsmc.c +++ /dev/null | |||
@@ -1,282 +0,0 @@ | |||
1 | /* | ||
2 | * Static Memory Controller for AT32 chips | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/clk.h> | ||
11 | #include <linux/err.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/slab.h> | ||
16 | |||
17 | #include <asm/io.h> | ||
18 | #include <mach/smc.h> | ||
19 | |||
20 | #include "hsmc.h" | ||
21 | |||
22 | #define NR_CHIP_SELECTS 6 | ||
23 | |||
24 | struct hsmc { | ||
25 | void __iomem *regs; | ||
26 | struct clk *pclk; | ||
27 | struct clk *mck; | ||
28 | }; | ||
29 | |||
30 | static struct hsmc *hsmc; | ||
31 | |||
32 | void smc_set_timing(struct smc_config *config, | ||
33 | const struct smc_timing *timing) | ||
34 | { | ||
35 | int recover; | ||
36 | int cycle; | ||
37 | |||
38 | unsigned long mul; | ||
39 | |||
40 | /* Reset all SMC timings */ | ||
41 | config->ncs_read_setup = 0; | ||
42 | config->nrd_setup = 0; | ||
43 | config->ncs_write_setup = 0; | ||
44 | config->nwe_setup = 0; | ||
45 | config->ncs_read_pulse = 0; | ||
46 | config->nrd_pulse = 0; | ||
47 | config->ncs_write_pulse = 0; | ||
48 | config->nwe_pulse = 0; | ||
49 | config->read_cycle = 0; | ||
50 | config->write_cycle = 0; | ||
51 | |||
52 | /* | ||
53 | * cycles = x / T = x * f | ||
54 | * = ((x * 1000000000) * ((f * 65536) / 1000000000)) / 65536 | ||
55 | * = ((x * 1000000000) * (((f / 10000) * 65536) / 100000)) / 65536 | ||
56 | */ | ||
57 | mul = (clk_get_rate(hsmc->mck) / 10000) << 16; | ||
58 | mul /= 100000; | ||
59 | |||
60 | #define ns2cyc(x) ((((x) * mul) + 65535) >> 16) | ||
61 | |||
62 | if (timing->ncs_read_setup > 0) | ||
63 | config->ncs_read_setup = ns2cyc(timing->ncs_read_setup); | ||
64 | |||
65 | if (timing->nrd_setup > 0) | ||
66 | config->nrd_setup = ns2cyc(timing->nrd_setup); | ||
67 | |||
68 | if (timing->ncs_write_setup > 0) | ||
69 | config->ncs_write_setup = ns2cyc(timing->ncs_write_setup); | ||
70 | |||
71 | if (timing->nwe_setup > 0) | ||
72 | config->nwe_setup = ns2cyc(timing->nwe_setup); | ||
73 | |||
74 | if (timing->ncs_read_pulse > 0) | ||
75 | config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse); | ||
76 | |||
77 | if (timing->nrd_pulse > 0) | ||
78 | config->nrd_pulse = ns2cyc(timing->nrd_pulse); | ||
79 | |||
80 | if (timing->ncs_write_pulse > 0) | ||
81 | config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse); | ||
82 | |||
83 | if (timing->nwe_pulse > 0) | ||
84 | config->nwe_pulse = ns2cyc(timing->nwe_pulse); | ||
85 | |||
86 | if (timing->read_cycle > 0) | ||
87 | config->read_cycle = ns2cyc(timing->read_cycle); | ||
88 | |||
89 | if (timing->write_cycle > 0) | ||
90 | config->write_cycle = ns2cyc(timing->write_cycle); | ||
91 | |||
92 | /* Extend read cycle in needed */ | ||
93 | if (timing->ncs_read_recover > 0) | ||
94 | recover = ns2cyc(timing->ncs_read_recover); | ||
95 | else | ||
96 | recover = 1; | ||
97 | |||
98 | cycle = config->ncs_read_setup + config->ncs_read_pulse + recover; | ||
99 | |||
100 | if (config->read_cycle < cycle) | ||
101 | config->read_cycle = cycle; | ||
102 | |||
103 | /* Extend read cycle in needed */ | ||
104 | if (timing->nrd_recover > 0) | ||
105 | recover = ns2cyc(timing->nrd_recover); | ||
106 | else | ||
107 | recover = 1; | ||
108 | |||
109 | cycle = config->nrd_setup + config->nrd_pulse + recover; | ||
110 | |||
111 | if (config->read_cycle < cycle) | ||
112 | config->read_cycle = cycle; | ||
113 | |||
114 | /* Extend write cycle in needed */ | ||
115 | if (timing->ncs_write_recover > 0) | ||
116 | recover = ns2cyc(timing->ncs_write_recover); | ||
117 | else | ||
118 | recover = 1; | ||
119 | |||
120 | cycle = config->ncs_write_setup + config->ncs_write_pulse + recover; | ||
121 | |||
122 | if (config->write_cycle < cycle) | ||
123 | config->write_cycle = cycle; | ||
124 | |||
125 | /* Extend write cycle in needed */ | ||
126 | if (timing->nwe_recover > 0) | ||
127 | recover = ns2cyc(timing->nwe_recover); | ||
128 | else | ||
129 | recover = 1; | ||
130 | |||
131 | cycle = config->nwe_setup + config->nwe_pulse + recover; | ||
132 | |||
133 | if (config->write_cycle < cycle) | ||
134 | config->write_cycle = cycle; | ||
135 | } | ||
136 | EXPORT_SYMBOL(smc_set_timing); | ||
137 | |||
138 | int smc_set_configuration(int cs, const struct smc_config *config) | ||
139 | { | ||
140 | unsigned long offset; | ||
141 | u32 setup, pulse, cycle, mode; | ||
142 | |||
143 | if (!hsmc) | ||
144 | return -ENODEV; | ||
145 | if (cs >= NR_CHIP_SELECTS) | ||
146 | return -EINVAL; | ||
147 | |||
148 | setup = (HSMC_BF(NWE_SETUP, config->nwe_setup) | ||
149 | | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup) | ||
150 | | HSMC_BF(NRD_SETUP, config->nrd_setup) | ||
151 | | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup)); | ||
152 | pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse) | ||
153 | | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse) | ||
154 | | HSMC_BF(NRD_PULSE, config->nrd_pulse) | ||
155 | | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse)); | ||
156 | cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle) | ||
157 | | HSMC_BF(NRD_CYCLE, config->read_cycle)); | ||
158 | |||
159 | switch (config->bus_width) { | ||
160 | case 1: | ||
161 | mode = HSMC_BF(DBW, HSMC_DBW_8_BITS); | ||
162 | break; | ||
163 | case 2: | ||
164 | mode = HSMC_BF(DBW, HSMC_DBW_16_BITS); | ||
165 | break; | ||
166 | case 4: | ||
167 | mode = HSMC_BF(DBW, HSMC_DBW_32_BITS); | ||
168 | break; | ||
169 | default: | ||
170 | return -EINVAL; | ||
171 | } | ||
172 | |||
173 | switch (config->nwait_mode) { | ||
174 | case 0: | ||
175 | mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED); | ||
176 | break; | ||
177 | case 1: | ||
178 | mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED); | ||
179 | break; | ||
180 | case 2: | ||
181 | mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN); | ||
182 | break; | ||
183 | case 3: | ||
184 | mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY); | ||
185 | break; | ||
186 | default: | ||
187 | return -EINVAL; | ||
188 | } | ||
189 | |||
190 | if (config->tdf_cycles) { | ||
191 | mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles); | ||
192 | } | ||
193 | |||
194 | if (config->nrd_controlled) | ||
195 | mode |= HSMC_BIT(READ_MODE); | ||
196 | if (config->nwe_controlled) | ||
197 | mode |= HSMC_BIT(WRITE_MODE); | ||
198 | if (config->byte_write) | ||
199 | mode |= HSMC_BIT(BAT); | ||
200 | if (config->tdf_mode) | ||
201 | mode |= HSMC_BIT(TDF_MODE); | ||
202 | |||
203 | pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n", | ||
204 | cs, setup, pulse, cycle, mode); | ||
205 | |||
206 | offset = cs * 0x10; | ||
207 | hsmc_writel(hsmc, SETUP0 + offset, setup); | ||
208 | hsmc_writel(hsmc, PULSE0 + offset, pulse); | ||
209 | hsmc_writel(hsmc, CYCLE0 + offset, cycle); | ||
210 | hsmc_writel(hsmc, MODE0 + offset, mode); | ||
211 | hsmc_readl(hsmc, MODE0); /* I/O barrier */ | ||
212 | |||
213 | return 0; | ||
214 | } | ||
215 | EXPORT_SYMBOL(smc_set_configuration); | ||
216 | |||
217 | static int hsmc_probe(struct platform_device *pdev) | ||
218 | { | ||
219 | struct resource *regs; | ||
220 | struct clk *pclk, *mck; | ||
221 | int ret; | ||
222 | |||
223 | if (hsmc) | ||
224 | return -EBUSY; | ||
225 | |||
226 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
227 | if (!regs) | ||
228 | return -ENXIO; | ||
229 | pclk = clk_get(&pdev->dev, "pclk"); | ||
230 | if (IS_ERR(pclk)) | ||
231 | return PTR_ERR(pclk); | ||
232 | mck = clk_get(&pdev->dev, "mck"); | ||
233 | if (IS_ERR(mck)) { | ||
234 | ret = PTR_ERR(mck); | ||
235 | goto out_put_pclk; | ||
236 | } | ||
237 | |||
238 | ret = -ENOMEM; | ||
239 | hsmc = kzalloc(sizeof(struct hsmc), GFP_KERNEL); | ||
240 | if (!hsmc) | ||
241 | goto out_put_clocks; | ||
242 | |||
243 | clk_enable(pclk); | ||
244 | clk_enable(mck); | ||
245 | |||
246 | hsmc->pclk = pclk; | ||
247 | hsmc->mck = mck; | ||
248 | hsmc->regs = ioremap(regs->start, resource_size(regs)); | ||
249 | if (!hsmc->regs) | ||
250 | goto out_disable_clocks; | ||
251 | |||
252 | dev_info(&pdev->dev, "Atmel Static Memory Controller at 0x%08lx\n", | ||
253 | (unsigned long)regs->start); | ||
254 | |||
255 | platform_set_drvdata(pdev, hsmc); | ||
256 | |||
257 | return 0; | ||
258 | |||
259 | out_disable_clocks: | ||
260 | clk_disable(mck); | ||
261 | clk_disable(pclk); | ||
262 | kfree(hsmc); | ||
263 | out_put_clocks: | ||
264 | clk_put(mck); | ||
265 | out_put_pclk: | ||
266 | clk_put(pclk); | ||
267 | hsmc = NULL; | ||
268 | return ret; | ||
269 | } | ||
270 | |||
271 | static struct platform_driver hsmc_driver = { | ||
272 | .probe = hsmc_probe, | ||
273 | .driver = { | ||
274 | .name = "smc", | ||
275 | }, | ||
276 | }; | ||
277 | |||
278 | static int __init hsmc_init(void) | ||
279 | { | ||
280 | return platform_driver_register(&hsmc_driver); | ||
281 | } | ||
282 | core_initcall(hsmc_init); | ||
diff --git a/arch/avr32/mach-at32ap/hsmc.h b/arch/avr32/mach-at32ap/hsmc.h deleted file mode 100644 index d1d48e26e393..000000000000 --- a/arch/avr32/mach-at32ap/hsmc.h +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | /* | ||
2 | * Register definitions for Atmel Static Memory Controller (SMC) | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_AVR32_HSMC_H__ | ||
11 | #define __ASM_AVR32_HSMC_H__ | ||
12 | |||
13 | /* HSMC register offsets */ | ||
14 | #define HSMC_SETUP0 0x0000 | ||
15 | #define HSMC_PULSE0 0x0004 | ||
16 | #define HSMC_CYCLE0 0x0008 | ||
17 | #define HSMC_MODE0 0x000c | ||
18 | #define HSMC_SETUP1 0x0010 | ||
19 | #define HSMC_PULSE1 0x0014 | ||
20 | #define HSMC_CYCLE1 0x0018 | ||
21 | #define HSMC_MODE1 0x001c | ||
22 | #define HSMC_SETUP2 0x0020 | ||
23 | #define HSMC_PULSE2 0x0024 | ||
24 | #define HSMC_CYCLE2 0x0028 | ||
25 | #define HSMC_MODE2 0x002c | ||
26 | #define HSMC_SETUP3 0x0030 | ||
27 | #define HSMC_PULSE3 0x0034 | ||
28 | #define HSMC_CYCLE3 0x0038 | ||
29 | #define HSMC_MODE3 0x003c | ||
30 | #define HSMC_SETUP4 0x0040 | ||
31 | #define HSMC_PULSE4 0x0044 | ||
32 | #define HSMC_CYCLE4 0x0048 | ||
33 | #define HSMC_MODE4 0x004c | ||
34 | #define HSMC_SETUP5 0x0050 | ||
35 | #define HSMC_PULSE5 0x0054 | ||
36 | #define HSMC_CYCLE5 0x0058 | ||
37 | #define HSMC_MODE5 0x005c | ||
38 | |||
39 | /* Bitfields in SETUP0 */ | ||
40 | #define HSMC_NWE_SETUP_OFFSET 0 | ||
41 | #define HSMC_NWE_SETUP_SIZE 6 | ||
42 | #define HSMC_NCS_WR_SETUP_OFFSET 8 | ||
43 | #define HSMC_NCS_WR_SETUP_SIZE 6 | ||
44 | #define HSMC_NRD_SETUP_OFFSET 16 | ||
45 | #define HSMC_NRD_SETUP_SIZE 6 | ||
46 | #define HSMC_NCS_RD_SETUP_OFFSET 24 | ||
47 | #define HSMC_NCS_RD_SETUP_SIZE 6 | ||
48 | |||
49 | /* Bitfields in PULSE0 */ | ||
50 | #define HSMC_NWE_PULSE_OFFSET 0 | ||
51 | #define HSMC_NWE_PULSE_SIZE 7 | ||
52 | #define HSMC_NCS_WR_PULSE_OFFSET 8 | ||
53 | #define HSMC_NCS_WR_PULSE_SIZE 7 | ||
54 | #define HSMC_NRD_PULSE_OFFSET 16 | ||
55 | #define HSMC_NRD_PULSE_SIZE 7 | ||
56 | #define HSMC_NCS_RD_PULSE_OFFSET 24 | ||
57 | #define HSMC_NCS_RD_PULSE_SIZE 7 | ||
58 | |||
59 | /* Bitfields in CYCLE0 */ | ||
60 | #define HSMC_NWE_CYCLE_OFFSET 0 | ||
61 | #define HSMC_NWE_CYCLE_SIZE 9 | ||
62 | #define HSMC_NRD_CYCLE_OFFSET 16 | ||
63 | #define HSMC_NRD_CYCLE_SIZE 9 | ||
64 | |||
65 | /* Bitfields in MODE0 */ | ||
66 | #define HSMC_READ_MODE_OFFSET 0 | ||
67 | #define HSMC_READ_MODE_SIZE 1 | ||
68 | #define HSMC_WRITE_MODE_OFFSET 1 | ||
69 | #define HSMC_WRITE_MODE_SIZE 1 | ||
70 | #define HSMC_EXNW_MODE_OFFSET 4 | ||
71 | #define HSMC_EXNW_MODE_SIZE 2 | ||
72 | #define HSMC_BAT_OFFSET 8 | ||
73 | #define HSMC_BAT_SIZE 1 | ||
74 | #define HSMC_DBW_OFFSET 12 | ||
75 | #define HSMC_DBW_SIZE 2 | ||
76 | #define HSMC_TDF_CYCLES_OFFSET 16 | ||
77 | #define HSMC_TDF_CYCLES_SIZE 4 | ||
78 | #define HSMC_TDF_MODE_OFFSET 20 | ||
79 | #define HSMC_TDF_MODE_SIZE 1 | ||
80 | #define HSMC_PMEN_OFFSET 24 | ||
81 | #define HSMC_PMEN_SIZE 1 | ||
82 | #define HSMC_PS_OFFSET 28 | ||
83 | #define HSMC_PS_SIZE 2 | ||
84 | |||
85 | /* Constants for READ_MODE */ | ||
86 | #define HSMC_READ_MODE_NCS_CONTROLLED 0 | ||
87 | #define HSMC_READ_MODE_NRD_CONTROLLED 1 | ||
88 | |||
89 | /* Constants for WRITE_MODE */ | ||
90 | #define HSMC_WRITE_MODE_NCS_CONTROLLED 0 | ||
91 | #define HSMC_WRITE_MODE_NWE_CONTROLLED 1 | ||
92 | |||
93 | /* Constants for EXNW_MODE */ | ||
94 | #define HSMC_EXNW_MODE_DISABLED 0 | ||
95 | #define HSMC_EXNW_MODE_RESERVED 1 | ||
96 | #define HSMC_EXNW_MODE_FROZEN 2 | ||
97 | #define HSMC_EXNW_MODE_READY 3 | ||
98 | |||
99 | /* Constants for BAT */ | ||
100 | #define HSMC_BAT_BYTE_SELECT 0 | ||
101 | #define HSMC_BAT_BYTE_WRITE 1 | ||
102 | |||
103 | /* Constants for DBW */ | ||
104 | #define HSMC_DBW_8_BITS 0 | ||
105 | #define HSMC_DBW_16_BITS 1 | ||
106 | #define HSMC_DBW_32_BITS 2 | ||
107 | |||
108 | /* Bit manipulation macros */ | ||
109 | #define HSMC_BIT(name) \ | ||
110 | (1 << HSMC_##name##_OFFSET) | ||
111 | #define HSMC_BF(name,value) \ | ||
112 | (((value) & ((1 << HSMC_##name##_SIZE) - 1)) \ | ||
113 | << HSMC_##name##_OFFSET) | ||
114 | #define HSMC_BFEXT(name,value) \ | ||
115 | (((value) >> HSMC_##name##_OFFSET) \ | ||
116 | & ((1 << HSMC_##name##_SIZE) - 1)) | ||
117 | #define HSMC_BFINS(name,value,old) \ | ||
118 | (((old) & ~(((1 << HSMC_##name##_SIZE) - 1) \ | ||
119 | << HSMC_##name##_OFFSET)) | HSMC_BF(name,value)) | ||
120 | |||
121 | /* Register access macros */ | ||
122 | #define hsmc_readl(port,reg) \ | ||
123 | __raw_readl((port)->regs + HSMC_##reg) | ||
124 | #define hsmc_writel(port,reg,value) \ | ||
125 | __raw_writel((value), (port)->regs + HSMC_##reg) | ||
126 | |||
127 | #endif /* __ASM_AVR32_HSMC_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h deleted file mode 100644 index b9222bf895bc..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h +++ /dev/null | |||
@@ -1,245 +0,0 @@ | |||
1 | /* | ||
2 | * Pin definitions for AT32AP7000. | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_ARCH_AT32AP700X_H__ | ||
11 | #define __ASM_ARCH_AT32AP700X_H__ | ||
12 | |||
13 | #define GPIO_PERIPH_A 0 | ||
14 | #define GPIO_PERIPH_B 1 | ||
15 | |||
16 | /* | ||
17 | * Pin numbers identifying specific GPIO pins on the chip. They can | ||
18 | * also be converted to IRQ numbers by passing them through | ||
19 | * gpio_to_irq(). | ||
20 | */ | ||
21 | #define GPIO_PIOA_BASE (0) | ||
22 | #define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) | ||
23 | #define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) | ||
24 | #define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) | ||
25 | #define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) | ||
26 | |||
27 | #define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) | ||
28 | #define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) | ||
29 | #define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) | ||
30 | #define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) | ||
31 | #define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) | ||
32 | |||
33 | |||
34 | /* | ||
35 | * DMAC peripheral hardware handshaking interfaces, used with dw_dmac | ||
36 | */ | ||
37 | #define DMAC_MCI_RX 0 | ||
38 | #define DMAC_MCI_TX 1 | ||
39 | #define DMAC_DAC_TX 2 | ||
40 | #define DMAC_AC97_A_RX 3 | ||
41 | #define DMAC_AC97_A_TX 4 | ||
42 | #define DMAC_AC97_B_RX 5 | ||
43 | #define DMAC_AC97_B_TX 6 | ||
44 | #define DMAC_DMAREQ_0 7 | ||
45 | #define DMAC_DMAREQ_1 8 | ||
46 | #define DMAC_DMAREQ_2 9 | ||
47 | #define DMAC_DMAREQ_3 10 | ||
48 | |||
49 | /* HSB master IDs */ | ||
50 | #define HMATRIX_MASTER_CPU_DCACHE 0 | ||
51 | #define HMATRIX_MASTER_CPU_ICACHE 1 | ||
52 | #define HMATRIX_MASTER_PDC 2 | ||
53 | #define HMATRIX_MASTER_ISI 3 | ||
54 | #define HMATRIX_MASTER_USBA 4 | ||
55 | #define HMATRIX_MASTER_LCDC 5 | ||
56 | #define HMATRIX_MASTER_MACB0 6 | ||
57 | #define HMATRIX_MASTER_MACB1 7 | ||
58 | #define HMATRIX_MASTER_DMACA_M0 8 | ||
59 | #define HMATRIX_MASTER_DMACA_M1 9 | ||
60 | |||
61 | /* HSB slave IDs */ | ||
62 | #define HMATRIX_SLAVE_SRAM0 0 | ||
63 | #define HMATRIX_SLAVE_SRAM1 1 | ||
64 | #define HMATRIX_SLAVE_PBA 2 | ||
65 | #define HMATRIX_SLAVE_PBB 3 | ||
66 | #define HMATRIX_SLAVE_EBI 4 | ||
67 | #define HMATRIX_SLAVE_USBA 5 | ||
68 | #define HMATRIX_SLAVE_LCDC 6 | ||
69 | #define HMATRIX_SLAVE_DMACA 7 | ||
70 | |||
71 | /* Bits in HMATRIX SFR4 (EBI) */ | ||
72 | #define HMATRIX_EBI_SDRAM_ENABLE (1 << 1) | ||
73 | #define HMATRIX_EBI_NAND_ENABLE (1 << 3) | ||
74 | #define HMATRIX_EBI_CF0_ENABLE (1 << 4) | ||
75 | #define HMATRIX_EBI_CF1_ENABLE (1 << 5) | ||
76 | #define HMATRIX_EBI_PULLUP_DISABLE (1 << 8) | ||
77 | |||
78 | /* | ||
79 | * Base addresses of controllers that may be accessed early by | ||
80 | * platform code. | ||
81 | */ | ||
82 | #define PM_BASE 0xfff00000 | ||
83 | #define HMATRIX_BASE 0xfff00800 | ||
84 | #define SDRAMC_BASE 0xfff03800 | ||
85 | |||
86 | /* LCDC on port C */ | ||
87 | #define ATMEL_LCDC_PC_CC (1ULL << 19) | ||
88 | #define ATMEL_LCDC_PC_HSYNC (1ULL << 20) | ||
89 | #define ATMEL_LCDC_PC_PCLK (1ULL << 21) | ||
90 | #define ATMEL_LCDC_PC_VSYNC (1ULL << 22) | ||
91 | #define ATMEL_LCDC_PC_DVAL (1ULL << 23) | ||
92 | #define ATMEL_LCDC_PC_MODE (1ULL << 24) | ||
93 | #define ATMEL_LCDC_PC_PWR (1ULL << 25) | ||
94 | #define ATMEL_LCDC_PC_DATA0 (1ULL << 26) | ||
95 | #define ATMEL_LCDC_PC_DATA1 (1ULL << 27) | ||
96 | #define ATMEL_LCDC_PC_DATA2 (1ULL << 28) | ||
97 | #define ATMEL_LCDC_PC_DATA3 (1ULL << 29) | ||
98 | #define ATMEL_LCDC_PC_DATA4 (1ULL << 30) | ||
99 | #define ATMEL_LCDC_PC_DATA5 (1ULL << 31) | ||
100 | |||
101 | /* LCDC on port D */ | ||
102 | #define ATMEL_LCDC_PD_DATA6 (1ULL << 0) | ||
103 | #define ATMEL_LCDC_PD_DATA7 (1ULL << 1) | ||
104 | #define ATMEL_LCDC_PD_DATA8 (1ULL << 2) | ||
105 | #define ATMEL_LCDC_PD_DATA9 (1ULL << 3) | ||
106 | #define ATMEL_LCDC_PD_DATA10 (1ULL << 4) | ||
107 | #define ATMEL_LCDC_PD_DATA11 (1ULL << 5) | ||
108 | #define ATMEL_LCDC_PD_DATA12 (1ULL << 6) | ||
109 | #define ATMEL_LCDC_PD_DATA13 (1ULL << 7) | ||
110 | #define ATMEL_LCDC_PD_DATA14 (1ULL << 8) | ||
111 | #define ATMEL_LCDC_PD_DATA15 (1ULL << 9) | ||
112 | #define ATMEL_LCDC_PD_DATA16 (1ULL << 10) | ||
113 | #define ATMEL_LCDC_PD_DATA17 (1ULL << 11) | ||
114 | #define ATMEL_LCDC_PD_DATA18 (1ULL << 12) | ||
115 | #define ATMEL_LCDC_PD_DATA19 (1ULL << 13) | ||
116 | #define ATMEL_LCDC_PD_DATA20 (1ULL << 14) | ||
117 | #define ATMEL_LCDC_PD_DATA21 (1ULL << 15) | ||
118 | #define ATMEL_LCDC_PD_DATA22 (1ULL << 16) | ||
119 | #define ATMEL_LCDC_PD_DATA23 (1ULL << 17) | ||
120 | |||
121 | /* LCDC on port E */ | ||
122 | #define ATMEL_LCDC_PE_CC (1ULL << (32 + 0)) | ||
123 | #define ATMEL_LCDC_PE_DVAL (1ULL << (32 + 1)) | ||
124 | #define ATMEL_LCDC_PE_MODE (1ULL << (32 + 2)) | ||
125 | #define ATMEL_LCDC_PE_DATA0 (1ULL << (32 + 3)) | ||
126 | #define ATMEL_LCDC_PE_DATA1 (1ULL << (32 + 4)) | ||
127 | #define ATMEL_LCDC_PE_DATA2 (1ULL << (32 + 5)) | ||
128 | #define ATMEL_LCDC_PE_DATA3 (1ULL << (32 + 6)) | ||
129 | #define ATMEL_LCDC_PE_DATA4 (1ULL << (32 + 7)) | ||
130 | #define ATMEL_LCDC_PE_DATA8 (1ULL << (32 + 8)) | ||
131 | #define ATMEL_LCDC_PE_DATA9 (1ULL << (32 + 9)) | ||
132 | #define ATMEL_LCDC_PE_DATA10 (1ULL << (32 + 10)) | ||
133 | #define ATMEL_LCDC_PE_DATA11 (1ULL << (32 + 11)) | ||
134 | #define ATMEL_LCDC_PE_DATA12 (1ULL << (32 + 12)) | ||
135 | #define ATMEL_LCDC_PE_DATA16 (1ULL << (32 + 13)) | ||
136 | #define ATMEL_LCDC_PE_DATA17 (1ULL << (32 + 14)) | ||
137 | #define ATMEL_LCDC_PE_DATA18 (1ULL << (32 + 15)) | ||
138 | #define ATMEL_LCDC_PE_DATA19 (1ULL << (32 + 16)) | ||
139 | #define ATMEL_LCDC_PE_DATA20 (1ULL << (32 + 17)) | ||
140 | #define ATMEL_LCDC_PE_DATA21 (1ULL << (32 + 18)) | ||
141 | |||
142 | |||
143 | #define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN) | ||
144 | |||
145 | |||
146 | #define ATMEL_LCDC_PRI_24B_DATA ( \ | ||
147 | ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \ | ||
148 | ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \ | ||
149 | ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
150 | ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \ | ||
151 | ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \ | ||
152 | ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \ | ||
153 | ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \ | ||
154 | ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \ | ||
155 | ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) | \ | ||
156 | ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \ | ||
157 | ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \ | ||
158 | ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23)) | ||
159 | |||
160 | #define ATMEL_LCDC_ALT_24B_DATA ( \ | ||
161 | ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \ | ||
162 | ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \ | ||
163 | ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
164 | ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \ | ||
165 | ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \ | ||
166 | ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \ | ||
167 | ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \ | ||
168 | ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \ | ||
169 | ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) | \ | ||
170 | ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \ | ||
171 | ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \ | ||
172 | ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23)) | ||
173 | |||
174 | #define ATMEL_LCDC_PRI_18B_DATA ( \ | ||
175 | ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \ | ||
176 | ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
177 | ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \ | ||
178 | ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \ | ||
179 | ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \ | ||
180 | ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \ | ||
181 | ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \ | ||
182 | ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \ | ||
183 | ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23)) | ||
184 | |||
185 | #define ATMEL_LCDC_ALT_18B_DATA ( \ | ||
186 | ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \ | ||
187 | ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \ | ||
188 | ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \ | ||
189 | ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \ | ||
190 | ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \ | ||
191 | ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \ | ||
192 | ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \ | ||
193 | ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \ | ||
194 | ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23)) | ||
195 | |||
196 | #define ATMEL_LCDC_PRI_15B_DATA ( \ | ||
197 | ATMEL_LCDC(PC, DATA3) | ATMEL_LCDC(PC, DATA4) | \ | ||
198 | ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \ | ||
199 | ATMEL_LCDC(PD, DATA7) | \ | ||
200 | ATMEL_LCDC(PD, DATA11) | ATMEL_LCDC(PD, DATA12) | \ | ||
201 | ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \ | ||
202 | ATMEL_LCDC(PD, DATA15) | \ | ||
203 | ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20) | \ | ||
204 | ATMEL_LCDC(PD, DATA21) | ATMEL_LCDC(PD, DATA22) | \ | ||
205 | ATMEL_LCDC(PD, DATA23)) | ||
206 | |||
207 | #define ATMEL_LCDC_ALT_15B_DATA ( \ | ||
208 | ATMEL_LCDC(PE, DATA3) | ATMEL_LCDC(PE, DATA4) | \ | ||
209 | ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \ | ||
210 | ATMEL_LCDC(PD, DATA7) | \ | ||
211 | ATMEL_LCDC(PE, DATA11) | ATMEL_LCDC(PE, DATA12) | \ | ||
212 | ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \ | ||
213 | ATMEL_LCDC(PD, DATA15) | \ | ||
214 | ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20) | \ | ||
215 | ATMEL_LCDC(PE, DATA21) | ATMEL_LCDC(PD, DATA22) | \ | ||
216 | ATMEL_LCDC(PD, DATA23)) | ||
217 | |||
218 | #define ATMEL_LCDC_PRI_CONTROL ( \ | ||
219 | ATMEL_LCDC(PC, CC) | ATMEL_LCDC(PC, DVAL) | \ | ||
220 | ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR)) | ||
221 | |||
222 | #define ATMEL_LCDC_ALT_CONTROL ( \ | ||
223 | ATMEL_LCDC(PE, CC) | ATMEL_LCDC(PE, DVAL) | \ | ||
224 | ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR)) | ||
225 | |||
226 | #define ATMEL_LCDC_CONTROL ( \ | ||
227 | ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \ | ||
228 | ATMEL_LCDC(PC, PCLK)) | ||
229 | |||
230 | #define ATMEL_LCDC_PRI_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA) | ||
231 | |||
232 | #define ATMEL_LCDC_ALT_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA) | ||
233 | |||
234 | #define ATMEL_LCDC_PRI_18BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_18B_DATA) | ||
235 | |||
236 | #define ATMEL_LCDC_ALT_18BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_18B_DATA) | ||
237 | |||
238 | #define ATMEL_LCDC_PRI_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA) | ||
239 | |||
240 | #define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA) | ||
241 | |||
242 | /* Bitmask for all EBI data (D16..D31) pins on port E */ | ||
243 | #define ATMEL_EBI_PE_DATA_ALL (0x0000FFFF) | ||
244 | |||
245 | #endif /* __ASM_ARCH_AT32AP700X_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h deleted file mode 100644 index f1a316d52c73..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/board.h +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | /* | ||
2 | * Platform data definitions. | ||
3 | */ | ||
4 | #ifndef __ASM_ARCH_BOARD_H | ||
5 | #define __ASM_ARCH_BOARD_H | ||
6 | |||
7 | #include <linux/types.h> | ||
8 | #include <linux/serial.h> | ||
9 | #include <linux/platform_data/macb.h> | ||
10 | #include <linux/platform_data/atmel.h> | ||
11 | |||
12 | #define GPIO_PIN_NONE (-1) | ||
13 | |||
14 | /* | ||
15 | * Clock rates for various on-board oscillators. The number of entries | ||
16 | * in this array is chip-dependent. | ||
17 | */ | ||
18 | extern unsigned long at32_board_osc_rates[]; | ||
19 | |||
20 | /* | ||
21 | * This used to add essential system devices, but this is now done | ||
22 | * automatically. Please don't use it in new board code. | ||
23 | */ | ||
24 | static inline void __deprecated at32_add_system_devices(void) | ||
25 | { | ||
26 | |||
27 | } | ||
28 | |||
29 | extern struct platform_device *atmel_default_console_device; | ||
30 | |||
31 | /* Flags for selecting USART extra pins */ | ||
32 | #define ATMEL_USART_RTS 0x01 | ||
33 | #define ATMEL_USART_CTS 0x02 | ||
34 | #define ATMEL_USART_CLK 0x04 | ||
35 | |||
36 | void at32_map_usart(unsigned int hw_id, unsigned int line, int flags); | ||
37 | struct platform_device *at32_add_device_usart(unsigned int id); | ||
38 | |||
39 | struct platform_device * | ||
40 | at32_add_device_eth(unsigned int id, struct macb_platform_data *data); | ||
41 | |||
42 | struct spi_board_info; | ||
43 | struct platform_device * | ||
44 | at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n); | ||
45 | void at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, unsigned int n); | ||
46 | |||
47 | struct atmel_lcdfb_pdata; | ||
48 | struct platform_device * | ||
49 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_pdata *data, | ||
50 | unsigned long fbmem_start, unsigned long fbmem_len, | ||
51 | u64 pin_mask); | ||
52 | |||
53 | struct usba_platform_data; | ||
54 | struct platform_device * | ||
55 | at32_add_device_usba(unsigned int id, struct usba_platform_data *data); | ||
56 | |||
57 | struct ide_platform_data { | ||
58 | u8 cs; | ||
59 | }; | ||
60 | struct platform_device * | ||
61 | at32_add_device_ide(unsigned int id, unsigned int extint, | ||
62 | struct ide_platform_data *data); | ||
63 | |||
64 | /* mask says which PWM channels to mux */ | ||
65 | struct platform_device *at32_add_device_pwm(u32 mask); | ||
66 | |||
67 | /* depending on what's hooked up, not all SSC pins will be used */ | ||
68 | #define ATMEL_SSC_TK 0x01 | ||
69 | #define ATMEL_SSC_TF 0x02 | ||
70 | #define ATMEL_SSC_TD 0x04 | ||
71 | #define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD) | ||
72 | |||
73 | #define ATMEL_SSC_RK 0x10 | ||
74 | #define ATMEL_SSC_RF 0x20 | ||
75 | #define ATMEL_SSC_RD 0x40 | ||
76 | #define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD) | ||
77 | |||
78 | struct platform_device * | ||
79 | at32_add_device_ssc(unsigned int id, unsigned int flags); | ||
80 | |||
81 | struct i2c_board_info; | ||
82 | struct platform_device *at32_add_device_twi(unsigned int id, | ||
83 | struct i2c_board_info *b, | ||
84 | unsigned int n); | ||
85 | |||
86 | struct mci_platform_data; | ||
87 | struct platform_device * | ||
88 | at32_add_device_mci(unsigned int id, struct mci_platform_data *data); | ||
89 | |||
90 | struct ac97c_platform_data; | ||
91 | struct platform_device * | ||
92 | at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, | ||
93 | unsigned int flags); | ||
94 | |||
95 | struct atmel_abdac_pdata; | ||
96 | struct platform_device * | ||
97 | at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data); | ||
98 | |||
99 | struct platform_device *at32_add_device_psif(unsigned int id); | ||
100 | |||
101 | struct cf_platform_data { | ||
102 | int detect_pin; | ||
103 | int reset_pin; | ||
104 | int vcc_pin; | ||
105 | int ready_pin; | ||
106 | u8 cs; | ||
107 | }; | ||
108 | struct platform_device * | ||
109 | at32_add_device_cf(unsigned int id, unsigned int extint, | ||
110 | struct cf_platform_data *data); | ||
111 | |||
112 | struct platform_device * | ||
113 | at32_add_device_nand(unsigned int id, struct atmel_nand_data *data); | ||
114 | |||
115 | #endif /* __ASM_ARCH_BOARD_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/chip.h b/arch/avr32/mach-at32ap/include/mach/chip.h deleted file mode 100644 index 5efca6da6acb..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/chip.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 chip-specific definitions | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_AVR32_ARCH_CHIP_H__ | ||
11 | #define __ASM_AVR32_ARCH_CHIP_H__ | ||
12 | |||
13 | #if defined(CONFIG_CPU_AT32AP700X) | ||
14 | # include <mach/at32ap700x.h> | ||
15 | #else | ||
16 | # error Unknown chip type selected | ||
17 | #endif | ||
18 | |||
19 | #endif /* __ASM_AVR32_ARCH_CHIP_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h deleted file mode 100644 index 4181086f4ddc..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/cpu.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 CPU identification | ||
3 | * | ||
4 | * Copyright (C) 2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_ARCH_CPU_H | ||
11 | #define __ASM_ARCH_CPU_H | ||
12 | |||
13 | /* | ||
14 | * Only AT32AP7000 is defined for now. We can identify the specific | ||
15 | * chip at runtime, but I'm not sure if it's really worth it. | ||
16 | */ | ||
17 | #ifdef CONFIG_CPU_AT32AP700X | ||
18 | # define cpu_is_at32ap7000() (1) | ||
19 | #else | ||
20 | # define cpu_is_at32ap7000() (0) | ||
21 | #endif | ||
22 | |||
23 | #endif /* __ASM_ARCH_CPU_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/gpio.h b/arch/avr32/mach-at32ap/include/mach/gpio.h deleted file mode 100644 index 0180f584ef03..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/gpio.h +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_ARCH_GPIO_H | ||
2 | #define __ASM_AVR32_ARCH_GPIO_H | ||
3 | |||
4 | #include <linux/compiler.h> | ||
5 | #include <asm/irq.h> | ||
6 | |||
7 | |||
8 | /* Some GPIO chips can manage IRQs; some can't. The exact numbers can | ||
9 | * be changed if needed, but for the moment they're not configurable. | ||
10 | */ | ||
11 | #define ARCH_NR_GPIOS (NR_GPIO_IRQS + 2 * 32) | ||
12 | |||
13 | |||
14 | /* Arch-neutral GPIO API, supporting both "native" and external GPIOs. */ | ||
15 | #include <asm-generic/gpio.h> | ||
16 | |||
17 | static inline int gpio_get_value(unsigned int gpio) | ||
18 | { | ||
19 | return __gpio_get_value(gpio); | ||
20 | } | ||
21 | |||
22 | static inline void gpio_set_value(unsigned int gpio, int value) | ||
23 | { | ||
24 | __gpio_set_value(gpio, value); | ||
25 | } | ||
26 | |||
27 | static inline int gpio_cansleep(unsigned int gpio) | ||
28 | { | ||
29 | return __gpio_cansleep(gpio); | ||
30 | } | ||
31 | |||
32 | |||
33 | static inline int gpio_to_irq(unsigned int gpio) | ||
34 | { | ||
35 | if (gpio < NR_GPIO_IRQS) | ||
36 | return gpio + GPIO_IRQ_BASE; | ||
37 | return -EINVAL; | ||
38 | } | ||
39 | |||
40 | static inline int irq_to_gpio(unsigned int irq) | ||
41 | { | ||
42 | return irq - GPIO_IRQ_BASE; | ||
43 | } | ||
44 | |||
45 | #endif /* __ASM_AVR32_ARCH_GPIO_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/hmatrix.h b/arch/avr32/mach-at32ap/include/mach/hmatrix.h deleted file mode 100644 index 7a368f227ebc..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/hmatrix.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | /* | ||
2 | * High-Speed Bus Matrix configuration registers | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __HMATRIX_H | ||
11 | #define __HMATRIX_H | ||
12 | |||
13 | extern struct clk at32_hmatrix_clk; | ||
14 | |||
15 | void hmatrix_write_reg(unsigned long offset, u32 value); | ||
16 | u32 hmatrix_read_reg(unsigned long offset); | ||
17 | |||
18 | void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask); | ||
19 | void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask); | ||
20 | |||
21 | /* Master Configuration register */ | ||
22 | #define HMATRIX_MCFG(m) (0x0000 + 4 * (m)) | ||
23 | /* Undefined length burst limit */ | ||
24 | # define HMATRIX_MCFG_ULBT_INFINITE 0 /* Infinite length */ | ||
25 | # define HMATRIX_MCFG_ULBT_SINGLE 1 /* Single Access */ | ||
26 | # define HMATRIX_MCFG_ULBT_FOUR_BEAT 2 /* Four beat */ | ||
27 | # define HMATRIX_MCFG_ULBT_EIGHT_BEAT 3 /* Eight beat */ | ||
28 | # define HMATRIX_MCFG_ULBT_SIXTEEN_BEAT 4 /* Sixteen beat */ | ||
29 | |||
30 | /* Slave Configuration register */ | ||
31 | #define HMATRIX_SCFG(s) (0x0040 + 4 * (s)) | ||
32 | # define HMATRIX_SCFG_SLOT_CYCLE(x) ((x) << 0) /* Max burst cycles */ | ||
33 | # define HMATRIX_SCFG_DEFMSTR_NONE ( 0 << 16) /* No default master */ | ||
34 | # define HMATRIX_SCFG_DEFMSTR_LAST ( 1 << 16) /* Last def master */ | ||
35 | # define HMATRIX_SCFG_DEFMSTR_FIXED ( 2 << 16) /* Fixed def master */ | ||
36 | # define HMATRIX_SCFG_FIXED_DEFMSTR(m) ((m) << 18) /* Fixed master ID */ | ||
37 | # define HMATRIX_SCFG_ARBT_ROUND_ROBIN ( 0 << 24) /* RR arbitration */ | ||
38 | # define HMATRIX_SCFG_ARBT_FIXED_PRIO ( 1 << 24) /* Fixed priority */ | ||
39 | |||
40 | /* Slave Priority register A (master 0..7) */ | ||
41 | #define HMATRIX_PRAS(s) (0x0080 + 8 * (s)) | ||
42 | # define HMATRIX_PRAS_PRIO(m, p) ((p) << ((m) * 4)) | ||
43 | |||
44 | /* Slave Priority register A (master 8..15) */ | ||
45 | #define HMATRIX_PRBS(s) (0x0084 + 8 * (s)) | ||
46 | # define HMATRIX_PRBS_PRIO(m, p) ((p) << (((m) - 8) * 4)) | ||
47 | |||
48 | /* Master Remap Control Register */ | ||
49 | #define HMATRIX_MRCR 0x0100 | ||
50 | # define HMATRIX_MRCR_REMAP(m) ( 1 << (m)) /* Remap master m */ | ||
51 | |||
52 | /* Special Function Register. Bit definitions are chip-specific */ | ||
53 | #define HMATRIX_SFR(s) (0x0110 + 4 * (s)) | ||
54 | |||
55 | #endif /* __HMATRIX_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/init.h b/arch/avr32/mach-at32ap/include/mach/init.h deleted file mode 100644 index bc40e3d46150..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/init.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * AT32AP platform initialization calls. | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_AVR32_AT32AP_INIT_H__ | ||
11 | #define __ASM_AVR32_AT32AP_INIT_H__ | ||
12 | |||
13 | void setup_platform(void); | ||
14 | void setup_board(void); | ||
15 | |||
16 | void at32_setup_serial_console(unsigned int usart_id); | ||
17 | |||
18 | #endif /* __ASM_AVR32_AT32AP_INIT_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/io.h b/arch/avr32/mach-at32ap/include/mach/io.h deleted file mode 100644 index 22ea79b74052..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/io.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_ARCH_AT32AP_IO_H | ||
2 | #define __ASM_AVR32_ARCH_AT32AP_IO_H | ||
3 | |||
4 | #include <linux/swab.h> | ||
5 | |||
6 | #if defined(CONFIG_AP700X_32_BIT_SMC) | ||
7 | # define __swizzle_addr_b(addr) (addr ^ 3UL) | ||
8 | # define __swizzle_addr_w(addr) (addr ^ 2UL) | ||
9 | # define __swizzle_addr_l(addr) (addr) | ||
10 | # define ioswabb(a, x) (x) | ||
11 | # define ioswabw(a, x) (x) | ||
12 | # define ioswabl(a, x) (x) | ||
13 | # define __mem_ioswabb(a, x) (x) | ||
14 | # define __mem_ioswabw(a, x) swab16(x) | ||
15 | # define __mem_ioswabl(a, x) swab32(x) | ||
16 | #elif defined(CONFIG_AP700X_16_BIT_SMC) | ||
17 | # define __swizzle_addr_b(addr) (addr ^ 1UL) | ||
18 | # define __swizzle_addr_w(addr) (addr) | ||
19 | # define __swizzle_addr_l(addr) (addr) | ||
20 | # define ioswabb(a, x) (x) | ||
21 | # define ioswabw(a, x) (x) | ||
22 | # define ioswabl(a, x) swahw32(x) | ||
23 | # define __mem_ioswabb(a, x) (x) | ||
24 | # define __mem_ioswabw(a, x) swab16(x) | ||
25 | # define __mem_ioswabl(a, x) swahb32(x) | ||
26 | #else | ||
27 | # define __swizzle_addr_b(addr) (addr) | ||
28 | # define __swizzle_addr_w(addr) (addr) | ||
29 | # define __swizzle_addr_l(addr) (addr) | ||
30 | # define ioswabb(a, x) (x) | ||
31 | # define ioswabw(a, x) swab16(x) | ||
32 | # define ioswabl(a, x) swab32(x) | ||
33 | # define __mem_ioswabb(a, x) (x) | ||
34 | # define __mem_ioswabw(a, x) (x) | ||
35 | # define __mem_ioswabl(a, x) (x) | ||
36 | #endif | ||
37 | |||
38 | #endif /* __ASM_AVR32_ARCH_AT32AP_IO_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/irq.h b/arch/avr32/mach-at32ap/include/mach/irq.h deleted file mode 100644 index 608e350368c7..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/irq.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef __ASM_AVR32_ARCH_IRQ_H | ||
2 | #define __ASM_AVR32_ARCH_IRQ_H | ||
3 | |||
4 | #define EIM_IRQ_BASE NR_INTERNAL_IRQS | ||
5 | #define NR_EIM_IRQS 32 | ||
6 | #define AT32_EXTINT(n) (EIM_IRQ_BASE + (n)) | ||
7 | |||
8 | #define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS) | ||
9 | #define NR_GPIO_CTLR (5 /*internal*/ + 1 /*external*/) | ||
10 | #define NR_GPIO_IRQS (NR_GPIO_CTLR * 32) | ||
11 | |||
12 | #define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS) | ||
13 | |||
14 | #endif /* __ASM_AVR32_ARCH_IRQ_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/pm.h b/arch/avr32/mach-at32ap/include/mach/pm.h deleted file mode 100644 index f29ff2cd23d3..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/pm.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 AP Power Management. | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_AVR32_ARCH_PM_H | ||
11 | #define __ASM_AVR32_ARCH_PM_H | ||
12 | |||
13 | /* Possible arguments to the "sleep" instruction */ | ||
14 | #define CPU_SLEEP_IDLE 0 | ||
15 | #define CPU_SLEEP_FROZEN 1 | ||
16 | #define CPU_SLEEP_STANDBY 2 | ||
17 | #define CPU_SLEEP_STOP 3 | ||
18 | #define CPU_SLEEP_STATIC 5 | ||
19 | |||
20 | #ifndef __ASSEMBLY__ | ||
21 | extern void cpu_enter_idle(void); | ||
22 | extern void cpu_enter_standby(unsigned long sdramc_base); | ||
23 | |||
24 | void intc_set_suspend_handler(unsigned long offset); | ||
25 | #endif | ||
26 | |||
27 | #endif /* __ASM_AVR32_ARCH_PM_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h deleted file mode 100644 index 4873024e3b96..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/portmux.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* | ||
2 | * AT32 portmux interface. | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_ARCH_PORTMUX_H__ | ||
11 | #define __ASM_ARCH_PORTMUX_H__ | ||
12 | |||
13 | /* | ||
14 | * Set up pin multiplexing, called from board init only. | ||
15 | * | ||
16 | * The following flags determine the initial state of the pin. | ||
17 | */ | ||
18 | #define AT32_GPIOF_PULLUP 0x00000001 /* (not-OUT) Enable pull-up */ | ||
19 | #define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */ | ||
20 | #define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */ | ||
21 | #define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ | ||
22 | #define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */ | ||
23 | |||
24 | void at32_select_periph(unsigned int port, unsigned int pin, | ||
25 | unsigned int periph, unsigned long flags); | ||
26 | void at32_select_gpio(unsigned int pin, unsigned long flags); | ||
27 | void at32_deselect_pin(unsigned int pin); | ||
28 | void at32_reserve_pin(unsigned int port, u32 pin_mask); | ||
29 | |||
30 | #endif /* __ASM_ARCH_PORTMUX_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/smc.h b/arch/avr32/mach-at32ap/include/mach/smc.h deleted file mode 100644 index c98eea44a70a..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/smc.h +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | /* | ||
2 | * Static Memory Controller for AT32 chips | ||
3 | * | ||
4 | * Copyright (C) 2006 Atmel Corporation | ||
5 | * | ||
6 | * Inspired by the OMAP2 General-Purpose Memory Controller interface | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #ifndef __ARCH_AT32AP_SMC_H | ||
13 | #define __ARCH_AT32AP_SMC_H | ||
14 | |||
15 | /* | ||
16 | * All timing parameters are in nanoseconds. | ||
17 | */ | ||
18 | struct smc_timing { | ||
19 | /* Delay from address valid to assertion of given strobe */ | ||
20 | int ncs_read_setup; | ||
21 | int nrd_setup; | ||
22 | int ncs_write_setup; | ||
23 | int nwe_setup; | ||
24 | |||
25 | /* Pulse length of given strobe */ | ||
26 | int ncs_read_pulse; | ||
27 | int nrd_pulse; | ||
28 | int ncs_write_pulse; | ||
29 | int nwe_pulse; | ||
30 | |||
31 | /* Total cycle length of given operation */ | ||
32 | int read_cycle; | ||
33 | int write_cycle; | ||
34 | |||
35 | /* Minimal recovery times, will extend cycle if needed */ | ||
36 | int ncs_read_recover; | ||
37 | int nrd_recover; | ||
38 | int ncs_write_recover; | ||
39 | int nwe_recover; | ||
40 | }; | ||
41 | |||
42 | /* | ||
43 | * All timing parameters are in clock cycles. | ||
44 | */ | ||
45 | struct smc_config { | ||
46 | |||
47 | /* Delay from address valid to assertion of given strobe */ | ||
48 | u8 ncs_read_setup; | ||
49 | u8 nrd_setup; | ||
50 | u8 ncs_write_setup; | ||
51 | u8 nwe_setup; | ||
52 | |||
53 | /* Pulse length of given strobe */ | ||
54 | u8 ncs_read_pulse; | ||
55 | u8 nrd_pulse; | ||
56 | u8 ncs_write_pulse; | ||
57 | u8 nwe_pulse; | ||
58 | |||
59 | /* Total cycle length of given operation */ | ||
60 | u8 read_cycle; | ||
61 | u8 write_cycle; | ||
62 | |||
63 | /* Bus width in bytes */ | ||
64 | u8 bus_width; | ||
65 | |||
66 | /* | ||
67 | * 0: Data is sampled on rising edge of NCS | ||
68 | * 1: Data is sampled on rising edge of NRD | ||
69 | */ | ||
70 | unsigned int nrd_controlled:1; | ||
71 | |||
72 | /* | ||
73 | * 0: Data is driven on falling edge of NCS | ||
74 | * 1: Data is driven on falling edge of NWR | ||
75 | */ | ||
76 | unsigned int nwe_controlled:1; | ||
77 | |||
78 | /* | ||
79 | * 0: NWAIT is disabled | ||
80 | * 1: Reserved | ||
81 | * 2: NWAIT is frozen mode | ||
82 | * 3: NWAIT in ready mode | ||
83 | */ | ||
84 | unsigned int nwait_mode:2; | ||
85 | |||
86 | /* | ||
87 | * 0: Byte select access type | ||
88 | * 1: Byte write access type | ||
89 | */ | ||
90 | unsigned int byte_write:1; | ||
91 | |||
92 | /* | ||
93 | * Number of clock cycles before data is released after | ||
94 | * the rising edge of the read controlling signal | ||
95 | * | ||
96 | * Total cycles from SMC is tdf_cycles + 1 | ||
97 | */ | ||
98 | unsigned int tdf_cycles:4; | ||
99 | |||
100 | /* | ||
101 | * 0: TDF optimization disabled | ||
102 | * 1: TDF optimization enabled | ||
103 | */ | ||
104 | unsigned int tdf_mode:1; | ||
105 | }; | ||
106 | |||
107 | extern void smc_set_timing(struct smc_config *config, | ||
108 | const struct smc_timing *timing); | ||
109 | |||
110 | extern int smc_set_configuration(int cs, const struct smc_config *config); | ||
111 | extern struct smc_config *smc_get_configuration(int cs); | ||
112 | |||
113 | #endif /* __ARCH_AT32AP_SMC_H */ | ||
diff --git a/arch/avr32/mach-at32ap/include/mach/sram.h b/arch/avr32/mach-at32ap/include/mach/sram.h deleted file mode 100644 index 4838dae7601a..000000000000 --- a/arch/avr32/mach-at32ap/include/mach/sram.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* | ||
2 | * Simple SRAM allocator | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_AVR32_ARCH_SRAM_H | ||
11 | #define __ASM_AVR32_ARCH_SRAM_H | ||
12 | |||
13 | #include <linux/genalloc.h> | ||
14 | |||
15 | extern struct gen_pool *sram_pool; | ||
16 | |||
17 | static inline unsigned long sram_alloc(size_t len) | ||
18 | { | ||
19 | if (!sram_pool) | ||
20 | return 0UL; | ||
21 | |||
22 | return gen_pool_alloc(sram_pool, len); | ||
23 | } | ||
24 | |||
25 | static inline void sram_free(unsigned long addr, size_t len) | ||
26 | { | ||
27 | return gen_pool_free(sram_pool, addr, len); | ||
28 | } | ||
29 | |||
30 | #endif /* __ASM_AVR32_ARCH_SRAM_H */ | ||
diff --git a/arch/avr32/mach-at32ap/intc.c b/arch/avr32/mach-at32ap/intc.c deleted file mode 100644 index aaff83cc50f0..000000000000 --- a/arch/avr32/mach-at32ap/intc.c +++ /dev/null | |||
@@ -1,200 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006, 2008 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/clk.h> | ||
10 | #include <linux/err.h> | ||
11 | #include <linux/init.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/irq.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/syscore_ops.h> | ||
16 | #include <linux/export.h> | ||
17 | |||
18 | #include <asm/io.h> | ||
19 | |||
20 | #include "intc.h" | ||
21 | |||
22 | struct intc { | ||
23 | void __iomem *regs; | ||
24 | struct irq_chip chip; | ||
25 | #ifdef CONFIG_PM | ||
26 | unsigned long suspend_ipr; | ||
27 | unsigned long saved_ipr[64]; | ||
28 | #endif | ||
29 | }; | ||
30 | |||
31 | extern struct platform_device at32_intc0_device; | ||
32 | |||
33 | /* | ||
34 | * TODO: We may be able to implement mask/unmask by setting IxM flags | ||
35 | * in the status register. | ||
36 | */ | ||
37 | static void intc_mask_irq(struct irq_data *d) | ||
38 | { | ||
39 | |||
40 | } | ||
41 | |||
42 | static void intc_unmask_irq(struct irq_data *d) | ||
43 | { | ||
44 | |||
45 | } | ||
46 | |||
47 | static struct intc intc0 = { | ||
48 | .chip = { | ||
49 | .name = "intc", | ||
50 | .irq_mask = intc_mask_irq, | ||
51 | .irq_unmask = intc_unmask_irq, | ||
52 | }, | ||
53 | }; | ||
54 | |||
55 | /* | ||
56 | * All interrupts go via intc at some point. | ||
57 | */ | ||
58 | asmlinkage void do_IRQ(int level, struct pt_regs *regs) | ||
59 | { | ||
60 | struct pt_regs *old_regs; | ||
61 | unsigned int irq; | ||
62 | unsigned long status_reg; | ||
63 | |||
64 | local_irq_disable(); | ||
65 | |||
66 | old_regs = set_irq_regs(regs); | ||
67 | |||
68 | irq_enter(); | ||
69 | |||
70 | irq = intc_readl(&intc0, INTCAUSE0 - 4 * level); | ||
71 | generic_handle_irq(irq); | ||
72 | |||
73 | /* | ||
74 | * Clear all interrupt level masks so that we may handle | ||
75 | * interrupts during softirq processing. If this is a nested | ||
76 | * interrupt, interrupts must stay globally disabled until we | ||
77 | * return. | ||
78 | */ | ||
79 | status_reg = sysreg_read(SR); | ||
80 | status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M) | ||
81 | | SYSREG_BIT(I2M) | SYSREG_BIT(I3M)); | ||
82 | sysreg_write(SR, status_reg); | ||
83 | |||
84 | irq_exit(); | ||
85 | |||
86 | set_irq_regs(old_regs); | ||
87 | } | ||
88 | |||
89 | void __init init_IRQ(void) | ||
90 | { | ||
91 | extern void _evba(void); | ||
92 | extern void irq_level0(void); | ||
93 | struct resource *regs; | ||
94 | struct clk *pclk; | ||
95 | unsigned int i; | ||
96 | u32 offset, readback; | ||
97 | |||
98 | regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0); | ||
99 | if (!regs) { | ||
100 | printk(KERN_EMERG "intc: no mmio resource defined\n"); | ||
101 | goto fail; | ||
102 | } | ||
103 | pclk = clk_get(&at32_intc0_device.dev, "pclk"); | ||
104 | if (IS_ERR(pclk)) { | ||
105 | printk(KERN_EMERG "intc: no clock defined\n"); | ||
106 | goto fail; | ||
107 | } | ||
108 | |||
109 | clk_enable(pclk); | ||
110 | |||
111 | intc0.regs = ioremap(regs->start, resource_size(regs)); | ||
112 | if (!intc0.regs) { | ||
113 | printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n", | ||
114 | (unsigned long)regs->start); | ||
115 | goto fail; | ||
116 | } | ||
117 | |||
118 | /* | ||
119 | * Initialize all interrupts to level 0 (lowest priority). The | ||
120 | * priority level may be changed by calling | ||
121 | * irq_set_priority(). | ||
122 | * | ||
123 | */ | ||
124 | offset = (unsigned long)&irq_level0 - (unsigned long)&_evba; | ||
125 | for (i = 0; i < NR_INTERNAL_IRQS; i++) { | ||
126 | intc_writel(&intc0, INTPR0 + 4 * i, offset); | ||
127 | readback = intc_readl(&intc0, INTPR0 + 4 * i); | ||
128 | if (readback == offset) | ||
129 | irq_set_chip_and_handler(i, &intc0.chip, | ||
130 | handle_simple_irq); | ||
131 | } | ||
132 | |||
133 | /* Unmask all interrupt levels */ | ||
134 | sysreg_write(SR, (sysreg_read(SR) | ||
135 | & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M))); | ||
136 | |||
137 | return; | ||
138 | |||
139 | fail: | ||
140 | panic("Interrupt controller initialization failed!\n"); | ||
141 | } | ||
142 | |||
143 | #ifdef CONFIG_PM | ||
144 | void intc_set_suspend_handler(unsigned long offset) | ||
145 | { | ||
146 | intc0.suspend_ipr = offset; | ||
147 | } | ||
148 | |||
149 | static int intc_suspend(void) | ||
150 | { | ||
151 | int i; | ||
152 | |||
153 | if (unlikely(!irqs_disabled())) { | ||
154 | pr_err("intc_suspend: called with interrupts enabled\n"); | ||
155 | return -EINVAL; | ||
156 | } | ||
157 | |||
158 | if (unlikely(!intc0.suspend_ipr)) { | ||
159 | pr_err("intc_suspend: suspend_ipr not initialized\n"); | ||
160 | return -EINVAL; | ||
161 | } | ||
162 | |||
163 | for (i = 0; i < 64; i++) { | ||
164 | intc0.saved_ipr[i] = intc_readl(&intc0, INTPR0 + 4 * i); | ||
165 | intc_writel(&intc0, INTPR0 + 4 * i, intc0.suspend_ipr); | ||
166 | } | ||
167 | |||
168 | return 0; | ||
169 | } | ||
170 | |||
171 | static void intc_resume(void) | ||
172 | { | ||
173 | int i; | ||
174 | |||
175 | for (i = 0; i < 64; i++) | ||
176 | intc_writel(&intc0, INTPR0 + 4 * i, intc0.saved_ipr[i]); | ||
177 | } | ||
178 | #else | ||
179 | #define intc_suspend NULL | ||
180 | #define intc_resume NULL | ||
181 | #endif | ||
182 | |||
183 | static struct syscore_ops intc_syscore_ops = { | ||
184 | .suspend = intc_suspend, | ||
185 | .resume = intc_resume, | ||
186 | }; | ||
187 | |||
188 | static int __init intc_init_syscore(void) | ||
189 | { | ||
190 | register_syscore_ops(&intc_syscore_ops); | ||
191 | |||
192 | return 0; | ||
193 | } | ||
194 | device_initcall(intc_init_syscore); | ||
195 | |||
196 | unsigned long intc_get_pending(unsigned int group) | ||
197 | { | ||
198 | return intc_readl(&intc0, INTREQ0 + 4 * group); | ||
199 | } | ||
200 | EXPORT_SYMBOL_GPL(intc_get_pending); | ||
diff --git a/arch/avr32/mach-at32ap/intc.h b/arch/avr32/mach-at32ap/intc.h deleted file mode 100644 index 4d3664e43a8e..000000000000 --- a/arch/avr32/mach-at32ap/intc.h +++ /dev/null | |||
@@ -1,329 +0,0 @@ | |||
1 | /* | ||
2 | * Automatically generated by gen-header.xsl | ||
3 | */ | ||
4 | #ifndef __ASM_AVR32_PERIHP_INTC_H__ | ||
5 | #define __ASM_AVR32_PERIHP_INTC_H__ | ||
6 | |||
7 | #define INTC_NUM_INT_GRPS 33 | ||
8 | |||
9 | #define INTC_INTPR0 0x0 | ||
10 | # define INTC_INTPR0_INTLEV_OFFSET 30 | ||
11 | # define INTC_INTPR0_INTLEV_SIZE 2 | ||
12 | # define INTC_INTPR0_OFFSET_OFFSET 0 | ||
13 | # define INTC_INTPR0_OFFSET_SIZE 24 | ||
14 | #define INTC_INTREQ0 0x100 | ||
15 | # define INTC_INTREQ0_IREQUEST0_OFFSET 0 | ||
16 | # define INTC_INTREQ0_IREQUEST0_SIZE 1 | ||
17 | # define INTC_INTREQ0_IREQUEST1_OFFSET 1 | ||
18 | # define INTC_INTREQ0_IREQUEST1_SIZE 1 | ||
19 | #define INTC_INTPR1 0x4 | ||
20 | # define INTC_INTPR1_INTLEV_OFFSET 30 | ||
21 | # define INTC_INTPR1_INTLEV_SIZE 2 | ||
22 | # define INTC_INTPR1_OFFSET_OFFSET 0 | ||
23 | # define INTC_INTPR1_OFFSET_SIZE 24 | ||
24 | #define INTC_INTREQ1 0x104 | ||
25 | # define INTC_INTREQ1_IREQUEST32_OFFSET 0 | ||
26 | # define INTC_INTREQ1_IREQUEST32_SIZE 1 | ||
27 | # define INTC_INTREQ1_IREQUEST33_OFFSET 1 | ||
28 | # define INTC_INTREQ1_IREQUEST33_SIZE 1 | ||
29 | # define INTC_INTREQ1_IREQUEST34_OFFSET 2 | ||
30 | # define INTC_INTREQ1_IREQUEST34_SIZE 1 | ||
31 | # define INTC_INTREQ1_IREQUEST35_OFFSET 3 | ||
32 | # define INTC_INTREQ1_IREQUEST35_SIZE 1 | ||
33 | # define INTC_INTREQ1_IREQUEST36_OFFSET 4 | ||
34 | # define INTC_INTREQ1_IREQUEST36_SIZE 1 | ||
35 | # define INTC_INTREQ1_IREQUEST37_OFFSET 5 | ||
36 | # define INTC_INTREQ1_IREQUEST37_SIZE 1 | ||
37 | #define INTC_INTPR2 0x8 | ||
38 | # define INTC_INTPR2_INTLEV_OFFSET 30 | ||
39 | # define INTC_INTPR2_INTLEV_SIZE 2 | ||
40 | # define INTC_INTPR2_OFFSET_OFFSET 0 | ||
41 | # define INTC_INTPR2_OFFSET_SIZE 24 | ||
42 | #define INTC_INTREQ2 0x108 | ||
43 | # define INTC_INTREQ2_IREQUEST64_OFFSET 0 | ||
44 | # define INTC_INTREQ2_IREQUEST64_SIZE 1 | ||
45 | # define INTC_INTREQ2_IREQUEST65_OFFSET 1 | ||
46 | # define INTC_INTREQ2_IREQUEST65_SIZE 1 | ||
47 | # define INTC_INTREQ2_IREQUEST66_OFFSET 2 | ||
48 | # define INTC_INTREQ2_IREQUEST66_SIZE 1 | ||
49 | # define INTC_INTREQ2_IREQUEST67_OFFSET 3 | ||
50 | # define INTC_INTREQ2_IREQUEST67_SIZE 1 | ||
51 | # define INTC_INTREQ2_IREQUEST68_OFFSET 4 | ||
52 | # define INTC_INTREQ2_IREQUEST68_SIZE 1 | ||
53 | #define INTC_INTPR3 0xc | ||
54 | # define INTC_INTPR3_INTLEV_OFFSET 30 | ||
55 | # define INTC_INTPR3_INTLEV_SIZE 2 | ||
56 | # define INTC_INTPR3_OFFSET_OFFSET 0 | ||
57 | # define INTC_INTPR3_OFFSET_SIZE 24 | ||
58 | #define INTC_INTREQ3 0x10c | ||
59 | # define INTC_INTREQ3_IREQUEST96_OFFSET 0 | ||
60 | # define INTC_INTREQ3_IREQUEST96_SIZE 1 | ||
61 | #define INTC_INTPR4 0x10 | ||
62 | # define INTC_INTPR4_INTLEV_OFFSET 30 | ||
63 | # define INTC_INTPR4_INTLEV_SIZE 2 | ||
64 | # define INTC_INTPR4_OFFSET_OFFSET 0 | ||
65 | # define INTC_INTPR4_OFFSET_SIZE 24 | ||
66 | #define INTC_INTREQ4 0x110 | ||
67 | # define INTC_INTREQ4_IREQUEST128_OFFSET 0 | ||
68 | # define INTC_INTREQ4_IREQUEST128_SIZE 1 | ||
69 | #define INTC_INTPR5 0x14 | ||
70 | # define INTC_INTPR5_INTLEV_OFFSET 30 | ||
71 | # define INTC_INTPR5_INTLEV_SIZE 2 | ||
72 | # define INTC_INTPR5_OFFSET_OFFSET 0 | ||
73 | # define INTC_INTPR5_OFFSET_SIZE 24 | ||
74 | #define INTC_INTREQ5 0x114 | ||
75 | # define INTC_INTREQ5_IREQUEST160_OFFSET 0 | ||
76 | # define INTC_INTREQ5_IREQUEST160_SIZE 1 | ||
77 | #define INTC_INTPR6 0x18 | ||
78 | # define INTC_INTPR6_INTLEV_OFFSET 30 | ||
79 | # define INTC_INTPR6_INTLEV_SIZE 2 | ||
80 | # define INTC_INTPR6_OFFSET_OFFSET 0 | ||
81 | # define INTC_INTPR6_OFFSET_SIZE 24 | ||
82 | #define INTC_INTREQ6 0x118 | ||
83 | # define INTC_INTREQ6_IREQUEST192_OFFSET 0 | ||
84 | # define INTC_INTREQ6_IREQUEST192_SIZE 1 | ||
85 | #define INTC_INTPR7 0x1c | ||
86 | # define INTC_INTPR7_INTLEV_OFFSET 30 | ||
87 | # define INTC_INTPR7_INTLEV_SIZE 2 | ||
88 | # define INTC_INTPR7_OFFSET_OFFSET 0 | ||
89 | # define INTC_INTPR7_OFFSET_SIZE 24 | ||
90 | #define INTC_INTREQ7 0x11c | ||
91 | # define INTC_INTREQ7_IREQUEST224_OFFSET 0 | ||
92 | # define INTC_INTREQ7_IREQUEST224_SIZE 1 | ||
93 | #define INTC_INTPR8 0x20 | ||
94 | # define INTC_INTPR8_INTLEV_OFFSET 30 | ||
95 | # define INTC_INTPR8_INTLEV_SIZE 2 | ||
96 | # define INTC_INTPR8_OFFSET_OFFSET 0 | ||
97 | # define INTC_INTPR8_OFFSET_SIZE 24 | ||
98 | #define INTC_INTREQ8 0x120 | ||
99 | # define INTC_INTREQ8_IREQUEST256_OFFSET 0 | ||
100 | # define INTC_INTREQ8_IREQUEST256_SIZE 1 | ||
101 | #define INTC_INTPR9 0x24 | ||
102 | # define INTC_INTPR9_INTLEV_OFFSET 30 | ||
103 | # define INTC_INTPR9_INTLEV_SIZE 2 | ||
104 | # define INTC_INTPR9_OFFSET_OFFSET 0 | ||
105 | # define INTC_INTPR9_OFFSET_SIZE 24 | ||
106 | #define INTC_INTREQ9 0x124 | ||
107 | # define INTC_INTREQ9_IREQUEST288_OFFSET 0 | ||
108 | # define INTC_INTREQ9_IREQUEST288_SIZE 1 | ||
109 | #define INTC_INTPR10 0x28 | ||
110 | # define INTC_INTPR10_INTLEV_OFFSET 30 | ||
111 | # define INTC_INTPR10_INTLEV_SIZE 2 | ||
112 | # define INTC_INTPR10_OFFSET_OFFSET 0 | ||
113 | # define INTC_INTPR10_OFFSET_SIZE 24 | ||
114 | #define INTC_INTREQ10 0x128 | ||
115 | # define INTC_INTREQ10_IREQUEST320_OFFSET 0 | ||
116 | # define INTC_INTREQ10_IREQUEST320_SIZE 1 | ||
117 | #define INTC_INTPR11 0x2c | ||
118 | # define INTC_INTPR11_INTLEV_OFFSET 30 | ||
119 | # define INTC_INTPR11_INTLEV_SIZE 2 | ||
120 | # define INTC_INTPR11_OFFSET_OFFSET 0 | ||
121 | # define INTC_INTPR11_OFFSET_SIZE 24 | ||
122 | #define INTC_INTREQ11 0x12c | ||
123 | # define INTC_INTREQ11_IREQUEST352_OFFSET 0 | ||
124 | # define INTC_INTREQ11_IREQUEST352_SIZE 1 | ||
125 | #define INTC_INTPR12 0x30 | ||
126 | # define INTC_INTPR12_INTLEV_OFFSET 30 | ||
127 | # define INTC_INTPR12_INTLEV_SIZE 2 | ||
128 | # define INTC_INTPR12_OFFSET_OFFSET 0 | ||
129 | # define INTC_INTPR12_OFFSET_SIZE 24 | ||
130 | #define INTC_INTREQ12 0x130 | ||
131 | # define INTC_INTREQ12_IREQUEST384_OFFSET 0 | ||
132 | # define INTC_INTREQ12_IREQUEST384_SIZE 1 | ||
133 | #define INTC_INTPR13 0x34 | ||
134 | # define INTC_INTPR13_INTLEV_OFFSET 30 | ||
135 | # define INTC_INTPR13_INTLEV_SIZE 2 | ||
136 | # define INTC_INTPR13_OFFSET_OFFSET 0 | ||
137 | # define INTC_INTPR13_OFFSET_SIZE 24 | ||
138 | #define INTC_INTREQ13 0x134 | ||
139 | # define INTC_INTREQ13_IREQUEST416_OFFSET 0 | ||
140 | # define INTC_INTREQ13_IREQUEST416_SIZE 1 | ||
141 | #define INTC_INTPR14 0x38 | ||
142 | # define INTC_INTPR14_INTLEV_OFFSET 30 | ||
143 | # define INTC_INTPR14_INTLEV_SIZE 2 | ||
144 | # define INTC_INTPR14_OFFSET_OFFSET 0 | ||
145 | # define INTC_INTPR14_OFFSET_SIZE 24 | ||
146 | #define INTC_INTREQ14 0x138 | ||
147 | # define INTC_INTREQ14_IREQUEST448_OFFSET 0 | ||
148 | # define INTC_INTREQ14_IREQUEST448_SIZE 1 | ||
149 | #define INTC_INTPR15 0x3c | ||
150 | # define INTC_INTPR15_INTLEV_OFFSET 30 | ||
151 | # define INTC_INTPR15_INTLEV_SIZE 2 | ||
152 | # define INTC_INTPR15_OFFSET_OFFSET 0 | ||
153 | # define INTC_INTPR15_OFFSET_SIZE 24 | ||
154 | #define INTC_INTREQ15 0x13c | ||
155 | # define INTC_INTREQ15_IREQUEST480_OFFSET 0 | ||
156 | # define INTC_INTREQ15_IREQUEST480_SIZE 1 | ||
157 | #define INTC_INTPR16 0x40 | ||
158 | # define INTC_INTPR16_INTLEV_OFFSET 30 | ||
159 | # define INTC_INTPR16_INTLEV_SIZE 2 | ||
160 | # define INTC_INTPR16_OFFSET_OFFSET 0 | ||
161 | # define INTC_INTPR16_OFFSET_SIZE 24 | ||
162 | #define INTC_INTREQ16 0x140 | ||
163 | # define INTC_INTREQ16_IREQUEST512_OFFSET 0 | ||
164 | # define INTC_INTREQ16_IREQUEST512_SIZE 1 | ||
165 | #define INTC_INTPR17 0x44 | ||
166 | # define INTC_INTPR17_INTLEV_OFFSET 30 | ||
167 | # define INTC_INTPR17_INTLEV_SIZE 2 | ||
168 | # define INTC_INTPR17_OFFSET_OFFSET 0 | ||
169 | # define INTC_INTPR17_OFFSET_SIZE 24 | ||
170 | #define INTC_INTREQ17 0x144 | ||
171 | # define INTC_INTREQ17_IREQUEST544_OFFSET 0 | ||
172 | # define INTC_INTREQ17_IREQUEST544_SIZE 1 | ||
173 | #define INTC_INTPR18 0x48 | ||
174 | # define INTC_INTPR18_INTLEV_OFFSET 30 | ||
175 | # define INTC_INTPR18_INTLEV_SIZE 2 | ||
176 | # define INTC_INTPR18_OFFSET_OFFSET 0 | ||
177 | # define INTC_INTPR18_OFFSET_SIZE 24 | ||
178 | #define INTC_INTREQ18 0x148 | ||
179 | # define INTC_INTREQ18_IREQUEST576_OFFSET 0 | ||
180 | # define INTC_INTREQ18_IREQUEST576_SIZE 1 | ||
181 | #define INTC_INTPR19 0x4c | ||
182 | # define INTC_INTPR19_INTLEV_OFFSET 30 | ||
183 | # define INTC_INTPR19_INTLEV_SIZE 2 | ||
184 | # define INTC_INTPR19_OFFSET_OFFSET 0 | ||
185 | # define INTC_INTPR19_OFFSET_SIZE 24 | ||
186 | #define INTC_INTREQ19 0x14c | ||
187 | # define INTC_INTREQ19_IREQUEST608_OFFSET 0 | ||
188 | # define INTC_INTREQ19_IREQUEST608_SIZE 1 | ||
189 | # define INTC_INTREQ19_IREQUEST609_OFFSET 1 | ||
190 | # define INTC_INTREQ19_IREQUEST609_SIZE 1 | ||
191 | # define INTC_INTREQ19_IREQUEST610_OFFSET 2 | ||
192 | # define INTC_INTREQ19_IREQUEST610_SIZE 1 | ||
193 | # define INTC_INTREQ19_IREQUEST611_OFFSET 3 | ||
194 | # define INTC_INTREQ19_IREQUEST611_SIZE 1 | ||
195 | #define INTC_INTPR20 0x50 | ||
196 | # define INTC_INTPR20_INTLEV_OFFSET 30 | ||
197 | # define INTC_INTPR20_INTLEV_SIZE 2 | ||
198 | # define INTC_INTPR20_OFFSET_OFFSET 0 | ||
199 | # define INTC_INTPR20_OFFSET_SIZE 24 | ||
200 | #define INTC_INTREQ20 0x150 | ||
201 | # define INTC_INTREQ20_IREQUEST640_OFFSET 0 | ||
202 | # define INTC_INTREQ20_IREQUEST640_SIZE 1 | ||
203 | #define INTC_INTPR21 0x54 | ||
204 | # define INTC_INTPR21_INTLEV_OFFSET 30 | ||
205 | # define INTC_INTPR21_INTLEV_SIZE 2 | ||
206 | # define INTC_INTPR21_OFFSET_OFFSET 0 | ||
207 | # define INTC_INTPR21_OFFSET_SIZE 24 | ||
208 | #define INTC_INTREQ21 0x154 | ||
209 | # define INTC_INTREQ21_IREQUEST672_OFFSET 0 | ||
210 | # define INTC_INTREQ21_IREQUEST672_SIZE 1 | ||
211 | #define INTC_INTPR22 0x58 | ||
212 | # define INTC_INTPR22_INTLEV_OFFSET 30 | ||
213 | # define INTC_INTPR22_INTLEV_SIZE 2 | ||
214 | # define INTC_INTPR22_OFFSET_OFFSET 0 | ||
215 | # define INTC_INTPR22_OFFSET_SIZE 24 | ||
216 | #define INTC_INTREQ22 0x158 | ||
217 | # define INTC_INTREQ22_IREQUEST704_OFFSET 0 | ||
218 | # define INTC_INTREQ22_IREQUEST704_SIZE 1 | ||
219 | # define INTC_INTREQ22_IREQUEST705_OFFSET 1 | ||
220 | # define INTC_INTREQ22_IREQUEST705_SIZE 1 | ||
221 | # define INTC_INTREQ22_IREQUEST706_OFFSET 2 | ||
222 | # define INTC_INTREQ22_IREQUEST706_SIZE 1 | ||
223 | #define INTC_INTPR23 0x5c | ||
224 | # define INTC_INTPR23_INTLEV_OFFSET 30 | ||
225 | # define INTC_INTPR23_INTLEV_SIZE 2 | ||
226 | # define INTC_INTPR23_OFFSET_OFFSET 0 | ||
227 | # define INTC_INTPR23_OFFSET_SIZE 24 | ||
228 | #define INTC_INTREQ23 0x15c | ||
229 | # define INTC_INTREQ23_IREQUEST736_OFFSET 0 | ||
230 | # define INTC_INTREQ23_IREQUEST736_SIZE 1 | ||
231 | # define INTC_INTREQ23_IREQUEST737_OFFSET 1 | ||
232 | # define INTC_INTREQ23_IREQUEST737_SIZE 1 | ||
233 | # define INTC_INTREQ23_IREQUEST738_OFFSET 2 | ||
234 | # define INTC_INTREQ23_IREQUEST738_SIZE 1 | ||
235 | #define INTC_INTPR24 0x60 | ||
236 | # define INTC_INTPR24_INTLEV_OFFSET 30 | ||
237 | # define INTC_INTPR24_INTLEV_SIZE 2 | ||
238 | # define INTC_INTPR24_OFFSET_OFFSET 0 | ||
239 | # define INTC_INTPR24_OFFSET_SIZE 24 | ||
240 | #define INTC_INTREQ24 0x160 | ||
241 | # define INTC_INTREQ24_IREQUEST768_OFFSET 0 | ||
242 | # define INTC_INTREQ24_IREQUEST768_SIZE 1 | ||
243 | #define INTC_INTPR25 0x64 | ||
244 | # define INTC_INTPR25_INTLEV_OFFSET 30 | ||
245 | # define INTC_INTPR25_INTLEV_SIZE 2 | ||
246 | # define INTC_INTPR25_OFFSET_OFFSET 0 | ||
247 | # define INTC_INTPR25_OFFSET_SIZE 24 | ||
248 | #define INTC_INTREQ25 0x164 | ||
249 | # define INTC_INTREQ25_IREQUEST800_OFFSET 0 | ||
250 | # define INTC_INTREQ25_IREQUEST800_SIZE 1 | ||
251 | #define INTC_INTPR26 0x68 | ||
252 | # define INTC_INTPR26_INTLEV_OFFSET 30 | ||
253 | # define INTC_INTPR26_INTLEV_SIZE 2 | ||
254 | # define INTC_INTPR26_OFFSET_OFFSET 0 | ||
255 | # define INTC_INTPR26_OFFSET_SIZE 24 | ||
256 | #define INTC_INTREQ26 0x168 | ||
257 | # define INTC_INTREQ26_IREQUEST832_OFFSET 0 | ||
258 | # define INTC_INTREQ26_IREQUEST832_SIZE 1 | ||
259 | #define INTC_INTPR27 0x6c | ||
260 | # define INTC_INTPR27_INTLEV_OFFSET 30 | ||
261 | # define INTC_INTPR27_INTLEV_SIZE 2 | ||
262 | # define INTC_INTPR27_OFFSET_OFFSET 0 | ||
263 | # define INTC_INTPR27_OFFSET_SIZE 24 | ||
264 | #define INTC_INTREQ27 0x16c | ||
265 | # define INTC_INTREQ27_IREQUEST864_OFFSET 0 | ||
266 | # define INTC_INTREQ27_IREQUEST864_SIZE 1 | ||
267 | #define INTC_INTPR28 0x70 | ||
268 | # define INTC_INTPR28_INTLEV_OFFSET 30 | ||
269 | # define INTC_INTPR28_INTLEV_SIZE 2 | ||
270 | # define INTC_INTPR28_OFFSET_OFFSET 0 | ||
271 | # define INTC_INTPR28_OFFSET_SIZE 24 | ||
272 | #define INTC_INTREQ28 0x170 | ||
273 | # define INTC_INTREQ28_IREQUEST896_OFFSET 0 | ||
274 | # define INTC_INTREQ28_IREQUEST896_SIZE 1 | ||
275 | #define INTC_INTPR29 0x74 | ||
276 | # define INTC_INTPR29_INTLEV_OFFSET 30 | ||
277 | # define INTC_INTPR29_INTLEV_SIZE 2 | ||
278 | # define INTC_INTPR29_OFFSET_OFFSET 0 | ||
279 | # define INTC_INTPR29_OFFSET_SIZE 24 | ||
280 | #define INTC_INTREQ29 0x174 | ||
281 | # define INTC_INTREQ29_IREQUEST928_OFFSET 0 | ||
282 | # define INTC_INTREQ29_IREQUEST928_SIZE 1 | ||
283 | #define INTC_INTPR30 0x78 | ||
284 | # define INTC_INTPR30_INTLEV_OFFSET 30 | ||
285 | # define INTC_INTPR30_INTLEV_SIZE 2 | ||
286 | # define INTC_INTPR30_OFFSET_OFFSET 0 | ||
287 | # define INTC_INTPR30_OFFSET_SIZE 24 | ||
288 | #define INTC_INTREQ30 0x178 | ||
289 | # define INTC_INTREQ30_IREQUEST960_OFFSET 0 | ||
290 | # define INTC_INTREQ30_IREQUEST960_SIZE 1 | ||
291 | #define INTC_INTPR31 0x7c | ||
292 | # define INTC_INTPR31_INTLEV_OFFSET 30 | ||
293 | # define INTC_INTPR31_INTLEV_SIZE 2 | ||
294 | # define INTC_INTPR31_OFFSET_OFFSET 0 | ||
295 | # define INTC_INTPR31_OFFSET_SIZE 24 | ||
296 | #define INTC_INTREQ31 0x17c | ||
297 | # define INTC_INTREQ31_IREQUEST992_OFFSET 0 | ||
298 | # define INTC_INTREQ31_IREQUEST992_SIZE 1 | ||
299 | #define INTC_INTPR32 0x80 | ||
300 | # define INTC_INTPR32_INTLEV_OFFSET 30 | ||
301 | # define INTC_INTPR32_INTLEV_SIZE 2 | ||
302 | # define INTC_INTPR32_OFFSET_OFFSET 0 | ||
303 | # define INTC_INTPR32_OFFSET_SIZE 24 | ||
304 | #define INTC_INTREQ32 0x180 | ||
305 | # define INTC_INTREQ32_IREQUEST1024_OFFSET 0 | ||
306 | # define INTC_INTREQ32_IREQUEST1024_SIZE 1 | ||
307 | #define INTC_INTCAUSE0 0x20c | ||
308 | # define INTC_INTCAUSE0_CAUSEGRP_OFFSET 0 | ||
309 | # define INTC_INTCAUSE0_CAUSEGRP_SIZE 6 | ||
310 | #define INTC_INTCAUSE1 0x208 | ||
311 | # define INTC_INTCAUSE1_CAUSEGRP_OFFSET 0 | ||
312 | # define INTC_INTCAUSE1_CAUSEGRP_SIZE 6 | ||
313 | #define INTC_INTCAUSE2 0x204 | ||
314 | # define INTC_INTCAUSE2_CAUSEGRP_OFFSET 0 | ||
315 | # define INTC_INTCAUSE2_CAUSEGRP_SIZE 6 | ||
316 | #define INTC_INTCAUSE3 0x200 | ||
317 | # define INTC_INTCAUSE3_CAUSEGRP_OFFSET 0 | ||
318 | # define INTC_INTCAUSE3_CAUSEGRP_SIZE 6 | ||
319 | |||
320 | #define INTC_BIT(name) (1 << INTC_##name##_OFFSET) | ||
321 | #define INTC_MKBF(name, value) (((value) & ((1 << INTC_##name##_SIZE) - 1)) << INTC_##name##_OFFSET) | ||
322 | #define INTC_GETBF(name, value) (((value) >> INTC_##name##_OFFSET) & ((1 << INTC_##name##_SIZE) - 1)) | ||
323 | |||
324 | #define intc_readl(port,reg) \ | ||
325 | __raw_readl((port)->regs + INTC_##reg) | ||
326 | #define intc_writel(port,reg,value) \ | ||
327 | __raw_writel((value), (port)->regs + INTC_##reg) | ||
328 | |||
329 | #endif /* __ASM_AVR32_PERIHP_INTC_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/pdc.c b/arch/avr32/mach-at32ap/pdc.c deleted file mode 100644 index 61ab15aae970..000000000000 --- a/arch/avr32/mach-at32ap/pdc.c +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/clk.h> | ||
10 | #include <linux/err.h> | ||
11 | #include <linux/init.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | static int __init pdc_probe(struct platform_device *pdev) | ||
15 | { | ||
16 | struct clk *pclk, *hclk; | ||
17 | |||
18 | pclk = clk_get(&pdev->dev, "pclk"); | ||
19 | if (IS_ERR(pclk)) { | ||
20 | dev_err(&pdev->dev, "no pclk defined\n"); | ||
21 | return PTR_ERR(pclk); | ||
22 | } | ||
23 | hclk = clk_get(&pdev->dev, "hclk"); | ||
24 | if (IS_ERR(hclk)) { | ||
25 | dev_err(&pdev->dev, "no hclk defined\n"); | ||
26 | clk_put(pclk); | ||
27 | return PTR_ERR(hclk); | ||
28 | } | ||
29 | |||
30 | clk_enable(pclk); | ||
31 | clk_enable(hclk); | ||
32 | |||
33 | dev_info(&pdev->dev, "Atmel Peripheral DMA Controller enabled\n"); | ||
34 | return 0; | ||
35 | } | ||
36 | |||
37 | static struct platform_driver pdc_driver = { | ||
38 | .driver = { | ||
39 | .name = "pdc", | ||
40 | }, | ||
41 | }; | ||
42 | |||
43 | static int __init pdc_init(void) | ||
44 | { | ||
45 | return platform_driver_probe(&pdc_driver, pdc_probe); | ||
46 | } | ||
47 | arch_initcall(pdc_init); | ||
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c deleted file mode 100644 index 7fae6ec7e8ec..000000000000 --- a/arch/avr32/mach-at32ap/pio.c +++ /dev/null | |||
@@ -1,470 +0,0 @@ | |||
1 | /* | ||
2 | * Atmel PIO2 Port Multiplexer support | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/clk.h> | ||
12 | #include <linux/debugfs.h> | ||
13 | #include <linux/export.h> | ||
14 | #include <linux/fs.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <linux/gpio.h> | ||
18 | |||
19 | #include <asm/io.h> | ||
20 | |||
21 | #include <mach/portmux.h> | ||
22 | |||
23 | #include "pio.h" | ||
24 | |||
25 | #define MAX_NR_PIO_DEVICES 8 | ||
26 | |||
27 | struct pio_device { | ||
28 | struct gpio_chip chip; | ||
29 | void __iomem *regs; | ||
30 | const struct platform_device *pdev; | ||
31 | struct clk *clk; | ||
32 | u32 pinmux_mask; | ||
33 | char name[8]; | ||
34 | }; | ||
35 | |||
36 | static struct pio_device pio_dev[MAX_NR_PIO_DEVICES]; | ||
37 | |||
38 | static struct pio_device *gpio_to_pio(unsigned int gpio) | ||
39 | { | ||
40 | struct pio_device *pio; | ||
41 | unsigned int index; | ||
42 | |||
43 | index = gpio >> 5; | ||
44 | if (index >= MAX_NR_PIO_DEVICES) | ||
45 | return NULL; | ||
46 | pio = &pio_dev[index]; | ||
47 | if (!pio->regs) | ||
48 | return NULL; | ||
49 | |||
50 | return pio; | ||
51 | } | ||
52 | |||
53 | /* Pin multiplexing API */ | ||
54 | static DEFINE_SPINLOCK(pio_lock); | ||
55 | |||
56 | void __init at32_select_periph(unsigned int port, u32 pin_mask, | ||
57 | unsigned int periph, unsigned long flags) | ||
58 | { | ||
59 | struct pio_device *pio; | ||
60 | |||
61 | /* assign and verify pio */ | ||
62 | pio = gpio_to_pio(port); | ||
63 | if (unlikely(!pio)) { | ||
64 | printk(KERN_WARNING "pio: invalid port %u\n", port); | ||
65 | goto fail; | ||
66 | } | ||
67 | |||
68 | /* Test if any of the requested pins is already muxed */ | ||
69 | spin_lock(&pio_lock); | ||
70 | if (unlikely(pio->pinmux_mask & pin_mask)) { | ||
71 | printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n", | ||
72 | pio->name, pin_mask, pio->pinmux_mask & pin_mask); | ||
73 | spin_unlock(&pio_lock); | ||
74 | goto fail; | ||
75 | } | ||
76 | |||
77 | pio->pinmux_mask |= pin_mask; | ||
78 | |||
79 | /* enable pull ups */ | ||
80 | pio_writel(pio, PUER, pin_mask); | ||
81 | |||
82 | /* select either peripheral A or B */ | ||
83 | if (periph) | ||
84 | pio_writel(pio, BSR, pin_mask); | ||
85 | else | ||
86 | pio_writel(pio, ASR, pin_mask); | ||
87 | |||
88 | /* enable peripheral control */ | ||
89 | pio_writel(pio, PDR, pin_mask); | ||
90 | |||
91 | /* Disable pull ups if not requested. */ | ||
92 | if (!(flags & AT32_GPIOF_PULLUP)) | ||
93 | pio_writel(pio, PUDR, pin_mask); | ||
94 | |||
95 | spin_unlock(&pio_lock); | ||
96 | |||
97 | return; | ||
98 | |||
99 | fail: | ||
100 | dump_stack(); | ||
101 | } | ||
102 | |||
103 | void __init at32_select_gpio(unsigned int pin, unsigned long flags) | ||
104 | { | ||
105 | struct pio_device *pio; | ||
106 | unsigned int pin_index = pin & 0x1f; | ||
107 | u32 mask = 1 << pin_index; | ||
108 | |||
109 | pio = gpio_to_pio(pin); | ||
110 | if (unlikely(!pio)) { | ||
111 | printk("pio: invalid pin %u\n", pin); | ||
112 | goto fail; | ||
113 | } | ||
114 | |||
115 | if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) { | ||
116 | printk("%s: pin %u is busy\n", pio->name, pin_index); | ||
117 | goto fail; | ||
118 | } | ||
119 | |||
120 | if (flags & AT32_GPIOF_OUTPUT) { | ||
121 | if (flags & AT32_GPIOF_HIGH) | ||
122 | pio_writel(pio, SODR, mask); | ||
123 | else | ||
124 | pio_writel(pio, CODR, mask); | ||
125 | if (flags & AT32_GPIOF_MULTIDRV) | ||
126 | pio_writel(pio, MDER, mask); | ||
127 | else | ||
128 | pio_writel(pio, MDDR, mask); | ||
129 | pio_writel(pio, PUDR, mask); | ||
130 | pio_writel(pio, OER, mask); | ||
131 | } else { | ||
132 | if (flags & AT32_GPIOF_PULLUP) | ||
133 | pio_writel(pio, PUER, mask); | ||
134 | else | ||
135 | pio_writel(pio, PUDR, mask); | ||
136 | if (flags & AT32_GPIOF_DEGLITCH) | ||
137 | pio_writel(pio, IFER, mask); | ||
138 | else | ||
139 | pio_writel(pio, IFDR, mask); | ||
140 | pio_writel(pio, ODR, mask); | ||
141 | } | ||
142 | |||
143 | pio_writel(pio, PER, mask); | ||
144 | |||
145 | return; | ||
146 | |||
147 | fail: | ||
148 | dump_stack(); | ||
149 | } | ||
150 | |||
151 | /* | ||
152 | * Undo a previous pin reservation. Will not affect the hardware | ||
153 | * configuration. | ||
154 | */ | ||
155 | void at32_deselect_pin(unsigned int pin) | ||
156 | { | ||
157 | struct pio_device *pio; | ||
158 | unsigned int pin_index = pin & 0x1f; | ||
159 | |||
160 | pio = gpio_to_pio(pin); | ||
161 | if (unlikely(!pio)) { | ||
162 | printk("pio: invalid pin %u\n", pin); | ||
163 | dump_stack(); | ||
164 | return; | ||
165 | } | ||
166 | |||
167 | clear_bit(pin_index, &pio->pinmux_mask); | ||
168 | } | ||
169 | |||
170 | /* Reserve a pin, preventing anyone else from changing its configuration. */ | ||
171 | void __init at32_reserve_pin(unsigned int port, u32 pin_mask) | ||
172 | { | ||
173 | struct pio_device *pio; | ||
174 | |||
175 | /* assign and verify pio */ | ||
176 | pio = gpio_to_pio(port); | ||
177 | if (unlikely(!pio)) { | ||
178 | printk(KERN_WARNING "pio: invalid port %u\n", port); | ||
179 | goto fail; | ||
180 | } | ||
181 | |||
182 | /* Test if any of the requested pins is already muxed */ | ||
183 | spin_lock(&pio_lock); | ||
184 | if (unlikely(pio->pinmux_mask & pin_mask)) { | ||
185 | printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n", | ||
186 | pio->name, pin_mask, pio->pinmux_mask & pin_mask); | ||
187 | spin_unlock(&pio_lock); | ||
188 | goto fail; | ||
189 | } | ||
190 | |||
191 | /* Reserve pins */ | ||
192 | pio->pinmux_mask |= pin_mask; | ||
193 | spin_unlock(&pio_lock); | ||
194 | return; | ||
195 | |||
196 | fail: | ||
197 | dump_stack(); | ||
198 | } | ||
199 | |||
200 | /*--------------------------------------------------------------------------*/ | ||
201 | |||
202 | /* GPIO API */ | ||
203 | |||
204 | static int direction_input(struct gpio_chip *chip, unsigned offset) | ||
205 | { | ||
206 | struct pio_device *pio = gpiochip_get_data(chip); | ||
207 | u32 mask = 1 << offset; | ||
208 | |||
209 | if (!(pio_readl(pio, PSR) & mask)) | ||
210 | return -EINVAL; | ||
211 | |||
212 | pio_writel(pio, ODR, mask); | ||
213 | return 0; | ||
214 | } | ||
215 | |||
216 | static int gpio_get(struct gpio_chip *chip, unsigned offset) | ||
217 | { | ||
218 | struct pio_device *pio = gpiochip_get_data(chip); | ||
219 | |||
220 | return (pio_readl(pio, PDSR) >> offset) & 1; | ||
221 | } | ||
222 | |||
223 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value); | ||
224 | |||
225 | static int direction_output(struct gpio_chip *chip, unsigned offset, int value) | ||
226 | { | ||
227 | struct pio_device *pio = gpiochip_get_data(chip); | ||
228 | u32 mask = 1 << offset; | ||
229 | |||
230 | if (!(pio_readl(pio, PSR) & mask)) | ||
231 | return -EINVAL; | ||
232 | |||
233 | gpio_set(chip, offset, value); | ||
234 | pio_writel(pio, OER, mask); | ||
235 | return 0; | ||
236 | } | ||
237 | |||
238 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) | ||
239 | { | ||
240 | struct pio_device *pio = gpiochip_get_data(chip); | ||
241 | u32 mask = 1 << offset; | ||
242 | |||
243 | if (value) | ||
244 | pio_writel(pio, SODR, mask); | ||
245 | else | ||
246 | pio_writel(pio, CODR, mask); | ||
247 | } | ||
248 | |||
249 | /*--------------------------------------------------------------------------*/ | ||
250 | |||
251 | /* GPIO IRQ support */ | ||
252 | |||
253 | static void gpio_irq_mask(struct irq_data *d) | ||
254 | { | ||
255 | unsigned gpio = irq_to_gpio(d->irq); | ||
256 | struct pio_device *pio = &pio_dev[gpio >> 5]; | ||
257 | |||
258 | pio_writel(pio, IDR, 1 << (gpio & 0x1f)); | ||
259 | } | ||
260 | |||
261 | static void gpio_irq_unmask(struct irq_data *d) | ||
262 | { | ||
263 | unsigned gpio = irq_to_gpio(d->irq); | ||
264 | struct pio_device *pio = &pio_dev[gpio >> 5]; | ||
265 | |||
266 | pio_writel(pio, IER, 1 << (gpio & 0x1f)); | ||
267 | } | ||
268 | |||
269 | static int gpio_irq_type(struct irq_data *d, unsigned type) | ||
270 | { | ||
271 | if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE) | ||
272 | return -EINVAL; | ||
273 | |||
274 | return 0; | ||
275 | } | ||
276 | |||
277 | static struct irq_chip gpio_irqchip = { | ||
278 | .name = "gpio", | ||
279 | .irq_mask = gpio_irq_mask, | ||
280 | .irq_unmask = gpio_irq_unmask, | ||
281 | .irq_set_type = gpio_irq_type, | ||
282 | }; | ||
283 | |||
284 | static void gpio_irq_handler(struct irq_desc *desc) | ||
285 | { | ||
286 | struct pio_device *pio = irq_desc_get_chip_data(desc); | ||
287 | unsigned gpio_irq; | ||
288 | |||
289 | gpio_irq = (unsigned) irq_desc_get_handler_data(desc); | ||
290 | for (;;) { | ||
291 | u32 isr; | ||
292 | |||
293 | /* ack pending GPIO interrupts */ | ||
294 | isr = pio_readl(pio, ISR) & pio_readl(pio, IMR); | ||
295 | if (!isr) | ||
296 | break; | ||
297 | do { | ||
298 | int i; | ||
299 | |||
300 | i = ffs(isr) - 1; | ||
301 | isr &= ~(1 << i); | ||
302 | |||
303 | i += gpio_irq; | ||
304 | generic_handle_irq(i); | ||
305 | } while (isr); | ||
306 | } | ||
307 | } | ||
308 | |||
309 | static void __init | ||
310 | gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq) | ||
311 | { | ||
312 | unsigned i; | ||
313 | |||
314 | irq_set_chip_data(irq, pio); | ||
315 | |||
316 | for (i = 0; i < 32; i++, gpio_irq++) { | ||
317 | irq_set_chip_data(gpio_irq, pio); | ||
318 | irq_set_chip_and_handler(gpio_irq, &gpio_irqchip, | ||
319 | handle_simple_irq); | ||
320 | } | ||
321 | |||
322 | irq_set_chained_handler_and_data(irq, gpio_irq_handler, | ||
323 | (void *)gpio_irq); | ||
324 | } | ||
325 | |||
326 | /*--------------------------------------------------------------------------*/ | ||
327 | |||
328 | #ifdef CONFIG_DEBUG_FS | ||
329 | |||
330 | #include <linux/seq_file.h> | ||
331 | |||
332 | /* | ||
333 | * This shows more info than the generic gpio dump code: | ||
334 | * pullups, deglitching, open drain drive. | ||
335 | */ | ||
336 | static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip) | ||
337 | { | ||
338 | struct pio_device *pio = gpiochip_get_data(chip); | ||
339 | u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr; | ||
340 | unsigned i; | ||
341 | u32 mask; | ||
342 | char bank; | ||
343 | |||
344 | psr = pio_readl(pio, PSR); | ||
345 | osr = pio_readl(pio, OSR); | ||
346 | imr = pio_readl(pio, IMR); | ||
347 | pdsr = pio_readl(pio, PDSR); | ||
348 | pusr = pio_readl(pio, PUSR); | ||
349 | ifsr = pio_readl(pio, IFSR); | ||
350 | mdsr = pio_readl(pio, MDSR); | ||
351 | |||
352 | bank = 'A' + pio->pdev->id; | ||
353 | |||
354 | for (i = 0, mask = 1; i < 32; i++, mask <<= 1) { | ||
355 | const char *label; | ||
356 | |||
357 | label = gpiochip_is_requested(chip, i); | ||
358 | if (!label && (imr & mask)) | ||
359 | label = "[irq]"; | ||
360 | if (!label) | ||
361 | continue; | ||
362 | |||
363 | seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s", | ||
364 | chip->base + i, bank, i, | ||
365 | label, | ||
366 | (osr & mask) ? "out" : "in ", | ||
367 | (mask & pdsr) ? "hi" : "lo", | ||
368 | (mask & pusr) ? " " : "up"); | ||
369 | if (ifsr & mask) | ||
370 | seq_puts(s, " deglitch"); | ||
371 | if ((osr & mdsr) & mask) | ||
372 | seq_puts(s, " open-drain"); | ||
373 | if (imr & mask) | ||
374 | seq_printf(s, " irq-%d edge-both", | ||
375 | gpio_to_irq(chip->base + i)); | ||
376 | seq_putc(s, '\n'); | ||
377 | } | ||
378 | } | ||
379 | |||
380 | #else | ||
381 | #define pio_bank_show NULL | ||
382 | #endif | ||
383 | |||
384 | |||
385 | /*--------------------------------------------------------------------------*/ | ||
386 | |||
387 | static int __init pio_probe(struct platform_device *pdev) | ||
388 | { | ||
389 | struct pio_device *pio = NULL; | ||
390 | int irq = platform_get_irq(pdev, 0); | ||
391 | int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32; | ||
392 | |||
393 | BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES); | ||
394 | pio = &pio_dev[pdev->id]; | ||
395 | BUG_ON(!pio->regs); | ||
396 | |||
397 | pio->chip.label = pio->name; | ||
398 | pio->chip.base = pdev->id * 32; | ||
399 | pio->chip.ngpio = 32; | ||
400 | pio->chip.parent = &pdev->dev; | ||
401 | pio->chip.owner = THIS_MODULE; | ||
402 | |||
403 | pio->chip.direction_input = direction_input; | ||
404 | pio->chip.get = gpio_get; | ||
405 | pio->chip.direction_output = direction_output; | ||
406 | pio->chip.set = gpio_set; | ||
407 | pio->chip.dbg_show = pio_bank_show; | ||
408 | |||
409 | gpiochip_add_data(&pio->chip, pio); | ||
410 | |||
411 | gpio_irq_setup(pio, irq, gpio_irq_base); | ||
412 | |||
413 | platform_set_drvdata(pdev, pio); | ||
414 | |||
415 | printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n", | ||
416 | pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31); | ||
417 | |||
418 | return 0; | ||
419 | } | ||
420 | |||
421 | static struct platform_driver pio_driver = { | ||
422 | .driver = { | ||
423 | .name = "pio", | ||
424 | }, | ||
425 | }; | ||
426 | |||
427 | static int __init pio_init(void) | ||
428 | { | ||
429 | return platform_driver_probe(&pio_driver, pio_probe); | ||
430 | } | ||
431 | postcore_initcall(pio_init); | ||
432 | |||
433 | void __init at32_init_pio(struct platform_device *pdev) | ||
434 | { | ||
435 | struct resource *regs; | ||
436 | struct pio_device *pio; | ||
437 | |||
438 | if (pdev->id >= MAX_NR_PIO_DEVICES) { | ||
439 | dev_err(&pdev->dev, "only %d PIO devices supported\n", | ||
440 | MAX_NR_PIO_DEVICES); | ||
441 | return; | ||
442 | } | ||
443 | |||
444 | pio = &pio_dev[pdev->id]; | ||
445 | snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id); | ||
446 | |||
447 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
448 | if (!regs) { | ||
449 | dev_err(&pdev->dev, "no mmio resource defined\n"); | ||
450 | return; | ||
451 | } | ||
452 | |||
453 | pio->clk = clk_get(&pdev->dev, "mck"); | ||
454 | if (IS_ERR(pio->clk)) | ||
455 | /* | ||
456 | * This is a fatal error, but if we continue we might | ||
457 | * be so lucky that we manage to initialize the | ||
458 | * console and display this message... | ||
459 | */ | ||
460 | dev_err(&pdev->dev, "no mck clock defined\n"); | ||
461 | else | ||
462 | clk_enable(pio->clk); | ||
463 | |||
464 | pio->pdev = pdev; | ||
465 | pio->regs = ioremap(regs->start, resource_size(regs)); | ||
466 | |||
467 | /* start with irqs disabled and acked */ | ||
468 | pio_writel(pio, IDR, ~0UL); | ||
469 | (void) pio_readl(pio, ISR); | ||
470 | } | ||
diff --git a/arch/avr32/mach-at32ap/pio.h b/arch/avr32/mach-at32ap/pio.h deleted file mode 100644 index 9484dfcc08f2..000000000000 --- a/arch/avr32/mach-at32ap/pio.h +++ /dev/null | |||
@@ -1,180 +0,0 @@ | |||
1 | /* | ||
2 | * Atmel PIO2 Port Multiplexer support | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ARCH_AVR32_AT32AP_PIO_H__ | ||
11 | #define __ARCH_AVR32_AT32AP_PIO_H__ | ||
12 | |||
13 | /* PIO register offsets */ | ||
14 | #define PIO_PER 0x0000 | ||
15 | #define PIO_PDR 0x0004 | ||
16 | #define PIO_PSR 0x0008 | ||
17 | #define PIO_OER 0x0010 | ||
18 | #define PIO_ODR 0x0014 | ||
19 | #define PIO_OSR 0x0018 | ||
20 | #define PIO_IFER 0x0020 | ||
21 | #define PIO_IFDR 0x0024 | ||
22 | #define PIO_IFSR 0x0028 | ||
23 | #define PIO_SODR 0x0030 | ||
24 | #define PIO_CODR 0x0034 | ||
25 | #define PIO_ODSR 0x0038 | ||
26 | #define PIO_PDSR 0x003c | ||
27 | #define PIO_IER 0x0040 | ||
28 | #define PIO_IDR 0x0044 | ||
29 | #define PIO_IMR 0x0048 | ||
30 | #define PIO_ISR 0x004c | ||
31 | #define PIO_MDER 0x0050 | ||
32 | #define PIO_MDDR 0x0054 | ||
33 | #define PIO_MDSR 0x0058 | ||
34 | #define PIO_PUDR 0x0060 | ||
35 | #define PIO_PUER 0x0064 | ||
36 | #define PIO_PUSR 0x0068 | ||
37 | #define PIO_ASR 0x0070 | ||
38 | #define PIO_BSR 0x0074 | ||
39 | #define PIO_ABSR 0x0078 | ||
40 | #define PIO_OWER 0x00a0 | ||
41 | #define PIO_OWDR 0x00a4 | ||
42 | #define PIO_OWSR 0x00a8 | ||
43 | |||
44 | /* Bitfields in PER */ | ||
45 | |||
46 | /* Bitfields in PDR */ | ||
47 | |||
48 | /* Bitfields in PSR */ | ||
49 | |||
50 | /* Bitfields in OER */ | ||
51 | |||
52 | /* Bitfields in ODR */ | ||
53 | |||
54 | /* Bitfields in OSR */ | ||
55 | |||
56 | /* Bitfields in IFER */ | ||
57 | |||
58 | /* Bitfields in IFDR */ | ||
59 | |||
60 | /* Bitfields in IFSR */ | ||
61 | |||
62 | /* Bitfields in SODR */ | ||
63 | |||
64 | /* Bitfields in CODR */ | ||
65 | |||
66 | /* Bitfields in ODSR */ | ||
67 | |||
68 | /* Bitfields in PDSR */ | ||
69 | |||
70 | /* Bitfields in IER */ | ||
71 | |||
72 | /* Bitfields in IDR */ | ||
73 | |||
74 | /* Bitfields in IMR */ | ||
75 | |||
76 | /* Bitfields in ISR */ | ||
77 | |||
78 | /* Bitfields in MDER */ | ||
79 | |||
80 | /* Bitfields in MDDR */ | ||
81 | |||
82 | /* Bitfields in MDSR */ | ||
83 | |||
84 | /* Bitfields in PUDR */ | ||
85 | |||
86 | /* Bitfields in PUER */ | ||
87 | |||
88 | /* Bitfields in PUSR */ | ||
89 | |||
90 | /* Bitfields in ASR */ | ||
91 | |||
92 | /* Bitfields in BSR */ | ||
93 | |||
94 | /* Bitfields in ABSR */ | ||
95 | #define PIO_P0_OFFSET 0 | ||
96 | #define PIO_P0_SIZE 1 | ||
97 | #define PIO_P1_OFFSET 1 | ||
98 | #define PIO_P1_SIZE 1 | ||
99 | #define PIO_P2_OFFSET 2 | ||
100 | #define PIO_P2_SIZE 1 | ||
101 | #define PIO_P3_OFFSET 3 | ||
102 | #define PIO_P3_SIZE 1 | ||
103 | #define PIO_P4_OFFSET 4 | ||
104 | #define PIO_P4_SIZE 1 | ||
105 | #define PIO_P5_OFFSET 5 | ||
106 | #define PIO_P5_SIZE 1 | ||
107 | #define PIO_P6_OFFSET 6 | ||
108 | #define PIO_P6_SIZE 1 | ||
109 | #define PIO_P7_OFFSET 7 | ||
110 | #define PIO_P7_SIZE 1 | ||
111 | #define PIO_P8_OFFSET 8 | ||
112 | #define PIO_P8_SIZE 1 | ||
113 | #define PIO_P9_OFFSET 9 | ||
114 | #define PIO_P9_SIZE 1 | ||
115 | #define PIO_P10_OFFSET 10 | ||
116 | #define PIO_P10_SIZE 1 | ||
117 | #define PIO_P11_OFFSET 11 | ||
118 | #define PIO_P11_SIZE 1 | ||
119 | #define PIO_P12_OFFSET 12 | ||
120 | #define PIO_P12_SIZE 1 | ||
121 | #define PIO_P13_OFFSET 13 | ||
122 | #define PIO_P13_SIZE 1 | ||
123 | #define PIO_P14_OFFSET 14 | ||
124 | #define PIO_P14_SIZE 1 | ||
125 | #define PIO_P15_OFFSET 15 | ||
126 | #define PIO_P15_SIZE 1 | ||
127 | #define PIO_P16_OFFSET 16 | ||
128 | #define PIO_P16_SIZE 1 | ||
129 | #define PIO_P17_OFFSET 17 | ||
130 | #define PIO_P17_SIZE 1 | ||
131 | #define PIO_P18_OFFSET 18 | ||
132 | #define PIO_P18_SIZE 1 | ||
133 | #define PIO_P19_OFFSET 19 | ||
134 | #define PIO_P19_SIZE 1 | ||
135 | #define PIO_P20_OFFSET 20 | ||
136 | #define PIO_P20_SIZE 1 | ||
137 | #define PIO_P21_OFFSET 21 | ||
138 | #define PIO_P21_SIZE 1 | ||
139 | #define PIO_P22_OFFSET 22 | ||
140 | #define PIO_P22_SIZE 1 | ||
141 | #define PIO_P23_OFFSET 23 | ||
142 | #define PIO_P23_SIZE 1 | ||
143 | #define PIO_P24_OFFSET 24 | ||
144 | #define PIO_P24_SIZE 1 | ||
145 | #define PIO_P25_OFFSET 25 | ||
146 | #define PIO_P25_SIZE 1 | ||
147 | #define PIO_P26_OFFSET 26 | ||
148 | #define PIO_P26_SIZE 1 | ||
149 | #define PIO_P27_OFFSET 27 | ||
150 | #define PIO_P27_SIZE 1 | ||
151 | #define PIO_P28_OFFSET 28 | ||
152 | #define PIO_P28_SIZE 1 | ||
153 | #define PIO_P29_OFFSET 29 | ||
154 | #define PIO_P29_SIZE 1 | ||
155 | #define PIO_P30_OFFSET 30 | ||
156 | #define PIO_P30_SIZE 1 | ||
157 | #define PIO_P31_OFFSET 31 | ||
158 | #define PIO_P31_SIZE 1 | ||
159 | |||
160 | /* Bitfields in OWER */ | ||
161 | |||
162 | /* Bitfields in OWDR */ | ||
163 | |||
164 | /* Bitfields in OWSR */ | ||
165 | |||
166 | /* Bit manipulation macros */ | ||
167 | #define PIO_BIT(name) (1 << PIO_##name##_OFFSET) | ||
168 | #define PIO_BF(name,value) (((value) & ((1 << PIO_##name##_SIZE) - 1)) << PIO_##name##_OFFSET) | ||
169 | #define PIO_BFEXT(name,value) (((value) >> PIO_##name##_OFFSET) & ((1 << PIO_##name##_SIZE) - 1)) | ||
170 | #define PIO_BFINS(name,value,old) (((old) & ~(((1 << PIO_##name##_SIZE) - 1) << PIO_##name##_OFFSET)) | PIO_BF(name,value)) | ||
171 | |||
172 | /* Register access macros */ | ||
173 | #define pio_readl(port,reg) \ | ||
174 | __raw_readl((port)->regs + PIO_##reg) | ||
175 | #define pio_writel(port,reg,value) \ | ||
176 | __raw_writel((value), (port)->regs + PIO_##reg) | ||
177 | |||
178 | void at32_init_pio(struct platform_device *pdev); | ||
179 | |||
180 | #endif /* __ARCH_AVR32_AT32AP_PIO_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/pm-at32ap700x.S b/arch/avr32/mach-at32ap/pm-at32ap700x.S deleted file mode 100644 index 1c8e4e6bff03..000000000000 --- a/arch/avr32/mach-at32ap/pm-at32ap700x.S +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level Power Management code. | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <asm/asm.h> | ||
11 | #include <asm/asm-offsets.h> | ||
12 | #include <asm/thread_info.h> | ||
13 | #include <mach/pm.h> | ||
14 | |||
15 | #include "pm.h" | ||
16 | #include "sdramc.h" | ||
17 | |||
18 | /* Same as 0xfff00000 but fits in a 21 bit signed immediate */ | ||
19 | #define PM_BASE -0x100000 | ||
20 | |||
21 | /* Keep this close to the irq handlers */ | ||
22 | .section .irq.text, "ax", @progbits | ||
23 | |||
24 | /* | ||
25 | * void cpu_enter_idle(void) | ||
26 | * | ||
27 | * Put the CPU into "idle" mode, in which it will consume | ||
28 | * significantly less power. | ||
29 | * | ||
30 | * If an interrupt comes along in the window between | ||
31 | * unmask_interrupts and the sleep instruction below, the | ||
32 | * interrupt code will adjust the return address so that we | ||
33 | * never execute the sleep instruction. This is required | ||
34 | * because the AP7000 doesn't unmask interrupts when entering | ||
35 | * sleep modes; later CPUs may not need this workaround. | ||
36 | */ | ||
37 | .global cpu_enter_idle | ||
38 | .type cpu_enter_idle, @function | ||
39 | cpu_enter_idle: | ||
40 | mask_interrupts | ||
41 | get_thread_info r8 | ||
42 | ld.w r9, r8[TI_flags] | ||
43 | bld r9, TIF_NEED_RESCHED | ||
44 | brcs .Lret_from_sleep | ||
45 | sbr r9, TIF_CPU_GOING_TO_SLEEP | ||
46 | st.w r8[TI_flags], r9 | ||
47 | unmask_interrupts | ||
48 | sleep CPU_SLEEP_IDLE | ||
49 | .size cpu_enter_idle, . - cpu_enter_idle | ||
50 | |||
51 | /* | ||
52 | * Common return path for PM functions that don't run from | ||
53 | * SRAM. | ||
54 | */ | ||
55 | .global cpu_idle_skip_sleep | ||
56 | .type cpu_idle_skip_sleep, @function | ||
57 | cpu_idle_skip_sleep: | ||
58 | mask_interrupts | ||
59 | ld.w r9, r8[TI_flags] | ||
60 | cbr r9, TIF_CPU_GOING_TO_SLEEP | ||
61 | st.w r8[TI_flags], r9 | ||
62 | .Lret_from_sleep: | ||
63 | unmask_interrupts | ||
64 | retal r12 | ||
65 | .size cpu_idle_skip_sleep, . - cpu_idle_skip_sleep | ||
66 | |||
67 | #ifdef CONFIG_PM | ||
68 | .section .init.text, "ax", @progbits | ||
69 | |||
70 | .global pm_exception | ||
71 | .type pm_exception, @function | ||
72 | pm_exception: | ||
73 | /* | ||
74 | * Exceptions are masked when we switch to this handler, so | ||
75 | * we'll only get "unrecoverable" exceptions (offset 0.) | ||
76 | */ | ||
77 | sub r12, pc, . - .Lpanic_msg | ||
78 | lddpc pc, .Lpanic_addr | ||
79 | |||
80 | .align 2 | ||
81 | .Lpanic_addr: | ||
82 | .long panic | ||
83 | .Lpanic_msg: | ||
84 | .asciz "Unrecoverable exception during suspend\n" | ||
85 | .size pm_exception, . - pm_exception | ||
86 | |||
87 | .global pm_irq0 | ||
88 | .type pm_irq0, @function | ||
89 | pm_irq0: | ||
90 | /* Disable interrupts and return after the sleep instruction */ | ||
91 | mfsr r9, SYSREG_RSR_INT0 | ||
92 | mtsr SYSREG_RAR_INT0, r8 | ||
93 | sbr r9, SYSREG_GM_OFFSET | ||
94 | mtsr SYSREG_RSR_INT0, r9 | ||
95 | rete | ||
96 | |||
97 | /* | ||
98 | * void cpu_enter_standby(unsigned long sdramc_base) | ||
99 | * | ||
100 | * Enter PM_SUSPEND_STANDBY mode. At this point, all drivers | ||
101 | * are suspended and interrupts are disabled. Interrupts | ||
102 | * marked as 'wakeup' event sources may still come along and | ||
103 | * get us out of here. | ||
104 | * | ||
105 | * The SDRAM will be put into self-refresh mode (which does | ||
106 | * not require a clock from the CPU), and the CPU will be put | ||
107 | * into "frozen" mode (HSB bus stopped). The SDRAM controller | ||
108 | * will automatically bring the SDRAM into normal mode on the | ||
109 | * first access, and the power manager will automatically | ||
110 | * start the HSB and CPU clocks upon a wakeup event. | ||
111 | * | ||
112 | * This code uses the same "skip sleep" technique as above. | ||
113 | * It is very important that we jump directly to | ||
114 | * cpu_after_sleep after the sleep instruction since that's | ||
115 | * where we'll end up if the interrupt handler decides that we | ||
116 | * need to skip the sleep instruction. | ||
117 | */ | ||
118 | .global pm_standby | ||
119 | .type pm_standby, @function | ||
120 | pm_standby: | ||
121 | /* | ||
122 | * interrupts are already masked at this point, and EVBA | ||
123 | * points to pm_exception above. | ||
124 | */ | ||
125 | ld.w r10, r12[SDRAMC_LPR] | ||
126 | sub r8, pc, . - 1f /* return address for irq handler */ | ||
127 | mov r11, SDRAMC_LPR_LPCB_SELF_RFR | ||
128 | bfins r10, r11, 0, 2 /* LPCB <- self Refresh */ | ||
129 | sync 0 /* flush write buffer */ | ||
130 | st.w r12[SDRAMC_LPR], r10 /* put SDRAM in self-refresh mode */ | ||
131 | ld.w r11, r12[SDRAMC_LPR] | ||
132 | unmask_interrupts | ||
133 | sleep CPU_SLEEP_FROZEN | ||
134 | 1: mask_interrupts | ||
135 | retal r12 | ||
136 | .size pm_standby, . - pm_standby | ||
137 | |||
138 | .global pm_suspend_to_ram | ||
139 | .type pm_suspend_to_ram, @function | ||
140 | pm_suspend_to_ram: | ||
141 | /* | ||
142 | * interrupts are already masked at this point, and EVBA | ||
143 | * points to pm_exception above. | ||
144 | */ | ||
145 | mov r11, 0 | ||
146 | cache r11[2], 8 /* clean all dcache lines */ | ||
147 | sync 0 /* flush write buffer */ | ||
148 | ld.w r10, r12[SDRAMC_LPR] | ||
149 | sub r8, pc, . - 1f /* return address for irq handler */ | ||
150 | mov r11, SDRAMC_LPR_LPCB_SELF_RFR | ||
151 | bfins r10, r11, 0, 2 /* LPCB <- self refresh */ | ||
152 | st.w r12[SDRAMC_LPR], r10 /* put SDRAM in self-refresh mode */ | ||
153 | ld.w r11, r12[SDRAMC_LPR] | ||
154 | |||
155 | unmask_interrupts | ||
156 | sleep CPU_SLEEP_STOP | ||
157 | 1: mask_interrupts | ||
158 | |||
159 | retal r12 | ||
160 | .size pm_suspend_to_ram, . - pm_suspend_to_ram | ||
161 | |||
162 | .global pm_sram_end | ||
163 | .type pm_sram_end, @function | ||
164 | pm_sram_end: | ||
165 | .size pm_sram_end, 0 | ||
166 | |||
167 | #endif /* CONFIG_PM */ | ||
diff --git a/arch/avr32/mach-at32ap/pm.c b/arch/avr32/mach-at32ap/pm.c deleted file mode 100644 index db190842b80c..000000000000 --- a/arch/avr32/mach-at32ap/pm.c +++ /dev/null | |||
@@ -1,243 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 AP Power Management | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * version 2 as published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/io.h> | ||
11 | #include <linux/suspend.h> | ||
12 | #include <linux/vmalloc.h> | ||
13 | |||
14 | #include <asm/cacheflush.h> | ||
15 | #include <asm/sysreg.h> | ||
16 | |||
17 | #include <mach/chip.h> | ||
18 | #include <mach/pm.h> | ||
19 | #include <mach/sram.h> | ||
20 | |||
21 | #include "sdramc.h" | ||
22 | |||
23 | #define SRAM_PAGE_FLAGS (SYSREG_BIT(TLBELO_D) | SYSREG_BF(SZ, 1) \ | ||
24 | | SYSREG_BF(AP, 3) | SYSREG_BIT(G)) | ||
25 | |||
26 | |||
27 | static unsigned long pm_sram_start; | ||
28 | static size_t pm_sram_size; | ||
29 | static struct vm_struct *pm_sram_area; | ||
30 | |||
31 | static void (*avr32_pm_enter_standby)(unsigned long sdramc_base); | ||
32 | static void (*avr32_pm_enter_str)(unsigned long sdramc_base); | ||
33 | |||
34 | /* | ||
35 | * Must be called with interrupts disabled. Exceptions will be masked | ||
36 | * on return (i.e. all exceptions will be "unrecoverable".) | ||
37 | */ | ||
38 | static void *avr32_pm_map_sram(void) | ||
39 | { | ||
40 | unsigned long vaddr; | ||
41 | unsigned long page_addr; | ||
42 | u32 tlbehi; | ||
43 | u32 mmucr; | ||
44 | |||
45 | vaddr = (unsigned long)pm_sram_area->addr; | ||
46 | page_addr = pm_sram_start & PAGE_MASK; | ||
47 | |||
48 | /* | ||
49 | * Mask exceptions and grab the first TLB entry. We won't be | ||
50 | * needing it while sleeping. | ||
51 | */ | ||
52 | asm volatile("ssrf %0" : : "i"(SYSREG_EM_OFFSET) : "memory"); | ||
53 | |||
54 | mmucr = sysreg_read(MMUCR); | ||
55 | tlbehi = sysreg_read(TLBEHI); | ||
56 | sysreg_write(MMUCR, SYSREG_BFINS(DRP, 0, mmucr)); | ||
57 | |||
58 | tlbehi = SYSREG_BF(ASID, SYSREG_BFEXT(ASID, tlbehi)); | ||
59 | tlbehi |= vaddr & PAGE_MASK; | ||
60 | tlbehi |= SYSREG_BIT(TLBEHI_V); | ||
61 | |||
62 | sysreg_write(TLBELO, page_addr | SRAM_PAGE_FLAGS); | ||
63 | sysreg_write(TLBEHI, tlbehi); | ||
64 | __builtin_tlbw(); | ||
65 | |||
66 | return (void *)(vaddr + pm_sram_start - page_addr); | ||
67 | } | ||
68 | |||
69 | /* | ||
70 | * Must be called with interrupts disabled. Exceptions will be | ||
71 | * unmasked on return. | ||
72 | */ | ||
73 | static void avr32_pm_unmap_sram(void) | ||
74 | { | ||
75 | u32 mmucr; | ||
76 | u32 tlbehi; | ||
77 | u32 tlbarlo; | ||
78 | |||
79 | /* Going to update TLB entry at index 0 */ | ||
80 | mmucr = sysreg_read(MMUCR); | ||
81 | tlbehi = sysreg_read(TLBEHI); | ||
82 | sysreg_write(MMUCR, SYSREG_BFINS(DRP, 0, mmucr)); | ||
83 | |||
84 | /* Clear the "valid" bit */ | ||
85 | tlbehi = SYSREG_BF(ASID, SYSREG_BFEXT(ASID, tlbehi)); | ||
86 | sysreg_write(TLBEHI, tlbehi); | ||
87 | |||
88 | /* Mark it as "not accessed" */ | ||
89 | tlbarlo = sysreg_read(TLBARLO); | ||
90 | sysreg_write(TLBARLO, tlbarlo | 0x80000000U); | ||
91 | |||
92 | /* Update the TLB */ | ||
93 | __builtin_tlbw(); | ||
94 | |||
95 | /* Unmask exceptions */ | ||
96 | asm volatile("csrf %0" : : "i"(SYSREG_EM_OFFSET) : "memory"); | ||
97 | } | ||
98 | |||
99 | static int avr32_pm_valid_state(suspend_state_t state) | ||
100 | { | ||
101 | switch (state) { | ||
102 | case PM_SUSPEND_ON: | ||
103 | case PM_SUSPEND_STANDBY: | ||
104 | case PM_SUSPEND_MEM: | ||
105 | return 1; | ||
106 | |||
107 | default: | ||
108 | return 0; | ||
109 | } | ||
110 | } | ||
111 | |||
112 | static int avr32_pm_enter(suspend_state_t state) | ||
113 | { | ||
114 | u32 lpr_saved; | ||
115 | u32 evba_saved; | ||
116 | void *sram; | ||
117 | |||
118 | switch (state) { | ||
119 | case PM_SUSPEND_STANDBY: | ||
120 | sram = avr32_pm_map_sram(); | ||
121 | |||
122 | /* Switch to in-sram exception handlers */ | ||
123 | evba_saved = sysreg_read(EVBA); | ||
124 | sysreg_write(EVBA, (unsigned long)sram); | ||
125 | |||
126 | /* | ||
127 | * Save the LPR register so that we can re-enable | ||
128 | * SDRAM Low Power mode on resume. | ||
129 | */ | ||
130 | lpr_saved = sdramc_readl(LPR); | ||
131 | pr_debug("%s: Entering standby...\n", __func__); | ||
132 | avr32_pm_enter_standby(SDRAMC_BASE); | ||
133 | sdramc_writel(LPR, lpr_saved); | ||
134 | |||
135 | /* Switch back to regular exception handlers */ | ||
136 | sysreg_write(EVBA, evba_saved); | ||
137 | |||
138 | avr32_pm_unmap_sram(); | ||
139 | break; | ||
140 | |||
141 | case PM_SUSPEND_MEM: | ||
142 | sram = avr32_pm_map_sram(); | ||
143 | |||
144 | /* Switch to in-sram exception handlers */ | ||
145 | evba_saved = sysreg_read(EVBA); | ||
146 | sysreg_write(EVBA, (unsigned long)sram); | ||
147 | |||
148 | /* | ||
149 | * Save the LPR register so that we can re-enable | ||
150 | * SDRAM Low Power mode on resume. | ||
151 | */ | ||
152 | lpr_saved = sdramc_readl(LPR); | ||
153 | pr_debug("%s: Entering suspend-to-ram...\n", __func__); | ||
154 | avr32_pm_enter_str(SDRAMC_BASE); | ||
155 | sdramc_writel(LPR, lpr_saved); | ||
156 | |||
157 | /* Switch back to regular exception handlers */ | ||
158 | sysreg_write(EVBA, evba_saved); | ||
159 | |||
160 | avr32_pm_unmap_sram(); | ||
161 | break; | ||
162 | |||
163 | case PM_SUSPEND_ON: | ||
164 | pr_debug("%s: Entering idle...\n", __func__); | ||
165 | cpu_enter_idle(); | ||
166 | break; | ||
167 | |||
168 | default: | ||
169 | pr_debug("%s: Invalid suspend state %d\n", __func__, state); | ||
170 | goto out; | ||
171 | } | ||
172 | |||
173 | pr_debug("%s: wakeup\n", __func__); | ||
174 | |||
175 | out: | ||
176 | return 0; | ||
177 | } | ||
178 | |||
179 | static const struct platform_suspend_ops avr32_pm_ops = { | ||
180 | .valid = avr32_pm_valid_state, | ||
181 | .enter = avr32_pm_enter, | ||
182 | }; | ||
183 | |||
184 | static unsigned long __init avr32_pm_offset(void *symbol) | ||
185 | { | ||
186 | extern u8 pm_exception[]; | ||
187 | |||
188 | return (unsigned long)symbol - (unsigned long)pm_exception; | ||
189 | } | ||
190 | |||
191 | static int __init avr32_pm_init(void) | ||
192 | { | ||
193 | extern u8 pm_exception[]; | ||
194 | extern u8 pm_irq0[]; | ||
195 | extern u8 pm_standby[]; | ||
196 | extern u8 pm_suspend_to_ram[]; | ||
197 | extern u8 pm_sram_end[]; | ||
198 | void *dst; | ||
199 | |||
200 | /* | ||
201 | * To keep things simple, we depend on not needing more than a | ||
202 | * single page. | ||
203 | */ | ||
204 | pm_sram_size = avr32_pm_offset(pm_sram_end); | ||
205 | if (pm_sram_size > PAGE_SIZE) | ||
206 | goto err; | ||
207 | |||
208 | pm_sram_start = sram_alloc(pm_sram_size); | ||
209 | if (!pm_sram_start) | ||
210 | goto err_alloc_sram; | ||
211 | |||
212 | /* Grab a virtual area we can use later on. */ | ||
213 | pm_sram_area = get_vm_area(pm_sram_size, VM_IOREMAP); | ||
214 | if (!pm_sram_area) | ||
215 | goto err_vm_area; | ||
216 | pm_sram_area->phys_addr = pm_sram_start; | ||
217 | |||
218 | local_irq_disable(); | ||
219 | dst = avr32_pm_map_sram(); | ||
220 | memcpy(dst, pm_exception, pm_sram_size); | ||
221 | flush_dcache_region(dst, pm_sram_size); | ||
222 | invalidate_icache_region(dst, pm_sram_size); | ||
223 | avr32_pm_unmap_sram(); | ||
224 | local_irq_enable(); | ||
225 | |||
226 | avr32_pm_enter_standby = dst + avr32_pm_offset(pm_standby); | ||
227 | avr32_pm_enter_str = dst + avr32_pm_offset(pm_suspend_to_ram); | ||
228 | intc_set_suspend_handler(avr32_pm_offset(pm_irq0)); | ||
229 | |||
230 | suspend_set_ops(&avr32_pm_ops); | ||
231 | |||
232 | printk("AVR32 AP Power Management enabled\n"); | ||
233 | |||
234 | return 0; | ||
235 | |||
236 | err_vm_area: | ||
237 | sram_free(pm_sram_start, pm_sram_size); | ||
238 | err_alloc_sram: | ||
239 | err: | ||
240 | pr_err("AVR32 Power Management initialization failed\n"); | ||
241 | return -ENOMEM; | ||
242 | } | ||
243 | arch_initcall(avr32_pm_init); | ||
diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h deleted file mode 100644 index 532a3732c214..000000000000 --- a/arch/avr32/mach-at32ap/pm.h +++ /dev/null | |||
@@ -1,112 +0,0 @@ | |||
1 | /* | ||
2 | * Register definitions for the Power Manager (PM) | ||
3 | */ | ||
4 | #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ | ||
5 | #define __ARCH_AVR32_MACH_AT32AP_PM_H__ | ||
6 | |||
7 | /* PM register offsets */ | ||
8 | #define PM_MCCTRL 0x0000 | ||
9 | #define PM_CKSEL 0x0004 | ||
10 | #define PM_CPU_MASK 0x0008 | ||
11 | #define PM_HSB_MASK 0x000c | ||
12 | #define PM_PBA_MASK 0x0010 | ||
13 | #define PM_PBB_MASK 0x0014 | ||
14 | #define PM_PLL0 0x0020 | ||
15 | #define PM_PLL1 0x0024 | ||
16 | #define PM_IER 0x0040 | ||
17 | #define PM_IDR 0x0044 | ||
18 | #define PM_IMR 0x0048 | ||
19 | #define PM_ISR 0x004c | ||
20 | #define PM_ICR 0x0050 | ||
21 | #define PM_GCCTRL(x) (0x0060 + 4 * (x)) | ||
22 | #define PM_RCAUSE 0x00c0 | ||
23 | |||
24 | /* Bitfields in CKSEL */ | ||
25 | #define PM_CPUSEL_OFFSET 0 | ||
26 | #define PM_CPUSEL_SIZE 3 | ||
27 | #define PM_CPUDIV_OFFSET 7 | ||
28 | #define PM_CPUDIV_SIZE 1 | ||
29 | #define PM_HSBSEL_OFFSET 8 | ||
30 | #define PM_HSBSEL_SIZE 3 | ||
31 | #define PM_HSBDIV_OFFSET 15 | ||
32 | #define PM_HSBDIV_SIZE 1 | ||
33 | #define PM_PBASEL_OFFSET 16 | ||
34 | #define PM_PBASEL_SIZE 3 | ||
35 | #define PM_PBADIV_OFFSET 23 | ||
36 | #define PM_PBADIV_SIZE 1 | ||
37 | #define PM_PBBSEL_OFFSET 24 | ||
38 | #define PM_PBBSEL_SIZE 3 | ||
39 | #define PM_PBBDIV_OFFSET 31 | ||
40 | #define PM_PBBDIV_SIZE 1 | ||
41 | |||
42 | /* Bitfields in PLL0 */ | ||
43 | #define PM_PLLEN_OFFSET 0 | ||
44 | #define PM_PLLEN_SIZE 1 | ||
45 | #define PM_PLLOSC_OFFSET 1 | ||
46 | #define PM_PLLOSC_SIZE 1 | ||
47 | #define PM_PLLOPT_OFFSET 2 | ||
48 | #define PM_PLLOPT_SIZE 3 | ||
49 | #define PM_PLLDIV_OFFSET 8 | ||
50 | #define PM_PLLDIV_SIZE 8 | ||
51 | #define PM_PLLMUL_OFFSET 16 | ||
52 | #define PM_PLLMUL_SIZE 8 | ||
53 | #define PM_PLLCOUNT_OFFSET 24 | ||
54 | #define PM_PLLCOUNT_SIZE 6 | ||
55 | #define PM_PLLTEST_OFFSET 31 | ||
56 | #define PM_PLLTEST_SIZE 1 | ||
57 | |||
58 | /* Bitfields in ICR */ | ||
59 | #define PM_LOCK0_OFFSET 0 | ||
60 | #define PM_LOCK0_SIZE 1 | ||
61 | #define PM_LOCK1_OFFSET 1 | ||
62 | #define PM_LOCK1_SIZE 1 | ||
63 | #define PM_WAKE_OFFSET 2 | ||
64 | #define PM_WAKE_SIZE 1 | ||
65 | #define PM_CKRDY_OFFSET 5 | ||
66 | #define PM_CKRDY_SIZE 1 | ||
67 | #define PM_MSKRDY_OFFSET 6 | ||
68 | #define PM_MSKRDY_SIZE 1 | ||
69 | |||
70 | /* Bitfields in GCCTRL0 */ | ||
71 | #define PM_OSCSEL_OFFSET 0 | ||
72 | #define PM_OSCSEL_SIZE 1 | ||
73 | #define PM_PLLSEL_OFFSET 1 | ||
74 | #define PM_PLLSEL_SIZE 1 | ||
75 | #define PM_CEN_OFFSET 2 | ||
76 | #define PM_CEN_SIZE 1 | ||
77 | #define PM_DIVEN_OFFSET 4 | ||
78 | #define PM_DIVEN_SIZE 1 | ||
79 | #define PM_DIV_OFFSET 8 | ||
80 | #define PM_DIV_SIZE 8 | ||
81 | |||
82 | /* Bitfields in RCAUSE */ | ||
83 | #define PM_POR_OFFSET 0 | ||
84 | #define PM_POR_SIZE 1 | ||
85 | #define PM_EXT_OFFSET 2 | ||
86 | #define PM_EXT_SIZE 1 | ||
87 | #define PM_WDT_OFFSET 3 | ||
88 | #define PM_WDT_SIZE 1 | ||
89 | #define PM_NTAE_OFFSET 4 | ||
90 | #define PM_NTAE_SIZE 1 | ||
91 | |||
92 | /* Bit manipulation macros */ | ||
93 | #define PM_BIT(name) \ | ||
94 | (1 << PM_##name##_OFFSET) | ||
95 | #define PM_BF(name,value) \ | ||
96 | (((value) & ((1 << PM_##name##_SIZE) - 1)) \ | ||
97 | << PM_##name##_OFFSET) | ||
98 | #define PM_BFEXT(name,value) \ | ||
99 | (((value) >> PM_##name##_OFFSET) \ | ||
100 | & ((1 << PM_##name##_SIZE) - 1)) | ||
101 | #define PM_BFINS(name,value,old)\ | ||
102 | (((old) & ~(((1 << PM_##name##_SIZE) - 1) \ | ||
103 | << PM_##name##_OFFSET)) \ | ||
104 | | PM_BF(name,value)) | ||
105 | |||
106 | /* Register access macros */ | ||
107 | #define pm_readl(reg) \ | ||
108 | __raw_readl((void __iomem __force *)PM_BASE + PM_##reg) | ||
109 | #define pm_writel(reg,value) \ | ||
110 | __raw_writel((value), (void __iomem __force *)PM_BASE + PM_##reg) | ||
111 | |||
112 | #endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */ | ||
diff --git a/arch/avr32/mach-at32ap/sdramc.h b/arch/avr32/mach-at32ap/sdramc.h deleted file mode 100644 index 66eeaed49073..000000000000 --- a/arch/avr32/mach-at32ap/sdramc.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* | ||
2 | * Register definitions for the AT32AP SDRAM Controller | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * version 2 as published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | /* Register offsets */ | ||
12 | #define SDRAMC_MR 0x0000 | ||
13 | #define SDRAMC_TR 0x0004 | ||
14 | #define SDRAMC_CR 0x0008 | ||
15 | #define SDRAMC_HSR 0x000c | ||
16 | #define SDRAMC_LPR 0x0010 | ||
17 | #define SDRAMC_IER 0x0014 | ||
18 | #define SDRAMC_IDR 0x0018 | ||
19 | #define SDRAMC_IMR 0x001c | ||
20 | #define SDRAMC_ISR 0x0020 | ||
21 | #define SDRAMC_MDR 0x0024 | ||
22 | |||
23 | /* MR - Mode Register */ | ||
24 | #define SDRAMC_MR_MODE_NORMAL ( 0 << 0) | ||
25 | #define SDRAMC_MR_MODE_NOP ( 1 << 0) | ||
26 | #define SDRAMC_MR_MODE_BANKS_PRECHARGE ( 2 << 0) | ||
27 | #define SDRAMC_MR_MODE_LOAD_MODE ( 3 << 0) | ||
28 | #define SDRAMC_MR_MODE_AUTO_REFRESH ( 4 << 0) | ||
29 | #define SDRAMC_MR_MODE_EXT_LOAD_MODE ( 5 << 0) | ||
30 | #define SDRAMC_MR_MODE_POWER_DOWN ( 6 << 0) | ||
31 | |||
32 | /* CR - Configuration Register */ | ||
33 | #define SDRAMC_CR_NC_8_BITS ( 0 << 0) | ||
34 | #define SDRAMC_CR_NC_9_BITS ( 1 << 0) | ||
35 | #define SDRAMC_CR_NC_10_BITS ( 2 << 0) | ||
36 | #define SDRAMC_CR_NC_11_BITS ( 3 << 0) | ||
37 | #define SDRAMC_CR_NR_11_BITS ( 0 << 2) | ||
38 | #define SDRAMC_CR_NR_12_BITS ( 1 << 2) | ||
39 | #define SDRAMC_CR_NR_13_BITS ( 2 << 2) | ||
40 | #define SDRAMC_CR_NB_2_BANKS ( 0 << 4) | ||
41 | #define SDRAMC_CR_NB_4_BANKS ( 1 << 4) | ||
42 | #define SDRAMC_CR_CAS(x) ((x) << 5) | ||
43 | #define SDRAMC_CR_DBW_32_BITS ( 0 << 7) | ||
44 | #define SDRAMC_CR_DBW_16_BITS ( 1 << 7) | ||
45 | #define SDRAMC_CR_TWR(x) ((x) << 8) | ||
46 | #define SDRAMC_CR_TRC(x) ((x) << 12) | ||
47 | #define SDRAMC_CR_TRP(x) ((x) << 16) | ||
48 | #define SDRAMC_CR_TRCD(x) ((x) << 20) | ||
49 | #define SDRAMC_CR_TRAS(x) ((x) << 24) | ||
50 | #define SDRAMC_CR_TXSR(x) ((x) << 28) | ||
51 | |||
52 | /* HSR - High Speed Register */ | ||
53 | #define SDRAMC_HSR_DA ( 1 << 0) | ||
54 | |||
55 | /* LPR - Low Power Register */ | ||
56 | #define SDRAMC_LPR_LPCB_INHIBIT ( 0 << 0) | ||
57 | #define SDRAMC_LPR_LPCB_SELF_RFR ( 1 << 0) | ||
58 | #define SDRAMC_LPR_LPCB_PDOWN ( 2 << 0) | ||
59 | #define SDRAMC_LPR_LPCB_DEEP_PDOWN ( 3 << 0) | ||
60 | #define SDRAMC_LPR_PASR(x) ((x) << 4) | ||
61 | #define SDRAMC_LPR_TCSR(x) ((x) << 8) | ||
62 | #define SDRAMC_LPR_DS(x) ((x) << 10) | ||
63 | #define SDRAMC_LPR_TIMEOUT(x) ((x) << 12) | ||
64 | |||
65 | /* IER/IDR/IMR/ISR - Interrupt Enable/Disable/Mask/Status Register */ | ||
66 | #define SDRAMC_ISR_RES ( 1 << 0) | ||
67 | |||
68 | /* MDR - Memory Device Register */ | ||
69 | #define SDRAMC_MDR_MD_SDRAM ( 0 << 0) | ||
70 | #define SDRAMC_MDR_MD_LOW_PWR_SDRAM ( 1 << 0) | ||
71 | |||
72 | /* Register access macros */ | ||
73 | #define sdramc_readl(reg) \ | ||
74 | __raw_readl((void __iomem __force *)SDRAMC_BASE + SDRAMC_##reg) | ||
75 | #define sdramc_writel(reg, value) \ | ||
76 | __raw_writel(value, (void __iomem __force *)SDRAMC_BASE + SDRAMC_##reg) | ||
diff --git a/arch/avr32/mm/Makefile b/arch/avr32/mm/Makefile deleted file mode 100644 index 0066491f90d4..000000000000 --- a/arch/avr32/mm/Makefile +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the Linux/AVR32 kernel. | ||
3 | # | ||
4 | |||
5 | obj-y += init.o clear_page.o copy_page.o dma-coherent.o | ||
6 | obj-y += ioremap.o cache.o fault.o tlb.o | ||
diff --git a/arch/avr32/mm/cache.c b/arch/avr32/mm/cache.c deleted file mode 100644 index d9476825fc43..000000000000 --- a/arch/avr32/mm/cache.c +++ /dev/null | |||
@@ -1,163 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/highmem.h> | ||
10 | #include <linux/unistd.h> | ||
11 | |||
12 | #include <asm/cacheflush.h> | ||
13 | #include <asm/cachectl.h> | ||
14 | #include <asm/processor.h> | ||
15 | #include <linux/uaccess.h> | ||
16 | #include <asm/syscalls.h> | ||
17 | |||
18 | /* | ||
19 | * If you attempt to flush anything more than this, you need superuser | ||
20 | * privileges. The value is completely arbitrary. | ||
21 | */ | ||
22 | #define CACHEFLUSH_MAX_LEN 1024 | ||
23 | |||
24 | void invalidate_dcache_region(void *start, size_t size) | ||
25 | { | ||
26 | unsigned long v, begin, end, linesz, mask; | ||
27 | |||
28 | linesz = boot_cpu_data.dcache.linesz; | ||
29 | mask = linesz - 1; | ||
30 | |||
31 | /* when first and/or last cachelines are shared, flush them | ||
32 | * instead of invalidating ... never discard valid data! | ||
33 | */ | ||
34 | begin = (unsigned long)start; | ||
35 | end = begin + size; | ||
36 | |||
37 | if (begin & mask) { | ||
38 | flush_dcache_line(start); | ||
39 | begin += linesz; | ||
40 | } | ||
41 | if (end & mask) { | ||
42 | flush_dcache_line((void *)end); | ||
43 | end &= ~mask; | ||
44 | } | ||
45 | |||
46 | /* remaining cachelines only need invalidation */ | ||
47 | for (v = begin; v < end; v += linesz) | ||
48 | invalidate_dcache_line((void *)v); | ||
49 | flush_write_buffer(); | ||
50 | } | ||
51 | |||
52 | void clean_dcache_region(void *start, size_t size) | ||
53 | { | ||
54 | unsigned long v, begin, end, linesz; | ||
55 | |||
56 | linesz = boot_cpu_data.dcache.linesz; | ||
57 | begin = (unsigned long)start & ~(linesz - 1); | ||
58 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
59 | |||
60 | for (v = begin; v < end; v += linesz) | ||
61 | clean_dcache_line((void *)v); | ||
62 | flush_write_buffer(); | ||
63 | } | ||
64 | |||
65 | void flush_dcache_region(void *start, size_t size) | ||
66 | { | ||
67 | unsigned long v, begin, end, linesz; | ||
68 | |||
69 | linesz = boot_cpu_data.dcache.linesz; | ||
70 | begin = (unsigned long)start & ~(linesz - 1); | ||
71 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
72 | |||
73 | for (v = begin; v < end; v += linesz) | ||
74 | flush_dcache_line((void *)v); | ||
75 | flush_write_buffer(); | ||
76 | } | ||
77 | |||
78 | void invalidate_icache_region(void *start, size_t size) | ||
79 | { | ||
80 | unsigned long v, begin, end, linesz; | ||
81 | |||
82 | linesz = boot_cpu_data.icache.linesz; | ||
83 | begin = (unsigned long)start & ~(linesz - 1); | ||
84 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
85 | |||
86 | for (v = begin; v < end; v += linesz) | ||
87 | invalidate_icache_line((void *)v); | ||
88 | } | ||
89 | |||
90 | static inline void __flush_icache_range(unsigned long start, unsigned long end) | ||
91 | { | ||
92 | unsigned long v, linesz; | ||
93 | |||
94 | linesz = boot_cpu_data.dcache.linesz; | ||
95 | for (v = start; v < end; v += linesz) { | ||
96 | clean_dcache_line((void *)v); | ||
97 | invalidate_icache_line((void *)v); | ||
98 | } | ||
99 | |||
100 | flush_write_buffer(); | ||
101 | } | ||
102 | |||
103 | /* | ||
104 | * This one is called after a module has been loaded. | ||
105 | */ | ||
106 | void flush_icache_range(unsigned long start, unsigned long end) | ||
107 | { | ||
108 | unsigned long linesz; | ||
109 | |||
110 | linesz = boot_cpu_data.dcache.linesz; | ||
111 | __flush_icache_range(start & ~(linesz - 1), | ||
112 | (end + linesz - 1) & ~(linesz - 1)); | ||
113 | } | ||
114 | EXPORT_SYMBOL(flush_icache_range); | ||
115 | |||
116 | /* | ||
117 | * This one is called from __do_fault() and do_swap_page(). | ||
118 | */ | ||
119 | void flush_icache_page(struct vm_area_struct *vma, struct page *page) | ||
120 | { | ||
121 | if (vma->vm_flags & VM_EXEC) { | ||
122 | void *v = page_address(page); | ||
123 | __flush_icache_range((unsigned long)v, (unsigned long)v + PAGE_SIZE); | ||
124 | } | ||
125 | } | ||
126 | |||
127 | asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len) | ||
128 | { | ||
129 | int ret; | ||
130 | |||
131 | if (len > CACHEFLUSH_MAX_LEN) { | ||
132 | ret = -EPERM; | ||
133 | if (!capable(CAP_SYS_ADMIN)) | ||
134 | goto out; | ||
135 | } | ||
136 | |||
137 | ret = -EFAULT; | ||
138 | if (!access_ok(VERIFY_WRITE, addr, len)) | ||
139 | goto out; | ||
140 | |||
141 | switch (operation) { | ||
142 | case CACHE_IFLUSH: | ||
143 | flush_icache_range((unsigned long)addr, | ||
144 | (unsigned long)addr + len); | ||
145 | ret = 0; | ||
146 | break; | ||
147 | default: | ||
148 | ret = -EINVAL; | ||
149 | } | ||
150 | |||
151 | out: | ||
152 | return ret; | ||
153 | } | ||
154 | |||
155 | void copy_to_user_page(struct vm_area_struct *vma, struct page *page, | ||
156 | unsigned long vaddr, void *dst, const void *src, | ||
157 | unsigned long len) | ||
158 | { | ||
159 | memcpy(dst, src, len); | ||
160 | if (vma->vm_flags & VM_EXEC) | ||
161 | flush_icache_range((unsigned long)dst, | ||
162 | (unsigned long)dst + len); | ||
163 | } | ||
diff --git a/arch/avr32/mm/clear_page.S b/arch/avr32/mm/clear_page.S deleted file mode 100644 index 5d70dca00699..000000000000 --- a/arch/avr32/mm/clear_page.S +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/linkage.h> | ||
10 | #include <asm/page.h> | ||
11 | |||
12 | /* | ||
13 | * clear_page | ||
14 | * r12: P1 address (to) | ||
15 | */ | ||
16 | .text | ||
17 | .global clear_page | ||
18 | clear_page: | ||
19 | sub r9, r12, -PAGE_SIZE | ||
20 | mov r10, 0 | ||
21 | mov r11, 0 | ||
22 | 0: st.d r12++, r10 | ||
23 | cp r12, r9 | ||
24 | brne 0b | ||
25 | mov pc, lr | ||
diff --git a/arch/avr32/mm/copy_page.S b/arch/avr32/mm/copy_page.S deleted file mode 100644 index c2b3752946b8..000000000000 --- a/arch/avr32/mm/copy_page.S +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/linkage.h> | ||
9 | #include <asm/page.h> | ||
10 | |||
11 | /* | ||
12 | * copy_page | ||
13 | * | ||
14 | * r12 to (P1 address) | ||
15 | * r11 from (P1 address) | ||
16 | * r8-r10 scratch | ||
17 | */ | ||
18 | .text | ||
19 | .global copy_page | ||
20 | copy_page: | ||
21 | sub r10, r11, -(1 << PAGE_SHIFT) | ||
22 | /* pref r11[0] */ | ||
23 | 1: /* pref r11[8] */ | ||
24 | ld.d r8, r11++ | ||
25 | st.d r12++, r8 | ||
26 | cp r11, r10 | ||
27 | brlo 1b | ||
28 | mov pc, lr | ||
diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c deleted file mode 100644 index 555222d4f414..000000000000 --- a/arch/avr32/mm/dma-coherent.c +++ /dev/null | |||
@@ -1,202 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/dma-mapping.h> | ||
10 | #include <linux/gfp.h> | ||
11 | #include <linux/export.h> | ||
12 | #include <linux/mm.h> | ||
13 | #include <linux/device.h> | ||
14 | #include <linux/scatterlist.h> | ||
15 | |||
16 | #include <asm/processor.h> | ||
17 | #include <asm/cacheflush.h> | ||
18 | #include <asm/io.h> | ||
19 | #include <asm/addrspace.h> | ||
20 | |||
21 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, int direction) | ||
22 | { | ||
23 | /* | ||
24 | * No need to sync an uncached area | ||
25 | */ | ||
26 | if (PXSEG(vaddr) == P2SEG) | ||
27 | return; | ||
28 | |||
29 | switch (direction) { | ||
30 | case DMA_FROM_DEVICE: /* invalidate only */ | ||
31 | invalidate_dcache_region(vaddr, size); | ||
32 | break; | ||
33 | case DMA_TO_DEVICE: /* writeback only */ | ||
34 | clean_dcache_region(vaddr, size); | ||
35 | break; | ||
36 | case DMA_BIDIRECTIONAL: /* writeback and invalidate */ | ||
37 | flush_dcache_region(vaddr, size); | ||
38 | break; | ||
39 | default: | ||
40 | BUG(); | ||
41 | } | ||
42 | } | ||
43 | EXPORT_SYMBOL(dma_cache_sync); | ||
44 | |||
45 | static struct page *__dma_alloc(struct device *dev, size_t size, | ||
46 | dma_addr_t *handle, gfp_t gfp) | ||
47 | { | ||
48 | struct page *page, *free, *end; | ||
49 | int order; | ||
50 | |||
51 | /* Following is a work-around (a.k.a. hack) to prevent pages | ||
52 | * with __GFP_COMP being passed to split_page() which cannot | ||
53 | * handle them. The real problem is that this flag probably | ||
54 | * should be 0 on AVR32 as it is not supported on this | ||
55 | * platform--see CONFIG_HUGETLB_PAGE. */ | ||
56 | gfp &= ~(__GFP_COMP); | ||
57 | |||
58 | size = PAGE_ALIGN(size); | ||
59 | order = get_order(size); | ||
60 | |||
61 | page = alloc_pages(gfp, order); | ||
62 | if (!page) | ||
63 | return NULL; | ||
64 | split_page(page, order); | ||
65 | |||
66 | /* | ||
67 | * When accessing physical memory with valid cache data, we | ||
68 | * get a cache hit even if the virtual memory region is marked | ||
69 | * as uncached. | ||
70 | * | ||
71 | * Since the memory is newly allocated, there is no point in | ||
72 | * doing a writeback. If the previous owner cares, he should | ||
73 | * have flushed the cache before releasing the memory. | ||
74 | */ | ||
75 | invalidate_dcache_region(phys_to_virt(page_to_phys(page)), size); | ||
76 | |||
77 | *handle = page_to_bus(page); | ||
78 | free = page + (size >> PAGE_SHIFT); | ||
79 | end = page + (1 << order); | ||
80 | |||
81 | /* | ||
82 | * Free any unused pages | ||
83 | */ | ||
84 | while (free < end) { | ||
85 | __free_page(free); | ||
86 | free++; | ||
87 | } | ||
88 | |||
89 | return page; | ||
90 | } | ||
91 | |||
92 | static void __dma_free(struct device *dev, size_t size, | ||
93 | struct page *page, dma_addr_t handle) | ||
94 | { | ||
95 | struct page *end = page + (PAGE_ALIGN(size) >> PAGE_SHIFT); | ||
96 | |||
97 | while (page < end) | ||
98 | __free_page(page++); | ||
99 | } | ||
100 | |||
101 | static void *avr32_dma_alloc(struct device *dev, size_t size, | ||
102 | dma_addr_t *handle, gfp_t gfp, unsigned long attrs) | ||
103 | { | ||
104 | struct page *page; | ||
105 | dma_addr_t phys; | ||
106 | |||
107 | page = __dma_alloc(dev, size, handle, gfp); | ||
108 | if (!page) | ||
109 | return NULL; | ||
110 | phys = page_to_phys(page); | ||
111 | |||
112 | if (attrs & DMA_ATTR_WRITE_COMBINE) { | ||
113 | /* Now, map the page into P3 with write-combining turned on */ | ||
114 | *handle = phys; | ||
115 | return __ioremap(phys, size, _PAGE_BUFFER); | ||
116 | } else { | ||
117 | return phys_to_uncached(phys); | ||
118 | } | ||
119 | } | ||
120 | |||
121 | static void avr32_dma_free(struct device *dev, size_t size, | ||
122 | void *cpu_addr, dma_addr_t handle, unsigned long attrs) | ||
123 | { | ||
124 | struct page *page; | ||
125 | |||
126 | if (attrs & DMA_ATTR_WRITE_COMBINE) { | ||
127 | iounmap(cpu_addr); | ||
128 | |||
129 | page = phys_to_page(handle); | ||
130 | } else { | ||
131 | void *addr = phys_to_cached(uncached_to_phys(cpu_addr)); | ||
132 | |||
133 | pr_debug("avr32_dma_free addr %p (phys %08lx) size %u\n", | ||
134 | cpu_addr, (unsigned long)handle, (unsigned)size); | ||
135 | |||
136 | BUG_ON(!virt_addr_valid(addr)); | ||
137 | page = virt_to_page(addr); | ||
138 | } | ||
139 | |||
140 | __dma_free(dev, size, page, handle); | ||
141 | } | ||
142 | |||
143 | static dma_addr_t avr32_dma_map_page(struct device *dev, struct page *page, | ||
144 | unsigned long offset, size_t size, | ||
145 | enum dma_data_direction direction, unsigned long attrs) | ||
146 | { | ||
147 | void *cpu_addr = page_address(page) + offset; | ||
148 | |||
149 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
150 | dma_cache_sync(dev, cpu_addr, size, direction); | ||
151 | return virt_to_bus(cpu_addr); | ||
152 | } | ||
153 | |||
154 | static int avr32_dma_map_sg(struct device *dev, struct scatterlist *sglist, | ||
155 | int nents, enum dma_data_direction direction, | ||
156 | unsigned long attrs) | ||
157 | { | ||
158 | int i; | ||
159 | struct scatterlist *sg; | ||
160 | |||
161 | for_each_sg(sglist, sg, nents, i) { | ||
162 | char *virt; | ||
163 | |||
164 | sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset; | ||
165 | virt = sg_virt(sg); | ||
166 | |||
167 | if (attrs & DMA_ATTR_SKIP_CPU_SYNC) | ||
168 | continue; | ||
169 | |||
170 | dma_cache_sync(dev, virt, sg->length, direction); | ||
171 | } | ||
172 | |||
173 | return nents; | ||
174 | } | ||
175 | |||
176 | static void avr32_dma_sync_single_for_device(struct device *dev, | ||
177 | dma_addr_t dma_handle, size_t size, | ||
178 | enum dma_data_direction direction) | ||
179 | { | ||
180 | dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); | ||
181 | } | ||
182 | |||
183 | static void avr32_dma_sync_sg_for_device(struct device *dev, | ||
184 | struct scatterlist *sglist, int nents, | ||
185 | enum dma_data_direction direction) | ||
186 | { | ||
187 | int i; | ||
188 | struct scatterlist *sg; | ||
189 | |||
190 | for_each_sg(sglist, sg, nents, i) | ||
191 | dma_cache_sync(dev, sg_virt(sg), sg->length, direction); | ||
192 | } | ||
193 | |||
194 | const struct dma_map_ops avr32_dma_ops = { | ||
195 | .alloc = avr32_dma_alloc, | ||
196 | .free = avr32_dma_free, | ||
197 | .map_page = avr32_dma_map_page, | ||
198 | .map_sg = avr32_dma_map_sg, | ||
199 | .sync_single_for_device = avr32_dma_sync_single_for_device, | ||
200 | .sync_sg_for_device = avr32_dma_sync_sg_for_device, | ||
201 | }; | ||
202 | EXPORT_SYMBOL(avr32_dma_ops); | ||
diff --git a/arch/avr32/mm/fault.c b/arch/avr32/mm/fault.c deleted file mode 100644 index b3977e9208a3..000000000000 --- a/arch/avr32/mm/fault.c +++ /dev/null | |||
@@ -1,268 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * Based on linux/arch/sh/mm/fault.c: | ||
5 | * Copyright (C) 1999 Niibe Yutaka | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/mm.h> | ||
13 | #include <linux/extable.h> | ||
14 | #include <linux/pagemap.h> | ||
15 | #include <linux/kdebug.h> | ||
16 | #include <linux/kprobes.h> | ||
17 | #include <linux/uaccess.h> | ||
18 | |||
19 | #include <asm/mmu_context.h> | ||
20 | #include <asm/sysreg.h> | ||
21 | #include <asm/tlb.h> | ||
22 | |||
23 | #ifdef CONFIG_KPROBES | ||
24 | static inline int notify_page_fault(struct pt_regs *regs, int trap) | ||
25 | { | ||
26 | int ret = 0; | ||
27 | |||
28 | if (!user_mode(regs)) { | ||
29 | if (kprobe_running() && kprobe_fault_handler(regs, trap)) | ||
30 | ret = 1; | ||
31 | } | ||
32 | |||
33 | return ret; | ||
34 | } | ||
35 | #else | ||
36 | static inline int notify_page_fault(struct pt_regs *regs, int trap) | ||
37 | { | ||
38 | return 0; | ||
39 | } | ||
40 | #endif | ||
41 | |||
42 | int exception_trace = 1; | ||
43 | |||
44 | /* | ||
45 | * This routine handles page faults. It determines the address and the | ||
46 | * problem, and then passes it off to one of the appropriate routines. | ||
47 | * | ||
48 | * ecr is the Exception Cause Register. Possible values are: | ||
49 | * 6: Protection fault (instruction access) | ||
50 | * 15: Protection fault (read access) | ||
51 | * 16: Protection fault (write access) | ||
52 | * 20: Page not found (instruction access) | ||
53 | * 24: Page not found (read access) | ||
54 | * 28: Page not found (write access) | ||
55 | */ | ||
56 | asmlinkage void do_page_fault(unsigned long ecr, struct pt_regs *regs) | ||
57 | { | ||
58 | struct task_struct *tsk; | ||
59 | struct mm_struct *mm; | ||
60 | struct vm_area_struct *vma; | ||
61 | const struct exception_table_entry *fixup; | ||
62 | unsigned long address; | ||
63 | unsigned long page; | ||
64 | long signr; | ||
65 | int code; | ||
66 | int fault; | ||
67 | unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; | ||
68 | |||
69 | if (notify_page_fault(regs, ecr)) | ||
70 | return; | ||
71 | |||
72 | address = sysreg_read(TLBEAR); | ||
73 | |||
74 | tsk = current; | ||
75 | mm = tsk->mm; | ||
76 | |||
77 | signr = SIGSEGV; | ||
78 | code = SEGV_MAPERR; | ||
79 | |||
80 | /* | ||
81 | * If we're in an interrupt or have no user context, we must | ||
82 | * not take the fault... | ||
83 | */ | ||
84 | if (faulthandler_disabled() || !mm || regs->sr & SYSREG_BIT(GM)) | ||
85 | goto no_context; | ||
86 | |||
87 | local_irq_enable(); | ||
88 | |||
89 | if (user_mode(regs)) | ||
90 | flags |= FAULT_FLAG_USER; | ||
91 | retry: | ||
92 | down_read(&mm->mmap_sem); | ||
93 | |||
94 | vma = find_vma(mm, address); | ||
95 | if (!vma) | ||
96 | goto bad_area; | ||
97 | if (vma->vm_start <= address) | ||
98 | goto good_area; | ||
99 | if (!(vma->vm_flags & VM_GROWSDOWN)) | ||
100 | goto bad_area; | ||
101 | if (expand_stack(vma, address)) | ||
102 | goto bad_area; | ||
103 | |||
104 | /* | ||
105 | * Ok, we have a good vm_area for this memory access, so we | ||
106 | * can handle it... | ||
107 | */ | ||
108 | good_area: | ||
109 | code = SEGV_ACCERR; | ||
110 | |||
111 | switch (ecr) { | ||
112 | case ECR_PROTECTION_X: | ||
113 | case ECR_TLB_MISS_X: | ||
114 | if (!(vma->vm_flags & VM_EXEC)) | ||
115 | goto bad_area; | ||
116 | break; | ||
117 | case ECR_PROTECTION_R: | ||
118 | case ECR_TLB_MISS_R: | ||
119 | if (!(vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC))) | ||
120 | goto bad_area; | ||
121 | break; | ||
122 | case ECR_PROTECTION_W: | ||
123 | case ECR_TLB_MISS_W: | ||
124 | if (!(vma->vm_flags & VM_WRITE)) | ||
125 | goto bad_area; | ||
126 | flags |= FAULT_FLAG_WRITE; | ||
127 | break; | ||
128 | default: | ||
129 | panic("Unhandled case %lu in do_page_fault!", ecr); | ||
130 | } | ||
131 | |||
132 | /* | ||
133 | * If for any reason at all we couldn't handle the fault, make | ||
134 | * sure we exit gracefully rather than endlessly redo the | ||
135 | * fault. | ||
136 | */ | ||
137 | fault = handle_mm_fault(vma, address, flags); | ||
138 | |||
139 | if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) | ||
140 | return; | ||
141 | |||
142 | if (unlikely(fault & VM_FAULT_ERROR)) { | ||
143 | if (fault & VM_FAULT_OOM) | ||
144 | goto out_of_memory; | ||
145 | else if (fault & VM_FAULT_SIGSEGV) | ||
146 | goto bad_area; | ||
147 | else if (fault & VM_FAULT_SIGBUS) | ||
148 | goto do_sigbus; | ||
149 | BUG(); | ||
150 | } | ||
151 | |||
152 | if (flags & FAULT_FLAG_ALLOW_RETRY) { | ||
153 | if (fault & VM_FAULT_MAJOR) | ||
154 | tsk->maj_flt++; | ||
155 | else | ||
156 | tsk->min_flt++; | ||
157 | if (fault & VM_FAULT_RETRY) { | ||
158 | flags &= ~FAULT_FLAG_ALLOW_RETRY; | ||
159 | flags |= FAULT_FLAG_TRIED; | ||
160 | |||
161 | /* | ||
162 | * No need to up_read(&mm->mmap_sem) as we would have | ||
163 | * already released it in __lock_page_or_retry() in | ||
164 | * mm/filemap.c. | ||
165 | */ | ||
166 | goto retry; | ||
167 | } | ||
168 | } | ||
169 | |||
170 | up_read(&mm->mmap_sem); | ||
171 | return; | ||
172 | |||
173 | /* | ||
174 | * Something tried to access memory that isn't in our memory | ||
175 | * map. Fix it, but check if it's kernel or user first... | ||
176 | */ | ||
177 | bad_area: | ||
178 | up_read(&mm->mmap_sem); | ||
179 | |||
180 | if (user_mode(regs)) { | ||
181 | if (exception_trace && printk_ratelimit()) | ||
182 | printk("%s%s[%d]: segfault at %08lx pc %08lx " | ||
183 | "sp %08lx ecr %lu\n", | ||
184 | is_global_init(tsk) ? KERN_EMERG : KERN_INFO, | ||
185 | tsk->comm, tsk->pid, address, regs->pc, | ||
186 | regs->sp, ecr); | ||
187 | _exception(SIGSEGV, regs, code, address); | ||
188 | return; | ||
189 | } | ||
190 | |||
191 | no_context: | ||
192 | /* Are we prepared to handle this kernel fault? */ | ||
193 | fixup = search_exception_tables(regs->pc); | ||
194 | if (fixup) { | ||
195 | regs->pc = fixup->fixup; | ||
196 | return; | ||
197 | } | ||
198 | |||
199 | /* | ||
200 | * Oops. The kernel tried to access some bad page. We'll have | ||
201 | * to terminate things with extreme prejudice. | ||
202 | */ | ||
203 | if (address < PAGE_SIZE) | ||
204 | printk(KERN_ALERT | ||
205 | "Unable to handle kernel NULL pointer dereference"); | ||
206 | else | ||
207 | printk(KERN_ALERT | ||
208 | "Unable to handle kernel paging request"); | ||
209 | printk(" at virtual address %08lx\n", address); | ||
210 | |||
211 | page = sysreg_read(PTBR); | ||
212 | printk(KERN_ALERT "ptbr = %08lx", page); | ||
213 | if (address >= TASK_SIZE) | ||
214 | page = (unsigned long)swapper_pg_dir; | ||
215 | if (page) { | ||
216 | page = ((unsigned long *)page)[address >> 22]; | ||
217 | printk(" pgd = %08lx", page); | ||
218 | if (page & _PAGE_PRESENT) { | ||
219 | page &= PAGE_MASK; | ||
220 | address &= 0x003ff000; | ||
221 | page = ((unsigned long *)__va(page))[address >> PAGE_SHIFT]; | ||
222 | printk(" pte = %08lx", page); | ||
223 | } | ||
224 | } | ||
225 | printk("\n"); | ||
226 | die("Kernel access of bad area", regs, signr); | ||
227 | return; | ||
228 | |||
229 | /* | ||
230 | * We ran out of memory, or some other thing happened to us | ||
231 | * that made us unable to handle the page fault gracefully. | ||
232 | */ | ||
233 | out_of_memory: | ||
234 | up_read(&mm->mmap_sem); | ||
235 | if (!user_mode(regs)) | ||
236 | goto no_context; | ||
237 | pagefault_out_of_memory(); | ||
238 | return; | ||
239 | |||
240 | do_sigbus: | ||
241 | up_read(&mm->mmap_sem); | ||
242 | |||
243 | /* Kernel mode? Handle exceptions or die */ | ||
244 | signr = SIGBUS; | ||
245 | code = BUS_ADRERR; | ||
246 | if (!user_mode(regs)) | ||
247 | goto no_context; | ||
248 | |||
249 | if (exception_trace) | ||
250 | printk("%s%s[%d]: bus error at %08lx pc %08lx " | ||
251 | "sp %08lx ecr %lu\n", | ||
252 | is_global_init(tsk) ? KERN_EMERG : KERN_INFO, | ||
253 | tsk->comm, tsk->pid, address, regs->pc, | ||
254 | regs->sp, ecr); | ||
255 | |||
256 | _exception(SIGBUS, regs, BUS_ADRERR, address); | ||
257 | } | ||
258 | |||
259 | asmlinkage void do_bus_error(unsigned long addr, int write_access, | ||
260 | struct pt_regs *regs) | ||
261 | { | ||
262 | printk(KERN_ALERT | ||
263 | "Bus error at physical address 0x%08lx (%s access)\n", | ||
264 | addr, write_access ? "write" : "read"); | ||
265 | printk(KERN_INFO "DTLB dump:\n"); | ||
266 | dump_dtlb(); | ||
267 | die("Bus Error", regs, SIGKILL); | ||
268 | } | ||
diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c deleted file mode 100644 index def5391d927a..000000000000 --- a/arch/avr32/mm/init.c +++ /dev/null | |||
@@ -1,125 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/gfp.h> | ||
11 | #include <linux/mm.h> | ||
12 | #include <linux/swap.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/mmzone.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/bootmem.h> | ||
17 | #include <linux/pagemap.h> | ||
18 | #include <linux/nodemask.h> | ||
19 | |||
20 | #include <asm/page.h> | ||
21 | #include <asm/mmu_context.h> | ||
22 | #include <asm/tlb.h> | ||
23 | #include <asm/io.h> | ||
24 | #include <asm/dma.h> | ||
25 | #include <asm/setup.h> | ||
26 | #include <asm/sections.h> | ||
27 | |||
28 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_data; | ||
29 | |||
30 | struct page *empty_zero_page; | ||
31 | EXPORT_SYMBOL(empty_zero_page); | ||
32 | |||
33 | /* | ||
34 | * Cache of MMU context last used. | ||
35 | */ | ||
36 | unsigned long mmu_context_cache = NO_CONTEXT; | ||
37 | |||
38 | /* | ||
39 | * paging_init() sets up the page tables | ||
40 | * | ||
41 | * This routine also unmaps the page at virtual kernel address 0, so | ||
42 | * that we can trap those pesky NULL-reference errors in the kernel. | ||
43 | */ | ||
44 | void __init paging_init(void) | ||
45 | { | ||
46 | extern unsigned long _evba; | ||
47 | void *zero_page; | ||
48 | int nid; | ||
49 | |||
50 | /* | ||
51 | * Make sure we can handle exceptions before enabling | ||
52 | * paging. Not that we should ever _get_ any exceptions this | ||
53 | * early, but you never know... | ||
54 | */ | ||
55 | printk("Exception vectors start at %p\n", &_evba); | ||
56 | sysreg_write(EVBA, (unsigned long)&_evba); | ||
57 | |||
58 | /* | ||
59 | * Since we are ready to handle exceptions now, we should let | ||
60 | * the CPU generate them... | ||
61 | */ | ||
62 | __asm__ __volatile__ ("csrf %0" : : "i"(SR_EM_BIT)); | ||
63 | |||
64 | /* | ||
65 | * Allocate the zero page. The allocator will panic if it | ||
66 | * can't satisfy the request, so no need to check. | ||
67 | */ | ||
68 | zero_page = alloc_bootmem_low_pages_node(NODE_DATA(0), | ||
69 | PAGE_SIZE); | ||
70 | |||
71 | sysreg_write(PTBR, (unsigned long)swapper_pg_dir); | ||
72 | enable_mmu(); | ||
73 | printk ("CPU: Paging enabled\n"); | ||
74 | |||
75 | for_each_online_node(nid) { | ||
76 | pg_data_t *pgdat = NODE_DATA(nid); | ||
77 | unsigned long zones_size[MAX_NR_ZONES]; | ||
78 | unsigned long low, start_pfn; | ||
79 | |||
80 | start_pfn = pgdat->bdata->node_min_pfn; | ||
81 | low = pgdat->bdata->node_low_pfn; | ||
82 | |||
83 | memset(zones_size, 0, sizeof(zones_size)); | ||
84 | zones_size[ZONE_NORMAL] = low - start_pfn; | ||
85 | |||
86 | printk("Node %u: start_pfn = 0x%lx, low = 0x%lx\n", | ||
87 | nid, start_pfn, low); | ||
88 | |||
89 | free_area_init_node(nid, zones_size, start_pfn, NULL); | ||
90 | |||
91 | printk("Node %u: mem_map starts at %p\n", | ||
92 | pgdat->node_id, pgdat->node_mem_map); | ||
93 | } | ||
94 | |||
95 | mem_map = NODE_DATA(0)->node_mem_map; | ||
96 | |||
97 | empty_zero_page = virt_to_page(zero_page); | ||
98 | flush_dcache_page(empty_zero_page); | ||
99 | } | ||
100 | |||
101 | void __init mem_init(void) | ||
102 | { | ||
103 | pg_data_t *pgdat; | ||
104 | |||
105 | high_memory = NULL; | ||
106 | for_each_online_pgdat(pgdat) | ||
107 | high_memory = max_t(void *, high_memory, | ||
108 | __va(pgdat_end_pfn(pgdat) << PAGE_SHIFT)); | ||
109 | |||
110 | set_max_mapnr(MAP_NR(high_memory)); | ||
111 | free_all_bootmem(); | ||
112 | mem_init_print_info(NULL); | ||
113 | } | ||
114 | |||
115 | void free_initmem(void) | ||
116 | { | ||
117 | free_initmem_default(-1); | ||
118 | } | ||
119 | |||
120 | #ifdef CONFIG_BLK_DEV_INITRD | ||
121 | void free_initrd_mem(unsigned long start, unsigned long end) | ||
122 | { | ||
123 | free_reserved_area((void *)start, (void *)end, -1, "initrd"); | ||
124 | } | ||
125 | #endif | ||
diff --git a/arch/avr32/mm/ioremap.c b/arch/avr32/mm/ioremap.c deleted file mode 100644 index 7def0d84cec6..000000000000 --- a/arch/avr32/mm/ioremap.c +++ /dev/null | |||
@@ -1,93 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/vmalloc.h> | ||
9 | #include <linux/mm.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/io.h> | ||
12 | #include <linux/slab.h> | ||
13 | |||
14 | #include <asm/pgtable.h> | ||
15 | #include <asm/addrspace.h> | ||
16 | |||
17 | /* | ||
18 | * Re-map an arbitrary physical address space into the kernel virtual | ||
19 | * address space. Needed when the kernel wants to access physical | ||
20 | * memory directly. | ||
21 | */ | ||
22 | void __iomem *__ioremap(unsigned long phys_addr, size_t size, | ||
23 | unsigned long flags) | ||
24 | { | ||
25 | unsigned long addr; | ||
26 | struct vm_struct *area; | ||
27 | unsigned long offset, last_addr; | ||
28 | pgprot_t prot; | ||
29 | |||
30 | /* | ||
31 | * Check if we can simply use the P4 segment. This area is | ||
32 | * uncacheable, so if caching/buffering is requested, we can't | ||
33 | * use it. | ||
34 | */ | ||
35 | if ((phys_addr >= P4SEG) && (flags == 0)) | ||
36 | return (void __iomem *)phys_addr; | ||
37 | |||
38 | /* Don't allow wraparound or zero size */ | ||
39 | last_addr = phys_addr + size - 1; | ||
40 | if (!size || last_addr < phys_addr) | ||
41 | return NULL; | ||
42 | |||
43 | /* | ||
44 | * XXX: When mapping regular RAM, we'd better make damn sure | ||
45 | * it's never used for anything else. But this is really the | ||
46 | * caller's responsibility... | ||
47 | */ | ||
48 | if (PHYSADDR(P2SEGADDR(phys_addr)) == phys_addr) | ||
49 | return (void __iomem *)P2SEGADDR(phys_addr); | ||
50 | |||
51 | /* Mappings have to be page-aligned */ | ||
52 | offset = phys_addr & ~PAGE_MASK; | ||
53 | phys_addr &= PAGE_MASK; | ||
54 | size = PAGE_ALIGN(last_addr + 1) - phys_addr; | ||
55 | |||
56 | prot = __pgprot(_PAGE_PRESENT | _PAGE_GLOBAL | _PAGE_RW | _PAGE_DIRTY | ||
57 | | _PAGE_ACCESSED | _PAGE_TYPE_SMALL | flags); | ||
58 | |||
59 | /* | ||
60 | * Ok, go for it.. | ||
61 | */ | ||
62 | area = get_vm_area(size, VM_IOREMAP); | ||
63 | if (!area) | ||
64 | return NULL; | ||
65 | area->phys_addr = phys_addr; | ||
66 | addr = (unsigned long )area->addr; | ||
67 | if (ioremap_page_range(addr, addr + size, phys_addr, prot)) { | ||
68 | vunmap((void *)addr); | ||
69 | return NULL; | ||
70 | } | ||
71 | |||
72 | return (void __iomem *)(offset + (char *)addr); | ||
73 | } | ||
74 | EXPORT_SYMBOL(__ioremap); | ||
75 | |||
76 | void __iounmap(void __iomem *addr) | ||
77 | { | ||
78 | struct vm_struct *p; | ||
79 | |||
80 | if ((unsigned long)addr >= P4SEG) | ||
81 | return; | ||
82 | if (PXSEG(addr) == P2SEG) | ||
83 | return; | ||
84 | |||
85 | p = remove_vm_area((void *)(PAGE_MASK & (unsigned long __force)addr)); | ||
86 | if (unlikely(!p)) { | ||
87 | printk (KERN_ERR "iounmap: bad address %p\n", addr); | ||
88 | return; | ||
89 | } | ||
90 | |||
91 | kfree (p); | ||
92 | } | ||
93 | EXPORT_SYMBOL(__iounmap); | ||
diff --git a/arch/avr32/mm/tlb.c b/arch/avr32/mm/tlb.c deleted file mode 100644 index 0da23109f817..000000000000 --- a/arch/avr32/mm/tlb.c +++ /dev/null | |||
@@ -1,375 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 TLB operations | ||
3 | * | ||
4 | * Copyright (C) 2004-2006 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/mm.h> | ||
11 | |||
12 | #include <asm/mmu_context.h> | ||
13 | |||
14 | /* TODO: Get the correct number from the CONFIG1 system register */ | ||
15 | #define NR_TLB_ENTRIES 32 | ||
16 | |||
17 | static void show_dtlb_entry(unsigned int index) | ||
18 | { | ||
19 | u32 tlbehi, tlbehi_save, tlbelo, mmucr, mmucr_save; | ||
20 | unsigned long flags; | ||
21 | |||
22 | local_irq_save(flags); | ||
23 | mmucr_save = sysreg_read(MMUCR); | ||
24 | tlbehi_save = sysreg_read(TLBEHI); | ||
25 | mmucr = SYSREG_BFINS(DRP, index, mmucr_save); | ||
26 | sysreg_write(MMUCR, mmucr); | ||
27 | |||
28 | __builtin_tlbr(); | ||
29 | cpu_sync_pipeline(); | ||
30 | |||
31 | tlbehi = sysreg_read(TLBEHI); | ||
32 | tlbelo = sysreg_read(TLBELO); | ||
33 | |||
34 | printk("%2u: %c %c %02x %05x %05x %o %o %c %c %c %c\n", | ||
35 | index, | ||
36 | SYSREG_BFEXT(TLBEHI_V, tlbehi) ? '1' : '0', | ||
37 | SYSREG_BFEXT(G, tlbelo) ? '1' : '0', | ||
38 | SYSREG_BFEXT(ASID, tlbehi), | ||
39 | SYSREG_BFEXT(VPN, tlbehi) >> 2, | ||
40 | SYSREG_BFEXT(PFN, tlbelo) >> 2, | ||
41 | SYSREG_BFEXT(AP, tlbelo), | ||
42 | SYSREG_BFEXT(SZ, tlbelo), | ||
43 | SYSREG_BFEXT(TLBELO_C, tlbelo) ? 'C' : ' ', | ||
44 | SYSREG_BFEXT(B, tlbelo) ? 'B' : ' ', | ||
45 | SYSREG_BFEXT(W, tlbelo) ? 'W' : ' ', | ||
46 | SYSREG_BFEXT(TLBELO_D, tlbelo) ? 'D' : ' '); | ||
47 | |||
48 | sysreg_write(MMUCR, mmucr_save); | ||
49 | sysreg_write(TLBEHI, tlbehi_save); | ||
50 | cpu_sync_pipeline(); | ||
51 | local_irq_restore(flags); | ||
52 | } | ||
53 | |||
54 | void dump_dtlb(void) | ||
55 | { | ||
56 | unsigned int i; | ||
57 | |||
58 | printk("ID V G ASID VPN PFN AP SZ C B W D\n"); | ||
59 | for (i = 0; i < NR_TLB_ENTRIES; i++) | ||
60 | show_dtlb_entry(i); | ||
61 | } | ||
62 | |||
63 | static void update_dtlb(unsigned long address, pte_t pte) | ||
64 | { | ||
65 | u32 tlbehi; | ||
66 | u32 mmucr; | ||
67 | |||
68 | /* | ||
69 | * We're not changing the ASID here, so no need to flush the | ||
70 | * pipeline. | ||
71 | */ | ||
72 | tlbehi = sysreg_read(TLBEHI); | ||
73 | tlbehi = SYSREG_BF(ASID, SYSREG_BFEXT(ASID, tlbehi)); | ||
74 | tlbehi |= address & MMU_VPN_MASK; | ||
75 | tlbehi |= SYSREG_BIT(TLBEHI_V); | ||
76 | sysreg_write(TLBEHI, tlbehi); | ||
77 | |||
78 | /* Does this mapping already exist? */ | ||
79 | __builtin_tlbs(); | ||
80 | mmucr = sysreg_read(MMUCR); | ||
81 | |||
82 | if (mmucr & SYSREG_BIT(MMUCR_N)) { | ||
83 | /* Not found -- pick a not-recently-accessed entry */ | ||
84 | unsigned int rp; | ||
85 | u32 tlbar = sysreg_read(TLBARLO); | ||
86 | |||
87 | rp = 32 - fls(tlbar); | ||
88 | if (rp == 32) { | ||
89 | rp = 0; | ||
90 | sysreg_write(TLBARLO, -1L); | ||
91 | } | ||
92 | |||
93 | mmucr = SYSREG_BFINS(DRP, rp, mmucr); | ||
94 | sysreg_write(MMUCR, mmucr); | ||
95 | } | ||
96 | |||
97 | sysreg_write(TLBELO, pte_val(pte) & _PAGE_FLAGS_HARDWARE_MASK); | ||
98 | |||
99 | /* Let's go */ | ||
100 | __builtin_tlbw(); | ||
101 | } | ||
102 | |||
103 | void update_mmu_cache(struct vm_area_struct *vma, | ||
104 | unsigned long address, pte_t *ptep) | ||
105 | { | ||
106 | unsigned long flags; | ||
107 | |||
108 | /* ptrace may call this routine */ | ||
109 | if (vma && current->active_mm != vma->vm_mm) | ||
110 | return; | ||
111 | |||
112 | local_irq_save(flags); | ||
113 | update_dtlb(address, *ptep); | ||
114 | local_irq_restore(flags); | ||
115 | } | ||
116 | |||
117 | static void __flush_tlb_page(unsigned long asid, unsigned long page) | ||
118 | { | ||
119 | u32 mmucr, tlbehi; | ||
120 | |||
121 | /* | ||
122 | * Caller is responsible for masking out non-PFN bits in page | ||
123 | * and changing the current ASID if necessary. This means that | ||
124 | * we don't need to flush the pipeline after writing TLBEHI. | ||
125 | */ | ||
126 | tlbehi = page | asid; | ||
127 | sysreg_write(TLBEHI, tlbehi); | ||
128 | |||
129 | __builtin_tlbs(); | ||
130 | mmucr = sysreg_read(MMUCR); | ||
131 | |||
132 | if (!(mmucr & SYSREG_BIT(MMUCR_N))) { | ||
133 | unsigned int entry; | ||
134 | u32 tlbarlo; | ||
135 | |||
136 | /* Clear the "valid" bit */ | ||
137 | sysreg_write(TLBEHI, tlbehi); | ||
138 | |||
139 | /* mark the entry as "not accessed" */ | ||
140 | entry = SYSREG_BFEXT(DRP, mmucr); | ||
141 | tlbarlo = sysreg_read(TLBARLO); | ||
142 | tlbarlo |= (0x80000000UL >> entry); | ||
143 | sysreg_write(TLBARLO, tlbarlo); | ||
144 | |||
145 | /* update the entry with valid bit clear */ | ||
146 | __builtin_tlbw(); | ||
147 | } | ||
148 | } | ||
149 | |||
150 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) | ||
151 | { | ||
152 | if (vma->vm_mm && vma->vm_mm->context != NO_CONTEXT) { | ||
153 | unsigned long flags, asid; | ||
154 | unsigned long saved_asid = MMU_NO_ASID; | ||
155 | |||
156 | asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK; | ||
157 | page &= PAGE_MASK; | ||
158 | |||
159 | local_irq_save(flags); | ||
160 | if (vma->vm_mm != current->mm) { | ||
161 | saved_asid = get_asid(); | ||
162 | set_asid(asid); | ||
163 | } | ||
164 | |||
165 | __flush_tlb_page(asid, page); | ||
166 | |||
167 | if (saved_asid != MMU_NO_ASID) | ||
168 | set_asid(saved_asid); | ||
169 | local_irq_restore(flags); | ||
170 | } | ||
171 | } | ||
172 | |||
173 | void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | ||
174 | unsigned long end) | ||
175 | { | ||
176 | struct mm_struct *mm = vma->vm_mm; | ||
177 | |||
178 | if (mm->context != NO_CONTEXT) { | ||
179 | unsigned long flags; | ||
180 | int size; | ||
181 | |||
182 | local_irq_save(flags); | ||
183 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | ||
184 | |||
185 | if (size > (MMU_DTLB_ENTRIES / 4)) { /* Too many entries to flush */ | ||
186 | mm->context = NO_CONTEXT; | ||
187 | if (mm == current->mm) | ||
188 | activate_context(mm); | ||
189 | } else { | ||
190 | unsigned long asid; | ||
191 | unsigned long saved_asid; | ||
192 | |||
193 | asid = mm->context & MMU_CONTEXT_ASID_MASK; | ||
194 | saved_asid = MMU_NO_ASID; | ||
195 | |||
196 | start &= PAGE_MASK; | ||
197 | end += (PAGE_SIZE - 1); | ||
198 | end &= PAGE_MASK; | ||
199 | |||
200 | if (mm != current->mm) { | ||
201 | saved_asid = get_asid(); | ||
202 | set_asid(asid); | ||
203 | } | ||
204 | |||
205 | while (start < end) { | ||
206 | __flush_tlb_page(asid, start); | ||
207 | start += PAGE_SIZE; | ||
208 | } | ||
209 | if (saved_asid != MMU_NO_ASID) | ||
210 | set_asid(saved_asid); | ||
211 | } | ||
212 | local_irq_restore(flags); | ||
213 | } | ||
214 | } | ||
215 | |||
216 | /* | ||
217 | * This function depends on the pages to be flushed having the G | ||
218 | * (global) bit set in their pte. This is true for all | ||
219 | * PAGE_KERNEL(_RO) pages. | ||
220 | */ | ||
221 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) | ||
222 | { | ||
223 | unsigned long flags; | ||
224 | int size; | ||
225 | |||
226 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | ||
227 | if (size > (MMU_DTLB_ENTRIES / 4)) { /* Too many entries to flush */ | ||
228 | flush_tlb_all(); | ||
229 | } else { | ||
230 | unsigned long asid; | ||
231 | |||
232 | local_irq_save(flags); | ||
233 | asid = get_asid(); | ||
234 | |||
235 | start &= PAGE_MASK; | ||
236 | end += (PAGE_SIZE - 1); | ||
237 | end &= PAGE_MASK; | ||
238 | |||
239 | while (start < end) { | ||
240 | __flush_tlb_page(asid, start); | ||
241 | start += PAGE_SIZE; | ||
242 | } | ||
243 | local_irq_restore(flags); | ||
244 | } | ||
245 | } | ||
246 | |||
247 | void flush_tlb_mm(struct mm_struct *mm) | ||
248 | { | ||
249 | /* Invalidate all TLB entries of this process by getting a new ASID */ | ||
250 | if (mm->context != NO_CONTEXT) { | ||
251 | unsigned long flags; | ||
252 | |||
253 | local_irq_save(flags); | ||
254 | mm->context = NO_CONTEXT; | ||
255 | if (mm == current->mm) | ||
256 | activate_context(mm); | ||
257 | local_irq_restore(flags); | ||
258 | } | ||
259 | } | ||
260 | |||
261 | void flush_tlb_all(void) | ||
262 | { | ||
263 | unsigned long flags; | ||
264 | |||
265 | local_irq_save(flags); | ||
266 | sysreg_write(MMUCR, sysreg_read(MMUCR) | SYSREG_BIT(MMUCR_I)); | ||
267 | local_irq_restore(flags); | ||
268 | } | ||
269 | |||
270 | #ifdef CONFIG_PROC_FS | ||
271 | |||
272 | #include <linux/seq_file.h> | ||
273 | #include <linux/proc_fs.h> | ||
274 | #include <linux/init.h> | ||
275 | |||
276 | static void *tlb_start(struct seq_file *tlb, loff_t *pos) | ||
277 | { | ||
278 | static unsigned long tlb_index; | ||
279 | |||
280 | if (*pos >= NR_TLB_ENTRIES) | ||
281 | return NULL; | ||
282 | |||
283 | tlb_index = 0; | ||
284 | return &tlb_index; | ||
285 | } | ||
286 | |||
287 | static void *tlb_next(struct seq_file *tlb, void *v, loff_t *pos) | ||
288 | { | ||
289 | unsigned long *index = v; | ||
290 | |||
291 | if (*index >= NR_TLB_ENTRIES - 1) | ||
292 | return NULL; | ||
293 | |||
294 | ++*pos; | ||
295 | ++*index; | ||
296 | return index; | ||
297 | } | ||
298 | |||
299 | static void tlb_stop(struct seq_file *tlb, void *v) | ||
300 | { | ||
301 | |||
302 | } | ||
303 | |||
304 | static int tlb_show(struct seq_file *tlb, void *v) | ||
305 | { | ||
306 | unsigned int tlbehi, tlbehi_save, tlbelo, mmucr, mmucr_save; | ||
307 | unsigned long flags; | ||
308 | unsigned long *index = v; | ||
309 | |||
310 | if (*index == 0) | ||
311 | seq_puts(tlb, "ID V G ASID VPN PFN AP SZ C B W D\n"); | ||
312 | |||
313 | BUG_ON(*index >= NR_TLB_ENTRIES); | ||
314 | |||
315 | local_irq_save(flags); | ||
316 | mmucr_save = sysreg_read(MMUCR); | ||
317 | tlbehi_save = sysreg_read(TLBEHI); | ||
318 | mmucr = SYSREG_BFINS(DRP, *index, mmucr_save); | ||
319 | sysreg_write(MMUCR, mmucr); | ||
320 | |||
321 | /* TLBR might change the ASID */ | ||
322 | __builtin_tlbr(); | ||
323 | cpu_sync_pipeline(); | ||
324 | |||
325 | tlbehi = sysreg_read(TLBEHI); | ||
326 | tlbelo = sysreg_read(TLBELO); | ||
327 | |||
328 | sysreg_write(MMUCR, mmucr_save); | ||
329 | sysreg_write(TLBEHI, tlbehi_save); | ||
330 | cpu_sync_pipeline(); | ||
331 | local_irq_restore(flags); | ||
332 | |||
333 | seq_printf(tlb, "%2lu: %c %c %02x %05x %05x %o %o %c %c %c %c\n", | ||
334 | *index, | ||
335 | SYSREG_BFEXT(TLBEHI_V, tlbehi) ? '1' : '0', | ||
336 | SYSREG_BFEXT(G, tlbelo) ? '1' : '0', | ||
337 | SYSREG_BFEXT(ASID, tlbehi), | ||
338 | SYSREG_BFEXT(VPN, tlbehi) >> 2, | ||
339 | SYSREG_BFEXT(PFN, tlbelo) >> 2, | ||
340 | SYSREG_BFEXT(AP, tlbelo), | ||
341 | SYSREG_BFEXT(SZ, tlbelo), | ||
342 | SYSREG_BFEXT(TLBELO_C, tlbelo) ? '1' : '0', | ||
343 | SYSREG_BFEXT(B, tlbelo) ? '1' : '0', | ||
344 | SYSREG_BFEXT(W, tlbelo) ? '1' : '0', | ||
345 | SYSREG_BFEXT(TLBELO_D, tlbelo) ? '1' : '0'); | ||
346 | |||
347 | return 0; | ||
348 | } | ||
349 | |||
350 | static const struct seq_operations tlb_ops = { | ||
351 | .start = tlb_start, | ||
352 | .next = tlb_next, | ||
353 | .stop = tlb_stop, | ||
354 | .show = tlb_show, | ||
355 | }; | ||
356 | |||
357 | static int tlb_open(struct inode *inode, struct file *file) | ||
358 | { | ||
359 | return seq_open(file, &tlb_ops); | ||
360 | } | ||
361 | |||
362 | static const struct file_operations proc_tlb_operations = { | ||
363 | .open = tlb_open, | ||
364 | .read = seq_read, | ||
365 | .llseek = seq_lseek, | ||
366 | .release = seq_release, | ||
367 | }; | ||
368 | |||
369 | static int __init proctlb_init(void) | ||
370 | { | ||
371 | proc_create("tlb", 0, NULL, &proc_tlb_operations); | ||
372 | return 0; | ||
373 | } | ||
374 | late_initcall(proctlb_init); | ||
375 | #endif /* CONFIG_PROC_FS */ | ||
diff --git a/arch/avr32/oprofile/Makefile b/arch/avr32/oprofile/Makefile deleted file mode 100644 index e0eb520e0287..000000000000 --- a/arch/avr32/oprofile/Makefile +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | obj-$(CONFIG_OPROFILE) += oprofile.o | ||
2 | |||
3 | oprofile-y := $(addprefix ../../../drivers/oprofile/, \ | ||
4 | oprof.o cpu_buffer.o buffer_sync.o \ | ||
5 | event_buffer.o oprofile_files.o \ | ||
6 | oprofilefs.o oprofile_stats.o \ | ||
7 | timer_int.o) | ||
8 | oprofile-y += op_model_avr32.o backtrace.o | ||
diff --git a/arch/avr32/oprofile/backtrace.c b/arch/avr32/oprofile/backtrace.c deleted file mode 100644 index 29cf2f191bfd..000000000000 --- a/arch/avr32/oprofile/backtrace.c +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 specific backtracing code for oprofile | ||
3 | * | ||
4 | * Copyright 2008 Weinmann GmbH | ||
5 | * | ||
6 | * Author: Nikolaus Voss <n.voss@weinmann.de> | ||
7 | * | ||
8 | * Based on i386 oprofile backtrace code by John Levon and David Smith | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/oprofile.h> | ||
17 | #include <linux/ptrace.h> | ||
18 | #include <linux/uaccess.h> | ||
19 | |||
20 | /* The first two words of each frame on the stack look like this if we have | ||
21 | * frame pointers */ | ||
22 | struct frame_head { | ||
23 | unsigned long lr; | ||
24 | struct frame_head *fp; | ||
25 | }; | ||
26 | |||
27 | /* copied from arch/avr32/kernel/process.c */ | ||
28 | static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p) | ||
29 | { | ||
30 | return (p > (unsigned long)tinfo) | ||
31 | && (p < (unsigned long)tinfo + THREAD_SIZE - 3); | ||
32 | } | ||
33 | |||
34 | /* copied from arch/x86/oprofile/backtrace.c */ | ||
35 | static struct frame_head *dump_user_backtrace(struct frame_head *head) | ||
36 | { | ||
37 | struct frame_head bufhead[2]; | ||
38 | |||
39 | /* Also check accessibility of one struct frame_head beyond */ | ||
40 | if (!access_ok(VERIFY_READ, head, sizeof(bufhead))) | ||
41 | return NULL; | ||
42 | if (__copy_from_user_inatomic(bufhead, head, sizeof(bufhead))) | ||
43 | return NULL; | ||
44 | |||
45 | oprofile_add_trace(bufhead[0].lr); | ||
46 | |||
47 | /* frame pointers should strictly progress back up the stack | ||
48 | * (towards higher addresses) */ | ||
49 | if (bufhead[0].fp <= head) | ||
50 | return NULL; | ||
51 | |||
52 | return bufhead[0].fp; | ||
53 | } | ||
54 | |||
55 | void avr32_backtrace(struct pt_regs * const regs, unsigned int depth) | ||
56 | { | ||
57 | /* Get first frame pointer */ | ||
58 | struct frame_head *head = (struct frame_head *)(regs->r7); | ||
59 | |||
60 | if (!user_mode(regs)) { | ||
61 | #ifdef CONFIG_FRAME_POINTER | ||
62 | /* | ||
63 | * Traverse the kernel stack from frame to frame up to | ||
64 | * "depth" steps. | ||
65 | */ | ||
66 | while (depth-- && valid_stack_ptr(task_thread_info(current), | ||
67 | (unsigned long)head)) { | ||
68 | oprofile_add_trace(head->lr); | ||
69 | if (head->fp <= head) | ||
70 | break; | ||
71 | head = head->fp; | ||
72 | } | ||
73 | #endif | ||
74 | } else { | ||
75 | /* Assume we have frame pointers in user mode process */ | ||
76 | while (depth-- && head) | ||
77 | head = dump_user_backtrace(head); | ||
78 | } | ||
79 | } | ||
80 | |||
81 | |||
diff --git a/arch/avr32/oprofile/op_model_avr32.c b/arch/avr32/oprofile/op_model_avr32.c deleted file mode 100644 index 08308be2c02c..000000000000 --- a/arch/avr32/oprofile/op_model_avr32.c +++ /dev/null | |||
@@ -1,236 +0,0 @@ | |||
1 | /* | ||
2 | * AVR32 Performance Counter Driver | ||
3 | * | ||
4 | * Copyright (C) 2005-2007 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * Author: Ronny Pedersen | ||
11 | */ | ||
12 | #include <linux/errno.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/irq.h> | ||
15 | #include <linux/oprofile.h> | ||
16 | #include <linux/sched.h> | ||
17 | #include <linux/types.h> | ||
18 | |||
19 | #include <asm/sysreg.h> | ||
20 | |||
21 | #define AVR32_PERFCTR_IRQ_GROUP 0 | ||
22 | #define AVR32_PERFCTR_IRQ_LINE 1 | ||
23 | |||
24 | void avr32_backtrace(struct pt_regs * const regs, unsigned int depth); | ||
25 | |||
26 | enum { PCCNT, PCNT0, PCNT1, NR_counter }; | ||
27 | |||
28 | struct avr32_perf_counter { | ||
29 | unsigned long enabled; | ||
30 | unsigned long event; | ||
31 | unsigned long count; | ||
32 | unsigned long unit_mask; | ||
33 | unsigned long kernel; | ||
34 | unsigned long user; | ||
35 | |||
36 | u32 ie_mask; | ||
37 | u32 flag_mask; | ||
38 | }; | ||
39 | |||
40 | static struct avr32_perf_counter counter[NR_counter] = { | ||
41 | { | ||
42 | .ie_mask = SYSREG_BIT(IEC), | ||
43 | .flag_mask = SYSREG_BIT(FC), | ||
44 | }, { | ||
45 | .ie_mask = SYSREG_BIT(IE0), | ||
46 | .flag_mask = SYSREG_BIT(F0), | ||
47 | }, { | ||
48 | .ie_mask = SYSREG_BIT(IE1), | ||
49 | .flag_mask = SYSREG_BIT(F1), | ||
50 | }, | ||
51 | }; | ||
52 | |||
53 | static void avr32_perf_counter_reset(void) | ||
54 | { | ||
55 | /* Reset all counter and disable/clear all interrupts */ | ||
56 | sysreg_write(PCCR, (SYSREG_BIT(PCCR_R) | ||
57 | | SYSREG_BIT(PCCR_C) | ||
58 | | SYSREG_BIT(FC) | ||
59 | | SYSREG_BIT(F0) | ||
60 | | SYSREG_BIT(F1))); | ||
61 | } | ||
62 | |||
63 | static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id) | ||
64 | { | ||
65 | struct avr32_perf_counter *ctr = dev_id; | ||
66 | struct pt_regs *regs; | ||
67 | u32 pccr; | ||
68 | |||
69 | if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP) | ||
70 | & (1 << AVR32_PERFCTR_IRQ_LINE)))) | ||
71 | return IRQ_NONE; | ||
72 | |||
73 | regs = get_irq_regs(); | ||
74 | pccr = sysreg_read(PCCR); | ||
75 | |||
76 | /* Clear the interrupt flags we're about to handle */ | ||
77 | sysreg_write(PCCR, pccr); | ||
78 | |||
79 | /* PCCNT */ | ||
80 | if (ctr->enabled && (pccr & ctr->flag_mask)) { | ||
81 | sysreg_write(PCCNT, -ctr->count); | ||
82 | oprofile_add_sample(regs, PCCNT); | ||
83 | } | ||
84 | ctr++; | ||
85 | /* PCNT0 */ | ||
86 | if (ctr->enabled && (pccr & ctr->flag_mask)) { | ||
87 | sysreg_write(PCNT0, -ctr->count); | ||
88 | oprofile_add_sample(regs, PCNT0); | ||
89 | } | ||
90 | ctr++; | ||
91 | /* PCNT1 */ | ||
92 | if (ctr->enabled && (pccr & ctr->flag_mask)) { | ||
93 | sysreg_write(PCNT1, -ctr->count); | ||
94 | oprofile_add_sample(regs, PCNT1); | ||
95 | } | ||
96 | |||
97 | return IRQ_HANDLED; | ||
98 | } | ||
99 | |||
100 | static int avr32_perf_counter_create_files(struct dentry *root) | ||
101 | { | ||
102 | struct dentry *dir; | ||
103 | unsigned int i; | ||
104 | char filename[4]; | ||
105 | |||
106 | for (i = 0; i < NR_counter; i++) { | ||
107 | snprintf(filename, sizeof(filename), "%u", i); | ||
108 | dir = oprofilefs_mkdir(root, filename); | ||
109 | |||
110 | oprofilefs_create_ulong(dir, "enabled", | ||
111 | &counter[i].enabled); | ||
112 | oprofilefs_create_ulong(dir, "event", | ||
113 | &counter[i].event); | ||
114 | oprofilefs_create_ulong(dir, "count", | ||
115 | &counter[i].count); | ||
116 | |||
117 | /* Dummy entries */ | ||
118 | oprofilefs_create_ulong(dir, "kernel", | ||
119 | &counter[i].kernel); | ||
120 | oprofilefs_create_ulong(dir, "user", | ||
121 | &counter[i].user); | ||
122 | oprofilefs_create_ulong(dir, "unit_mask", | ||
123 | &counter[i].unit_mask); | ||
124 | } | ||
125 | |||
126 | return 0; | ||
127 | } | ||
128 | |||
129 | static int avr32_perf_counter_setup(void) | ||
130 | { | ||
131 | struct avr32_perf_counter *ctr; | ||
132 | u32 pccr; | ||
133 | int ret; | ||
134 | int i; | ||
135 | |||
136 | pr_debug("avr32_perf_counter_setup\n"); | ||
137 | |||
138 | if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) { | ||
139 | printk(KERN_ERR | ||
140 | "oprofile: setup: perf counter already enabled\n"); | ||
141 | return -EBUSY; | ||
142 | } | ||
143 | |||
144 | ret = request_irq(AVR32_PERFCTR_IRQ_GROUP, | ||
145 | avr32_perf_counter_interrupt, IRQF_SHARED, | ||
146 | "oprofile", counter); | ||
147 | if (ret) | ||
148 | return ret; | ||
149 | |||
150 | avr32_perf_counter_reset(); | ||
151 | |||
152 | pccr = 0; | ||
153 | for (i = PCCNT; i < NR_counter; i++) { | ||
154 | ctr = &counter[i]; | ||
155 | if (!ctr->enabled) | ||
156 | continue; | ||
157 | |||
158 | pr_debug("enabling counter %d...\n", i); | ||
159 | |||
160 | pccr |= ctr->ie_mask; | ||
161 | |||
162 | switch (i) { | ||
163 | case PCCNT: | ||
164 | /* PCCNT always counts cycles, so no events */ | ||
165 | sysreg_write(PCCNT, -ctr->count); | ||
166 | break; | ||
167 | case PCNT0: | ||
168 | pccr |= SYSREG_BF(CONF0, ctr->event); | ||
169 | sysreg_write(PCNT0, -ctr->count); | ||
170 | break; | ||
171 | case PCNT1: | ||
172 | pccr |= SYSREG_BF(CONF1, ctr->event); | ||
173 | sysreg_write(PCNT1, -ctr->count); | ||
174 | break; | ||
175 | } | ||
176 | } | ||
177 | |||
178 | pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr); | ||
179 | |||
180 | sysreg_write(PCCR, pccr); | ||
181 | |||
182 | return 0; | ||
183 | } | ||
184 | |||
185 | static void avr32_perf_counter_shutdown(void) | ||
186 | { | ||
187 | pr_debug("avr32_perf_counter_shutdown\n"); | ||
188 | |||
189 | avr32_perf_counter_reset(); | ||
190 | free_irq(AVR32_PERFCTR_IRQ_GROUP, counter); | ||
191 | } | ||
192 | |||
193 | static int avr32_perf_counter_start(void) | ||
194 | { | ||
195 | pr_debug("avr32_perf_counter_start\n"); | ||
196 | |||
197 | sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E)); | ||
198 | |||
199 | return 0; | ||
200 | } | ||
201 | |||
202 | static void avr32_perf_counter_stop(void) | ||
203 | { | ||
204 | pr_debug("avr32_perf_counter_stop\n"); | ||
205 | |||
206 | sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E)); | ||
207 | } | ||
208 | |||
209 | static struct oprofile_operations avr32_perf_counter_ops __initdata = { | ||
210 | .create_files = avr32_perf_counter_create_files, | ||
211 | .setup = avr32_perf_counter_setup, | ||
212 | .shutdown = avr32_perf_counter_shutdown, | ||
213 | .start = avr32_perf_counter_start, | ||
214 | .stop = avr32_perf_counter_stop, | ||
215 | .cpu_type = "avr32", | ||
216 | }; | ||
217 | |||
218 | int __init oprofile_arch_init(struct oprofile_operations *ops) | ||
219 | { | ||
220 | if (!(current_cpu_data.features & AVR32_FEATURE_PCTR)) | ||
221 | return -ENODEV; | ||
222 | |||
223 | memcpy(ops, &avr32_perf_counter_ops, | ||
224 | sizeof(struct oprofile_operations)); | ||
225 | |||
226 | ops->backtrace = avr32_backtrace; | ||
227 | |||
228 | printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n"); | ||
229 | |||
230 | return 0; | ||
231 | } | ||
232 | |||
233 | void oprofile_arch_exit(void) | ||
234 | { | ||
235 | |||
236 | } | ||
diff --git a/include/uapi/linux/elf-em.h b/include/uapi/linux/elf-em.h index cb5d1a519202..9cd1de954c0a 100644 --- a/include/uapi/linux/elf-em.h +++ b/include/uapi/linux/elf-em.h | |||
@@ -42,7 +42,6 @@ | |||
42 | #define EM_TILEGX 191 /* Tilera TILE-Gx */ | 42 | #define EM_TILEGX 191 /* Tilera TILE-Gx */ |
43 | #define EM_BPF 247 /* Linux BPF - in-kernel virtual machine */ | 43 | #define EM_BPF 247 /* Linux BPF - in-kernel virtual machine */ |
44 | #define EM_FRV 0x5441 /* Fujitsu FR-V */ | 44 | #define EM_FRV 0x5441 /* Fujitsu FR-V */ |
45 | #define EM_AVR32 0x18ad /* Atmel AVR32 */ | ||
46 | 45 | ||
47 | /* | 46 | /* |
48 | * This is an interim value that we will use until the committee comes | 47 | * This is an interim value that we will use until the committee comes |