diff options
79 files changed, 777 insertions, 1041 deletions
diff --git a/Documentation/devicetree/bindings/arm/primecell.txt b/Documentation/devicetree/bindings/arm/primecell.txt index 64fc82bc8928..0df6acacfaea 100644 --- a/Documentation/devicetree/bindings/arm/primecell.txt +++ b/Documentation/devicetree/bindings/arm/primecell.txt | |||
@@ -16,14 +16,31 @@ Optional properties: | |||
16 | - clocks : From common clock binding. First clock is phandle to clock for apb | 16 | - clocks : From common clock binding. First clock is phandle to clock for apb |
17 | pclk. Additional clocks are optional and specific to those peripherals. | 17 | pclk. Additional clocks are optional and specific to those peripherals. |
18 | - clock-names : From common clock binding. Shall be "apb_pclk" for first clock. | 18 | - clock-names : From common clock binding. Shall be "apb_pclk" for first clock. |
19 | - dmas : From common DMA binding. If present, refers to one or more dma channels. | ||
20 | - dma-names : From common DMA binding, needs to match the 'dmas' property. | ||
21 | Devices with exactly one receive and transmit channel shall name | ||
22 | these "rx" and "tx", respectively. | ||
23 | - pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt | ||
24 | - pinctrl-names : Names corresponding to the numbered pinctrl states | ||
25 | - interrupts : one or more interrupt specifiers | ||
26 | - interrupt-names : names corresponding to the interrupts properties | ||
19 | 27 | ||
20 | Example: | 28 | Example: |
21 | 29 | ||
22 | serial@fff36000 { | 30 | serial@fff36000 { |
23 | compatible = "arm,pl011", "arm,primecell"; | 31 | compatible = "arm,pl011", "arm,primecell"; |
24 | arm,primecell-periphid = <0x00341011>; | 32 | arm,primecell-periphid = <0x00341011>; |
33 | |||
25 | clocks = <&pclk>; | 34 | clocks = <&pclk>; |
26 | clock-names = "apb_pclk"; | 35 | clock-names = "apb_pclk"; |
27 | 36 | ||
37 | dmas = <&dma-controller 4>, <&dma-controller 5>; | ||
38 | dma-names = "rx", "tx"; | ||
39 | |||
40 | pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>; | ||
41 | pinctrl-1 = <&uart0_sleep_mode>; | ||
42 | pinctrl-names = "default","sleep"; | ||
43 | |||
44 | interrupts = <0 11 0x4>; | ||
28 | }; | 45 | }; |
29 | 46 | ||
diff --git a/Documentation/devicetree/bindings/ata/pata-arasan.txt b/Documentation/devicetree/bindings/ata/pata-arasan.txt index 95ec7f825ede..2aff154be84e 100644 --- a/Documentation/devicetree/bindings/ata/pata-arasan.txt +++ b/Documentation/devicetree/bindings/ata/pata-arasan.txt | |||
@@ -6,6 +6,26 @@ Required properties: | |||
6 | - interrupt-parent: Should be the phandle for the interrupt controller | 6 | - interrupt-parent: Should be the phandle for the interrupt controller |
7 | that services interrupts for this device | 7 | that services interrupts for this device |
8 | - interrupt: Should contain the CF interrupt number | 8 | - interrupt: Should contain the CF interrupt number |
9 | - clock-frequency: Interface clock rate, in Hz, one of | ||
10 | 25000000 | ||
11 | 33000000 | ||
12 | 40000000 | ||
13 | 50000000 | ||
14 | 66000000 | ||
15 | 75000000 | ||
16 | 100000000 | ||
17 | 125000000 | ||
18 | 150000000 | ||
19 | 166000000 | ||
20 | 200000000 | ||
21 | |||
22 | Optional properties: | ||
23 | - arasan,broken-udma: if present, UDMA mode is unusable | ||
24 | - arasan,broken-mwdma: if present, MWDMA mode is unusable | ||
25 | - arasan,broken-pio: if present, PIO mode is unusable | ||
26 | - dmas: one DMA channel, as described in bindings/dma/dma.txt | ||
27 | required unless both UDMA and MWDMA mode are broken | ||
28 | - dma-names: the corresponding channel name, must be "data" | ||
9 | 29 | ||
10 | Example: | 30 | Example: |
11 | 31 | ||
@@ -14,4 +34,6 @@ Example: | |||
14 | reg = <0xfc000000 0x1000>; | 34 | reg = <0xfc000000 0x1000>; |
15 | interrupt-parent = <&vic1>; | 35 | interrupt-parent = <&vic1>; |
16 | interrupts = <12>; | 36 | interrupts = <12>; |
37 | dmas = <&dma-controller 23>; | ||
38 | dma-names = "data"; | ||
17 | }; | 39 | }; |
diff --git a/Documentation/devicetree/bindings/serial/pl011.txt b/Documentation/devicetree/bindings/serial/pl011.txt new file mode 100644 index 000000000000..5d2e840ae65c --- /dev/null +++ b/Documentation/devicetree/bindings/serial/pl011.txt | |||
@@ -0,0 +1,17 @@ | |||
1 | * ARM AMBA Primecell PL011 serial UART | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: must be "arm,primecell", "arm,pl011" | ||
5 | - reg: exactly one register range with length 0x1000 | ||
6 | - interrupts: exactly one interrupt specifier | ||
7 | |||
8 | Optional properties: | ||
9 | - pinctrl: When present, must have one state named "sleep" | ||
10 | and one state named "default" | ||
11 | - clocks: When present, must refer to exactly one clock named | ||
12 | "apb_pclk" | ||
13 | - dmas: When present, may have one or two dma channels. | ||
14 | The first one must be named "rx", the second one | ||
15 | must be named "tx". | ||
16 | |||
17 | See also bindings/arm/primecell.txt | ||
diff --git a/Documentation/devicetree/bindings/spi/spi_pl022.txt b/Documentation/devicetree/bindings/spi/spi_pl022.txt index f158fd31cfda..22ed6797216d 100644 --- a/Documentation/devicetree/bindings/spi/spi_pl022.txt +++ b/Documentation/devicetree/bindings/spi/spi_pl022.txt | |||
@@ -16,6 +16,11 @@ Optional properties: | |||
16 | device will be suspended immediately | 16 | device will be suspended immediately |
17 | - pl022,rt : indicates the controller should run the message pump with realtime | 17 | - pl022,rt : indicates the controller should run the message pump with realtime |
18 | priority to minimise the transfer latency on the bus (boolean) | 18 | priority to minimise the transfer latency on the bus (boolean) |
19 | - dmas : Two or more DMA channel specifiers following the convention outlined | ||
20 | in bindings/dma/dma.txt | ||
21 | - dma-names: Names for the dma channels, if present. There must be at | ||
22 | least one channel named "tx" for transmit and named "rx" for | ||
23 | receive. | ||
19 | 24 | ||
20 | 25 | ||
21 | SPI slave nodes must be children of the SPI master node and can | 26 | SPI slave nodes must be children of the SPI master node and can |
@@ -32,3 +37,34 @@ contain the following properties. | |||
32 | - pl022,wait-state : Microwire interface: Wait state | 37 | - pl022,wait-state : Microwire interface: Wait state |
33 | - pl022,duplex : Microwire interface: Full/Half duplex | 38 | - pl022,duplex : Microwire interface: Full/Half duplex |
34 | 39 | ||
40 | |||
41 | Example: | ||
42 | |||
43 | spi@e0100000 { | ||
44 | compatible = "arm,pl022", "arm,primecell"; | ||
45 | reg = <0xe0100000 0x1000>; | ||
46 | #address-cells = <1>; | ||
47 | #size-cells = <0>; | ||
48 | interrupts = <0 31 0x4>; | ||
49 | dmas = <&dma-controller 23 1>, | ||
50 | <&dma-controller 24 0>; | ||
51 | dma-names = "rx", "tx"; | ||
52 | |||
53 | m25p80@1 { | ||
54 | compatible = "st,m25p80"; | ||
55 | reg = <1>; | ||
56 | spi-max-frequency = <12000000>; | ||
57 | spi-cpol; | ||
58 | spi-cpha; | ||
59 | pl022,hierarchy = <0>; | ||
60 | pl022,interface = <0>; | ||
61 | pl022,slave-tx-disable; | ||
62 | pl022,com-mode = <0x2>; | ||
63 | pl022,rx-level-trig = <0>; | ||
64 | pl022,tx-level-trig = <0>; | ||
65 | pl022,ctrl-len = <0x11>; | ||
66 | pl022,wait-state = <0>; | ||
67 | pl022,duplex = <0>; | ||
68 | }; | ||
69 | }; | ||
70 | |||
diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt b/Documentation/devicetree/bindings/timer/arm,sp804.txt new file mode 100644 index 000000000000..5cd8eee74af1 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/arm,sp804.txt | |||
@@ -0,0 +1,29 @@ | |||
1 | ARM sp804 Dual Timers | ||
2 | --------------------------------------- | ||
3 | |||
4 | Required properties: | ||
5 | - compatible: Should be "arm,sp804" & "arm,primecell" | ||
6 | - interrupts: Should contain the list of Dual Timer interrupts. This is the | ||
7 | interrupt for timer 1 and timer 2. In the case of a single entry, it is | ||
8 | the combined interrupt or if "arm,sp804-has-irq" is present that | ||
9 | specifies which timer interrupt is connected. | ||
10 | - reg: Should contain location and length for dual timer register. | ||
11 | - clocks: clocks driving the dual timer hardware. This list should be 1 or 3 | ||
12 | clocks. With 3 clocks, the order is timer0 clock, timer1 clock, | ||
13 | apb_pclk. A single clock can also be specified if the same clock is | ||
14 | used for all clock inputs. | ||
15 | |||
16 | Optional properties: | ||
17 | - arm,sp804-has-irq = <#>: In the case of only 1 timer irq line connected, this | ||
18 | specifies if the irq connection is for timer 1 or timer 2. A value of 1 | ||
19 | or 2 should be used. | ||
20 | |||
21 | Example: | ||
22 | |||
23 | timer0: timer@fc800000 { | ||
24 | compatible = "arm,sp804", "arm,primecell"; | ||
25 | reg = <0xfc800000 0x1000>; | ||
26 | interrupts = <0 0 4>, <0 1 4>; | ||
27 | clocks = <&timclk1 &timclk2 &pclk>; | ||
28 | clock-names = "timer1", "timer2", "apb_pclk"; | ||
29 | }; | ||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 18bef301d6e6..34ef016626ff 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1059,6 +1059,7 @@ config PLAT_VERSATILE | |||
1059 | config ARM_TIMER_SP804 | 1059 | config ARM_TIMER_SP804 |
1060 | bool | 1060 | bool |
1061 | select CLKSRC_MMIO | 1061 | select CLKSRC_MMIO |
1062 | select CLKSRC_OF if OF | ||
1062 | 1063 | ||
1063 | source arch/arm/mm/Kconfig | 1064 | source arch/arm/mm/Kconfig |
1064 | 1065 | ||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e6611eaa2885..5f1f4dfd706e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -194,6 +194,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ | |||
194 | tegra30-cardhu-a04.dtb \ | 194 | tegra30-cardhu-a04.dtb \ |
195 | tegra114-dalmore.dtb \ | 195 | tegra114-dalmore.dtb \ |
196 | tegra114-pluto.dtb | 196 | tegra114-pluto.dtb |
197 | dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ | ||
198 | versatile-pb.dtb | ||
197 | dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ | 199 | dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ |
198 | vexpress-v2p-ca9.dtb \ | 200 | vexpress-v2p-ca9.dtb \ |
199 | vexpress-v2p-ca15-tc1.dtb \ | 201 | vexpress-v2p-ca15-tc1.dtb \ |
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index f8f7370e8669..bf18a735c37d 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi | |||
@@ -108,6 +108,7 @@ | |||
108 | compatible = "atmel,at91sam9g45-dma"; | 108 | compatible = "atmel,at91sam9g45-dma"; |
109 | reg = <0xffffec00 0x200>; | 109 | reg = <0xffffec00 0x200>; |
110 | interrupts = <21 4 0>; | 110 | interrupts = <21 4 0>; |
111 | #dma-cells = <2>; | ||
111 | }; | 112 | }; |
112 | 113 | ||
113 | pinctrl@fffff200 { | 114 | pinctrl@fffff200 { |
@@ -533,6 +534,8 @@ | |||
533 | compatible = "atmel,hsmci"; | 534 | compatible = "atmel,hsmci"; |
534 | reg = <0xfff80000 0x600>; | 535 | reg = <0xfff80000 0x600>; |
535 | interrupts = <11 4 0>; | 536 | interrupts = <11 4 0>; |
537 | dmas = <&dma 1 0>; | ||
538 | dma-names = "rxtx"; | ||
536 | #address-cells = <1>; | 539 | #address-cells = <1>; |
537 | #size-cells = <0>; | 540 | #size-cells = <0>; |
538 | status = "disabled"; | 541 | status = "disabled"; |
@@ -542,6 +545,8 @@ | |||
542 | compatible = "atmel,hsmci"; | 545 | compatible = "atmel,hsmci"; |
543 | reg = <0xfffd0000 0x600>; | 546 | reg = <0xfffd0000 0x600>; |
544 | interrupts = <29 4 0>; | 547 | interrupts = <29 4 0>; |
548 | dmas = <&dma 1 13>; | ||
549 | dma-names = "rxtx"; | ||
545 | #address-cells = <1>; | 550 | #address-cells = <1>; |
546 | #size-cells = <0>; | 551 | #size-cells = <0>; |
547 | status = "disabled"; | 552 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index b2961f1ea51b..3de8e6dfbcb1 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi | |||
@@ -89,6 +89,8 @@ | |||
89 | compatible = "atmel,hsmci"; | 89 | compatible = "atmel,hsmci"; |
90 | reg = <0xf0008000 0x600>; | 90 | reg = <0xf0008000 0x600>; |
91 | interrupts = <12 4 0>; | 91 | interrupts = <12 4 0>; |
92 | dmas = <&dma 1 0>; | ||
93 | dma-names = "rxtx"; | ||
92 | #address-cells = <1>; | 94 | #address-cells = <1>; |
93 | #size-cells = <0>; | 95 | #size-cells = <0>; |
94 | status = "disabled"; | 96 | status = "disabled"; |
@@ -110,6 +112,7 @@ | |||
110 | compatible = "atmel,at91sam9g45-dma"; | 112 | compatible = "atmel,at91sam9g45-dma"; |
111 | reg = <0xffffec00 0x200>; | 113 | reg = <0xffffec00 0x200>; |
112 | interrupts = <20 4 0>; | 114 | interrupts = <20 4 0>; |
115 | #dma-cells = <2>; | ||
113 | }; | 116 | }; |
114 | 117 | ||
115 | pinctrl@fffff400 { | 118 | pinctrl@fffff400 { |
@@ -378,6 +381,9 @@ | |||
378 | compatible = "atmel,at91sam9x5-i2c"; | 381 | compatible = "atmel,at91sam9x5-i2c"; |
379 | reg = <0xf8010000 0x100>; | 382 | reg = <0xf8010000 0x100>; |
380 | interrupts = <9 4 6>; | 383 | interrupts = <9 4 6>; |
384 | dmas = <&dma 1 13>, | ||
385 | <&dma 1 14>; | ||
386 | dma-names = "tx", "rx"; | ||
381 | #address-cells = <1>; | 387 | #address-cells = <1>; |
382 | #size-cells = <0>; | 388 | #size-cells = <0>; |
383 | status = "disabled"; | 389 | status = "disabled"; |
@@ -387,6 +393,9 @@ | |||
387 | compatible = "atmel,at91sam9x5-i2c"; | 393 | compatible = "atmel,at91sam9x5-i2c"; |
388 | reg = <0xf8014000 0x100>; | 394 | reg = <0xf8014000 0x100>; |
389 | interrupts = <10 4 6>; | 395 | interrupts = <10 4 6>; |
396 | dmas = <&dma 1 15>, | ||
397 | <&dma 1 16>; | ||
398 | dma-names = "tx", "rx"; | ||
390 | #address-cells = <1>; | 399 | #address-cells = <1>; |
391 | #size-cells = <0>; | 400 | #size-cells = <0>; |
392 | status = "disabled"; | 401 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 640b3bbbb706..1145ac330fb7 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -104,12 +104,14 @@ | |||
104 | compatible = "atmel,at91sam9g45-dma"; | 104 | compatible = "atmel,at91sam9g45-dma"; |
105 | reg = <0xffffec00 0x200>; | 105 | reg = <0xffffec00 0x200>; |
106 | interrupts = <20 4 0>; | 106 | interrupts = <20 4 0>; |
107 | #dma-cells = <2>; | ||
107 | }; | 108 | }; |
108 | 109 | ||
109 | dma1: dma-controller@ffffee00 { | 110 | dma1: dma-controller@ffffee00 { |
110 | compatible = "atmel,at91sam9g45-dma"; | 111 | compatible = "atmel,at91sam9g45-dma"; |
111 | reg = <0xffffee00 0x200>; | 112 | reg = <0xffffee00 0x200>; |
112 | interrupts = <21 4 0>; | 113 | interrupts = <21 4 0>; |
114 | #dma-cells = <2>; | ||
113 | }; | 115 | }; |
114 | 116 | ||
115 | pinctrl@fffff400 { | 117 | pinctrl@fffff400 { |
@@ -465,6 +467,8 @@ | |||
465 | compatible = "atmel,hsmci"; | 467 | compatible = "atmel,hsmci"; |
466 | reg = <0xf0008000 0x600>; | 468 | reg = <0xf0008000 0x600>; |
467 | interrupts = <12 4 0>; | 469 | interrupts = <12 4 0>; |
470 | dmas = <&dma0 1 0>; | ||
471 | dma-names = "rxtx"; | ||
468 | #address-cells = <1>; | 472 | #address-cells = <1>; |
469 | #size-cells = <0>; | 473 | #size-cells = <0>; |
470 | status = "disabled"; | 474 | status = "disabled"; |
@@ -474,6 +478,8 @@ | |||
474 | compatible = "atmel,hsmci"; | 478 | compatible = "atmel,hsmci"; |
475 | reg = <0xf000c000 0x600>; | 479 | reg = <0xf000c000 0x600>; |
476 | interrupts = <26 4 0>; | 480 | interrupts = <26 4 0>; |
481 | dmas = <&dma1 1 0>; | ||
482 | dma-names = "rxtx"; | ||
477 | #address-cells = <1>; | 483 | #address-cells = <1>; |
478 | #size-cells = <0>; | 484 | #size-cells = <0>; |
479 | status = "disabled"; | 485 | status = "disabled"; |
@@ -535,6 +541,9 @@ | |||
535 | compatible = "atmel,at91sam9x5-i2c"; | 541 | compatible = "atmel,at91sam9x5-i2c"; |
536 | reg = <0xf8010000 0x100>; | 542 | reg = <0xf8010000 0x100>; |
537 | interrupts = <9 4 6>; | 543 | interrupts = <9 4 6>; |
544 | dmas = <&dma0 1 7>, | ||
545 | <&dma0 1 8>; | ||
546 | dma-names = "tx", "rx"; | ||
538 | #address-cells = <1>; | 547 | #address-cells = <1>; |
539 | #size-cells = <0>; | 548 | #size-cells = <0>; |
540 | pinctrl-names = "default"; | 549 | pinctrl-names = "default"; |
@@ -546,6 +555,9 @@ | |||
546 | compatible = "atmel,at91sam9x5-i2c"; | 555 | compatible = "atmel,at91sam9x5-i2c"; |
547 | reg = <0xf8014000 0x100>; | 556 | reg = <0xf8014000 0x100>; |
548 | interrupts = <10 4 6>; | 557 | interrupts = <10 4 6>; |
558 | dmas = <&dma1 1 5>, | ||
559 | <&dma1 1 6>; | ||
560 | dma-names = "tx", "rx"; | ||
549 | #address-cells = <1>; | 561 | #address-cells = <1>; |
550 | #size-cells = <0>; | 562 | #size-cells = <0>; |
551 | pinctrl-names = "default"; | 563 | pinctrl-names = "default"; |
@@ -557,6 +569,9 @@ | |||
557 | compatible = "atmel,at91sam9x5-i2c"; | 569 | compatible = "atmel,at91sam9x5-i2c"; |
558 | reg = <0xf8018000 0x100>; | 570 | reg = <0xf8018000 0x100>; |
559 | interrupts = <11 4 6>; | 571 | interrupts = <11 4 6>; |
572 | dmas = <&dma0 1 9>, | ||
573 | <&dma0 1 10>; | ||
574 | dma-names = "tx", "rx"; | ||
560 | #address-cells = <1>; | 575 | #address-cells = <1>; |
561 | #size-cells = <0>; | 576 | #size-cells = <0>; |
562 | pinctrl-names = "default"; | 577 | pinctrl-names = "default"; |
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index 8b119399025a..ff1aea0ee043 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts | |||
@@ -24,15 +24,15 @@ | |||
24 | }; | 24 | }; |
25 | 25 | ||
26 | timer0: timer@13000000 { | 26 | timer0: timer@13000000 { |
27 | compatible = "arm,sp804", "arm,primecell"; | 27 | compatible = "arm,integrator-cp-timer"; |
28 | }; | 28 | }; |
29 | 29 | ||
30 | timer1: timer@13000100 { | 30 | timer1: timer@13000100 { |
31 | compatible = "arm,sp804", "arm,primecell"; | 31 | compatible = "arm,integrator-cp-timer"; |
32 | }; | 32 | }; |
33 | 33 | ||
34 | timer2: timer@13000200 { | 34 | timer2: timer@13000200 { |
35 | compatible = "arm,sp804", "arm,primecell"; | 35 | compatible = "arm,integrator-cp-timer"; |
36 | }; | 36 | }; |
37 | 37 | ||
38 | pic: pic@14000000 { | 38 | pic: pic@14000000 { |
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 39b0458d365a..2e643ea51cce 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi | |||
@@ -60,6 +60,8 @@ | |||
60 | compatible = "atmel,hsmci"; | 60 | compatible = "atmel,hsmci"; |
61 | reg = <0xf0000000 0x600>; | 61 | reg = <0xf0000000 0x600>; |
62 | interrupts = <21 4 0>; | 62 | interrupts = <21 4 0>; |
63 | dmas = <&dma0 2 0>; | ||
64 | dma-names = "rxtx"; | ||
63 | pinctrl-names = "default"; | 65 | pinctrl-names = "default"; |
64 | pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; | 66 | pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; |
65 | status = "disabled"; | 67 | status = "disabled"; |
@@ -111,6 +113,9 @@ | |||
111 | compatible = "atmel,at91sam9x5-i2c"; | 113 | compatible = "atmel,at91sam9x5-i2c"; |
112 | reg = <0xf0014000 0x4000>; | 114 | reg = <0xf0014000 0x4000>; |
113 | interrupts = <18 4 6>; | 115 | interrupts = <18 4 6>; |
116 | dmas = <&dma0 2 7>, | ||
117 | <&dma0 2 8>; | ||
118 | dma-names = "tx", "rx"; | ||
114 | pinctrl-names = "default"; | 119 | pinctrl-names = "default"; |
115 | pinctrl-0 = <&pinctrl_i2c0>; | 120 | pinctrl-0 = <&pinctrl_i2c0>; |
116 | #address-cells = <1>; | 121 | #address-cells = <1>; |
@@ -122,6 +127,9 @@ | |||
122 | compatible = "atmel,at91sam9x5-i2c"; | 127 | compatible = "atmel,at91sam9x5-i2c"; |
123 | reg = <0xf0018000 0x4000>; | 128 | reg = <0xf0018000 0x4000>; |
124 | interrupts = <19 4 6>; | 129 | interrupts = <19 4 6>; |
130 | dmas = <&dma0 2 9>, | ||
131 | <&dma0 2 10>; | ||
132 | dma-names = "tx", "rx"; | ||
125 | pinctrl-names = "default"; | 133 | pinctrl-names = "default"; |
126 | pinctrl-0 = <&pinctrl_i2c1>; | 134 | pinctrl-0 = <&pinctrl_i2c1>; |
127 | #address-cells = <1>; | 135 | #address-cells = <1>; |
@@ -167,6 +175,8 @@ | |||
167 | compatible = "atmel,hsmci"; | 175 | compatible = "atmel,hsmci"; |
168 | reg = <0xf8000000 0x600>; | 176 | reg = <0xf8000000 0x600>; |
169 | interrupts = <22 4 0>; | 177 | interrupts = <22 4 0>; |
178 | dmas = <&dma1 2 0>; | ||
179 | dma-names = "rxtx"; | ||
170 | pinctrl-names = "default"; | 180 | pinctrl-names = "default"; |
171 | pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; | 181 | pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; |
172 | status = "disabled"; | 182 | status = "disabled"; |
@@ -178,6 +188,8 @@ | |||
178 | compatible = "atmel,hsmci"; | 188 | compatible = "atmel,hsmci"; |
179 | reg = <0xf8004000 0x600>; | 189 | reg = <0xf8004000 0x600>; |
180 | interrupts = <23 4 0>; | 190 | interrupts = <23 4 0>; |
191 | dmas = <&dma1 2 1>; | ||
192 | dma-names = "rxtx"; | ||
181 | pinctrl-names = "default"; | 193 | pinctrl-names = "default"; |
182 | pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; | 194 | pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; |
183 | status = "disabled"; | 195 | status = "disabled"; |
@@ -294,6 +306,9 @@ | |||
294 | compatible = "atmel,at91sam9x5-i2c"; | 306 | compatible = "atmel,at91sam9x5-i2c"; |
295 | reg = <0xf801c000 0x4000>; | 307 | reg = <0xf801c000 0x4000>; |
296 | interrupts = <20 4 6>; | 308 | interrupts = <20 4 6>; |
309 | dmas = <&dma1 2 11>, | ||
310 | <&dma1 2 12>; | ||
311 | dma-names = "tx", "rx"; | ||
297 | #address-cells = <1>; | 312 | #address-cells = <1>; |
298 | #size-cells = <0>; | 313 | #size-cells = <0>; |
299 | status = "disabled"; | 314 | status = "disabled"; |
@@ -348,14 +363,14 @@ | |||
348 | compatible = "atmel,at91sam9g45-dma"; | 363 | compatible = "atmel,at91sam9g45-dma"; |
349 | reg = <0xffffe600 0x200>; | 364 | reg = <0xffffe600 0x200>; |
350 | interrupts = <30 4 0>; | 365 | interrupts = <30 4 0>; |
351 | #dma-cells = <1>; | 366 | #dma-cells = <2>; |
352 | }; | 367 | }; |
353 | 368 | ||
354 | dma1: dma-controller@ffffe800 { | 369 | dma1: dma-controller@ffffe800 { |
355 | compatible = "atmel,at91sam9g45-dma"; | 370 | compatible = "atmel,at91sam9g45-dma"; |
356 | reg = <0xffffe800 0x200>; | 371 | reg = <0xffffe800 0x200>; |
357 | interrupts = <31 4 0>; | 372 | interrupts = <31 4 0>; |
358 | #dma-cells = <1>; | 373 | #dma-cells = <2>; |
359 | }; | 374 | }; |
360 | 375 | ||
361 | ramc0: ramc@ffffea00 { | 376 | ramc0: ramc@ffffea00 { |
diff --git a/arch/arm/boot/dts/sama5d34ek.dts b/arch/arm/boot/dts/sama5d34ek.dts index d2739f8d7ae9..6bebfcdcb1d1 100644 --- a/arch/arm/boot/dts/sama5d34ek.dts +++ b/arch/arm/boot/dts/sama5d34ek.dts | |||
@@ -12,7 +12,7 @@ | |||
12 | 12 | ||
13 | / { | 13 | / { |
14 | model = "Atmel SAMA5D34-EK"; | 14 | model = "Atmel SAMA5D34-EK"; |
15 | compatible = "atmel,sama5d34ek", "atmel,sama5ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; | 15 | compatible = "atmel,sama5d34ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; |
16 | 16 | ||
17 | ahb { | 17 | ahb { |
18 | apb { | 18 | apb { |
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index c511c4772efd..54d128d35681 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi | |||
@@ -113,6 +113,9 @@ | |||
113 | reg = <0xb4100000 0x1000>; | 113 | reg = <0xb4100000 0x1000>; |
114 | interrupts = <0 105 0x4>; | 114 | interrupts = <0 105 0x4>; |
115 | status = "disabled"; | 115 | status = "disabled"; |
116 | dmas = <&dwdma0 0x600 0 0 1>, /* 0xC << 11 */ | ||
117 | <&dwdma0 0x680 0 1 0>; /* 0xD << 7 */ | ||
118 | dma-names = "tx", "rx"; | ||
116 | }; | 119 | }; |
117 | 120 | ||
118 | thermal@e07008c4 { | 121 | thermal@e07008c4 { |
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi index b4ca60f4eb42..45597fd91050 100644 --- a/arch/arm/boot/dts/spear13xx.dtsi +++ b/arch/arm/boot/dts/spear13xx.dtsi | |||
@@ -98,13 +98,24 @@ | |||
98 | reg = <0xb2800000 0x1000>; | 98 | reg = <0xb2800000 0x1000>; |
99 | interrupts = <0 29 0x4>; | 99 | interrupts = <0 29 0x4>; |
100 | status = "disabled"; | 100 | status = "disabled"; |
101 | dmas = <&dwdma0 0 0 0 0>; | ||
102 | dma-names = "data"; | ||
101 | }; | 103 | }; |
102 | 104 | ||
103 | dma@ea800000 { | 105 | dwdma0: dma@ea800000 { |
104 | compatible = "snps,dma-spear1340"; | 106 | compatible = "snps,dma-spear1340"; |
105 | reg = <0xea800000 0x1000>; | 107 | reg = <0xea800000 0x1000>; |
106 | interrupts = <0 19 0x4>; | 108 | interrupts = <0 19 0x4>; |
107 | status = "disabled"; | 109 | status = "disabled"; |
110 | |||
111 | dma-channels = <8>; | ||
112 | #dma-cells = <3>; | ||
113 | dma-requests = <32>; | ||
114 | chan_allocation_order = <1>; | ||
115 | chan_priority = <1>; | ||
116 | block_size = <0xfff>; | ||
117 | dma-masters = <2>; | ||
118 | data_width = <3 3 0 0>; | ||
108 | }; | 119 | }; |
109 | 120 | ||
110 | dma@eb000000 { | 121 | dma@eb000000 { |
@@ -112,6 +123,15 @@ | |||
112 | reg = <0xeb000000 0x1000>; | 123 | reg = <0xeb000000 0x1000>; |
113 | interrupts = <0 59 0x4>; | 124 | interrupts = <0 59 0x4>; |
114 | status = "disabled"; | 125 | status = "disabled"; |
126 | |||
127 | dma-requests = <32>; | ||
128 | dma-channels = <8>; | ||
129 | dma-masters = <2>; | ||
130 | #dma-cells = <3>; | ||
131 | chan_allocation_order = <1>; | ||
132 | chan_priority = <1>; | ||
133 | block_size = <0xfff>; | ||
134 | data_width = <3 3 0 0>; | ||
115 | }; | 135 | }; |
116 | 136 | ||
117 | fsmc: flash@b0000000 { | 137 | fsmc: flash@b0000000 { |
@@ -261,6 +281,9 @@ | |||
261 | #size-cells = <0>; | 281 | #size-cells = <0>; |
262 | interrupts = <0 31 0x4>; | 282 | interrupts = <0 31 0x4>; |
263 | status = "disabled"; | 283 | status = "disabled"; |
284 | dmas = <&dwdma0 0x2000 0 0 0>, /* 0x4 << 11 */ | ||
285 | <&dwdma0 0x0280 0 0 0>; /* 0x5 << 7 */ | ||
286 | dma-names = "tx", "rx"; | ||
264 | }; | 287 | }; |
265 | 288 | ||
266 | rtc@e0580000 { | 289 | rtc@e0580000 { |
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index e2fe3195c0d1..dde75ae8b4b1 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts | |||
@@ -121,6 +121,18 @@ | |||
121 | interrupts = <0>; | 121 | interrupts = <0>; |
122 | }; | 122 | }; |
123 | 123 | ||
124 | timer@101e2000 { | ||
125 | compatible = "arm,sp804", "arm,primecell"; | ||
126 | reg = <0x101e2000 0x1000>; | ||
127 | interrupts = <4>; | ||
128 | }; | ||
129 | |||
130 | timer@101e3000 { | ||
131 | compatible = "arm,sp804", "arm,primecell"; | ||
132 | reg = <0x101e3000 0x1000>; | ||
133 | interrupts = <5>; | ||
134 | }; | ||
135 | |||
124 | gpio0: gpio@101e4000 { | 136 | gpio0: gpio@101e4000 { |
125 | compatible = "arm,pl061", "arm,primecell"; | 137 | compatible = "arm,pl061", "arm,primecell"; |
126 | reg = <0x101e4000 0x1000>; | 138 | reg = <0x101e4000 0x1000>; |
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 1420bb14d95c..62d9b225dcce 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts | |||
@@ -98,6 +98,7 @@ | |||
98 | <0 49 4>; | 98 | <0 49 4>; |
99 | clocks = <&oscclk2>, <&oscclk2>; | 99 | clocks = <&oscclk2>, <&oscclk2>; |
100 | clock-names = "timclk", "apb_pclk"; | 100 | clock-names = "timclk", "apb_pclk"; |
101 | status = "disabled"; | ||
101 | }; | 102 | }; |
102 | 103 | ||
103 | watchdog@100e5000 { | 104 | watchdog@100e5000 { |
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index 9d2d3ba339ff..ddc740769601 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c | |||
@@ -25,33 +25,29 @@ | |||
25 | #include <linux/interrupt.h> | 25 | #include <linux/interrupt.h> |
26 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/of.h> | ||
29 | #include <linux/of_address.h> | ||
30 | #include <linux/of_irq.h> | ||
28 | 31 | ||
29 | #include <asm/sched_clock.h> | 32 | #include <asm/sched_clock.h> |
30 | #include <asm/hardware/arm_timer.h> | 33 | #include <asm/hardware/arm_timer.h> |
34 | #include <asm/hardware/timer-sp.h> | ||
31 | 35 | ||
32 | static long __init sp804_get_clock_rate(const char *name) | 36 | static long __init sp804_get_clock_rate(struct clk *clk) |
33 | { | 37 | { |
34 | struct clk *clk; | ||
35 | long rate; | 38 | long rate; |
36 | int err; | 39 | int err; |
37 | 40 | ||
38 | clk = clk_get_sys("sp804", name); | ||
39 | if (IS_ERR(clk)) { | ||
40 | pr_err("sp804: %s clock not found: %d\n", name, | ||
41 | (int)PTR_ERR(clk)); | ||
42 | return PTR_ERR(clk); | ||
43 | } | ||
44 | |||
45 | err = clk_prepare(clk); | 41 | err = clk_prepare(clk); |
46 | if (err) { | 42 | if (err) { |
47 | pr_err("sp804: %s clock failed to prepare: %d\n", name, err); | 43 | pr_err("sp804: clock failed to prepare: %d\n", err); |
48 | clk_put(clk); | 44 | clk_put(clk); |
49 | return err; | 45 | return err; |
50 | } | 46 | } |
51 | 47 | ||
52 | err = clk_enable(clk); | 48 | err = clk_enable(clk); |
53 | if (err) { | 49 | if (err) { |
54 | pr_err("sp804: %s clock failed to enable: %d\n", name, err); | 50 | pr_err("sp804: clock failed to enable: %d\n", err); |
55 | clk_unprepare(clk); | 51 | clk_unprepare(clk); |
56 | clk_put(clk); | 52 | clk_put(clk); |
57 | return err; | 53 | return err; |
@@ -59,7 +55,7 @@ static long __init sp804_get_clock_rate(const char *name) | |||
59 | 55 | ||
60 | rate = clk_get_rate(clk); | 56 | rate = clk_get_rate(clk); |
61 | if (rate < 0) { | 57 | if (rate < 0) { |
62 | pr_err("sp804: %s clock failed to get rate: %ld\n", name, rate); | 58 | pr_err("sp804: clock failed to get rate: %ld\n", rate); |
63 | clk_disable(clk); | 59 | clk_disable(clk); |
64 | clk_unprepare(clk); | 60 | clk_unprepare(clk); |
65 | clk_put(clk); | 61 | clk_put(clk); |
@@ -77,9 +73,21 @@ static u32 sp804_read(void) | |||
77 | 73 | ||
78 | void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base, | 74 | void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base, |
79 | const char *name, | 75 | const char *name, |
76 | struct clk *clk, | ||
80 | int use_sched_clock) | 77 | int use_sched_clock) |
81 | { | 78 | { |
82 | long rate = sp804_get_clock_rate(name); | 79 | long rate; |
80 | |||
81 | if (!clk) { | ||
82 | clk = clk_get_sys("sp804", name); | ||
83 | if (IS_ERR(clk)) { | ||
84 | pr_err("sp804: clock not found: %d\n", | ||
85 | (int)PTR_ERR(clk)); | ||
86 | return; | ||
87 | } | ||
88 | } | ||
89 | |||
90 | rate = sp804_get_clock_rate(clk); | ||
83 | 91 | ||
84 | if (rate < 0) | 92 | if (rate < 0) |
85 | return; | 93 | return; |
@@ -171,12 +179,20 @@ static struct irqaction sp804_timer_irq = { | |||
171 | .dev_id = &sp804_clockevent, | 179 | .dev_id = &sp804_clockevent, |
172 | }; | 180 | }; |
173 | 181 | ||
174 | void __init sp804_clockevents_init(void __iomem *base, unsigned int irq, | 182 | void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struct clk *clk, const char *name) |
175 | const char *name) | ||
176 | { | 183 | { |
177 | struct clock_event_device *evt = &sp804_clockevent; | 184 | struct clock_event_device *evt = &sp804_clockevent; |
178 | long rate = sp804_get_clock_rate(name); | 185 | long rate; |
179 | 186 | ||
187 | if (!clk) | ||
188 | clk = clk_get_sys("sp804", name); | ||
189 | if (IS_ERR(clk)) { | ||
190 | pr_err("sp804: %s clock not found: %d\n", name, | ||
191 | (int)PTR_ERR(clk)); | ||
192 | return; | ||
193 | } | ||
194 | |||
195 | rate = sp804_get_clock_rate(clk); | ||
180 | if (rate < 0) | 196 | if (rate < 0) |
181 | return; | 197 | return; |
182 | 198 | ||
@@ -186,6 +202,98 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq, | |||
186 | evt->irq = irq; | 202 | evt->irq = irq; |
187 | evt->cpumask = cpu_possible_mask; | 203 | evt->cpumask = cpu_possible_mask; |
188 | 204 | ||
205 | writel(0, base + TIMER_CTRL); | ||
206 | |||
189 | setup_irq(irq, &sp804_timer_irq); | 207 | setup_irq(irq, &sp804_timer_irq); |
190 | clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); | 208 | clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); |
191 | } | 209 | } |
210 | |||
211 | static void __init sp804_of_init(struct device_node *np) | ||
212 | { | ||
213 | static bool initialized = false; | ||
214 | void __iomem *base; | ||
215 | int irq; | ||
216 | u32 irq_num = 0; | ||
217 | struct clk *clk1, *clk2; | ||
218 | const char *name = of_get_property(np, "compatible", NULL); | ||
219 | |||
220 | base = of_iomap(np, 0); | ||
221 | if (WARN_ON(!base)) | ||
222 | return; | ||
223 | |||
224 | /* Ensure timers are disabled */ | ||
225 | writel(0, base + TIMER_CTRL); | ||
226 | writel(0, base + TIMER_2_BASE + TIMER_CTRL); | ||
227 | |||
228 | if (initialized || !of_device_is_available(np)) | ||
229 | goto err; | ||
230 | |||
231 | clk1 = of_clk_get(np, 0); | ||
232 | if (IS_ERR(clk1)) | ||
233 | clk1 = NULL; | ||
234 | |||
235 | /* Get the 2nd clock if the timer has 2 timer clocks */ | ||
236 | if (of_count_phandle_with_args(np, "clocks", "#clock-cells") == 3) { | ||
237 | clk2 = of_clk_get(np, 1); | ||
238 | if (IS_ERR(clk2)) { | ||
239 | pr_err("sp804: %s clock not found: %d\n", np->name, | ||
240 | (int)PTR_ERR(clk2)); | ||
241 | goto err; | ||
242 | } | ||
243 | } else | ||
244 | clk2 = clk1; | ||
245 | |||
246 | irq = irq_of_parse_and_map(np, 0); | ||
247 | if (irq <= 0) | ||
248 | goto err; | ||
249 | |||
250 | of_property_read_u32(np, "arm,sp804-has-irq", &irq_num); | ||
251 | if (irq_num == 2) { | ||
252 | __sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name); | ||
253 | __sp804_clocksource_and_sched_clock_init(base, name, clk1, 1); | ||
254 | } else { | ||
255 | __sp804_clockevents_init(base, irq, clk1 , name); | ||
256 | __sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE, | ||
257 | name, clk2, 1); | ||
258 | } | ||
259 | initialized = true; | ||
260 | |||
261 | return; | ||
262 | err: | ||
263 | iounmap(base); | ||
264 | } | ||
265 | CLOCKSOURCE_OF_DECLARE(sp804, "arm,sp804", sp804_of_init); | ||
266 | |||
267 | static void __init integrator_cp_of_init(struct device_node *np) | ||
268 | { | ||
269 | static int init_count = 0; | ||
270 | void __iomem *base; | ||
271 | int irq; | ||
272 | const char *name = of_get_property(np, "compatible", NULL); | ||
273 | |||
274 | base = of_iomap(np, 0); | ||
275 | if (WARN_ON(!base)) | ||
276 | return; | ||
277 | |||
278 | /* Ensure timer is disabled */ | ||
279 | writel(0, base + TIMER_CTRL); | ||
280 | |||
281 | if (init_count == 2 || !of_device_is_available(np)) | ||
282 | goto err; | ||
283 | |||
284 | if (!init_count) | ||
285 | sp804_clocksource_init(base, name); | ||
286 | else { | ||
287 | irq = irq_of_parse_and_map(np, 0); | ||
288 | if (irq <= 0) | ||
289 | goto err; | ||
290 | |||
291 | sp804_clockevents_init(base, irq, name); | ||
292 | } | ||
293 | |||
294 | init_count++; | ||
295 | return; | ||
296 | err: | ||
297 | iounmap(base); | ||
298 | } | ||
299 | CLOCKSOURCE_OF_DECLARE(intcp, "arm,integrator-cp-timer", integrator_cp_of_init); | ||
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h index 7ade91d8cc6f..7c1bfc0aea0c 100644 --- a/arch/arm/include/asm/arch_timer.h +++ b/arch/arm/include/asm/arch_timer.h | |||
@@ -10,8 +10,7 @@ | |||
10 | #include <clocksource/arm_arch_timer.h> | 10 | #include <clocksource/arm_arch_timer.h> |
11 | 11 | ||
12 | #ifdef CONFIG_ARM_ARCH_TIMER | 12 | #ifdef CONFIG_ARM_ARCH_TIMER |
13 | int arch_timer_of_register(void); | 13 | int arch_timer_arch_init(void); |
14 | int arch_timer_sched_clock_init(void); | ||
15 | 14 | ||
16 | /* | 15 | /* |
17 | * These register accessors are marked inline so the compiler can | 16 | * These register accessors are marked inline so the compiler can |
@@ -110,16 +109,6 @@ static inline void __cpuinit arch_counter_set_user_access(void) | |||
110 | 109 | ||
111 | asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); | 110 | asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); |
112 | } | 111 | } |
113 | #else | ||
114 | static inline int arch_timer_of_register(void) | ||
115 | { | ||
116 | return -ENXIO; | ||
117 | } | ||
118 | |||
119 | static inline int arch_timer_sched_clock_init(void) | ||
120 | { | ||
121 | return -ENXIO; | ||
122 | } | ||
123 | #endif | 112 | #endif |
124 | 113 | ||
125 | #endif | 114 | #endif |
diff --git a/arch/arm/include/asm/hardware/timer-sp.h b/arch/arm/include/asm/hardware/timer-sp.h index 2dd9d3f83f29..bb28af7c32de 100644 --- a/arch/arm/include/asm/hardware/timer-sp.h +++ b/arch/arm/include/asm/hardware/timer-sp.h | |||
@@ -1,15 +1,23 @@ | |||
1 | struct clk; | ||
2 | |||
1 | void __sp804_clocksource_and_sched_clock_init(void __iomem *, | 3 | void __sp804_clocksource_and_sched_clock_init(void __iomem *, |
2 | const char *, int); | 4 | const char *, struct clk *, int); |
5 | void __sp804_clockevents_init(void __iomem *, unsigned int, | ||
6 | struct clk *, const char *); | ||
3 | 7 | ||
4 | static inline void sp804_clocksource_init(void __iomem *base, const char *name) | 8 | static inline void sp804_clocksource_init(void __iomem *base, const char *name) |
5 | { | 9 | { |
6 | __sp804_clocksource_and_sched_clock_init(base, name, 0); | 10 | __sp804_clocksource_and_sched_clock_init(base, name, NULL, 0); |
7 | } | 11 | } |
8 | 12 | ||
9 | static inline void sp804_clocksource_and_sched_clock_init(void __iomem *base, | 13 | static inline void sp804_clocksource_and_sched_clock_init(void __iomem *base, |
10 | const char *name) | 14 | const char *name) |
11 | { | 15 | { |
12 | __sp804_clocksource_and_sched_clock_init(base, name, 1); | 16 | __sp804_clocksource_and_sched_clock_init(base, name, NULL, 1); |
13 | } | 17 | } |
14 | 18 | ||
15 | void sp804_clockevents_init(void __iomem *, unsigned int, const char *); | 19 | static inline void sp804_clockevents_init(void __iomem *base, unsigned int irq, const char *name) |
20 | { | ||
21 | __sp804_clockevents_init(base, irq, NULL, name); | ||
22 | |||
23 | } | ||
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index e3f757263438..3d520ddca61b 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h | |||
@@ -11,4 +11,6 @@ | |||
11 | extern void sched_clock_postinit(void); | 11 | extern void sched_clock_postinit(void); |
12 | extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); | 12 | extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); |
13 | 13 | ||
14 | extern unsigned long long (*sched_clock_func)(void); | ||
15 | |||
14 | #endif | 16 | #endif |
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c index d957a51435d8..59dcdced6e30 100644 --- a/arch/arm/kernel/arch_timer.c +++ b/arch/arm/kernel/arch_timer.c | |||
@@ -22,9 +22,11 @@ static unsigned long arch_timer_read_counter_long(void) | |||
22 | return arch_timer_read_counter(); | 22 | return arch_timer_read_counter(); |
23 | } | 23 | } |
24 | 24 | ||
25 | static u32 arch_timer_read_counter_u32(void) | 25 | static u32 sched_clock_mult __read_mostly; |
26 | |||
27 | static unsigned long long notrace arch_timer_sched_clock(void) | ||
26 | { | 28 | { |
27 | return arch_timer_read_counter(); | 29 | return arch_timer_read_counter() * sched_clock_mult; |
28 | } | 30 | } |
29 | 31 | ||
30 | static struct delay_timer arch_delay_timer; | 32 | static struct delay_timer arch_delay_timer; |
@@ -37,25 +39,20 @@ static void __init arch_timer_delay_timer_register(void) | |||
37 | register_current_timer_delay(&arch_delay_timer); | 39 | register_current_timer_delay(&arch_delay_timer); |
38 | } | 40 | } |
39 | 41 | ||
40 | int __init arch_timer_of_register(void) | 42 | int __init arch_timer_arch_init(void) |
41 | { | 43 | { |
42 | int ret; | 44 | u32 arch_timer_rate = arch_timer_get_rate(); |
43 | 45 | ||
44 | ret = arch_timer_init(); | 46 | if (arch_timer_rate == 0) |
45 | if (ret) | 47 | return -ENXIO; |
46 | return ret; | ||
47 | 48 | ||
48 | arch_timer_delay_timer_register(); | 49 | arch_timer_delay_timer_register(); |
49 | 50 | ||
50 | return 0; | 51 | /* Cache the sched_clock multiplier to save a divide in the hot path. */ |
51 | } | 52 | sched_clock_mult = NSEC_PER_SEC / arch_timer_rate; |
52 | 53 | sched_clock_func = arch_timer_sched_clock; | |
53 | int __init arch_timer_sched_clock_init(void) | 54 | pr_info("sched_clock: ARM arch timer >56 bits at %ukHz, resolution %uns\n", |
54 | { | 55 | arch_timer_rate / 1000, sched_clock_mult); |
55 | if (arch_timer_get_rate() == 0) | ||
56 | return -ENXIO; | ||
57 | 56 | ||
58 | setup_sched_clock(arch_timer_read_counter_u32, | ||
59 | 32, arch_timer_get_rate()); | ||
60 | return 0; | 57 | return 0; |
61 | } | 58 | } |
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index 59d2adb764a9..e8edcaa0e432 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c | |||
@@ -20,6 +20,7 @@ struct clock_data { | |||
20 | u64 epoch_ns; | 20 | u64 epoch_ns; |
21 | u32 epoch_cyc; | 21 | u32 epoch_cyc; |
22 | u32 epoch_cyc_copy; | 22 | u32 epoch_cyc_copy; |
23 | unsigned long rate; | ||
23 | u32 mult; | 24 | u32 mult; |
24 | u32 shift; | 25 | u32 shift; |
25 | bool suspended; | 26 | bool suspended; |
@@ -113,11 +114,14 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) | |||
113 | u64 res, wrap; | 114 | u64 res, wrap; |
114 | char r_unit; | 115 | char r_unit; |
115 | 116 | ||
117 | if (cd.rate > rate) | ||
118 | return; | ||
119 | |||
116 | BUG_ON(bits > 32); | 120 | BUG_ON(bits > 32); |
117 | WARN_ON(!irqs_disabled()); | 121 | WARN_ON(!irqs_disabled()); |
118 | WARN_ON(read_sched_clock != jiffy_sched_clock_read); | ||
119 | read_sched_clock = read; | 122 | read_sched_clock = read; |
120 | sched_clock_mask = (1 << bits) - 1; | 123 | sched_clock_mask = (1 << bits) - 1; |
124 | cd.rate = rate; | ||
121 | 125 | ||
122 | /* calculate the mult/shift to convert counter ticks to ns. */ | 126 | /* calculate the mult/shift to convert counter ticks to ns. */ |
123 | clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0); | 127 | clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0); |
@@ -161,12 +165,19 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) | |||
161 | pr_debug("Registered %pF as sched_clock source\n", read); | 165 | pr_debug("Registered %pF as sched_clock source\n", read); |
162 | } | 166 | } |
163 | 167 | ||
164 | unsigned long long notrace sched_clock(void) | 168 | static unsigned long long notrace sched_clock_32(void) |
165 | { | 169 | { |
166 | u32 cyc = read_sched_clock(); | 170 | u32 cyc = read_sched_clock(); |
167 | return cyc_to_sched_clock(cyc, sched_clock_mask); | 171 | return cyc_to_sched_clock(cyc, sched_clock_mask); |
168 | } | 172 | } |
169 | 173 | ||
174 | unsigned long long __read_mostly (*sched_clock_func)(void) = sched_clock_32; | ||
175 | |||
176 | unsigned long long notrace sched_clock(void) | ||
177 | { | ||
178 | return sched_clock_func(); | ||
179 | } | ||
180 | |||
170 | void __init sched_clock_postinit(void) | 181 | void __init sched_clock_postinit(void) |
171 | { | 182 | { |
172 | /* | 183 | /* |
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index 955d92d265e5..abff4e9aaee0 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/errno.h> | 22 | #include <linux/errno.h> |
23 | #include <linux/profile.h> | 23 | #include <linux/profile.h> |
24 | #include <linux/timer.h> | 24 | #include <linux/timer.h> |
25 | #include <linux/clocksource.h> | ||
25 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
26 | 27 | ||
27 | #include <asm/thread_info.h> | 28 | #include <asm/thread_info.h> |
@@ -115,6 +116,10 @@ int __init register_persistent_clock(clock_access_fn read_boot, | |||
115 | 116 | ||
116 | void __init time_init(void) | 117 | void __init time_init(void) |
117 | { | 118 | { |
118 | machine_desc->init_time(); | 119 | if (machine_desc->init_time) |
120 | machine_desc->init_time(); | ||
121 | else | ||
122 | clocksource_of_init(); | ||
123 | |||
119 | sched_clock_postinit(); | 124 | sched_clock_postinit(); |
120 | } | 125 | } |
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index 48f1228c611c..69f9e3bbf4e5 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c | |||
@@ -36,6 +36,8 @@ static int at91_enter_idle(struct cpuidle_device *dev, | |||
36 | at91rm9200_standby(); | 36 | at91rm9200_standby(); |
37 | else if (cpu_is_at91sam9g45()) | 37 | else if (cpu_is_at91sam9g45()) |
38 | at91sam9g45_standby(); | 38 | at91sam9g45_standby(); |
39 | else if (cpu_is_at91sam9263()) | ||
40 | at91sam9263_standby(); | ||
39 | else | 41 | else |
40 | at91sam9_standby(); | 42 | at91sam9_standby(); |
41 | 43 | ||
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index 0f3379fe645f..d3d7b993846b 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h | |||
@@ -86,7 +86,7 @@ enum at91_soc_type { | |||
86 | AT91_SOC_SAMA5D3, | 86 | AT91_SOC_SAMA5D3, |
87 | 87 | ||
88 | /* Unknown type */ | 88 | /* Unknown type */ |
89 | AT91_SOC_NONE | 89 | AT91_SOC_UNKNOWN, |
90 | }; | 90 | }; |
91 | 91 | ||
92 | enum at91_soc_subtype { | 92 | enum at91_soc_subtype { |
@@ -107,8 +107,11 @@ enum at91_soc_subtype { | |||
107 | AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34, | 107 | AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34, |
108 | AT91_SOC_SAMA5D35, | 108 | AT91_SOC_SAMA5D35, |
109 | 109 | ||
110 | /* No subtype for this SoC */ | ||
111 | AT91_SOC_SUBTYPE_NONE, | ||
112 | |||
110 | /* Unknown subtype */ | 113 | /* Unknown subtype */ |
111 | AT91_SOC_SUBTYPE_NONE | 114 | AT91_SOC_SUBTYPE_UNKNOWN, |
112 | }; | 115 | }; |
113 | 116 | ||
114 | struct at91_socinfo { | 117 | struct at91_socinfo { |
@@ -122,7 +125,7 @@ const char *at91_get_soc_subtype(struct at91_socinfo *c); | |||
122 | 125 | ||
123 | static inline int at91_soc_is_detected(void) | 126 | static inline int at91_soc_is_detected(void) |
124 | { | 127 | { |
125 | return at91_soc_initdata.type != AT91_SOC_NONE; | 128 | return at91_soc_initdata.type != AT91_SOC_UNKNOWN; |
126 | } | 129 | } |
127 | 130 | ||
128 | #ifdef CONFIG_SOC_AT91RM9200 | 131 | #ifdef CONFIG_SOC_AT91RM9200 |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 73f1f250403a..530db304ec5e 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -270,6 +270,8 @@ static int at91_pm_enter(suspend_state_t state) | |||
270 | at91rm9200_standby(); | 270 | at91rm9200_standby(); |
271 | else if (cpu_is_at91sam9g45()) | 271 | else if (cpu_is_at91sam9g45()) |
272 | at91sam9g45_standby(); | 272 | at91sam9g45_standby(); |
273 | else if (cpu_is_at91sam9263()) | ||
274 | at91sam9263_standby(); | ||
273 | else | 275 | else |
274 | at91sam9_standby(); | 276 | at91sam9_standby(); |
275 | break; | 277 | break; |
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 38f467c6b710..2f5908f0b8c5 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h | |||
@@ -70,13 +70,31 @@ static inline void at91sam9g45_standby(void) | |||
70 | at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); | 70 | at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); |
71 | } | 71 | } |
72 | 72 | ||
73 | #ifdef CONFIG_SOC_AT91SAM9263 | 73 | /* We manage both DDRAM/SDRAM controllers, we need more than one value to |
74 | /* | 74 | * remember. |
75 | * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; | ||
76 | * handle those cases both here and in the Suspend-To-RAM support. | ||
77 | */ | 75 | */ |
78 | #warning Assuming EB1 SDRAM controller is *NOT* used | 76 | static inline void at91sam9263_standby(void) |
79 | #endif | 77 | { |
78 | u32 lpr0, lpr1; | ||
79 | u32 saved_lpr0, saved_lpr1; | ||
80 | |||
81 | saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR); | ||
82 | lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB; | ||
83 | lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH; | ||
84 | |||
85 | saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR); | ||
86 | lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB; | ||
87 | lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH; | ||
88 | |||
89 | /* self-refresh mode now */ | ||
90 | at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0); | ||
91 | at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1); | ||
92 | |||
93 | cpu_do_idle(); | ||
94 | |||
95 | at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0); | ||
96 | at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1); | ||
97 | } | ||
80 | 98 | ||
81 | static inline void at91sam9_standby(void) | 99 | static inline void at91sam9_standby(void) |
82 | { | 100 | { |
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index e8491e77b1f7..e2f4bdd146d6 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
@@ -105,28 +105,32 @@ static void __init soc_detect(u32 dbgu_base) | |||
105 | switch (socid) { | 105 | switch (socid) { |
106 | case ARCH_ID_AT91RM9200: | 106 | case ARCH_ID_AT91RM9200: |
107 | at91_soc_initdata.type = AT91_SOC_RM9200; | 107 | at91_soc_initdata.type = AT91_SOC_RM9200; |
108 | if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE) | 108 | if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN) |
109 | at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; | 109 | at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; |
110 | at91_boot_soc = at91rm9200_soc; | 110 | at91_boot_soc = at91rm9200_soc; |
111 | break; | 111 | break; |
112 | 112 | ||
113 | case ARCH_ID_AT91SAM9260: | 113 | case ARCH_ID_AT91SAM9260: |
114 | at91_soc_initdata.type = AT91_SOC_SAM9260; | 114 | at91_soc_initdata.type = AT91_SOC_SAM9260; |
115 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | ||
115 | at91_boot_soc = at91sam9260_soc; | 116 | at91_boot_soc = at91sam9260_soc; |
116 | break; | 117 | break; |
117 | 118 | ||
118 | case ARCH_ID_AT91SAM9261: | 119 | case ARCH_ID_AT91SAM9261: |
119 | at91_soc_initdata.type = AT91_SOC_SAM9261; | 120 | at91_soc_initdata.type = AT91_SOC_SAM9261; |
121 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | ||
120 | at91_boot_soc = at91sam9261_soc; | 122 | at91_boot_soc = at91sam9261_soc; |
121 | break; | 123 | break; |
122 | 124 | ||
123 | case ARCH_ID_AT91SAM9263: | 125 | case ARCH_ID_AT91SAM9263: |
124 | at91_soc_initdata.type = AT91_SOC_SAM9263; | 126 | at91_soc_initdata.type = AT91_SOC_SAM9263; |
127 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | ||
125 | at91_boot_soc = at91sam9263_soc; | 128 | at91_boot_soc = at91sam9263_soc; |
126 | break; | 129 | break; |
127 | 130 | ||
128 | case ARCH_ID_AT91SAM9G20: | 131 | case ARCH_ID_AT91SAM9G20: |
129 | at91_soc_initdata.type = AT91_SOC_SAM9G20; | 132 | at91_soc_initdata.type = AT91_SOC_SAM9G20; |
133 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | ||
130 | at91_boot_soc = at91sam9260_soc; | 134 | at91_boot_soc = at91sam9260_soc; |
131 | break; | 135 | break; |
132 | 136 | ||
@@ -139,6 +143,7 @@ static void __init soc_detect(u32 dbgu_base) | |||
139 | 143 | ||
140 | case ARCH_ID_AT91SAM9RL64: | 144 | case ARCH_ID_AT91SAM9RL64: |
141 | at91_soc_initdata.type = AT91_SOC_SAM9RL; | 145 | at91_soc_initdata.type = AT91_SOC_SAM9RL; |
146 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | ||
142 | at91_boot_soc = at91sam9rl_soc; | 147 | at91_boot_soc = at91sam9rl_soc; |
143 | break; | 148 | break; |
144 | 149 | ||
@@ -161,6 +166,7 @@ static void __init soc_detect(u32 dbgu_base) | |||
161 | /* at91sam9g10 */ | 166 | /* at91sam9g10 */ |
162 | if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { | 167 | if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { |
163 | at91_soc_initdata.type = AT91_SOC_SAM9G10; | 168 | at91_soc_initdata.type = AT91_SOC_SAM9G10; |
169 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | ||
164 | at91_boot_soc = at91sam9261_soc; | 170 | at91_boot_soc = at91sam9261_soc; |
165 | } | 171 | } |
166 | /* at91sam9xe */ | 172 | /* at91sam9xe */ |
@@ -242,7 +248,7 @@ static const char *soc_name[] = { | |||
242 | [AT91_SOC_SAM9X5] = "at91sam9x5", | 248 | [AT91_SOC_SAM9X5] = "at91sam9x5", |
243 | [AT91_SOC_SAM9N12] = "at91sam9n12", | 249 | [AT91_SOC_SAM9N12] = "at91sam9n12", |
244 | [AT91_SOC_SAMA5D3] = "sama5d3", | 250 | [AT91_SOC_SAMA5D3] = "sama5d3", |
245 | [AT91_SOC_NONE] = "Unknown" | 251 | [AT91_SOC_UNKNOWN] = "Unknown", |
246 | }; | 252 | }; |
247 | 253 | ||
248 | const char *at91_get_soc_type(struct at91_socinfo *c) | 254 | const char *at91_get_soc_type(struct at91_socinfo *c) |
@@ -268,7 +274,8 @@ static const char *soc_subtype_name[] = { | |||
268 | [AT91_SOC_SAMA5D33] = "sama5d33", | 274 | [AT91_SOC_SAMA5D33] = "sama5d33", |
269 | [AT91_SOC_SAMA5D34] = "sama5d34", | 275 | [AT91_SOC_SAMA5D34] = "sama5d34", |
270 | [AT91_SOC_SAMA5D35] = "sama5d35", | 276 | [AT91_SOC_SAMA5D35] = "sama5d35", |
271 | [AT91_SOC_SUBTYPE_NONE] = "Unknown" | 277 | [AT91_SOC_SUBTYPE_NONE] = "None", |
278 | [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown", | ||
272 | }; | 279 | }; |
273 | 280 | ||
274 | const char *at91_get_soc_subtype(struct at91_socinfo *c) | 281 | const char *at91_get_soc_subtype(struct at91_socinfo *c) |
@@ -282,8 +289,8 @@ void __init at91_map_io(void) | |||
282 | /* Map peripherals */ | 289 | /* Map peripherals */ |
283 | iotable_init(&at91_io_desc, 1); | 290 | iotable_init(&at91_io_desc, 1); |
284 | 291 | ||
285 | at91_soc_initdata.type = AT91_SOC_NONE; | 292 | at91_soc_initdata.type = AT91_SOC_UNKNOWN; |
286 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | 293 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN; |
287 | 294 | ||
288 | soc_detect(AT91_BASE_DBGU0); | 295 | soc_detect(AT91_BASE_DBGU0); |
289 | if (!at91_soc_is_detected()) | 296 | if (!at91_soc_is_detected()) |
@@ -294,8 +301,9 @@ void __init at91_map_io(void) | |||
294 | 301 | ||
295 | pr_info("AT91: Detected soc type: %s\n", | 302 | pr_info("AT91: Detected soc type: %s\n", |
296 | at91_get_soc_type(&at91_soc_initdata)); | 303 | at91_get_soc_type(&at91_soc_initdata)); |
297 | pr_info("AT91: Detected soc subtype: %s\n", | 304 | if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) |
298 | at91_get_soc_subtype(&at91_soc_initdata)); | 305 | pr_info("AT91: Detected soc subtype: %s\n", |
306 | at91_get_soc_subtype(&at91_soc_initdata)); | ||
299 | 307 | ||
300 | if (!at91_soc_is_enabled()) | 308 | if (!at91_soc_is_enabled()) |
301 | panic("AT91: Soc not enabled"); | 309 | panic("AT91: Soc not enabled"); |
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 76c1170b3528..e7df2dd43a40 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c | |||
@@ -15,6 +15,7 @@ | |||
15 | */ | 15 | */ |
16 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
17 | #include <linux/clkdev.h> | 17 | #include <linux/clkdev.h> |
18 | #include <linux/clocksource.h> | ||
18 | #include <linux/dma-mapping.h> | 19 | #include <linux/dma-mapping.h> |
19 | #include <linux/io.h> | 20 | #include <linux/io.h> |
20 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
@@ -28,12 +29,9 @@ | |||
28 | #include <linux/amba/bus.h> | 29 | #include <linux/amba/bus.h> |
29 | #include <linux/clk-provider.h> | 30 | #include <linux/clk-provider.h> |
30 | 31 | ||
31 | #include <asm/arch_timer.h> | ||
32 | #include <asm/cacheflush.h> | 32 | #include <asm/cacheflush.h> |
33 | #include <asm/cputype.h> | 33 | #include <asm/cputype.h> |
34 | #include <asm/smp_plat.h> | 34 | #include <asm/smp_plat.h> |
35 | #include <asm/hardware/arm_timer.h> | ||
36 | #include <asm/hardware/timer-sp.h> | ||
37 | #include <asm/hardware/cache-l2x0.h> | 35 | #include <asm/hardware/cache-l2x0.h> |
38 | #include <asm/mach/arch.h> | 36 | #include <asm/mach/arch.h> |
39 | #include <asm/mach/map.h> | 37 | #include <asm/mach/map.h> |
@@ -90,36 +88,16 @@ static void __init highbank_init_irq(void) | |||
90 | #endif | 88 | #endif |
91 | } | 89 | } |
92 | 90 | ||
93 | static struct clk_lookup lookup = { | ||
94 | .dev_id = "sp804", | ||
95 | .con_id = NULL, | ||
96 | }; | ||
97 | |||
98 | static void __init highbank_timer_init(void) | 91 | static void __init highbank_timer_init(void) |
99 | { | 92 | { |
100 | int irq; | ||
101 | struct device_node *np; | 93 | struct device_node *np; |
102 | void __iomem *timer_base; | ||
103 | 94 | ||
104 | /* Map system registers */ | 95 | /* Map system registers */ |
105 | np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); | 96 | np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); |
106 | sregs_base = of_iomap(np, 0); | 97 | sregs_base = of_iomap(np, 0); |
107 | WARN_ON(!sregs_base); | 98 | WARN_ON(!sregs_base); |
108 | 99 | ||
109 | np = of_find_compatible_node(NULL, NULL, "arm,sp804"); | ||
110 | timer_base = of_iomap(np, 0); | ||
111 | WARN_ON(!timer_base); | ||
112 | irq = irq_of_parse_and_map(np, 0); | ||
113 | |||
114 | of_clk_init(NULL); | 100 | of_clk_init(NULL); |
115 | lookup.clk = of_clk_get(np, 0); | ||
116 | clkdev_add(&lookup); | ||
117 | |||
118 | sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1"); | ||
119 | sp804_clockevents_init(timer_base, irq, "timer0"); | ||
120 | |||
121 | arch_timer_of_register(); | ||
122 | arch_timer_sched_clock_init(); | ||
123 | 101 | ||
124 | clocksource_of_init(); | 102 | clocksource_of_init(); |
125 | } | 103 | } |
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index da1091be0887..8c60fcb08a98 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -250,39 +250,6 @@ static void __init intcp_init_early(void) | |||
250 | } | 250 | } |
251 | 251 | ||
252 | #ifdef CONFIG_OF | 252 | #ifdef CONFIG_OF |
253 | |||
254 | static void __init cp_of_timer_init(void) | ||
255 | { | ||
256 | struct device_node *node; | ||
257 | const char *path; | ||
258 | void __iomem *base; | ||
259 | int err; | ||
260 | int irq; | ||
261 | |||
262 | err = of_property_read_string(of_aliases, | ||
263 | "arm,timer-primary", &path); | ||
264 | if (WARN_ON(err)) | ||
265 | return; | ||
266 | node = of_find_node_by_path(path); | ||
267 | base = of_iomap(node, 0); | ||
268 | if (WARN_ON(!base)) | ||
269 | return; | ||
270 | writel(0, base + TIMER_CTRL); | ||
271 | sp804_clocksource_init(base, node->name); | ||
272 | |||
273 | err = of_property_read_string(of_aliases, | ||
274 | "arm,timer-secondary", &path); | ||
275 | if (WARN_ON(err)) | ||
276 | return; | ||
277 | node = of_find_node_by_path(path); | ||
278 | base = of_iomap(node, 0); | ||
279 | if (WARN_ON(!base)) | ||
280 | return; | ||
281 | irq = irq_of_parse_and_map(node, 0); | ||
282 | writel(0, base + TIMER_CTRL); | ||
283 | sp804_clockevents_init(base, irq, node->name); | ||
284 | } | ||
285 | |||
286 | static const struct of_device_id fpga_irq_of_match[] __initconst = { | 253 | static const struct of_device_id fpga_irq_of_match[] __initconst = { |
287 | { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, | 254 | { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, |
288 | { /* Sentinel */ } | 255 | { /* Sentinel */ } |
@@ -383,7 +350,6 @@ DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)") | |||
383 | .init_early = intcp_init_early, | 350 | .init_early = intcp_init_early, |
384 | .init_irq = intcp_init_irq_of, | 351 | .init_irq = intcp_init_irq_of, |
385 | .handle_irq = fpga_handle_irq, | 352 | .handle_irq = fpga_handle_irq, |
386 | .init_time = cp_of_timer_init, | ||
387 | .init_machine = intcp_init_of, | 353 | .init_machine = intcp_init_of, |
388 | .restart = integrator_restart, | 354 | .restart = integrator_restart, |
389 | .dt_compat = intcp_dt_board_compat, | 355 | .dt_compat = intcp_dt_board_compat, |
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index ba769e082ad4..2d04f0e21870 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile | |||
@@ -5,6 +5,6 @@ AFLAGS_coherency_ll.o := -Wa,-march=armv7-a | |||
5 | 5 | ||
6 | obj-y += system-controller.o | 6 | obj-y += system-controller.o |
7 | obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o | 7 | obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o |
8 | obj-$(CONFIG_ARCH_MVEBU) += coherency.o coherency_ll.o pmsu.o irq-armada-370-xp.o | 8 | obj-$(CONFIG_ARCH_MVEBU) += coherency.o coherency_ll.o pmsu.o |
9 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o | 9 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
10 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | 10 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o |
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index 12d3655830d1..42a4cb3087e2 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c | |||
@@ -20,6 +20,8 @@ | |||
20 | #include <linux/clk/mvebu.h> | 20 | #include <linux/clk/mvebu.h> |
21 | #include <linux/dma-mapping.h> | 21 | #include <linux/dma-mapping.h> |
22 | #include <linux/mbus.h> | 22 | #include <linux/mbus.h> |
23 | #include <linux/irqchip.h> | ||
24 | #include <asm/hardware/cache-l2x0.h> | ||
23 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
25 | #include <asm/mach/time.h> | 27 | #include <asm/mach/time.h> |
@@ -72,6 +74,10 @@ void __init armada_370_xp_init_early(void) | |||
72 | ARMADA_370_XP_MBUS_WINS_SIZE, | 74 | ARMADA_370_XP_MBUS_WINS_SIZE, |
73 | ARMADA_370_XP_SDRAM_WINS_BASE, | 75 | ARMADA_370_XP_SDRAM_WINS_BASE, |
74 | ARMADA_370_XP_SDRAM_WINS_SIZE); | 76 | ARMADA_370_XP_SDRAM_WINS_SIZE); |
77 | |||
78 | #ifdef CONFIG_CACHE_L2X0 | ||
79 | l2x0_of_init(0, ~0UL); | ||
80 | #endif | ||
75 | } | 81 | } |
76 | 82 | ||
77 | static void __init armada_370_xp_dt_init(void) | 83 | static void __init armada_370_xp_dt_init(void) |
@@ -90,8 +96,7 @@ DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)") | |||
90 | .init_machine = armada_370_xp_dt_init, | 96 | .init_machine = armada_370_xp_dt_init, |
91 | .map_io = armada_370_xp_map_io, | 97 | .map_io = armada_370_xp_map_io, |
92 | .init_early = armada_370_xp_init_early, | 98 | .init_early = armada_370_xp_init_early, |
93 | .init_irq = armada_370_xp_init_irq, | 99 | .init_irq = irqchip_init, |
94 | .handle_irq = armada_370_xp_handle_irq, | ||
95 | .init_time = armada_370_xp_timer_and_clk_init, | 100 | .init_time = armada_370_xp_timer_and_clk_init, |
96 | .restart = mvebu_restart, | 101 | .restart = mvebu_restart, |
97 | .dt_compat = armada_370_xp_dt_compat, | 102 | .dt_compat = armada_370_xp_dt_compat, |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 5b86423c89fa..244d8a5aa54b 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -108,24 +108,13 @@ static struct platform_device *sdp2430_devices[] __initdata = { | |||
108 | #define SDP2430_LCD_PANEL_BACKLIGHT_GPIO 91 | 108 | #define SDP2430_LCD_PANEL_BACKLIGHT_GPIO 91 |
109 | #define SDP2430_LCD_PANEL_ENABLE_GPIO 154 | 109 | #define SDP2430_LCD_PANEL_ENABLE_GPIO 154 |
110 | 110 | ||
111 | static int sdp2430_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
112 | { | ||
113 | gpio_direction_output(SDP2430_LCD_PANEL_ENABLE_GPIO, 1); | ||
114 | gpio_direction_output(SDP2430_LCD_PANEL_BACKLIGHT_GPIO, 1); | ||
115 | |||
116 | return 0; | ||
117 | } | ||
118 | |||
119 | static void sdp2430_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
120 | { | ||
121 | gpio_direction_output(SDP2430_LCD_PANEL_ENABLE_GPIO, 0); | ||
122 | gpio_direction_output(SDP2430_LCD_PANEL_BACKLIGHT_GPIO, 0); | ||
123 | } | ||
124 | |||
125 | static struct panel_generic_dpi_data sdp2430_panel_data = { | 111 | static struct panel_generic_dpi_data sdp2430_panel_data = { |
126 | .name = "nec_nl2432dr22-11b", | 112 | .name = "nec_nl2432dr22-11b", |
127 | .platform_enable = sdp2430_panel_enable_lcd, | 113 | .num_gpios = 2, |
128 | .platform_disable = sdp2430_panel_disable_lcd, | 114 | .gpios = { |
115 | SDP2430_LCD_PANEL_ENABLE_GPIO, | ||
116 | SDP2430_LCD_PANEL_BACKLIGHT_GPIO, | ||
117 | }, | ||
129 | }; | 118 | }; |
130 | 119 | ||
131 | static struct omap_dss_device sdp2430_lcd_device = { | 120 | static struct omap_dss_device sdp2430_lcd_device = { |
@@ -146,26 +135,6 @@ static struct omap_dss_board_info sdp2430_dss_data = { | |||
146 | .default_device = &sdp2430_lcd_device, | 135 | .default_device = &sdp2430_lcd_device, |
147 | }; | 136 | }; |
148 | 137 | ||
149 | static void __init sdp2430_display_init(void) | ||
150 | { | ||
151 | int r; | ||
152 | |||
153 | static struct gpio gpios[] __initdata = { | ||
154 | { SDP2430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, | ||
155 | "LCD reset" }, | ||
156 | { SDP2430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, | ||
157 | "LCD Backlight" }, | ||
158 | }; | ||
159 | |||
160 | r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); | ||
161 | if (r) { | ||
162 | pr_err("Cannot request LCD GPIOs, error %d\n", r); | ||
163 | return; | ||
164 | } | ||
165 | |||
166 | omap_display_init(&sdp2430_dss_data); | ||
167 | } | ||
168 | |||
169 | #if IS_ENABLED(CONFIG_SMC91X) | 138 | #if IS_ENABLED(CONFIG_SMC91X) |
170 | 139 | ||
171 | static struct omap_smc91x_platform_data board_smc91x_data = { | 140 | static struct omap_smc91x_platform_data board_smc91x_data = { |
@@ -273,7 +242,7 @@ static void __init omap_2430sdp_init(void) | |||
273 | gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW, | 242 | gpio_request_one(SECONDARY_LCD_GPIO, GPIOF_OUT_INIT_LOW, |
274 | "Secondary LCD backlight"); | 243 | "Secondary LCD backlight"); |
275 | 244 | ||
276 | sdp2430_display_init(); | 245 | omap_display_init(&sdp2430_dss_data); |
277 | } | 246 | } |
278 | 247 | ||
279 | MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | 248 | MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index a4d4664894e1..23b004afa3f8 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
@@ -108,53 +108,38 @@ static struct twl4030_keypad_data sdp3430_kp_data = { | |||
108 | #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 | 108 | #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 |
109 | #define SDP3430_LCD_PANEL_ENABLE_GPIO 5 | 109 | #define SDP3430_LCD_PANEL_ENABLE_GPIO 5 |
110 | 110 | ||
111 | static struct gpio sdp3430_dss_gpios[] __initdata = { | ||
112 | {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" }, | ||
113 | {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"}, | ||
114 | }; | ||
115 | |||
116 | static void __init sdp3430_display_init(void) | 111 | static void __init sdp3430_display_init(void) |
117 | { | 112 | { |
118 | int r; | 113 | int r; |
119 | 114 | ||
120 | r = gpio_request_array(sdp3430_dss_gpios, | 115 | /* |
121 | ARRAY_SIZE(sdp3430_dss_gpios)); | 116 | * the backlight GPIO doesn't directly go to the panel, it enables |
117 | * an internal circuit on 3430sdp to create the signal V_BKL_28V, | ||
118 | * this is connected to LED+ pin of the sharp panel. This GPIO | ||
119 | * is left enabled in the board file, and not passed to the panel | ||
120 | * as platform_data. | ||
121 | */ | ||
122 | r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, | ||
123 | GPIOF_OUT_INIT_HIGH, "LCD Backlight"); | ||
122 | if (r) | 124 | if (r) |
123 | printk(KERN_ERR "failed to get LCD control GPIOs\n"); | 125 | pr_err("failed to get LCD Backlight GPIO\n"); |
124 | |||
125 | } | ||
126 | 126 | ||
127 | static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
128 | { | ||
129 | gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1); | ||
130 | gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1); | ||
131 | |||
132 | return 0; | ||
133 | } | ||
134 | |||
135 | static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
136 | { | ||
137 | gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0); | ||
138 | gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0); | ||
139 | } | ||
140 | |||
141 | static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev) | ||
142 | { | ||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev) | ||
147 | { | ||
148 | } | 127 | } |
149 | 128 | ||
129 | static struct panel_sharp_ls037v7dw01_data sdp3430_lcd_data = { | ||
130 | .resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO, | ||
131 | .ini_gpio = -1, | ||
132 | .mo_gpio = -1, | ||
133 | .lr_gpio = -1, | ||
134 | .ud_gpio = -1, | ||
135 | }; | ||
150 | 136 | ||
151 | static struct omap_dss_device sdp3430_lcd_device = { | 137 | static struct omap_dss_device sdp3430_lcd_device = { |
152 | .name = "lcd", | 138 | .name = "lcd", |
153 | .driver_name = "sharp_ls_panel", | 139 | .driver_name = "sharp_ls_panel", |
154 | .type = OMAP_DISPLAY_TYPE_DPI, | 140 | .type = OMAP_DISPLAY_TYPE_DPI, |
155 | .phy.dpi.data_lines = 16, | 141 | .phy.dpi.data_lines = 16, |
156 | .platform_enable = sdp3430_panel_enable_lcd, | 142 | .data = &sdp3430_lcd_data, |
157 | .platform_disable = sdp3430_panel_disable_lcd, | ||
158 | }; | 143 | }; |
159 | 144 | ||
160 | static struct tfp410_platform_data dvi_panel = { | 145 | static struct tfp410_platform_data dvi_panel = { |
@@ -175,8 +160,6 @@ static struct omap_dss_device sdp3430_tv_device = { | |||
175 | .driver_name = "venc", | 160 | .driver_name = "venc", |
176 | .type = OMAP_DISPLAY_TYPE_VENC, | 161 | .type = OMAP_DISPLAY_TYPE_VENC, |
177 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | 162 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, |
178 | .platform_enable = sdp3430_panel_enable_tv, | ||
179 | .platform_disable = sdp3430_panel_disable_tv, | ||
180 | }; | 163 | }; |
181 | 164 | ||
182 | 165 | ||
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 00d72902ef4f..56a9a4f855c7 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -730,7 +730,7 @@ static void __init omap_4430sdp_init(void) | |||
730 | omap4_sdp4430_wifi_init(); | 730 | omap4_sdp4430_wifi_init(); |
731 | omap4_twl6030_hsmmc_init(mmc); | 731 | omap4_twl6030_hsmmc_init(mmc); |
732 | 732 | ||
733 | usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto"); | 733 | usb_bind_phy("musb-hdrc.2.auto", 0, "omap-usb2.3.auto"); |
734 | usb_musb_init(&musb_board_data); | 734 | usb_musb_init(&musb_board_data); |
735 | 735 | ||
736 | status = omap_ethernet_init(); | 736 | status = omap_ethernet_init(); |
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index c29d2e743688..d63f14b534b5 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
@@ -120,63 +120,14 @@ static int __init am3517_evm_i2c_init(void) | |||
120 | return 0; | 120 | return 0; |
121 | } | 121 | } |
122 | 122 | ||
123 | static int lcd_enabled; | ||
124 | static int dvi_enabled; | ||
125 | |||
126 | #if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \ | ||
127 | defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE) | ||
128 | static struct gpio am3517_evm_dss_gpios[] __initdata = { | ||
129 | /* GPIO 182 = LCD Backlight Power */ | ||
130 | { LCD_PANEL_BKLIGHT_PWR, GPIOF_OUT_INIT_HIGH, "lcd_backlight_pwr" }, | ||
131 | /* GPIO 181 = LCD Panel PWM */ | ||
132 | { LCD_PANEL_PWM, GPIOF_OUT_INIT_HIGH, "lcd bl enable" }, | ||
133 | /* GPIO 176 = LCD Panel Power enable pin */ | ||
134 | { LCD_PANEL_PWR, GPIOF_OUT_INIT_HIGH, "dvi enable" }, | ||
135 | }; | ||
136 | |||
137 | static void __init am3517_evm_display_init(void) | ||
138 | { | ||
139 | int r; | ||
140 | |||
141 | omap_mux_init_gpio(LCD_PANEL_PWR, OMAP_PIN_INPUT_PULLUP); | ||
142 | omap_mux_init_gpio(LCD_PANEL_BKLIGHT_PWR, OMAP_PIN_INPUT_PULLDOWN); | ||
143 | omap_mux_init_gpio(LCD_PANEL_PWM, OMAP_PIN_INPUT_PULLDOWN); | ||
144 | |||
145 | r = gpio_request_array(am3517_evm_dss_gpios, | ||
146 | ARRAY_SIZE(am3517_evm_dss_gpios)); | ||
147 | if (r) { | ||
148 | printk(KERN_ERR "failed to get DSS panel control GPIOs\n"); | ||
149 | return; | ||
150 | } | ||
151 | |||
152 | printk(KERN_INFO "Display initialized successfully\n"); | ||
153 | } | ||
154 | #else | ||
155 | static void __init am3517_evm_display_init(void) {} | ||
156 | #endif | ||
157 | |||
158 | static int am3517_evm_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
159 | { | ||
160 | if (dvi_enabled) { | ||
161 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | ||
162 | return -EINVAL; | ||
163 | } | ||
164 | gpio_set_value(LCD_PANEL_PWR, 1); | ||
165 | lcd_enabled = 1; | ||
166 | |||
167 | return 0; | ||
168 | } | ||
169 | |||
170 | static void am3517_evm_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
171 | { | ||
172 | gpio_set_value(LCD_PANEL_PWR, 0); | ||
173 | lcd_enabled = 0; | ||
174 | } | ||
175 | |||
176 | static struct panel_generic_dpi_data lcd_panel = { | 123 | static struct panel_generic_dpi_data lcd_panel = { |
177 | .name = "sharp_lq", | 124 | .name = "sharp_lq", |
178 | .platform_enable = am3517_evm_panel_enable_lcd, | 125 | .num_gpios = 3, |
179 | .platform_disable = am3517_evm_panel_disable_lcd, | 126 | .gpios = { |
127 | LCD_PANEL_PWR, | ||
128 | LCD_PANEL_BKLIGHT_PWR, | ||
129 | LCD_PANEL_PWM, | ||
130 | }, | ||
180 | }; | 131 | }; |
181 | 132 | ||
182 | static struct omap_dss_device am3517_evm_lcd_device = { | 133 | static struct omap_dss_device am3517_evm_lcd_device = { |
@@ -187,22 +138,11 @@ static struct omap_dss_device am3517_evm_lcd_device = { | |||
187 | .phy.dpi.data_lines = 16, | 138 | .phy.dpi.data_lines = 16, |
188 | }; | 139 | }; |
189 | 140 | ||
190 | static int am3517_evm_panel_enable_tv(struct omap_dss_device *dssdev) | ||
191 | { | ||
192 | return 0; | ||
193 | } | ||
194 | |||
195 | static void am3517_evm_panel_disable_tv(struct omap_dss_device *dssdev) | ||
196 | { | ||
197 | } | ||
198 | |||
199 | static struct omap_dss_device am3517_evm_tv_device = { | 141 | static struct omap_dss_device am3517_evm_tv_device = { |
200 | .type = OMAP_DISPLAY_TYPE_VENC, | 142 | .type = OMAP_DISPLAY_TYPE_VENC, |
201 | .name = "tv", | 143 | .name = "tv", |
202 | .driver_name = "venc", | 144 | .driver_name = "venc", |
203 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | 145 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, |
204 | .platform_enable = am3517_evm_panel_enable_tv, | ||
205 | .platform_disable = am3517_evm_panel_disable_tv, | ||
206 | }; | 146 | }; |
207 | 147 | ||
208 | static struct tfp410_platform_data dvi_panel = { | 148 | static struct tfp410_platform_data dvi_panel = { |
@@ -365,8 +305,6 @@ static void __init am3517_evm_init(void) | |||
365 | usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); | 305 | usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); |
366 | usbhs_init(&usbhs_bdata); | 306 | usbhs_init(&usbhs_bdata); |
367 | am3517_evm_hecc_init(&am3517_evm_hecc_pdata); | 307 | am3517_evm_hecc_init(&am3517_evm_hecc_pdata); |
368 | /* DSS */ | ||
369 | am3517_evm_display_init(); | ||
370 | 308 | ||
371 | /* RTC - S35390A */ | 309 | /* RTC - S35390A */ |
372 | am3517_evm_rtc_init(); | 310 | am3517_evm_rtc_init(); |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index e0ed8c07fc54..ee6218c74807 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -190,45 +190,12 @@ static inline void cm_t35_init_nand(void) {} | |||
190 | #define CM_T35_LCD_BL_GPIO 58 | 190 | #define CM_T35_LCD_BL_GPIO 58 |
191 | #define CM_T35_DVI_EN_GPIO 54 | 191 | #define CM_T35_DVI_EN_GPIO 54 |
192 | 192 | ||
193 | static int lcd_enabled; | ||
194 | static int dvi_enabled; | ||
195 | |||
196 | static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
197 | { | ||
198 | if (dvi_enabled) { | ||
199 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | ||
200 | return -EINVAL; | ||
201 | } | ||
202 | |||
203 | gpio_set_value(CM_T35_LCD_EN_GPIO, 1); | ||
204 | gpio_set_value(CM_T35_LCD_BL_GPIO, 1); | ||
205 | |||
206 | lcd_enabled = 1; | ||
207 | |||
208 | return 0; | ||
209 | } | ||
210 | |||
211 | static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
212 | { | ||
213 | lcd_enabled = 0; | ||
214 | |||
215 | gpio_set_value(CM_T35_LCD_BL_GPIO, 0); | ||
216 | gpio_set_value(CM_T35_LCD_EN_GPIO, 0); | ||
217 | } | ||
218 | |||
219 | static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev) | ||
220 | { | ||
221 | return 0; | ||
222 | } | ||
223 | |||
224 | static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev) | ||
225 | { | ||
226 | } | ||
227 | |||
228 | static struct panel_generic_dpi_data lcd_panel = { | 193 | static struct panel_generic_dpi_data lcd_panel = { |
229 | .name = "toppoly_tdo35s", | 194 | .name = "toppoly_tdo35s", |
230 | .platform_enable = cm_t35_panel_enable_lcd, | 195 | .num_gpios = 1, |
231 | .platform_disable = cm_t35_panel_disable_lcd, | 196 | .gpios = { |
197 | CM_T35_LCD_BL_GPIO, | ||
198 | }, | ||
232 | }; | 199 | }; |
233 | 200 | ||
234 | static struct omap_dss_device cm_t35_lcd_device = { | 201 | static struct omap_dss_device cm_t35_lcd_device = { |
@@ -257,8 +224,6 @@ static struct omap_dss_device cm_t35_tv_device = { | |||
257 | .driver_name = "venc", | 224 | .driver_name = "venc", |
258 | .type = OMAP_DISPLAY_TYPE_VENC, | 225 | .type = OMAP_DISPLAY_TYPE_VENC, |
259 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | 226 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, |
260 | .platform_enable = cm_t35_panel_enable_tv, | ||
261 | .platform_disable = cm_t35_panel_disable_tv, | ||
262 | }; | 227 | }; |
263 | 228 | ||
264 | static struct omap_dss_device *cm_t35_dss_devices[] = { | 229 | static struct omap_dss_device *cm_t35_dss_devices[] = { |
@@ -292,11 +257,6 @@ static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = { | |||
292 | }, | 257 | }, |
293 | }; | 258 | }; |
294 | 259 | ||
295 | static struct gpio cm_t35_dss_gpios[] __initdata = { | ||
296 | { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" }, | ||
297 | { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" }, | ||
298 | }; | ||
299 | |||
300 | static void __init cm_t35_init_display(void) | 260 | static void __init cm_t35_init_display(void) |
301 | { | 261 | { |
302 | int err; | 262 | int err; |
@@ -304,23 +264,21 @@ static void __init cm_t35_init_display(void) | |||
304 | spi_register_board_info(cm_t35_lcd_spi_board_info, | 264 | spi_register_board_info(cm_t35_lcd_spi_board_info, |
305 | ARRAY_SIZE(cm_t35_lcd_spi_board_info)); | 265 | ARRAY_SIZE(cm_t35_lcd_spi_board_info)); |
306 | 266 | ||
307 | err = gpio_request_array(cm_t35_dss_gpios, | 267 | |
308 | ARRAY_SIZE(cm_t35_dss_gpios)); | 268 | err = gpio_request_one(CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, |
269 | "lcd bl enable"); | ||
309 | if (err) { | 270 | if (err) { |
310 | pr_err("CM-T35: failed to request DSS control GPIOs\n"); | 271 | pr_err("CM-T35: failed to request LCD EN GPIO\n"); |
311 | return; | 272 | return; |
312 | } | 273 | } |
313 | 274 | ||
314 | gpio_export(CM_T35_LCD_EN_GPIO, 0); | ||
315 | gpio_export(CM_T35_LCD_BL_GPIO, 0); | ||
316 | |||
317 | msleep(50); | 275 | msleep(50); |
318 | gpio_set_value(CM_T35_LCD_EN_GPIO, 1); | 276 | gpio_set_value(CM_T35_LCD_EN_GPIO, 1); |
319 | 277 | ||
320 | err = omap_display_init(&cm_t35_dss_data); | 278 | err = omap_display_init(&cm_t35_dss_data); |
321 | if (err) { | 279 | if (err) { |
322 | pr_err("CM-T35: failed to register DSS device\n"); | 280 | pr_err("CM-T35: failed to register DSS device\n"); |
323 | gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios)); | 281 | gpio_free(CM_T35_LCD_EN_GPIO); |
324 | } | 282 | } |
325 | } | 283 | } |
326 | 284 | ||
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index e44b804f75ae..576420544178 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c | |||
@@ -103,19 +103,6 @@ static struct omap2_hsmmc_info mmc[] = { | |||
103 | {} /* Terminator */ | 103 | {} /* Terminator */ |
104 | }; | 104 | }; |
105 | 105 | ||
106 | static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
107 | { | ||
108 | if (gpio_is_valid(dssdev->reset_gpio)) | ||
109 | gpio_set_value_cansleep(dssdev->reset_gpio, 1); | ||
110 | return 0; | ||
111 | } | ||
112 | |||
113 | static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
114 | { | ||
115 | if (gpio_is_valid(dssdev->reset_gpio)) | ||
116 | gpio_set_value_cansleep(dssdev->reset_gpio, 0); | ||
117 | } | ||
118 | |||
119 | static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { | 106 | static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { |
120 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | 107 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), |
121 | }; | 108 | }; |
@@ -127,8 +114,7 @@ static struct regulator_consumer_supply devkit8000_vio_supply[] = { | |||
127 | 114 | ||
128 | static struct panel_generic_dpi_data lcd_panel = { | 115 | static struct panel_generic_dpi_data lcd_panel = { |
129 | .name = "innolux_at070tn83", | 116 | .name = "innolux_at070tn83", |
130 | .platform_enable = devkit8000_panel_enable_lcd, | 117 | /* gpios filled in code */ |
131 | .platform_disable = devkit8000_panel_disable_lcd, | ||
132 | }; | 118 | }; |
133 | 119 | ||
134 | static struct omap_dss_device devkit8000_lcd_device = { | 120 | static struct omap_dss_device devkit8000_lcd_device = { |
@@ -210,8 +196,6 @@ static struct gpio_led gpio_leds[]; | |||
210 | static int devkit8000_twl_gpio_setup(struct device *dev, | 196 | static int devkit8000_twl_gpio_setup(struct device *dev, |
211 | unsigned gpio, unsigned ngpio) | 197 | unsigned gpio, unsigned ngpio) |
212 | { | 198 | { |
213 | int ret; | ||
214 | |||
215 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 199 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
216 | mmc[0].gpio_cd = gpio + 0; | 200 | mmc[0].gpio_cd = gpio + 0; |
217 | omap_hsmmc_late_init(mmc); | 201 | omap_hsmmc_late_init(mmc); |
@@ -220,13 +204,8 @@ static int devkit8000_twl_gpio_setup(struct device *dev, | |||
220 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | 204 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; |
221 | 205 | ||
222 | /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ | 206 | /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ |
223 | devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; | 207 | lcd_panel.num_gpios = 1; |
224 | ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, | 208 | lcd_panel.gpios[0] = gpio + TWL4030_GPIO_MAX + 0; |
225 | GPIOF_OUT_INIT_LOW, "LCD_PWREN"); | ||
226 | if (ret < 0) { | ||
227 | devkit8000_lcd_device.reset_gpio = -EINVAL; | ||
228 | printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); | ||
229 | } | ||
230 | 209 | ||
231 | /* gpio + 7 is "DVI_PD" (out, active low) */ | 210 | /* gpio + 7 is "DVI_PD" (out, active low) */ |
232 | dvi_panel.power_down_gpio = gpio + 7; | 211 | dvi_panel.power_down_gpio = gpio + 7; |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 8a8e505a0e90..d0d17bc58d9b 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
@@ -181,34 +181,13 @@ static inline void __init ldp_init_smsc911x(void) | |||
181 | 181 | ||
182 | /* LCD */ | 182 | /* LCD */ |
183 | 183 | ||
184 | static int ldp_backlight_gpio; | ||
185 | static int ldp_lcd_enable_gpio; | ||
186 | |||
187 | #define LCD_PANEL_RESET_GPIO 55 | 184 | #define LCD_PANEL_RESET_GPIO 55 |
188 | #define LCD_PANEL_QVGA_GPIO 56 | 185 | #define LCD_PANEL_QVGA_GPIO 56 |
189 | 186 | ||
190 | static int ldp_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
191 | { | ||
192 | if (gpio_is_valid(ldp_lcd_enable_gpio)) | ||
193 | gpio_direction_output(ldp_lcd_enable_gpio, 1); | ||
194 | if (gpio_is_valid(ldp_backlight_gpio)) | ||
195 | gpio_direction_output(ldp_backlight_gpio, 1); | ||
196 | |||
197 | return 0; | ||
198 | } | ||
199 | |||
200 | static void ldp_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
201 | { | ||
202 | if (gpio_is_valid(ldp_lcd_enable_gpio)) | ||
203 | gpio_direction_output(ldp_lcd_enable_gpio, 0); | ||
204 | if (gpio_is_valid(ldp_backlight_gpio)) | ||
205 | gpio_direction_output(ldp_backlight_gpio, 0); | ||
206 | } | ||
207 | |||
208 | static struct panel_generic_dpi_data ldp_panel_data = { | 187 | static struct panel_generic_dpi_data ldp_panel_data = { |
209 | .name = "nec_nl2432dr22-11b", | 188 | .name = "nec_nl2432dr22-11b", |
210 | .platform_enable = ldp_panel_enable_lcd, | 189 | .num_gpios = 4, |
211 | .platform_disable = ldp_panel_disable_lcd, | 190 | /* gpios filled in code */ |
212 | }; | 191 | }; |
213 | 192 | ||
214 | static struct omap_dss_device ldp_lcd_device = { | 193 | static struct omap_dss_device ldp_lcd_device = { |
@@ -231,41 +210,19 @@ static struct omap_dss_board_info ldp_dss_data = { | |||
231 | 210 | ||
232 | static void __init ldp_display_init(void) | 211 | static void __init ldp_display_init(void) |
233 | { | 212 | { |
234 | int r; | 213 | ldp_panel_data.gpios[2] = LCD_PANEL_RESET_GPIO; |
235 | 214 | ldp_panel_data.gpios[3] = LCD_PANEL_QVGA_GPIO; | |
236 | static struct gpio gpios[] __initdata = { | ||
237 | {LCD_PANEL_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "LCD RESET"}, | ||
238 | {LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "LCD QVGA"}, | ||
239 | }; | ||
240 | |||
241 | r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); | ||
242 | if (r) { | ||
243 | pr_err("Cannot request LCD GPIOs, error %d\n", r); | ||
244 | return; | ||
245 | } | ||
246 | 215 | ||
247 | omap_display_init(&ldp_dss_data); | 216 | omap_display_init(&ldp_dss_data); |
248 | } | 217 | } |
249 | 218 | ||
250 | static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) | 219 | static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) |
251 | { | 220 | { |
252 | int r; | 221 | ldp_panel_data.gpios[0] = gpio + 7; |
253 | 222 | ldp_panel_data.gpio_invert[0] = true; | |
254 | struct gpio gpios[] = { | 223 | |
255 | {gpio + 7 , GPIOF_OUT_INIT_LOW, "LCD ENABLE"}, | 224 | ldp_panel_data.gpios[1] = gpio + 15; |
256 | {gpio + 15, GPIOF_OUT_INIT_LOW, "LCD BACKLIGHT"}, | 225 | ldp_panel_data.gpio_invert[1] = true; |
257 | }; | ||
258 | |||
259 | r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); | ||
260 | if (r) { | ||
261 | pr_err("Cannot request LCD GPIOs, error %d\n", r); | ||
262 | ldp_backlight_gpio = -EINVAL; | ||
263 | ldp_lcd_enable_gpio = -EINVAL; | ||
264 | return r; | ||
265 | } | ||
266 | |||
267 | ldp_backlight_gpio = gpio + 15; | ||
268 | ldp_lcd_enable_gpio = gpio + 7; | ||
269 | 226 | ||
270 | return 0; | 227 | return 0; |
271 | } | 228 | } |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 4f1bbc3cc29b..f76d0de7b406 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -155,61 +155,43 @@ static inline void __init omap3evm_init_smsc911x(void) { return; } | |||
155 | #define OMAP3EVM_LCD_PANEL_LR 2 | 155 | #define OMAP3EVM_LCD_PANEL_LR 2 |
156 | #define OMAP3EVM_LCD_PANEL_UD 3 | 156 | #define OMAP3EVM_LCD_PANEL_UD 3 |
157 | #define OMAP3EVM_LCD_PANEL_INI 152 | 157 | #define OMAP3EVM_LCD_PANEL_INI 152 |
158 | #define OMAP3EVM_LCD_PANEL_ENVDD 153 | ||
159 | #define OMAP3EVM_LCD_PANEL_QVGA 154 | 158 | #define OMAP3EVM_LCD_PANEL_QVGA 154 |
160 | #define OMAP3EVM_LCD_PANEL_RESB 155 | 159 | #define OMAP3EVM_LCD_PANEL_RESB 155 |
160 | |||
161 | #define OMAP3EVM_LCD_PANEL_ENVDD 153 | ||
161 | #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 | 162 | #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210 |
163 | |||
164 | /* | ||
165 | * OMAP3EVM DVI control signals | ||
166 | */ | ||
162 | #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 | 167 | #define OMAP3EVM_DVI_PANEL_EN_GPIO 199 |
163 | 168 | ||
164 | static struct gpio omap3_evm_dss_gpios[] __initdata = { | 169 | static struct panel_sharp_ls037v7dw01_data omap3_evm_lcd_data = { |
165 | { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" }, | 170 | .resb_gpio = OMAP3EVM_LCD_PANEL_RESB, |
166 | { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" }, | 171 | .ini_gpio = OMAP3EVM_LCD_PANEL_INI, |
167 | { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" }, | 172 | .mo_gpio = OMAP3EVM_LCD_PANEL_QVGA, |
168 | { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" }, | 173 | .lr_gpio = OMAP3EVM_LCD_PANEL_LR, |
169 | { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" }, | 174 | .ud_gpio = OMAP3EVM_LCD_PANEL_UD, |
170 | { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" }, | ||
171 | }; | 175 | }; |
172 | 176 | ||
173 | static int lcd_enabled; | ||
174 | static int dvi_enabled; | ||
175 | |||
176 | static void __init omap3_evm_display_init(void) | 177 | static void __init omap3_evm_display_init(void) |
177 | { | 178 | { |
178 | int r; | 179 | int r; |
179 | 180 | ||
180 | r = gpio_request_array(omap3_evm_dss_gpios, | 181 | r = gpio_request_one(OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, |
181 | ARRAY_SIZE(omap3_evm_dss_gpios)); | 182 | "lcd_panel_envdd"); |
182 | if (r) | 183 | if (r) |
183 | printk(KERN_ERR "failed to get lcd_panel_* gpios\n"); | 184 | pr_err("failed to get lcd_panel_envdd GPIO\n"); |
184 | } | ||
185 | 185 | ||
186 | static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev) | 186 | r = gpio_request_one(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, |
187 | { | 187 | GPIOF_OUT_INIT_LOW, "lcd_panel_bklight"); |
188 | if (dvi_enabled) { | 188 | if (r) |
189 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | 189 | pr_err("failed to get lcd_panel_bklight GPIO\n"); |
190 | return -EINVAL; | ||
191 | } | ||
192 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0); | ||
193 | 190 | ||
194 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | 191 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) |
195 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); | 192 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); |
196 | else | 193 | else |
197 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); | 194 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); |
198 | |||
199 | lcd_enabled = 1; | ||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev) | ||
204 | { | ||
205 | gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1); | ||
206 | |||
207 | if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) | ||
208 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1); | ||
209 | else | ||
210 | gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0); | ||
211 | |||
212 | lcd_enabled = 0; | ||
213 | } | 195 | } |
214 | 196 | ||
215 | static struct omap_dss_device omap3_evm_lcd_device = { | 197 | static struct omap_dss_device omap3_evm_lcd_device = { |
@@ -217,26 +199,14 @@ static struct omap_dss_device omap3_evm_lcd_device = { | |||
217 | .driver_name = "sharp_ls_panel", | 199 | .driver_name = "sharp_ls_panel", |
218 | .type = OMAP_DISPLAY_TYPE_DPI, | 200 | .type = OMAP_DISPLAY_TYPE_DPI, |
219 | .phy.dpi.data_lines = 18, | 201 | .phy.dpi.data_lines = 18, |
220 | .platform_enable = omap3_evm_enable_lcd, | 202 | .data = &omap3_evm_lcd_data, |
221 | .platform_disable = omap3_evm_disable_lcd, | ||
222 | }; | 203 | }; |
223 | 204 | ||
224 | static int omap3_evm_enable_tv(struct omap_dss_device *dssdev) | ||
225 | { | ||
226 | return 0; | ||
227 | } | ||
228 | |||
229 | static void omap3_evm_disable_tv(struct omap_dss_device *dssdev) | ||
230 | { | ||
231 | } | ||
232 | |||
233 | static struct omap_dss_device omap3_evm_tv_device = { | 205 | static struct omap_dss_device omap3_evm_tv_device = { |
234 | .name = "tv", | 206 | .name = "tv", |
235 | .driver_name = "venc", | 207 | .driver_name = "venc", |
236 | .type = OMAP_DISPLAY_TYPE_VENC, | 208 | .type = OMAP_DISPLAY_TYPE_VENC, |
237 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | 209 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, |
238 | .platform_enable = omap3_evm_enable_tv, | ||
239 | .platform_disable = omap3_evm_disable_tv, | ||
240 | }; | 210 | }; |
241 | 211 | ||
242 | static struct tfp410_platform_data dvi_panel = { | 212 | static struct tfp410_platform_data dvi_panel = { |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 1004d2aaa68f..28133d5b4fed 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -44,6 +44,7 @@ | |||
44 | 44 | ||
45 | #include "common.h" | 45 | #include "common.h" |
46 | #include <video/omapdss.h> | 46 | #include <video/omapdss.h> |
47 | #include <video/omap-panel-data.h> | ||
47 | #include <linux/platform_data/mtd-nand-omap2.h> | 48 | #include <linux/platform_data/mtd-nand-omap2.h> |
48 | 49 | ||
49 | #include "mux.h" | 50 | #include "mux.h" |
@@ -230,12 +231,16 @@ static struct twl4030_keypad_data pandora_kp_data = { | |||
230 | .rep = 1, | 231 | .rep = 1, |
231 | }; | 232 | }; |
232 | 233 | ||
234 | static struct panel_tpo_td043_data lcd_data = { | ||
235 | .nreset_gpio = 157, | ||
236 | }; | ||
237 | |||
233 | static struct omap_dss_device pandora_lcd_device = { | 238 | static struct omap_dss_device pandora_lcd_device = { |
234 | .name = "lcd", | 239 | .name = "lcd", |
235 | .driver_name = "tpo_td043mtea1_panel", | 240 | .driver_name = "tpo_td043mtea1_panel", |
236 | .type = OMAP_DISPLAY_TYPE_DPI, | 241 | .type = OMAP_DISPLAY_TYPE_DPI, |
237 | .phy.dpi.data_lines = 24, | 242 | .phy.dpi.data_lines = 24, |
238 | .reset_gpio = 157, | 243 | .data = &lcd_data, |
239 | }; | 244 | }; |
240 | 245 | ||
241 | static struct omap_dss_device pandora_tv_device = { | 246 | static struct omap_dss_device pandora_tv_device = { |
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 8afbba0923d6..d37e6b187ae4 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c | |||
@@ -94,15 +94,6 @@ static void __init omap3_stalker_display_init(void) | |||
94 | return; | 94 | return; |
95 | } | 95 | } |
96 | 96 | ||
97 | static int omap3_stalker_enable_tv(struct omap_dss_device *dssdev) | ||
98 | { | ||
99 | return 0; | ||
100 | } | ||
101 | |||
102 | static void omap3_stalker_disable_tv(struct omap_dss_device *dssdev) | ||
103 | { | ||
104 | } | ||
105 | |||
106 | static struct omap_dss_device omap3_stalker_tv_device = { | 97 | static struct omap_dss_device omap3_stalker_tv_device = { |
107 | .name = "tv", | 98 | .name = "tv", |
108 | .driver_name = "venc", | 99 | .driver_name = "venc", |
@@ -112,8 +103,6 @@ static struct omap_dss_device omap3_stalker_tv_device = { | |||
112 | #elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE) | 103 | #elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE) |
113 | .u.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, | 104 | .u.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE, |
114 | #endif | 105 | #endif |
115 | .platform_enable = omap3_stalker_enable_tv, | ||
116 | .platform_disable = omap3_stalker_disable_tv, | ||
117 | }; | 106 | }; |
118 | 107 | ||
119 | static struct tfp410_platform_data dvi_panel = { | 108 | static struct tfp410_platform_data dvi_panel = { |
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index a71ad345f20d..1e2c75eee912 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c | |||
@@ -435,7 +435,7 @@ static void __init omap4_panda_init(void) | |||
435 | omap_sdrc_init(NULL, NULL); | 435 | omap_sdrc_init(NULL, NULL); |
436 | omap4_twl6030_hsmmc_init(mmc); | 436 | omap4_twl6030_hsmmc_init(mmc); |
437 | omap4_ehci_init(); | 437 | omap4_ehci_init(); |
438 | usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto"); | 438 | usb_bind_phy("musb-hdrc.2.auto", 0, "omap-usb2.3.auto"); |
439 | usb_musb_init(&musb_board_data); | 439 | usb_musb_init(&musb_board_data); |
440 | omap4_panda_display_init(); | 440 | omap4_panda_display_init(); |
441 | } | 441 | } |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index f9101407cd56..4ca6b680aa72 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -145,28 +145,9 @@ static inline void __init overo_init_smsc911x(void) { return; } | |||
145 | #endif | 145 | #endif |
146 | 146 | ||
147 | /* DSS */ | 147 | /* DSS */ |
148 | static int lcd_enabled; | ||
149 | static int dvi_enabled; | ||
150 | |||
151 | #define OVERO_GPIO_LCD_EN 144 | 148 | #define OVERO_GPIO_LCD_EN 144 |
152 | #define OVERO_GPIO_LCD_BL 145 | 149 | #define OVERO_GPIO_LCD_BL 145 |
153 | 150 | ||
154 | static struct gpio overo_dss_gpios[] __initdata = { | ||
155 | { OVERO_GPIO_LCD_EN, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_EN" }, | ||
156 | { OVERO_GPIO_LCD_BL, GPIOF_OUT_INIT_HIGH, "OVERO_GPIO_LCD_BL" }, | ||
157 | }; | ||
158 | |||
159 | static void __init overo_display_init(void) | ||
160 | { | ||
161 | if (gpio_request_array(overo_dss_gpios, ARRAY_SIZE(overo_dss_gpios))) { | ||
162 | printk(KERN_ERR "could not obtain DSS control GPIOs\n"); | ||
163 | return; | ||
164 | } | ||
165 | |||
166 | gpio_export(OVERO_GPIO_LCD_EN, 0); | ||
167 | gpio_export(OVERO_GPIO_LCD_BL, 0); | ||
168 | } | ||
169 | |||
170 | static struct tfp410_platform_data dvi_panel = { | 151 | static struct tfp410_platform_data dvi_panel = { |
171 | .i2c_bus_num = 3, | 152 | .i2c_bus_num = 3, |
172 | .power_down_gpio = -1, | 153 | .power_down_gpio = -1, |
@@ -187,30 +168,13 @@ static struct omap_dss_device overo_tv_device = { | |||
187 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | 168 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, |
188 | }; | 169 | }; |
189 | 170 | ||
190 | static int overo_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
191 | { | ||
192 | if (dvi_enabled) { | ||
193 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | ||
194 | return -EINVAL; | ||
195 | } | ||
196 | |||
197 | gpio_set_value(OVERO_GPIO_LCD_EN, 1); | ||
198 | gpio_set_value(OVERO_GPIO_LCD_BL, 1); | ||
199 | lcd_enabled = 1; | ||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | static void overo_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
204 | { | ||
205 | gpio_set_value(OVERO_GPIO_LCD_EN, 0); | ||
206 | gpio_set_value(OVERO_GPIO_LCD_BL, 0); | ||
207 | lcd_enabled = 0; | ||
208 | } | ||
209 | |||
210 | static struct panel_generic_dpi_data lcd43_panel = { | 171 | static struct panel_generic_dpi_data lcd43_panel = { |
211 | .name = "samsung_lte430wq_f0c", | 172 | .name = "samsung_lte430wq_f0c", |
212 | .platform_enable = overo_panel_enable_lcd, | 173 | .num_gpios = 2, |
213 | .platform_disable = overo_panel_disable_lcd, | 174 | .gpios = { |
175 | OVERO_GPIO_LCD_EN, | ||
176 | OVERO_GPIO_LCD_BL | ||
177 | }, | ||
214 | }; | 178 | }; |
215 | 179 | ||
216 | static struct omap_dss_device overo_lcd43_device = { | 180 | static struct omap_dss_device overo_lcd43_device = { |
@@ -223,13 +187,20 @@ static struct omap_dss_device overo_lcd43_device = { | |||
223 | 187 | ||
224 | #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ | 188 | #if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ |
225 | defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) | 189 | defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) |
190 | static struct panel_generic_dpi_data lcd35_panel = { | ||
191 | .num_gpios = 2, | ||
192 | .gpios = { | ||
193 | OVERO_GPIO_LCD_EN, | ||
194 | OVERO_GPIO_LCD_BL | ||
195 | }, | ||
196 | }; | ||
197 | |||
226 | static struct omap_dss_device overo_lcd35_device = { | 198 | static struct omap_dss_device overo_lcd35_device = { |
227 | .type = OMAP_DISPLAY_TYPE_DPI, | 199 | .type = OMAP_DISPLAY_TYPE_DPI, |
228 | .name = "lcd35", | 200 | .name = "lcd35", |
229 | .driver_name = "lgphilips_lb035q02_panel", | 201 | .driver_name = "lgphilips_lb035q02_panel", |
230 | .phy.dpi.data_lines = 24, | 202 | .phy.dpi.data_lines = 24, |
231 | .platform_enable = overo_panel_enable_lcd, | 203 | .data = &lcd35_panel, |
232 | .platform_disable = overo_panel_disable_lcd, | ||
233 | }; | 204 | }; |
234 | #endif | 205 | #endif |
235 | 206 | ||
@@ -508,7 +479,6 @@ static void __init overo_init(void) | |||
508 | usbhs_init(&usbhs_bdata); | 479 | usbhs_init(&usbhs_bdata); |
509 | overo_spi_init(); | 480 | overo_spi_init(); |
510 | overo_init_smsc911x(); | 481 | overo_init_smsc911x(); |
511 | overo_display_init(); | ||
512 | overo_init_led(); | 482 | overo_init_led(); |
513 | overo_init_keys(); | 483 | overo_init_keys(); |
514 | omap_twl4030_audio_init("overo", NULL); | 484 | omap_twl4030_audio_init("overo", NULL); |
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c index eb667261df08..bd74f9f6063b 100644 --- a/arch/arm/mach-omap2/board-rx51-video.c +++ b/arch/arm/mach-omap2/board-rx51-video.c | |||
@@ -16,6 +16,8 @@ | |||
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
17 | #include <asm/mach-types.h> | 17 | #include <asm/mach-types.h> |
18 | #include <video/omapdss.h> | 18 | #include <video/omapdss.h> |
19 | #include <video/omap-panel-data.h> | ||
20 | |||
19 | #include <linux/platform_data/spi-omap2-mcspi.h> | 21 | #include <linux/platform_data/spi-omap2-mcspi.h> |
20 | 22 | ||
21 | #include "soc.h" | 23 | #include "soc.h" |
@@ -27,25 +29,16 @@ | |||
27 | 29 | ||
28 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) | 30 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) |
29 | 31 | ||
30 | static int rx51_lcd_enable(struct omap_dss_device *dssdev) | 32 | static struct panel_acx565akm_data lcd_data = { |
31 | { | 33 | .reset_gpio = RX51_LCD_RESET_GPIO, |
32 | gpio_set_value(dssdev->reset_gpio, 1); | 34 | }; |
33 | return 0; | ||
34 | } | ||
35 | |||
36 | static void rx51_lcd_disable(struct omap_dss_device *dssdev) | ||
37 | { | ||
38 | gpio_set_value(dssdev->reset_gpio, 0); | ||
39 | } | ||
40 | 35 | ||
41 | static struct omap_dss_device rx51_lcd_device = { | 36 | static struct omap_dss_device rx51_lcd_device = { |
42 | .name = "lcd", | 37 | .name = "lcd", |
43 | .driver_name = "panel-acx565akm", | 38 | .driver_name = "panel-acx565akm", |
44 | .type = OMAP_DISPLAY_TYPE_SDI, | 39 | .type = OMAP_DISPLAY_TYPE_SDI, |
45 | .phy.sdi.datapairs = 2, | 40 | .phy.sdi.datapairs = 2, |
46 | .reset_gpio = RX51_LCD_RESET_GPIO, | 41 | .data = &lcd_data, |
47 | .platform_enable = rx51_lcd_enable, | ||
48 | .platform_disable = rx51_lcd_disable, | ||
49 | }; | 42 | }; |
50 | 43 | ||
51 | static struct omap_dss_device rx51_tv_device = { | 44 | static struct omap_dss_device rx51_tv_device = { |
@@ -76,13 +69,8 @@ static int __init rx51_video_init(void) | |||
76 | return 0; | 69 | return 0; |
77 | } | 70 | } |
78 | 71 | ||
79 | if (gpio_request_one(RX51_LCD_RESET_GPIO, GPIOF_OUT_INIT_HIGH, | ||
80 | "LCD ACX565AKM reset")) { | ||
81 | pr_err("%s failed to get LCD Reset GPIO\n", __func__); | ||
82 | return 0; | ||
83 | } | ||
84 | |||
85 | omap_display_init(&rx51_dss_board_info); | 72 | omap_display_init(&rx51_dss_board_info); |
73 | |||
86 | return 0; | 74 | return 0; |
87 | } | 75 | } |
88 | 76 | ||
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c index 9a7174faac51..c2a079cb76fc 100644 --- a/arch/arm/mach-omap2/board-zoom-display.c +++ b/arch/arm/mach-omap2/board-zoom-display.c | |||
@@ -15,8 +15,9 @@ | |||
15 | #include <linux/spi/spi.h> | 15 | #include <linux/spi/spi.h> |
16 | #include <linux/platform_data/spi-omap2-mcspi.h> | 16 | #include <linux/platform_data/spi-omap2-mcspi.h> |
17 | #include <video/omapdss.h> | 17 | #include <video/omapdss.h> |
18 | #include "board-zoom.h" | 18 | #include <video/omap-panel-data.h> |
19 | 19 | ||
20 | #include "board-zoom.h" | ||
20 | #include "soc.h" | 21 | #include "soc.h" |
21 | #include "common.h" | 22 | #include "common.h" |
22 | 23 | ||
@@ -24,37 +25,17 @@ | |||
24 | #define LCD_PANEL_RESET_GPIO_PILOT 55 | 25 | #define LCD_PANEL_RESET_GPIO_PILOT 55 |
25 | #define LCD_PANEL_QVGA_GPIO 56 | 26 | #define LCD_PANEL_QVGA_GPIO 56 |
26 | 27 | ||
27 | static struct gpio zoom_lcd_gpios[] __initdata = { | 28 | static struct panel_nec_nl8048_data zoom_lcd_data = { |
28 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "lcd reset" }, | 29 | /* res_gpio filled in code */ |
29 | { LCD_PANEL_QVGA_GPIO, GPIOF_OUT_INIT_HIGH, "lcd qvga" }, | 30 | .qvga_gpio = LCD_PANEL_QVGA_GPIO, |
30 | }; | 31 | }; |
31 | 32 | ||
32 | static void __init zoom_lcd_panel_init(void) | ||
33 | { | ||
34 | zoom_lcd_gpios[0].gpio = (omap_rev() > OMAP3430_REV_ES3_0) ? | ||
35 | LCD_PANEL_RESET_GPIO_PROD : | ||
36 | LCD_PANEL_RESET_GPIO_PILOT; | ||
37 | |||
38 | if (gpio_request_array(zoom_lcd_gpios, ARRAY_SIZE(zoom_lcd_gpios))) | ||
39 | pr_err("%s: Failed to get LCD GPIOs.\n", __func__); | ||
40 | } | ||
41 | |||
42 | static int zoom_panel_enable_lcd(struct omap_dss_device *dssdev) | ||
43 | { | ||
44 | return 0; | ||
45 | } | ||
46 | |||
47 | static void zoom_panel_disable_lcd(struct omap_dss_device *dssdev) | ||
48 | { | ||
49 | } | ||
50 | |||
51 | static struct omap_dss_device zoom_lcd_device = { | 33 | static struct omap_dss_device zoom_lcd_device = { |
52 | .name = "lcd", | 34 | .name = "lcd", |
53 | .driver_name = "NEC_8048_panel", | 35 | .driver_name = "NEC_8048_panel", |
54 | .type = OMAP_DISPLAY_TYPE_DPI, | 36 | .type = OMAP_DISPLAY_TYPE_DPI, |
55 | .phy.dpi.data_lines = 24, | 37 | .phy.dpi.data_lines = 24, |
56 | .platform_enable = zoom_panel_enable_lcd, | 38 | .data = &zoom_lcd_data, |
57 | .platform_disable = zoom_panel_disable_lcd, | ||
58 | }; | 39 | }; |
59 | 40 | ||
60 | static struct omap_dss_device *zoom_dss_devices[] = { | 41 | static struct omap_dss_device *zoom_dss_devices[] = { |
@@ -67,6 +48,13 @@ static struct omap_dss_board_info zoom_dss_data = { | |||
67 | .default_device = &zoom_lcd_device, | 48 | .default_device = &zoom_lcd_device, |
68 | }; | 49 | }; |
69 | 50 | ||
51 | static void __init zoom_lcd_panel_init(void) | ||
52 | { | ||
53 | zoom_lcd_data.res_gpio = (omap_rev() > OMAP3430_REV_ES3_0) ? | ||
54 | LCD_PANEL_RESET_GPIO_PROD : | ||
55 | LCD_PANEL_RESET_GPIO_PILOT; | ||
56 | } | ||
57 | |||
70 | static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { | 58 | static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { |
71 | .turbo_mode = 1, | 59 | .turbo_mode = 1, |
72 | }; | 60 | }; |
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c index 9c49bbe825f7..393aeefaebb0 100644 --- a/arch/arm/mach-omap2/dss-common.c +++ b/arch/arm/mach-omap2/dss-common.c | |||
@@ -52,7 +52,6 @@ static struct omap_dss_device omap4_panda_dvi_device = { | |||
52 | .driver_name = "tfp410", | 52 | .driver_name = "tfp410", |
53 | .data = &omap4_dvi_panel, | 53 | .data = &omap4_dvi_panel, |
54 | .phy.dpi.data_lines = 24, | 54 | .phy.dpi.data_lines = 24, |
55 | .reset_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO, | ||
56 | .channel = OMAP_DSS_CHANNEL_LCD2, | 55 | .channel = OMAP_DSS_CHANNEL_LCD2, |
57 | }; | 56 | }; |
58 | 57 | ||
@@ -177,45 +176,12 @@ static struct picodlp_panel_data sdp4430_picodlp_pdata = { | |||
177 | .pwrgood_gpio = 45, | 176 | .pwrgood_gpio = 45, |
178 | }; | 177 | }; |
179 | 178 | ||
180 | static void sdp4430_picodlp_init(void) | ||
181 | { | ||
182 | int r; | ||
183 | const struct gpio picodlp_gpios[] = { | ||
184 | {DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW, | ||
185 | "DLP POWER ON"}, | ||
186 | {sdp4430_picodlp_pdata.emu_done_gpio, GPIOF_IN, | ||
187 | "DLP EMU DONE"}, | ||
188 | {sdp4430_picodlp_pdata.pwrgood_gpio, GPIOF_OUT_INIT_LOW, | ||
189 | "DLP PWRGOOD"}, | ||
190 | }; | ||
191 | |||
192 | r = gpio_request_array(picodlp_gpios, ARRAY_SIZE(picodlp_gpios)); | ||
193 | if (r) | ||
194 | pr_err("Cannot request PicoDLP GPIOs, error %d\n", r); | ||
195 | } | ||
196 | |||
197 | static int sdp4430_panel_enable_picodlp(struct omap_dss_device *dssdev) | ||
198 | { | ||
199 | gpio_set_value(DISPLAY_SEL_GPIO, 0); | ||
200 | gpio_set_value(DLP_POWER_ON_GPIO, 1); | ||
201 | |||
202 | return 0; | ||
203 | } | ||
204 | |||
205 | static void sdp4430_panel_disable_picodlp(struct omap_dss_device *dssdev) | ||
206 | { | ||
207 | gpio_set_value(DLP_POWER_ON_GPIO, 0); | ||
208 | gpio_set_value(DISPLAY_SEL_GPIO, 1); | ||
209 | } | ||
210 | |||
211 | static struct omap_dss_device sdp4430_picodlp_device = { | 179 | static struct omap_dss_device sdp4430_picodlp_device = { |
212 | .name = "picodlp", | 180 | .name = "picodlp", |
213 | .driver_name = "picodlp_panel", | 181 | .driver_name = "picodlp_panel", |
214 | .type = OMAP_DISPLAY_TYPE_DPI, | 182 | .type = OMAP_DISPLAY_TYPE_DPI, |
215 | .phy.dpi.data_lines = 24, | 183 | .phy.dpi.data_lines = 24, |
216 | .channel = OMAP_DSS_CHANNEL_LCD2, | 184 | .channel = OMAP_DSS_CHANNEL_LCD2, |
217 | .platform_enable = sdp4430_panel_enable_picodlp, | ||
218 | .platform_disable = sdp4430_panel_disable_picodlp, | ||
219 | .data = &sdp4430_picodlp_pdata, | 185 | .data = &sdp4430_picodlp_pdata, |
220 | }; | 186 | }; |
221 | 187 | ||
@@ -232,17 +198,26 @@ static struct omap_dss_board_info sdp4430_dss_data = { | |||
232 | .default_device = &sdp4430_lcd_device, | 198 | .default_device = &sdp4430_lcd_device, |
233 | }; | 199 | }; |
234 | 200 | ||
201 | /* | ||
202 | * we select LCD2 by default (instead of Pico DLP) by setting DISPLAY_SEL_GPIO. | ||
203 | * Setting DLP_POWER_ON gpio enables the VDLP_2V5 VDLP_1V8 and VDLP_1V0 rails | ||
204 | * used by picodlp on the 4430sdp platform. Keep this gpio disabled as LCD2 is | ||
205 | * selected by default | ||
206 | */ | ||
235 | void __init omap_4430sdp_display_init(void) | 207 | void __init omap_4430sdp_display_init(void) |
236 | { | 208 | { |
237 | int r; | 209 | int r; |
238 | 210 | ||
239 | /* Enable LCD2 by default (instead of Pico DLP) */ | ||
240 | r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, | 211 | r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, |
241 | "display_sel"); | 212 | "display_sel"); |
242 | if (r) | 213 | if (r) |
243 | pr_err("%s: Could not get display_sel GPIO\n", __func__); | 214 | pr_err("%s: Could not get display_sel GPIO\n", __func__); |
244 | 215 | ||
245 | sdp4430_picodlp_init(); | 216 | r = gpio_request_one(DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW, |
217 | "DLP POWER ON"); | ||
218 | if (r) | ||
219 | pr_err("%s: Could not get DLP POWER ON GPIO\n", __func__); | ||
220 | |||
246 | omap_display_init(&sdp4430_dss_data); | 221 | omap_display_init(&sdp4430_dss_data); |
247 | /* | 222 | /* |
248 | * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and | 223 | * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and |
@@ -262,12 +237,15 @@ void __init omap_4430sdp_display_init_of(void) | |||
262 | { | 237 | { |
263 | int r; | 238 | int r; |
264 | 239 | ||
265 | /* Enable LCD2 by default (instead of Pico DLP) */ | ||
266 | r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, | 240 | r = gpio_request_one(DISPLAY_SEL_GPIO, GPIOF_OUT_INIT_HIGH, |
267 | "display_sel"); | 241 | "display_sel"); |
268 | if (r) | 242 | if (r) |
269 | pr_err("%s: Could not get display_sel GPIO\n", __func__); | 243 | pr_err("%s: Could not get display_sel GPIO\n", __func__); |
270 | 244 | ||
271 | sdp4430_picodlp_init(); | 245 | r = gpio_request_one(DLP_POWER_ON_GPIO, GPIOF_OUT_INIT_LOW, |
246 | "DLP POWER ON"); | ||
247 | if (r) | ||
248 | pr_err("%s: Could not get DLP POWER ON GPIO\n", __func__); | ||
249 | |||
272 | omap_display_init(&sdp4430_dss_data); | 250 | omap_display_init(&sdp4430_dss_data); |
273 | } | 251 | } |
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 02e1d56a3fe5..05481490a508 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -46,7 +46,6 @@ | |||
46 | #include <asm/smp_twd.h> | 46 | #include <asm/smp_twd.h> |
47 | #include <asm/sched_clock.h> | 47 | #include <asm/sched_clock.h> |
48 | 48 | ||
49 | #include <asm/arch_timer.h> | ||
50 | #include "omap_hwmod.h" | 49 | #include "omap_hwmod.h" |
51 | #include "omap_device.h" | 50 | #include "omap_device.h" |
52 | #include <plat/counter-32k.h> | 51 | #include <plat/counter-32k.h> |
@@ -627,14 +626,10 @@ void __init omap4_local_timer_init(void) | |||
627 | #ifdef CONFIG_SOC_OMAP5 | 626 | #ifdef CONFIG_SOC_OMAP5 |
628 | void __init omap5_realtime_timer_init(void) | 627 | void __init omap5_realtime_timer_init(void) |
629 | { | 628 | { |
630 | int err; | ||
631 | |||
632 | omap4_sync32k_timer_init(); | 629 | omap4_sync32k_timer_init(); |
633 | realtime_counter_init(); | 630 | realtime_counter_init(); |
634 | 631 | ||
635 | err = arch_timer_of_register(); | 632 | clocksource_of_init(); |
636 | if (err) | ||
637 | pr_err("%s: arch_timer_register failed %d\n", __func__, err); | ||
638 | } | 633 | } |
639 | #endif /* CONFIG_SOC_OMAP5 */ | 634 | #endif /* CONFIG_SOC_OMAP5 */ |
640 | 635 | ||
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c index c254782aa727..c016ccd92433 100644 --- a/arch/arm/mach-shmobile/board-kzm9d.c +++ b/arch/arm/mach-shmobile/board-kzm9d.c | |||
@@ -90,6 +90,5 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d") | |||
90 | .init_irq = emev2_init_irq, | 90 | .init_irq = emev2_init_irq, |
91 | .init_machine = kzm9d_add_standard_devices, | 91 | .init_machine = kzm9d_add_standard_devices, |
92 | .init_late = shmobile_init_late, | 92 | .init_late = shmobile_init_late, |
93 | .init_time = shmobile_timer_init, | ||
94 | .dt_compat = kzm9d_boards_compat_dt, | 93 | .dt_compat = kzm9d_boards_compat_dt, |
95 | MACHINE_END | 94 | MACHINE_END |
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c index e4545c152722..899a86c31ec9 100644 --- a/arch/arm/mach-shmobile/setup-emev2.c +++ b/arch/arm/mach-shmobile/setup-emev2.c | |||
@@ -456,7 +456,6 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") | |||
456 | .nr_irqs = NR_IRQS_LEGACY, | 456 | .nr_irqs = NR_IRQS_LEGACY, |
457 | .init_irq = irqchip_init, | 457 | .init_irq = irqchip_init, |
458 | .init_machine = emev2_add_standard_devices_dt, | 458 | .init_machine = emev2_add_standard_devices_dt, |
459 | .init_time = shmobile_timer_init, | ||
460 | .dt_compat = emev2_boards_compat_dt, | 459 | .dt_compat = emev2_boards_compat_dt, |
461 | MACHINE_END | 460 | MACHINE_END |
462 | 461 | ||
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 228d7aba4a7c..326a4ab0bd5f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c | |||
@@ -1030,7 +1030,6 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)") | |||
1030 | .init_early = r8a7740_add_early_devices_dt, | 1030 | .init_early = r8a7740_add_early_devices_dt, |
1031 | .init_irq = r8a7740_init_irq, | 1031 | .init_irq = r8a7740_init_irq, |
1032 | .init_machine = r8a7740_add_standard_devices_dt, | 1032 | .init_machine = r8a7740_add_standard_devices_dt, |
1033 | .init_time = shmobile_timer_init, | ||
1034 | .dt_compat = r8a7740_boards_compat_dt, | 1033 | .dt_compat = r8a7740_boards_compat_dt, |
1035 | MACHINE_END | 1034 | MACHINE_END |
1036 | 1035 | ||
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index 59c7146bf66f..5502d624aca6 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
@@ -1175,7 +1175,6 @@ DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)") | |||
1175 | .init_irq = sh7372_init_irq, | 1175 | .init_irq = sh7372_init_irq, |
1176 | .handle_irq = shmobile_handle_irq_intc, | 1176 | .handle_irq = shmobile_handle_irq_intc, |
1177 | .init_machine = sh7372_add_standard_devices_dt, | 1177 | .init_machine = sh7372_add_standard_devices_dt, |
1178 | .init_time = shmobile_timer_init, | ||
1179 | .dt_compat = sh7372_boards_compat_dt, | 1178 | .dt_compat = sh7372_boards_compat_dt, |
1180 | MACHINE_END | 1179 | MACHINE_END |
1181 | 1180 | ||
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index e8cd93a5c550..fdf3894b1cc3 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c | |||
@@ -1037,7 +1037,6 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") | |||
1037 | .nr_irqs = NR_IRQS_LEGACY, | 1037 | .nr_irqs = NR_IRQS_LEGACY, |
1038 | .init_irq = irqchip_init, | 1038 | .init_irq = irqchip_init, |
1039 | .init_machine = sh73a0_add_standard_devices_dt, | 1039 | .init_machine = sh73a0_add_standard_devices_dt, |
1040 | .init_time = shmobile_timer_init, | ||
1041 | .dt_compat = sh73a0_boards_compat_dt, | 1040 | .dt_compat = sh73a0_boards_compat_dt, |
1042 | MACHINE_END | 1041 | MACHINE_END |
1043 | #endif /* CONFIG_USE_OF */ | 1042 | #endif /* CONFIG_USE_OF */ |
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c index 3d16d4dff01b..f321dbeb2379 100644 --- a/arch/arm/mach-shmobile/timer.c +++ b/arch/arm/mach-shmobile/timer.c | |||
@@ -19,10 +19,8 @@ | |||
19 | * | 19 | * |
20 | */ | 20 | */ |
21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
22 | #include <linux/clocksource.h> | ||
22 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
23 | #include <asm/arch_timer.h> | ||
24 | #include <asm/mach/time.h> | ||
25 | #include <asm/smp_twd.h> | ||
26 | 24 | ||
27 | void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz, | 25 | void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz, |
28 | unsigned int mult, unsigned int div) | 26 | unsigned int mult, unsigned int div) |
@@ -63,6 +61,5 @@ void __init shmobile_earlytimer_init(void) | |||
63 | 61 | ||
64 | void __init shmobile_timer_init(void) | 62 | void __init shmobile_timer_init(void) |
65 | { | 63 | { |
66 | arch_timer_of_register(); | 64 | clocksource_of_init(); |
67 | arch_timer_sched_clock_init(); | ||
68 | } | 65 | } |
diff --git a/arch/arm/mach-spear/Makefile b/arch/arm/mach-spear/Makefile index af9bffb94f1c..a946c19ab31a 100644 --- a/arch/arm/mach-spear/Makefile +++ b/arch/arm/mach-spear/Makefile | |||
@@ -7,10 +7,10 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include | |||
7 | # Common support | 7 | # Common support |
8 | obj-y := restart.o time.o | 8 | obj-y := restart.o time.o |
9 | 9 | ||
10 | obj-$(CONFIG_SMP) += headsmp.o platsmp.o | 10 | smp-$(CONFIG_SMP) += headsmp.o platsmp.o |
11 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | 11 | smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o |
12 | 12 | ||
13 | obj-$(CONFIG_ARCH_SPEAR13XX) += spear13xx.o | 13 | obj-$(CONFIG_ARCH_SPEAR13XX) += spear13xx.o $(smp-y) |
14 | obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o | 14 | obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o |
15 | obj-$(CONFIG_MACH_SPEAR1340) += spear1340.o | 15 | obj-$(CONFIG_MACH_SPEAR1340) += spear1340.o |
16 | 16 | ||
diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h index 8ba7e75b648d..a9fd45362fee 100644 --- a/arch/arm/mach-spear/generic.h +++ b/arch/arm/mach-spear/generic.h | |||
@@ -22,11 +22,6 @@ extern void spear13xx_timer_init(void); | |||
22 | extern void spear3xx_timer_init(void); | 22 | extern void spear3xx_timer_init(void); |
23 | extern struct pl022_ssp_controller pl022_plat_data; | 23 | extern struct pl022_ssp_controller pl022_plat_data; |
24 | extern struct pl08x_platform_data pl080_plat_data; | 24 | extern struct pl08x_platform_data pl080_plat_data; |
25 | extern struct dw_dma_platform_data dmac_plat_data; | ||
26 | extern struct dw_dma_slave cf_dma_priv; | ||
27 | extern struct dw_dma_slave nand_read_dma_priv; | ||
28 | extern struct dw_dma_slave nand_write_dma_priv; | ||
29 | bool dw_dma_filter(struct dma_chan *chan, void *slave); | ||
30 | 25 | ||
31 | void __init spear_setup_of_timer(void); | 26 | void __init spear_setup_of_timer(void); |
32 | void __init spear3xx_clk_init(void __iomem *misc_base, | 27 | void __init spear3xx_clk_init(void __iomem *misc_base, |
diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h index 374ddc393df1..cf3a5369eeca 100644 --- a/arch/arm/mach-spear/include/mach/spear.h +++ b/arch/arm/mach-spear/include/mach/spear.h | |||
@@ -82,8 +82,6 @@ | |||
82 | #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) | 82 | #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) |
83 | 83 | ||
84 | /* others */ | 84 | /* others */ |
85 | #define DMAC0_BASE UL(0xEA800000) | ||
86 | #define DMAC1_BASE UL(0xEB000000) | ||
87 | #define MCIF_CF_BASE UL(0xB2800000) | 85 | #define MCIF_CF_BASE UL(0xB2800000) |
88 | 86 | ||
89 | /* Debug uart for linux, will be used for debug and uncompress messages */ | 87 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
diff --git a/arch/arm/mach-spear/spear1310.c b/arch/arm/mach-spear/spear1310.c index ed3b5c287a7b..9eaac2c881ea 100644 --- a/arch/arm/mach-spear/spear1310.c +++ b/arch/arm/mach-spear/spear1310.c | |||
@@ -23,40 +23,12 @@ | |||
23 | #include <mach/spear.h> | 23 | #include <mach/spear.h> |
24 | 24 | ||
25 | /* Base addresses */ | 25 | /* Base addresses */ |
26 | #define SPEAR1310_SSP1_BASE UL(0x5D400000) | ||
27 | #define SPEAR1310_SATA0_BASE UL(0xB1000000) | ||
28 | #define SPEAR1310_SATA1_BASE UL(0xB1800000) | ||
29 | #define SPEAR1310_SATA2_BASE UL(0xB4000000) | ||
30 | |||
31 | #define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000) | 26 | #define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000) |
32 | #define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000) | 27 | #define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000) |
33 | 28 | ||
34 | static struct arasan_cf_pdata cf_pdata = { | ||
35 | .cf_if_clk = CF_IF_CLK_166M, | ||
36 | .quirk = CF_BROKEN_UDMA, | ||
37 | .dma_priv = &cf_dma_priv, | ||
38 | }; | ||
39 | |||
40 | /* ssp device registration */ | ||
41 | static struct pl022_ssp_controller ssp1_plat_data = { | ||
42 | .enable_dma = 0, | ||
43 | }; | ||
44 | |||
45 | /* Add SPEAr1310 auxdata to pass platform data */ | ||
46 | static struct of_dev_auxdata spear1310_auxdata_lookup[] __initdata = { | ||
47 | OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_pdata), | ||
48 | OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &dmac_plat_data), | ||
49 | OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &dmac_plat_data), | ||
50 | OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data), | ||
51 | |||
52 | OF_DEV_AUXDATA("arm,pl022", SPEAR1310_SSP1_BASE, NULL, &ssp1_plat_data), | ||
53 | {} | ||
54 | }; | ||
55 | |||
56 | static void __init spear1310_dt_init(void) | 29 | static void __init spear1310_dt_init(void) |
57 | { | 30 | { |
58 | of_platform_populate(NULL, of_default_bus_match_table, | 31 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
59 | spear1310_auxdata_lookup, NULL); | ||
60 | } | 32 | } |
61 | 33 | ||
62 | static const char * const spear1310_dt_board_compat[] = { | 34 | static const char * const spear1310_dt_board_compat[] = { |
diff --git a/arch/arm/mach-spear/spear1340.c b/arch/arm/mach-spear/spear1340.c index 75e38644bbfb..a04a7fe76f71 100644 --- a/arch/arm/mach-spear/spear1340.c +++ b/arch/arm/mach-spear/spear1340.c | |||
@@ -16,18 +16,16 @@ | |||
16 | #include <linux/ahci_platform.h> | 16 | #include <linux/ahci_platform.h> |
17 | #include <linux/amba/serial.h> | 17 | #include <linux/amba/serial.h> |
18 | #include <linux/delay.h> | 18 | #include <linux/delay.h> |
19 | #include <linux/dw_dmac.h> | ||
20 | #include <linux/of_platform.h> | 19 | #include <linux/of_platform.h> |
21 | #include <linux/irqchip.h> | 20 | #include <linux/irqchip.h> |
22 | #include <asm/mach/arch.h> | 21 | #include <asm/mach/arch.h> |
23 | #include "generic.h" | 22 | #include "generic.h" |
24 | #include <mach/spear.h> | 23 | #include <mach/spear.h> |
25 | 24 | ||
26 | #include "spear13xx-dma.h" | 25 | /* FIXME: Move SATA PHY code into a standalone driver */ |
27 | 26 | ||
28 | /* Base addresses */ | 27 | /* Base addresses */ |
29 | #define SPEAR1340_SATA_BASE UL(0xB1000000) | 28 | #define SPEAR1340_SATA_BASE UL(0xB1000000) |
30 | #define SPEAR1340_UART1_BASE UL(0xB4100000) | ||
31 | 29 | ||
32 | /* Power Management Registers */ | 30 | /* Power Management Registers */ |
33 | #define SPEAR1340_PCM_CFG (VA_MISC_BASE + 0x100) | 31 | #define SPEAR1340_PCM_CFG (VA_MISC_BASE + 0x100) |
@@ -79,28 +77,6 @@ | |||
79 | (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \ | 77 | (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \ |
80 | SPEAR1340_MIPHY_PLL_RATIO_TOP(25)) | 78 | SPEAR1340_MIPHY_PLL_RATIO_TOP(25)) |
81 | 79 | ||
82 | static struct dw_dma_slave uart1_dma_param[] = { | ||
83 | { | ||
84 | /* Tx */ | ||
85 | .cfg_hi = DWC_CFGH_DST_PER(SPEAR1340_DMA_REQ_UART1_TX), | ||
86 | .cfg_lo = 0, | ||
87 | .src_master = DMA_MASTER_MEMORY, | ||
88 | .dst_master = SPEAR1340_DMA_MASTER_UART1, | ||
89 | }, { | ||
90 | /* Rx */ | ||
91 | .cfg_hi = DWC_CFGH_SRC_PER(SPEAR1340_DMA_REQ_UART1_RX), | ||
92 | .cfg_lo = 0, | ||
93 | .src_master = SPEAR1340_DMA_MASTER_UART1, | ||
94 | .dst_master = DMA_MASTER_MEMORY, | ||
95 | } | ||
96 | }; | ||
97 | |||
98 | static struct amba_pl011_data uart1_data = { | ||
99 | .dma_filter = dw_dma_filter, | ||
100 | .dma_tx_param = &uart1_dma_param[0], | ||
101 | .dma_rx_param = &uart1_dma_param[1], | ||
102 | }; | ||
103 | |||
104 | /* SATA device registration */ | 80 | /* SATA device registration */ |
105 | static int sata_miphy_init(struct device *dev, void __iomem *addr) | 81 | static int sata_miphy_init(struct device *dev, void __iomem *addr) |
106 | { | 82 | { |
@@ -159,14 +135,8 @@ static struct ahci_platform_data sata_pdata = { | |||
159 | 135 | ||
160 | /* Add SPEAr1340 auxdata to pass platform data */ | 136 | /* Add SPEAr1340 auxdata to pass platform data */ |
161 | static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = { | 137 | static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = { |
162 | OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_dma_priv), | ||
163 | OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &dmac_plat_data), | ||
164 | OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &dmac_plat_data), | ||
165 | OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data), | ||
166 | |||
167 | OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL, | 138 | OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL, |
168 | &sata_pdata), | 139 | &sata_pdata), |
169 | OF_DEV_AUXDATA("arm,pl011", SPEAR1340_UART1_BASE, NULL, &uart1_data), | ||
170 | {} | 140 | {} |
171 | }; | 141 | }; |
172 | 142 | ||
diff --git a/arch/arm/mach-spear/spear13xx-dma.h b/arch/arm/mach-spear/spear13xx-dma.h deleted file mode 100644 index d50bdb605925..000000000000 --- a/arch/arm/mach-spear/spear13xx-dma.h +++ /dev/null | |||
@@ -1,128 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear13xx/include/mach/dma.h | ||
3 | * | ||
4 | * DMA information for SPEAr13xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2012 ST Microelectronics | ||
7 | * Viresh Kumar <viresh.linux@gmail.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_DMA_H | ||
15 | #define __MACH_DMA_H | ||
16 | |||
17 | /* request id of all the peripherals */ | ||
18 | enum dma_master_info { | ||
19 | /* Accessible from only one master */ | ||
20 | DMA_MASTER_MCIF = 0, | ||
21 | DMA_MASTER_FSMC = 1, | ||
22 | /* Accessible from both 0 & 1 */ | ||
23 | DMA_MASTER_MEMORY = 0, | ||
24 | DMA_MASTER_ADC = 0, | ||
25 | DMA_MASTER_UART0 = 0, | ||
26 | DMA_MASTER_SSP0 = 0, | ||
27 | DMA_MASTER_I2C0 = 0, | ||
28 | |||
29 | #ifdef CONFIG_MACH_SPEAR1310 | ||
30 | /* Accessible from only one master */ | ||
31 | SPEAR1310_DMA_MASTER_JPEG = 1, | ||
32 | |||
33 | /* Accessible from both 0 & 1 */ | ||
34 | SPEAR1310_DMA_MASTER_I2S = 0, | ||
35 | SPEAR1310_DMA_MASTER_UART1 = 0, | ||
36 | SPEAR1310_DMA_MASTER_UART2 = 0, | ||
37 | SPEAR1310_DMA_MASTER_UART3 = 0, | ||
38 | SPEAR1310_DMA_MASTER_UART4 = 0, | ||
39 | SPEAR1310_DMA_MASTER_UART5 = 0, | ||
40 | SPEAR1310_DMA_MASTER_I2C1 = 0, | ||
41 | SPEAR1310_DMA_MASTER_I2C2 = 0, | ||
42 | SPEAR1310_DMA_MASTER_I2C3 = 0, | ||
43 | SPEAR1310_DMA_MASTER_I2C4 = 0, | ||
44 | SPEAR1310_DMA_MASTER_I2C5 = 0, | ||
45 | SPEAR1310_DMA_MASTER_I2C6 = 0, | ||
46 | SPEAR1310_DMA_MASTER_I2C7 = 0, | ||
47 | SPEAR1310_DMA_MASTER_SSP1 = 0, | ||
48 | #endif | ||
49 | |||
50 | #ifdef CONFIG_MACH_SPEAR1340 | ||
51 | /* Accessible from only one master */ | ||
52 | SPEAR1340_DMA_MASTER_I2S_PLAY = 1, | ||
53 | SPEAR1340_DMA_MASTER_I2S_REC = 1, | ||
54 | SPEAR1340_DMA_MASTER_I2C1 = 1, | ||
55 | SPEAR1340_DMA_MASTER_UART1 = 1, | ||
56 | |||
57 | /* following are accessible from both master 0 & 1 */ | ||
58 | SPEAR1340_DMA_MASTER_SPDIF = 0, | ||
59 | SPEAR1340_DMA_MASTER_CAM = 1, | ||
60 | SPEAR1340_DMA_MASTER_VIDEO_IN = 0, | ||
61 | SPEAR1340_DMA_MASTER_MALI = 0, | ||
62 | #endif | ||
63 | }; | ||
64 | |||
65 | enum request_id { | ||
66 | DMA_REQ_ADC = 0, | ||
67 | DMA_REQ_SSP0_TX = 4, | ||
68 | DMA_REQ_SSP0_RX = 5, | ||
69 | DMA_REQ_UART0_TX = 6, | ||
70 | DMA_REQ_UART0_RX = 7, | ||
71 | DMA_REQ_I2C0_TX = 8, | ||
72 | DMA_REQ_I2C0_RX = 9, | ||
73 | |||
74 | #ifdef CONFIG_MACH_SPEAR1310 | ||
75 | SPEAR1310_DMA_REQ_FROM_JPEG = 2, | ||
76 | SPEAR1310_DMA_REQ_TO_JPEG = 3, | ||
77 | SPEAR1310_DMA_REQ_I2S_TX = 10, | ||
78 | SPEAR1310_DMA_REQ_I2S_RX = 11, | ||
79 | |||
80 | SPEAR1310_DMA_REQ_I2C1_RX = 0, | ||
81 | SPEAR1310_DMA_REQ_I2C1_TX = 1, | ||
82 | SPEAR1310_DMA_REQ_I2C2_RX = 2, | ||
83 | SPEAR1310_DMA_REQ_I2C2_TX = 3, | ||
84 | SPEAR1310_DMA_REQ_I2C3_RX = 4, | ||
85 | SPEAR1310_DMA_REQ_I2C3_TX = 5, | ||
86 | SPEAR1310_DMA_REQ_I2C4_RX = 6, | ||
87 | SPEAR1310_DMA_REQ_I2C4_TX = 7, | ||
88 | SPEAR1310_DMA_REQ_I2C5_RX = 8, | ||
89 | SPEAR1310_DMA_REQ_I2C5_TX = 9, | ||
90 | SPEAR1310_DMA_REQ_I2C6_RX = 10, | ||
91 | SPEAR1310_DMA_REQ_I2C6_TX = 11, | ||
92 | SPEAR1310_DMA_REQ_UART1_RX = 12, | ||
93 | SPEAR1310_DMA_REQ_UART1_TX = 13, | ||
94 | SPEAR1310_DMA_REQ_UART2_RX = 14, | ||
95 | SPEAR1310_DMA_REQ_UART2_TX = 15, | ||
96 | SPEAR1310_DMA_REQ_UART5_RX = 16, | ||
97 | SPEAR1310_DMA_REQ_UART5_TX = 17, | ||
98 | SPEAR1310_DMA_REQ_SSP1_RX = 18, | ||
99 | SPEAR1310_DMA_REQ_SSP1_TX = 19, | ||
100 | SPEAR1310_DMA_REQ_I2C7_RX = 20, | ||
101 | SPEAR1310_DMA_REQ_I2C7_TX = 21, | ||
102 | SPEAR1310_DMA_REQ_UART3_RX = 28, | ||
103 | SPEAR1310_DMA_REQ_UART3_TX = 29, | ||
104 | SPEAR1310_DMA_REQ_UART4_RX = 30, | ||
105 | SPEAR1310_DMA_REQ_UART4_TX = 31, | ||
106 | #endif | ||
107 | |||
108 | #ifdef CONFIG_MACH_SPEAR1340 | ||
109 | SPEAR1340_DMA_REQ_SPDIF_TX = 2, | ||
110 | SPEAR1340_DMA_REQ_SPDIF_RX = 3, | ||
111 | SPEAR1340_DMA_REQ_I2S_TX = 10, | ||
112 | SPEAR1340_DMA_REQ_I2S_RX = 11, | ||
113 | SPEAR1340_DMA_REQ_UART1_TX = 12, | ||
114 | SPEAR1340_DMA_REQ_UART1_RX = 13, | ||
115 | SPEAR1340_DMA_REQ_I2C1_TX = 14, | ||
116 | SPEAR1340_DMA_REQ_I2C1_RX = 15, | ||
117 | SPEAR1340_DMA_REQ_CAM0_EVEN = 0, | ||
118 | SPEAR1340_DMA_REQ_CAM0_ODD = 1, | ||
119 | SPEAR1340_DMA_REQ_CAM1_EVEN = 2, | ||
120 | SPEAR1340_DMA_REQ_CAM1_ODD = 3, | ||
121 | SPEAR1340_DMA_REQ_CAM2_EVEN = 4, | ||
122 | SPEAR1340_DMA_REQ_CAM2_ODD = 5, | ||
123 | SPEAR1340_DMA_REQ_CAM3_EVEN = 6, | ||
124 | SPEAR1340_DMA_REQ_CAM3_ODD = 7, | ||
125 | #endif | ||
126 | }; | ||
127 | |||
128 | #endif /* __MACH_DMA_H */ | ||
diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c index 6dd208997176..3621599c38ad 100644 --- a/arch/arm/mach-spear/spear13xx.c +++ b/arch/arm/mach-spear/spear13xx.c | |||
@@ -16,70 +16,12 @@ | |||
16 | #include <linux/amba/pl022.h> | 16 | #include <linux/amba/pl022.h> |
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/clocksource.h> | 18 | #include <linux/clocksource.h> |
19 | #include <linux/dw_dmac.h> | ||
20 | #include <linux/err.h> | 19 | #include <linux/err.h> |
21 | #include <linux/of.h> | 20 | #include <linux/of.h> |
22 | #include <asm/hardware/cache-l2x0.h> | 21 | #include <asm/hardware/cache-l2x0.h> |
23 | #include <asm/mach/map.h> | 22 | #include <asm/mach/map.h> |
24 | #include "generic.h" | ||
25 | #include <mach/spear.h> | 23 | #include <mach/spear.h> |
26 | 24 | #include "generic.h" | |
27 | #include "spear13xx-dma.h" | ||
28 | |||
29 | /* common dw_dma filter routine to be used by peripherals */ | ||
30 | bool dw_dma_filter(struct dma_chan *chan, void *slave) | ||
31 | { | ||
32 | struct dw_dma_slave *dws = (struct dw_dma_slave *)slave; | ||
33 | |||
34 | if (chan->device->dev == dws->dma_dev) { | ||
35 | chan->private = slave; | ||
36 | return true; | ||
37 | } else { | ||
38 | return false; | ||
39 | } | ||
40 | } | ||
41 | |||
42 | /* ssp device registration */ | ||
43 | static struct dw_dma_slave ssp_dma_param[] = { | ||
44 | { | ||
45 | /* Tx */ | ||
46 | .cfg_hi = DWC_CFGH_DST_PER(DMA_REQ_SSP0_TX), | ||
47 | .cfg_lo = 0, | ||
48 | .src_master = DMA_MASTER_MEMORY, | ||
49 | .dst_master = DMA_MASTER_SSP0, | ||
50 | }, { | ||
51 | /* Rx */ | ||
52 | .cfg_hi = DWC_CFGH_SRC_PER(DMA_REQ_SSP0_RX), | ||
53 | .cfg_lo = 0, | ||
54 | .src_master = DMA_MASTER_SSP0, | ||
55 | .dst_master = DMA_MASTER_MEMORY, | ||
56 | } | ||
57 | }; | ||
58 | |||
59 | struct pl022_ssp_controller pl022_plat_data = { | ||
60 | .enable_dma = 1, | ||
61 | .dma_filter = dw_dma_filter, | ||
62 | .dma_rx_param = &ssp_dma_param[1], | ||
63 | .dma_tx_param = &ssp_dma_param[0], | ||
64 | }; | ||
65 | |||
66 | /* CF device registration */ | ||
67 | struct dw_dma_slave cf_dma_priv = { | ||
68 | .cfg_hi = 0, | ||
69 | .cfg_lo = 0, | ||
70 | .src_master = 0, | ||
71 | .dst_master = 0, | ||
72 | }; | ||
73 | |||
74 | /* dmac device registeration */ | ||
75 | struct dw_dma_platform_data dmac_plat_data = { | ||
76 | .nr_channels = 8, | ||
77 | .chan_allocation_order = CHAN_ALLOCATION_DESCENDING, | ||
78 | .chan_priority = CHAN_PRIORITY_DESCENDING, | ||
79 | .block_size = 4095U, | ||
80 | .nr_masters = 2, | ||
81 | .data_width = { 3, 3, 0, 0 }, | ||
82 | }; | ||
83 | 25 | ||
84 | void __init spear13xx_l2x0_init(void) | 26 | void __init spear13xx_l2x0_init(void) |
85 | { | 27 | { |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 25160aeaa3b7..54bb80b012ac 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -749,12 +749,25 @@ void versatile_restart(char mode, const char *cmd) | |||
749 | /* Early initializations */ | 749 | /* Early initializations */ |
750 | void __init versatile_init_early(void) | 750 | void __init versatile_init_early(void) |
751 | { | 751 | { |
752 | u32 val; | ||
752 | void __iomem *sys = __io_address(VERSATILE_SYS_BASE); | 753 | void __iomem *sys = __io_address(VERSATILE_SYS_BASE); |
753 | 754 | ||
754 | osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET; | 755 | osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET; |
755 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 756 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
756 | 757 | ||
757 | versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000); | 758 | versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000); |
759 | |||
760 | /* | ||
761 | * set clock frequency: | ||
762 | * VERSATILE_REFCLK is 32KHz | ||
763 | * VERSATILE_TIMCLK is 1MHz | ||
764 | */ | ||
765 | val = readl(__io_address(VERSATILE_SCTL_BASE)); | ||
766 | writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | | ||
767 | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | | ||
768 | (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | | ||
769 | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val, | ||
770 | __io_address(VERSATILE_SCTL_BASE)); | ||
758 | } | 771 | } |
759 | 772 | ||
760 | void __init versatile_init(void) | 773 | void __init versatile_init(void) |
@@ -785,19 +798,6 @@ void __init versatile_init(void) | |||
785 | */ | 798 | */ |
786 | void __init versatile_timer_init(void) | 799 | void __init versatile_timer_init(void) |
787 | { | 800 | { |
788 | u32 val; | ||
789 | |||
790 | /* | ||
791 | * set clock frequency: | ||
792 | * VERSATILE_REFCLK is 32KHz | ||
793 | * VERSATILE_TIMCLK is 1MHz | ||
794 | */ | ||
795 | val = readl(__io_address(VERSATILE_SCTL_BASE)); | ||
796 | writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | | ||
797 | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | | ||
798 | (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | | ||
799 | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val, | ||
800 | __io_address(VERSATILE_SCTL_BASE)); | ||
801 | 801 | ||
802 | /* | 802 | /* |
803 | * Initialise to a known state (all timers off) | 803 | * Initialise to a known state (all timers off) |
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c index 2558f2e957c3..3621b000a0f6 100644 --- a/arch/arm/mach-versatile/versatile_dt.c +++ b/arch/arm/mach-versatile/versatile_dt.c | |||
@@ -45,7 +45,6 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)") | |||
45 | .map_io = versatile_map_io, | 45 | .map_io = versatile_map_io, |
46 | .init_early = versatile_init_early, | 46 | .init_early = versatile_init_early, |
47 | .init_irq = versatile_init_irq, | 47 | .init_irq = versatile_init_irq, |
48 | .init_time = versatile_timer_init, | ||
49 | .init_machine = versatile_dt_init, | 48 | .init_machine = versatile_dt_init, |
50 | .dt_compat = versatile_dt_match, | 49 | .dt_compat = versatile_dt_match, |
51 | .restart = versatile_restart, | 50 | .restart = versatile_restart, |
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 9366f37902d9..b6083bb1eb8c 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -1,6 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Versatile Express V2M Motherboard Support | 2 | * Versatile Express V2M Motherboard Support |
3 | */ | 3 | */ |
4 | #include <linux/clocksource.h> | ||
4 | #include <linux/device.h> | 5 | #include <linux/device.h> |
5 | #include <linux/amba/bus.h> | 6 | #include <linux/amba/bus.h> |
6 | #include <linux/amba/mmci.h> | 7 | #include <linux/amba/mmci.h> |
@@ -25,7 +26,6 @@ | |||
25 | #include <linux/clk-provider.h> | 26 | #include <linux/clk-provider.h> |
26 | #include <linux/clkdev.h> | 27 | #include <linux/clkdev.h> |
27 | 28 | ||
28 | #include <asm/arch_timer.h> | ||
29 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
30 | #include <asm/sizes.h> | 30 | #include <asm/sizes.h> |
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
@@ -63,9 +63,6 @@ static void __init v2m_sp804_init(void __iomem *base, unsigned int irq) | |||
63 | if (WARN_ON(!base || irq == NO_IRQ)) | 63 | if (WARN_ON(!base || irq == NO_IRQ)) |
64 | return; | 64 | return; |
65 | 65 | ||
66 | writel(0, base + TIMER_1_BASE + TIMER_CTRL); | ||
67 | writel(0, base + TIMER_2_BASE + TIMER_CTRL); | ||
68 | |||
69 | sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1"); | 66 | sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1"); |
70 | sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0"); | 67 | sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0"); |
71 | } | 68 | } |
@@ -430,29 +427,11 @@ void __init v2m_dt_init_early(void) | |||
430 | 427 | ||
431 | static void __init v2m_dt_timer_init(void) | 428 | static void __init v2m_dt_timer_init(void) |
432 | { | 429 | { |
433 | struct device_node *node = NULL; | ||
434 | |||
435 | of_clk_init(NULL); | 430 | of_clk_init(NULL); |
436 | 431 | ||
437 | clocksource_of_init(); | 432 | clocksource_of_init(); |
438 | do { | ||
439 | node = of_find_compatible_node(node, NULL, "arm,sp804"); | ||
440 | } while (node && vexpress_get_site_by_node(node) != VEXPRESS_SITE_MB); | ||
441 | if (node) { | ||
442 | pr_info("Using SP804 '%s' as a clock & events source\n", | ||
443 | node->full_name); | ||
444 | WARN_ON(clk_register_clkdev(of_clk_get_by_name(node, | ||
445 | "timclken1"), "v2m-timer0", "sp804")); | ||
446 | WARN_ON(clk_register_clkdev(of_clk_get_by_name(node, | ||
447 | "timclken2"), "v2m-timer1", "sp804")); | ||
448 | v2m_sp804_init(of_iomap(node, 0), | ||
449 | irq_of_parse_and_map(node, 0)); | ||
450 | } | ||
451 | |||
452 | arch_timer_of_register(); | ||
453 | 433 | ||
454 | if (arch_timer_sched_clock_init() != 0) | 434 | versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), |
455 | versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), | ||
456 | 24000000); | 435 | 24000000); |
457 | } | 436 | } |
458 | 437 | ||
diff --git a/arch/arm/mach-virt/virt.c b/arch/arm/mach-virt/virt.c index 31666f6b4373..adc0945255ae 100644 --- a/arch/arm/mach-virt/virt.c +++ b/arch/arm/mach-virt/virt.c | |||
@@ -23,21 +23,13 @@ | |||
23 | #include <linux/of_platform.h> | 23 | #include <linux/of_platform.h> |
24 | #include <linux/smp.h> | 24 | #include <linux/smp.h> |
25 | 25 | ||
26 | #include <asm/arch_timer.h> | ||
27 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/time.h> | ||
29 | 27 | ||
30 | static void __init virt_init(void) | 28 | static void __init virt_init(void) |
31 | { | 29 | { |
32 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); | 30 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
33 | } | 31 | } |
34 | 32 | ||
35 | static void __init virt_timer_init(void) | ||
36 | { | ||
37 | WARN_ON(arch_timer_of_register() != 0); | ||
38 | WARN_ON(arch_timer_sched_clock_init() != 0); | ||
39 | } | ||
40 | |||
41 | static const char *virt_dt_match[] = { | 33 | static const char *virt_dt_match[] = { |
42 | "linux,dummy-virt", | 34 | "linux,dummy-virt", |
43 | NULL | 35 | NULL |
@@ -47,7 +39,6 @@ extern struct smp_operations virt_smp_ops; | |||
47 | 39 | ||
48 | DT_MACHINE_START(VIRT, "Dummy Virtual Machine") | 40 | DT_MACHINE_START(VIRT, "Dummy Virtual Machine") |
49 | .init_irq = irqchip_init, | 41 | .init_irq = irqchip_init, |
50 | .init_time = virt_timer_init, | ||
51 | .init_machine = virt_init, | 42 | .init_machine = virt_init, |
52 | .smp = smp_ops(virt_smp_ops), | 43 | .smp = smp_ops(virt_smp_ops), |
53 | .dt_compat = virt_dt_match, | 44 | .dt_compat = virt_dt_match, |
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h index 91e2a6a6fcd4..bf6ab242f047 100644 --- a/arch/arm64/include/asm/arch_timer.h +++ b/arch/arm64/include/asm/arch_timer.h | |||
@@ -130,4 +130,9 @@ static inline u64 arch_counter_get_cntvct(void) | |||
130 | return cval; | 130 | return cval; |
131 | } | 131 | } |
132 | 132 | ||
133 | static inline int arch_timer_arch_init(void) | ||
134 | { | ||
135 | return 0; | ||
136 | } | ||
137 | |||
133 | #endif | 138 | #endif |
diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c index b0ef18d14c3b..a551f88ae2c1 100644 --- a/arch/arm64/kernel/time.c +++ b/arch/arm64/kernel/time.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/timer.h> | 32 | #include <linux/timer.h> |
33 | #include <linux/irq.h> | 33 | #include <linux/irq.h> |
34 | #include <linux/delay.h> | 34 | #include <linux/delay.h> |
35 | #include <linux/clocksource.h> | ||
35 | 36 | ||
36 | #include <clocksource/arm_arch_timer.h> | 37 | #include <clocksource/arm_arch_timer.h> |
37 | 38 | ||
@@ -77,10 +78,11 @@ void __init time_init(void) | |||
77 | { | 78 | { |
78 | u32 arch_timer_rate; | 79 | u32 arch_timer_rate; |
79 | 80 | ||
80 | if (arch_timer_init()) | 81 | clocksource_of_init(); |
81 | panic("Unable to initialise architected timer.\n"); | ||
82 | 82 | ||
83 | arch_timer_rate = arch_timer_get_rate(); | 83 | arch_timer_rate = arch_timer_get_rate(); |
84 | if (!arch_timer_rate) | ||
85 | panic("Unable to initialise architected timer.\n"); | ||
84 | 86 | ||
85 | /* Cache the sched_clock multiplier to save a divide in the hot path. */ | 87 | /* Cache the sched_clock multiplier to save a divide in the hot path. */ |
86 | sched_clock_mult = NSEC_PER_SEC / arch_timer_rate; | 88 | sched_clock_mult = NSEC_PER_SEC / arch_timer_rate; |
diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c index 405022d302c3..7638121cb5d1 100644 --- a/drivers/ata/pata_arasan_cf.c +++ b/drivers/ata/pata_arasan_cf.c | |||
@@ -209,8 +209,6 @@ struct arasan_cf_dev { | |||
209 | struct dma_chan *dma_chan; | 209 | struct dma_chan *dma_chan; |
210 | /* Mask for DMA transfers */ | 210 | /* Mask for DMA transfers */ |
211 | dma_cap_mask_t mask; | 211 | dma_cap_mask_t mask; |
212 | /* dma channel private data */ | ||
213 | void *dma_priv; | ||
214 | /* DMA transfer work */ | 212 | /* DMA transfer work */ |
215 | struct work_struct work; | 213 | struct work_struct work; |
216 | /* DMA delayed finish work */ | 214 | /* DMA delayed finish work */ |
@@ -308,6 +306,7 @@ static void cf_card_detect(struct arasan_cf_dev *acdev, bool hotplugged) | |||
308 | static int cf_init(struct arasan_cf_dev *acdev) | 306 | static int cf_init(struct arasan_cf_dev *acdev) |
309 | { | 307 | { |
310 | struct arasan_cf_pdata *pdata = dev_get_platdata(acdev->host->dev); | 308 | struct arasan_cf_pdata *pdata = dev_get_platdata(acdev->host->dev); |
309 | unsigned int if_clk; | ||
311 | unsigned long flags; | 310 | unsigned long flags; |
312 | int ret = 0; | 311 | int ret = 0; |
313 | 312 | ||
@@ -325,8 +324,12 @@ static int cf_init(struct arasan_cf_dev *acdev) | |||
325 | 324 | ||
326 | spin_lock_irqsave(&acdev->host->lock, flags); | 325 | spin_lock_irqsave(&acdev->host->lock, flags); |
327 | /* configure CF interface clock */ | 326 | /* configure CF interface clock */ |
328 | writel((pdata->cf_if_clk <= CF_IF_CLK_200M) ? pdata->cf_if_clk : | 327 | /* TODO: read from device tree */ |
329 | CF_IF_CLK_166M, acdev->vbase + CLK_CFG); | 328 | if_clk = CF_IF_CLK_166M; |
329 | if (pdata && pdata->cf_if_clk <= CF_IF_CLK_200M) | ||
330 | if_clk = pdata->cf_if_clk; | ||
331 | |||
332 | writel(if_clk, acdev->vbase + CLK_CFG); | ||
330 | 333 | ||
331 | writel(TRUE_IDE_MODE | CFHOST_ENB, acdev->vbase + OP_MODE); | 334 | writel(TRUE_IDE_MODE | CFHOST_ENB, acdev->vbase + OP_MODE); |
332 | cf_interrupt_enable(acdev, CARD_DETECT_IRQ, 1); | 335 | cf_interrupt_enable(acdev, CARD_DETECT_IRQ, 1); |
@@ -357,12 +360,6 @@ static void dma_callback(void *dev) | |||
357 | complete(&acdev->dma_completion); | 360 | complete(&acdev->dma_completion); |
358 | } | 361 | } |
359 | 362 | ||
360 | static bool filter(struct dma_chan *chan, void *slave) | ||
361 | { | ||
362 | chan->private = slave; | ||
363 | return true; | ||
364 | } | ||
365 | |||
366 | static inline void dma_complete(struct arasan_cf_dev *acdev) | 363 | static inline void dma_complete(struct arasan_cf_dev *acdev) |
367 | { | 364 | { |
368 | struct ata_queued_cmd *qc = acdev->qc; | 365 | struct ata_queued_cmd *qc = acdev->qc; |
@@ -530,8 +527,7 @@ static void data_xfer(struct work_struct *work) | |||
530 | 527 | ||
531 | /* request dma channels */ | 528 | /* request dma channels */ |
532 | /* dma_request_channel may sleep, so calling from process context */ | 529 | /* dma_request_channel may sleep, so calling from process context */ |
533 | acdev->dma_chan = dma_request_channel(acdev->mask, filter, | 530 | acdev->dma_chan = dma_request_slave_channel(acdev->host->dev, "data"); |
534 | acdev->dma_priv); | ||
535 | if (!acdev->dma_chan) { | 531 | if (!acdev->dma_chan) { |
536 | dev_err(acdev->host->dev, "Unable to get dma_chan\n"); | 532 | dev_err(acdev->host->dev, "Unable to get dma_chan\n"); |
537 | goto chan_request_fail; | 533 | goto chan_request_fail; |
@@ -798,6 +794,7 @@ static int arasan_cf_probe(struct platform_device *pdev) | |||
798 | struct ata_host *host; | 794 | struct ata_host *host; |
799 | struct ata_port *ap; | 795 | struct ata_port *ap; |
800 | struct resource *res; | 796 | struct resource *res; |
797 | u32 quirk; | ||
801 | irq_handler_t irq_handler = NULL; | 798 | irq_handler_t irq_handler = NULL; |
802 | int ret = 0; | 799 | int ret = 0; |
803 | 800 | ||
@@ -817,12 +814,17 @@ static int arasan_cf_probe(struct platform_device *pdev) | |||
817 | return -ENOMEM; | 814 | return -ENOMEM; |
818 | } | 815 | } |
819 | 816 | ||
817 | if (pdata) | ||
818 | quirk = pdata->quirk; | ||
819 | else | ||
820 | quirk = CF_BROKEN_UDMA; /* as it is on spear1340 */ | ||
821 | |||
820 | /* if irq is 0, support only PIO */ | 822 | /* if irq is 0, support only PIO */ |
821 | acdev->irq = platform_get_irq(pdev, 0); | 823 | acdev->irq = platform_get_irq(pdev, 0); |
822 | if (acdev->irq) | 824 | if (acdev->irq) |
823 | irq_handler = arasan_cf_interrupt; | 825 | irq_handler = arasan_cf_interrupt; |
824 | else | 826 | else |
825 | pdata->quirk |= CF_BROKEN_MWDMA | CF_BROKEN_UDMA; | 827 | quirk |= CF_BROKEN_MWDMA | CF_BROKEN_UDMA; |
826 | 828 | ||
827 | acdev->pbase = res->start; | 829 | acdev->pbase = res->start; |
828 | acdev->vbase = devm_ioremap_nocache(&pdev->dev, res->start, | 830 | acdev->vbase = devm_ioremap_nocache(&pdev->dev, res->start, |
@@ -859,17 +861,16 @@ static int arasan_cf_probe(struct platform_device *pdev) | |||
859 | INIT_WORK(&acdev->work, data_xfer); | 861 | INIT_WORK(&acdev->work, data_xfer); |
860 | INIT_DELAYED_WORK(&acdev->dwork, delayed_finish); | 862 | INIT_DELAYED_WORK(&acdev->dwork, delayed_finish); |
861 | dma_cap_set(DMA_MEMCPY, acdev->mask); | 863 | dma_cap_set(DMA_MEMCPY, acdev->mask); |
862 | acdev->dma_priv = pdata->dma_priv; | ||
863 | 864 | ||
864 | /* Handle platform specific quirks */ | 865 | /* Handle platform specific quirks */ |
865 | if (pdata->quirk) { | 866 | if (quirk) { |
866 | if (pdata->quirk & CF_BROKEN_PIO) { | 867 | if (quirk & CF_BROKEN_PIO) { |
867 | ap->ops->set_piomode = NULL; | 868 | ap->ops->set_piomode = NULL; |
868 | ap->pio_mask = 0; | 869 | ap->pio_mask = 0; |
869 | } | 870 | } |
870 | if (pdata->quirk & CF_BROKEN_MWDMA) | 871 | if (quirk & CF_BROKEN_MWDMA) |
871 | ap->mwdma_mask = 0; | 872 | ap->mwdma_mask = 0; |
872 | if (pdata->quirk & CF_BROKEN_UDMA) | 873 | if (quirk & CF_BROKEN_UDMA) |
873 | ap->udma_mask = 0; | 874 | ap->udma_mask = 0; |
874 | } | 875 | } |
875 | ap->flags |= ATA_FLAG_PIO_POLLING | ATA_FLAG_NO_ATAPI; | 876 | ap->flags |= ATA_FLAG_PIO_POLLING | ATA_FLAG_NO_ATAPI; |
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 7bc6e51757ee..c20de4a85cbd 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig | |||
@@ -65,6 +65,7 @@ config CLKSRC_DBX500_PRCMU_SCHED_CLOCK | |||
65 | 65 | ||
66 | config ARM_ARCH_TIMER | 66 | config ARM_ARCH_TIMER |
67 | bool | 67 | bool |
68 | select CLKSRC_OF if OF | ||
68 | 69 | ||
69 | config CLKSRC_METAG_GENERIC | 70 | config CLKSRC_METAG_GENERIC |
70 | def_bool y if METAG | 71 | def_bool y if METAG |
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index d7ad425ab9b3..a2b254189782 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c | |||
@@ -248,14 +248,16 @@ static void __cpuinit arch_timer_stop(struct clock_event_device *clk) | |||
248 | static int __cpuinit arch_timer_cpu_notify(struct notifier_block *self, | 248 | static int __cpuinit arch_timer_cpu_notify(struct notifier_block *self, |
249 | unsigned long action, void *hcpu) | 249 | unsigned long action, void *hcpu) |
250 | { | 250 | { |
251 | struct clock_event_device *evt = this_cpu_ptr(arch_timer_evt); | 251 | /* |
252 | 252 | * Grab cpu pointer in each case to avoid spurious | |
253 | * preemptible warnings | ||
254 | */ | ||
253 | switch (action & ~CPU_TASKS_FROZEN) { | 255 | switch (action & ~CPU_TASKS_FROZEN) { |
254 | case CPU_STARTING: | 256 | case CPU_STARTING: |
255 | arch_timer_setup(evt); | 257 | arch_timer_setup(this_cpu_ptr(arch_timer_evt)); |
256 | break; | 258 | break; |
257 | case CPU_DYING: | 259 | case CPU_DYING: |
258 | arch_timer_stop(evt); | 260 | arch_timer_stop(this_cpu_ptr(arch_timer_evt)); |
259 | break; | 261 | break; |
260 | } | 262 | } |
261 | 263 | ||
@@ -337,22 +339,14 @@ out: | |||
337 | return err; | 339 | return err; |
338 | } | 340 | } |
339 | 341 | ||
340 | static const struct of_device_id arch_timer_of_match[] __initconst = { | 342 | static void __init arch_timer_init(struct device_node *np) |
341 | { .compatible = "arm,armv7-timer", }, | ||
342 | { .compatible = "arm,armv8-timer", }, | ||
343 | {}, | ||
344 | }; | ||
345 | |||
346 | int __init arch_timer_init(void) | ||
347 | { | 343 | { |
348 | struct device_node *np; | ||
349 | u32 freq; | 344 | u32 freq; |
350 | int i; | 345 | int i; |
351 | 346 | ||
352 | np = of_find_matching_node(NULL, arch_timer_of_match); | 347 | if (arch_timer_get_rate()) { |
353 | if (!np) { | 348 | pr_warn("arch_timer: multiple nodes in dt, skipping\n"); |
354 | pr_err("arch_timer: can't find DT node\n"); | 349 | return; |
355 | return -ENODEV; | ||
356 | } | 350 | } |
357 | 351 | ||
358 | /* Try to determine the frequency from the device tree or CNTFRQ */ | 352 | /* Try to determine the frequency from the device tree or CNTFRQ */ |
@@ -378,7 +372,7 @@ int __init arch_timer_init(void) | |||
378 | if (!arch_timer_ppi[PHYS_SECURE_PPI] || | 372 | if (!arch_timer_ppi[PHYS_SECURE_PPI] || |
379 | !arch_timer_ppi[PHYS_NONSECURE_PPI]) { | 373 | !arch_timer_ppi[PHYS_NONSECURE_PPI]) { |
380 | pr_warn("arch_timer: No interrupt available, giving up\n"); | 374 | pr_warn("arch_timer: No interrupt available, giving up\n"); |
381 | return -EINVAL; | 375 | return; |
382 | } | 376 | } |
383 | } | 377 | } |
384 | 378 | ||
@@ -387,5 +381,8 @@ int __init arch_timer_init(void) | |||
387 | else | 381 | else |
388 | arch_timer_read_counter = arch_counter_get_cntpct; | 382 | arch_timer_read_counter = arch_counter_get_cntpct; |
389 | 383 | ||
390 | return arch_timer_register(); | 384 | arch_timer_register(); |
385 | arch_timer_arch_init(); | ||
391 | } | 386 | } |
387 | CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_init); | ||
388 | CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_init); | ||
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 661026834b23..13a9e4923a03 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/of_address.h> | 24 | #include <linux/of_address.h> |
25 | #include <linux/clocksource.h> | 25 | #include <linux/clocksource.h> |
26 | 26 | ||
27 | #include <asm/arch_timer.h> | ||
28 | #include <asm/localtimer.h> | 27 | #include <asm/localtimer.h> |
29 | 28 | ||
30 | #include <plat/cpu.h> | 29 | #include <plat/cpu.h> |
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index c28fcccf4a0d..cda4cb5f7327 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile | |||
@@ -2,6 +2,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o | |||
2 | 2 | ||
3 | obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o | 3 | obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o |
4 | obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o | 4 | obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o |
5 | obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o | ||
5 | obj-$(CONFIG_ARCH_MXS) += irq-mxs.o | 6 | obj-$(CONFIG_ARCH_MXS) += irq-mxs.o |
6 | obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o | 7 | obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o |
7 | obj-$(CONFIG_METAG) += irq-metag-ext.o | 8 | obj-$(CONFIG_METAG) += irq-metag-ext.o |
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 830139a3e2ba..bb328a366122 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c | |||
@@ -25,7 +25,9 @@ | |||
25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
26 | #include <asm/exception.h> | 26 | #include <asm/exception.h> |
27 | #include <asm/smp_plat.h> | 27 | #include <asm/smp_plat.h> |
28 | #include <asm/hardware/cache-l2x0.h> | 28 | #include <asm/mach/irq.h> |
29 | |||
30 | #include "irqchip.h" | ||
29 | 31 | ||
30 | /* Interrupt Controller Registers Map */ | 32 | /* Interrupt Controller Registers Map */ |
31 | #define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) | 33 | #define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) |
@@ -46,7 +48,9 @@ | |||
46 | 48 | ||
47 | #define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5) | 49 | #define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5) |
48 | 50 | ||
49 | #define ACTIVE_DOORBELLS (8) | 51 | #define IPI_DOORBELL_START (0) |
52 | #define IPI_DOORBELL_END (8) | ||
53 | #define IPI_DOORBELL_MASK 0xFF | ||
50 | 54 | ||
51 | static DEFINE_RAW_SPINLOCK(irq_controller_lock); | 55 | static DEFINE_RAW_SPINLOCK(irq_controller_lock); |
52 | 56 | ||
@@ -184,7 +188,7 @@ void armada_xp_mpic_smp_cpu_init(void) | |||
184 | writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); | 188 | writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); |
185 | 189 | ||
186 | /* Enable first 8 IPIs */ | 190 | /* Enable first 8 IPIs */ |
187 | writel((1 << ACTIVE_DOORBELLS) - 1, per_cpu_int_base + | 191 | writel(IPI_DOORBELL_MASK, per_cpu_int_base + |
188 | ARMADA_370_XP_IN_DRBEL_MSK_OFFS); | 192 | ARMADA_370_XP_IN_DRBEL_MSK_OFFS); |
189 | 193 | ||
190 | /* Unmask IPI interrupt */ | 194 | /* Unmask IPI interrupt */ |
@@ -197,46 +201,8 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = { | |||
197 | .xlate = irq_domain_xlate_onecell, | 201 | .xlate = irq_domain_xlate_onecell, |
198 | }; | 202 | }; |
199 | 203 | ||
200 | static int __init armada_370_xp_mpic_of_init(struct device_node *node, | 204 | static asmlinkage void __exception_irq_entry |
201 | struct device_node *parent) | 205 | armada_370_xp_handle_irq(struct pt_regs *regs) |
202 | { | ||
203 | u32 control; | ||
204 | |||
205 | main_int_base = of_iomap(node, 0); | ||
206 | per_cpu_int_base = of_iomap(node, 1); | ||
207 | |||
208 | BUG_ON(!main_int_base); | ||
209 | BUG_ON(!per_cpu_int_base); | ||
210 | |||
211 | control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); | ||
212 | |||
213 | armada_370_xp_mpic_domain = | ||
214 | irq_domain_add_linear(node, (control >> 2) & 0x3ff, | ||
215 | &armada_370_xp_mpic_irq_ops, NULL); | ||
216 | |||
217 | if (!armada_370_xp_mpic_domain) | ||
218 | panic("Unable to add Armada_370_Xp MPIC irq domain (DT)\n"); | ||
219 | |||
220 | irq_set_default_host(armada_370_xp_mpic_domain); | ||
221 | |||
222 | #ifdef CONFIG_SMP | ||
223 | armada_xp_mpic_smp_cpu_init(); | ||
224 | |||
225 | /* | ||
226 | * Set the default affinity from all CPUs to the boot cpu. | ||
227 | * This is required since the MPIC doesn't limit several CPUs | ||
228 | * from acknowledging the same interrupt. | ||
229 | */ | ||
230 | cpumask_clear(irq_default_affinity); | ||
231 | cpumask_set_cpu(smp_processor_id(), irq_default_affinity); | ||
232 | |||
233 | #endif | ||
234 | |||
235 | return 0; | ||
236 | } | ||
237 | |||
238 | asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs | ||
239 | *regs) | ||
240 | { | 206 | { |
241 | u32 irqstat, irqnr; | 207 | u32 irqstat, irqnr; |
242 | 208 | ||
@@ -261,13 +227,14 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs | |||
261 | 227 | ||
262 | ipimask = readl_relaxed(per_cpu_int_base + | 228 | ipimask = readl_relaxed(per_cpu_int_base + |
263 | ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS) | 229 | ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS) |
264 | & 0xFF; | 230 | & IPI_DOORBELL_MASK; |
265 | 231 | ||
266 | writel(0x0, per_cpu_int_base + | 232 | writel(~IPI_DOORBELL_MASK, per_cpu_int_base + |
267 | ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); | 233 | ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); |
268 | 234 | ||
269 | /* Handle all pending doorbells */ | 235 | /* Handle all pending doorbells */ |
270 | for (ipinr = 0; ipinr < ACTIVE_DOORBELLS; ipinr++) { | 236 | for (ipinr = IPI_DOORBELL_START; |
237 | ipinr < IPI_DOORBELL_END; ipinr++) { | ||
271 | if (ipimask & (0x1 << ipinr)) | 238 | if (ipimask & (0x1 << ipinr)) |
272 | handle_IPI(ipinr, regs); | 239 | handle_IPI(ipinr, regs); |
273 | } | 240 | } |
@@ -278,15 +245,44 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs | |||
278 | } while (1); | 245 | } while (1); |
279 | } | 246 | } |
280 | 247 | ||
281 | static const struct of_device_id mpic_of_match[] __initconst = { | 248 | static int __init armada_370_xp_mpic_of_init(struct device_node *node, |
282 | {.compatible = "marvell,mpic", .data = armada_370_xp_mpic_of_init}, | 249 | struct device_node *parent) |
283 | {}, | ||
284 | }; | ||
285 | |||
286 | void __init armada_370_xp_init_irq(void) | ||
287 | { | 250 | { |
288 | of_irq_init(mpic_of_match); | 251 | u32 control; |
289 | #ifdef CONFIG_CACHE_L2X0 | 252 | |
290 | l2x0_of_init(0, ~0UL); | 253 | main_int_base = of_iomap(node, 0); |
254 | per_cpu_int_base = of_iomap(node, 1); | ||
255 | |||
256 | BUG_ON(!main_int_base); | ||
257 | BUG_ON(!per_cpu_int_base); | ||
258 | |||
259 | control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); | ||
260 | |||
261 | armada_370_xp_mpic_domain = | ||
262 | irq_domain_add_linear(node, (control >> 2) & 0x3ff, | ||
263 | &armada_370_xp_mpic_irq_ops, NULL); | ||
264 | |||
265 | if (!armada_370_xp_mpic_domain) | ||
266 | panic("Unable to add Armada_370_Xp MPIC irq domain (DT)\n"); | ||
267 | |||
268 | irq_set_default_host(armada_370_xp_mpic_domain); | ||
269 | |||
270 | #ifdef CONFIG_SMP | ||
271 | armada_xp_mpic_smp_cpu_init(); | ||
272 | |||
273 | /* | ||
274 | * Set the default affinity from all CPUs to the boot cpu. | ||
275 | * This is required since the MPIC doesn't limit several CPUs | ||
276 | * from acknowledging the same interrupt. | ||
277 | */ | ||
278 | cpumask_clear(irq_default_affinity); | ||
279 | cpumask_set_cpu(smp_processor_id(), irq_default_affinity); | ||
280 | |||
291 | #endif | 281 | #endif |
282 | |||
283 | set_handle_irq(armada_370_xp_handle_irq); | ||
284 | |||
285 | return 0; | ||
292 | } | 286 | } |
287 | |||
288 | IRQCHIP_DECLARE(armada_370_xp_mpic, "marvell,mpic", armada_370_xp_mpic_of_init); | ||
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index b0fe393c882c..371cc66f1a0e 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c | |||
@@ -1139,6 +1139,35 @@ err_no_rxchan: | |||
1139 | return -ENODEV; | 1139 | return -ENODEV; |
1140 | } | 1140 | } |
1141 | 1141 | ||
1142 | static int pl022_dma_autoprobe(struct pl022 *pl022) | ||
1143 | { | ||
1144 | struct device *dev = &pl022->adev->dev; | ||
1145 | |||
1146 | /* automatically configure DMA channels from platform, normally using DT */ | ||
1147 | pl022->dma_rx_channel = dma_request_slave_channel(dev, "rx"); | ||
1148 | if (!pl022->dma_rx_channel) | ||
1149 | goto err_no_rxchan; | ||
1150 | |||
1151 | pl022->dma_tx_channel = dma_request_slave_channel(dev, "tx"); | ||
1152 | if (!pl022->dma_tx_channel) | ||
1153 | goto err_no_txchan; | ||
1154 | |||
1155 | pl022->dummypage = kmalloc(PAGE_SIZE, GFP_KERNEL); | ||
1156 | if (!pl022->dummypage) | ||
1157 | goto err_no_dummypage; | ||
1158 | |||
1159 | return 0; | ||
1160 | |||
1161 | err_no_dummypage: | ||
1162 | dma_release_channel(pl022->dma_tx_channel); | ||
1163 | pl022->dma_tx_channel = NULL; | ||
1164 | err_no_txchan: | ||
1165 | dma_release_channel(pl022->dma_rx_channel); | ||
1166 | pl022->dma_rx_channel = NULL; | ||
1167 | err_no_rxchan: | ||
1168 | return -ENODEV; | ||
1169 | } | ||
1170 | |||
1142 | static void terminate_dma(struct pl022 *pl022) | 1171 | static void terminate_dma(struct pl022 *pl022) |
1143 | { | 1172 | { |
1144 | struct dma_chan *rxchan = pl022->dma_rx_channel; | 1173 | struct dma_chan *rxchan = pl022->dma_rx_channel; |
@@ -1167,6 +1196,11 @@ static inline int configure_dma(struct pl022 *pl022) | |||
1167 | return -ENODEV; | 1196 | return -ENODEV; |
1168 | } | 1197 | } |
1169 | 1198 | ||
1199 | static inline int pl022_dma_autoprobe(struct pl022 *pl022) | ||
1200 | { | ||
1201 | return 0; | ||
1202 | } | ||
1203 | |||
1170 | static inline int pl022_dma_probe(struct pl022 *pl022) | 1204 | static inline int pl022_dma_probe(struct pl022 *pl022) |
1171 | { | 1205 | { |
1172 | return 0; | 1206 | return 0; |
@@ -2226,8 +2260,13 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) | |||
2226 | goto err_no_irq; | 2260 | goto err_no_irq; |
2227 | } | 2261 | } |
2228 | 2262 | ||
2229 | /* Get DMA channels */ | 2263 | /* Get DMA channels, try autoconfiguration first */ |
2230 | if (platform_info->enable_dma) { | 2264 | status = pl022_dma_autoprobe(pl022); |
2265 | |||
2266 | /* If that failed, use channels from platform_info */ | ||
2267 | if (status == 0) | ||
2268 | platform_info->enable_dma = 1; | ||
2269 | else if (platform_info->enable_dma) { | ||
2231 | status = pl022_dma_probe(pl022); | 2270 | status = pl022_dma_probe(pl022); |
2232 | if (status != 0) | 2271 | if (status != 0) |
2233 | platform_info->enable_dma = 0; | 2272 | platform_info->enable_dma = 0; |
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index b2e9e177a354..8ab70a620919 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c | |||
@@ -267,7 +267,7 @@ static void pl011_sgbuf_free(struct dma_chan *chan, struct pl011_sgbuf *sg, | |||
267 | } | 267 | } |
268 | } | 268 | } |
269 | 269 | ||
270 | static void pl011_dma_probe_initcall(struct uart_amba_port *uap) | 270 | static void pl011_dma_probe_initcall(struct device *dev, struct uart_amba_port *uap) |
271 | { | 271 | { |
272 | /* DMA is the sole user of the platform data right now */ | 272 | /* DMA is the sole user of the platform data right now */ |
273 | struct amba_pl011_data *plat = uap->port.dev->platform_data; | 273 | struct amba_pl011_data *plat = uap->port.dev->platform_data; |
@@ -281,20 +281,25 @@ static void pl011_dma_probe_initcall(struct uart_amba_port *uap) | |||
281 | struct dma_chan *chan; | 281 | struct dma_chan *chan; |
282 | dma_cap_mask_t mask; | 282 | dma_cap_mask_t mask; |
283 | 283 | ||
284 | /* We need platform data */ | 284 | chan = dma_request_slave_channel(dev, "tx"); |
285 | if (!plat || !plat->dma_filter) { | ||
286 | dev_info(uap->port.dev, "no DMA platform data\n"); | ||
287 | return; | ||
288 | } | ||
289 | 285 | ||
290 | /* Try to acquire a generic DMA engine slave TX channel */ | ||
291 | dma_cap_zero(mask); | ||
292 | dma_cap_set(DMA_SLAVE, mask); | ||
293 | |||
294 | chan = dma_request_channel(mask, plat->dma_filter, plat->dma_tx_param); | ||
295 | if (!chan) { | 286 | if (!chan) { |
296 | dev_err(uap->port.dev, "no TX DMA channel!\n"); | 287 | /* We need platform data */ |
297 | return; | 288 | if (!plat || !plat->dma_filter) { |
289 | dev_info(uap->port.dev, "no DMA platform data\n"); | ||
290 | return; | ||
291 | } | ||
292 | |||
293 | /* Try to acquire a generic DMA engine slave TX channel */ | ||
294 | dma_cap_zero(mask); | ||
295 | dma_cap_set(DMA_SLAVE, mask); | ||
296 | |||
297 | chan = dma_request_channel(mask, plat->dma_filter, | ||
298 | plat->dma_tx_param); | ||
299 | if (!chan) { | ||
300 | dev_err(uap->port.dev, "no TX DMA channel!\n"); | ||
301 | return; | ||
302 | } | ||
298 | } | 303 | } |
299 | 304 | ||
300 | dmaengine_slave_config(chan, &tx_conf); | 305 | dmaengine_slave_config(chan, &tx_conf); |
@@ -304,7 +309,18 @@ static void pl011_dma_probe_initcall(struct uart_amba_port *uap) | |||
304 | dma_chan_name(uap->dmatx.chan)); | 309 | dma_chan_name(uap->dmatx.chan)); |
305 | 310 | ||
306 | /* Optionally make use of an RX channel as well */ | 311 | /* Optionally make use of an RX channel as well */ |
307 | if (plat->dma_rx_param) { | 312 | chan = dma_request_slave_channel(dev, "rx"); |
313 | |||
314 | if (!chan && plat->dma_rx_param) { | ||
315 | chan = dma_request_channel(mask, plat->dma_filter, plat->dma_rx_param); | ||
316 | |||
317 | if (!chan) { | ||
318 | dev_err(uap->port.dev, "no RX DMA channel!\n"); | ||
319 | return; | ||
320 | } | ||
321 | } | ||
322 | |||
323 | if (chan) { | ||
308 | struct dma_slave_config rx_conf = { | 324 | struct dma_slave_config rx_conf = { |
309 | .src_addr = uap->port.mapbase + UART01x_DR, | 325 | .src_addr = uap->port.mapbase + UART01x_DR, |
310 | .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, | 326 | .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, |
@@ -313,12 +329,6 @@ static void pl011_dma_probe_initcall(struct uart_amba_port *uap) | |||
313 | .device_fc = false, | 329 | .device_fc = false, |
314 | }; | 330 | }; |
315 | 331 | ||
316 | chan = dma_request_channel(mask, plat->dma_filter, plat->dma_rx_param); | ||
317 | if (!chan) { | ||
318 | dev_err(uap->port.dev, "no RX DMA channel!\n"); | ||
319 | return; | ||
320 | } | ||
321 | |||
322 | dmaengine_slave_config(chan, &rx_conf); | 332 | dmaengine_slave_config(chan, &rx_conf); |
323 | uap->dmarx.chan = chan; | 333 | uap->dmarx.chan = chan; |
324 | 334 | ||
@@ -360,6 +370,7 @@ static void pl011_dma_probe_initcall(struct uart_amba_port *uap) | |||
360 | struct dma_uap { | 370 | struct dma_uap { |
361 | struct list_head node; | 371 | struct list_head node; |
362 | struct uart_amba_port *uap; | 372 | struct uart_amba_port *uap; |
373 | struct device *dev; | ||
363 | }; | 374 | }; |
364 | 375 | ||
365 | static LIST_HEAD(pl011_dma_uarts); | 376 | static LIST_HEAD(pl011_dma_uarts); |
@@ -370,7 +381,7 @@ static int __init pl011_dma_initcall(void) | |||
370 | 381 | ||
371 | list_for_each_safe(node, tmp, &pl011_dma_uarts) { | 382 | list_for_each_safe(node, tmp, &pl011_dma_uarts) { |
372 | struct dma_uap *dmau = list_entry(node, struct dma_uap, node); | 383 | struct dma_uap *dmau = list_entry(node, struct dma_uap, node); |
373 | pl011_dma_probe_initcall(dmau->uap); | 384 | pl011_dma_probe_initcall(dmau->dev, dmau->uap); |
374 | list_del(node); | 385 | list_del(node); |
375 | kfree(dmau); | 386 | kfree(dmau); |
376 | } | 387 | } |
@@ -379,18 +390,19 @@ static int __init pl011_dma_initcall(void) | |||
379 | 390 | ||
380 | device_initcall(pl011_dma_initcall); | 391 | device_initcall(pl011_dma_initcall); |
381 | 392 | ||
382 | static void pl011_dma_probe(struct uart_amba_port *uap) | 393 | static void pl011_dma_probe(struct device *dev, struct uart_amba_port *uap) |
383 | { | 394 | { |
384 | struct dma_uap *dmau = kzalloc(sizeof(struct dma_uap), GFP_KERNEL); | 395 | struct dma_uap *dmau = kzalloc(sizeof(struct dma_uap), GFP_KERNEL); |
385 | if (dmau) { | 396 | if (dmau) { |
386 | dmau->uap = uap; | 397 | dmau->uap = uap; |
398 | dmau->dev = dev; | ||
387 | list_add_tail(&dmau->node, &pl011_dma_uarts); | 399 | list_add_tail(&dmau->node, &pl011_dma_uarts); |
388 | } | 400 | } |
389 | } | 401 | } |
390 | #else | 402 | #else |
391 | static void pl011_dma_probe(struct uart_amba_port *uap) | 403 | static void pl011_dma_probe(struct device *dev, struct uart_amba_port *uap) |
392 | { | 404 | { |
393 | pl011_dma_probe_initcall(uap); | 405 | pl011_dma_probe_initcall(dev, uap); |
394 | } | 406 | } |
395 | #endif | 407 | #endif |
396 | 408 | ||
@@ -1096,7 +1108,7 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) | |||
1096 | 1108 | ||
1097 | #else | 1109 | #else |
1098 | /* Blank functions if the DMA engine is not available */ | 1110 | /* Blank functions if the DMA engine is not available */ |
1099 | static inline void pl011_dma_probe(struct uart_amba_port *uap) | 1111 | static inline void pl011_dma_probe(struct device *dev, struct uart_amba_port *uap) |
1100 | { | 1112 | { |
1101 | } | 1113 | } |
1102 | 1114 | ||
@@ -2155,7 +2167,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id) | |||
2155 | uap->port.ops = &amba_pl011_pops; | 2167 | uap->port.ops = &amba_pl011_pops; |
2156 | uap->port.flags = UPF_BOOT_AUTOCONF; | 2168 | uap->port.flags = UPF_BOOT_AUTOCONF; |
2157 | uap->port.line = i; | 2169 | uap->port.line = i; |
2158 | pl011_dma_probe(uap); | 2170 | pl011_dma_probe(&dev->dev, uap); |
2159 | 2171 | ||
2160 | /* Ensure interrupts from this UART are masked and cleared */ | 2172 | /* Ensure interrupts from this UART are masked and cleared */ |
2161 | writew(0, uap->port.membase + UART011_IMSC); | 2173 | writew(0, uap->port.membase + UART011_IMSC); |
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 2603267b1a29..e6c9c4cc9b23 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h | |||
@@ -31,18 +31,12 @@ | |||
31 | 31 | ||
32 | #ifdef CONFIG_ARM_ARCH_TIMER | 32 | #ifdef CONFIG_ARM_ARCH_TIMER |
33 | 33 | ||
34 | extern int arch_timer_init(void); | ||
35 | extern u32 arch_timer_get_rate(void); | 34 | extern u32 arch_timer_get_rate(void); |
36 | extern u64 (*arch_timer_read_counter)(void); | 35 | extern u64 (*arch_timer_read_counter)(void); |
37 | extern struct timecounter *arch_timer_get_timecounter(void); | 36 | extern struct timecounter *arch_timer_get_timecounter(void); |
38 | 37 | ||
39 | #else | 38 | #else |
40 | 39 | ||
41 | static inline int arch_timer_init(void) | ||
42 | { | ||
43 | return -ENXIO; | ||
44 | } | ||
45 | |||
46 | static inline u32 arch_timer_get_rate(void) | 40 | static inline u32 arch_timer_get_rate(void) |
47 | { | 41 | { |
48 | return 0; | 42 | return 0; |
diff --git a/include/linux/of.h b/include/linux/of.h index 1b671c3809b8..1fd08ca23106 100644 --- a/include/linux/of.h +++ b/include/linux/of.h | |||
@@ -387,6 +387,11 @@ static inline int of_device_is_compatible(const struct device_node *device, | |||
387 | return 0; | 387 | return 0; |
388 | } | 388 | } |
389 | 389 | ||
390 | static inline int of_device_is_available(const struct device_node *device) | ||
391 | { | ||
392 | return 0; | ||
393 | } | ||
394 | |||
390 | static inline struct property *of_find_property(const struct device_node *np, | 395 | static inline struct property *of_find_property(const struct device_node *np, |
391 | const char *name, | 396 | const char *name, |
392 | int *lenp) | 397 | int *lenp) |
diff --git a/include/linux/pata_arasan_cf_data.h b/include/linux/pata_arasan_cf_data.h index a7b4fc386e63..3cc21c9cc1e8 100644 --- a/include/linux/pata_arasan_cf_data.h +++ b/include/linux/pata_arasan_cf_data.h | |||
@@ -37,8 +37,6 @@ struct arasan_cf_pdata { | |||
37 | #define CF_BROKEN_PIO (1) | 37 | #define CF_BROKEN_PIO (1) |
38 | #define CF_BROKEN_MWDMA (1 << 1) | 38 | #define CF_BROKEN_MWDMA (1 << 1) |
39 | #define CF_BROKEN_UDMA (1 << 2) | 39 | #define CF_BROKEN_UDMA (1 << 2) |
40 | /* This is platform specific data for the DMA controller */ | ||
41 | void *dma_priv; | ||
42 | }; | 40 | }; |
43 | 41 | ||
44 | static inline void | 42 | static inline void |