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-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-davinci.txt1
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt16
-rw-r--r--Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt45
-rw-r--r--Documentation/driver-api/gpio/driver.rst138
-rw-r--r--MAINTAINERS9
-rw-r--r--arch/arm/configs/lpc32xx_defconfig1
-rw-r--r--arch/unicore32/kernel/irq.c1
-rw-r--r--drivers/gpio/Kconfig11
-rw-r--r--drivers/gpio/Makefile3
-rw-r--r--drivers/gpio/gpio-arizona.c4
-rw-r--r--drivers/gpio/gpio-aspeed.c60
-rw-r--r--drivers/gpio/gpio-bd70528.c4
-rw-r--r--drivers/gpio/gpio-brcmstb.c4
-rw-r--r--drivers/gpio/gpio-cadence.c36
-rw-r--r--drivers/gpio/gpio-dwapb.c1
-rw-r--r--drivers/gpio/gpio-eic-sprd.c4
-rw-r--r--drivers/gpio/gpio-em.c37
-rw-r--r--drivers/gpio/gpio-ep93xx.c140
-rw-r--r--drivers/gpio/gpio-ftgpio010.c14
-rw-r--r--drivers/gpio/gpio-grgpio.c2
-rw-r--r--drivers/gpio/gpio-hlwd.c58
-rw-r--r--drivers/gpio/gpio-ixp4xx.c279
-rw-r--r--drivers/gpio/gpio-ks8695.c284
-rw-r--r--drivers/gpio/gpio-lpc32xx.c118
-rw-r--r--drivers/gpio/gpio-madera.c12
-rw-r--r--drivers/gpio/gpio-max77620.c4
-rw-r--r--drivers/gpio/gpio-max77650.c1
-rw-r--r--drivers/gpio/gpio-mb86s7x.c1
-rw-r--r--drivers/gpio/gpio-mpc8xxx.c32
-rw-r--r--drivers/gpio/gpio-mt7621.c33
-rw-r--r--drivers/gpio/gpio-mxc.c9
-rw-r--r--drivers/gpio/gpio-pca953x.c70
-rw-r--r--drivers/gpio/gpio-pmic-eic-sprd.c4
-rw-r--r--drivers/gpio/gpio-sprd.c4
-rw-r--r--drivers/gpio/gpio-tb10x.c4
-rw-r--r--drivers/gpio/gpio-tegra.c4
-rw-r--r--drivers/gpio/gpio-thunderx.c163
-rw-r--r--drivers/gpio/gpio-tqmx86.c41
-rw-r--r--drivers/gpio/gpio-vf610.c26
-rw-r--r--drivers/gpio/gpio-viperboard.c20
-rw-r--r--drivers/gpio/gpio-xgene-sb.c1
-rw-r--r--drivers/gpio/gpio-xlp.c29
-rw-r--r--drivers/gpio/gpio-zx.c35
-rw-r--r--drivers/gpio/gpio-zynq.c41
-rw-r--r--drivers/gpio/gpiolib-acpi.c8
-rw-r--r--drivers/gpio/gpiolib-acpi.h104
-rw-r--r--drivers/gpio/gpiolib-of.c128
-rw-r--r--drivers/gpio/gpiolib-of.h45
-rw-r--r--drivers/gpio/gpiolib.c658
-rw-r--r--drivers/gpio/gpiolib.h120
-rw-r--r--drivers/gpio/sgpio-aspeed.c533
-rw-r--r--drivers/pinctrl/pinctrl-stmfx.c18
-rw-r--r--drivers/pinctrl/qcom/Kconfig1
-rw-r--r--drivers/pinctrl/qcom/pinctrl-msm.c23
-rw-r--r--drivers/pinctrl/qcom/pinctrl-spmi-gpio.c92
-rw-r--r--include/linux/acpi.h51
-rw-r--r--include/linux/gpio.h13
-rw-r--r--include/linux/gpio/consumer.h135
-rw-r--r--include/linux/gpio/driver.h164
-rw-r--r--sound/soc/intel/boards/bytcht_cx2072x.c1
-rw-r--r--sound/soc/intel/boards/cht_bsw_max98090_ti.c1
-rw-r--r--sound/soc/intel/boards/cht_bsw_rt5672.c1
62 files changed, 2300 insertions, 1600 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
index bc6b4b62df83..cd91d61eac31 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
@@ -6,6 +6,7 @@ Required Properties:
6 66AK2E SoCs 6 66AK2E SoCs
7 "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G 7 "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G
8 "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654 8 "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654
9 "ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs
9 10
10- reg: Physical base address of the controller and the size of memory mapped 11- reg: Physical base address of the controller and the size of memory mapped
11 registers. 12 registers.
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
index 69d46162d0f5..cd28e932bf50 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
@@ -4,7 +4,7 @@ Required properties:
4- compatible : Should be "fsl,<soc>-gpio" 4- compatible : Should be "fsl,<soc>-gpio"
5 The following <soc>s are known to be supported: 5 The following <soc>s are known to be supported:
6 mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq, 6 mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
7 ls1021a, ls1043a, ls2080a. 7 ls1021a, ls1043a, ls2080a, ls1028a, ls1088a.
8- reg : Address and length of the register set for the device 8- reg : Address and length of the register set for the device
9- interrupts : Should be the port interrupt shared by all 32 pins. 9- interrupts : Should be the port interrupt shared by all 32 pins.
10- #gpio-cells : Should be two. The first cell is the pin number and 10- #gpio-cells : Should be two. The first cell is the pin number and
@@ -37,3 +37,17 @@ gpio0: gpio@2300000 {
37 interrupt-controller; 37 interrupt-controller;
38 #interrupt-cells = <2>; 38 #interrupt-cells = <2>;
39}; 39};
40
41
42Example of gpio-controller node for a ls1028a/ls1088a SoC:
43
44gpio1: gpio@2300000 {
45 compatible = "fsl,ls1028a-gpio", "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
46 reg = <0x0 0x2300000 0x0 0x10000>;
47 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
48 gpio-controller;
49 #gpio-cells = <2>;
50 interrupt-controller;
51 #interrupt-cells = <2>;
52 little-endian;
53};
diff --git a/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
new file mode 100644
index 000000000000..d4d83916c09d
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
@@ -0,0 +1,45 @@
1Aspeed SGPIO controller Device Tree Bindings
2--------------------------------------------
3
4This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
5featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
6support the following options:
7- Support interrupt option for each input port and various interrupt
8 sensitivity option (level-high, level-low, edge-high, edge-low)
9- Support reset tolerance option for each output port
10- Directly connected to APB bus and its shift clock is from APB bus clock
11 divided by a programmable value.
12- Co-work with external signal-chained TTL components (74LV165/74LV595)
13
14Required properties:
15
16- compatible : Should be one of
17 "aspeed,ast2400-sgpio", "aspeed,ast2500-sgpio"
18- #gpio-cells : Should be 2, see gpio.txt
19- reg : Address and length of the register set for the device
20- gpio-controller : Marks the device node as a GPIO controller
21- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt
22- interrupt-controller : Mark the GPIO controller as an interrupt-controller
23- ngpios : number of GPIO lines, see gpio.txt
24 (should be multiple of 8, up to 80 pins)
25- clocks : A phandle to the APB clock for SGPM clock division
26- bus-frequency : SGPM CLK frequency
27
28The sgpio and interrupt properties are further described in their respective
29bindings documentation:
30
31- Documentation/devicetree/bindings/gpio/gpio.txt
32- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
33
34 Example:
35 sgpio: sgpio@1e780200 {
36 #gpio-cells = <2>;
37 compatible = "aspeed,ast2500-sgpio";
38 gpio-controller;
39 interrupts = <40>;
40 reg = <0x1e780200 0x0100>;
41 clocks = <&syscon ASPEED_CLK_APB>;
42 interrupt-controller;
43 ngpios = <8>;
44 bus-frequency = <12000000>;
45 };
diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst
index 921c71a3d683..3fdb32422f8a 100644
--- a/Documentation/driver-api/gpio/driver.rst
+++ b/Documentation/driver-api/gpio/driver.rst
@@ -69,9 +69,9 @@ driver code:
69 69
70The code implementing a gpio_chip should support multiple instances of the 70The code implementing a gpio_chip should support multiple instances of the
71controller, preferably using the driver model. That code will configure each 71controller, preferably using the driver model. That code will configure each
72gpio_chip and issue ``gpiochip_add[_data]()`` or ``devm_gpiochip_add_data()``. 72gpio_chip and issue gpiochip_add(), gpiochip_add_data(), or
73Removing a GPIO controller should be rare; use ``[devm_]gpiochip_remove()`` 73devm_gpiochip_add_data(). Removing a GPIO controller should be rare; use
74when it is unavoidable. 74gpiochip_remove() when it is unavoidable.
75 75
76Often a gpio_chip is part of an instance-specific structure with states not 76Often a gpio_chip is part of an instance-specific structure with states not
77exposed by the GPIO interfaces, such as addressing, power management, and more. 77exposed by the GPIO interfaces, such as addressing, power management, and more.
@@ -259,7 +259,7 @@ most often cascaded off a parent interrupt controller, and in some special
259cases the GPIO logic is melded with a SoC's primary interrupt controller. 259cases the GPIO logic is melded with a SoC's primary interrupt controller.
260 260
261The IRQ portions of the GPIO block are implemented using an irq_chip, using 261The IRQ portions of the GPIO block are implemented using an irq_chip, using
262the header <linux/irq.h>. So basically such a driver is utilizing two sub- 262the header <linux/irq.h>. So this combined driver is utilizing two sub-
263systems simultaneously: gpio and irq. 263systems simultaneously: gpio and irq.
264 264
265It is legal for any IRQ consumer to request an IRQ from any irqchip even if it 265It is legal for any IRQ consumer to request an IRQ from any irqchip even if it
@@ -391,25 +391,119 @@ Infrastructure helpers for GPIO irqchips
391---------------------------------------- 391----------------------------------------
392 392
393To help out in handling the set-up and management of GPIO irqchips and the 393To help out in handling the set-up and management of GPIO irqchips and the
394associated irqdomain and resource allocation callbacks, the gpiolib has 394associated irqdomain and resource allocation callbacks. These are activated
395some helpers that can be enabled by selecting the GPIOLIB_IRQCHIP Kconfig 395by selecting the Kconfig symbol GPIOLIB_IRQCHIP. If the symbol
396symbol: 396IRQ_DOMAIN_HIERARCHY is also selected, hierarchical helpers will also be
397 397provided. A big portion of overhead code will be managed by gpiolib,
398- gpiochip_irqchip_add(): adds a chained cascaded irqchip to a gpiochip. It 398under the assumption that your interrupts are 1-to-1-mapped to the
399 will pass the struct gpio_chip* for the chip to all IRQ callbacks, so the 399GPIO line index:
400 callbacks need to embed the gpio_chip in its state container and obtain a 400
401 pointer to the container using container_of(). 401 GPIO line offset Hardware IRQ
402 (See Documentation/driver-api/driver-model/design-patterns.rst) 402 0 0
403 1 1
404 2 2
405 ... ...
406 ngpio-1 ngpio-1
407
408If some GPIO lines do not have corresponding IRQs, the bitmask valid_mask
409and the flag need_valid_mask in gpio_irq_chip can be used to mask off some
410lines as invalid for associating with IRQs.
411
412The preferred way to set up the helpers is to fill in the
413struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip.
414If you do this, the additional irq_chip will be set up by gpiolib at the
415same time as setting up the rest of the GPIO functionality. The following
416is a typical example of a cascaded interrupt handler using gpio_irq_chip:
417
418 /* Typical state container with dynamic irqchip */
419 struct my_gpio {
420 struct gpio_chip gc;
421 struct irq_chip irq;
422 };
423
424 int irq; /* from platform etc */
425 struct my_gpio *g;
426 struct gpio_irq_chip *girq;
427
428 /* Set up the irqchip dynamically */
429 g->irq.name = "my_gpio_irq";
430 g->irq.irq_ack = my_gpio_ack_irq;
431 g->irq.irq_mask = my_gpio_mask_irq;
432 g->irq.irq_unmask = my_gpio_unmask_irq;
433 g->irq.irq_set_type = my_gpio_set_irq_type;
434
435 /* Get a pointer to the gpio_irq_chip */
436 girq = &g->gc.irq;
437 girq->chip = &g->irq;
438 girq->parent_handler = ftgpio_gpio_irq_handler;
439 girq->num_parents = 1;
440 girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
441 GFP_KERNEL);
442 if (!girq->parents)
443 return -ENOMEM;
444 girq->default_type = IRQ_TYPE_NONE;
445 girq->handler = handle_bad_irq;
446 girq->parents[0] = irq;
447
448 return devm_gpiochip_add_data(dev, &g->gc, g);
449
450The helper support using hierarchical interrupt controllers as well.
451In this case the typical set-up will look like this:
452
453 /* Typical state container with dynamic irqchip */
454 struct my_gpio {
455 struct gpio_chip gc;
456 struct irq_chip irq;
457 struct fwnode_handle *fwnode;
458 };
459
460 int irq; /* from platform etc */
461 struct my_gpio *g;
462 struct gpio_irq_chip *girq;
463
464 /* Set up the irqchip dynamically */
465 g->irq.name = "my_gpio_irq";
466 g->irq.irq_ack = my_gpio_ack_irq;
467 g->irq.irq_mask = my_gpio_mask_irq;
468 g->irq.irq_unmask = my_gpio_unmask_irq;
469 g->irq.irq_set_type = my_gpio_set_irq_type;
470
471 /* Get a pointer to the gpio_irq_chip */
472 girq = &g->gc.irq;
473 girq->chip = &g->irq;
474 girq->default_type = IRQ_TYPE_NONE;
475 girq->handler = handle_bad_irq;
476 girq->fwnode = g->fwnode;
477 girq->parent_domain = parent;
478 girq->child_to_parent_hwirq = my_gpio_child_to_parent_hwirq;
479
480 return devm_gpiochip_add_data(dev, &g->gc, g);
481
482As you can see pretty similar, but you do not supply a parent handler for
483the IRQ, instead a parent irqdomain, an fwnode for the hardware and
484a funcion .child_to_parent_hwirq() that has the purpose of looking up
485the parent hardware irq from a child (i.e. this gpio chip) hardware irq.
486As always it is good to look at examples in the kernel tree for advice
487on how to find the required pieces.
488
489The old way of adding irqchips to gpiochips after registration is also still
490available but we try to move away from this:
491
492- DEPRECATED: gpiochip_irqchip_add(): adds a chained cascaded irqchip to a
493 gpiochip. It will pass the struct gpio_chip* for the chip to all IRQ
494 callbacks, so the callbacks need to embed the gpio_chip in its state
495 container and obtain a pointer to the container using container_of().
496 (See Documentation/driver-model/design-patterns.txt)
403 497
404- gpiochip_irqchip_add_nested(): adds a nested cascaded irqchip to a gpiochip, 498- gpiochip_irqchip_add_nested(): adds a nested cascaded irqchip to a gpiochip,
405 as discussed above regarding different types of cascaded irqchips. The 499 as discussed above regarding different types of cascaded irqchips. The
406 cascaded irq has to be handled by a threaded interrupt handler. 500 cascaded irq has to be handled by a threaded interrupt handler.
407 Apart from that it works exactly like the chained irqchip. 501 Apart from that it works exactly like the chained irqchip.
408 502
409- gpiochip_set_chained_irqchip(): sets up a chained cascaded irq handler for a 503- DEPRECATED: gpiochip_set_chained_irqchip(): sets up a chained cascaded irq
410 gpio_chip from a parent IRQ and passes the struct gpio_chip* as handler 504 handler for a gpio_chip from a parent IRQ and passes the struct gpio_chip*
411 data. Notice that we pass is as the handler data, since the irqchip data is 505 as handler data. Notice that we pass is as the handler data, since the
412 likely used by the parent irqchip. 506 irqchip data is likely used by the parent irqchip.
413 507
414- gpiochip_set_nested_irqchip(): sets up a nested cascaded irq handler for a 508- gpiochip_set_nested_irqchip(): sets up a nested cascaded irq handler for a
415 gpio_chip from a parent IRQ. As the parent IRQ has usually been 509 gpio_chip from a parent IRQ. As the parent IRQ has usually been
@@ -418,11 +512,11 @@ symbol:
418 512
419If there is a need to exclude certain GPIO lines from the IRQ domain handled by 513If there is a need to exclude certain GPIO lines from the IRQ domain handled by
420these helpers, we can set .irq.need_valid_mask of the gpiochip before 514these helpers, we can set .irq.need_valid_mask of the gpiochip before
421``[devm_]gpiochip_add_data()`` is called. This allocates an .irq.valid_mask with as 515devm_gpiochip_add_data() or gpiochip_add_data() is called. This allocates an
422many bits set as there are GPIO lines in the chip, each bit representing line 516.irq.valid_mask with as many bits set as there are GPIO lines in the chip, each
4230..n-1. Drivers can exclude GPIO lines by clearing bits from this mask. The mask 517bit representing line 0..n-1. Drivers can exclude GPIO lines by clearing bits
424must be filled in before gpiochip_irqchip_add() or gpiochip_irqchip_add_nested() 518from this mask. The mask must be filled in before gpiochip_irqchip_add() or
425is called. 519gpiochip_irqchip_add_nested() is called.
426 520
427To use the helpers please keep the following in mind: 521To use the helpers please keep the following in mind:
428 522
diff --git a/MAINTAINERS b/MAINTAINERS
index e7a47b5210fd..914324095d53 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6331,15 +6331,6 @@ S: Odd Fixes
6331L: linux-block@vger.kernel.org 6331L: linux-block@vger.kernel.org
6332F: drivers/block/floppy.c 6332F: drivers/block/floppy.c
6333 6333
6334FMC SUBSYSTEM
6335M: Alessandro Rubini <rubini@gnudd.com>
6336W: http://www.ohwr.org/projects/fmc-bus
6337S: Supported
6338F: drivers/fmc/
6339F: include/linux/fmc*.h
6340F: include/linux/ipmi-fru.h
6341K: fmc_d.*register
6342
6343FPGA MANAGER FRAMEWORK 6334FPGA MANAGER FRAMEWORK
6344M: Moritz Fischer <mdf@kernel.org> 6335M: Moritz Fischer <mdf@kernel.org>
6345L: linux-fpga@vger.kernel.org 6336L: linux-fpga@vger.kernel.org
diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
index 0cdc6c7974b3..3772d5a8975a 100644
--- a/arch/arm/configs/lpc32xx_defconfig
+++ b/arch/arm/configs/lpc32xx_defconfig
@@ -93,6 +93,7 @@ CONFIG_SERIAL_HS_LPC32XX_CONSOLE=y
93# CONFIG_HW_RANDOM is not set 93# CONFIG_HW_RANDOM is not set
94CONFIG_I2C_CHARDEV=y 94CONFIG_I2C_CHARDEV=y
95CONFIG_I2C_PNX=y 95CONFIG_I2C_PNX=y
96CONFIG_GPIO_LPC32XX=y
96CONFIG_SPI=y 97CONFIG_SPI=y
97CONFIG_SPI_PL022=y 98CONFIG_SPI_PL022=y
98CONFIG_GPIO_SYSFS=y 99CONFIG_GPIO_SYSFS=y
diff --git a/arch/unicore32/kernel/irq.c b/arch/unicore32/kernel/irq.c
index d1129828c41e..c014ae3c3e48 100644
--- a/arch/unicore32/kernel/irq.c
+++ b/arch/unicore32/kernel/irq.c
@@ -21,7 +21,6 @@
21#include <linux/kallsyms.h> 21#include <linux/kallsyms.h>
22#include <linux/proc_fs.h> 22#include <linux/proc_fs.h>
23#include <linux/syscore_ops.h> 23#include <linux/syscore_ops.h>
24#include <linux/gpio.h>
25 24
26#include <mach/hardware.h> 25#include <mach/hardware.h>
27 26
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index bb13c266c329..e193c76948c4 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -288,7 +288,7 @@ config GPIO_IXP4XX
288 depends on ARM # For <asm/mach-types.h> 288 depends on ARM # For <asm/mach-types.h>
289 depends on ARCH_IXP4XX 289 depends on ARCH_IXP4XX
290 select GPIO_GENERIC 290 select GPIO_GENERIC
291 select IRQ_DOMAIN 291 select GPIOLIB_IRQCHIP
292 select IRQ_DOMAIN_HIERARCHY 292 select IRQ_DOMAIN_HIERARCHY
293 help 293 help
294 Say yes here to support the GPIO functionality of a number of Intel 294 Say yes here to support the GPIO functionality of a number of Intel
@@ -311,6 +311,13 @@ config GPIO_LPC18XX
311 Select this option to enable GPIO driver for 311 Select this option to enable GPIO driver for
312 NXP LPC18XX/43XX devices. 312 NXP LPC18XX/43XX devices.
313 313
314config GPIO_LPC32XX
315 tristate "NXP LPC32XX GPIO support"
316 depends on OF_GPIO && (ARCH_LPC32XX || COMPILE_TEST)
317 help
318 Select this option to enable GPIO driver for
319 NXP LPC32XX devices.
320
314config GPIO_LYNXPOINT 321config GPIO_LYNXPOINT
315 tristate "Intel Lynxpoint GPIO support" 322 tristate "Intel Lynxpoint GPIO support"
316 depends on ACPI && X86 323 depends on ACPI && X86
@@ -539,6 +546,7 @@ config GPIO_THUNDERX
539 tristate "Cavium ThunderX/OCTEON-TX GPIO" 546 tristate "Cavium ThunderX/OCTEON-TX GPIO"
540 depends on ARCH_THUNDER || (64BIT && COMPILE_TEST) 547 depends on ARCH_THUNDER || (64BIT && COMPILE_TEST)
541 depends on PCI_MSI 548 depends on PCI_MSI
549 select GPIOLIB_IRQCHIP
542 select IRQ_DOMAIN_HIERARCHY 550 select IRQ_DOMAIN_HIERARCHY
543 select IRQ_FASTEOI_HIERARCHY_HANDLERS 551 select IRQ_FASTEOI_HIERARCHY_HANDLERS
544 help 552 help
@@ -1465,7 +1473,6 @@ endmenu
1465 1473
1466config GPIO_MOCKUP 1474config GPIO_MOCKUP
1467 tristate "GPIO Testing Driver" 1475 tristate "GPIO Testing Driver"
1468 depends on GPIOLIB
1469 select IRQ_SIM 1476 select IRQ_SIM
1470 help 1477 help
1471 This enables GPIO Testing driver, which provides a way to test GPIO 1478 This enables GPIO Testing driver, which provides a way to test GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index a4e91175c708..f3e051fb50e6 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -67,14 +67,13 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o
67obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o 67obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o
68obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o 68obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
69obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o 69obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
70obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o
71obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o 70obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
72obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o 71obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
73obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o 72obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o
74obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o 73obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o
75obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o 74obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o
76obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o 75obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o
77obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o 76obj-$(CONFIG_GPIO_LPC32XX) += gpio-lpc32xx.o
78obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o 77obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o
79obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o 78obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o
80obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o 79obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o
diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c
index c07fad975049..5640efe5e750 100644
--- a/drivers/gpio/gpio-arizona.c
+++ b/drivers/gpio/gpio-arizona.c
@@ -142,7 +142,7 @@ static const struct gpio_chip template_chip = {
142static int arizona_gpio_probe(struct platform_device *pdev) 142static int arizona_gpio_probe(struct platform_device *pdev)
143{ 143{
144 struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); 144 struct arizona *arizona = dev_get_drvdata(pdev->dev.parent);
145 struct arizona_pdata *pdata = dev_get_platdata(arizona->dev); 145 struct arizona_pdata *pdata = &arizona->pdata;
146 struct arizona_gpio *arizona_gpio; 146 struct arizona_gpio *arizona_gpio;
147 int ret; 147 int ret;
148 148
@@ -177,7 +177,7 @@ static int arizona_gpio_probe(struct platform_device *pdev)
177 return -EINVAL; 177 return -EINVAL;
178 } 178 }
179 179
180 if (pdata && pdata->gpio_base) 180 if (pdata->gpio_base)
181 arizona_gpio->gpio_chip.base = pdata->gpio_base; 181 arizona_gpio->gpio_chip.base = pdata->gpio_base;
182 else 182 else
183 arizona_gpio->gpio_chip.base = -1; 183 arizona_gpio->gpio_chip.base = -1;
diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index 13d80bfbc3b6..9defe25d4721 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -711,32 +711,6 @@ static void set_irq_valid_mask(struct aspeed_gpio *gpio)
711 } 711 }
712} 712}
713 713
714static int aspeed_gpio_setup_irqs(struct aspeed_gpio *gpio,
715 struct platform_device *pdev)
716{
717 int rc;
718
719 rc = platform_get_irq(pdev, 0);
720 if (rc < 0)
721 return rc;
722
723 gpio->irq = rc;
724
725 set_irq_valid_mask(gpio);
726
727 rc = gpiochip_irqchip_add(&gpio->chip, &aspeed_gpio_irqchip,
728 0, handle_bad_irq, IRQ_TYPE_NONE);
729 if (rc) {
730 dev_info(&pdev->dev, "Could not add irqchip\n");
731 return rc;
732 }
733
734 gpiochip_set_chained_irqchip(&gpio->chip, &aspeed_gpio_irqchip,
735 gpio->irq, aspeed_gpio_irq_handler);
736
737 return 0;
738}
739
740static int aspeed_gpio_reset_tolerance(struct gpio_chip *chip, 714static int aspeed_gpio_reset_tolerance(struct gpio_chip *chip,
741 unsigned int offset, bool enable) 715 unsigned int offset, bool enable)
742{ 716{
@@ -1189,7 +1163,6 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
1189 gpio->chip.set_config = aspeed_gpio_set_config; 1163 gpio->chip.set_config = aspeed_gpio_set_config;
1190 gpio->chip.label = dev_name(&pdev->dev); 1164 gpio->chip.label = dev_name(&pdev->dev);
1191 gpio->chip.base = -1; 1165 gpio->chip.base = -1;
1192 gpio->chip.irq.need_valid_mask = true;
1193 1166
1194 /* Allocate a cache of the output registers */ 1167 /* Allocate a cache of the output registers */
1195 banks = gpio->config->nr_gpios >> 5; 1168 banks = gpio->config->nr_gpios >> 5;
@@ -1212,16 +1185,41 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
1212 aspeed_gpio_change_cmd_source(gpio, bank, 3, GPIO_CMDSRC_ARM); 1185 aspeed_gpio_change_cmd_source(gpio, bank, 3, GPIO_CMDSRC_ARM);
1213 } 1186 }
1214 1187
1215 rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio); 1188 /* Optionally set up an irqchip if there is an IRQ */
1216 if (rc < 0) 1189 rc = platform_get_irq(pdev, 0);
1217 return rc; 1190 if (rc > 0) {
1191 struct gpio_irq_chip *girq;
1192
1193 gpio->irq = rc;
1194 girq = &gpio->chip.irq;
1195 girq->chip = &aspeed_gpio_irqchip;
1196 girq->parent_handler = aspeed_gpio_irq_handler;
1197 girq->num_parents = 1;
1198 girq->parents = devm_kcalloc(&pdev->dev, 1,
1199 sizeof(*girq->parents),
1200 GFP_KERNEL);
1201 if (!girq->parents)
1202 return -ENOMEM;
1203 girq->parents[0] = gpio->irq;
1204 girq->default_type = IRQ_TYPE_NONE;
1205 girq->handler = handle_bad_irq;
1206 girq->need_valid_mask = true;
1207 }
1218 1208
1219 gpio->offset_timer = 1209 gpio->offset_timer =
1220 devm_kzalloc(&pdev->dev, gpio->chip.ngpio, GFP_KERNEL); 1210 devm_kzalloc(&pdev->dev, gpio->chip.ngpio, GFP_KERNEL);
1221 if (!gpio->offset_timer) 1211 if (!gpio->offset_timer)
1222 return -ENOMEM; 1212 return -ENOMEM;
1223 1213
1224 return aspeed_gpio_setup_irqs(gpio, pdev); 1214 rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
1215 if (rc < 0)
1216 return rc;
1217
1218 /* Now the valid mask is allocated */
1219 if (gpio->irq)
1220 set_irq_valid_mask(gpio);
1221
1222 return 0;
1225} 1223}
1226 1224
1227static struct platform_driver aspeed_gpio_driver = { 1225static struct platform_driver aspeed_gpio_driver = {
diff --git a/drivers/gpio/gpio-bd70528.c b/drivers/gpio/gpio-bd70528.c
index fd85605d2dab..0c1ead12d883 100644
--- a/drivers/gpio/gpio-bd70528.c
+++ b/drivers/gpio/gpio-bd70528.c
@@ -36,7 +36,7 @@ static int bd70528_set_debounce(struct bd70528_gpio *bdgpio,
36 break; 36 break;
37 default: 37 default:
38 dev_err(bdgpio->chip.dev, 38 dev_err(bdgpio->chip.dev,
39 "Invalid debouce value %u\n", debounce); 39 "Invalid debounce value %u\n", debounce);
40 return -EINVAL; 40 return -EINVAL;
41 } 41 }
42 return regmap_update_bits(bdgpio->chip.regmap, GPIO_IN_REG(offset), 42 return regmap_update_bits(bdgpio->chip.regmap, GPIO_IN_REG(offset),
@@ -153,7 +153,7 @@ static int bd70528_gpio_get_i(struct bd70528_gpio *bdgpio, unsigned int offset)
153 153
154static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset) 154static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset)
155{ 155{
156 int ret = -EINVAL; 156 int ret;
157 struct bd70528_gpio *bdgpio = gpiochip_get_data(chip); 157 struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
158 158
159 /* 159 /*
diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index af936dcca659..05e3f99ae59c 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -636,10 +636,8 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
636 636
637 if (of_property_read_bool(np, "interrupt-controller")) { 637 if (of_property_read_bool(np, "interrupt-controller")) {
638 priv->parent_irq = platform_get_irq(pdev, 0); 638 priv->parent_irq = platform_get_irq(pdev, 0);
639 if (priv->parent_irq <= 0) { 639 if (priv->parent_irq <= 0)
640 dev_err(dev, "Couldn't get IRQ");
641 return -ENOENT; 640 return -ENOENT;
642 }
643 } else { 641 } else {
644 priv->parent_irq = -ENOENT; 642 priv->parent_irq = -ENOENT;
645 } 643 }
diff --git a/drivers/gpio/gpio-cadence.c b/drivers/gpio/gpio-cadence.c
index 712ae212b0b4..a4d3239d2594 100644
--- a/drivers/gpio/gpio-cadence.c
+++ b/drivers/gpio/gpio-cadence.c
@@ -214,27 +214,33 @@ static int cdns_gpio_probe(struct platform_device *pdev)
214 goto err_revert_dir; 214 goto err_revert_dir;
215 } 215 }
216 216
217 ret = devm_gpiochip_add_data(&pdev->dev, &cgpio->gc, cgpio);
218 if (ret < 0) {
219 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
220 goto err_disable_clk;
221 }
222
223 /* 217 /*
224 * irq_chip support 218 * Optional irq_chip support
225 */ 219 */
226 irq = platform_get_irq(pdev, 0); 220 irq = platform_get_irq(pdev, 0);
227 if (irq >= 0) { 221 if (irq >= 0) {
228 ret = gpiochip_irqchip_add(&cgpio->gc, &cdns_gpio_irqchip, 222 struct gpio_irq_chip *girq;
229 0, handle_level_irq, 223
230 IRQ_TYPE_NONE); 224 girq = &cgpio->gc.irq;
231 if (ret) { 225 girq->chip = &cdns_gpio_irqchip;
232 dev_err(&pdev->dev, "Could not add irqchip, %d\n", 226 girq->parent_handler = cdns_gpio_irq_handler;
233 ret); 227 girq->num_parents = 1;
228 girq->parents = devm_kcalloc(&pdev->dev, 1,
229 sizeof(*girq->parents),
230 GFP_KERNEL);
231 if (!girq->parents) {
232 ret = -ENOMEM;
234 goto err_disable_clk; 233 goto err_disable_clk;
235 } 234 }
236 gpiochip_set_chained_irqchip(&cgpio->gc, &cdns_gpio_irqchip, 235 girq->parents[0] = irq;
237 irq, cdns_gpio_irq_handler); 236 girq->default_type = IRQ_TYPE_NONE;
237 girq->handler = handle_level_irq;
238 }
239
240 ret = devm_gpiochip_add_data(&pdev->dev, &cgpio->gc, cgpio);
241 if (ret < 0) {
242 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
243 goto err_disable_clk;
238 } 244 }
239 245
240 cgpio->bypass_orig = ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE); 246 cgpio->bypass_orig = ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE);
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 3108be5e208c..92e127e74813 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -27,6 +27,7 @@
27#include <linux/slab.h> 27#include <linux/slab.h>
28 28
29#include "gpiolib.h" 29#include "gpiolib.h"
30#include "gpiolib-acpi.h"
30 31
31#define GPIO_SWPORTA_DR 0x00 32#define GPIO_SWPORTA_DR 0x00
32#define GPIO_SWPORTA_DDR 0x04 33#define GPIO_SWPORTA_DDR 0x04
diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
index 7b9ac4a12c20..fe7a73f52329 100644
--- a/drivers/gpio/gpio-eic-sprd.c
+++ b/drivers/gpio/gpio-eic-sprd.c
@@ -584,10 +584,8 @@ static int sprd_eic_probe(struct platform_device *pdev)
584 sprd_eic->type = pdata->type; 584 sprd_eic->type = pdata->type;
585 585
586 sprd_eic->irq = platform_get_irq(pdev, 0); 586 sprd_eic->irq = platform_get_irq(pdev, 0);
587 if (sprd_eic->irq < 0) { 587 if (sprd_eic->irq < 0)
588 dev_err(&pdev->dev, "Failed to get EIC interrupt.\n");
589 return sprd_eic->irq; 588 return sprd_eic->irq;
590 }
591 589
592 for (i = 0; i < SPRD_EIC_MAX_BANK; i++) { 590 for (i = 0; i < SPRD_EIC_MAX_BANK; i++) {
593 /* 591 /*
diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
index a87951293aaa..620f25b7efb4 100644
--- a/drivers/gpio/gpio-em.c
+++ b/drivers/gpio/gpio-em.c
@@ -272,11 +272,12 @@ static int em_gio_probe(struct platform_device *pdev)
272 struct resource *io[2], *irq[2]; 272 struct resource *io[2], *irq[2];
273 struct gpio_chip *gpio_chip; 273 struct gpio_chip *gpio_chip;
274 struct irq_chip *irq_chip; 274 struct irq_chip *irq_chip;
275 const char *name = dev_name(&pdev->dev); 275 struct device *dev = &pdev->dev;
276 const char *name = dev_name(dev);
276 unsigned int ngpios; 277 unsigned int ngpios;
277 int ret; 278 int ret;
278 279
279 p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); 280 p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
280 if (!p) 281 if (!p)
281 return -ENOMEM; 282 return -ENOMEM;
282 283
@@ -290,27 +291,27 @@ static int em_gio_probe(struct platform_device *pdev)
290 irq[1] = platform_get_resource(pdev, IORESOURCE_IRQ, 1); 291 irq[1] = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
291 292
292 if (!io[0] || !io[1] || !irq[0] || !irq[1]) { 293 if (!io[0] || !io[1] || !irq[0] || !irq[1]) {
293 dev_err(&pdev->dev, "missing IRQ or IOMEM\n"); 294 dev_err(dev, "missing IRQ or IOMEM\n");
294 return -EINVAL; 295 return -EINVAL;
295 } 296 }
296 297
297 p->base0 = devm_ioremap_nocache(&pdev->dev, io[0]->start, 298 p->base0 = devm_ioremap_nocache(dev, io[0]->start,
298 resource_size(io[0])); 299 resource_size(io[0]));
299 if (!p->base0) 300 if (!p->base0)
300 return -ENOMEM; 301 return -ENOMEM;
301 302
302 p->base1 = devm_ioremap_nocache(&pdev->dev, io[1]->start, 303 p->base1 = devm_ioremap_nocache(dev, io[1]->start,
303 resource_size(io[1])); 304 resource_size(io[1]));
304 if (!p->base1) 305 if (!p->base1)
305 return -ENOMEM; 306 return -ENOMEM;
306 307
307 if (of_property_read_u32(pdev->dev.of_node, "ngpios", &ngpios)) { 308 if (of_property_read_u32(dev->of_node, "ngpios", &ngpios)) {
308 dev_err(&pdev->dev, "Missing ngpios OF property\n"); 309 dev_err(dev, "Missing ngpios OF property\n");
309 return -EINVAL; 310 return -EINVAL;
310 } 311 }
311 312
312 gpio_chip = &p->gpio_chip; 313 gpio_chip = &p->gpio_chip;
313 gpio_chip->of_node = pdev->dev.of_node; 314 gpio_chip->of_node = dev->of_node;
314 gpio_chip->direction_input = em_gio_direction_input; 315 gpio_chip->direction_input = em_gio_direction_input;
315 gpio_chip->get = em_gio_get; 316 gpio_chip->get = em_gio_get;
316 gpio_chip->direction_output = em_gio_direction_output; 317 gpio_chip->direction_output = em_gio_direction_output;
@@ -319,7 +320,7 @@ static int em_gio_probe(struct platform_device *pdev)
319 gpio_chip->request = em_gio_request; 320 gpio_chip->request = em_gio_request;
320 gpio_chip->free = em_gio_free; 321 gpio_chip->free = em_gio_free;
321 gpio_chip->label = name; 322 gpio_chip->label = name;
322 gpio_chip->parent = &pdev->dev; 323 gpio_chip->parent = dev;
323 gpio_chip->owner = THIS_MODULE; 324 gpio_chip->owner = THIS_MODULE;
324 gpio_chip->base = -1; 325 gpio_chip->base = -1;
325 gpio_chip->ngpio = ngpios; 326 gpio_chip->ngpio = ngpios;
@@ -333,33 +334,33 @@ static int em_gio_probe(struct platform_device *pdev)
333 irq_chip->irq_release_resources = em_gio_irq_relres; 334 irq_chip->irq_release_resources = em_gio_irq_relres;
334 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND; 335 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
335 336
336 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node, ngpios, 0, 337 p->irq_domain = irq_domain_add_simple(dev->of_node, ngpios, 0,
337 &em_gio_irq_domain_ops, p); 338 &em_gio_irq_domain_ops, p);
338 if (!p->irq_domain) { 339 if (!p->irq_domain) {
339 dev_err(&pdev->dev, "cannot initialize irq domain\n"); 340 dev_err(dev, "cannot initialize irq domain\n");
340 return -ENXIO; 341 return -ENXIO;
341 } 342 }
342 343
343 ret = devm_add_action_or_reset(&pdev->dev, em_gio_irq_domain_remove, 344 ret = devm_add_action_or_reset(dev, em_gio_irq_domain_remove,
344 p->irq_domain); 345 p->irq_domain);
345 if (ret) 346 if (ret)
346 return ret; 347 return ret;
347 348
348 if (devm_request_irq(&pdev->dev, irq[0]->start, 349 if (devm_request_irq(dev, irq[0]->start,
349 em_gio_irq_handler, 0, name, p)) { 350 em_gio_irq_handler, 0, name, p)) {
350 dev_err(&pdev->dev, "failed to request low IRQ\n"); 351 dev_err(dev, "failed to request low IRQ\n");
351 return -ENOENT; 352 return -ENOENT;
352 } 353 }
353 354
354 if (devm_request_irq(&pdev->dev, irq[1]->start, 355 if (devm_request_irq(dev, irq[1]->start,
355 em_gio_irq_handler, 0, name, p)) { 356 em_gio_irq_handler, 0, name, p)) {
356 dev_err(&pdev->dev, "failed to request high IRQ\n"); 357 dev_err(dev, "failed to request high IRQ\n");
357 return -ENOENT; 358 return -ENOENT;
358 } 359 }
359 360
360 ret = devm_gpiochip_add_data(&pdev->dev, gpio_chip, p); 361 ret = devm_gpiochip_add_data(dev, gpio_chip, p);
361 if (ret) { 362 if (ret) {
362 dev_err(&pdev->dev, "failed to add GPIO controller\n"); 363 dev_err(dev, "failed to add GPIO controller\n");
363 return ret; 364 return ret;
364 } 365 }
365 366
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index a90870a60c15..226da8df6f10 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c
@@ -269,56 +269,6 @@ static struct irq_chip ep93xx_gpio_irq_chip = {
269 .irq_set_type = ep93xx_gpio_irq_type, 269 .irq_set_type = ep93xx_gpio_irq_type,
270}; 270};
271 271
272static int ep93xx_gpio_init_irq(struct platform_device *pdev,
273 struct ep93xx_gpio *epg)
274{
275 int ab_parent_irq = platform_get_irq(pdev, 0);
276 struct device *dev = &pdev->dev;
277 int gpio_irq;
278 int ret;
279 int i;
280
281 /* The A bank */
282 ret = gpiochip_irqchip_add(&epg->gc[0], &ep93xx_gpio_irq_chip,
283 64, handle_level_irq,
284 IRQ_TYPE_NONE);
285 if (ret) {
286 dev_err(dev, "Could not add irqchip 0\n");
287 return ret;
288 }
289 gpiochip_set_chained_irqchip(&epg->gc[0], &ep93xx_gpio_irq_chip,
290 ab_parent_irq,
291 ep93xx_gpio_ab_irq_handler);
292
293 /* The B bank */
294 ret = gpiochip_irqchip_add(&epg->gc[1], &ep93xx_gpio_irq_chip,
295 72, handle_level_irq,
296 IRQ_TYPE_NONE);
297 if (ret) {
298 dev_err(dev, "Could not add irqchip 1\n");
299 return ret;
300 }
301 gpiochip_set_chained_irqchip(&epg->gc[1], &ep93xx_gpio_irq_chip,
302 ab_parent_irq,
303 ep93xx_gpio_ab_irq_handler);
304
305 /* The F bank */
306 for (i = 0; i < 8; i++) {
307 gpio_irq = EP93XX_GPIO_F_IRQ_BASE + i;
308 irq_set_chip_data(gpio_irq, &epg->gc[5]);
309 irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip,
310 handle_level_irq);
311 irq_clear_status_flags(gpio_irq, IRQ_NOREQUEST);
312 }
313
314 for (i = 1; i <= 8; i++)
315 irq_set_chained_handler_and_data(platform_get_irq(pdev, i),
316 ep93xx_gpio_f_irq_handler,
317 &epg->gc[i]);
318 return 0;
319}
320
321
322/************************************************************************* 272/*************************************************************************
323 * gpiolib interface for EP93xx on-chip GPIOs 273 * gpiolib interface for EP93xx on-chip GPIOs
324 *************************************************************************/ 274 *************************************************************************/
@@ -328,26 +278,33 @@ struct ep93xx_gpio_bank {
328 int dir; 278 int dir;
329 int base; 279 int base;
330 bool has_irq; 280 bool has_irq;
281 bool has_hierarchical_irq;
282 unsigned int irq_base;
331}; 283};
332 284
333#define EP93XX_GPIO_BANK(_label, _data, _dir, _base, _has_irq) \ 285#define EP93XX_GPIO_BANK(_label, _data, _dir, _base, _has_irq, _has_hier, _irq_base) \
334 { \ 286 { \
335 .label = _label, \ 287 .label = _label, \
336 .data = _data, \ 288 .data = _data, \
337 .dir = _dir, \ 289 .dir = _dir, \
338 .base = _base, \ 290 .base = _base, \
339 .has_irq = _has_irq, \ 291 .has_irq = _has_irq, \
292 .has_hierarchical_irq = _has_hier, \
293 .irq_base = _irq_base, \
340 } 294 }
341 295
342static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = { 296static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = {
343 EP93XX_GPIO_BANK("A", 0x00, 0x10, 0, true), /* Bank A has 8 IRQs */ 297 /* Bank A has 8 IRQs */
344 EP93XX_GPIO_BANK("B", 0x04, 0x14, 8, true), /* Bank B has 8 IRQs */ 298 EP93XX_GPIO_BANK("A", 0x00, 0x10, 0, true, false, 64),
345 EP93XX_GPIO_BANK("C", 0x08, 0x18, 40, false), 299 /* Bank B has 8 IRQs */
346 EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24, false), 300 EP93XX_GPIO_BANK("B", 0x04, 0x14, 8, true, false, 72),
347 EP93XX_GPIO_BANK("E", 0x20, 0x24, 32, false), 301 EP93XX_GPIO_BANK("C", 0x08, 0x18, 40, false, false, 0),
348 EP93XX_GPIO_BANK("F", 0x30, 0x34, 16, true), /* Bank F has 8 IRQs */ 302 EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24, false, false, 0),
349 EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48, false), 303 EP93XX_GPIO_BANK("E", 0x20, 0x24, 32, false, false, 0),
350 EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false), 304 /* Bank F has 8 IRQs */
305 EP93XX_GPIO_BANK("F", 0x30, 0x34, 16, false, true, 0),
306 EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48, false, false, 0),
307 EP93XX_GPIO_BANK("H", 0x40, 0x44, 56, false, false, 0),
351}; 308};
352 309
353static int ep93xx_gpio_set_config(struct gpio_chip *gc, unsigned offset, 310static int ep93xx_gpio_set_config(struct gpio_chip *gc, unsigned offset,
@@ -369,12 +326,15 @@ static int ep93xx_gpio_f_to_irq(struct gpio_chip *gc, unsigned offset)
369 return EP93XX_GPIO_F_IRQ_BASE + offset; 326 return EP93XX_GPIO_F_IRQ_BASE + offset;
370} 327}
371 328
372static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev, 329static int ep93xx_gpio_add_bank(struct gpio_chip *gc,
330 struct platform_device *pdev,
373 struct ep93xx_gpio *epg, 331 struct ep93xx_gpio *epg,
374 struct ep93xx_gpio_bank *bank) 332 struct ep93xx_gpio_bank *bank)
375{ 333{
376 void __iomem *data = epg->base + bank->data; 334 void __iomem *data = epg->base + bank->data;
377 void __iomem *dir = epg->base + bank->dir; 335 void __iomem *dir = epg->base + bank->dir;
336 struct device *dev = &pdev->dev;
337 struct gpio_irq_chip *girq;
378 int err; 338 int err;
379 339
380 err = bgpio_init(gc, dev, 1, data, NULL, NULL, dir, NULL, 0); 340 err = bgpio_init(gc, dev, 1, data, NULL, NULL, dir, NULL, 0);
@@ -384,8 +344,59 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev,
384 gc->label = bank->label; 344 gc->label = bank->label;
385 gc->base = bank->base; 345 gc->base = bank->base;
386 346
387 if (bank->has_irq) 347 girq = &gc->irq;
348 if (bank->has_irq || bank->has_hierarchical_irq) {
388 gc->set_config = ep93xx_gpio_set_config; 349 gc->set_config = ep93xx_gpio_set_config;
350 girq->chip = &ep93xx_gpio_irq_chip;
351 }
352
353 if (bank->has_irq) {
354 int ab_parent_irq = platform_get_irq(pdev, 0);
355
356 girq->parent_handler = ep93xx_gpio_ab_irq_handler;
357 girq->num_parents = 1;
358 girq->parents = devm_kcalloc(dev, 1,
359 sizeof(*girq->parents),
360 GFP_KERNEL);
361 if (!girq->parents)
362 return -ENOMEM;
363 girq->default_type = IRQ_TYPE_NONE;
364 girq->handler = handle_level_irq;
365 girq->parents[0] = ab_parent_irq;
366 girq->first = bank->irq_base;
367 }
368
369 /* Only bank F has especially funky IRQ handling */
370 if (bank->has_hierarchical_irq) {
371 int gpio_irq;
372 int i;
373
374 /*
375 * FIXME: convert this to use hierarchical IRQ support!
376 * this requires fixing the root irqchip to be hierarchial.
377 */
378 girq->parent_handler = ep93xx_gpio_f_irq_handler;
379 girq->num_parents = 8;
380 girq->parents = devm_kcalloc(dev, 8,
381 sizeof(*girq->parents),
382 GFP_KERNEL);
383 if (!girq->parents)
384 return -ENOMEM;
385 /* Pick resources 1..8 for these IRQs */
386 for (i = 1; i <= 8; i++)
387 girq->parents[i - 1] = platform_get_irq(pdev, i);
388 for (i = 0; i < 8; i++) {
389 gpio_irq = EP93XX_GPIO_F_IRQ_BASE + i;
390 irq_set_chip_data(gpio_irq, &epg->gc[5]);
391 irq_set_chip_and_handler(gpio_irq,
392 &ep93xx_gpio_irq_chip,
393 handle_level_irq);
394 irq_clear_status_flags(gpio_irq, IRQ_NOREQUEST);
395 }
396 girq->default_type = IRQ_TYPE_NONE;
397 girq->handler = handle_level_irq;
398 gc->to_irq = ep93xx_gpio_f_to_irq;
399 }
389 400
390 return devm_gpiochip_add_data(dev, gc, epg); 401 return devm_gpiochip_add_data(dev, gc, epg);
391} 402}
@@ -407,16 +418,11 @@ static int ep93xx_gpio_probe(struct platform_device *pdev)
407 struct gpio_chip *gc = &epg->gc[i]; 418 struct gpio_chip *gc = &epg->gc[i];
408 struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i]; 419 struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i];
409 420
410 if (ep93xx_gpio_add_bank(gc, &pdev->dev, epg, bank)) 421 if (ep93xx_gpio_add_bank(gc, pdev, epg, bank))
411 dev_warn(&pdev->dev, "Unable to add gpio bank %s\n", 422 dev_warn(&pdev->dev, "Unable to add gpio bank %s\n",
412 bank->label); 423 bank->label);
413 /* Only bank F has especially funky IRQ handling */
414 if (i == 5)
415 gc->to_irq = ep93xx_gpio_f_to_irq;
416 } 424 }
417 425
418 ep93xx_gpio_init_irq(pdev, epg);
419
420 return 0; 426 return 0;
421} 427}
422 428
diff --git a/drivers/gpio/gpio-ftgpio010.c b/drivers/gpio/gpio-ftgpio010.c
index 250e71f3e688..fbddb1662428 100644
--- a/drivers/gpio/gpio-ftgpio010.c
+++ b/drivers/gpio/gpio-ftgpio010.c
@@ -290,16 +290,14 @@ static int ftgpio_gpio_probe(struct platform_device *pdev)
290 girq->num_parents = 1; 290 girq->num_parents = 1;
291 girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), 291 girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
292 GFP_KERNEL); 292 GFP_KERNEL);
293 if (!girq->parents) 293 if (!girq->parents) {
294 return -ENOMEM; 294 ret = -ENOMEM;
295 goto dis_clk;
296 }
295 girq->default_type = IRQ_TYPE_NONE; 297 girq->default_type = IRQ_TYPE_NONE;
296 girq->handler = handle_bad_irq; 298 girq->handler = handle_bad_irq;
297 girq->parents[0] = irq; 299 girq->parents[0] = irq;
298 300
299 ret = devm_gpiochip_add_data(dev, &g->gc, g);
300 if (ret)
301 goto dis_clk;
302
303 /* Disable, unmask and clear all interrupts */ 301 /* Disable, unmask and clear all interrupts */
304 writel(0x0, g->base + GPIO_INT_EN); 302 writel(0x0, g->base + GPIO_INT_EN);
305 writel(0x0, g->base + GPIO_INT_MASK); 303 writel(0x0, g->base + GPIO_INT_MASK);
@@ -308,6 +306,10 @@ static int ftgpio_gpio_probe(struct platform_device *pdev)
308 /* Clear any use of debounce */ 306 /* Clear any use of debounce */
309 writel(0x0, g->base + GPIO_DEBOUNCE_EN); 307 writel(0x0, g->base + GPIO_DEBOUNCE_EN);
310 308
309 ret = devm_gpiochip_add_data(dev, &g->gc, g);
310 if (ret)
311 goto dis_clk;
312
311 platform_set_drvdata(pdev, g); 313 platform_set_drvdata(pdev, g);
312 dev_info(dev, "FTGPIO010 @%p registered\n", g->base); 314 dev_info(dev, "FTGPIO010 @%p registered\n", g->base);
313 315
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c
index 0937b605e134..08234e64993a 100644
--- a/drivers/gpio/gpio-grgpio.c
+++ b/drivers/gpio/gpio-grgpio.c
@@ -408,8 +408,6 @@ static int grgpio_probe(struct platform_device *ofdev)
408 * Continue without irq functionality for that 408 * Continue without irq functionality for that
409 * gpio line 409 * gpio line
410 */ 410 */
411 dev_err(priv->dev,
412 "Failed to get irq for offset %d\n", i);
413 continue; 411 continue;
414 } 412 }
415 priv->uirqs[lirq->index].uirq = ret; 413 priv->uirqs[lirq->index].uirq = ret;
diff --git a/drivers/gpio/gpio-hlwd.c b/drivers/gpio/gpio-hlwd.c
index e5fa00f8145f..4a17599f6d44 100644
--- a/drivers/gpio/gpio-hlwd.c
+++ b/drivers/gpio/gpio-hlwd.c
@@ -244,43 +244,45 @@ static int hlwd_gpio_probe(struct platform_device *pdev)
244 ngpios = 32; 244 ngpios = 32;
245 hlwd->gpioc.ngpio = ngpios; 245 hlwd->gpioc.ngpio = ngpios;
246 246
247 res = devm_gpiochip_add_data(&pdev->dev, &hlwd->gpioc, hlwd);
248 if (res)
249 return res;
250
251 /* Mask and ack all interrupts */ 247 /* Mask and ack all interrupts */
252 iowrite32be(0, hlwd->regs + HW_GPIOB_INTMASK); 248 iowrite32be(0, hlwd->regs + HW_GPIOB_INTMASK);
253 iowrite32be(0xffffffff, hlwd->regs + HW_GPIOB_INTFLAG); 249 iowrite32be(0xffffffff, hlwd->regs + HW_GPIOB_INTFLAG);
254 250
255 /* 251 /*
256 * If this GPIO controller is not marked as an interrupt controller in 252 * If this GPIO controller is not marked as an interrupt controller in
257 * the DT, return. 253 * the DT, skip interrupt support.
258 */ 254 */
259 if (!of_property_read_bool(pdev->dev.of_node, "interrupt-controller")) 255 if (of_property_read_bool(pdev->dev.of_node, "interrupt-controller")) {
260 return 0; 256 struct gpio_irq_chip *girq;
261 257
262 hlwd->irq = platform_get_irq(pdev, 0); 258 hlwd->irq = platform_get_irq(pdev, 0);
263 if (hlwd->irq < 0) { 259 if (hlwd->irq < 0) {
264 dev_info(&pdev->dev, "platform_get_irq returned %d\n", 260 dev_info(&pdev->dev, "platform_get_irq returned %d\n",
265 hlwd->irq); 261 hlwd->irq);
266 return hlwd->irq; 262 return hlwd->irq;
263 }
264
265 hlwd->irqc.name = dev_name(&pdev->dev);
266 hlwd->irqc.irq_mask = hlwd_gpio_irq_mask;
267 hlwd->irqc.irq_unmask = hlwd_gpio_irq_unmask;
268 hlwd->irqc.irq_enable = hlwd_gpio_irq_enable;
269 hlwd->irqc.irq_set_type = hlwd_gpio_irq_set_type;
270
271 girq = &hlwd->gpioc.irq;
272 girq->chip = &hlwd->irqc;
273 girq->parent_handler = hlwd_gpio_irqhandler;
274 girq->num_parents = 1;
275 girq->parents = devm_kcalloc(&pdev->dev, 1,
276 sizeof(*girq->parents),
277 GFP_KERNEL);
278 if (!girq->parents)
279 return -ENOMEM;
280 girq->parents[0] = hlwd->irq;
281 girq->default_type = IRQ_TYPE_NONE;
282 girq->handler = handle_level_irq;
267 } 283 }
268 284
269 hlwd->irqc.name = dev_name(&pdev->dev); 285 return devm_gpiochip_add_data(&pdev->dev, &hlwd->gpioc, hlwd);
270 hlwd->irqc.irq_mask = hlwd_gpio_irq_mask;
271 hlwd->irqc.irq_unmask = hlwd_gpio_irq_unmask;
272 hlwd->irqc.irq_enable = hlwd_gpio_irq_enable;
273 hlwd->irqc.irq_set_type = hlwd_gpio_irq_set_type;
274
275 res = gpiochip_irqchip_add(&hlwd->gpioc, &hlwd->irqc, 0,
276 handle_level_irq, IRQ_TYPE_NONE);
277 if (res)
278 return res;
279
280 gpiochip_set_chained_irqchip(&hlwd->gpioc, &hlwd->irqc,
281 hlwd->irq, hlwd_gpio_irqhandler);
282
283 return 0;
284} 286}
285 287
286static const struct of_device_id hlwd_gpio_match[] = { 288static const struct of_device_id hlwd_gpio_match[] = {
diff --git a/drivers/gpio/gpio-ixp4xx.c b/drivers/gpio/gpio-ixp4xx.c
index 670c2a85a35b..b3b050604e0b 100644
--- a/drivers/gpio/gpio-ixp4xx.c
+++ b/drivers/gpio/gpio-ixp4xx.c
@@ -47,7 +47,6 @@
47 * @dev: containing device for this instance 47 * @dev: containing device for this instance
48 * @fwnode: the fwnode for this GPIO chip 48 * @fwnode: the fwnode for this GPIO chip
49 * @gc: gpiochip for this instance 49 * @gc: gpiochip for this instance
50 * @domain: irqdomain for this chip instance
51 * @base: remapped I/O-memory base 50 * @base: remapped I/O-memory base
52 * @irq_edge: Each bit represents an IRQ: 1: edge-triggered, 51 * @irq_edge: Each bit represents an IRQ: 1: edge-triggered,
53 * 0: level triggered 52 * 0: level triggered
@@ -56,48 +55,22 @@ struct ixp4xx_gpio {
56 struct device *dev; 55 struct device *dev;
57 struct fwnode_handle *fwnode; 56 struct fwnode_handle *fwnode;
58 struct gpio_chip gc; 57 struct gpio_chip gc;
59 struct irq_domain *domain;
60 void __iomem *base; 58 void __iomem *base;
61 unsigned long long irq_edge; 59 unsigned long long irq_edge;
62}; 60};
63 61
64/**
65 * struct ixp4xx_gpio_map - IXP4 GPIO to parent IRQ map
66 * @gpio_offset: offset of the IXP4 GPIO line
67 * @parent_hwirq: hwirq on the parent IRQ controller
68 */
69struct ixp4xx_gpio_map {
70 int gpio_offset;
71 int parent_hwirq;
72};
73
74/* GPIO lines 0..12 have corresponding IRQs, GPIOs 13..15 have no IRQs */
75const struct ixp4xx_gpio_map ixp4xx_gpiomap[] = {
76 { .gpio_offset = 0, .parent_hwirq = 6 },
77 { .gpio_offset = 1, .parent_hwirq = 7 },
78 { .gpio_offset = 2, .parent_hwirq = 19 },
79 { .gpio_offset = 3, .parent_hwirq = 20 },
80 { .gpio_offset = 4, .parent_hwirq = 21 },
81 { .gpio_offset = 5, .parent_hwirq = 22 },
82 { .gpio_offset = 6, .parent_hwirq = 23 },
83 { .gpio_offset = 7, .parent_hwirq = 24 },
84 { .gpio_offset = 8, .parent_hwirq = 25 },
85 { .gpio_offset = 9, .parent_hwirq = 26 },
86 { .gpio_offset = 10, .parent_hwirq = 27 },
87 { .gpio_offset = 11, .parent_hwirq = 28 },
88 { .gpio_offset = 12, .parent_hwirq = 29 },
89};
90
91static void ixp4xx_gpio_irq_ack(struct irq_data *d) 62static void ixp4xx_gpio_irq_ack(struct irq_data *d)
92{ 63{
93 struct ixp4xx_gpio *g = irq_data_get_irq_chip_data(d); 64 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
65 struct ixp4xx_gpio *g = gpiochip_get_data(gc);
94 66
95 __raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS); 67 __raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS);
96} 68}
97 69
98static void ixp4xx_gpio_irq_unmask(struct irq_data *d) 70static void ixp4xx_gpio_irq_unmask(struct irq_data *d)
99{ 71{
100 struct ixp4xx_gpio *g = irq_data_get_irq_chip_data(d); 72 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
73 struct ixp4xx_gpio *g = gpiochip_get_data(gc);
101 74
102 /* ACK when unmasking if not edge-triggered */ 75 /* ACK when unmasking if not edge-triggered */
103 if (!(g->irq_edge & BIT(d->hwirq))) 76 if (!(g->irq_edge & BIT(d->hwirq)))
@@ -108,7 +81,8 @@ static void ixp4xx_gpio_irq_unmask(struct irq_data *d)
108 81
109static int ixp4xx_gpio_irq_set_type(struct irq_data *d, unsigned int type) 82static int ixp4xx_gpio_irq_set_type(struct irq_data *d, unsigned int type)
110{ 83{
111 struct ixp4xx_gpio *g = irq_data_get_irq_chip_data(d); 84 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
85 struct ixp4xx_gpio *g = gpiochip_get_data(gc);
112 int line = d->hwirq; 86 int line = d->hwirq;
113 unsigned long flags; 87 unsigned long flags;
114 u32 int_style; 88 u32 int_style;
@@ -187,122 +161,31 @@ static struct irq_chip ixp4xx_gpio_irqchip = {
187 .irq_set_type = ixp4xx_gpio_irq_set_type, 161 .irq_set_type = ixp4xx_gpio_irq_set_type,
188}; 162};
189 163
190static int ixp4xx_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) 164static int ixp4xx_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
165 unsigned int child,
166 unsigned int child_type,
167 unsigned int *parent,
168 unsigned int *parent_type)
191{ 169{
192 struct ixp4xx_gpio *g = gpiochip_get_data(gc); 170 /* All these interrupts are level high in the CPU */
193 struct irq_fwspec fwspec; 171 *parent_type = IRQ_TYPE_LEVEL_HIGH;
194
195 fwspec.fwnode = g->fwnode;
196 fwspec.param_count = 2;
197 fwspec.param[0] = offset;
198 fwspec.param[1] = IRQ_TYPE_NONE;
199
200 return irq_create_fwspec_mapping(&fwspec);
201}
202 172
203static int ixp4xx_gpio_irq_domain_translate(struct irq_domain *domain, 173 /* GPIO lines 0..12 have dedicated IRQs */
204 struct irq_fwspec *fwspec, 174 if (child == 0) {
205 unsigned long *hwirq, 175 *parent = 6;
206 unsigned int *type) 176 return 0;
207{
208 int ret;
209
210 /* We support standard DT translation */
211 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
212 return irq_domain_translate_twocell(domain, fwspec,
213 hwirq, type);
214 } 177 }
215 178 if (child == 1) {
216 /* This goes away when we transition to DT */ 179 *parent = 7;
217 if (is_fwnode_irqchip(fwspec->fwnode)) {
218 ret = irq_domain_translate_twocell(domain, fwspec,
219 hwirq, type);
220 if (ret)
221 return ret;
222 WARN_ON(*type == IRQ_TYPE_NONE);
223 return 0; 180 return 0;
224 } 181 }
225 return -EINVAL; 182 if (child >= 2 && child <= 12) {
226} 183 *parent = child + 17;
227 184 return 0;
228static int ixp4xx_gpio_irq_domain_alloc(struct irq_domain *d,
229 unsigned int irq, unsigned int nr_irqs,
230 void *data)
231{
232 struct ixp4xx_gpio *g = d->host_data;
233 irq_hw_number_t hwirq;
234 unsigned int type = IRQ_TYPE_NONE;
235 struct irq_fwspec *fwspec = data;
236 int ret;
237 int i;
238
239 ret = ixp4xx_gpio_irq_domain_translate(d, fwspec, &hwirq, &type);
240 if (ret)
241 return ret;
242
243 dev_dbg(g->dev, "allocate IRQ %d..%d, hwirq %lu..%lu\n",
244 irq, irq + nr_irqs - 1,
245 hwirq, hwirq + nr_irqs - 1);
246
247 for (i = 0; i < nr_irqs; i++) {
248 struct irq_fwspec parent_fwspec;
249 const struct ixp4xx_gpio_map *map;
250 int j;
251
252 /* Not all lines support IRQs */
253 for (j = 0; j < ARRAY_SIZE(ixp4xx_gpiomap); j++) {
254 map = &ixp4xx_gpiomap[j];
255 if (map->gpio_offset == hwirq)
256 break;
257 }
258 if (j == ARRAY_SIZE(ixp4xx_gpiomap)) {
259 dev_err(g->dev, "can't look up hwirq %lu\n", hwirq);
260 return -EINVAL;
261 }
262 dev_dbg(g->dev, "found parent hwirq %u\n", map->parent_hwirq);
263
264 /*
265 * We set handle_bad_irq because the .set_type() should
266 * always be invoked and set the right type of handler.
267 */
268 irq_domain_set_info(d,
269 irq + i,
270 hwirq + i,
271 &ixp4xx_gpio_irqchip,
272 g,
273 handle_bad_irq,
274 NULL, NULL);
275 irq_set_probe(irq + i);
276
277 /*
278 * Create a IRQ fwspec to send up to the parent irqdomain:
279 * specify the hwirq we address on the parent and tie it
280 * all together up the chain.
281 */
282 parent_fwspec.fwnode = d->parent->fwnode;
283 parent_fwspec.param_count = 2;
284 parent_fwspec.param[0] = map->parent_hwirq;
285 /* This parent only handles asserted level IRQs */
286 parent_fwspec.param[1] = IRQ_TYPE_LEVEL_HIGH;
287 dev_dbg(g->dev, "alloc_irqs_parent for %d parent hwirq %d\n",
288 irq + i, map->parent_hwirq);
289 ret = irq_domain_alloc_irqs_parent(d, irq + i, 1,
290 &parent_fwspec);
291 if (ret)
292 dev_err(g->dev,
293 "failed to allocate parent hwirq %d for hwirq %lu\n",
294 map->parent_hwirq, hwirq);
295 } 185 }
296 186 return -EINVAL;
297 return 0;
298} 187}
299 188
300static const struct irq_domain_ops ixp4xx_gpio_irqdomain_ops = {
301 .translate = ixp4xx_gpio_irq_domain_translate,
302 .alloc = ixp4xx_gpio_irq_domain_alloc,
303 .free = irq_domain_free_irqs_common,
304};
305
306static int ixp4xx_gpio_probe(struct platform_device *pdev) 189static int ixp4xx_gpio_probe(struct platform_device *pdev)
307{ 190{
308 unsigned long flags; 191 unsigned long flags;
@@ -311,8 +194,8 @@ static int ixp4xx_gpio_probe(struct platform_device *pdev)
311 struct irq_domain *parent; 194 struct irq_domain *parent;
312 struct resource *res; 195 struct resource *res;
313 struct ixp4xx_gpio *g; 196 struct ixp4xx_gpio *g;
197 struct gpio_irq_chip *girq;
314 int ret; 198 int ret;
315 int i;
316 199
317 g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL); 200 g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL);
318 if (!g) 201 if (!g)
@@ -321,9 +204,36 @@ static int ixp4xx_gpio_probe(struct platform_device *pdev)
321 204
322 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 205 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
323 g->base = devm_ioremap_resource(dev, res); 206 g->base = devm_ioremap_resource(dev, res);
324 if (IS_ERR(g->base)) { 207 if (IS_ERR(g->base))
325 dev_err(dev, "ioremap error\n");
326 return PTR_ERR(g->base); 208 return PTR_ERR(g->base);
209
210 /*
211 * When we convert to device tree we will simply look up the
212 * parent irqdomain using irq_find_host(parent) as parent comes
213 * from IRQCHIP_DECLARE(), then use of_node_to_fwnode() to get
214 * the fwnode. For now we need this boardfile style code.
215 */
216 if (np) {
217 struct device_node *irq_parent;
218
219 irq_parent = of_irq_find_parent(np);
220 if (!irq_parent) {
221 dev_err(dev, "no IRQ parent node\n");
222 return -ENODEV;
223 }
224 parent = irq_find_host(irq_parent);
225 if (!parent) {
226 dev_err(dev, "no IRQ parent domain\n");
227 return -ENODEV;
228 }
229 g->fwnode = of_node_to_fwnode(np);
230 } else {
231 parent = ixp4xx_get_irq_domain();
232 g->fwnode = irq_domain_alloc_fwnode(&res->start);
233 if (!g->fwnode) {
234 dev_err(dev, "no domain base\n");
235 return -ENODEV;
236 }
327 } 237 }
328 238
329 /* 239 /*
@@ -360,7 +270,6 @@ static int ixp4xx_gpio_probe(struct platform_device *pdev)
360 dev_err(dev, "unable to init generic GPIO\n"); 270 dev_err(dev, "unable to init generic GPIO\n");
361 return ret; 271 return ret;
362 } 272 }
363 g->gc.to_irq = ixp4xx_gpio_to_irq;
364 g->gc.ngpio = 16; 273 g->gc.ngpio = 16;
365 g->gc.label = "IXP4XX_GPIO_CHIP"; 274 g->gc.label = "IXP4XX_GPIO_CHIP";
366 /* 275 /*
@@ -372,86 +281,22 @@ static int ixp4xx_gpio_probe(struct platform_device *pdev)
372 g->gc.parent = &pdev->dev; 281 g->gc.parent = &pdev->dev;
373 g->gc.owner = THIS_MODULE; 282 g->gc.owner = THIS_MODULE;
374 283
284 girq = &g->gc.irq;
285 girq->chip = &ixp4xx_gpio_irqchip;
286 girq->fwnode = g->fwnode;
287 girq->parent_domain = parent;
288 girq->child_to_parent_hwirq = ixp4xx_gpio_child_to_parent_hwirq;
289 girq->handler = handle_bad_irq;
290 girq->default_type = IRQ_TYPE_NONE;
291
375 ret = devm_gpiochip_add_data(dev, &g->gc, g); 292 ret = devm_gpiochip_add_data(dev, &g->gc, g);
376 if (ret) { 293 if (ret) {
377 dev_err(dev, "failed to add SoC gpiochip\n"); 294 dev_err(dev, "failed to add SoC gpiochip\n");
378 return ret; 295 return ret;
379 } 296 }
380 297
381 /*
382 * When we convert to device tree we will simply look up the
383 * parent irqdomain using irq_find_host(parent) as parent comes
384 * from IRQCHIP_DECLARE(), then use of_node_to_fwnode() to get
385 * the fwnode. For now we need this boardfile style code.
386 */
387 if (np) {
388 struct device_node *irq_parent;
389
390 irq_parent = of_irq_find_parent(np);
391 if (!irq_parent) {
392 dev_err(dev, "no IRQ parent node\n");
393 return -ENODEV;
394 }
395 parent = irq_find_host(irq_parent);
396 if (!parent) {
397 dev_err(dev, "no IRQ parent domain\n");
398 return -ENODEV;
399 }
400 g->fwnode = of_node_to_fwnode(np);
401 } else {
402 parent = ixp4xx_get_irq_domain();
403 g->fwnode = irq_domain_alloc_fwnode(g->base);
404 if (!g->fwnode) {
405 dev_err(dev, "no domain base\n");
406 return -ENODEV;
407 }
408 }
409 g->domain = irq_domain_create_hierarchy(parent,
410 IRQ_DOMAIN_FLAG_HIERARCHY,
411 ARRAY_SIZE(ixp4xx_gpiomap),
412 g->fwnode,
413 &ixp4xx_gpio_irqdomain_ops,
414 g);
415 if (!g->domain) {
416 irq_domain_free_fwnode(g->fwnode);
417 dev_err(dev, "no hierarchical irq domain\n");
418 return ret;
419 }
420
421 /*
422 * After adding OF support, this is no longer needed: irqs
423 * will be allocated for the respective fwnodes.
424 */
425 if (!np) {
426 for (i = 0; i < ARRAY_SIZE(ixp4xx_gpiomap); i++) {
427 const struct ixp4xx_gpio_map *map = &ixp4xx_gpiomap[i];
428 struct irq_fwspec fwspec;
429
430 fwspec.fwnode = g->fwnode;
431 /* This is the hwirq for the GPIO line side of things */
432 fwspec.param[0] = map->gpio_offset;
433 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
434 fwspec.param_count = 2;
435 ret = __irq_domain_alloc_irqs(g->domain,
436 -1, /* just pick something */
437 1,
438 NUMA_NO_NODE,
439 &fwspec,
440 false,
441 NULL);
442 if (ret < 0) {
443 irq_domain_free_fwnode(g->fwnode);
444 dev_err(dev,
445 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
446 map->gpio_offset, map->parent_hwirq,
447 ret);
448 return ret;
449 }
450 }
451 }
452
453 platform_set_drvdata(pdev, g); 298 platform_set_drvdata(pdev, g);
454 dev_info(dev, "IXP4 GPIO @%p registered\n", g->base); 299 dev_info(dev, "IXP4 GPIO registered\n");
455 300
456 return 0; 301 return 0;
457} 302}
diff --git a/drivers/gpio/gpio-ks8695.c b/drivers/gpio/gpio-ks8695.c
deleted file mode 100644
index a0f87c124894..000000000000
--- a/drivers/gpio/gpio-ks8695.c
+++ /dev/null
@@ -1,284 +0,0 @@
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * arch/arm/mach-ks8695/gpio.c
4 *
5 * Copyright (C) 2006 Andrew Victor
6 * Updated to GPIOLIB, Copyright 2008 Simtec Electronics
7 * Daniel Silverstone <dsilvers@simtec.co.uk>
8 */
9#include <linux/gpio/driver.h>
10#include <linux/kernel.h>
11#include <linux/mm.h>
12#include <linux/init.h>
13#include <linux/debugfs.h>
14#include <linux/seq_file.h>
15#include <linux/module.h>
16#include <linux/io.h>
17
18#include <mach/hardware.h>
19#include <asm/mach/irq.h>
20
21#include <mach/regs-gpio.h>
22#include <mach/gpio-ks8695.h>
23
24/*
25 * Configure a GPIO line for either GPIO function, or its internal
26 * function (Interrupt, Timer, etc).
27 */
28static void ks8695_gpio_mode(unsigned int pin, short gpio)
29{
30 unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
31 unsigned long x, flags;
32
33 if (pin > KS8695_GPIO_5) /* only GPIO 0..5 have internal functions */
34 return;
35
36 local_irq_save(flags);
37
38 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
39 if (gpio) /* GPIO: set bit to 0 */
40 x &= ~enable[pin];
41 else /* Internal function: set bit to 1 */
42 x |= enable[pin];
43 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPC);
44
45 local_irq_restore(flags);
46}
47
48
49static unsigned short gpio_irq[] = { KS8695_IRQ_EXTERN0, KS8695_IRQ_EXTERN1, KS8695_IRQ_EXTERN2, KS8695_IRQ_EXTERN3 };
50
51/*
52 * Configure GPIO pin as external interrupt source.
53 */
54int ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
55{
56 unsigned long x, flags;
57
58 if (pin > KS8695_GPIO_3) /* only GPIO 0..3 can generate IRQ */
59 return -EINVAL;
60
61 local_irq_save(flags);
62
63 /* set pin as input */
64 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
65 x &= ~IOPM(pin);
66 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
67
68 local_irq_restore(flags);
69
70 /* Set IRQ triggering type */
71 irq_set_irq_type(gpio_irq[pin], type);
72
73 /* enable interrupt mode */
74 ks8695_gpio_mode(pin, 0);
75
76 return 0;
77}
78EXPORT_SYMBOL(ks8695_gpio_interrupt);
79
80
81
82/* .... Generic GPIO interface .............................................. */
83
84/*
85 * Configure the GPIO line as an input.
86 */
87static int ks8695_gpio_direction_input(struct gpio_chip *gc, unsigned int pin)
88{
89 unsigned long x, flags;
90
91 if (pin > KS8695_GPIO_15)
92 return -EINVAL;
93
94 /* set pin to GPIO mode */
95 ks8695_gpio_mode(pin, 1);
96
97 local_irq_save(flags);
98
99 /* set pin as input */
100 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
101 x &= ~IOPM(pin);
102 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
103
104 local_irq_restore(flags);
105
106 return 0;
107}
108
109
110/*
111 * Configure the GPIO line as an output, with default state.
112 */
113static int ks8695_gpio_direction_output(struct gpio_chip *gc,
114 unsigned int pin, int state)
115{
116 unsigned long x, flags;
117
118 if (pin > KS8695_GPIO_15)
119 return -EINVAL;
120
121 /* set pin to GPIO mode */
122 ks8695_gpio_mode(pin, 1);
123
124 local_irq_save(flags);
125
126 /* set line state */
127 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
128 if (state)
129 x |= IOPD(pin);
130 else
131 x &= ~IOPD(pin);
132 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
133
134 /* set pin as output */
135 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
136 x |= IOPM(pin);
137 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
138
139 local_irq_restore(flags);
140
141 return 0;
142}
143
144
145/*
146 * Set the state of an output GPIO line.
147 */
148static void ks8695_gpio_set_value(struct gpio_chip *gc,
149 unsigned int pin, int state)
150{
151 unsigned long x, flags;
152
153 if (pin > KS8695_GPIO_15)
154 return;
155
156 local_irq_save(flags);
157
158 /* set output line state */
159 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
160 if (state)
161 x |= IOPD(pin);
162 else
163 x &= ~IOPD(pin);
164 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
165
166 local_irq_restore(flags);
167}
168
169
170/*
171 * Read the state of a GPIO line.
172 */
173static int ks8695_gpio_get_value(struct gpio_chip *gc, unsigned int pin)
174{
175 unsigned long x;
176
177 if (pin > KS8695_GPIO_15)
178 return -EINVAL;
179
180 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
181 return (x & IOPD(pin)) != 0;
182}
183
184
185/*
186 * Map GPIO line to IRQ number.
187 */
188static int ks8695_gpio_to_irq(struct gpio_chip *gc, unsigned int pin)
189{
190 if (pin > KS8695_GPIO_3) /* only GPIO 0..3 can generate IRQ */
191 return -EINVAL;
192
193 return gpio_irq[pin];
194}
195
196/* GPIOLIB interface */
197
198static struct gpio_chip ks8695_gpio_chip = {
199 .label = "KS8695",
200 .direction_input = ks8695_gpio_direction_input,
201 .direction_output = ks8695_gpio_direction_output,
202 .get = ks8695_gpio_get_value,
203 .set = ks8695_gpio_set_value,
204 .to_irq = ks8695_gpio_to_irq,
205 .base = 0,
206 .ngpio = 16,
207 .can_sleep = false,
208};
209
210/* Register the GPIOs */
211void ks8695_register_gpios(void)
212{
213 if (gpiochip_add_data(&ks8695_gpio_chip, NULL))
214 printk(KERN_ERR "Unable to register core GPIOs\n");
215}
216
217/* .... Debug interface ..................................................... */
218
219#ifdef CONFIG_DEBUG_FS
220
221static int ks8695_gpio_show(struct seq_file *s, void *unused)
222{
223 unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
224 unsigned int intmask[] = { IOPC_IOEINT0TM, IOPC_IOEINT1TM, IOPC_IOEINT2TM, IOPC_IOEINT3TM };
225 unsigned long mode, ctrl, data;
226 int i;
227
228 mode = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
229 ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
230 data = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
231
232 seq_printf(s, "Pin\tI/O\tFunction\tState\n\n");
233
234 for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) {
235 seq_printf(s, "%i:\t", i);
236
237 seq_printf(s, "%s\t", (mode & IOPM(i)) ? "Output" : "Input");
238
239 if (i <= KS8695_GPIO_3) {
240 if (ctrl & enable[i]) {
241 seq_printf(s, "EXT%i ", i);
242
243 switch ((ctrl & intmask[i]) >> (4 * i)) {
244 case IOPC_TM_LOW:
245 seq_printf(s, "(Low)"); break;
246 case IOPC_TM_HIGH:
247 seq_printf(s, "(High)"); break;
248 case IOPC_TM_RISING:
249 seq_printf(s, "(Rising)"); break;
250 case IOPC_TM_FALLING:
251 seq_printf(s, "(Falling)"); break;
252 case IOPC_TM_EDGE:
253 seq_printf(s, "(Edges)"); break;
254 }
255 } else
256 seq_printf(s, "GPIO\t");
257 } else if (i <= KS8695_GPIO_5) {
258 if (ctrl & enable[i])
259 seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4);
260 else
261 seq_printf(s, "GPIO\t");
262 } else {
263 seq_printf(s, "GPIO\t");
264 }
265
266 seq_printf(s, "\t");
267
268 seq_printf(s, "%i\n", (data & IOPD(i)) ? 1 : 0);
269 }
270 return 0;
271}
272
273DEFINE_SHOW_ATTRIBUTE(ks8695_gpio);
274
275static int __init ks8695_gpio_debugfs_init(void)
276{
277 /* /sys/kernel/debug/ks8695_gpio */
278 debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL,
279 &ks8695_gpio_fops);
280 return 0;
281}
282postcore_initcall(ks8695_gpio_debugfs_init);
283
284#endif
diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c
index 24885b3db3d5..4e626c4235c2 100644
--- a/drivers/gpio/gpio-lpc32xx.c
+++ b/drivers/gpio/gpio-lpc32xx.c
@@ -16,36 +16,33 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/module.h> 17#include <linux/module.h>
18 18
19#include <mach/hardware.h> 19#define LPC32XX_GPIO_P3_INP_STATE (0x000)
20#include <mach/platform.h> 20#define LPC32XX_GPIO_P3_OUTP_SET (0x004)
21 21#define LPC32XX_GPIO_P3_OUTP_CLR (0x008)
22#define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000) 22#define LPC32XX_GPIO_P3_OUTP_STATE (0x00C)
23#define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004) 23#define LPC32XX_GPIO_P2_DIR_SET (0x010)
24#define LPC32XX_GPIO_P3_OUTP_CLR _GPREG(0x008) 24#define LPC32XX_GPIO_P2_DIR_CLR (0x014)
25#define LPC32XX_GPIO_P3_OUTP_STATE _GPREG(0x00C) 25#define LPC32XX_GPIO_P2_DIR_STATE (0x018)
26#define LPC32XX_GPIO_P2_DIR_SET _GPREG(0x010) 26#define LPC32XX_GPIO_P2_INP_STATE (0x01C)
27#define LPC32XX_GPIO_P2_DIR_CLR _GPREG(0x014) 27#define LPC32XX_GPIO_P2_OUTP_SET (0x020)
28#define LPC32XX_GPIO_P2_DIR_STATE _GPREG(0x018) 28#define LPC32XX_GPIO_P2_OUTP_CLR (0x024)
29#define LPC32XX_GPIO_P2_INP_STATE _GPREG(0x01C) 29#define LPC32XX_GPIO_P2_MUX_SET (0x028)
30#define LPC32XX_GPIO_P2_OUTP_SET _GPREG(0x020) 30#define LPC32XX_GPIO_P2_MUX_CLR (0x02C)
31#define LPC32XX_GPIO_P2_OUTP_CLR _GPREG(0x024) 31#define LPC32XX_GPIO_P2_MUX_STATE (0x030)
32#define LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028) 32#define LPC32XX_GPIO_P0_INP_STATE (0x040)
33#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C) 33#define LPC32XX_GPIO_P0_OUTP_SET (0x044)
34#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030) 34#define LPC32XX_GPIO_P0_OUTP_CLR (0x048)
35#define LPC32XX_GPIO_P0_INP_STATE _GPREG(0x040) 35#define LPC32XX_GPIO_P0_OUTP_STATE (0x04C)
36#define LPC32XX_GPIO_P0_OUTP_SET _GPREG(0x044) 36#define LPC32XX_GPIO_P0_DIR_SET (0x050)
37#define LPC32XX_GPIO_P0_OUTP_CLR _GPREG(0x048) 37#define LPC32XX_GPIO_P0_DIR_CLR (0x054)
38#define LPC32XX_GPIO_P0_OUTP_STATE _GPREG(0x04C) 38#define LPC32XX_GPIO_P0_DIR_STATE (0x058)
39#define LPC32XX_GPIO_P0_DIR_SET _GPREG(0x050) 39#define LPC32XX_GPIO_P1_INP_STATE (0x060)
40#define LPC32XX_GPIO_P0_DIR_CLR _GPREG(0x054) 40#define LPC32XX_GPIO_P1_OUTP_SET (0x064)
41#define LPC32XX_GPIO_P0_DIR_STATE _GPREG(0x058) 41#define LPC32XX_GPIO_P1_OUTP_CLR (0x068)
42#define LPC32XX_GPIO_P1_INP_STATE _GPREG(0x060) 42#define LPC32XX_GPIO_P1_OUTP_STATE (0x06C)
43#define LPC32XX_GPIO_P1_OUTP_SET _GPREG(0x064) 43#define LPC32XX_GPIO_P1_DIR_SET (0x070)
44#define LPC32XX_GPIO_P1_OUTP_CLR _GPREG(0x068) 44#define LPC32XX_GPIO_P1_DIR_CLR (0x074)
45#define LPC32XX_GPIO_P1_OUTP_STATE _GPREG(0x06C) 45#define LPC32XX_GPIO_P1_DIR_STATE (0x078)
46#define LPC32XX_GPIO_P1_DIR_SET _GPREG(0x070)
47#define LPC32XX_GPIO_P1_DIR_CLR _GPREG(0x074)
48#define LPC32XX_GPIO_P1_DIR_STATE _GPREG(0x078)
49 46
50#define GPIO012_PIN_TO_BIT(x) (1 << (x)) 47#define GPIO012_PIN_TO_BIT(x) (1 << (x))
51#define GPIO3_PIN_TO_BIT(x) (1 << ((x) + 25)) 48#define GPIO3_PIN_TO_BIT(x) (1 << ((x) + 25))
@@ -72,12 +69,12 @@
72#define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX) 69#define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX)
73 70
74struct gpio_regs { 71struct gpio_regs {
75 void __iomem *inp_state; 72 unsigned long inp_state;
76 void __iomem *outp_state; 73 unsigned long outp_state;
77 void __iomem *outp_set; 74 unsigned long outp_set;
78 void __iomem *outp_clr; 75 unsigned long outp_clr;
79 void __iomem *dir_set; 76 unsigned long dir_set;
80 void __iomem *dir_clr; 77 unsigned long dir_clr;
81}; 78};
82 79
83/* 80/*
@@ -165,16 +162,27 @@ static struct gpio_regs gpio_grp_regs_p3 = {
165struct lpc32xx_gpio_chip { 162struct lpc32xx_gpio_chip {
166 struct gpio_chip chip; 163 struct gpio_chip chip;
167 struct gpio_regs *gpio_grp; 164 struct gpio_regs *gpio_grp;
165 void __iomem *reg_base;
168}; 166};
169 167
168static inline u32 gpreg_read(struct lpc32xx_gpio_chip *group, unsigned long offset)
169{
170 return __raw_readl(group->reg_base + offset);
171}
172
173static inline void gpreg_write(struct lpc32xx_gpio_chip *group, u32 val, unsigned long offset)
174{
175 __raw_writel(val, group->reg_base + offset);
176}
177
170static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group, 178static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group,
171 unsigned pin, int input) 179 unsigned pin, int input)
172{ 180{
173 if (input) 181 if (input)
174 __raw_writel(GPIO012_PIN_TO_BIT(pin), 182 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
175 group->gpio_grp->dir_clr); 183 group->gpio_grp->dir_clr);
176 else 184 else
177 __raw_writel(GPIO012_PIN_TO_BIT(pin), 185 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
178 group->gpio_grp->dir_set); 186 group->gpio_grp->dir_set);
179} 187}
180 188
@@ -184,19 +192,19 @@ static void __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group,
184 u32 u = GPIO3_PIN_TO_BIT(pin); 192 u32 u = GPIO3_PIN_TO_BIT(pin);
185 193
186 if (input) 194 if (input)
187 __raw_writel(u, group->gpio_grp->dir_clr); 195 gpreg_write(group, u, group->gpio_grp->dir_clr);
188 else 196 else
189 __raw_writel(u, group->gpio_grp->dir_set); 197 gpreg_write(group, u, group->gpio_grp->dir_set);
190} 198}
191 199
192static void __set_gpio_level_p012(struct lpc32xx_gpio_chip *group, 200static void __set_gpio_level_p012(struct lpc32xx_gpio_chip *group,
193 unsigned pin, int high) 201 unsigned pin, int high)
194{ 202{
195 if (high) 203 if (high)
196 __raw_writel(GPIO012_PIN_TO_BIT(pin), 204 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
197 group->gpio_grp->outp_set); 205 group->gpio_grp->outp_set);
198 else 206 else
199 __raw_writel(GPIO012_PIN_TO_BIT(pin), 207 gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
200 group->gpio_grp->outp_clr); 208 group->gpio_grp->outp_clr);
201} 209}
202 210
@@ -206,31 +214,31 @@ static void __set_gpio_level_p3(struct lpc32xx_gpio_chip *group,
206 u32 u = GPIO3_PIN_TO_BIT(pin); 214 u32 u = GPIO3_PIN_TO_BIT(pin);
207 215
208 if (high) 216 if (high)
209 __raw_writel(u, group->gpio_grp->outp_set); 217 gpreg_write(group, u, group->gpio_grp->outp_set);
210 else 218 else
211 __raw_writel(u, group->gpio_grp->outp_clr); 219 gpreg_write(group, u, group->gpio_grp->outp_clr);
212} 220}
213 221
214static void __set_gpo_level_p3(struct lpc32xx_gpio_chip *group, 222static void __set_gpo_level_p3(struct lpc32xx_gpio_chip *group,
215 unsigned pin, int high) 223 unsigned pin, int high)
216{ 224{
217 if (high) 225 if (high)
218 __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set); 226 gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set);
219 else 227 else
220 __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr); 228 gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr);
221} 229}
222 230
223static int __get_gpio_state_p012(struct lpc32xx_gpio_chip *group, 231static int __get_gpio_state_p012(struct lpc32xx_gpio_chip *group,
224 unsigned pin) 232 unsigned pin)
225{ 233{
226 return GPIO012_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), 234 return GPIO012_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state),
227 pin); 235 pin);
228} 236}
229 237
230static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group, 238static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
231 unsigned pin) 239 unsigned pin)
232{ 240{
233 int state = __raw_readl(group->gpio_grp->inp_state); 241 int state = gpreg_read(group, group->gpio_grp->inp_state);
234 242
235 /* 243 /*
236 * P3 GPIO pin input mapping is not contiguous, GPIOP3-0..4 is mapped 244 * P3 GPIO pin input mapping is not contiguous, GPIOP3-0..4 is mapped
@@ -242,13 +250,13 @@ static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
242static int __get_gpi_state_p3(struct lpc32xx_gpio_chip *group, 250static int __get_gpi_state_p3(struct lpc32xx_gpio_chip *group,
243 unsigned pin) 251 unsigned pin)
244{ 252{
245 return GPI3_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), pin); 253 return GPI3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state), pin);
246} 254}
247 255
248static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, 256static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group,
249 unsigned pin) 257 unsigned pin)
250{ 258{
251 return GPO3_PIN_IN_SEL(__raw_readl(group->gpio_grp->outp_state), pin); 259 return GPO3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->outp_state), pin);
252} 260}
253 261
254/* 262/*
@@ -497,12 +505,18 @@ static int lpc32xx_of_xlate(struct gpio_chip *gc,
497static int lpc32xx_gpio_probe(struct platform_device *pdev) 505static int lpc32xx_gpio_probe(struct platform_device *pdev)
498{ 506{
499 int i; 507 int i;
508 void __iomem *reg_base;
509
510 reg_base = devm_platform_ioremap_resource(pdev, 0);
511 if (IS_ERR(reg_base))
512 return PTR_ERR(reg_base);
500 513
501 for (i = 0; i < ARRAY_SIZE(lpc32xx_gpiochip); i++) { 514 for (i = 0; i < ARRAY_SIZE(lpc32xx_gpiochip); i++) {
502 if (pdev->dev.of_node) { 515 if (pdev->dev.of_node) {
503 lpc32xx_gpiochip[i].chip.of_xlate = lpc32xx_of_xlate; 516 lpc32xx_gpiochip[i].chip.of_xlate = lpc32xx_of_xlate;
504 lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3; 517 lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3;
505 lpc32xx_gpiochip[i].chip.of_node = pdev->dev.of_node; 518 lpc32xx_gpiochip[i].chip.of_node = pdev->dev.of_node;
519 lpc32xx_gpiochip[i].reg_base = reg_base;
506 } 520 }
507 devm_gpiochip_add_data(&pdev->dev, &lpc32xx_gpiochip[i].chip, 521 devm_gpiochip_add_data(&pdev->dev, &lpc32xx_gpiochip[i].chip,
508 &lpc32xx_gpiochip[i]); 522 &lpc32xx_gpiochip[i]);
@@ -527,3 +541,7 @@ static struct platform_driver lpc32xx_gpio_driver = {
527}; 541};
528 542
529module_platform_driver(lpc32xx_gpio_driver); 543module_platform_driver(lpc32xx_gpio_driver);
544
545MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com>");
546MODULE_LICENSE("GPL");
547MODULE_DESCRIPTION("GPIO driver for LPC32xx SoC");
diff --git a/drivers/gpio/gpio-madera.c b/drivers/gpio/gpio-madera.c
index 4dbc837d1215..7086f8b5388f 100644
--- a/drivers/gpio/gpio-madera.c
+++ b/drivers/gpio/gpio-madera.c
@@ -120,7 +120,7 @@ static const struct gpio_chip madera_gpio_chip = {
120static int madera_gpio_probe(struct platform_device *pdev) 120static int madera_gpio_probe(struct platform_device *pdev)
121{ 121{
122 struct madera *madera = dev_get_drvdata(pdev->dev.parent); 122 struct madera *madera = dev_get_drvdata(pdev->dev.parent);
123 struct madera_pdata *pdata = dev_get_platdata(madera->dev); 123 struct madera_pdata *pdata = &madera->pdata;
124 struct madera_gpio *madera_gpio; 124 struct madera_gpio *madera_gpio;
125 int ret; 125 int ret;
126 126
@@ -136,6 +136,9 @@ static int madera_gpio_probe(struct platform_device *pdev)
136 madera_gpio->gpio_chip.parent = pdev->dev.parent; 136 madera_gpio->gpio_chip.parent = pdev->dev.parent;
137 137
138 switch (madera->type) { 138 switch (madera->type) {
139 case CS47L15:
140 madera_gpio->gpio_chip.ngpio = CS47L15_NUM_GPIOS;
141 break;
139 case CS47L35: 142 case CS47L35:
140 madera_gpio->gpio_chip.ngpio = CS47L35_NUM_GPIOS; 143 madera_gpio->gpio_chip.ngpio = CS47L35_NUM_GPIOS;
141 break; 144 break;
@@ -147,13 +150,18 @@ static int madera_gpio_probe(struct platform_device *pdev)
147 case CS47L91: 150 case CS47L91:
148 madera_gpio->gpio_chip.ngpio = CS47L90_NUM_GPIOS; 151 madera_gpio->gpio_chip.ngpio = CS47L90_NUM_GPIOS;
149 break; 152 break;
153 case CS42L92:
154 case CS47L92:
155 case CS47L93:
156 madera_gpio->gpio_chip.ngpio = CS47L92_NUM_GPIOS;
157 break;
150 default: 158 default:
151 dev_err(&pdev->dev, "Unknown chip variant %d\n", madera->type); 159 dev_err(&pdev->dev, "Unknown chip variant %d\n", madera->type);
152 return -EINVAL; 160 return -EINVAL;
153 } 161 }
154 162
155 /* We want to be usable on systems that don't use devicetree or acpi */ 163 /* We want to be usable on systems that don't use devicetree or acpi */
156 if (pdata && pdata->gpio_base) 164 if (pdata->gpio_base)
157 madera_gpio->gpio_chip.base = pdata->gpio_base; 165 madera_gpio->gpio_chip.base = pdata->gpio_base;
158 else 166 else
159 madera_gpio->gpio_chip.base = -1; 167 madera_gpio->gpio_chip.base = -1;
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
index b7d89e30131e..47d05e357e61 100644
--- a/drivers/gpio/gpio-max77620.c
+++ b/drivers/gpio/gpio-max77620.c
@@ -270,10 +270,8 @@ static int max77620_gpio_probe(struct platform_device *pdev)
270 int ret; 270 int ret;
271 271
272 gpio_irq = platform_get_irq(pdev, 0); 272 gpio_irq = platform_get_irq(pdev, 0);
273 if (gpio_irq <= 0) { 273 if (gpio_irq <= 0)
274 dev_err(&pdev->dev, "GPIO irq not available %d\n", gpio_irq);
275 return -ENODEV; 274 return -ENODEV;
276 }
277 275
278 mgpio = devm_kzalloc(&pdev->dev, sizeof(*mgpio), GFP_KERNEL); 276 mgpio = devm_kzalloc(&pdev->dev, sizeof(*mgpio), GFP_KERNEL);
279 if (!mgpio) 277 if (!mgpio)
diff --git a/drivers/gpio/gpio-max77650.c b/drivers/gpio/gpio-max77650.c
index 3f03f4e8956c..3075f2513c6f 100644
--- a/drivers/gpio/gpio-max77650.c
+++ b/drivers/gpio/gpio-max77650.c
@@ -188,3 +188,4 @@ module_platform_driver(max77650_gpio_driver);
188MODULE_DESCRIPTION("MAXIM 77650/77651 GPIO driver"); 188MODULE_DESCRIPTION("MAXIM 77650/77651 GPIO driver");
189MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>"); 189MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>");
190MODULE_LICENSE("GPL v2"); 190MODULE_LICENSE("GPL v2");
191MODULE_ALIAS("platform:max77650-gpio");
diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c
index 8f466993cd24..501e89548f53 100644
--- a/drivers/gpio/gpio-mb86s7x.c
+++ b/drivers/gpio/gpio-mb86s7x.c
@@ -21,6 +21,7 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22 22
23#include "gpiolib.h" 23#include "gpiolib.h"
24#include "gpiolib-acpi.h"
24 25
25/* 26/*
26 * Only first 8bits of a register correspond to each pin, 27 * Only first 8bits of a register correspond to each pin,
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index c8673a5d9412..16a47de29c94 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -32,6 +32,7 @@
32#define GPIO_IMR 0x10 32#define GPIO_IMR 0x10
33#define GPIO_ICR 0x14 33#define GPIO_ICR 0x14
34#define GPIO_ICR2 0x18 34#define GPIO_ICR2 0x18
35#define GPIO_IBE 0x18
35 36
36struct mpc8xxx_gpio_chip { 37struct mpc8xxx_gpio_chip {
37 struct gpio_chip gc; 38 struct gpio_chip gc;
@@ -45,6 +46,27 @@ struct mpc8xxx_gpio_chip {
45 unsigned int irqn; 46 unsigned int irqn;
46}; 47};
47 48
49/* The GPIO Input Buffer Enable register(GPIO_IBE) is used to
50 * control the input enable of each individual GPIO port.
51 * When an individual GPIO port’s direction is set to
52 * input (GPIO_GPDIR[DRn=0]), the associated input enable must be
53 * set (GPIOxGPIE[IEn]=1) to propagate the port value to the GPIO
54 * Data Register.
55 */
56static int ls1028a_gpio_dir_in_init(struct gpio_chip *gc)
57{
58 unsigned long flags;
59 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
60
61 spin_lock_irqsave(&gc->bgpio_lock, flags);
62
63 gc->write_reg(mpc8xxx_gc->regs + GPIO_IBE, 0xffffffff);
64
65 spin_unlock_irqrestore(&gc->bgpio_lock, flags);
66
67 return 0;
68}
69
48/* 70/*
49 * This hardware has a big endian bit assignment such that GPIO line 0 is 71 * This hardware has a big endian bit assignment such that GPIO line 0 is
50 * connected to bit 31, line 1 to bit 30 ... line 31 to bit 0. 72 * connected to bit 31, line 1 to bit 30 ... line 31 to bit 0.
@@ -261,6 +283,7 @@ static const struct irq_domain_ops mpc8xxx_gpio_irq_ops = {
261}; 283};
262 284
263struct mpc8xxx_gpio_devtype { 285struct mpc8xxx_gpio_devtype {
286 int (*gpio_dir_in_init)(struct gpio_chip *chip);
264 int (*gpio_dir_out)(struct gpio_chip *, unsigned int, int); 287 int (*gpio_dir_out)(struct gpio_chip *, unsigned int, int);
265 int (*gpio_get)(struct gpio_chip *, unsigned int); 288 int (*gpio_get)(struct gpio_chip *, unsigned int);
266 int (*irq_set_type)(struct irq_data *, unsigned int); 289 int (*irq_set_type)(struct irq_data *, unsigned int);
@@ -271,6 +294,10 @@ static const struct mpc8xxx_gpio_devtype mpc512x_gpio_devtype = {
271 .irq_set_type = mpc512x_irq_set_type, 294 .irq_set_type = mpc512x_irq_set_type,
272}; 295};
273 296
297static const struct mpc8xxx_gpio_devtype ls1028a_gpio_devtype = {
298 .gpio_dir_in_init = ls1028a_gpio_dir_in_init,
299};
300
274static const struct mpc8xxx_gpio_devtype mpc5125_gpio_devtype = { 301static const struct mpc8xxx_gpio_devtype mpc5125_gpio_devtype = {
275 .gpio_dir_out = mpc5125_gpio_dir_out, 302 .gpio_dir_out = mpc5125_gpio_dir_out,
276 .irq_set_type = mpc512x_irq_set_type, 303 .irq_set_type = mpc512x_irq_set_type,
@@ -291,6 +318,8 @@ static const struct of_device_id mpc8xxx_gpio_ids[] = {
291 { .compatible = "fsl,mpc5121-gpio", .data = &mpc512x_gpio_devtype, }, 318 { .compatible = "fsl,mpc5121-gpio", .data = &mpc512x_gpio_devtype, },
292 { .compatible = "fsl,mpc5125-gpio", .data = &mpc5125_gpio_devtype, }, 319 { .compatible = "fsl,mpc5125-gpio", .data = &mpc5125_gpio_devtype, },
293 { .compatible = "fsl,pq3-gpio", }, 320 { .compatible = "fsl,pq3-gpio", },
321 { .compatible = "fsl,ls1028a-gpio", .data = &ls1028a_gpio_devtype, },
322 { .compatible = "fsl,ls1088a-gpio", .data = &ls1028a_gpio_devtype, },
294 { .compatible = "fsl,qoriq-gpio", }, 323 { .compatible = "fsl,qoriq-gpio", },
295 {} 324 {}
296}; 325};
@@ -376,6 +405,9 @@ static int mpc8xxx_probe(struct platform_device *pdev)
376 /* ack and mask all irqs */ 405 /* ack and mask all irqs */
377 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff); 406 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff);
378 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0); 407 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);
408 /* enable input buffer */
409 if (devtype->gpio_dir_in_init)
410 devtype->gpio_dir_in_init(gc);
379 411
380 irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, 412 irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
381 mpc8xxx_gpio_irq_cascade, mpc8xxx_gc); 413 mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
diff --git a/drivers/gpio/gpio-mt7621.c b/drivers/gpio/gpio-mt7621.c
index 79654fb2e50f..d1d785f983a7 100644
--- a/drivers/gpio/gpio-mt7621.c
+++ b/drivers/gpio/gpio-mt7621.c
@@ -241,13 +241,6 @@ mediatek_gpio_bank_probe(struct device *dev,
241 if (!rg->chip.label) 241 if (!rg->chip.label)
242 return -ENOMEM; 242 return -ENOMEM;
243 243
244 ret = devm_gpiochip_add_data(dev, &rg->chip, mtk);
245 if (ret < 0) {
246 dev_err(dev, "Could not register gpio %d, ret=%d\n",
247 rg->chip.ngpio, ret);
248 return ret;
249 }
250
251 rg->irq_chip.name = dev_name(dev); 244 rg->irq_chip.name = dev_name(dev);
252 rg->irq_chip.parent_device = dev; 245 rg->irq_chip.parent_device = dev;
253 rg->irq_chip.irq_unmask = mediatek_gpio_irq_unmask; 246 rg->irq_chip.irq_unmask = mediatek_gpio_irq_unmask;
@@ -256,8 +249,10 @@ mediatek_gpio_bank_probe(struct device *dev,
256 rg->irq_chip.irq_set_type = mediatek_gpio_irq_type; 249 rg->irq_chip.irq_set_type = mediatek_gpio_irq_type;
257 250
258 if (mtk->gpio_irq) { 251 if (mtk->gpio_irq) {
252 struct gpio_irq_chip *girq;
253
259 /* 254 /*
260 * Manually request the irq here instead of passing 255 * Directly request the irq here instead of passing
261 * a flow-handler to gpiochip_set_chained_irqchip, 256 * a flow-handler to gpiochip_set_chained_irqchip,
262 * because the irq is shared. 257 * because the irq is shared.
263 */ 258 */
@@ -271,15 +266,21 @@ mediatek_gpio_bank_probe(struct device *dev,
271 return ret; 266 return ret;
272 } 267 }
273 268
274 ret = gpiochip_irqchip_add(&rg->chip, &rg->irq_chip, 269 girq = &rg->chip.irq;
275 0, handle_simple_irq, IRQ_TYPE_NONE); 270 girq->chip = &rg->irq_chip;
276 if (ret) { 271 /* This will let us handle the parent IRQ in the driver */
277 dev_err(dev, "failed to add gpiochip_irqchip\n"); 272 girq->parent_handler = NULL;
278 return ret; 273 girq->num_parents = 0;
279 } 274 girq->parents = NULL;
275 girq->default_type = IRQ_TYPE_NONE;
276 girq->handler = handle_simple_irq;
277 }
280 278
281 gpiochip_set_chained_irqchip(&rg->chip, &rg->irq_chip, 279 ret = devm_gpiochip_add_data(dev, &rg->chip, mtk);
282 mtk->gpio_irq, NULL); 280 if (ret < 0) {
281 dev_err(dev, "Could not register gpio %d, ret=%d\n",
282 rg->chip.ngpio, ret);
283 return ret;
283 } 284 }
284 285
285 /* set polarity to low for all gpios */ 286 /* set polarity to low for all gpios */
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index b2813580c582..7907a8755866 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -435,12 +435,9 @@ static int mxc_gpio_probe(struct platform_device *pdev)
435 return port->irq; 435 return port->irq;
436 436
437 /* the controller clock is optional */ 437 /* the controller clock is optional */
438 port->clk = devm_clk_get(&pdev->dev, NULL); 438 port->clk = devm_clk_get_optional(&pdev->dev, NULL);
439 if (IS_ERR(port->clk)) { 439 if (IS_ERR(port->clk))
440 if (PTR_ERR(port->clk) == -EPROBE_DEFER) 440 return PTR_ERR(port->clk);
441 return -EPROBE_DEFER;
442 port->clk = NULL;
443 }
444 441
445 err = clk_prepare_enable(port->clk); 442 err = clk_prepare_enable(port->clk);
446 if (err) { 443 if (err) {
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 378b206d2dc9..64d02ca60f53 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#include <linux/acpi.h> 11#include <linux/acpi.h>
12#include <linux/bits.h>
12#include <linux/gpio/driver.h> 13#include <linux/gpio/driver.h>
13#include <linux/gpio/consumer.h> 14#include <linux/gpio/consumer.h>
14#include <linux/i2c.h> 15#include <linux/i2c.h>
@@ -28,9 +29,9 @@
28#define PCA953X_INVERT 0x02 29#define PCA953X_INVERT 0x02
29#define PCA953X_DIRECTION 0x03 30#define PCA953X_DIRECTION 0x03
30 31
31#define REG_ADDR_MASK 0x3f 32#define REG_ADDR_MASK GENMASK(5, 0)
32#define REG_ADDR_EXT 0x40 33#define REG_ADDR_EXT BIT(6)
33#define REG_ADDR_AI 0x80 34#define REG_ADDR_AI BIT(7)
34 35
35#define PCA957X_IN 0x00 36#define PCA957X_IN 0x00
36#define PCA957X_INVRT 0x01 37#define PCA957X_INVRT 0x01
@@ -55,17 +56,17 @@
55#define PCAL6524_OUT_INDCONF 0x2c 56#define PCAL6524_OUT_INDCONF 0x2c
56#define PCAL6524_DEBOUNCE 0x2d 57#define PCAL6524_DEBOUNCE 0x2d
57 58
58#define PCA_GPIO_MASK 0x00FF 59#define PCA_GPIO_MASK GENMASK(7, 0)
59 60
60#define PCAL_GPIO_MASK 0x1f 61#define PCAL_GPIO_MASK GENMASK(4, 0)
61#define PCAL_PINCTRL_MASK 0x60 62#define PCAL_PINCTRL_MASK GENMASK(6, 5)
62 63
63#define PCA_INT 0x0100 64#define PCA_INT BIT(8)
64#define PCA_PCAL 0x0200 65#define PCA_PCAL BIT(9)
65#define PCA_LATCH_INT (PCA_PCAL | PCA_INT) 66#define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66#define PCA953X_TYPE 0x1000 67#define PCA953X_TYPE BIT(12)
67#define PCA957X_TYPE 0x2000 68#define PCA957X_TYPE BIT(13)
68#define PCA_TYPE_MASK 0xF000 69#define PCA_TYPE_MASK GENMASK(15, 12)
69 70
70#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 71#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
71 72
@@ -565,7 +566,7 @@ static void pca953x_irq_mask(struct irq_data *d)
565 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 566 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
566 struct pca953x_chip *chip = gpiochip_get_data(gc); 567 struct pca953x_chip *chip = gpiochip_get_data(gc);
567 568
568 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 569 chip->irq_mask[d->hwirq / BANK_SZ] &= ~BIT(d->hwirq % BANK_SZ);
569} 570}
570 571
571static void pca953x_irq_unmask(struct irq_data *d) 572static void pca953x_irq_unmask(struct irq_data *d)
@@ -573,7 +574,7 @@ static void pca953x_irq_unmask(struct irq_data *d)
573 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 574 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
574 struct pca953x_chip *chip = gpiochip_get_data(gc); 575 struct pca953x_chip *chip = gpiochip_get_data(gc);
575 576
576 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 577 chip->irq_mask[d->hwirq / BANK_SZ] |= BIT(d->hwirq % BANK_SZ);
577} 578}
578 579
579static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on) 580static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
@@ -641,7 +642,7 @@ static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
641 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 642 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
642 struct pca953x_chip *chip = gpiochip_get_data(gc); 643 struct pca953x_chip *chip = gpiochip_get_data(gc);
643 int bank_nb = d->hwirq / BANK_SZ; 644 int bank_nb = d->hwirq / BANK_SZ;
644 u8 mask = 1 << (d->hwirq % BANK_SZ); 645 u8 mask = BIT(d->hwirq % BANK_SZ);
645 646
646 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 647 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
647 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 648 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
@@ -666,7 +667,7 @@ static void pca953x_irq_shutdown(struct irq_data *d)
666{ 667{
667 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 668 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
668 struct pca953x_chip *chip = gpiochip_get_data(gc); 669 struct pca953x_chip *chip = gpiochip_get_data(gc);
669 u8 mask = 1 << (d->hwirq % BANK_SZ); 670 u8 mask = BIT(d->hwirq % BANK_SZ);
670 671
671 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask; 672 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
672 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask; 673 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
@@ -849,12 +850,12 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
849 850
850 ret = regcache_sync_region(chip->regmap, chip->regs->output, 851 ret = regcache_sync_region(chip->regmap, chip->regs->output,
851 chip->regs->output + NBANK(chip)); 852 chip->regs->output + NBANK(chip));
852 if (ret != 0) 853 if (ret)
853 goto out; 854 goto out;
854 855
855 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 856 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
856 chip->regs->direction + NBANK(chip)); 857 chip->regs->direction + NBANK(chip));
857 if (ret != 0) 858 if (ret)
858 goto out; 859 goto out;
859 860
860 /* set platform specific polarity inversion */ 861 /* set platform specific polarity inversion */
@@ -949,19 +950,15 @@ static int pca953x_probe(struct i2c_client *client,
949 if (i2c_id) { 950 if (i2c_id) {
950 chip->driver_data = i2c_id->driver_data; 951 chip->driver_data = i2c_id->driver_data;
951 } else { 952 } else {
952 const struct acpi_device_id *acpi_id; 953 const void *match;
953 struct device *dev = &client->dev; 954
954 955 match = device_get_match_data(&client->dev);
955 chip->driver_data = (uintptr_t)of_device_get_match_data(dev); 956 if (!match) {
956 if (!chip->driver_data) { 957 ret = -ENODEV;
957 acpi_id = acpi_match_device(pca953x_acpi_ids, dev); 958 goto err_exit;
958 if (!acpi_id) {
959 ret = -ENODEV;
960 goto err_exit;
961 }
962
963 chip->driver_data = acpi_id->driver_data;
964 } 959 }
960
961 chip->driver_data = (uintptr_t)match;
965 } 962 }
966 963
967 i2c_set_clientdata(client, chip); 964 i2c_set_clientdata(client, chip);
@@ -1041,8 +1038,7 @@ static int pca953x_remove(struct i2c_client *client)
1041 ret = pdata->teardown(client, chip->gpio_chip.base, 1038 ret = pdata->teardown(client, chip->gpio_chip.base,
1042 chip->gpio_chip.ngpio, pdata->context); 1039 chip->gpio_chip.ngpio, pdata->context);
1043 if (ret < 0) 1040 if (ret < 0)
1044 dev_err(&client->dev, "%s failed, %d\n", 1041 dev_err(&client->dev, "teardown failed, %d\n", ret);
1045 "teardown", ret);
1046 } else { 1042 } else {
1047 ret = 0; 1043 ret = 0;
1048 } 1044 }
@@ -1064,14 +1060,14 @@ static int pca953x_regcache_sync(struct device *dev)
1064 */ 1060 */
1065 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 1061 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1066 chip->regs->direction + NBANK(chip)); 1062 chip->regs->direction + NBANK(chip));
1067 if (ret != 0) { 1063 if (ret) {
1068 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); 1064 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1069 return ret; 1065 return ret;
1070 } 1066 }
1071 1067
1072 ret = regcache_sync_region(chip->regmap, chip->regs->output, 1068 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1073 chip->regs->output + NBANK(chip)); 1069 chip->regs->output + NBANK(chip));
1074 if (ret != 0) { 1070 if (ret) {
1075 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); 1071 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1076 return ret; 1072 return ret;
1077 } 1073 }
@@ -1080,7 +1076,7 @@ static int pca953x_regcache_sync(struct device *dev)
1080 if (chip->driver_data & PCA_PCAL) { 1076 if (chip->driver_data & PCA_PCAL) {
1081 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, 1077 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1082 PCAL953X_IN_LATCH + NBANK(chip)); 1078 PCAL953X_IN_LATCH + NBANK(chip));
1083 if (ret != 0) { 1079 if (ret) {
1084 dev_err(dev, "Failed to sync INT latch registers: %d\n", 1080 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1085 ret); 1081 ret);
1086 return ret; 1082 return ret;
@@ -1088,7 +1084,7 @@ static int pca953x_regcache_sync(struct device *dev)
1088 1084
1089 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, 1085 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1090 PCAL953X_INT_MASK + NBANK(chip)); 1086 PCAL953X_INT_MASK + NBANK(chip));
1091 if (ret != 0) { 1087 if (ret) {
1092 dev_err(dev, "Failed to sync INT mask registers: %d\n", 1088 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1093 ret); 1089 ret);
1094 return ret; 1090 return ret;
@@ -1120,7 +1116,7 @@ static int pca953x_resume(struct device *dev)
1120 1116
1121 if (!atomic_read(&chip->wakeup_path)) { 1117 if (!atomic_read(&chip->wakeup_path)) {
1122 ret = regulator_enable(chip->regulator); 1118 ret = regulator_enable(chip->regulator);
1123 if (ret != 0) { 1119 if (ret) {
1124 dev_err(dev, "Failed to enable regulator: %d\n", ret); 1120 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1125 return 0; 1121 return 0;
1126 } 1122 }
@@ -1133,7 +1129,7 @@ static int pca953x_resume(struct device *dev)
1133 return ret; 1129 return ret;
1134 1130
1135 ret = regcache_sync(chip->regmap); 1131 ret = regcache_sync(chip->regmap);
1136 if (ret != 0) { 1132 if (ret) {
1137 dev_err(dev, "Failed to restore register map: %d\n", ret); 1133 dev_err(dev, "Failed to restore register map: %d\n", ret);
1138 return ret; 1134 return ret;
1139 } 1135 }
diff --git a/drivers/gpio/gpio-pmic-eic-sprd.c b/drivers/gpio/gpio-pmic-eic-sprd.c
index 24228cf79afc..05000cace9b2 100644
--- a/drivers/gpio/gpio-pmic-eic-sprd.c
+++ b/drivers/gpio/gpio-pmic-eic-sprd.c
@@ -305,10 +305,8 @@ static int sprd_pmic_eic_probe(struct platform_device *pdev)
305 mutex_init(&pmic_eic->buslock); 305 mutex_init(&pmic_eic->buslock);
306 306
307 pmic_eic->irq = platform_get_irq(pdev, 0); 307 pmic_eic->irq = platform_get_irq(pdev, 0);
308 if (pmic_eic->irq < 0) { 308 if (pmic_eic->irq < 0)
309 dev_err(&pdev->dev, "Failed to get PMIC EIC interrupt.\n");
310 return pmic_eic->irq; 309 return pmic_eic->irq;
311 }
312 310
313 pmic_eic->map = dev_get_regmap(pdev->dev.parent, NULL); 311 pmic_eic->map = dev_get_regmap(pdev->dev.parent, NULL);
314 if (!pmic_eic->map) 312 if (!pmic_eic->map)
diff --git a/drivers/gpio/gpio-sprd.c b/drivers/gpio/gpio-sprd.c
index f5c8b3a351d5..d7314d39ab65 100644
--- a/drivers/gpio/gpio-sprd.c
+++ b/drivers/gpio/gpio-sprd.c
@@ -226,10 +226,8 @@ static int sprd_gpio_probe(struct platform_device *pdev)
226 return -ENOMEM; 226 return -ENOMEM;
227 227
228 sprd_gpio->irq = platform_get_irq(pdev, 0); 228 sprd_gpio->irq = platform_get_irq(pdev, 0);
229 if (sprd_gpio->irq < 0) { 229 if (sprd_gpio->irq < 0)
230 dev_err(&pdev->dev, "Failed to get GPIO interrupt.\n");
231 return sprd_gpio->irq; 230 return sprd_gpio->irq;
232 }
233 231
234 sprd_gpio->base = devm_platform_ioremap_resource(pdev, 0); 232 sprd_gpio->base = devm_platform_ioremap_resource(pdev, 0);
235 if (IS_ERR(sprd_gpio->base)) 233 if (IS_ERR(sprd_gpio->base))
diff --git a/drivers/gpio/gpio-tb10x.c b/drivers/gpio/gpio-tb10x.c
index bd1f3f775ce9..5e375186f90e 100644
--- a/drivers/gpio/gpio-tb10x.c
+++ b/drivers/gpio/gpio-tb10x.c
@@ -171,10 +171,8 @@ static int tb10x_gpio_probe(struct platform_device *pdev)
171 struct irq_chip_generic *gc; 171 struct irq_chip_generic *gc;
172 172
173 ret = platform_get_irq(pdev, 0); 173 ret = platform_get_irq(pdev, 0);
174 if (ret < 0) { 174 if (ret < 0)
175 dev_err(dev, "No interrupt specified.\n");
176 return ret; 175 return ret;
177 }
178 176
179 tb10x_gpio->gc.to_irq = tb10x_gpio_to_irq; 177 tb10x_gpio->gc.to_irq = tb10x_gpio_to_irq;
180 tb10x_gpio->irq = ret; 178 tb10x_gpio->irq = ret;
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 0f59161a4701..8a01d3694b28 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -624,10 +624,8 @@ static int tegra_gpio_probe(struct platform_device *pdev)
624 624
625 for (i = 0; i < tgi->bank_count; i++) { 625 for (i = 0; i < tgi->bank_count; i++) {
626 ret = platform_get_irq(pdev, i); 626 ret = platform_get_irq(pdev, i);
627 if (ret < 0) { 627 if (ret < 0)
628 dev_err(&pdev->dev, "Missing IRQ resource: %d\n", ret);
629 return ret; 628 return ret;
630 }
631 629
632 bank = &tgi->bank_info[i]; 630 bank = &tgi->bank_info[i];
633 bank->bank = i; 631 bank->bank = i;
diff --git a/drivers/gpio/gpio-thunderx.c b/drivers/gpio/gpio-thunderx.c
index 715371b5102a..ddad5c7ea617 100644
--- a/drivers/gpio/gpio-thunderx.c
+++ b/drivers/gpio/gpio-thunderx.c
@@ -53,7 +53,6 @@ struct thunderx_line {
53struct thunderx_gpio { 53struct thunderx_gpio {
54 struct gpio_chip chip; 54 struct gpio_chip chip;
55 u8 __iomem *register_base; 55 u8 __iomem *register_base;
56 struct irq_domain *irqd;
57 struct msix_entry *msix_entries; /* per line MSI-X */ 56 struct msix_entry *msix_entries; /* per line MSI-X */
58 struct thunderx_line *line_entries; /* per line irq info */ 57 struct thunderx_line *line_entries; /* per line irq info */
59 raw_spinlock_t lock; 58 raw_spinlock_t lock;
@@ -283,54 +282,60 @@ static void thunderx_gpio_set_multiple(struct gpio_chip *chip,
283 } 282 }
284} 283}
285 284
286static void thunderx_gpio_irq_ack(struct irq_data *data) 285static void thunderx_gpio_irq_ack(struct irq_data *d)
287{ 286{
288 struct thunderx_line *txline = irq_data_get_irq_chip_data(data); 287 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
288 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
289 289
290 writeq(GPIO_INTR_INTR, 290 writeq(GPIO_INTR_INTR,
291 txline->txgpio->register_base + intr_reg(txline->line)); 291 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
292} 292}
293 293
294static void thunderx_gpio_irq_mask(struct irq_data *data) 294static void thunderx_gpio_irq_mask(struct irq_data *d)
295{ 295{
296 struct thunderx_line *txline = irq_data_get_irq_chip_data(data); 296 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
297 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
297 298
298 writeq(GPIO_INTR_ENA_W1C, 299 writeq(GPIO_INTR_ENA_W1C,
299 txline->txgpio->register_base + intr_reg(txline->line)); 300 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
300} 301}
301 302
302static void thunderx_gpio_irq_mask_ack(struct irq_data *data) 303static void thunderx_gpio_irq_mask_ack(struct irq_data *d)
303{ 304{
304 struct thunderx_line *txline = irq_data_get_irq_chip_data(data); 305 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
306 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
305 307
306 writeq(GPIO_INTR_ENA_W1C | GPIO_INTR_INTR, 308 writeq(GPIO_INTR_ENA_W1C | GPIO_INTR_INTR,
307 txline->txgpio->register_base + intr_reg(txline->line)); 309 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
308} 310}
309 311
310static void thunderx_gpio_irq_unmask(struct irq_data *data) 312static void thunderx_gpio_irq_unmask(struct irq_data *d)
311{ 313{
312 struct thunderx_line *txline = irq_data_get_irq_chip_data(data); 314 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
315 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
313 316
314 writeq(GPIO_INTR_ENA_W1S, 317 writeq(GPIO_INTR_ENA_W1S,
315 txline->txgpio->register_base + intr_reg(txline->line)); 318 txgpio->register_base + intr_reg(irqd_to_hwirq(d)));
316} 319}
317 320
318static int thunderx_gpio_irq_set_type(struct irq_data *data, 321static int thunderx_gpio_irq_set_type(struct irq_data *d,
319 unsigned int flow_type) 322 unsigned int flow_type)
320{ 323{
321 struct thunderx_line *txline = irq_data_get_irq_chip_data(data); 324 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
322 struct thunderx_gpio *txgpio = txline->txgpio; 325 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
326 struct thunderx_line *txline =
327 &txgpio->line_entries[irqd_to_hwirq(d)];
323 u64 bit_cfg; 328 u64 bit_cfg;
324 329
325 irqd_set_trigger_type(data, flow_type); 330 irqd_set_trigger_type(d, flow_type);
326 331
327 bit_cfg = txline->fil_bits | GPIO_BIT_CFG_INT_EN; 332 bit_cfg = txline->fil_bits | GPIO_BIT_CFG_INT_EN;
328 333
329 if (flow_type & IRQ_TYPE_EDGE_BOTH) { 334 if (flow_type & IRQ_TYPE_EDGE_BOTH) {
330 irq_set_handler_locked(data, handle_fasteoi_ack_irq); 335 irq_set_handler_locked(d, handle_fasteoi_ack_irq);
331 bit_cfg |= GPIO_BIT_CFG_INT_TYPE; 336 bit_cfg |= GPIO_BIT_CFG_INT_TYPE;
332 } else { 337 } else {
333 irq_set_handler_locked(data, handle_fasteoi_mask_irq); 338 irq_set_handler_locked(d, handle_fasteoi_mask_irq);
334 } 339 }
335 340
336 raw_spin_lock(&txgpio->lock); 341 raw_spin_lock(&txgpio->lock);
@@ -359,33 +364,6 @@ static void thunderx_gpio_irq_disable(struct irq_data *data)
359 irq_chip_disable_parent(data); 364 irq_chip_disable_parent(data);
360} 365}
361 366
362static int thunderx_gpio_irq_request_resources(struct irq_data *data)
363{
364 struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
365 struct thunderx_gpio *txgpio = txline->txgpio;
366 int r;
367
368 r = gpiochip_lock_as_irq(&txgpio->chip, txline->line);
369 if (r)
370 return r;
371
372 r = irq_chip_request_resources_parent(data);
373 if (r)
374 gpiochip_unlock_as_irq(&txgpio->chip, txline->line);
375
376 return r;
377}
378
379static void thunderx_gpio_irq_release_resources(struct irq_data *data)
380{
381 struct thunderx_line *txline = irq_data_get_irq_chip_data(data);
382 struct thunderx_gpio *txgpio = txline->txgpio;
383
384 irq_chip_release_resources_parent(data);
385
386 gpiochip_unlock_as_irq(&txgpio->chip, txline->line);
387}
388
389/* 367/*
390 * Interrupts are chained from underlying MSI-X vectors. We have 368 * Interrupts are chained from underlying MSI-X vectors. We have
391 * these irq_chip functions to be able to handle level triggering 369 * these irq_chip functions to be able to handle level triggering
@@ -402,48 +380,22 @@ static struct irq_chip thunderx_gpio_irq_chip = {
402 .irq_unmask = thunderx_gpio_irq_unmask, 380 .irq_unmask = thunderx_gpio_irq_unmask,
403 .irq_eoi = irq_chip_eoi_parent, 381 .irq_eoi = irq_chip_eoi_parent,
404 .irq_set_affinity = irq_chip_set_affinity_parent, 382 .irq_set_affinity = irq_chip_set_affinity_parent,
405 .irq_request_resources = thunderx_gpio_irq_request_resources,
406 .irq_release_resources = thunderx_gpio_irq_release_resources,
407 .irq_set_type = thunderx_gpio_irq_set_type, 383 .irq_set_type = thunderx_gpio_irq_set_type,
408 384
409 .flags = IRQCHIP_SET_TYPE_MASKED 385 .flags = IRQCHIP_SET_TYPE_MASKED
410}; 386};
411 387
412static int thunderx_gpio_irq_translate(struct irq_domain *d, 388static int thunderx_gpio_child_to_parent_hwirq(struct gpio_chip *gc,
413 struct irq_fwspec *fwspec, 389 unsigned int child,
414 irq_hw_number_t *hwirq, 390 unsigned int child_type,
415 unsigned int *type) 391 unsigned int *parent,
392 unsigned int *parent_type)
416{ 393{
417 struct thunderx_gpio *txgpio = d->host_data; 394 struct thunderx_gpio *txgpio = gpiochip_get_data(gc);
418
419 if (WARN_ON(fwspec->param_count < 2))
420 return -EINVAL;
421 if (fwspec->param[0] >= txgpio->chip.ngpio)
422 return -EINVAL;
423 *hwirq = fwspec->param[0];
424 *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
425 return 0;
426}
427
428static int thunderx_gpio_irq_alloc(struct irq_domain *d, unsigned int virq,
429 unsigned int nr_irqs, void *arg)
430{
431 struct thunderx_line *txline = arg;
432 395
433 return irq_domain_set_hwirq_and_chip(d, virq, txline->line, 396 *parent = txgpio->base_msi + (2 * child);
434 &thunderx_gpio_irq_chip, txline); 397 *parent_type = IRQ_TYPE_LEVEL_HIGH;
435} 398 return 0;
436
437static const struct irq_domain_ops thunderx_gpio_irqd_ops = {
438 .alloc = thunderx_gpio_irq_alloc,
439 .translate = thunderx_gpio_irq_translate
440};
441
442static int thunderx_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
443{
444 struct thunderx_gpio *txgpio = gpiochip_get_data(chip);
445
446 return irq_find_mapping(txgpio->irqd, offset);
447} 399}
448 400
449static int thunderx_gpio_probe(struct pci_dev *pdev, 401static int thunderx_gpio_probe(struct pci_dev *pdev,
@@ -453,6 +405,7 @@ static int thunderx_gpio_probe(struct pci_dev *pdev,
453 struct device *dev = &pdev->dev; 405 struct device *dev = &pdev->dev;
454 struct thunderx_gpio *txgpio; 406 struct thunderx_gpio *txgpio;
455 struct gpio_chip *chip; 407 struct gpio_chip *chip;
408 struct gpio_irq_chip *girq;
456 int ngpio, i; 409 int ngpio, i;
457 int err = 0; 410 int err = 0;
458 411
@@ -497,8 +450,8 @@ static int thunderx_gpio_probe(struct pci_dev *pdev,
497 } 450 }
498 451
499 txgpio->msix_entries = devm_kcalloc(dev, 452 txgpio->msix_entries = devm_kcalloc(dev,
500 ngpio, sizeof(struct msix_entry), 453 ngpio, sizeof(struct msix_entry),
501 GFP_KERNEL); 454 GFP_KERNEL);
502 if (!txgpio->msix_entries) { 455 if (!txgpio->msix_entries) {
503 err = -ENOMEM; 456 err = -ENOMEM;
504 goto out; 457 goto out;
@@ -539,27 +492,6 @@ static int thunderx_gpio_probe(struct pci_dev *pdev,
539 if (err < 0) 492 if (err < 0)
540 goto out; 493 goto out;
541 494
542 /*
543 * Push GPIO specific irqdomain on hierarchy created as a side
544 * effect of the pci_enable_msix()
545 */
546 txgpio->irqd = irq_domain_create_hierarchy(irq_get_irq_data(txgpio->msix_entries[0].vector)->domain,
547 0, 0, of_node_to_fwnode(dev->of_node),
548 &thunderx_gpio_irqd_ops, txgpio);
549 if (!txgpio->irqd) {
550 err = -ENOMEM;
551 goto out;
552 }
553
554 /* Push on irq_data and the domain for each line. */
555 for (i = 0; i < ngpio; i++) {
556 err = irq_domain_push_irq(txgpio->irqd,
557 txgpio->msix_entries[i].vector,
558 &txgpio->line_entries[i]);
559 if (err < 0)
560 dev_err(dev, "irq_domain_push_irq: %d\n", err);
561 }
562
563 chip->label = KBUILD_MODNAME; 495 chip->label = KBUILD_MODNAME;
564 chip->parent = dev; 496 chip->parent = dev;
565 chip->owner = THIS_MODULE; 497 chip->owner = THIS_MODULE;
@@ -574,11 +506,28 @@ static int thunderx_gpio_probe(struct pci_dev *pdev,
574 chip->set = thunderx_gpio_set; 506 chip->set = thunderx_gpio_set;
575 chip->set_multiple = thunderx_gpio_set_multiple; 507 chip->set_multiple = thunderx_gpio_set_multiple;
576 chip->set_config = thunderx_gpio_set_config; 508 chip->set_config = thunderx_gpio_set_config;
577 chip->to_irq = thunderx_gpio_to_irq; 509 girq = &chip->irq;
510 girq->chip = &thunderx_gpio_irq_chip;
511 girq->fwnode = of_node_to_fwnode(dev->of_node);
512 girq->parent_domain =
513 irq_get_irq_data(txgpio->msix_entries[0].vector)->domain;
514 girq->child_to_parent_hwirq = thunderx_gpio_child_to_parent_hwirq;
515 girq->handler = handle_bad_irq;
516 girq->default_type = IRQ_TYPE_NONE;
517
578 err = devm_gpiochip_add_data(dev, chip, txgpio); 518 err = devm_gpiochip_add_data(dev, chip, txgpio);
579 if (err) 519 if (err)
580 goto out; 520 goto out;
581 521
522 /* Push on irq_data and the domain for each line. */
523 for (i = 0; i < ngpio; i++) {
524 err = irq_domain_push_irq(chip->irq.domain,
525 txgpio->msix_entries[i].vector,
526 chip);
527 if (err < 0)
528 dev_err(dev, "irq_domain_push_irq: %d\n", err);
529 }
530
582 dev_info(dev, "ThunderX GPIO: %d lines with base %d.\n", 531 dev_info(dev, "ThunderX GPIO: %d lines with base %d.\n",
583 ngpio, chip->base); 532 ngpio, chip->base);
584 return 0; 533 return 0;
@@ -593,10 +542,10 @@ static void thunderx_gpio_remove(struct pci_dev *pdev)
593 struct thunderx_gpio *txgpio = pci_get_drvdata(pdev); 542 struct thunderx_gpio *txgpio = pci_get_drvdata(pdev);
594 543
595 for (i = 0; i < txgpio->chip.ngpio; i++) 544 for (i = 0; i < txgpio->chip.ngpio; i++)
596 irq_domain_pop_irq(txgpio->irqd, 545 irq_domain_pop_irq(txgpio->chip.irq.domain,
597 txgpio->msix_entries[i].vector); 546 txgpio->msix_entries[i].vector);
598 547
599 irq_domain_remove(txgpio->irqd); 548 irq_domain_remove(txgpio->chip.irq.domain);
600 549
601 pci_set_drvdata(pdev, NULL); 550 pci_set_drvdata(pdev, NULL);
602} 551}
diff --git a/drivers/gpio/gpio-tqmx86.c b/drivers/gpio/gpio-tqmx86.c
index d5880db7f9d4..07050cdbadb9 100644
--- a/drivers/gpio/gpio-tqmx86.c
+++ b/drivers/gpio/gpio-tqmx86.c
@@ -219,6 +219,7 @@ static int tqmx86_gpio_probe(struct platform_device *pdev)
219 struct device *dev = &pdev->dev; 219 struct device *dev = &pdev->dev;
220 struct tqmx86_gpio_data *gpio; 220 struct tqmx86_gpio_data *gpio;
221 struct gpio_chip *chip; 221 struct gpio_chip *chip;
222 struct gpio_irq_chip *girq;
222 void __iomem *io_base; 223 void __iomem *io_base;
223 struct resource *res; 224 struct resource *res;
224 int ret, irq; 225 int ret, irq;
@@ -264,12 +265,6 @@ static int tqmx86_gpio_probe(struct platform_device *pdev)
264 265
265 pm_runtime_enable(&pdev->dev); 266 pm_runtime_enable(&pdev->dev);
266 267
267 ret = devm_gpiochip_add_data(dev, chip, gpio);
268 if (ret) {
269 dev_err(dev, "Could not register GPIO chip\n");
270 goto out_pm_dis;
271 }
272
273 if (irq) { 268 if (irq) {
274 struct irq_chip *irq_chip = &gpio->irq_chip; 269 struct irq_chip *irq_chip = &gpio->irq_chip;
275 u8 irq_status; 270 u8 irq_status;
@@ -287,23 +282,35 @@ static int tqmx86_gpio_probe(struct platform_device *pdev)
287 irq_status = tqmx86_gpio_read(gpio, TQMX86_GPIIS); 282 irq_status = tqmx86_gpio_read(gpio, TQMX86_GPIIS);
288 tqmx86_gpio_write(gpio, irq_status, TQMX86_GPIIS); 283 tqmx86_gpio_write(gpio, irq_status, TQMX86_GPIIS);
289 284
290 ret = gpiochip_irqchip_add(chip, irq_chip, 285 girq = &chip->irq;
291 0, handle_simple_irq, 286 girq->chip = irq_chip;
292 IRQ_TYPE_EDGE_BOTH); 287 girq->parent_handler = tqmx86_gpio_irq_handler;
293 if (ret) { 288 girq->num_parents = 1;
294 dev_err(dev, "Could not add irq chip\n"); 289 girq->parents = devm_kcalloc(&pdev->dev, 1,
290 sizeof(*girq->parents),
291 GFP_KERNEL);
292 if (!girq->parents) {
293 ret = -ENOMEM;
295 goto out_pm_dis; 294 goto out_pm_dis;
296 } 295 }
296 girq->parents[0] = irq;
297 girq->default_type = IRQ_TYPE_NONE;
298 girq->handler = handle_simple_irq;
299 }
297 300
298 gpiochip_set_chained_irqchip(chip, irq_chip, 301 ret = devm_gpiochip_add_data(dev, chip, gpio);
299 irq, tqmx86_gpio_irq_handler); 302 if (ret) {
303 dev_err(dev, "Could not register GPIO chip\n");
304 goto out_pm_dis;
300 } 305 }
301 306
302 /* Only GPIOs 4-7 are valid for interrupts. Clear the others */ 307 /* Only GPIOs 4-7 are valid for interrupts. Clear the others */
303 clear_bit(0, chip->irq.valid_mask); 308 if (irq) {
304 clear_bit(1, chip->irq.valid_mask); 309 clear_bit(0, girq->valid_mask);
305 clear_bit(2, chip->irq.valid_mask); 310 clear_bit(1, girq->valid_mask);
306 clear_bit(3, chip->irq.valid_mask); 311 clear_bit(2, girq->valid_mask);
312 clear_bit(3, girq->valid_mask);
313 }
307 314
308 dev_info(dev, "GPIO functionality initialized with %d pins\n", 315 dev_info(dev, "GPIO functionality initialized with %d pins\n",
309 chip->ngpio); 316 chip->ngpio);
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index 7ba668db171b..58776f2d69ff 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -243,6 +243,7 @@ static int vf610_gpio_probe(struct platform_device *pdev)
243 struct device_node *np = dev->of_node; 243 struct device_node *np = dev->of_node;
244 struct vf610_gpio_port *port; 244 struct vf610_gpio_port *port;
245 struct gpio_chip *gc; 245 struct gpio_chip *gc;
246 struct gpio_irq_chip *girq;
246 struct irq_chip *ic; 247 struct irq_chip *ic;
247 int i; 248 int i;
248 int ret; 249 int ret;
@@ -318,10 +319,6 @@ static int vf610_gpio_probe(struct platform_device *pdev)
318 ic->irq_set_type = vf610_gpio_irq_set_type; 319 ic->irq_set_type = vf610_gpio_irq_set_type;
319 ic->irq_set_wake = vf610_gpio_irq_set_wake; 320 ic->irq_set_wake = vf610_gpio_irq_set_wake;
320 321
321 ret = devm_gpiochip_add_data(dev, gc, port);
322 if (ret < 0)
323 return ret;
324
325 /* Mask all GPIO interrupts */ 322 /* Mask all GPIO interrupts */
326 for (i = 0; i < gc->ngpio; i++) 323 for (i = 0; i < gc->ngpio; i++)
327 vf610_gpio_writel(0, port->base + PORT_PCR(i)); 324 vf610_gpio_writel(0, port->base + PORT_PCR(i));
@@ -329,15 +326,20 @@ static int vf610_gpio_probe(struct platform_device *pdev)
329 /* Clear the interrupt status register for all GPIO's */ 326 /* Clear the interrupt status register for all GPIO's */
330 vf610_gpio_writel(~0, port->base + PORT_ISFR); 327 vf610_gpio_writel(~0, port->base + PORT_ISFR);
331 328
332 ret = gpiochip_irqchip_add(gc, ic, 0, handle_edge_irq, IRQ_TYPE_NONE); 329 girq = &gc->irq;
333 if (ret) { 330 girq->chip = ic;
334 dev_err(dev, "failed to add irqchip\n"); 331 girq->parent_handler = vf610_gpio_irq_handler;
335 return ret; 332 girq->num_parents = 1;
336 } 333 girq->parents = devm_kcalloc(&pdev->dev, 1,
337 gpiochip_set_chained_irqchip(gc, ic, port->irq, 334 sizeof(*girq->parents),
338 vf610_gpio_irq_handler); 335 GFP_KERNEL);
336 if (!girq->parents)
337 return -ENOMEM;
338 girq->parents[0] = port->irq;
339 girq->default_type = IRQ_TYPE_NONE;
340 girq->handler = handle_edge_irq;
339 341
340 return 0; 342 return devm_gpiochip_add_data(dev, gc, port);
341} 343}
342 344
343static struct platform_driver vf610_gpio_driver = { 345static struct platform_driver vf610_gpio_driver = {
diff --git a/drivers/gpio/gpio-viperboard.c b/drivers/gpio/gpio-viperboard.c
index 9b604f13e302..c301c1d56dd2 100644
--- a/drivers/gpio/gpio-viperboard.c
+++ b/drivers/gpio/gpio-viperboard.c
@@ -79,7 +79,7 @@ MODULE_PARM_DESC(gpioa_freq,
79/* ----- begin of gipo a chip -------------------------------------------- */ 79/* ----- begin of gipo a chip -------------------------------------------- */
80 80
81static int vprbrd_gpioa_get(struct gpio_chip *chip, 81static int vprbrd_gpioa_get(struct gpio_chip *chip,
82 unsigned offset) 82 unsigned int offset)
83{ 83{
84 int ret, answer, error = 0; 84 int ret, answer, error = 0;
85 struct vprbrd_gpio *gpio = gpiochip_get_data(chip); 85 struct vprbrd_gpio *gpio = gpiochip_get_data(chip);
@@ -129,7 +129,7 @@ static int vprbrd_gpioa_get(struct gpio_chip *chip,
129} 129}
130 130
131static void vprbrd_gpioa_set(struct gpio_chip *chip, 131static void vprbrd_gpioa_set(struct gpio_chip *chip,
132 unsigned offset, int value) 132 unsigned int offset, int value)
133{ 133{
134 int ret; 134 int ret;
135 struct vprbrd_gpio *gpio = gpiochip_get_data(chip); 135 struct vprbrd_gpio *gpio = gpiochip_get_data(chip);
@@ -170,7 +170,7 @@ static void vprbrd_gpioa_set(struct gpio_chip *chip,
170} 170}
171 171
172static int vprbrd_gpioa_direction_input(struct gpio_chip *chip, 172static int vprbrd_gpioa_direction_input(struct gpio_chip *chip,
173 unsigned offset) 173 unsigned int offset)
174{ 174{
175 int ret; 175 int ret;
176 struct vprbrd_gpio *gpio = gpiochip_get_data(chip); 176 struct vprbrd_gpio *gpio = gpiochip_get_data(chip);
@@ -207,7 +207,7 @@ static int vprbrd_gpioa_direction_input(struct gpio_chip *chip,
207} 207}
208 208
209static int vprbrd_gpioa_direction_output(struct gpio_chip *chip, 209static int vprbrd_gpioa_direction_output(struct gpio_chip *chip,
210 unsigned offset, int value) 210 unsigned int offset, int value)
211{ 211{
212 int ret; 212 int ret;
213 struct vprbrd_gpio *gpio = gpiochip_get_data(chip); 213 struct vprbrd_gpio *gpio = gpiochip_get_data(chip);
@@ -251,8 +251,8 @@ static int vprbrd_gpioa_direction_output(struct gpio_chip *chip,
251 251
252/* ----- begin of gipo b chip -------------------------------------------- */ 252/* ----- begin of gipo b chip -------------------------------------------- */
253 253
254static int vprbrd_gpiob_setdir(struct vprbrd *vb, unsigned offset, 254static int vprbrd_gpiob_setdir(struct vprbrd *vb, unsigned int offset,
255 unsigned dir) 255 unsigned int dir)
256{ 256{
257 struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf; 257 struct vprbrd_gpiob_msg *gbmsg = (struct vprbrd_gpiob_msg *)vb->buf;
258 int ret; 258 int ret;
@@ -273,7 +273,7 @@ static int vprbrd_gpiob_setdir(struct vprbrd *vb, unsigned offset,
273} 273}
274 274
275static int vprbrd_gpiob_get(struct gpio_chip *chip, 275static int vprbrd_gpiob_get(struct gpio_chip *chip,
276 unsigned offset) 276 unsigned int offset)
277{ 277{
278 int ret; 278 int ret;
279 u16 val; 279 u16 val;
@@ -305,7 +305,7 @@ static int vprbrd_gpiob_get(struct gpio_chip *chip,
305} 305}
306 306
307static void vprbrd_gpiob_set(struct gpio_chip *chip, 307static void vprbrd_gpiob_set(struct gpio_chip *chip,
308 unsigned offset, int value) 308 unsigned int offset, int value)
309{ 309{
310 int ret; 310 int ret;
311 struct vprbrd_gpio *gpio = gpiochip_get_data(chip); 311 struct vprbrd_gpio *gpio = gpiochip_get_data(chip);
@@ -338,7 +338,7 @@ static void vprbrd_gpiob_set(struct gpio_chip *chip,
338} 338}
339 339
340static int vprbrd_gpiob_direction_input(struct gpio_chip *chip, 340static int vprbrd_gpiob_direction_input(struct gpio_chip *chip,
341 unsigned offset) 341 unsigned int offset)
342{ 342{
343 int ret; 343 int ret;
344 struct vprbrd_gpio *gpio = gpiochip_get_data(chip); 344 struct vprbrd_gpio *gpio = gpiochip_get_data(chip);
@@ -359,7 +359,7 @@ static int vprbrd_gpiob_direction_input(struct gpio_chip *chip,
359} 359}
360 360
361static int vprbrd_gpiob_direction_output(struct gpio_chip *chip, 361static int vprbrd_gpiob_direction_output(struct gpio_chip *chip,
362 unsigned offset, int value) 362 unsigned int offset, int value)
363{ 363{
364 int ret; 364 int ret;
365 struct vprbrd_gpio *gpio = gpiochip_get_data(chip); 365 struct vprbrd_gpio *gpio = gpiochip_get_data(chip);
diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c
index 38c01912c7b2..25d86441666e 100644
--- a/drivers/gpio/gpio-xgene-sb.c
+++ b/drivers/gpio/gpio-xgene-sb.c
@@ -16,6 +16,7 @@
16#include <linux/acpi.h> 16#include <linux/acpi.h>
17 17
18#include "gpiolib.h" 18#include "gpiolib.h"
19#include "gpiolib-acpi.h"
19 20
20/* Common property names */ 21/* Common property names */
21#define XGENE_NIRQ_PROPERTY "apm,nr-irqs" 22#define XGENE_NIRQ_PROPERTY "apm,nr-irqs"
diff --git a/drivers/gpio/gpio-xlp.c b/drivers/gpio/gpio-xlp.c
index 54d3359444f3..d7b16bb9e4e4 100644
--- a/drivers/gpio/gpio-xlp.c
+++ b/drivers/gpio/gpio-xlp.c
@@ -290,6 +290,7 @@ MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids);
290static int xlp_gpio_probe(struct platform_device *pdev) 290static int xlp_gpio_probe(struct platform_device *pdev)
291{ 291{
292 struct gpio_chip *gc; 292 struct gpio_chip *gc;
293 struct gpio_irq_chip *girq;
293 struct xlp_gpio_priv *priv; 294 struct xlp_gpio_priv *priv;
294 void __iomem *gpio_base; 295 void __iomem *gpio_base;
295 int irq_base, irq, err; 296 int irq_base, irq, err;
@@ -395,27 +396,27 @@ static int xlp_gpio_probe(struct platform_device *pdev)
395 irq_base = 0; 396 irq_base = 0;
396 } 397 }
397 398
399 girq = &gc->irq;
400 girq->chip = &xlp_gpio_irq_chip;
401 girq->parent_handler = xlp_gpio_generic_handler;
402 girq->num_parents = 1;
403 girq->parents = devm_kcalloc(&pdev->dev, 1,
404 sizeof(*girq->parents),
405 GFP_KERNEL);
406 if (!girq->parents)
407 return -ENOMEM;
408 girq->parents[0] = irq;
409 girq->first = irq_base;
410 girq->default_type = IRQ_TYPE_NONE;
411 girq->handler = handle_level_irq;
412
398 err = gpiochip_add_data(gc, priv); 413 err = gpiochip_add_data(gc, priv);
399 if (err < 0) 414 if (err < 0)
400 return err; 415 return err;
401 416
402 err = gpiochip_irqchip_add(gc, &xlp_gpio_irq_chip, irq_base,
403 handle_level_irq, IRQ_TYPE_NONE);
404 if (err) {
405 dev_err(&pdev->dev, "Could not connect irqchip to gpiochip!\n");
406 goto out_gpio_remove;
407 }
408
409 gpiochip_set_chained_irqchip(gc, &xlp_gpio_irq_chip, irq,
410 xlp_gpio_generic_handler);
411
412 dev_info(&pdev->dev, "registered %d GPIOs\n", gc->ngpio); 417 dev_info(&pdev->dev, "registered %d GPIOs\n", gc->ngpio);
413 418
414 return 0; 419 return 0;
415
416out_gpio_remove:
417 gpiochip_remove(gc);
418 return err;
419} 420}
420 421
421#ifdef CONFIG_ACPI 422#ifdef CONFIG_ACPI
diff --git a/drivers/gpio/gpio-zx.c b/drivers/gpio/gpio-zx.c
index 8637adb6bc20..98cbaf0e415e 100644
--- a/drivers/gpio/gpio-zx.c
+++ b/drivers/gpio/gpio-zx.c
@@ -215,6 +215,7 @@ static int zx_gpio_probe(struct platform_device *pdev)
215{ 215{
216 struct device *dev = &pdev->dev; 216 struct device *dev = &pdev->dev;
217 struct zx_gpio *chip; 217 struct zx_gpio *chip;
218 struct gpio_irq_chip *girq;
218 int irq, id, ret; 219 int irq, id, ret;
219 220
220 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 221 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
@@ -242,32 +243,30 @@ static int zx_gpio_probe(struct platform_device *pdev)
242 chip->gc.parent = dev; 243 chip->gc.parent = dev;
243 chip->gc.owner = THIS_MODULE; 244 chip->gc.owner = THIS_MODULE;
244 245
245 ret = gpiochip_add_data(&chip->gc, chip);
246 if (ret)
247 return ret;
248
249 /* 246 /*
250 * irq_chip support 247 * irq_chip support
251 */ 248 */
252 writew_relaxed(0xffff, chip->base + ZX_GPIO_IM); 249 writew_relaxed(0xffff, chip->base + ZX_GPIO_IM);
253 writew_relaxed(0, chip->base + ZX_GPIO_IE); 250 writew_relaxed(0, chip->base + ZX_GPIO_IE);
254 irq = platform_get_irq(pdev, 0); 251 irq = platform_get_irq(pdev, 0);
255 if (irq < 0) { 252 if (irq < 0)
256 dev_err(dev, "invalid IRQ\n"); 253 return irq;
257 gpiochip_remove(&chip->gc); 254 girq = &chip->gc.irq;
258 return -ENODEV; 255 girq->chip = &zx_irqchip;
259 } 256 girq->parent_handler = zx_irq_handler;
257 girq->num_parents = 1;
258 girq->parents = devm_kcalloc(&pdev->dev, 1,
259 sizeof(*girq->parents),
260 GFP_KERNEL);
261 if (!girq->parents)
262 return -ENOMEM;
263 girq->parents[0] = irq;
264 girq->default_type = IRQ_TYPE_NONE;
265 girq->handler = handle_simple_irq;
260 266
261 ret = gpiochip_irqchip_add(&chip->gc, &zx_irqchip, 267 ret = gpiochip_add_data(&chip->gc, chip);
262 0, handle_simple_irq, 268 if (ret)
263 IRQ_TYPE_NONE);
264 if (ret) {
265 dev_err(dev, "could not add irqchip\n");
266 gpiochip_remove(&chip->gc);
267 return ret; 269 return ret;
268 }
269 gpiochip_set_chained_irqchip(&chip->gc, &zx_irqchip,
270 irq, zx_irq_handler);
271 270
272 platform_set_drvdata(pdev, chip); 271 platform_set_drvdata(pdev, chip);
273 dev_info(dev, "ZX GPIO chip registered\n"); 272 dev_info(dev, "ZX GPIO chip registered\n");
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index f241b6c13dbe..cd475ff4bcad 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c
@@ -830,6 +830,7 @@ static int zynq_gpio_probe(struct platform_device *pdev)
830 int ret, bank_num; 830 int ret, bank_num;
831 struct zynq_gpio *gpio; 831 struct zynq_gpio *gpio;
832 struct gpio_chip *chip; 832 struct gpio_chip *chip;
833 struct gpio_irq_chip *girq;
833 const struct of_device_id *match; 834 const struct of_device_id *match;
834 835
835 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 836 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
@@ -849,10 +850,8 @@ static int zynq_gpio_probe(struct platform_device *pdev)
849 return PTR_ERR(gpio->base_addr); 850 return PTR_ERR(gpio->base_addr);
850 851
851 gpio->irq = platform_get_irq(pdev, 0); 852 gpio->irq = platform_get_irq(pdev, 0);
852 if (gpio->irq < 0) { 853 if (gpio->irq < 0)
853 dev_err(&pdev->dev, "invalid IRQ\n");
854 return gpio->irq; 854 return gpio->irq;
855 }
856 855
857 /* configure the gpio chip */ 856 /* configure the gpio chip */
858 chip = &gpio->chip; 857 chip = &gpio->chip;
@@ -887,34 +886,38 @@ static int zynq_gpio_probe(struct platform_device *pdev)
887 if (ret < 0) 886 if (ret < 0)
888 goto err_pm_dis; 887 goto err_pm_dis;
889 888
890 /* report a bug if gpio chip registration fails */
891 ret = gpiochip_add_data(chip, gpio);
892 if (ret) {
893 dev_err(&pdev->dev, "Failed to add gpio chip\n");
894 goto err_pm_put;
895 }
896
897 /* disable interrupts for all banks */ 889 /* disable interrupts for all banks */
898 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) 890 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++)
899 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr + 891 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr +
900 ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); 892 ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
901 893
902 ret = gpiochip_irqchip_add(chip, &zynq_gpio_edge_irqchip, 0, 894 /* Set up the GPIO irqchip */
903 handle_level_irq, IRQ_TYPE_NONE); 895 girq = &chip->irq;
904 if (ret) { 896 girq->chip = &zynq_gpio_edge_irqchip;
905 dev_err(&pdev->dev, "Failed to add irq chip\n"); 897 girq->parent_handler = zynq_gpio_irqhandler;
906 goto err_rm_gpiochip; 898 girq->num_parents = 1;
899 girq->parents = devm_kcalloc(&pdev->dev, 1,
900 sizeof(*girq->parents),
901 GFP_KERNEL);
902 if (!girq->parents) {
903 ret = -ENOMEM;
904 goto err_pm_put;
907 } 905 }
906 girq->parents[0] = gpio->irq;
907 girq->default_type = IRQ_TYPE_NONE;
908 girq->handler = handle_level_irq;
908 909
909 gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq, 910 /* report a bug if gpio chip registration fails */
910 zynq_gpio_irqhandler); 911 ret = gpiochip_add_data(chip, gpio);
912 if (ret) {
913 dev_err(&pdev->dev, "Failed to add gpio chip\n");
914 goto err_pm_put;
915 }
911 916
912 pm_runtime_put(&pdev->dev); 917 pm_runtime_put(&pdev->dev);
913 918
914 return 0; 919 return 0;
915 920
916err_rm_gpiochip:
917 gpiochip_remove(chip);
918err_pm_put: 921err_pm_put:
919 pm_runtime_put(&pdev->dev); 922 pm_runtime_put(&pdev->dev);
920err_pm_dis: 923err_pm_dis:
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index 39f2f9035c11..fdee8afa5339 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -18,6 +18,7 @@
18#include <linux/pinctrl/pinctrl.h> 18#include <linux/pinctrl/pinctrl.h>
19 19
20#include "gpiolib.h" 20#include "gpiolib.h"
21#include "gpiolib-acpi.h"
21 22
22/** 23/**
23 * struct acpi_gpio_event - ACPI GPIO event handler data 24 * struct acpi_gpio_event - ACPI GPIO event handler data
@@ -382,6 +383,13 @@ int acpi_dev_add_driver_gpios(struct acpi_device *adev,
382} 383}
383EXPORT_SYMBOL_GPL(acpi_dev_add_driver_gpios); 384EXPORT_SYMBOL_GPL(acpi_dev_add_driver_gpios);
384 385
386void acpi_dev_remove_driver_gpios(struct acpi_device *adev)
387{
388 if (adev)
389 adev->driver_gpios = NULL;
390}
391EXPORT_SYMBOL_GPL(acpi_dev_remove_driver_gpios);
392
385static void devm_acpi_dev_release_driver_gpios(struct device *dev, void *res) 393static void devm_acpi_dev_release_driver_gpios(struct device *dev, void *res)
386{ 394{
387 acpi_dev_remove_driver_gpios(ACPI_COMPANION(dev)); 395 acpi_dev_remove_driver_gpios(ACPI_COMPANION(dev));
diff --git a/drivers/gpio/gpiolib-acpi.h b/drivers/gpio/gpiolib-acpi.h
new file mode 100644
index 000000000000..d7241b432b8b
--- /dev/null
+++ b/drivers/gpio/gpiolib-acpi.h
@@ -0,0 +1,104 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * ACPI helpers for GPIO API
4 *
5 * Copyright (C) 2012,2019 Intel Corporation
6 */
7
8#ifndef GPIOLIB_ACPI_H
9#define GPIOLIB_ACPI_H
10
11struct acpi_device;
12
13/**
14 * struct acpi_gpio_info - ACPI GPIO specific information
15 * @adev: reference to ACPI device which consumes GPIO resource
16 * @flags: GPIO initialization flags
17 * @gpioint: if %true this GPIO is of type GpioInt otherwise type is GpioIo
18 * @pin_config: pin bias as provided by ACPI
19 * @polarity: interrupt polarity as provided by ACPI
20 * @triggering: triggering type as provided by ACPI
21 * @quirks: Linux specific quirks as provided by struct acpi_gpio_mapping
22 */
23struct acpi_gpio_info {
24 struct acpi_device *adev;
25 enum gpiod_flags flags;
26 bool gpioint;
27 int pin_config;
28 int polarity;
29 int triggering;
30 unsigned int quirks;
31};
32
33#ifdef CONFIG_ACPI
34void acpi_gpiochip_add(struct gpio_chip *chip);
35void acpi_gpiochip_remove(struct gpio_chip *chip);
36
37void acpi_gpiochip_request_interrupts(struct gpio_chip *chip);
38void acpi_gpiochip_free_interrupts(struct gpio_chip *chip);
39
40int acpi_gpio_update_gpiod_flags(enum gpiod_flags *flags,
41 struct acpi_gpio_info *info);
42int acpi_gpio_update_gpiod_lookup_flags(unsigned long *lookupflags,
43 struct acpi_gpio_info *info);
44
45struct gpio_desc *acpi_find_gpio(struct device *dev,
46 const char *con_id,
47 unsigned int idx,
48 enum gpiod_flags *dflags,
49 unsigned long *lookupflags);
50struct gpio_desc *acpi_node_get_gpiod(struct fwnode_handle *fwnode,
51 const char *propname, int index,
52 struct acpi_gpio_info *info);
53
54int acpi_gpio_count(struct device *dev, const char *con_id);
55
56bool acpi_can_fallback_to_crs(struct acpi_device *adev, const char *con_id);
57#else
58static inline void acpi_gpiochip_add(struct gpio_chip *chip) { }
59static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { }
60
61static inline void
62acpi_gpiochip_request_interrupts(struct gpio_chip *chip) { }
63
64static inline void
65acpi_gpiochip_free_interrupts(struct gpio_chip *chip) { }
66
67static inline int
68acpi_gpio_update_gpiod_flags(enum gpiod_flags *flags, struct acpi_gpio_info *info)
69{
70 return 0;
71}
72static inline int
73acpi_gpio_update_gpiod_lookup_flags(unsigned long *lookupflags,
74 struct acpi_gpio_info *info)
75{
76 return 0;
77}
78
79static inline struct gpio_desc *
80acpi_find_gpio(struct device *dev, const char *con_id,
81 unsigned int idx, enum gpiod_flags *dflags,
82 unsigned long *lookupflags)
83{
84 return ERR_PTR(-ENOENT);
85}
86static inline struct gpio_desc *
87acpi_node_get_gpiod(struct fwnode_handle *fwnode, const char *propname,
88 int index, struct acpi_gpio_info *info)
89{
90 return ERR_PTR(-ENXIO);
91}
92static inline int acpi_gpio_count(struct device *dev, const char *con_id)
93{
94 return -ENODEV;
95}
96
97static inline bool acpi_can_fallback_to_crs(struct acpi_device *adev,
98 const char *con_id)
99{
100 return false;
101}
102#endif
103
104#endif /* GPIOLIB_ACPI_H */
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 9762dd6d99fa..5c38ede43c7a 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -21,6 +21,34 @@
21#include <linux/gpio/machine.h> 21#include <linux/gpio/machine.h>
22 22
23#include "gpiolib.h" 23#include "gpiolib.h"
24#include "gpiolib-of.h"
25
26/*
27 * This is used by external users of of_gpio_count() from <linux/of_gpio.h>
28 *
29 * FIXME: get rid of those external users by converting them to GPIO
30 * descriptors and let them all use gpiod_get_count()
31 */
32int of_gpio_get_count(struct device *dev, const char *con_id)
33{
34 int ret;
35 char propname[32];
36 unsigned int i;
37
38 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
39 if (con_id)
40 snprintf(propname, sizeof(propname), "%s-%s",
41 con_id, gpio_suffixes[i]);
42 else
43 snprintf(propname, sizeof(propname), "%s",
44 gpio_suffixes[i]);
45
46 ret = of_gpio_named_count(dev->of_node, propname);
47 if (ret > 0)
48 break;
49 }
50 return ret ? ret : -ENOENT;
51}
24 52
25static int of_gpiochip_match_node_and_xlate(struct gpio_chip *chip, void *data) 53static int of_gpiochip_match_node_and_xlate(struct gpio_chip *chip, void *data)
26{ 54{
@@ -53,6 +81,23 @@ static struct gpio_desc *of_xlate_and_get_gpiod_flags(struct gpio_chip *chip,
53 return gpiochip_get_desc(chip, ret); 81 return gpiochip_get_desc(chip, ret);
54} 82}
55 83
84/**
85 * of_gpio_need_valid_mask() - figure out if the OF GPIO driver needs
86 * to set the .valid_mask
87 * @dev: the device for the GPIO provider
88 * @return: true if the valid mask needs to be set
89 */
90bool of_gpio_need_valid_mask(const struct gpio_chip *gc)
91{
92 int size;
93 struct device_node *np = gc->of_node;
94
95 size = of_property_count_u32_elems(np, "gpio-reserved-ranges");
96 if (size > 0 && size % 2 == 0)
97 return true;
98 return false;
99}
100
56static void of_gpio_flags_quirks(struct device_node *np, 101static void of_gpio_flags_quirks(struct device_node *np,
57 const char *propname, 102 const char *propname,
58 enum of_gpio_flags *flags, 103 enum of_gpio_flags *flags,
@@ -231,6 +276,75 @@ int of_get_named_gpio_flags(struct device_node *np, const char *list_name,
231} 276}
232EXPORT_SYMBOL(of_get_named_gpio_flags); 277EXPORT_SYMBOL(of_get_named_gpio_flags);
233 278
279/**
280 * gpiod_get_from_of_node() - obtain a GPIO from an OF node
281 * @node: handle of the OF node
282 * @propname: name of the DT property representing the GPIO
283 * @index: index of the GPIO to obtain for the consumer
284 * @dflags: GPIO initialization flags
285 * @label: label to attach to the requested GPIO
286 *
287 * Returns:
288 * On successful request the GPIO pin is configured in accordance with
289 * provided @dflags.
290 *
291 * In case of error an ERR_PTR() is returned.
292 */
293struct gpio_desc *gpiod_get_from_of_node(struct device_node *node,
294 const char *propname, int index,
295 enum gpiod_flags dflags,
296 const char *label)
297{
298 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
299 struct gpio_desc *desc;
300 enum of_gpio_flags flags;
301 bool active_low = false;
302 bool single_ended = false;
303 bool open_drain = false;
304 bool transitory = false;
305 int ret;
306
307 desc = of_get_named_gpiod_flags(node, propname,
308 index, &flags);
309
310 if (!desc || IS_ERR(desc)) {
311 return desc;
312 }
313
314 active_low = flags & OF_GPIO_ACTIVE_LOW;
315 single_ended = flags & OF_GPIO_SINGLE_ENDED;
316 open_drain = flags & OF_GPIO_OPEN_DRAIN;
317 transitory = flags & OF_GPIO_TRANSITORY;
318
319 ret = gpiod_request(desc, label);
320 if (ret == -EBUSY && (flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
321 return desc;
322 if (ret)
323 return ERR_PTR(ret);
324
325 if (active_low)
326 lflags |= GPIO_ACTIVE_LOW;
327
328 if (single_ended) {
329 if (open_drain)
330 lflags |= GPIO_OPEN_DRAIN;
331 else
332 lflags |= GPIO_OPEN_SOURCE;
333 }
334
335 if (transitory)
336 lflags |= GPIO_TRANSITORY;
337
338 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
339 if (ret < 0) {
340 gpiod_put(desc);
341 return ERR_PTR(ret);
342 }
343
344 return desc;
345}
346EXPORT_SYMBOL(gpiod_get_from_of_node);
347
234/* 348/*
235 * The SPI GPIO bindings happened before we managed to establish that GPIO 349 * The SPI GPIO bindings happened before we managed to establish that GPIO
236 * properties should be named "foo-gpios" so we have this special kludge for 350 * properties should be named "foo-gpios" so we have this special kludge for
@@ -734,7 +848,7 @@ static int of_gpiochip_add_pin_range(struct gpio_chip *chip) { return 0; }
734 848
735int of_gpiochip_add(struct gpio_chip *chip) 849int of_gpiochip_add(struct gpio_chip *chip)
736{ 850{
737 int status; 851 int ret;
738 852
739 if (!chip->of_node) 853 if (!chip->of_node)
740 return 0; 854 return 0;
@@ -749,9 +863,9 @@ int of_gpiochip_add(struct gpio_chip *chip)
749 863
750 of_gpiochip_init_valid_mask(chip); 864 of_gpiochip_init_valid_mask(chip);
751 865
752 status = of_gpiochip_add_pin_range(chip); 866 ret = of_gpiochip_add_pin_range(chip);
753 if (status) 867 if (ret)
754 return status; 868 return ret;
755 869
756 /* If the chip defines names itself, these take precedence */ 870 /* If the chip defines names itself, these take precedence */
757 if (!chip->names) 871 if (!chip->names)
@@ -760,13 +874,13 @@ int of_gpiochip_add(struct gpio_chip *chip)
760 874
761 of_node_get(chip->of_node); 875 of_node_get(chip->of_node);
762 876
763 status = of_gpiochip_scan_gpios(chip); 877 ret = of_gpiochip_scan_gpios(chip);
764 if (status) { 878 if (ret) {
765 of_node_put(chip->of_node); 879 of_node_put(chip->of_node);
766 gpiochip_remove_pin_ranges(chip); 880 gpiochip_remove_pin_ranges(chip);
767 } 881 }
768 882
769 return status; 883 return ret;
770} 884}
771 885
772void of_gpiochip_remove(struct gpio_chip *chip) 886void of_gpiochip_remove(struct gpio_chip *chip)
diff --git a/drivers/gpio/gpiolib-of.h b/drivers/gpio/gpiolib-of.h
new file mode 100644
index 000000000000..454d1658ee2d
--- /dev/null
+++ b/drivers/gpio/gpiolib-of.h
@@ -0,0 +1,45 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2
3#ifndef GPIOLIB_OF_H
4#define GPIOLIB_OF_H
5
6struct gpio_chip;
7enum of_gpio_flags;
8
9#ifdef CONFIG_OF_GPIO
10struct gpio_desc *of_find_gpio(struct device *dev,
11 const char *con_id,
12 unsigned int idx,
13 unsigned long *lookupflags);
14struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
15 const char *list_name, int index, enum of_gpio_flags *flags);
16int of_gpiochip_add(struct gpio_chip *gc);
17void of_gpiochip_remove(struct gpio_chip *gc);
18int of_gpio_get_count(struct device *dev, const char *con_id);
19bool of_gpio_need_valid_mask(const struct gpio_chip *gc);
20#else
21static inline struct gpio_desc *of_find_gpio(struct device *dev,
22 const char *con_id,
23 unsigned int idx,
24 unsigned long *lookupflags)
25{
26 return ERR_PTR(-ENOENT);
27}
28static inline struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
29 const char *list_name, int index, enum of_gpio_flags *flags)
30{
31 return ERR_PTR(-ENOENT);
32}
33static inline int of_gpiochip_add(struct gpio_chip *gc) { return 0; }
34static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
35static inline int of_gpio_get_count(struct device *dev, const char *con_id)
36{
37 return 0;
38}
39static inline bool of_gpio_need_valid_mask(const struct gpio_chip *gc)
40{
41 return false;
42}
43#endif /* CONFIG_OF_GPIO */
44
45#endif /* GPIOLIB_OF_H */
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index cca749010cd0..5b351f87c50a 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -11,7 +11,6 @@
11#include <linux/debugfs.h> 11#include <linux/debugfs.h>
12#include <linux/seq_file.h> 12#include <linux/seq_file.h>
13#include <linux/gpio.h> 13#include <linux/gpio.h>
14#include <linux/of_gpio.h>
15#include <linux/idr.h> 14#include <linux/idr.h>
16#include <linux/slab.h> 15#include <linux/slab.h>
17#include <linux/acpi.h> 16#include <linux/acpi.h>
@@ -30,6 +29,8 @@
30#include <uapi/linux/gpio.h> 29#include <uapi/linux/gpio.h>
31 30
32#include "gpiolib.h" 31#include "gpiolib.h"
32#include "gpiolib-of.h"
33#include "gpiolib-acpi.h"
33 34
34#define CREATE_TRACE_POINTS 35#define CREATE_TRACE_POINTS
35#include <trace/events/gpio.h> 36#include <trace/events/gpio.h>
@@ -213,7 +214,7 @@ int gpiod_get_direction(struct gpio_desc *desc)
213{ 214{
214 struct gpio_chip *chip; 215 struct gpio_chip *chip;
215 unsigned offset; 216 unsigned offset;
216 int status; 217 int ret;
217 218
218 chip = gpiod_to_chip(desc); 219 chip = gpiod_to_chip(desc);
219 offset = gpio_chip_hwgpio(desc); 220 offset = gpio_chip_hwgpio(desc);
@@ -221,17 +222,17 @@ int gpiod_get_direction(struct gpio_desc *desc)
221 if (!chip->get_direction) 222 if (!chip->get_direction)
222 return -ENOTSUPP; 223 return -ENOTSUPP;
223 224
224 status = chip->get_direction(chip, offset); 225 ret = chip->get_direction(chip, offset);
225 if (status > 0) { 226 if (ret > 0) {
226 /* GPIOF_DIR_IN, or other positive */ 227 /* GPIOF_DIR_IN, or other positive */
227 status = 1; 228 ret = 1;
228 clear_bit(FLAG_IS_OUT, &desc->flags); 229 clear_bit(FLAG_IS_OUT, &desc->flags);
229 } 230 }
230 if (status == 0) { 231 if (ret == 0) {
231 /* GPIOF_DIR_OUT */ 232 /* GPIOF_DIR_OUT */
232 set_bit(FLAG_IS_OUT, &desc->flags); 233 set_bit(FLAG_IS_OUT, &desc->flags);
233 } 234 }
234 return status; 235 return ret;
235} 236}
236EXPORT_SYMBOL_GPL(gpiod_get_direction); 237EXPORT_SYMBOL_GPL(gpiod_get_direction);
237 238
@@ -350,7 +351,7 @@ static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
350{ 351{
351 unsigned long *p; 352 unsigned long *p;
352 353
353 p = kmalloc_array(BITS_TO_LONGS(chip->ngpio), sizeof(*p), GFP_KERNEL); 354 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
354 if (!p) 355 if (!p)
355 return NULL; 356 return NULL;
356 357
@@ -360,38 +361,31 @@ static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
360 return p; 361 return p;
361} 362}
362 363
363static int gpiochip_alloc_valid_mask(struct gpio_chip *gpiochip) 364static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
364{ 365{
365#ifdef CONFIG_OF_GPIO 366 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
366 int size;
367 struct device_node *np = gpiochip->of_node;
368
369 size = of_property_count_u32_elems(np, "gpio-reserved-ranges");
370 if (size > 0 && size % 2 == 0)
371 gpiochip->need_valid_mask = true;
372#endif
373
374 if (!gpiochip->need_valid_mask)
375 return 0; 367 return 0;
376 368
377 gpiochip->valid_mask = gpiochip_allocate_mask(gpiochip); 369 gc->valid_mask = gpiochip_allocate_mask(gc);
378 if (!gpiochip->valid_mask) 370 if (!gc->valid_mask)
379 return -ENOMEM; 371 return -ENOMEM;
380 372
381 return 0; 373 return 0;
382} 374}
383 375
384static int gpiochip_init_valid_mask(struct gpio_chip *gpiochip) 376static int gpiochip_init_valid_mask(struct gpio_chip *gc)
385{ 377{
386 if (gpiochip->init_valid_mask) 378 if (gc->init_valid_mask)
387 return gpiochip->init_valid_mask(gpiochip); 379 return gc->init_valid_mask(gc,
380 gc->valid_mask,
381 gc->ngpio);
388 382
389 return 0; 383 return 0;
390} 384}
391 385
392static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip) 386static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
393{ 387{
394 kfree(gpiochip->valid_mask); 388 bitmap_free(gpiochip->valid_mask);
395 gpiochip->valid_mask = NULL; 389 gpiochip->valid_mask = NULL;
396} 390}
397 391
@@ -1176,21 +1170,21 @@ static void gpiodevice_release(struct device *dev)
1176 1170
1177static int gpiochip_setup_dev(struct gpio_device *gdev) 1171static int gpiochip_setup_dev(struct gpio_device *gdev)
1178{ 1172{
1179 int status; 1173 int ret;
1180 1174
1181 cdev_init(&gdev->chrdev, &gpio_fileops); 1175 cdev_init(&gdev->chrdev, &gpio_fileops);
1182 gdev->chrdev.owner = THIS_MODULE; 1176 gdev->chrdev.owner = THIS_MODULE;
1183 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id); 1177 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
1184 1178
1185 status = cdev_device_add(&gdev->chrdev, &gdev->dev); 1179 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1186 if (status) 1180 if (ret)
1187 return status; 1181 return ret;
1188 1182
1189 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n", 1183 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1190 MAJOR(gpio_devt), gdev->id); 1184 MAJOR(gpio_devt), gdev->id);
1191 1185
1192 status = gpiochip_sysfs_register(gdev); 1186 ret = gpiochip_sysfs_register(gdev);
1193 if (status) 1187 if (ret)
1194 goto err_remove_device; 1188 goto err_remove_device;
1195 1189
1196 /* From this point, the .release() function cleans up gpio_device */ 1190 /* From this point, the .release() function cleans up gpio_device */
@@ -1203,7 +1197,7 @@ static int gpiochip_setup_dev(struct gpio_device *gdev)
1203 1197
1204err_remove_device: 1198err_remove_device:
1205 cdev_device_del(&gdev->chrdev, &gdev->dev); 1199 cdev_device_del(&gdev->chrdev, &gdev->dev);
1206 return status; 1200 return ret;
1207} 1201}
1208 1202
1209static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog) 1203static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
@@ -1244,13 +1238,13 @@ static void machine_gpiochip_add(struct gpio_chip *chip)
1244static void gpiochip_setup_devs(void) 1238static void gpiochip_setup_devs(void)
1245{ 1239{
1246 struct gpio_device *gdev; 1240 struct gpio_device *gdev;
1247 int err; 1241 int ret;
1248 1242
1249 list_for_each_entry(gdev, &gpio_devices, list) { 1243 list_for_each_entry(gdev, &gpio_devices, list) {
1250 err = gpiochip_setup_dev(gdev); 1244 ret = gpiochip_setup_dev(gdev);
1251 if (err) 1245 if (ret)
1252 pr_err("%s: Failed to initialize gpio device (%d)\n", 1246 pr_err("%s: Failed to initialize gpio device (%d)\n",
1253 dev_name(&gdev->dev), err); 1247 dev_name(&gdev->dev), ret);
1254 } 1248 }
1255} 1249}
1256 1250
@@ -1259,7 +1253,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1259 struct lock_class_key *request_key) 1253 struct lock_class_key *request_key)
1260{ 1254{
1261 unsigned long flags; 1255 unsigned long flags;
1262 int status = 0; 1256 int ret = 0;
1263 unsigned i; 1257 unsigned i;
1264 int base = chip->base; 1258 int base = chip->base;
1265 struct gpio_device *gdev; 1259 struct gpio_device *gdev;
@@ -1289,7 +1283,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1289 1283
1290 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL); 1284 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1291 if (gdev->id < 0) { 1285 if (gdev->id < 0) {
1292 status = gdev->id; 1286 ret = gdev->id;
1293 goto err_free_gdev; 1287 goto err_free_gdev;
1294 } 1288 }
1295 dev_set_name(&gdev->dev, "gpiochip%d", gdev->id); 1289 dev_set_name(&gdev->dev, "gpiochip%d", gdev->id);
@@ -1305,13 +1299,13 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1305 1299
1306 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); 1300 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1307 if (!gdev->descs) { 1301 if (!gdev->descs) {
1308 status = -ENOMEM; 1302 ret = -ENOMEM;
1309 goto err_free_ida; 1303 goto err_free_ida;
1310 } 1304 }
1311 1305
1312 if (chip->ngpio == 0) { 1306 if (chip->ngpio == 0) {
1313 chip_err(chip, "tried to insert a GPIO chip with zero lines\n"); 1307 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
1314 status = -EINVAL; 1308 ret = -EINVAL;
1315 goto err_free_descs; 1309 goto err_free_descs;
1316 } 1310 }
1317 1311
@@ -1321,7 +1315,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1321 1315
1322 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL); 1316 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
1323 if (!gdev->label) { 1317 if (!gdev->label) {
1324 status = -ENOMEM; 1318 ret = -ENOMEM;
1325 goto err_free_descs; 1319 goto err_free_descs;
1326 } 1320 }
1327 1321
@@ -1340,7 +1334,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1340 if (base < 0) { 1334 if (base < 0) {
1341 base = gpiochip_find_base(chip->ngpio); 1335 base = gpiochip_find_base(chip->ngpio);
1342 if (base < 0) { 1336 if (base < 0) {
1343 status = base; 1337 ret = base;
1344 spin_unlock_irqrestore(&gpio_lock, flags); 1338 spin_unlock_irqrestore(&gpio_lock, flags);
1345 goto err_free_label; 1339 goto err_free_label;
1346 } 1340 }
@@ -1354,8 +1348,8 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1354 } 1348 }
1355 gdev->base = base; 1349 gdev->base = base;
1356 1350
1357 status = gpiodev_add_to_list(gdev); 1351 ret = gpiodev_add_to_list(gdev);
1358 if (status) { 1352 if (ret) {
1359 spin_unlock_irqrestore(&gpio_lock, flags); 1353 spin_unlock_irqrestore(&gpio_lock, flags);
1360 goto err_free_label; 1354 goto err_free_label;
1361 } 1355 }
@@ -1369,20 +1363,20 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1369 INIT_LIST_HEAD(&gdev->pin_ranges); 1363 INIT_LIST_HEAD(&gdev->pin_ranges);
1370#endif 1364#endif
1371 1365
1372 status = gpiochip_set_desc_names(chip); 1366 ret = gpiochip_set_desc_names(chip);
1373 if (status) 1367 if (ret)
1374 goto err_remove_from_list; 1368 goto err_remove_from_list;
1375 1369
1376 status = gpiochip_alloc_valid_mask(chip); 1370 ret = gpiochip_alloc_valid_mask(chip);
1377 if (status) 1371 if (ret)
1378 goto err_remove_from_list; 1372 goto err_remove_from_list;
1379 1373
1380 status = of_gpiochip_add(chip); 1374 ret = of_gpiochip_add(chip);
1381 if (status) 1375 if (ret)
1382 goto err_free_gpiochip_mask; 1376 goto err_free_gpiochip_mask;
1383 1377
1384 status = gpiochip_init_valid_mask(chip); 1378 ret = gpiochip_init_valid_mask(chip);
1385 if (status) 1379 if (ret)
1386 goto err_remove_of_chip; 1380 goto err_remove_of_chip;
1387 1381
1388 for (i = 0; i < chip->ngpio; i++) { 1382 for (i = 0; i < chip->ngpio; i++) {
@@ -1422,8 +1416,8 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
1422 * Otherwise, defer until later. 1416 * Otherwise, defer until later.
1423 */ 1417 */
1424 if (gpiolib_initialized) { 1418 if (gpiolib_initialized) {
1425 status = gpiochip_setup_dev(gdev); 1419 ret = gpiochip_setup_dev(gdev);
1426 if (status) 1420 if (ret)
1427 goto err_remove_irqchip; 1421 goto err_remove_irqchip;
1428 } 1422 }
1429 return 0; 1423 return 0;
@@ -1453,9 +1447,9 @@ err_free_gdev:
1453 /* failures here can mean systems won't boot... */ 1447 /* failures here can mean systems won't boot... */
1454 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, 1448 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
1455 gdev->base, gdev->base + gdev->ngpio - 1, 1449 gdev->base, gdev->base + gdev->ngpio - 1,
1456 chip->label ? : "generic", status); 1450 chip->label ? : "generic", ret);
1457 kfree(gdev); 1451 kfree(gdev);
1458 return status; 1452 return ret;
1459} 1453}
1460EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); 1454EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
1461 1455
@@ -1635,7 +1629,7 @@ static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
1635 1629
1636static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) 1630static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1637{ 1631{
1638 kfree(gpiochip->irq.valid_mask); 1632 bitmap_free(gpiochip->irq.valid_mask);
1639 gpiochip->irq.valid_mask = NULL; 1633 gpiochip->irq.valid_mask = NULL;
1640} 1634}
1641 1635
@@ -1735,6 +1729,273 @@ void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1735} 1729}
1736EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip); 1730EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1737 1731
1732#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1733
1734/**
1735 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1736 * to a gpiochip
1737 * @gc: the gpiochip to set the irqchip hierarchical handler to
1738 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1739 * will then percolate up to the parent
1740 */
1741static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1742 struct irq_chip *irqchip)
1743{
1744 /* DT will deal with mapping each IRQ as we go along */
1745 if (is_of_node(gc->irq.fwnode))
1746 return;
1747
1748 /*
1749 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1750 * irqs upfront instead of dynamically since we don't have the
1751 * dynamic type of allocation that hardware description languages
1752 * provide. Once all GPIO drivers using board files are gone from
1753 * the kernel we can delete this code, but for a transitional period
1754 * it is necessary to keep this around.
1755 */
1756 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1757 int i;
1758 int ret;
1759
1760 for (i = 0; i < gc->ngpio; i++) {
1761 struct irq_fwspec fwspec;
1762 unsigned int parent_hwirq;
1763 unsigned int parent_type;
1764 struct gpio_irq_chip *girq = &gc->irq;
1765
1766 /*
1767 * We call the child to parent translation function
1768 * only to check if the child IRQ is valid or not.
1769 * Just pick the rising edge type here as that is what
1770 * we likely need to support.
1771 */
1772 ret = girq->child_to_parent_hwirq(gc, i,
1773 IRQ_TYPE_EDGE_RISING,
1774 &parent_hwirq,
1775 &parent_type);
1776 if (ret) {
1777 chip_err(gc, "skip set-up on hwirq %d\n",
1778 i);
1779 continue;
1780 }
1781
1782 fwspec.fwnode = gc->irq.fwnode;
1783 /* This is the hwirq for the GPIO line side of things */
1784 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1785 /* Just pick something */
1786 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1787 fwspec.param_count = 2;
1788 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1789 /* just pick something */
1790 -1,
1791 1,
1792 NUMA_NO_NODE,
1793 &fwspec,
1794 false,
1795 NULL);
1796 if (ret < 0) {
1797 chip_err(gc,
1798 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1799 i, parent_hwirq,
1800 ret);
1801 }
1802 }
1803 }
1804
1805 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1806
1807 return;
1808}
1809
1810static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1811 struct irq_fwspec *fwspec,
1812 unsigned long *hwirq,
1813 unsigned int *type)
1814{
1815 /* We support standard DT translation */
1816 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1817 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1818 }
1819
1820 /* This is for board files and others not using DT */
1821 if (is_fwnode_irqchip(fwspec->fwnode)) {
1822 int ret;
1823
1824 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1825 if (ret)
1826 return ret;
1827 WARN_ON(*type == IRQ_TYPE_NONE);
1828 return 0;
1829 }
1830 return -EINVAL;
1831}
1832
1833static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1834 unsigned int irq,
1835 unsigned int nr_irqs,
1836 void *data)
1837{
1838 struct gpio_chip *gc = d->host_data;
1839 irq_hw_number_t hwirq;
1840 unsigned int type = IRQ_TYPE_NONE;
1841 struct irq_fwspec *fwspec = data;
1842 struct irq_fwspec parent_fwspec;
1843 unsigned int parent_hwirq;
1844 unsigned int parent_type;
1845 struct gpio_irq_chip *girq = &gc->irq;
1846 int ret;
1847
1848 /*
1849 * The nr_irqs parameter is always one except for PCI multi-MSI
1850 * so this should not happen.
1851 */
1852 WARN_ON(nr_irqs != 1);
1853
1854 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1855 if (ret)
1856 return ret;
1857
1858 chip_info(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
1859
1860 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1861 &parent_hwirq, &parent_type);
1862 if (ret) {
1863 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1864 return ret;
1865 }
1866 chip_info(gc, "found parent hwirq %u\n", parent_hwirq);
1867
1868 /*
1869 * We set handle_bad_irq because the .set_type() should
1870 * always be invoked and set the right type of handler.
1871 */
1872 irq_domain_set_info(d,
1873 irq,
1874 hwirq,
1875 gc->irq.chip,
1876 gc,
1877 girq->handler,
1878 NULL, NULL);
1879 irq_set_probe(irq);
1880
1881 /*
1882 * Create a IRQ fwspec to send up to the parent irqdomain:
1883 * specify the hwirq we address on the parent and tie it
1884 * all together up the chain.
1885 */
1886 parent_fwspec.fwnode = d->parent->fwnode;
1887 /* This parent only handles asserted level IRQs */
1888 girq->populate_parent_fwspec(gc, &parent_fwspec, parent_hwirq,
1889 parent_type);
1890 chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
1891 irq, parent_hwirq);
1892 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &parent_fwspec);
1893 if (ret)
1894 chip_err(gc,
1895 "failed to allocate parent hwirq %d for hwirq %lu\n",
1896 parent_hwirq, hwirq);
1897
1898 return ret;
1899}
1900
1901static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
1902 unsigned int offset)
1903{
1904 return offset;
1905}
1906
1907static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1908{
1909 ops->activate = gpiochip_irq_domain_activate;
1910 ops->deactivate = gpiochip_irq_domain_deactivate;
1911 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1912 ops->free = irq_domain_free_irqs_common;
1913
1914 /*
1915 * We only allow overriding the translate() function for
1916 * hierarchical chips, and this should only be done if the user
1917 * really need something other than 1:1 translation.
1918 */
1919 if (!ops->translate)
1920 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1921}
1922
1923static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1924{
1925 if (!gc->irq.child_to_parent_hwirq ||
1926 !gc->irq.fwnode) {
1927 chip_err(gc, "missing irqdomain vital data\n");
1928 return -EINVAL;
1929 }
1930
1931 if (!gc->irq.child_offset_to_irq)
1932 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1933
1934 if (!gc->irq.populate_parent_fwspec)
1935 gc->irq.populate_parent_fwspec =
1936 gpiochip_populate_parent_fwspec_twocell;
1937
1938 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1939
1940 gc->irq.domain = irq_domain_create_hierarchy(
1941 gc->irq.parent_domain,
1942 0,
1943 gc->ngpio,
1944 gc->irq.fwnode,
1945 &gc->irq.child_irq_domain_ops,
1946 gc);
1947
1948 if (!gc->irq.domain)
1949 return -ENOMEM;
1950
1951 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1952
1953 return 0;
1954}
1955
1956static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1957{
1958 return !!gc->irq.parent_domain;
1959}
1960
1961void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
1962 struct irq_fwspec *fwspec,
1963 unsigned int parent_hwirq,
1964 unsigned int parent_type)
1965{
1966 fwspec->param_count = 2;
1967 fwspec->param[0] = parent_hwirq;
1968 fwspec->param[1] = parent_type;
1969}
1970EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1971
1972void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
1973 struct irq_fwspec *fwspec,
1974 unsigned int parent_hwirq,
1975 unsigned int parent_type)
1976{
1977 fwspec->param_count = 4;
1978 fwspec->param[0] = 0;
1979 fwspec->param[1] = parent_hwirq;
1980 fwspec->param[2] = 0;
1981 fwspec->param[3] = parent_type;
1982}
1983EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1984
1985#else
1986
1987static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1988{
1989 return -EINVAL;
1990}
1991
1992static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1993{
1994 return false;
1995}
1996
1997#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1998
1738/** 1999/**
1739 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip 2000 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1740 * @d: the irqdomain used by this irqchip 2001 * @d: the irqdomain used by this irqchip
@@ -1749,7 +2010,7 @@ int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1749 irq_hw_number_t hwirq) 2010 irq_hw_number_t hwirq)
1750{ 2011{
1751 struct gpio_chip *chip = d->host_data; 2012 struct gpio_chip *chip = d->host_data;
1752 int err = 0; 2013 int ret = 0;
1753 2014
1754 if (!gpiochip_irqchip_irq_valid(chip, hwirq)) 2015 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
1755 return -ENXIO; 2016 return -ENXIO;
@@ -1767,12 +2028,12 @@ int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1767 irq_set_noprobe(irq); 2028 irq_set_noprobe(irq);
1768 2029
1769 if (chip->irq.num_parents == 1) 2030 if (chip->irq.num_parents == 1)
1770 err = irq_set_parent(irq, chip->irq.parents[0]); 2031 ret = irq_set_parent(irq, chip->irq.parents[0]);
1771 else if (chip->irq.map) 2032 else if (chip->irq.map)
1772 err = irq_set_parent(irq, chip->irq.map[hwirq]); 2033 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
1773 2034
1774 if (err < 0) 2035 if (ret < 0)
1775 return err; 2036 return ret;
1776 2037
1777 /* 2038 /*
1778 * No set-up of the hardware will happen if IRQ_TYPE_NONE 2039 * No set-up of the hardware will happen if IRQ_TYPE_NONE
@@ -1803,6 +2064,11 @@ static const struct irq_domain_ops gpiochip_domain_ops = {
1803 .xlate = irq_domain_xlate_twocell, 2064 .xlate = irq_domain_xlate_twocell,
1804}; 2065};
1805 2066
2067/*
2068 * TODO: move these activate/deactivate in under the hierarchicial
2069 * irqchip implementation as static once SPMI and SSBI (all external
2070 * users) are phased over.
2071 */
1806/** 2072/**
1807 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ 2073 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1808 * @domain: The IRQ domain used by this IRQ chip 2074 * @domain: The IRQ domain used by this IRQ chip
@@ -1842,10 +2108,25 @@ EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1842 2108
1843static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset) 2109static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
1844{ 2110{
2111 struct irq_domain *domain = chip->irq.domain;
2112
1845 if (!gpiochip_irqchip_irq_valid(chip, offset)) 2113 if (!gpiochip_irqchip_irq_valid(chip, offset))
1846 return -ENXIO; 2114 return -ENXIO;
1847 2115
1848 return irq_create_mapping(chip->irq.domain, offset); 2116#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2117 if (irq_domain_is_hierarchy(domain)) {
2118 struct irq_fwspec spec;
2119
2120 spec.fwnode = domain->fwnode;
2121 spec.param_count = 2;
2122 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2123 spec.param[1] = IRQ_TYPE_NONE;
2124
2125 return irq_create_fwspec_mapping(&spec);
2126 }
2127#endif
2128
2129 return irq_create_mapping(domain, offset);
1849} 2130}
1850 2131
1851static int gpiochip_irq_reqres(struct irq_data *d) 2132static int gpiochip_irq_reqres(struct irq_data *d)
@@ -1922,7 +2203,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
1922 struct lock_class_key *request_key) 2203 struct lock_class_key *request_key)
1923{ 2204{
1924 struct irq_chip *irqchip = gpiochip->irq.chip; 2205 struct irq_chip *irqchip = gpiochip->irq.chip;
1925 const struct irq_domain_ops *ops; 2206 const struct irq_domain_ops *ops = NULL;
1926 struct device_node *np; 2207 struct device_node *np;
1927 unsigned int type; 2208 unsigned int type;
1928 unsigned int i; 2209 unsigned int i;
@@ -1958,16 +2239,25 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
1958 gpiochip->irq.lock_key = lock_key; 2239 gpiochip->irq.lock_key = lock_key;
1959 gpiochip->irq.request_key = request_key; 2240 gpiochip->irq.request_key = request_key;
1960 2241
1961 if (gpiochip->irq.domain_ops) 2242 /* If a parent irqdomain is provided, let's build a hierarchy */
1962 ops = gpiochip->irq.domain_ops; 2243 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
1963 else 2244 int ret = gpiochip_hierarchy_add_domain(gpiochip);
1964 ops = &gpiochip_domain_ops; 2245 if (ret)
1965 2246 return ret;
1966 gpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio, 2247 } else {
1967 gpiochip->irq.first, 2248 /* Some drivers provide custom irqdomain ops */
1968 ops, gpiochip); 2249 if (gpiochip->irq.domain_ops)
1969 if (!gpiochip->irq.domain) 2250 ops = gpiochip->irq.domain_ops;
1970 return -EINVAL; 2251
2252 if (!ops)
2253 ops = &gpiochip_domain_ops;
2254 gpiochip->irq.domain = irq_domain_add_simple(np,
2255 gpiochip->ngpio,
2256 gpiochip->irq.first,
2257 ops, gpiochip);
2258 if (!gpiochip->irq.domain)
2259 return -EINVAL;
2260 }
1971 2261
1972 if (gpiochip->irq.parent_handler) { 2262 if (gpiochip->irq.parent_handler) {
1973 void *data = gpiochip->irq.parent_handler_data ?: gpiochip; 2263 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
@@ -2330,7 +2620,7 @@ EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2330static int gpiod_request_commit(struct gpio_desc *desc, const char *label) 2620static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
2331{ 2621{
2332 struct gpio_chip *chip = desc->gdev->chip; 2622 struct gpio_chip *chip = desc->gdev->chip;
2333 int status; 2623 int ret;
2334 unsigned long flags; 2624 unsigned long flags;
2335 unsigned offset; 2625 unsigned offset;
2336 2626
@@ -2348,10 +2638,10 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
2348 2638
2349 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { 2639 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2350 desc_set_label(desc, label ? : "?"); 2640 desc_set_label(desc, label ? : "?");
2351 status = 0; 2641 ret = 0;
2352 } else { 2642 } else {
2353 kfree_const(label); 2643 kfree_const(label);
2354 status = -EBUSY; 2644 ret = -EBUSY;
2355 goto done; 2645 goto done;
2356 } 2646 }
2357 2647
@@ -2360,12 +2650,12 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
2360 spin_unlock_irqrestore(&gpio_lock, flags); 2650 spin_unlock_irqrestore(&gpio_lock, flags);
2361 offset = gpio_chip_hwgpio(desc); 2651 offset = gpio_chip_hwgpio(desc);
2362 if (gpiochip_line_is_valid(chip, offset)) 2652 if (gpiochip_line_is_valid(chip, offset))
2363 status = chip->request(chip, offset); 2653 ret = chip->request(chip, offset);
2364 else 2654 else
2365 status = -EINVAL; 2655 ret = -EINVAL;
2366 spin_lock_irqsave(&gpio_lock, flags); 2656 spin_lock_irqsave(&gpio_lock, flags);
2367 2657
2368 if (status < 0) { 2658 if (ret < 0) {
2369 desc_set_label(desc, NULL); 2659 desc_set_label(desc, NULL);
2370 kfree_const(label); 2660 kfree_const(label);
2371 clear_bit(FLAG_REQUESTED, &desc->flags); 2661 clear_bit(FLAG_REQUESTED, &desc->flags);
@@ -2380,7 +2670,7 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
2380 } 2670 }
2381done: 2671done:
2382 spin_unlock_irqrestore(&gpio_lock, flags); 2672 spin_unlock_irqrestore(&gpio_lock, flags);
2383 return status; 2673 return ret;
2384} 2674}
2385 2675
2386/* 2676/*
@@ -2423,24 +2713,24 @@ static int validate_desc(const struct gpio_desc *desc, const char *func)
2423 2713
2424int gpiod_request(struct gpio_desc *desc, const char *label) 2714int gpiod_request(struct gpio_desc *desc, const char *label)
2425{ 2715{
2426 int status = -EPROBE_DEFER; 2716 int ret = -EPROBE_DEFER;
2427 struct gpio_device *gdev; 2717 struct gpio_device *gdev;
2428 2718
2429 VALIDATE_DESC(desc); 2719 VALIDATE_DESC(desc);
2430 gdev = desc->gdev; 2720 gdev = desc->gdev;
2431 2721
2432 if (try_module_get(gdev->owner)) { 2722 if (try_module_get(gdev->owner)) {
2433 status = gpiod_request_commit(desc, label); 2723 ret = gpiod_request_commit(desc, label);
2434 if (status < 0) 2724 if (ret < 0)
2435 module_put(gdev->owner); 2725 module_put(gdev->owner);
2436 else 2726 else
2437 get_device(&gdev->dev); 2727 get_device(&gdev->dev);
2438 } 2728 }
2439 2729
2440 if (status) 2730 if (ret)
2441 gpiod_dbg(desc, "%s: status %d\n", __func__, status); 2731 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
2442 2732
2443 return status; 2733 return ret;
2444} 2734}
2445 2735
2446static bool gpiod_free_commit(struct gpio_desc *desc) 2736static bool gpiod_free_commit(struct gpio_desc *desc)
@@ -2542,22 +2832,22 @@ struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
2542 enum gpiod_flags dflags) 2832 enum gpiod_flags dflags)
2543{ 2833{
2544 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum); 2834 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
2545 int err; 2835 int ret;
2546 2836
2547 if (IS_ERR(desc)) { 2837 if (IS_ERR(desc)) {
2548 chip_err(chip, "failed to get GPIO descriptor\n"); 2838 chip_err(chip, "failed to get GPIO descriptor\n");
2549 return desc; 2839 return desc;
2550 } 2840 }
2551 2841
2552 err = gpiod_request_commit(desc, label); 2842 ret = gpiod_request_commit(desc, label);
2553 if (err < 0) 2843 if (ret < 0)
2554 return ERR_PTR(err); 2844 return ERR_PTR(ret);
2555 2845
2556 err = gpiod_configure_flags(desc, label, lflags, dflags); 2846 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2557 if (err) { 2847 if (ret) {
2558 chip_err(chip, "setup of own GPIO %s failed\n", label); 2848 chip_err(chip, "setup of own GPIO %s failed\n", label);
2559 gpiod_free_commit(desc); 2849 gpiod_free_commit(desc);
2560 return ERR_PTR(err); 2850 return ERR_PTR(ret);
2561 } 2851 }
2562 2852
2563 return desc; 2853 return desc;
@@ -2620,7 +2910,7 @@ static int gpio_set_config(struct gpio_chip *gc, unsigned offset,
2620int gpiod_direction_input(struct gpio_desc *desc) 2910int gpiod_direction_input(struct gpio_desc *desc)
2621{ 2911{
2622 struct gpio_chip *chip; 2912 struct gpio_chip *chip;
2623 int status = 0; 2913 int ret = 0;
2624 2914
2625 VALIDATE_DESC(desc); 2915 VALIDATE_DESC(desc);
2626 chip = desc->gdev->chip; 2916 chip = desc->gdev->chip;
@@ -2644,7 +2934,7 @@ int gpiod_direction_input(struct gpio_desc *desc)
2644 * assume we are in input mode after this. 2934 * assume we are in input mode after this.
2645 */ 2935 */
2646 if (chip->direction_input) { 2936 if (chip->direction_input) {
2647 status = chip->direction_input(chip, gpio_chip_hwgpio(desc)); 2937 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
2648 } else if (chip->get_direction && 2938 } else if (chip->get_direction &&
2649 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) { 2939 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
2650 gpiod_warn(desc, 2940 gpiod_warn(desc,
@@ -2652,7 +2942,7 @@ int gpiod_direction_input(struct gpio_desc *desc)
2652 __func__); 2942 __func__);
2653 return -EIO; 2943 return -EIO;
2654 } 2944 }
2655 if (status == 0) 2945 if (ret == 0)
2656 clear_bit(FLAG_IS_OUT, &desc->flags); 2946 clear_bit(FLAG_IS_OUT, &desc->flags);
2657 2947
2658 if (test_bit(FLAG_PULL_UP, &desc->flags)) 2948 if (test_bit(FLAG_PULL_UP, &desc->flags))
@@ -2662,9 +2952,9 @@ int gpiod_direction_input(struct gpio_desc *desc)
2662 gpio_set_config(chip, gpio_chip_hwgpio(desc), 2952 gpio_set_config(chip, gpio_chip_hwgpio(desc),
2663 PIN_CONFIG_BIAS_PULL_DOWN); 2953 PIN_CONFIG_BIAS_PULL_DOWN);
2664 2954
2665 trace_gpio_direction(desc_to_gpio(desc), 1, status); 2955 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
2666 2956
2667 return status; 2957 return ret;
2668} 2958}
2669EXPORT_SYMBOL_GPL(gpiod_direction_input); 2959EXPORT_SYMBOL_GPL(gpiod_direction_input);
2670 2960
@@ -2936,7 +3226,7 @@ int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2936 struct gpio_array *array_info, 3226 struct gpio_array *array_info,
2937 unsigned long *value_bitmap) 3227 unsigned long *value_bitmap)
2938{ 3228{
2939 int err, i = 0; 3229 int ret, i = 0;
2940 3230
2941 /* 3231 /*
2942 * Validate array_info against desc_array and its size. 3232 * Validate array_info against desc_array and its size.
@@ -2949,11 +3239,11 @@ int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2949 if (!can_sleep) 3239 if (!can_sleep)
2950 WARN_ON(array_info->chip->can_sleep); 3240 WARN_ON(array_info->chip->can_sleep);
2951 3241
2952 err = gpio_chip_get_multiple(array_info->chip, 3242 ret = gpio_chip_get_multiple(array_info->chip,
2953 array_info->get_mask, 3243 array_info->get_mask,
2954 value_bitmap); 3244 value_bitmap);
2955 if (err) 3245 if (ret)
2956 return err; 3246 return ret;
2957 3247
2958 if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) 3248 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2959 bitmap_xor(value_bitmap, value_bitmap, 3249 bitmap_xor(value_bitmap, value_bitmap,
@@ -3141,24 +3431,24 @@ EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3141 */ 3431 */
3142static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) 3432static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
3143{ 3433{
3144 int err = 0; 3434 int ret = 0;
3145 struct gpio_chip *chip = desc->gdev->chip; 3435 struct gpio_chip *chip = desc->gdev->chip;
3146 int offset = gpio_chip_hwgpio(desc); 3436 int offset = gpio_chip_hwgpio(desc);
3147 3437
3148 if (value) { 3438 if (value) {
3149 err = chip->direction_input(chip, offset); 3439 ret = chip->direction_input(chip, offset);
3150 if (!err) 3440 if (!ret)
3151 clear_bit(FLAG_IS_OUT, &desc->flags); 3441 clear_bit(FLAG_IS_OUT, &desc->flags);
3152 } else { 3442 } else {
3153 err = chip->direction_output(chip, offset, 0); 3443 ret = chip->direction_output(chip, offset, 0);
3154 if (!err) 3444 if (!ret)
3155 set_bit(FLAG_IS_OUT, &desc->flags); 3445 set_bit(FLAG_IS_OUT, &desc->flags);
3156 } 3446 }
3157 trace_gpio_direction(desc_to_gpio(desc), value, err); 3447 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3158 if (err < 0) 3448 if (ret < 0)
3159 gpiod_err(desc, 3449 gpiod_err(desc,
3160 "%s: Error in set_value for open drain err %d\n", 3450 "%s: Error in set_value for open drain err %d\n",
3161 __func__, err); 3451 __func__, ret);
3162} 3452}
3163 3453
3164/* 3454/*
@@ -3168,24 +3458,24 @@ static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
3168 */ 3458 */
3169static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) 3459static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
3170{ 3460{
3171 int err = 0; 3461 int ret = 0;
3172 struct gpio_chip *chip = desc->gdev->chip; 3462 struct gpio_chip *chip = desc->gdev->chip;
3173 int offset = gpio_chip_hwgpio(desc); 3463 int offset = gpio_chip_hwgpio(desc);
3174 3464
3175 if (value) { 3465 if (value) {
3176 err = chip->direction_output(chip, offset, 1); 3466 ret = chip->direction_output(chip, offset, 1);
3177 if (!err) 3467 if (!ret)
3178 set_bit(FLAG_IS_OUT, &desc->flags); 3468 set_bit(FLAG_IS_OUT, &desc->flags);
3179 } else { 3469 } else {
3180 err = chip->direction_input(chip, offset); 3470 ret = chip->direction_input(chip, offset);
3181 if (!err) 3471 if (!ret)
3182 clear_bit(FLAG_IS_OUT, &desc->flags); 3472 clear_bit(FLAG_IS_OUT, &desc->flags);
3183 } 3473 }
3184 trace_gpio_direction(desc_to_gpio(desc), !value, err); 3474 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3185 if (err < 0) 3475 if (ret < 0)
3186 gpiod_err(desc, 3476 gpiod_err(desc,
3187 "%s: Error in set_value for open source err %d\n", 3477 "%s: Error in set_value for open source err %d\n",
3188 __func__, err); 3478 __func__, ret);
3189} 3479}
3190 3480
3191static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) 3481static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
@@ -4002,27 +4292,6 @@ static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
4002 return desc; 4292 return desc;
4003} 4293}
4004 4294
4005static int dt_gpio_count(struct device *dev, const char *con_id)
4006{
4007 int ret;
4008 char propname[32];
4009 unsigned int i;
4010
4011 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4012 if (con_id)
4013 snprintf(propname, sizeof(propname), "%s-%s",
4014 con_id, gpio_suffixes[i]);
4015 else
4016 snprintf(propname, sizeof(propname), "%s",
4017 gpio_suffixes[i]);
4018
4019 ret = of_gpio_named_count(dev->of_node, propname);
4020 if (ret > 0)
4021 break;
4022 }
4023 return ret ? ret : -ENOENT;
4024}
4025
4026static int platform_gpio_count(struct device *dev, const char *con_id) 4295static int platform_gpio_count(struct device *dev, const char *con_id)
4027{ 4296{
4028 struct gpiod_lookup_table *table; 4297 struct gpiod_lookup_table *table;
@@ -4055,7 +4324,7 @@ int gpiod_count(struct device *dev, const char *con_id)
4055 int count = -ENOENT; 4324 int count = -ENOENT;
4056 4325
4057 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) 4326 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
4058 count = dt_gpio_count(dev, con_id); 4327 count = of_gpio_get_count(dev, con_id);
4059 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) 4328 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4060 count = acpi_gpio_count(dev, con_id); 4329 count = acpi_gpio_count(dev, con_id);
4061 4330
@@ -4117,7 +4386,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_optional);
4117int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, 4386int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
4118 unsigned long lflags, enum gpiod_flags dflags) 4387 unsigned long lflags, enum gpiod_flags dflags)
4119{ 4388{
4120 int status; 4389 int ret;
4121 4390
4122 if (lflags & GPIO_ACTIVE_LOW) 4391 if (lflags & GPIO_ACTIVE_LOW)
4123 set_bit(FLAG_ACTIVE_LOW, &desc->flags); 4392 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
@@ -4150,9 +4419,9 @@ int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
4150 else if (lflags & GPIO_PULL_DOWN) 4419 else if (lflags & GPIO_PULL_DOWN)
4151 set_bit(FLAG_PULL_DOWN, &desc->flags); 4420 set_bit(FLAG_PULL_DOWN, &desc->flags);
4152 4421
4153 status = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); 4422 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4154 if (status < 0) 4423 if (ret < 0)
4155 return status; 4424 return ret;
4156 4425
4157 /* No particular flag request, return here... */ 4426 /* No particular flag request, return here... */
4158 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { 4427 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
@@ -4162,12 +4431,12 @@ int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
4162 4431
4163 /* Process flags */ 4432 /* Process flags */
4164 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) 4433 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
4165 status = gpiod_direction_output(desc, 4434 ret = gpiod_direction_output(desc,
4166 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); 4435 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
4167 else 4436 else
4168 status = gpiod_direction_input(desc); 4437 ret = gpiod_direction_input(desc);
4169 4438
4170 return status; 4439 return ret;
4171} 4440}
4172 4441
4173/** 4442/**
@@ -4191,7 +4460,7 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
4191{ 4460{
4192 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; 4461 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
4193 struct gpio_desc *desc = NULL; 4462 struct gpio_desc *desc = NULL;
4194 int status; 4463 int ret;
4195 /* Maybe we have a device name, maybe not */ 4464 /* Maybe we have a device name, maybe not */
4196 const char *devname = dev ? dev_name(dev) : "?"; 4465 const char *devname = dev ? dev_name(dev) : "?";
4197 4466
@@ -4226,9 +4495,9 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
4226 * If a connection label was passed use that, else attempt to use 4495 * If a connection label was passed use that, else attempt to use
4227 * the device name as label 4496 * the device name as label
4228 */ 4497 */
4229 status = gpiod_request(desc, con_id ? con_id : devname); 4498 ret = gpiod_request(desc, con_id ? con_id : devname);
4230 if (status < 0) { 4499 if (ret < 0) {
4231 if (status == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { 4500 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
4232 /* 4501 /*
4233 * This happens when there are several consumers for 4502 * This happens when there are several consumers for
4234 * the same GPIO line: we just return here without 4503 * the same GPIO line: we just return here without
@@ -4241,89 +4510,20 @@ struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
4241 con_id ? con_id : devname); 4510 con_id ? con_id : devname);
4242 return desc; 4511 return desc;
4243 } else { 4512 } else {
4244 return ERR_PTR(status); 4513 return ERR_PTR(ret);
4245 } 4514 }
4246 } 4515 }
4247 4516
4248 status = gpiod_configure_flags(desc, con_id, lookupflags, flags); 4517 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
4249 if (status < 0) {
4250 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
4251 gpiod_put(desc);
4252 return ERR_PTR(status);
4253 }
4254
4255 return desc;
4256}
4257EXPORT_SYMBOL_GPL(gpiod_get_index);
4258
4259/**
4260 * gpiod_get_from_of_node() - obtain a GPIO from an OF node
4261 * @node: handle of the OF node
4262 * @propname: name of the DT property representing the GPIO
4263 * @index: index of the GPIO to obtain for the consumer
4264 * @dflags: GPIO initialization flags
4265 * @label: label to attach to the requested GPIO
4266 *
4267 * Returns:
4268 * On successful request the GPIO pin is configured in accordance with
4269 * provided @dflags.
4270 *
4271 * In case of error an ERR_PTR() is returned.
4272 */
4273struct gpio_desc *gpiod_get_from_of_node(struct device_node *node,
4274 const char *propname, int index,
4275 enum gpiod_flags dflags,
4276 const char *label)
4277{
4278 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
4279 struct gpio_desc *desc;
4280 enum of_gpio_flags flags;
4281 bool active_low = false;
4282 bool single_ended = false;
4283 bool open_drain = false;
4284 bool transitory = false;
4285 int ret;
4286
4287 desc = of_get_named_gpiod_flags(node, propname,
4288 index, &flags);
4289
4290 if (!desc || IS_ERR(desc)) {
4291 return desc;
4292 }
4293
4294 active_low = flags & OF_GPIO_ACTIVE_LOW;
4295 single_ended = flags & OF_GPIO_SINGLE_ENDED;
4296 open_drain = flags & OF_GPIO_OPEN_DRAIN;
4297 transitory = flags & OF_GPIO_TRANSITORY;
4298
4299 ret = gpiod_request(desc, label);
4300 if (ret == -EBUSY && (flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
4301 return desc;
4302 if (ret)
4303 return ERR_PTR(ret);
4304
4305 if (active_low)
4306 lflags |= GPIO_ACTIVE_LOW;
4307
4308 if (single_ended) {
4309 if (open_drain)
4310 lflags |= GPIO_OPEN_DRAIN;
4311 else
4312 lflags |= GPIO_OPEN_SOURCE;
4313 }
4314
4315 if (transitory)
4316 lflags |= GPIO_TRANSITORY;
4317
4318 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4319 if (ret < 0) { 4518 if (ret < 0) {
4519 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
4320 gpiod_put(desc); 4520 gpiod_put(desc);
4321 return ERR_PTR(ret); 4521 return ERR_PTR(ret);
4322 } 4522 }
4323 4523
4324 return desc; 4524 return desc;
4325} 4525}
4326EXPORT_SYMBOL(gpiod_get_from_of_node); 4526EXPORT_SYMBOL_GPL(gpiod_get_index);
4327 4527
4328/** 4528/**
4329 * fwnode_get_named_gpiod - obtain a GPIO from firmware node 4529 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
@@ -4433,7 +4633,7 @@ int gpiod_hog(struct gpio_desc *desc, const char *name,
4433 struct gpio_chip *chip; 4633 struct gpio_chip *chip;
4434 struct gpio_desc *local_desc; 4634 struct gpio_desc *local_desc;
4435 int hwnum; 4635 int hwnum;
4436 int status; 4636 int ret;
4437 4637
4438 chip = gpiod_to_chip(desc); 4638 chip = gpiod_to_chip(desc);
4439 hwnum = gpio_chip_hwgpio(desc); 4639 hwnum = gpio_chip_hwgpio(desc);
@@ -4441,10 +4641,10 @@ int gpiod_hog(struct gpio_desc *desc, const char *name,
4441 local_desc = gpiochip_request_own_desc(chip, hwnum, name, 4641 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
4442 lflags, dflags); 4642 lflags, dflags);
4443 if (IS_ERR(local_desc)) { 4643 if (IS_ERR(local_desc)) {
4444 status = PTR_ERR(local_desc); 4644 ret = PTR_ERR(local_desc);
4445 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", 4645 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
4446 name, chip->label, hwnum, status); 4646 name, chip->label, hwnum, ret);
4447 return status; 4647 return ret;
4448 } 4648 }
4449 4649
4450 /* Mark GPIO as hogged so it can be identified and removed later */ 4650 /* Mark GPIO as hogged so it can be identified and removed later */
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index 7c52c2442173..b8b10a409c7b 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -16,9 +16,6 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/cdev.h> 17#include <linux/cdev.h>
18 18
19enum of_gpio_flags;
20struct acpi_device;
21
22/** 19/**
23 * struct gpio_device - internal state container for GPIO devices 20 * struct gpio_device - internal state container for GPIO devices
24 * @id: numerical ID number for the GPIO chip 21 * @id: numerical ID number for the GPIO chip
@@ -69,126 +66,9 @@ struct gpio_device {
69#endif 66#endif
70}; 67};
71 68
72/**
73 * struct acpi_gpio_info - ACPI GPIO specific information
74 * @adev: reference to ACPI device which consumes GPIO resource
75 * @flags: GPIO initialization flags
76 * @gpioint: if %true this GPIO is of type GpioInt otherwise type is GpioIo
77 * @pin_config: pin bias as provided by ACPI
78 * @polarity: interrupt polarity as provided by ACPI
79 * @triggering: triggering type as provided by ACPI
80 * @quirks: Linux specific quirks as provided by struct acpi_gpio_mapping
81 */
82struct acpi_gpio_info {
83 struct acpi_device *adev;
84 enum gpiod_flags flags;
85 bool gpioint;
86 int pin_config;
87 int polarity;
88 int triggering;
89 unsigned int quirks;
90};
91
92/* gpio suffixes used for ACPI and device tree lookup */ 69/* gpio suffixes used for ACPI and device tree lookup */
93static __maybe_unused const char * const gpio_suffixes[] = { "gpios", "gpio" }; 70static __maybe_unused const char * const gpio_suffixes[] = { "gpios", "gpio" };
94 71
95#ifdef CONFIG_OF_GPIO
96struct gpio_desc *of_find_gpio(struct device *dev,
97 const char *con_id,
98 unsigned int idx,
99 unsigned long *lookupflags);
100struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
101 const char *list_name, int index, enum of_gpio_flags *flags);
102int of_gpiochip_add(struct gpio_chip *gc);
103void of_gpiochip_remove(struct gpio_chip *gc);
104#else
105static inline struct gpio_desc *of_find_gpio(struct device *dev,
106 const char *con_id,
107 unsigned int idx,
108 unsigned long *lookupflags)
109{
110 return ERR_PTR(-ENOENT);
111}
112static inline struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
113 const char *list_name, int index, enum of_gpio_flags *flags)
114{
115 return ERR_PTR(-ENOENT);
116}
117static inline int of_gpiochip_add(struct gpio_chip *gc) { return 0; }
118static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
119#endif /* CONFIG_OF_GPIO */
120
121#ifdef CONFIG_ACPI
122void acpi_gpiochip_add(struct gpio_chip *chip);
123void acpi_gpiochip_remove(struct gpio_chip *chip);
124
125void acpi_gpiochip_request_interrupts(struct gpio_chip *chip);
126void acpi_gpiochip_free_interrupts(struct gpio_chip *chip);
127
128int acpi_gpio_update_gpiod_flags(enum gpiod_flags *flags,
129 struct acpi_gpio_info *info);
130int acpi_gpio_update_gpiod_lookup_flags(unsigned long *lookupflags,
131 struct acpi_gpio_info *info);
132
133struct gpio_desc *acpi_find_gpio(struct device *dev,
134 const char *con_id,
135 unsigned int idx,
136 enum gpiod_flags *dflags,
137 unsigned long *lookupflags);
138struct gpio_desc *acpi_node_get_gpiod(struct fwnode_handle *fwnode,
139 const char *propname, int index,
140 struct acpi_gpio_info *info);
141
142int acpi_gpio_count(struct device *dev, const char *con_id);
143
144bool acpi_can_fallback_to_crs(struct acpi_device *adev, const char *con_id);
145#else
146static inline void acpi_gpiochip_add(struct gpio_chip *chip) { }
147static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { }
148
149static inline void
150acpi_gpiochip_request_interrupts(struct gpio_chip *chip) { }
151
152static inline void
153acpi_gpiochip_free_interrupts(struct gpio_chip *chip) { }
154
155static inline int
156acpi_gpio_update_gpiod_flags(enum gpiod_flags *flags, struct acpi_gpio_info *info)
157{
158 return 0;
159}
160static inline int
161acpi_gpio_update_gpiod_lookup_flags(unsigned long *lookupflags,
162 struct acpi_gpio_info *info)
163{
164 return 0;
165}
166
167static inline struct gpio_desc *
168acpi_find_gpio(struct device *dev, const char *con_id,
169 unsigned int idx, enum gpiod_flags *dflags,
170 unsigned long *lookupflags)
171{
172 return ERR_PTR(-ENOENT);
173}
174static inline struct gpio_desc *
175acpi_node_get_gpiod(struct fwnode_handle *fwnode, const char *propname,
176 int index, struct acpi_gpio_info *info)
177{
178 return ERR_PTR(-ENXIO);
179}
180static inline int acpi_gpio_count(struct device *dev, const char *con_id)
181{
182 return -ENODEV;
183}
184
185static inline bool acpi_can_fallback_to_crs(struct acpi_device *adev,
186 const char *con_id)
187{
188 return false;
189}
190#endif
191
192struct gpio_array { 72struct gpio_array {
193 struct gpio_desc **desc; 73 struct gpio_desc **desc;
194 unsigned int size; 74 unsigned int size;
diff --git a/drivers/gpio/sgpio-aspeed.c b/drivers/gpio/sgpio-aspeed.c
new file mode 100644
index 000000000000..7e99860ca447
--- /dev/null
+++ b/drivers/gpio/sgpio-aspeed.c
@@ -0,0 +1,533 @@
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2019 American Megatrends International LLC.
4 *
5 * Author: Karthikeyan Mani <karthikeyanm@amiindia.co.in>
6 */
7
8#include <linux/bitfield.h>
9#include <linux/clk.h>
10#include <linux/gpio/driver.h>
11#include <linux/hashtable.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/spinlock.h>
18#include <linux/string.h>
19
20#define MAX_NR_SGPIO 80
21
22#define ASPEED_SGPIO_CTRL 0x54
23
24#define ASPEED_SGPIO_PINS_MASK GENMASK(9, 6)
25#define ASPEED_SGPIO_CLK_DIV_MASK GENMASK(31, 16)
26#define ASPEED_SGPIO_ENABLE BIT(0)
27
28struct aspeed_sgpio {
29 struct gpio_chip chip;
30 struct clk *pclk;
31 spinlock_t lock;
32 void __iomem *base;
33 uint32_t dir_in[3];
34 int irq;
35};
36
37struct aspeed_sgpio_bank {
38 uint16_t val_regs;
39 uint16_t rdata_reg;
40 uint16_t irq_regs;
41 const char names[4][3];
42};
43
44/*
45 * Note: The "value" register returns the input value when the GPIO is
46 * configured as an input.
47 *
48 * The "rdata" register returns the output value when the GPIO is
49 * configured as an output.
50 */
51static const struct aspeed_sgpio_bank aspeed_sgpio_banks[] = {
52 {
53 .val_regs = 0x0000,
54 .rdata_reg = 0x0070,
55 .irq_regs = 0x0004,
56 .names = { "A", "B", "C", "D" },
57 },
58 {
59 .val_regs = 0x001C,
60 .rdata_reg = 0x0074,
61 .irq_regs = 0x0020,
62 .names = { "E", "F", "G", "H" },
63 },
64 {
65 .val_regs = 0x0038,
66 .rdata_reg = 0x0078,
67 .irq_regs = 0x003C,
68 .names = { "I", "J" },
69 },
70};
71
72enum aspeed_sgpio_reg {
73 reg_val,
74 reg_rdata,
75 reg_irq_enable,
76 reg_irq_type0,
77 reg_irq_type1,
78 reg_irq_type2,
79 reg_irq_status,
80};
81
82#define GPIO_VAL_VALUE 0x00
83#define GPIO_IRQ_ENABLE 0x00
84#define GPIO_IRQ_TYPE0 0x04
85#define GPIO_IRQ_TYPE1 0x08
86#define GPIO_IRQ_TYPE2 0x0C
87#define GPIO_IRQ_STATUS 0x10
88
89static void __iomem *bank_reg(struct aspeed_sgpio *gpio,
90 const struct aspeed_sgpio_bank *bank,
91 const enum aspeed_sgpio_reg reg)
92{
93 switch (reg) {
94 case reg_val:
95 return gpio->base + bank->val_regs + GPIO_VAL_VALUE;
96 case reg_rdata:
97 return gpio->base + bank->rdata_reg;
98 case reg_irq_enable:
99 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE;
100 case reg_irq_type0:
101 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0;
102 case reg_irq_type1:
103 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1;
104 case reg_irq_type2:
105 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2;
106 case reg_irq_status:
107 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS;
108 default:
109 /* acturally if code runs to here, it's an error case */
110 BUG_ON(1);
111 }
112}
113
114#define GPIO_BANK(x) ((x) >> 5)
115#define GPIO_OFFSET(x) ((x) & 0x1f)
116#define GPIO_BIT(x) BIT(GPIO_OFFSET(x))
117
118static const struct aspeed_sgpio_bank *to_bank(unsigned int offset)
119{
120 unsigned int bank = GPIO_BANK(offset);
121
122 WARN_ON(bank >= ARRAY_SIZE(aspeed_sgpio_banks));
123 return &aspeed_sgpio_banks[bank];
124}
125
126static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset)
127{
128 struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
129 const struct aspeed_sgpio_bank *bank = to_bank(offset);
130 unsigned long flags;
131 enum aspeed_sgpio_reg reg;
132 bool is_input;
133 int rc = 0;
134
135 spin_lock_irqsave(&gpio->lock, flags);
136
137 is_input = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
138 reg = is_input ? reg_val : reg_rdata;
139 rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
140
141 spin_unlock_irqrestore(&gpio->lock, flags);
142
143 return rc;
144}
145
146static void sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
147{
148 struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
149 const struct aspeed_sgpio_bank *bank = to_bank(offset);
150 void __iomem *addr;
151 u32 reg = 0;
152
153 addr = bank_reg(gpio, bank, reg_val);
154 reg = ioread32(addr);
155
156 if (val)
157 reg |= GPIO_BIT(offset);
158 else
159 reg &= ~GPIO_BIT(offset);
160
161 iowrite32(reg, addr);
162}
163
164static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
165{
166 struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
167 unsigned long flags;
168
169 spin_lock_irqsave(&gpio->lock, flags);
170
171 sgpio_set_value(gc, offset, val);
172
173 spin_unlock_irqrestore(&gpio->lock, flags);
174}
175
176static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
177{
178 struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
179 unsigned long flags;
180
181 spin_lock_irqsave(&gpio->lock, flags);
182 gpio->dir_in[GPIO_BANK(offset)] |= GPIO_BIT(offset);
183 spin_unlock_irqrestore(&gpio->lock, flags);
184
185 return 0;
186}
187
188static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val)
189{
190 struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
191 unsigned long flags;
192
193 spin_lock_irqsave(&gpio->lock, flags);
194
195 gpio->dir_in[GPIO_BANK(offset)] &= ~GPIO_BIT(offset);
196 sgpio_set_value(gc, offset, val);
197
198 spin_unlock_irqrestore(&gpio->lock, flags);
199
200 return 0;
201}
202
203static int aspeed_sgpio_get_direction(struct gpio_chip *gc, unsigned int offset)
204{
205 int dir_status;
206 struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
207 unsigned long flags;
208
209 spin_lock_irqsave(&gpio->lock, flags);
210 dir_status = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
211 spin_unlock_irqrestore(&gpio->lock, flags);
212
213 return dir_status;
214
215}
216
217static void irqd_to_aspeed_sgpio_data(struct irq_data *d,
218 struct aspeed_sgpio **gpio,
219 const struct aspeed_sgpio_bank **bank,
220 u32 *bit, int *offset)
221{
222 struct aspeed_sgpio *internal;
223
224 *offset = irqd_to_hwirq(d);
225 internal = irq_data_get_irq_chip_data(d);
226 WARN_ON(!internal);
227
228 *gpio = internal;
229 *bank = to_bank(*offset);
230 *bit = GPIO_BIT(*offset);
231}
232
233static void aspeed_sgpio_irq_ack(struct irq_data *d)
234{
235 const struct aspeed_sgpio_bank *bank;
236 struct aspeed_sgpio *gpio;
237 unsigned long flags;
238 void __iomem *status_addr;
239 int offset;
240 u32 bit;
241
242 irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
243
244 status_addr = bank_reg(gpio, bank, reg_irq_status);
245
246 spin_lock_irqsave(&gpio->lock, flags);
247
248 iowrite32(bit, status_addr);
249
250 spin_unlock_irqrestore(&gpio->lock, flags);
251}
252
253static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set)
254{
255 const struct aspeed_sgpio_bank *bank;
256 struct aspeed_sgpio *gpio;
257 unsigned long flags;
258 u32 reg, bit;
259 void __iomem *addr;
260 int offset;
261
262 irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
263 addr = bank_reg(gpio, bank, reg_irq_enable);
264
265 spin_lock_irqsave(&gpio->lock, flags);
266
267 reg = ioread32(addr);
268 if (set)
269 reg |= bit;
270 else
271 reg &= ~bit;
272
273 iowrite32(reg, addr);
274
275 spin_unlock_irqrestore(&gpio->lock, flags);
276}
277
278static void aspeed_sgpio_irq_mask(struct irq_data *d)
279{
280 aspeed_sgpio_irq_set_mask(d, false);
281}
282
283static void aspeed_sgpio_irq_unmask(struct irq_data *d)
284{
285 aspeed_sgpio_irq_set_mask(d, true);
286}
287
288static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type)
289{
290 u32 type0 = 0;
291 u32 type1 = 0;
292 u32 type2 = 0;
293 u32 bit, reg;
294 const struct aspeed_sgpio_bank *bank;
295 irq_flow_handler_t handler;
296 struct aspeed_sgpio *gpio;
297 unsigned long flags;
298 void __iomem *addr;
299 int offset;
300
301 irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
302
303 switch (type & IRQ_TYPE_SENSE_MASK) {
304 case IRQ_TYPE_EDGE_BOTH:
305 type2 |= bit;
306 /* fall through */
307 case IRQ_TYPE_EDGE_RISING:
308 type0 |= bit;
309 /* fall through */
310 case IRQ_TYPE_EDGE_FALLING:
311 handler = handle_edge_irq;
312 break;
313 case IRQ_TYPE_LEVEL_HIGH:
314 type0 |= bit;
315 /* fall through */
316 case IRQ_TYPE_LEVEL_LOW:
317 type1 |= bit;
318 handler = handle_level_irq;
319 break;
320 default:
321 return -EINVAL;
322 }
323
324 spin_lock_irqsave(&gpio->lock, flags);
325
326 addr = bank_reg(gpio, bank, reg_irq_type0);
327 reg = ioread32(addr);
328 reg = (reg & ~bit) | type0;
329 iowrite32(reg, addr);
330
331 addr = bank_reg(gpio, bank, reg_irq_type1);
332 reg = ioread32(addr);
333 reg = (reg & ~bit) | type1;
334 iowrite32(reg, addr);
335
336 addr = bank_reg(gpio, bank, reg_irq_type2);
337 reg = ioread32(addr);
338 reg = (reg & ~bit) | type2;
339 iowrite32(reg, addr);
340
341 spin_unlock_irqrestore(&gpio->lock, flags);
342
343 irq_set_handler_locked(d, handler);
344
345 return 0;
346}
347
348static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
349{
350 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
351 struct irq_chip *ic = irq_desc_get_chip(desc);
352 struct aspeed_sgpio *data = gpiochip_get_data(gc);
353 unsigned int i, p, girq;
354 unsigned long reg;
355
356 chained_irq_enter(ic, desc);
357
358 for (i = 0; i < ARRAY_SIZE(aspeed_sgpio_banks); i++) {
359 const struct aspeed_sgpio_bank *bank = &aspeed_sgpio_banks[i];
360
361 reg = ioread32(bank_reg(data, bank, reg_irq_status));
362
363 for_each_set_bit(p, &reg, 32) {
364 girq = irq_find_mapping(gc->irq.domain, i * 32 + p);
365 generic_handle_irq(girq);
366 }
367
368 }
369
370 chained_irq_exit(ic, desc);
371}
372
373static struct irq_chip aspeed_sgpio_irqchip = {
374 .name = "aspeed-sgpio",
375 .irq_ack = aspeed_sgpio_irq_ack,
376 .irq_mask = aspeed_sgpio_irq_mask,
377 .irq_unmask = aspeed_sgpio_irq_unmask,
378 .irq_set_type = aspeed_sgpio_set_type,
379};
380
381static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio,
382 struct platform_device *pdev)
383{
384 int rc, i;
385 const struct aspeed_sgpio_bank *bank;
386 struct gpio_irq_chip *irq;
387
388 rc = platform_get_irq(pdev, 0);
389 if (rc < 0)
390 return rc;
391
392 gpio->irq = rc;
393
394 /* Disable IRQ and clear Interrupt status registers for all SPGIO Pins. */
395 for (i = 0; i < ARRAY_SIZE(aspeed_sgpio_banks); i++) {
396 bank = &aspeed_sgpio_banks[i];
397 /* disable irq enable bits */
398 iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_enable));
399 /* clear status bits */
400 iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_status));
401 }
402
403 irq = &gpio->chip.irq;
404 irq->chip = &aspeed_sgpio_irqchip;
405 irq->handler = handle_bad_irq;
406 irq->default_type = IRQ_TYPE_NONE;
407 irq->parent_handler = aspeed_sgpio_irq_handler;
408 irq->parent_handler_data = gpio;
409 irq->parents = &gpio->irq;
410 irq->num_parents = 1;
411
412 /* set IRQ settings and Enable Interrupt */
413 for (i = 0; i < ARRAY_SIZE(aspeed_sgpio_banks); i++) {
414 bank = &aspeed_sgpio_banks[i];
415 /* set falling or level-low irq */
416 iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type0));
417 /* trigger type is edge */
418 iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type1));
419 /* dual edge trigger mode. */
420 iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_type2));
421 /* enable irq */
422 iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_enable));
423 }
424
425 return 0;
426}
427
428static const struct of_device_id aspeed_sgpio_of_table[] = {
429 { .compatible = "aspeed,ast2400-sgpio" },
430 { .compatible = "aspeed,ast2500-sgpio" },
431 {}
432};
433
434MODULE_DEVICE_TABLE(of, aspeed_sgpio_of_table);
435
436static int __init aspeed_sgpio_probe(struct platform_device *pdev)
437{
438 struct aspeed_sgpio *gpio;
439 u32 nr_gpios, sgpio_freq, sgpio_clk_div;
440 int rc;
441 unsigned long apb_freq;
442
443 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
444 if (!gpio)
445 return -ENOMEM;
446
447 gpio->base = devm_platform_ioremap_resource(pdev, 0);
448 if (IS_ERR(gpio->base))
449 return PTR_ERR(gpio->base);
450
451 rc = of_property_read_u32(pdev->dev.of_node, "ngpios", &nr_gpios);
452 if (rc < 0) {
453 dev_err(&pdev->dev, "Could not read ngpios property\n");
454 return -EINVAL;
455 } else if (nr_gpios > MAX_NR_SGPIO) {
456 dev_err(&pdev->dev, "Number of GPIOs exceeds the maximum of %d: %d\n",
457 MAX_NR_SGPIO, nr_gpios);
458 return -EINVAL;
459 }
460
461 rc = of_property_read_u32(pdev->dev.of_node, "bus-frequency", &sgpio_freq);
462 if (rc < 0) {
463 dev_err(&pdev->dev, "Could not read bus-frequency property\n");
464 return -EINVAL;
465 }
466
467 gpio->pclk = devm_clk_get(&pdev->dev, NULL);
468 if (IS_ERR(gpio->pclk)) {
469 dev_err(&pdev->dev, "devm_clk_get failed\n");
470 return PTR_ERR(gpio->pclk);
471 }
472
473 apb_freq = clk_get_rate(gpio->pclk);
474
475 /*
476 * From the datasheet,
477 * SGPIO period = 1/PCLK * 2 * (GPIO254[31:16] + 1)
478 * period = 2 * (GPIO254[31:16] + 1) / PCLK
479 * frequency = 1 / (2 * (GPIO254[31:16] + 1) / PCLK)
480 * frequency = PCLK / (2 * (GPIO254[31:16] + 1))
481 * frequency * 2 * (GPIO254[31:16] + 1) = PCLK
482 * GPIO254[31:16] = PCLK / (frequency * 2) - 1
483 */
484 if (sgpio_freq == 0)
485 return -EINVAL;
486
487 sgpio_clk_div = (apb_freq / (sgpio_freq * 2)) - 1;
488
489 if (sgpio_clk_div > (1 << 16) - 1)
490 return -EINVAL;
491
492 iowrite32(FIELD_PREP(ASPEED_SGPIO_CLK_DIV_MASK, sgpio_clk_div) |
493 FIELD_PREP(ASPEED_SGPIO_PINS_MASK, (nr_gpios / 8)) |
494 ASPEED_SGPIO_ENABLE,
495 gpio->base + ASPEED_SGPIO_CTRL);
496
497 spin_lock_init(&gpio->lock);
498
499 gpio->chip.parent = &pdev->dev;
500 gpio->chip.ngpio = nr_gpios;
501 gpio->chip.direction_input = aspeed_sgpio_dir_in;
502 gpio->chip.direction_output = aspeed_sgpio_dir_out;
503 gpio->chip.get_direction = aspeed_sgpio_get_direction;
504 gpio->chip.request = NULL;
505 gpio->chip.free = NULL;
506 gpio->chip.get = aspeed_sgpio_get;
507 gpio->chip.set = aspeed_sgpio_set;
508 gpio->chip.set_config = NULL;
509 gpio->chip.label = dev_name(&pdev->dev);
510 gpio->chip.base = -1;
511
512 /* set all SGPIO pins as input (1). */
513 memset(gpio->dir_in, 0xff, sizeof(gpio->dir_in));
514
515 aspeed_sgpio_setup_irqs(gpio, pdev);
516
517 rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
518 if (rc < 0)
519 return rc;
520
521 return 0;
522}
523
524static struct platform_driver aspeed_sgpio_driver = {
525 .driver = {
526 .name = KBUILD_MODNAME,
527 .of_match_table = aspeed_sgpio_of_table,
528 },
529};
530
531module_platform_driver_probe(aspeed_sgpio_driver, aspeed_sgpio_probe);
532MODULE_DESCRIPTION("Aspeed Serial GPIO Driver");
533MODULE_LICENSE("GPL");
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
index d3332da35637..dd5aa9a2dfe5 100644
--- a/drivers/pinctrl/pinctrl-stmfx.c
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -585,12 +585,24 @@ static int stmfx_pinctrl_gpio_function_enable(struct stmfx_pinctrl *pctl)
585 return stmfx_function_enable(pctl->stmfx, func); 585 return stmfx_function_enable(pctl->stmfx, func);
586} 586}
587 587
588static int stmfx_pinctrl_gpio_init_valid_mask(struct gpio_chip *gc,
589 unsigned long *valid_mask,
590 unsigned int ngpios)
591{
592 struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
593 u32 n;
594
595 for_each_clear_bit(n, &pctl->gpio_valid_mask, ngpios)
596 clear_bit(n, valid_mask);
597
598 return 0;
599}
600
588static int stmfx_pinctrl_probe(struct platform_device *pdev) 601static int stmfx_pinctrl_probe(struct platform_device *pdev)
589{ 602{
590 struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent); 603 struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent);
591 struct device_node *np = pdev->dev.of_node; 604 struct device_node *np = pdev->dev.of_node;
592 struct stmfx_pinctrl *pctl; 605 struct stmfx_pinctrl *pctl;
593 u32 n;
594 int irq, ret; 606 int irq, ret;
595 607
596 pctl = devm_kzalloc(stmfx->dev, sizeof(*pctl), GFP_KERNEL); 608 pctl = devm_kzalloc(stmfx->dev, sizeof(*pctl), GFP_KERNEL);
@@ -650,7 +662,7 @@ static int stmfx_pinctrl_probe(struct platform_device *pdev)
650 pctl->gpio_chip.ngpio = pctl->pctl_desc.npins; 662 pctl->gpio_chip.ngpio = pctl->pctl_desc.npins;
651 pctl->gpio_chip.can_sleep = true; 663 pctl->gpio_chip.can_sleep = true;
652 pctl->gpio_chip.of_node = np; 664 pctl->gpio_chip.of_node = np;
653 pctl->gpio_chip.need_valid_mask = true; 665 pctl->gpio_chip.init_valid_mask = stmfx_pinctrl_gpio_init_valid_mask;
654 666
655 ret = devm_gpiochip_add_data(pctl->dev, &pctl->gpio_chip, pctl); 667 ret = devm_gpiochip_add_data(pctl->dev, &pctl->gpio_chip, pctl);
656 if (ret) { 668 if (ret) {
@@ -668,8 +680,6 @@ static int stmfx_pinctrl_probe(struct platform_device *pdev)
668 pctl->irq_chip.irq_set_type = stmfx_pinctrl_irq_set_type; 680 pctl->irq_chip.irq_set_type = stmfx_pinctrl_irq_set_type;
669 pctl->irq_chip.irq_bus_lock = stmfx_pinctrl_irq_bus_lock; 681 pctl->irq_chip.irq_bus_lock = stmfx_pinctrl_irq_bus_lock;
670 pctl->irq_chip.irq_bus_sync_unlock = stmfx_pinctrl_irq_bus_sync_unlock; 682 pctl->irq_chip.irq_bus_sync_unlock = stmfx_pinctrl_irq_bus_sync_unlock;
671 for_each_clear_bit(n, &pctl->gpio_valid_mask, pctl->gpio_chip.ngpio)
672 clear_bit(n, pctl->gpio_chip.valid_mask);
673 683
674 ret = gpiochip_irqchip_add_nested(&pctl->gpio_chip, &pctl->irq_chip, 684 ret = gpiochip_irqchip_add_nested(&pctl->gpio_chip, &pctl->irq_chip,
675 0, handle_bad_irq, IRQ_TYPE_NONE); 685 0, handle_bad_irq, IRQ_TYPE_NONE);
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 8e14a5f2e970..fa2c87821401 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -138,6 +138,7 @@ config PINCTRL_QCOM_SPMI_PMIC
138 select PINMUX 138 select PINMUX
139 select PINCONF 139 select PINCONF
140 select GENERIC_PINCONF 140 select GENERIC_PINCONF
141 select GPIOLIB_IRQCHIP
141 select IRQ_DOMAIN_HIERARCHY 142 select IRQ_DOMAIN_HIERARCHY
142 help 143 help
143 This is the pinctrl, pinmux, pinconf and gpiolib driver for the 144 This is the pinctrl, pinmux, pinconf and gpiolib driver for the
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 7f35c196bb3e..b8a1c43222f8 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -593,24 +593,25 @@ static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
593#define msm_gpio_dbg_show NULL 593#define msm_gpio_dbg_show NULL
594#endif 594#endif
595 595
596static int msm_gpio_init_valid_mask(struct gpio_chip *chip) 596static int msm_gpio_init_valid_mask(struct gpio_chip *gc,
597 unsigned long *valid_mask,
598 unsigned int ngpios)
597{ 599{
598 struct msm_pinctrl *pctrl = gpiochip_get_data(chip); 600 struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
599 int ret; 601 int ret;
600 unsigned int len, i; 602 unsigned int len, i;
601 unsigned int max_gpios = pctrl->soc->ngpios;
602 const int *reserved = pctrl->soc->reserved_gpios; 603 const int *reserved = pctrl->soc->reserved_gpios;
603 u16 *tmp; 604 u16 *tmp;
604 605
605 /* Driver provided reserved list overrides DT and ACPI */ 606 /* Driver provided reserved list overrides DT and ACPI */
606 if (reserved) { 607 if (reserved) {
607 bitmap_fill(chip->valid_mask, max_gpios); 608 bitmap_fill(valid_mask, ngpios);
608 for (i = 0; reserved[i] >= 0; i++) { 609 for (i = 0; reserved[i] >= 0; i++) {
609 if (i >= max_gpios || reserved[i] >= max_gpios) { 610 if (i >= ngpios || reserved[i] >= ngpios) {
610 dev_err(pctrl->dev, "invalid list of reserved GPIOs\n"); 611 dev_err(pctrl->dev, "invalid list of reserved GPIOs\n");
611 return -EINVAL; 612 return -EINVAL;
612 } 613 }
613 clear_bit(reserved[i], chip->valid_mask); 614 clear_bit(reserved[i], valid_mask);
614 } 615 }
615 616
616 return 0; 617 return 0;
@@ -622,7 +623,7 @@ static int msm_gpio_init_valid_mask(struct gpio_chip *chip)
622 if (ret < 0) 623 if (ret < 0)
623 return 0; 624 return 0;
624 625
625 if (ret > max_gpios) 626 if (ret > ngpios)
626 return -EINVAL; 627 return -EINVAL;
627 628
628 tmp = kmalloc_array(len, sizeof(*tmp), GFP_KERNEL); 629 tmp = kmalloc_array(len, sizeof(*tmp), GFP_KERNEL);
@@ -635,9 +636,9 @@ static int msm_gpio_init_valid_mask(struct gpio_chip *chip)
635 goto out; 636 goto out;
636 } 637 }
637 638
638 bitmap_zero(chip->valid_mask, max_gpios); 639 bitmap_zero(valid_mask, ngpios);
639 for (i = 0; i < len; i++) 640 for (i = 0; i < len; i++)
640 set_bit(tmp[i], chip->valid_mask); 641 set_bit(tmp[i], valid_mask);
641 642
642out: 643out:
643 kfree(tmp); 644 kfree(tmp);
@@ -653,7 +654,6 @@ static const struct gpio_chip msm_gpio_template = {
653 .request = gpiochip_generic_request, 654 .request = gpiochip_generic_request,
654 .free = gpiochip_generic_free, 655 .free = gpiochip_generic_free,
655 .dbg_show = msm_gpio_dbg_show, 656 .dbg_show = msm_gpio_dbg_show,
656 .init_valid_mask = msm_gpio_init_valid_mask,
657}; 657};
658 658
659/* For dual-edge interrupts in software, since some hardware has no 659/* For dual-edge interrupts in software, since some hardware has no
@@ -1015,7 +1015,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
1015 chip->parent = pctrl->dev; 1015 chip->parent = pctrl->dev;
1016 chip->owner = THIS_MODULE; 1016 chip->owner = THIS_MODULE;
1017 chip->of_node = pctrl->dev->of_node; 1017 chip->of_node = pctrl->dev->of_node;
1018 chip->need_valid_mask = msm_gpio_needs_valid_mask(pctrl); 1018 if (msm_gpio_needs_valid_mask(pctrl))
1019 chip->init_valid_mask = msm_gpio_init_valid_mask;
1019 1020
1020 pctrl->irq_chip.name = "msmgpio"; 1021 pctrl->irq_chip.name = "msmgpio";
1021 pctrl->irq_chip.irq_enable = msm_gpio_irq_enable; 1022 pctrl->irq_chip.irq_enable = msm_gpio_irq_enable;
diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
index f39da87ea185..442db15e0729 100644
--- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
+++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
@@ -170,8 +170,6 @@ struct pmic_gpio_state {
170 struct regmap *map; 170 struct regmap *map;
171 struct pinctrl_dev *ctrl; 171 struct pinctrl_dev *ctrl;
172 struct gpio_chip chip; 172 struct gpio_chip chip;
173 struct fwnode_handle *fwnode;
174 struct irq_domain *domain;
175}; 173};
176 174
177static const struct pinconf_generic_params pmic_gpio_bindings[] = { 175static const struct pinconf_generic_params pmic_gpio_bindings[] = {
@@ -751,23 +749,6 @@ static int pmic_gpio_of_xlate(struct gpio_chip *chip,
751 return gpio_desc->args[0] - PMIC_GPIO_PHYSICAL_OFFSET; 749 return gpio_desc->args[0] - PMIC_GPIO_PHYSICAL_OFFSET;
752} 750}
753 751
754static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned pin)
755{
756 struct pmic_gpio_state *state = gpiochip_get_data(chip);
757 struct irq_fwspec fwspec;
758
759 fwspec.fwnode = state->fwnode;
760 fwspec.param_count = 2;
761 fwspec.param[0] = pin + PMIC_GPIO_PHYSICAL_OFFSET;
762 /*
763 * Set the type to a safe value temporarily. This will be overwritten
764 * later with the proper value by irq_set_type.
765 */
766 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
767
768 return irq_create_fwspec_mapping(&fwspec);
769}
770
771static void pmic_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 752static void pmic_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
772{ 753{
773 struct pmic_gpio_state *state = gpiochip_get_data(chip); 754 struct pmic_gpio_state *state = gpiochip_get_data(chip);
@@ -787,7 +768,6 @@ static const struct gpio_chip pmic_gpio_gpio_template = {
787 .request = gpiochip_generic_request, 768 .request = gpiochip_generic_request,
788 .free = gpiochip_generic_free, 769 .free = gpiochip_generic_free,
789 .of_xlate = pmic_gpio_of_xlate, 770 .of_xlate = pmic_gpio_of_xlate,
790 .to_irq = pmic_gpio_to_irq,
791 .dbg_show = pmic_gpio_dbg_show, 771 .dbg_show = pmic_gpio_dbg_show,
792}; 772};
793 773
@@ -964,46 +944,24 @@ static int pmic_gpio_domain_translate(struct irq_domain *domain,
964 return 0; 944 return 0;
965} 945}
966 946
967static int pmic_gpio_domain_alloc(struct irq_domain *domain, unsigned int virq, 947static unsigned int pmic_gpio_child_offset_to_irq(struct gpio_chip *chip,
968 unsigned int nr_irqs, void *data) 948 unsigned int offset)
969{ 949{
970 struct pmic_gpio_state *state = container_of(domain->host_data, 950 return offset + PMIC_GPIO_PHYSICAL_OFFSET;
971 struct pmic_gpio_state, 951}
972 chip);
973 struct irq_fwspec *fwspec = data;
974 struct irq_fwspec parent_fwspec;
975 irq_hw_number_t hwirq;
976 unsigned int type;
977 int ret, i;
978
979 ret = pmic_gpio_domain_translate(domain, fwspec, &hwirq, &type);
980 if (ret)
981 return ret;
982
983 for (i = 0; i < nr_irqs; i++)
984 irq_domain_set_info(domain, virq + i, hwirq + i,
985 &pmic_gpio_irq_chip, state,
986 handle_level_irq, NULL, NULL);
987 952
988 parent_fwspec.fwnode = domain->parent->fwnode; 953static int pmic_gpio_child_to_parent_hwirq(struct gpio_chip *chip,
989 parent_fwspec.param_count = 4; 954 unsigned int child_hwirq,
990 parent_fwspec.param[0] = 0; 955 unsigned int child_type,
991 parent_fwspec.param[1] = hwirq + 0xc0; 956 unsigned int *parent_hwirq,
992 parent_fwspec.param[2] = 0; 957 unsigned int *parent_type)
993 parent_fwspec.param[3] = fwspec->param[1]; 958{
959 *parent_hwirq = child_hwirq + 0xc0;
960 *parent_type = child_type;
994 961
995 return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, 962 return 0;
996 &parent_fwspec);
997} 963}
998 964
999static const struct irq_domain_ops pmic_gpio_domain_ops = {
1000 .activate = gpiochip_irq_domain_activate,
1001 .alloc = pmic_gpio_domain_alloc,
1002 .deactivate = gpiochip_irq_domain_deactivate,
1003 .free = irq_domain_free_irqs_common,
1004 .translate = pmic_gpio_domain_translate,
1005};
1006
1007static int pmic_gpio_probe(struct platform_device *pdev) 965static int pmic_gpio_probe(struct platform_device *pdev)
1008{ 966{
1009 struct irq_domain *parent_domain; 967 struct irq_domain *parent_domain;
@@ -1013,6 +971,7 @@ static int pmic_gpio_probe(struct platform_device *pdev)
1013 struct pinctrl_desc *pctrldesc; 971 struct pinctrl_desc *pctrldesc;
1014 struct pmic_gpio_pad *pad, *pads; 972 struct pmic_gpio_pad *pad, *pads;
1015 struct pmic_gpio_state *state; 973 struct pmic_gpio_state *state;
974 struct gpio_irq_chip *girq;
1016 int ret, npins, i; 975 int ret, npins, i;
1017 u32 reg; 976 u32 reg;
1018 977
@@ -1092,19 +1051,21 @@ static int pmic_gpio_probe(struct platform_device *pdev)
1092 if (!parent_domain) 1051 if (!parent_domain)
1093 return -ENXIO; 1052 return -ENXIO;
1094 1053
1095 state->fwnode = of_node_to_fwnode(state->dev->of_node); 1054 girq = &state->chip.irq;
1096 state->domain = irq_domain_create_hierarchy(parent_domain, 0, 1055 girq->chip = &pmic_gpio_irq_chip;
1097 state->chip.ngpio, 1056 girq->default_type = IRQ_TYPE_NONE;
1098 state->fwnode, 1057 girq->handler = handle_level_irq;
1099 &pmic_gpio_domain_ops, 1058 girq->fwnode = of_node_to_fwnode(state->dev->of_node);
1100 &state->chip); 1059 girq->parent_domain = parent_domain;
1101 if (!state->domain) 1060 girq->child_to_parent_hwirq = pmic_gpio_child_to_parent_hwirq;
1102 return -ENODEV; 1061 girq->populate_parent_fwspec = gpiochip_populate_parent_fwspec_fourcell;
1062 girq->child_offset_to_irq = pmic_gpio_child_offset_to_irq;
1063 girq->child_irq_domain_ops.translate = pmic_gpio_domain_translate;
1103 1064
1104 ret = gpiochip_add_data(&state->chip, state); 1065 ret = gpiochip_add_data(&state->chip, state);
1105 if (ret) { 1066 if (ret) {
1106 dev_err(state->dev, "can't add gpio chip\n"); 1067 dev_err(state->dev, "can't add gpio chip\n");
1107 goto err_chip_add_data; 1068 return ret;
1108 } 1069 }
1109 1070
1110 /* 1071 /*
@@ -1130,8 +1091,6 @@ static int pmic_gpio_probe(struct platform_device *pdev)
1130 1091
1131err_range: 1092err_range:
1132 gpiochip_remove(&state->chip); 1093 gpiochip_remove(&state->chip);
1133err_chip_add_data:
1134 irq_domain_remove(state->domain);
1135 return ret; 1094 return ret;
1136} 1095}
1137 1096
@@ -1140,7 +1099,6 @@ static int pmic_gpio_remove(struct platform_device *pdev)
1140 struct pmic_gpio_state *state = platform_get_drvdata(pdev); 1099 struct pmic_gpio_state *state = platform_get_drvdata(pdev);
1141 1100
1142 gpiochip_remove(&state->chip); 1101 gpiochip_remove(&state->chip);
1143 irq_domain_remove(state->domain);
1144 return 0; 1102 return 0;
1145} 1103}
1146 1104
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 9426b9aaed86..e40e1e27ed8e 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -994,62 +994,11 @@ void __acpi_handle_debug(struct _ddebug *descriptor, acpi_handle handle, const c
994#endif 994#endif
995#endif 995#endif
996 996
997struct acpi_gpio_params {
998 unsigned int crs_entry_index;
999 unsigned int line_index;
1000 bool active_low;
1001};
1002
1003struct acpi_gpio_mapping {
1004 const char *name;
1005 const struct acpi_gpio_params *data;
1006 unsigned int size;
1007
1008/* Ignore IoRestriction field */
1009#define ACPI_GPIO_QUIRK_NO_IO_RESTRICTION BIT(0)
1010/*
1011 * When ACPI GPIO mapping table is in use the index parameter inside it
1012 * refers to the GPIO resource in _CRS method. That index has no
1013 * distinction of actual type of the resource. When consumer wants to
1014 * get GpioIo type explicitly, this quirk may be used.
1015 */
1016#define ACPI_GPIO_QUIRK_ONLY_GPIOIO BIT(1)
1017
1018 unsigned int quirks;
1019};
1020
1021#if defined(CONFIG_ACPI) && defined(CONFIG_GPIOLIB) 997#if defined(CONFIG_ACPI) && defined(CONFIG_GPIOLIB)
1022int acpi_dev_add_driver_gpios(struct acpi_device *adev,
1023 const struct acpi_gpio_mapping *gpios);
1024
1025static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev)
1026{
1027 if (adev)
1028 adev->driver_gpios = NULL;
1029}
1030
1031int devm_acpi_dev_add_driver_gpios(struct device *dev,
1032 const struct acpi_gpio_mapping *gpios);
1033void devm_acpi_dev_remove_driver_gpios(struct device *dev);
1034
1035bool acpi_gpio_get_irq_resource(struct acpi_resource *ares, 998bool acpi_gpio_get_irq_resource(struct acpi_resource *ares,
1036 struct acpi_resource_gpio **agpio); 999 struct acpi_resource_gpio **agpio);
1037int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index); 1000int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index);
1038#else 1001#else
1039static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev,
1040 const struct acpi_gpio_mapping *gpios)
1041{
1042 return -ENXIO;
1043}
1044static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev) {}
1045
1046static inline int devm_acpi_dev_add_driver_gpios(struct device *dev,
1047 const struct acpi_gpio_mapping *gpios)
1048{
1049 return -ENXIO;
1050}
1051static inline void devm_acpi_dev_remove_driver_gpios(struct device *dev) {}
1052
1053static inline bool acpi_gpio_get_irq_resource(struct acpi_resource *ares, 1002static inline bool acpi_gpio_get_irq_resource(struct acpi_resource *ares,
1054 struct acpi_resource_gpio **agpio) 1003 struct acpi_resource_gpio **agpio)
1055{ 1004{
diff --git a/include/linux/gpio.h b/include/linux/gpio.h
index f757a58191a6..2157717c2136 100644
--- a/include/linux/gpio.h
+++ b/include/linux/gpio.h
@@ -221,19 +221,6 @@ static inline int gpio_to_irq(unsigned gpio)
221 return -EINVAL; 221 return -EINVAL;
222} 222}
223 223
224static inline int gpiochip_lock_as_irq(struct gpio_chip *chip,
225 unsigned int offset)
226{
227 WARN_ON(1);
228 return -EINVAL;
229}
230
231static inline void gpiochip_unlock_as_irq(struct gpio_chip *chip,
232 unsigned int offset)
233{
234 WARN_ON(1);
235}
236
237static inline int irq_to_gpio(unsigned irq) 224static inline int irq_to_gpio(unsigned irq)
238{ 225{
239 /* irq can never have been returned from gpio_to_irq() */ 226 /* irq can never have been returned from gpio_to_irq() */
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index a7f08fb0f865..b70af921c614 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -170,18 +170,8 @@ struct gpio_desc *gpio_to_desc(unsigned gpio);
170int desc_to_gpio(const struct gpio_desc *desc); 170int desc_to_gpio(const struct gpio_desc *desc);
171 171
172/* Child properties interface */ 172/* Child properties interface */
173struct device_node;
174struct fwnode_handle; 173struct fwnode_handle;
175 174
176struct gpio_desc *gpiod_get_from_of_node(struct device_node *node,
177 const char *propname, int index,
178 enum gpiod_flags dflags,
179 const char *label);
180struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev,
181 struct device_node *node,
182 const char *propname, int index,
183 enum gpiod_flags dflags,
184 const char *label);
185struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, 175struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
186 const char *propname, int index, 176 const char *propname, int index,
187 enum gpiod_flags dflags, 177 enum gpiod_flags dflags,
@@ -530,29 +520,9 @@ static inline int desc_to_gpio(const struct gpio_desc *desc)
530} 520}
531 521
532/* Child properties interface */ 522/* Child properties interface */
533struct device_node;
534struct fwnode_handle; 523struct fwnode_handle;
535 524
536static inline 525static inline
537struct gpio_desc *gpiod_get_from_of_node(struct device_node *node,
538 const char *propname, int index,
539 enum gpiod_flags dflags,
540 const char *label)
541{
542 return ERR_PTR(-ENOSYS);
543}
544
545static inline
546struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev,
547 struct device_node *node,
548 const char *propname, int index,
549 enum gpiod_flags dflags,
550 const char *label)
551{
552 return ERR_PTR(-ENOSYS);
553}
554
555static inline
556struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, 526struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
557 const char *propname, int index, 527 const char *propname, int index,
558 enum gpiod_flags dflags, 528 enum gpiod_flags dflags,
@@ -584,6 +554,111 @@ struct gpio_desc *devm_fwnode_get_gpiod_from_child(struct device *dev,
584 flags, label); 554 flags, label);
585} 555}
586 556
557#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_OF_GPIO)
558struct device_node;
559
560struct gpio_desc *gpiod_get_from_of_node(struct device_node *node,
561 const char *propname, int index,
562 enum gpiod_flags dflags,
563 const char *label);
564
565#else /* CONFIG_GPIOLIB && CONFIG_OF_GPIO */
566
567struct device_node;
568
569static inline
570struct gpio_desc *gpiod_get_from_of_node(struct device_node *node,
571 const char *propname, int index,
572 enum gpiod_flags dflags,
573 const char *label)
574{
575 return ERR_PTR(-ENOSYS);
576}
577
578#endif /* CONFIG_GPIOLIB && CONFIG_OF_GPIO */
579
580#ifdef CONFIG_GPIOLIB
581struct device_node;
582
583struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev,
584 struct device_node *node,
585 const char *propname, int index,
586 enum gpiod_flags dflags,
587 const char *label);
588
589#else /* CONFIG_GPIOLIB */
590
591struct device_node;
592
593static inline
594struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev,
595 struct device_node *node,
596 const char *propname, int index,
597 enum gpiod_flags dflags,
598 const char *label)
599{
600 return ERR_PTR(-ENOSYS);
601}
602
603#endif /* CONFIG_GPIOLIB */
604
605struct acpi_gpio_params {
606 unsigned int crs_entry_index;
607 unsigned int line_index;
608 bool active_low;
609};
610
611struct acpi_gpio_mapping {
612 const char *name;
613 const struct acpi_gpio_params *data;
614 unsigned int size;
615
616/* Ignore IoRestriction field */
617#define ACPI_GPIO_QUIRK_NO_IO_RESTRICTION BIT(0)
618/*
619 * When ACPI GPIO mapping table is in use the index parameter inside it
620 * refers to the GPIO resource in _CRS method. That index has no
621 * distinction of actual type of the resource. When consumer wants to
622 * get GpioIo type explicitly, this quirk may be used.
623 */
624#define ACPI_GPIO_QUIRK_ONLY_GPIOIO BIT(1)
625
626 unsigned int quirks;
627};
628
629#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI)
630
631struct acpi_device;
632
633int acpi_dev_add_driver_gpios(struct acpi_device *adev,
634 const struct acpi_gpio_mapping *gpios);
635void acpi_dev_remove_driver_gpios(struct acpi_device *adev);
636
637int devm_acpi_dev_add_driver_gpios(struct device *dev,
638 const struct acpi_gpio_mapping *gpios);
639void devm_acpi_dev_remove_driver_gpios(struct device *dev);
640
641#else /* CONFIG_GPIOLIB && CONFIG_ACPI */
642
643struct acpi_device;
644
645static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev,
646 const struct acpi_gpio_mapping *gpios)
647{
648 return -ENXIO;
649}
650static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev) {}
651
652static inline int devm_acpi_dev_add_driver_gpios(struct device *dev,
653 const struct acpi_gpio_mapping *gpios)
654{
655 return -ENXIO;
656}
657static inline void devm_acpi_dev_remove_driver_gpios(struct device *dev) {}
658
659#endif /* CONFIG_GPIOLIB && CONFIG_ACPI */
660
661
587#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) 662#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
588 663
589int gpiod_export(struct gpio_desc *desc, bool direction_may_change); 664int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 6a0e420915a3..c667ad0c099d 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -20,9 +20,8 @@ struct module;
20enum gpiod_flags; 20enum gpiod_flags;
21enum gpio_lookup_flags; 21enum gpio_lookup_flags;
22 22
23#ifdef CONFIG_GPIOLIB 23struct gpio_chip;
24 24
25#ifdef CONFIG_GPIOLIB_IRQCHIP
26/** 25/**
27 * struct gpio_irq_chip - GPIO interrupt controller 26 * struct gpio_irq_chip - GPIO interrupt controller
28 */ 27 */
@@ -49,6 +48,84 @@ struct gpio_irq_chip {
49 */ 48 */
50 const struct irq_domain_ops *domain_ops; 49 const struct irq_domain_ops *domain_ops;
51 50
51#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
52 /**
53 * @fwnode:
54 *
55 * Firmware node corresponding to this gpiochip/irqchip, necessary
56 * for hierarchical irqdomain support.
57 */
58 struct fwnode_handle *fwnode;
59
60 /**
61 * @parent_domain:
62 *
63 * If non-NULL, will be set as the parent of this GPIO interrupt
64 * controller's IRQ domain to establish a hierarchical interrupt
65 * domain. The presence of this will activate the hierarchical
66 * interrupt support.
67 */
68 struct irq_domain *parent_domain;
69
70 /**
71 * @child_to_parent_hwirq:
72 *
73 * This callback translates a child hardware IRQ offset to a parent
74 * hardware IRQ offset on a hierarchical interrupt chip. The child
75 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
76 * ngpio field of struct gpio_chip) and the corresponding parent
77 * hardware IRQ and type (such as IRQ_TYPE_*) shall be returned by
78 * the driver. The driver can calculate this from an offset or using
79 * a lookup table or whatever method is best for this chip. Return
80 * 0 on successful translation in the driver.
81 *
82 * If some ranges of hardware IRQs do not have a corresponding parent
83 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
84 * @need_valid_mask to make these GPIO lines unavailable for
85 * translation.
86 */
87 int (*child_to_parent_hwirq)(struct gpio_chip *chip,
88 unsigned int child_hwirq,
89 unsigned int child_type,
90 unsigned int *parent_hwirq,
91 unsigned int *parent_type);
92
93 /**
94 * @populate_parent_fwspec:
95 *
96 * This optional callback populates the &struct irq_fwspec for the
97 * parent's IRQ domain. If this is not specified, then
98 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
99 * variant named &gpiochip_populate_parent_fwspec_fourcell is also
100 * available.
101 */
102 void (*populate_parent_fwspec)(struct gpio_chip *chip,
103 struct irq_fwspec *fwspec,
104 unsigned int parent_hwirq,
105 unsigned int parent_type);
106
107 /**
108 * @child_offset_to_irq:
109 *
110 * This optional callback is used to translate the child's GPIO line
111 * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
112 * callback. If this is not specified, then a default callback will be
113 * provided that returns the line offset.
114 */
115 unsigned int (*child_offset_to_irq)(struct gpio_chip *chip,
116 unsigned int pin);
117
118 /**
119 * @child_irq_domain_ops:
120 *
121 * The IRQ domain operations that will be used for this GPIO IRQ
122 * chip. If no operations are provided, then default callbacks will
123 * be populated to setup the IRQ hierarchy. Some drivers need to
124 * supply their own translate function.
125 */
126 struct irq_domain_ops child_irq_domain_ops;
127#endif
128
52 /** 129 /**
53 * @handler: 130 * @handler:
54 * 131 *
@@ -161,7 +238,6 @@ struct gpio_irq_chip {
161 */ 238 */
162 void (*irq_disable)(struct irq_data *data); 239 void (*irq_disable)(struct irq_data *data);
163}; 240};
164#endif /* CONFIG_GPIOLIB_IRQCHIP */
165 241
166/** 242/**
167 * struct gpio_chip - abstract a GPIO controller 243 * struct gpio_chip - abstract a GPIO controller
@@ -282,7 +358,9 @@ struct gpio_chip {
282 void (*dbg_show)(struct seq_file *s, 358 void (*dbg_show)(struct seq_file *s,
283 struct gpio_chip *chip); 359 struct gpio_chip *chip);
284 360
285 int (*init_valid_mask)(struct gpio_chip *chip); 361 int (*init_valid_mask)(struct gpio_chip *chip,
362 unsigned long *valid_mask,
363 unsigned int ngpios);
286 364
287 int base; 365 int base;
288 u16 ngpio; 366 u16 ngpio;
@@ -321,15 +399,6 @@ struct gpio_chip {
321#endif /* CONFIG_GPIOLIB_IRQCHIP */ 399#endif /* CONFIG_GPIOLIB_IRQCHIP */
322 400
323 /** 401 /**
324 * @need_valid_mask:
325 *
326 * If set core allocates @valid_mask with all its values initialized
327 * with init_valid_mask() or set to one if init_valid_mask() is not
328 * defined
329 */
330 bool need_valid_mask;
331
332 /**
333 * @valid_mask: 402 * @valid_mask:
334 * 403 *
335 * If not %NULL holds bitmask of GPIOs which are valid to be used 404 * If not %NULL holds bitmask of GPIOs which are valid to be used
@@ -421,9 +490,6 @@ extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
421extern struct gpio_chip *gpiochip_find(void *data, 490extern struct gpio_chip *gpiochip_find(void *data,
422 int (*match)(struct gpio_chip *chip, void *data)); 491 int (*match)(struct gpio_chip *chip, void *data));
423 492
424/* lock/unlock as IRQ */
425int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
426void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
427bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset); 493bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset);
428int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset); 494int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset);
429void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset); 495void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset);
@@ -441,15 +507,40 @@ bool gpiochip_line_is_valid(const struct gpio_chip *chip, unsigned int offset);
441/* get driver data */ 507/* get driver data */
442void *gpiochip_get_data(struct gpio_chip *chip); 508void *gpiochip_get_data(struct gpio_chip *chip);
443 509
444struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
445
446struct bgpio_pdata { 510struct bgpio_pdata {
447 const char *label; 511 const char *label;
448 int base; 512 int base;
449 int ngpio; 513 int ngpio;
450}; 514};
451 515
452#if IS_ENABLED(CONFIG_GPIO_GENERIC) 516#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
517
518void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
519 struct irq_fwspec *fwspec,
520 unsigned int parent_hwirq,
521 unsigned int parent_type);
522void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
523 struct irq_fwspec *fwspec,
524 unsigned int parent_hwirq,
525 unsigned int parent_type);
526
527#else
528
529static inline void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
530 struct irq_fwspec *fwspec,
531 unsigned int parent_hwirq,
532 unsigned int parent_type)
533{
534}
535
536static inline void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
537 struct irq_fwspec *fwspec,
538 unsigned int parent_hwirq,
539 unsigned int parent_type)
540{
541}
542
543#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
453 544
454int bgpio_init(struct gpio_chip *gc, struct device *dev, 545int bgpio_init(struct gpio_chip *gc, struct device *dev,
455 unsigned long sz, void __iomem *dat, void __iomem *set, 546 unsigned long sz, void __iomem *dat, void __iomem *set,
@@ -463,10 +554,6 @@ int bgpio_init(struct gpio_chip *gc, struct device *dev,
463#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */ 554#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
464#define BGPIOF_NO_OUTPUT BIT(5) /* only input */ 555#define BGPIOF_NO_OUTPUT BIT(5) /* only input */
465 556
466#endif /* CONFIG_GPIO_GENERIC */
467
468#ifdef CONFIG_GPIOLIB_IRQCHIP
469
470int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, 557int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
471 irq_hw_number_t hwirq); 558 irq_hw_number_t hwirq);
472void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq); 559void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq);
@@ -555,15 +642,11 @@ static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
555} 642}
556#endif /* CONFIG_LOCKDEP */ 643#endif /* CONFIG_LOCKDEP */
557 644
558#endif /* CONFIG_GPIOLIB_IRQCHIP */
559
560int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset); 645int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset);
561void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset); 646void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset);
562int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset, 647int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
563 unsigned long config); 648 unsigned long config);
564 649
565#ifdef CONFIG_PINCTRL
566
567/** 650/**
568 * struct gpio_pin_range - pin range controlled by a gpio chip 651 * struct gpio_pin_range - pin range controlled by a gpio chip
569 * @node: list for maintaining set of pin ranges, used internally 652 * @node: list for maintaining set of pin ranges, used internally
@@ -576,6 +659,8 @@ struct gpio_pin_range {
576 struct pinctrl_gpio_range range; 659 struct pinctrl_gpio_range range;
577}; 660};
578 661
662#ifdef CONFIG_PINCTRL
663
579int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 664int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
580 unsigned int gpio_offset, unsigned int pin_offset, 665 unsigned int gpio_offset, unsigned int pin_offset,
581 unsigned int npins); 666 unsigned int npins);
@@ -586,8 +671,6 @@ void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
586 671
587#else /* ! CONFIG_PINCTRL */ 672#else /* ! CONFIG_PINCTRL */
588 673
589struct pinctrl_dev;
590
591static inline int 674static inline int
592gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, 675gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
593 unsigned int gpio_offset, unsigned int pin_offset, 676 unsigned int gpio_offset, unsigned int pin_offset,
@@ -619,6 +702,15 @@ void gpiochip_free_own_desc(struct gpio_desc *desc);
619void devprop_gpiochip_set_names(struct gpio_chip *chip, 702void devprop_gpiochip_set_names(struct gpio_chip *chip,
620 const struct fwnode_handle *fwnode); 703 const struct fwnode_handle *fwnode);
621 704
705#ifdef CONFIG_GPIOLIB
706
707/* lock/unlock as IRQ */
708int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
709void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
710
711
712struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
713
622#else /* CONFIG_GPIOLIB */ 714#else /* CONFIG_GPIOLIB */
623 715
624static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) 716static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
@@ -628,6 +720,18 @@ static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
628 return ERR_PTR(-ENODEV); 720 return ERR_PTR(-ENODEV);
629} 721}
630 722
723static inline int gpiochip_lock_as_irq(struct gpio_chip *chip,
724 unsigned int offset)
725{
726 WARN_ON(1);
727 return -EINVAL;
728}
729
730static inline void gpiochip_unlock_as_irq(struct gpio_chip *chip,
731 unsigned int offset)
732{
733 WARN_ON(1);
734}
631#endif /* CONFIG_GPIOLIB */ 735#endif /* CONFIG_GPIOLIB */
632 736
633#endif 737#endif /* __LINUX_GPIO_DRIVER_H */
diff --git a/sound/soc/intel/boards/bytcht_cx2072x.c b/sound/soc/intel/boards/bytcht_cx2072x.c
index 54ac2fd41925..67f06c95eec5 100644
--- a/sound/soc/intel/boards/bytcht_cx2072x.c
+++ b/sound/soc/intel/boards/bytcht_cx2072x.c
@@ -6,6 +6,7 @@
6 6
7#include <linux/acpi.h> 7#include <linux/acpi.h>
8#include <linux/device.h> 8#include <linux/device.h>
9#include <linux/gpio/consumer.h>
9#include <linux/module.h> 10#include <linux/module.h>
10#include <linux/platform_device.h> 11#include <linux/platform_device.h>
11#include <linux/slab.h> 12#include <linux/slab.h>
diff --git a/sound/soc/intel/boards/cht_bsw_max98090_ti.c b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
index 33eb72545be6..05db311b579e 100644
--- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c
+++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <linux/dmi.h> 14#include <linux/dmi.h>
15#include <linux/gpio/consumer.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
17#include <linux/slab.h> 18#include <linux/slab.h>
diff --git a/sound/soc/intel/boards/cht_bsw_rt5672.c b/sound/soc/intel/boards/cht_bsw_rt5672.c
index 4977b5a65eb8..9d657421730a 100644
--- a/sound/soc/intel/boards/cht_bsw_rt5672.c
+++ b/sound/soc/intel/boards/cht_bsw_rt5672.c
@@ -8,6 +8,7 @@
8 * Mengdong Lin <mengdong.lin@intel.com> 8 * Mengdong Lin <mengdong.lin@intel.com>
9 */ 9 */
10 10
11#include <linux/gpio/consumer.h>
11#include <linux/input.h> 12#include <linux/input.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-11 04:57:39 -0400