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authorMarc Zyngier <marc.zyngier@arm.com>2016-02-09 12:36:09 -0500
committerMarc Zyngier <marc.zyngier@arm.com>2016-03-08 23:23:56 -0500
commitcc1daf0b82f12040065bb1a77dd7945b9ef821f8 (patch)
tree4b8281877b69e56c540d28e3648786d5f89d8e9a /virt
parentd6400d77463d5c3dd386c27d07a236a07daaf33e (diff)
KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit
So far, we're always writing all possible LRs, setting the empty ones with a zero value. This is obvious doing a lot of work for nothing, and we're better off clearing those we've actually dirtied on the exit path (it is very rare to inject more than one interrupt at a time anyway). Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'virt')
-rw-r--r--virt/kvm/arm/hyp/vgic-v2-sr.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/virt/kvm/arm/hyp/vgic-v2-sr.c b/virt/kvm/arm/hyp/vgic-v2-sr.c
index 6d4dd7819a33..674bdf8ecf4f 100644
--- a/virt/kvm/arm/hyp/vgic-v2-sr.c
+++ b/virt/kvm/arm/hyp/vgic-v2-sr.c
@@ -99,6 +99,7 @@ static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
99 } 99 }
100 100
101 cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4)); 101 cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
102 writel_relaxed(0, base + GICH_LR0 + (i * 4));
102 } 103 }
103} 104}
104 105
@@ -156,12 +157,11 @@ void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu)
156 writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR); 157 writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
157 writel_relaxed(cpu_if->vgic_apr, base + GICH_APR); 158 writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
158 for (i = 0; i < nr_lr; i++) { 159 for (i = 0; i < nr_lr; i++) {
159 u32 val = 0; 160 if (!(live_lrs & (1UL << i)))
160 161 continue;
161 if (live_lrs & (1UL << i))
162 val = cpu_if->vgic_lr[i];
163 162
164 writel_relaxed(val, base + GICH_LR0 + (i * 4)); 163 writel_relaxed(cpu_if->vgic_lr[i],
164 base + GICH_LR0 + (i * 4));
165 } 165 }
166 } 166 }
167 167