KVM: arm/arm64: add irqfd support

This patch enables irqfd on arm/arm64.

Both irqfd and resamplefd are supported. Injection is implemented
in vgic.c without routing.

This patch enables CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQFD.

KVM_CAP_IRQFD is now advertised. KVM_CAP_IRQFD_RESAMPLE capability
automatically is advertised as soon as CONFIG_HAVE_KVM_IRQFD is set.

Irqfd injection is restricted to SPI. The rationale behind not
supporting PPI irqfd injection is that any device using a PPI would
be a private-to-the-CPU device (timer for instance), so its state
would have to be context-switched along with the VCPU and would
require in-kernel wiring anyhow. It is not a relevant use case for
irqfds.

Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>

1 files changed, 48 insertions, 0 deletions

diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 897c849305db..c000e978c1fb 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -31,6 +31,7 @@
 #include <asm/kvm_emulate.h>
 #include <asm/kvm_arm.h>
 #include <asm/kvm_mmu.h>
+#include <trace/events/kvm.h>
 
 /*
  * How the whole thing works (courtesy of Christoffer Dall):
@@ -1083,6 +1084,7 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
         u32 status = vgic_get_interrupt_status(vcpu);
         struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
         bool level_pending = false;
+        struct kvm *kvm = vcpu->kvm;
 
         kvm_debug("STATUS = %08x\n", status);
 
@@ -1118,6 +1120,17 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
                          */
                         vgic_dist_irq_clear_soft_pend(vcpu, vlr.irq);
 
+                        /*
+                         * kvm_notify_acked_irq calls kvm_set_irq()
+                         * to reset the IRQ level. Need to release the
+                         * lock for kvm_set_irq to grab it.
+                         */
+                        spin_unlock(&dist->lock);
+
+                        kvm_notify_acked_irq(kvm, 0,
+                                             vlr.irq - VGIC_NR_PRIVATE_IRQS);
+                        spin_lock(&dist->lock);
+
                         /* Any additional pending interrupt? */
                         if (vgic_dist_irq_get_level(vcpu, vlr.irq)) {
                                 vgic_cpu_irq_set(vcpu, vlr.irq);
@@ -1913,3 +1926,38 @@ out_free_irq:
         free_percpu_irq(vgic->maint_irq, kvm_get_running_vcpus());
         return ret;
 }
+
+int kvm_irq_map_gsi(struct kvm *kvm,
+                    struct kvm_kernel_irq_routing_entry *entries,
+                    int gsi)
+{
+        return gsi;
+}
+
+int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
+{
+        return pin;
+}
+
+int kvm_set_irq(struct kvm *kvm, int irq_source_id,
+                u32 irq, int level, bool line_status)
+{
+        unsigned int spi = irq + VGIC_NR_PRIVATE_IRQS;
+
+        trace_kvm_set_irq(irq, level, irq_source_id);
+
+        BUG_ON(!vgic_initialized(kvm));
+
+        if (spi > kvm->arch.vgic.nr_irqs)
+                return -EINVAL;
+        return kvm_vgic_inject_irq(kvm, 0, spi, level);
+
+}
+
+/* MSI not implemented yet */
+int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
+                struct kvm *kvm, int irq_source_id,
+                int level, bool line_status)
+{
+        return 0;
+}