summaryrefslogtreecommitdiffstats
path: root/tools/power
diff options
context:
space:
mode:
authorLen Brown <len.brown@intel.com>2018-06-06 17:18:36 -0400
committerLen Brown <len.brown@intel.com>2018-06-20 13:54:12 -0400
commitbdd5ae3aa51939bb1fd26cd9fe7af07ca8c60397 (patch)
tree186d8c837283b687233b73d5d9b87e40f98ad1fd /tools/power
parent201d4f50fef3c10856022b21cfd9fd81358a62ef (diff)
tools/power turbostat: fix show/hide issues resulting from mis-merge
The --show and --hide options failed on "Node", which was listed as "Node%". The --show and --hide options were generally fouled-up do due to come content merges that scrambled the list of column name indexes. Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power')
-rw-r--r--tools/power/x86/turbostat/turbostat.c106
1 files changed, 54 insertions, 52 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index d6cff3070ebd..f09a272941a1 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -381,19 +381,23 @@ int get_msr(int cpu, off_t offset, unsigned long long *msr)
381} 381}
382 382
383/* 383/*
384 * Each string in this array is compared in --show and --hide cmdline. 384 * This list matches the column headers, except
385 * Thus, strings that are proper sub-sets must follow their more specific peers. 385 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
386 * 2. Core and CPU are moved to the end, we can't have strings that contain them
387 * matching on them for --show and --hide.
386 */ 388 */
387struct msr_counter bic[] = { 389struct msr_counter bic[] = {
388 { 0x0, "usec" }, 390 { 0x0, "usec" },
389 { 0x0, "Time_Of_Day_Seconds" }, 391 { 0x0, "Time_Of_Day_Seconds" },
390 { 0x0, "Package" }, 392 { 0x0, "Package" },
393 { 0x0, "Node" },
391 { 0x0, "Avg_MHz" }, 394 { 0x0, "Avg_MHz" },
395 { 0x0, "Busy%" },
392 { 0x0, "Bzy_MHz" }, 396 { 0x0, "Bzy_MHz" },
393 { 0x0, "TSC_MHz" }, 397 { 0x0, "TSC_MHz" },
394 { 0x0, "IRQ" }, 398 { 0x0, "IRQ" },
395 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL}, 399 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
396 { 0x0, "Busy%" }, 400 { 0x0, "sysfs" },
397 { 0x0, "CPU%c1" }, 401 { 0x0, "CPU%c1" },
398 { 0x0, "CPU%c3" }, 402 { 0x0, "CPU%c3" },
399 { 0x0, "CPU%c6" }, 403 { 0x0, "CPU%c6" },
@@ -424,15 +428,13 @@ struct msr_counter bic[] = {
424 { 0x0, "Cor_J" }, 428 { 0x0, "Cor_J" },
425 { 0x0, "GFX_J" }, 429 { 0x0, "GFX_J" },
426 { 0x0, "RAM_J" }, 430 { 0x0, "RAM_J" },
427 { 0x0, "Core" },
428 { 0x0, "CPU" },
429 { 0x0, "Mod%c6" }, 431 { 0x0, "Mod%c6" },
430 { 0x0, "sysfs" },
431 { 0x0, "Totl%C0" }, 432 { 0x0, "Totl%C0" },
432 { 0x0, "Any%C0" }, 433 { 0x0, "Any%C0" },
433 { 0x0, "GFX%C0" }, 434 { 0x0, "GFX%C0" },
434 { 0x0, "CPUGFX%" }, 435 { 0x0, "CPUGFX%" },
435 { 0x0, "Node%" }, 436 { 0x0, "Core" },
437 { 0x0, "CPU" },
436}; 438};
437 439
438 440
@@ -441,51 +443,51 @@ struct msr_counter bic[] = {
441#define BIC_USEC (1ULL << 0) 443#define BIC_USEC (1ULL << 0)
442#define BIC_TOD (1ULL << 1) 444#define BIC_TOD (1ULL << 1)
443#define BIC_Package (1ULL << 2) 445#define BIC_Package (1ULL << 2)
444#define BIC_Avg_MHz (1ULL << 3) 446#define BIC_Node (1ULL << 3)
445#define BIC_Bzy_MHz (1ULL << 4) 447#define BIC_Avg_MHz (1ULL << 4)
446#define BIC_TSC_MHz (1ULL << 5) 448#define BIC_Busy (1ULL << 5)
447#define BIC_IRQ (1ULL << 6) 449#define BIC_Bzy_MHz (1ULL << 6)
448#define BIC_SMI (1ULL << 7) 450#define BIC_TSC_MHz (1ULL << 7)
449#define BIC_Busy (1ULL << 8) 451#define BIC_IRQ (1ULL << 8)
450#define BIC_CPU_c1 (1ULL << 9) 452#define BIC_SMI (1ULL << 9)
451#define BIC_CPU_c3 (1ULL << 10) 453#define BIC_sysfs (1ULL << 10)
452#define BIC_CPU_c6 (1ULL << 11) 454#define BIC_CPU_c1 (1ULL << 11)
453#define BIC_CPU_c7 (1ULL << 12) 455#define BIC_CPU_c3 (1ULL << 12)
454#define BIC_ThreadC (1ULL << 13) 456#define BIC_CPU_c6 (1ULL << 13)
455#define BIC_CoreTmp (1ULL << 14) 457#define BIC_CPU_c7 (1ULL << 14)
456#define BIC_CoreCnt (1ULL << 15) 458#define BIC_ThreadC (1ULL << 15)
457#define BIC_PkgTmp (1ULL << 16) 459#define BIC_CoreTmp (1ULL << 16)
458#define BIC_GFX_rc6 (1ULL << 17) 460#define BIC_CoreCnt (1ULL << 17)
459#define BIC_GFXMHz (1ULL << 18) 461#define BIC_PkgTmp (1ULL << 18)
460#define BIC_Pkgpc2 (1ULL << 19) 462#define BIC_GFX_rc6 (1ULL << 19)
461#define BIC_Pkgpc3 (1ULL << 20) 463#define BIC_GFXMHz (1ULL << 20)
462#define BIC_Pkgpc6 (1ULL << 21) 464#define BIC_Pkgpc2 (1ULL << 21)
463#define BIC_Pkgpc7 (1ULL << 22) 465#define BIC_Pkgpc3 (1ULL << 22)
464#define BIC_Pkgpc8 (1ULL << 23) 466#define BIC_Pkgpc6 (1ULL << 23)
465#define BIC_Pkgpc9 (1ULL << 24) 467#define BIC_Pkgpc7 (1ULL << 24)
466#define BIC_Pkgpc10 (1ULL << 25) 468#define BIC_Pkgpc8 (1ULL << 25)
467#define BIC_CPU_LPI (1ULL << 26) 469#define BIC_Pkgpc9 (1ULL << 26)
468#define BIC_SYS_LPI (1ULL << 27) 470#define BIC_Pkgpc10 (1ULL << 27)
469#define BIC_PkgWatt (1ULL << 26) 471#define BIC_CPU_LPI (1ULL << 28)
470#define BIC_CorWatt (1ULL << 27) 472#define BIC_SYS_LPI (1ULL << 29)
471#define BIC_GFXWatt (1ULL << 28) 473#define BIC_PkgWatt (1ULL << 30)
472#define BIC_PkgCnt (1ULL << 29) 474#define BIC_CorWatt (1ULL << 31)
473#define BIC_RAMWatt (1ULL << 30) 475#define BIC_GFXWatt (1ULL << 32)
474#define BIC_PKG__ (1ULL << 31) 476#define BIC_PkgCnt (1ULL << 33)
475#define BIC_RAM__ (1ULL << 32) 477#define BIC_RAMWatt (1ULL << 34)
476#define BIC_Pkg_J (1ULL << 33) 478#define BIC_PKG__ (1ULL << 35)
477#define BIC_Cor_J (1ULL << 34) 479#define BIC_RAM__ (1ULL << 36)
478#define BIC_GFX_J (1ULL << 35) 480#define BIC_Pkg_J (1ULL << 37)
479#define BIC_RAM_J (1ULL << 36) 481#define BIC_Cor_J (1ULL << 38)
480#define BIC_Core (1ULL << 37) 482#define BIC_GFX_J (1ULL << 39)
481#define BIC_CPU (1ULL << 38) 483#define BIC_RAM_J (1ULL << 40)
482#define BIC_Mod_c6 (1ULL << 39) 484#define BIC_Mod_c6 (1ULL << 41)
483#define BIC_sysfs (1ULL << 40) 485#define BIC_Totl_c0 (1ULL << 42)
484#define BIC_Totl_c0 (1ULL << 41) 486#define BIC_Any_c0 (1ULL << 43)
485#define BIC_Any_c0 (1ULL << 42) 487#define BIC_GFX_c0 (1ULL << 44)
486#define BIC_GFX_c0 (1ULL << 43) 488#define BIC_CPUGFX (1ULL << 45)
487#define BIC_CPUGFX (1ULL << 44) 489#define BIC_Core (1ULL << 46)
488#define BIC_Node (1ULL << 45) 490#define BIC_CPU (1ULL << 47)
489 491
490#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD) 492#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD)
491 493