diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-07-27 13:44:28 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-07-27 13:44:28 -0400 |
commit | 8cdaad964740556669aca5894da5d3274d3d449c (patch) | |
tree | f7da8aa27a499ccb27449540250e233f0975e8be /sound | |
parent | 60187bd4fda6091a574e31d5bf7856d1e4f8d172 (diff) | |
parent | ba92b1142879731f80377770f4710e5f0a953aad (diff) |
Merge tag 'sound-4.13-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"This is a pretty boring pull request, containing a few HD-audio quirks
and ID updates as usual suspects, as well as a fix for a regression of
FM801 chip on ia64 (what a legacy combination!)"
* tag 'sound-4.13-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ALSA: hda - Add mute led support for HP ProBook 440 G4
ALSA: hda/realtek - No loopback on ALC225/ALC295 codec
ALSA: hda/realtek - Update headset mode for ALC225
ALSA: fm801: Initialize chip after IRQ handler is registered
ALSA: hda/realtek - Update headset mode for ALC298
ALSA: hda - Add missing NVIDIA GPU codec IDs to patch table
Diffstat (limited to 'sound')
-rw-r--r-- | sound/pci/fm801.c | 4 | ||||
-rw-r--r-- | sound/pci/hda/patch_conexant.c | 1 | ||||
-rw-r--r-- | sound/pci/hda/patch_hdmi.c | 27 | ||||
-rw-r--r-- | sound/pci/hda/patch_realtek.c | 144 |
4 files changed, 143 insertions, 33 deletions
diff --git a/sound/pci/fm801.c b/sound/pci/fm801.c index 2e402ece4c86..8e6b04b39dcc 100644 --- a/sound/pci/fm801.c +++ b/sound/pci/fm801.c | |||
@@ -1235,8 +1235,6 @@ static int snd_fm801_create(struct snd_card *card, | |||
1235 | } | 1235 | } |
1236 | } | 1236 | } |
1237 | 1237 | ||
1238 | snd_fm801_chip_init(chip); | ||
1239 | |||
1240 | if ((chip->tea575x_tuner & TUNER_ONLY) == 0) { | 1238 | if ((chip->tea575x_tuner & TUNER_ONLY) == 0) { |
1241 | if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt, | 1239 | if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt, |
1242 | IRQF_SHARED, KBUILD_MODNAME, chip)) { | 1240 | IRQF_SHARED, KBUILD_MODNAME, chip)) { |
@@ -1248,6 +1246,8 @@ static int snd_fm801_create(struct snd_card *card, | |||
1248 | pci_set_master(pci); | 1246 | pci_set_master(pci); |
1249 | } | 1247 | } |
1250 | 1248 | ||
1249 | snd_fm801_chip_init(chip); | ||
1250 | |||
1251 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | 1251 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { |
1252 | snd_fm801_free(chip); | 1252 | snd_fm801_free(chip); |
1253 | return err; | 1253 | return err; |
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c index 63bc894ddf5e..8c1289963c80 100644 --- a/sound/pci/hda/patch_conexant.c +++ b/sound/pci/hda/patch_conexant.c | |||
@@ -933,6 +933,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = { | |||
933 | SND_PCI_QUIRK(0x103c, 0x8174, "HP Spectre x360", CXT_FIXUP_HP_SPECTRE), | 933 | SND_PCI_QUIRK(0x103c, 0x8174, "HP Spectre x360", CXT_FIXUP_HP_SPECTRE), |
934 | SND_PCI_QUIRK(0x103c, 0x8115, "HP Z1 Gen3", CXT_FIXUP_HP_GATE_MIC), | 934 | SND_PCI_QUIRK(0x103c, 0x8115, "HP Z1 Gen3", CXT_FIXUP_HP_GATE_MIC), |
935 | SND_PCI_QUIRK(0x103c, 0x814f, "HP ZBook 15u G3", CXT_FIXUP_MUTE_LED_GPIO), | 935 | SND_PCI_QUIRK(0x103c, 0x814f, "HP ZBook 15u G3", CXT_FIXUP_MUTE_LED_GPIO), |
936 | SND_PCI_QUIRK(0x103c, 0x822e, "HP ProBook 440 G4", CXT_FIXUP_MUTE_LED_GPIO), | ||
936 | SND_PCI_QUIRK(0x1043, 0x138d, "Asus", CXT_FIXUP_HEADPHONE_MIC_PIN), | 937 | SND_PCI_QUIRK(0x1043, 0x138d, "Asus", CXT_FIXUP_HEADPHONE_MIC_PIN), |
937 | SND_PCI_QUIRK(0x152d, 0x0833, "OLPC XO-1.5", CXT_FIXUP_OLPC_XO), | 938 | SND_PCI_QUIRK(0x152d, 0x0833, "OLPC XO-1.5", CXT_FIXUP_OLPC_XO), |
938 | SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo T400", CXT_PINCFG_LENOVO_TP410), | 939 | SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo T400", CXT_PINCFG_LENOVO_TP410), |
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index d549f35f39d3..53f9311370de 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c | |||
@@ -3733,11 +3733,15 @@ HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi), | |||
3733 | HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi), | 3733 | HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi), |
3734 | HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi), | 3734 | HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi), |
3735 | HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi), | 3735 | HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi), |
3736 | HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI", patch_nvhdmi_2ch), | ||
3736 | HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), | 3737 | HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), |
3737 | HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), | 3738 | HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), |
3739 | HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI", patch_nvhdmi_8ch_7x), | ||
3738 | HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), | 3740 | HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), |
3739 | HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), | 3741 | HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x), |
3740 | HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x), | 3742 | HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x), |
3743 | HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP", patch_nvhdmi), | ||
3744 | HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP", patch_nvhdmi), | ||
3741 | HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi), | 3745 | HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi), |
3742 | HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi), | 3746 | HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi), |
3743 | HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi), | 3747 | HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi), |
@@ -3764,17 +3768,40 @@ HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi), | |||
3764 | HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi), | 3768 | HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi), |
3765 | HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi), | 3769 | HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi), |
3766 | HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi), | 3770 | HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi), |
3771 | HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP", patch_nvhdmi), | ||
3772 | HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP", patch_nvhdmi), | ||
3767 | HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi), | 3773 | HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi), |
3774 | HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP", patch_nvhdmi), | ||
3768 | HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi), | 3775 | HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi), |
3776 | HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP", patch_nvhdmi), | ||
3777 | HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP", patch_nvhdmi), | ||
3769 | HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch), | 3778 | HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch), |
3770 | HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi), | 3779 | HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi), |
3771 | HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi), | 3780 | HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi), |
3772 | HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi), | 3781 | HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi), |
3782 | HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP", patch_nvhdmi), | ||
3783 | HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP", patch_nvhdmi), | ||
3784 | HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP", patch_nvhdmi), | ||
3785 | HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP", patch_nvhdmi), | ||
3786 | HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP", patch_nvhdmi), | ||
3773 | HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi), | 3787 | HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi), |
3788 | HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP", patch_nvhdmi), | ||
3774 | HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi), | 3789 | HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi), |
3790 | HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP", patch_nvhdmi), | ||
3775 | HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi), | 3791 | HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi), |
3776 | HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi), | 3792 | HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi), |
3793 | HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP", patch_nvhdmi), | ||
3794 | HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP", patch_nvhdmi), | ||
3795 | HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP", patch_nvhdmi), | ||
3796 | HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP", patch_nvhdmi), | ||
3797 | HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP", patch_nvhdmi), | ||
3798 | HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP", patch_nvhdmi), | ||
3799 | HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP", patch_nvhdmi), | ||
3800 | HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi), | ||
3801 | HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi), | ||
3802 | HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi), | ||
3777 | HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch), | 3803 | HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch), |
3804 | HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch), | ||
3778 | HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi), | 3805 | HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi), |
3779 | HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi), | 3806 | HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi), |
3780 | HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi), | 3807 | HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi), |
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 45d58fc1df39..443a45eaec32 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c | |||
@@ -3838,6 +3838,17 @@ static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec, | |||
3838 | } | 3838 | } |
3839 | } | 3839 | } |
3840 | 3840 | ||
3841 | static struct coef_fw alc225_pre_hsmode[] = { | ||
3842 | UPDATE_COEF(0x4a, 1<<8, 0), | ||
3843 | UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), | ||
3844 | UPDATE_COEF(0x63, 3<<14, 3<<14), | ||
3845 | UPDATE_COEF(0x4a, 3<<4, 2<<4), | ||
3846 | UPDATE_COEF(0x4a, 3<<10, 3<<10), | ||
3847 | UPDATE_COEF(0x45, 0x3f<<10, 0x34<<10), | ||
3848 | UPDATE_COEF(0x4a, 3<<10, 0), | ||
3849 | {} | ||
3850 | }; | ||
3851 | |||
3841 | static void alc_headset_mode_unplugged(struct hda_codec *codec) | 3852 | static void alc_headset_mode_unplugged(struct hda_codec *codec) |
3842 | { | 3853 | { |
3843 | static struct coef_fw coef0255[] = { | 3854 | static struct coef_fw coef0255[] = { |
@@ -3873,6 +3884,10 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec) | |||
3873 | UPDATE_COEF(0x67, 0x2000, 0), | 3884 | UPDATE_COEF(0x67, 0x2000, 0), |
3874 | {} | 3885 | {} |
3875 | }; | 3886 | }; |
3887 | static struct coef_fw coef0298[] = { | ||
3888 | UPDATE_COEF(0x19, 0x1300, 0x0300), | ||
3889 | {} | ||
3890 | }; | ||
3876 | static struct coef_fw coef0292[] = { | 3891 | static struct coef_fw coef0292[] = { |
3877 | WRITE_COEF(0x76, 0x000e), | 3892 | WRITE_COEF(0x76, 0x000e), |
3878 | WRITE_COEF(0x6c, 0x2400), | 3893 | WRITE_COEF(0x6c, 0x2400), |
@@ -3895,13 +3910,7 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec) | |||
3895 | {} | 3910 | {} |
3896 | }; | 3911 | }; |
3897 | static struct coef_fw coef0225[] = { | 3912 | static struct coef_fw coef0225[] = { |
3898 | UPDATE_COEF(0x4a, 1<<8, 0), | 3913 | UPDATE_COEF(0x63, 3<<14, 0), |
3899 | UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), | ||
3900 | UPDATE_COEF(0x63, 3<<14, 3<<14), | ||
3901 | UPDATE_COEF(0x4a, 3<<4, 2<<4), | ||
3902 | UPDATE_COEF(0x4a, 3<<10, 3<<10), | ||
3903 | UPDATE_COEF(0x45, 0x3f<<10, 0x34<<10), | ||
3904 | UPDATE_COEF(0x4a, 3<<10, 0), | ||
3905 | {} | 3914 | {} |
3906 | }; | 3915 | }; |
3907 | static struct coef_fw coef0274[] = { | 3916 | static struct coef_fw coef0274[] = { |
@@ -3935,7 +3944,10 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec) | |||
3935 | break; | 3944 | break; |
3936 | case 0x10ec0286: | 3945 | case 0x10ec0286: |
3937 | case 0x10ec0288: | 3946 | case 0x10ec0288: |
3947 | alc_process_coef_fw(codec, coef0288); | ||
3948 | break; | ||
3938 | case 0x10ec0298: | 3949 | case 0x10ec0298: |
3950 | alc_process_coef_fw(codec, coef0298); | ||
3939 | alc_process_coef_fw(codec, coef0288); | 3951 | alc_process_coef_fw(codec, coef0288); |
3940 | break; | 3952 | break; |
3941 | case 0x10ec0292: | 3953 | case 0x10ec0292: |
@@ -3976,6 +3988,7 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin, | |||
3976 | {} | 3988 | {} |
3977 | }; | 3989 | }; |
3978 | static struct coef_fw coef0288[] = { | 3990 | static struct coef_fw coef0288[] = { |
3991 | UPDATE_COEF(0x4f, 0x00c0, 0), | ||
3979 | UPDATE_COEF(0x50, 0x2000, 0), | 3992 | UPDATE_COEF(0x50, 0x2000, 0), |
3980 | UPDATE_COEF(0x56, 0x0006, 0), | 3993 | UPDATE_COEF(0x56, 0x0006, 0), |
3981 | UPDATE_COEF(0x4f, 0xfcc0, 0xc400), | 3994 | UPDATE_COEF(0x4f, 0xfcc0, 0xc400), |
@@ -4039,7 +4052,6 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin, | |||
4039 | case 0x10ec0286: | 4052 | case 0x10ec0286: |
4040 | case 0x10ec0288: | 4053 | case 0x10ec0288: |
4041 | case 0x10ec0298: | 4054 | case 0x10ec0298: |
4042 | alc_update_coef_idx(codec, 0x4f, 0x000c, 0); | ||
4043 | snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); | 4055 | snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); |
4044 | alc_process_coef_fw(codec, coef0288); | 4056 | alc_process_coef_fw(codec, coef0288); |
4045 | snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50); | 4057 | snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50); |
@@ -4072,6 +4084,7 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin, | |||
4072 | case 0x10ec0225: | 4084 | case 0x10ec0225: |
4073 | case 0x10ec0295: | 4085 | case 0x10ec0295: |
4074 | case 0x10ec0299: | 4086 | case 0x10ec0299: |
4087 | alc_process_coef_fw(codec, alc225_pre_hsmode); | ||
4075 | alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x31<<10); | 4088 | alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x31<<10); |
4076 | snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); | 4089 | snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); |
4077 | alc_process_coef_fw(codec, coef0225); | 4090 | alc_process_coef_fw(codec, coef0225); |
@@ -4084,7 +4097,12 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin, | |||
4084 | static void alc_headset_mode_default(struct hda_codec *codec) | 4097 | static void alc_headset_mode_default(struct hda_codec *codec) |
4085 | { | 4098 | { |
4086 | static struct coef_fw coef0225[] = { | 4099 | static struct coef_fw coef0225[] = { |
4087 | UPDATE_COEF(0x45, 0x3f<<10, 0x34<<10), | 4100 | UPDATE_COEF(0x45, 0x3f<<10, 0x30<<10), |
4101 | UPDATE_COEF(0x45, 0x3f<<10, 0x31<<10), | ||
4102 | UPDATE_COEF(0x49, 3<<8, 0<<8), | ||
4103 | UPDATE_COEF(0x4a, 3<<4, 3<<4), | ||
4104 | UPDATE_COEF(0x63, 3<<14, 0), | ||
4105 | UPDATE_COEF(0x67, 0xf000, 0x3000), | ||
4088 | {} | 4106 | {} |
4089 | }; | 4107 | }; |
4090 | static struct coef_fw coef0255[] = { | 4108 | static struct coef_fw coef0255[] = { |
@@ -4138,6 +4156,7 @@ static void alc_headset_mode_default(struct hda_codec *codec) | |||
4138 | case 0x10ec0225: | 4156 | case 0x10ec0225: |
4139 | case 0x10ec0295: | 4157 | case 0x10ec0295: |
4140 | case 0x10ec0299: | 4158 | case 0x10ec0299: |
4159 | alc_process_coef_fw(codec, alc225_pre_hsmode); | ||
4141 | alc_process_coef_fw(codec, coef0225); | 4160 | alc_process_coef_fw(codec, coef0225); |
4142 | break; | 4161 | break; |
4143 | case 0x10ec0255: | 4162 | case 0x10ec0255: |
@@ -4177,6 +4196,8 @@ static void alc_headset_mode_default(struct hda_codec *codec) | |||
4177 | /* Iphone type */ | 4196 | /* Iphone type */ |
4178 | static void alc_headset_mode_ctia(struct hda_codec *codec) | 4197 | static void alc_headset_mode_ctia(struct hda_codec *codec) |
4179 | { | 4198 | { |
4199 | int val; | ||
4200 | |||
4180 | static struct coef_fw coef0255[] = { | 4201 | static struct coef_fw coef0255[] = { |
4181 | WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */ | 4202 | WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */ |
4182 | WRITE_COEF(0x1b, 0x0c2b), | 4203 | WRITE_COEF(0x1b, 0x0c2b), |
@@ -4219,11 +4240,14 @@ static void alc_headset_mode_ctia(struct hda_codec *codec) | |||
4219 | WRITE_COEF(0xc3, 0x0000), | 4240 | WRITE_COEF(0xc3, 0x0000), |
4220 | {} | 4241 | {} |
4221 | }; | 4242 | }; |
4222 | static struct coef_fw coef0225[] = { | 4243 | static struct coef_fw coef0225_1[] = { |
4223 | UPDATE_COEF(0x45, 0x3f<<10, 0x35<<10), | 4244 | UPDATE_COEF(0x45, 0x3f<<10, 0x35<<10), |
4224 | UPDATE_COEF(0x49, 1<<8, 1<<8), | 4245 | UPDATE_COEF(0x63, 3<<14, 2<<14), |
4225 | UPDATE_COEF(0x4a, 7<<6, 7<<6), | 4246 | {} |
4226 | UPDATE_COEF(0x4a, 3<<4, 3<<4), | 4247 | }; |
4248 | static struct coef_fw coef0225_2[] = { | ||
4249 | UPDATE_COEF(0x45, 0x3f<<10, 0x35<<10), | ||
4250 | UPDATE_COEF(0x63, 3<<14, 1<<14), | ||
4227 | {} | 4251 | {} |
4228 | }; | 4252 | }; |
4229 | 4253 | ||
@@ -4244,8 +4268,17 @@ static void alc_headset_mode_ctia(struct hda_codec *codec) | |||
4244 | alc_process_coef_fw(codec, coef0233); | 4268 | alc_process_coef_fw(codec, coef0233); |
4245 | break; | 4269 | break; |
4246 | case 0x10ec0298: | 4270 | case 0x10ec0298: |
4247 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020);/* Headset output enable */ | 4271 | val = alc_read_coef_idx(codec, 0x50); |
4248 | /* ALC298 jack type setting is the same with ALC286/ALC288 */ | 4272 | if (val & (1 << 12)) { |
4273 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020); | ||
4274 | alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400); | ||
4275 | msleep(300); | ||
4276 | } else { | ||
4277 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010); | ||
4278 | alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400); | ||
4279 | msleep(300); | ||
4280 | } | ||
4281 | break; | ||
4249 | case 0x10ec0286: | 4282 | case 0x10ec0286: |
4250 | case 0x10ec0288: | 4283 | case 0x10ec0288: |
4251 | alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400); | 4284 | alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400); |
@@ -4264,7 +4297,11 @@ static void alc_headset_mode_ctia(struct hda_codec *codec) | |||
4264 | case 0x10ec0225: | 4297 | case 0x10ec0225: |
4265 | case 0x10ec0295: | 4298 | case 0x10ec0295: |
4266 | case 0x10ec0299: | 4299 | case 0x10ec0299: |
4267 | alc_process_coef_fw(codec, coef0225); | 4300 | val = alc_read_coef_idx(codec, 0x45); |
4301 | if (val & (1 << 9)) | ||
4302 | alc_process_coef_fw(codec, coef0225_2); | ||
4303 | else | ||
4304 | alc_process_coef_fw(codec, coef0225_1); | ||
4268 | break; | 4305 | break; |
4269 | case 0x10ec0867: | 4306 | case 0x10ec0867: |
4270 | alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0); | 4307 | alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0); |
@@ -4320,9 +4357,7 @@ static void alc_headset_mode_omtp(struct hda_codec *codec) | |||
4320 | }; | 4357 | }; |
4321 | static struct coef_fw coef0225[] = { | 4358 | static struct coef_fw coef0225[] = { |
4322 | UPDATE_COEF(0x45, 0x3f<<10, 0x39<<10), | 4359 | UPDATE_COEF(0x45, 0x3f<<10, 0x39<<10), |
4323 | UPDATE_COEF(0x49, 1<<8, 1<<8), | 4360 | UPDATE_COEF(0x63, 3<<14, 2<<14), |
4324 | UPDATE_COEF(0x4a, 7<<6, 7<<6), | ||
4325 | UPDATE_COEF(0x4a, 3<<4, 3<<4), | ||
4326 | {} | 4361 | {} |
4327 | }; | 4362 | }; |
4328 | 4363 | ||
@@ -4344,7 +4379,9 @@ static void alc_headset_mode_omtp(struct hda_codec *codec) | |||
4344 | break; | 4379 | break; |
4345 | case 0x10ec0298: | 4380 | case 0x10ec0298: |
4346 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);/* Headset output enable */ | 4381 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);/* Headset output enable */ |
4347 | /* ALC298 jack type setting is the same with ALC286/ALC288 */ | 4382 | alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xe400); |
4383 | msleep(300); | ||
4384 | break; | ||
4348 | case 0x10ec0286: | 4385 | case 0x10ec0286: |
4349 | case 0x10ec0288: | 4386 | case 0x10ec0288: |
4350 | alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xe400); | 4387 | alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xe400); |
@@ -4384,6 +4421,14 @@ static void alc_determine_headset_type(struct hda_codec *codec) | |||
4384 | UPDATE_COEF(0x4f, 0xfcc0, 0xd400), /* Check Type */ | 4421 | UPDATE_COEF(0x4f, 0xfcc0, 0xd400), /* Check Type */ |
4385 | {} | 4422 | {} |
4386 | }; | 4423 | }; |
4424 | static struct coef_fw coef0298[] = { | ||
4425 | UPDATE_COEF(0x50, 0x2000, 0x2000), | ||
4426 | UPDATE_COEF(0x56, 0x0006, 0x0006), | ||
4427 | UPDATE_COEF(0x66, 0x0008, 0), | ||
4428 | UPDATE_COEF(0x67, 0x2000, 0), | ||
4429 | UPDATE_COEF(0x19, 0x1300, 0x1300), | ||
4430 | {} | ||
4431 | }; | ||
4387 | static struct coef_fw coef0293[] = { | 4432 | static struct coef_fw coef0293[] = { |
4388 | UPDATE_COEF(0x4a, 0x000f, 0x0008), /* Combo Jack auto detect */ | 4433 | UPDATE_COEF(0x4a, 0x000f, 0x0008), /* Combo Jack auto detect */ |
4389 | WRITE_COEF(0x45, 0xD429), /* Set to ctia type */ | 4434 | WRITE_COEF(0x45, 0xD429), /* Set to ctia type */ |
@@ -4396,11 +4441,6 @@ static void alc_determine_headset_type(struct hda_codec *codec) | |||
4396 | WRITE_COEF(0xc3, 0x0c00), | 4441 | WRITE_COEF(0xc3, 0x0c00), |
4397 | {} | 4442 | {} |
4398 | }; | 4443 | }; |
4399 | static struct coef_fw coef0225[] = { | ||
4400 | UPDATE_COEF(0x45, 0x3f<<10, 0x34<<10), | ||
4401 | UPDATE_COEF(0x49, 1<<8, 1<<8), | ||
4402 | {} | ||
4403 | }; | ||
4404 | static struct coef_fw coef0274[] = { | 4444 | static struct coef_fw coef0274[] = { |
4405 | UPDATE_COEF(0x4a, 0x0010, 0), | 4445 | UPDATE_COEF(0x4a, 0x0010, 0), |
4406 | UPDATE_COEF(0x4a, 0x8000, 0), | 4446 | UPDATE_COEF(0x4a, 0x8000, 0), |
@@ -4433,8 +4473,34 @@ static void alc_determine_headset_type(struct hda_codec *codec) | |||
4433 | is_ctia = (val & 0x0070) == 0x0070; | 4473 | is_ctia = (val & 0x0070) == 0x0070; |
4434 | break; | 4474 | break; |
4435 | case 0x10ec0298: | 4475 | case 0x10ec0298: |
4436 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020); /* Headset output enable */ | 4476 | snd_hda_codec_write(codec, 0x21, 0, |
4437 | /* ALC298 check jack type is the same with ALC286/ALC288 */ | 4477 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE); |
4478 | msleep(100); | ||
4479 | snd_hda_codec_write(codec, 0x21, 0, | ||
4480 | AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0); | ||
4481 | msleep(200); | ||
4482 | |||
4483 | val = alc_read_coef_idx(codec, 0x50); | ||
4484 | if (val & (1 << 12)) { | ||
4485 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020); | ||
4486 | alc_process_coef_fw(codec, coef0288); | ||
4487 | msleep(350); | ||
4488 | val = alc_read_coef_idx(codec, 0x50); | ||
4489 | is_ctia = (val & 0x0070) == 0x0070; | ||
4490 | } else { | ||
4491 | alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010); | ||
4492 | alc_process_coef_fw(codec, coef0288); | ||
4493 | msleep(350); | ||
4494 | val = alc_read_coef_idx(codec, 0x50); | ||
4495 | is_ctia = (val & 0x0070) == 0x0070; | ||
4496 | } | ||
4497 | alc_process_coef_fw(codec, coef0298); | ||
4498 | snd_hda_codec_write(codec, 0x21, 0, | ||
4499 | AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP); | ||
4500 | msleep(75); | ||
4501 | snd_hda_codec_write(codec, 0x21, 0, | ||
4502 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); | ||
4503 | break; | ||
4438 | case 0x10ec0286: | 4504 | case 0x10ec0286: |
4439 | case 0x10ec0288: | 4505 | case 0x10ec0288: |
4440 | alc_process_coef_fw(codec, coef0288); | 4506 | alc_process_coef_fw(codec, coef0288); |
@@ -4463,10 +4529,25 @@ static void alc_determine_headset_type(struct hda_codec *codec) | |||
4463 | case 0x10ec0225: | 4529 | case 0x10ec0225: |
4464 | case 0x10ec0295: | 4530 | case 0x10ec0295: |
4465 | case 0x10ec0299: | 4531 | case 0x10ec0299: |
4466 | alc_process_coef_fw(codec, coef0225); | 4532 | alc_process_coef_fw(codec, alc225_pre_hsmode); |
4467 | msleep(800); | 4533 | alc_update_coef_idx(codec, 0x67, 0xf000, 0x1000); |
4468 | val = alc_read_coef_idx(codec, 0x46); | 4534 | val = alc_read_coef_idx(codec, 0x45); |
4469 | is_ctia = (val & 0x00f0) == 0x00f0; | 4535 | if (val & (1 << 9)) { |
4536 | alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x34<<10); | ||
4537 | alc_update_coef_idx(codec, 0x49, 3<<8, 2<<8); | ||
4538 | msleep(800); | ||
4539 | val = alc_read_coef_idx(codec, 0x46); | ||
4540 | is_ctia = (val & 0x00f0) == 0x00f0; | ||
4541 | } else { | ||
4542 | alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x34<<10); | ||
4543 | alc_update_coef_idx(codec, 0x49, 3<<8, 1<<8); | ||
4544 | msleep(800); | ||
4545 | val = alc_read_coef_idx(codec, 0x46); | ||
4546 | is_ctia = (val & 0x00f0) == 0x00f0; | ||
4547 | } | ||
4548 | alc_update_coef_idx(codec, 0x4a, 7<<6, 7<<6); | ||
4549 | alc_update_coef_idx(codec, 0x4a, 3<<4, 3<<4); | ||
4550 | alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000); | ||
4470 | break; | 4551 | break; |
4471 | case 0x10ec0867: | 4552 | case 0x10ec0867: |
4472 | is_ctia = true; | 4553 | is_ctia = true; |
@@ -6724,6 +6805,7 @@ static int patch_alc269(struct hda_codec *codec) | |||
6724 | case 0x10ec0225: | 6805 | case 0x10ec0225: |
6725 | case 0x10ec0295: | 6806 | case 0x10ec0295: |
6726 | spec->codec_variant = ALC269_TYPE_ALC225; | 6807 | spec->codec_variant = ALC269_TYPE_ALC225; |
6808 | spec->gen.mixer_nid = 0; /* no loopback on ALC225 ALC295 */ | ||
6727 | break; | 6809 | break; |
6728 | case 0x10ec0299: | 6810 | case 0x10ec0299: |
6729 | spec->codec_variant = ALC269_TYPE_ALC225; | 6811 | spec->codec_variant = ALC269_TYPE_ALC225; |