diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2018-01-28 22:08:45 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2018-02-12 04:42:34 -0500 |
commit | 708ebb3beb93813c58dc359d00665ad660917b1f (patch) | |
tree | ed009906194266aaed454431b946e8a3e6cc4477 /sound | |
parent | 7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff) |
ASoC: wm8995: replace codec to component
Now we can replace Codec to Component. Let's do it.
Note:
xxx_codec_xxx() -> xxx_component_xxx()
.idle_bias_off = 1 -> .idle_bias_on = 0
.ignore_pmdown_time = 0 -> .use_pmdown_time = 1
- -> .endianness = 1
- -> .non_legacy_dai_naming = 1
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/codecs/wm8995.c | 286 |
1 files changed, 135 insertions, 151 deletions
diff --git a/sound/soc/codecs/wm8995.c b/sound/soc/codecs/wm8995.c index 19b08a5cae62..60e227832331 100644 --- a/sound/soc/codecs/wm8995.c +++ b/sound/soc/codecs/wm8995.c | |||
@@ -385,7 +385,7 @@ struct wm8995_priv { | |||
385 | struct fll_config fll[2], fll_suspend[2]; | 385 | struct fll_config fll[2], fll_suspend[2]; |
386 | struct regulator_bulk_data supplies[WM8995_NUM_SUPPLIES]; | 386 | struct regulator_bulk_data supplies[WM8995_NUM_SUPPLIES]; |
387 | struct notifier_block disable_nb[WM8995_NUM_SUPPLIES]; | 387 | struct notifier_block disable_nb[WM8995_NUM_SUPPLIES]; |
388 | struct snd_soc_codec *codec; | 388 | struct snd_soc_component *component; |
389 | }; | 389 | }; |
390 | 390 | ||
391 | /* | 391 | /* |
@@ -485,48 +485,48 @@ static const struct snd_kcontrol_new wm8995_snd_controls[] = { | |||
485 | WM8995_AIF2_ADC_RIGHT_VOLUME, 0, 96, 0, digital_tlv) | 485 | WM8995_AIF2_ADC_RIGHT_VOLUME, 0, 96, 0, digital_tlv) |
486 | }; | 486 | }; |
487 | 487 | ||
488 | static void wm8995_update_class_w(struct snd_soc_codec *codec) | 488 | static void wm8995_update_class_w(struct snd_soc_component *component) |
489 | { | 489 | { |
490 | int enable = 1; | 490 | int enable = 1; |
491 | int source = 0; /* GCC flow analysis can't track enable */ | 491 | int source = 0; /* GCC flow analysis can't track enable */ |
492 | int reg, reg_r; | 492 | int reg, reg_r; |
493 | 493 | ||
494 | /* We also need the same setting for L/R and only one path */ | 494 | /* We also need the same setting for L/R and only one path */ |
495 | reg = snd_soc_read(codec, WM8995_DAC1_LEFT_MIXER_ROUTING); | 495 | reg = snd_soc_component_read32(component, WM8995_DAC1_LEFT_MIXER_ROUTING); |
496 | switch (reg) { | 496 | switch (reg) { |
497 | case WM8995_AIF2DACL_TO_DAC1L: | 497 | case WM8995_AIF2DACL_TO_DAC1L: |
498 | dev_dbg(codec->dev, "Class W source AIF2DAC\n"); | 498 | dev_dbg(component->dev, "Class W source AIF2DAC\n"); |
499 | source = 2 << WM8995_CP_DYN_SRC_SEL_SHIFT; | 499 | source = 2 << WM8995_CP_DYN_SRC_SEL_SHIFT; |
500 | break; | 500 | break; |
501 | case WM8995_AIF1DAC2L_TO_DAC1L: | 501 | case WM8995_AIF1DAC2L_TO_DAC1L: |
502 | dev_dbg(codec->dev, "Class W source AIF1DAC2\n"); | 502 | dev_dbg(component->dev, "Class W source AIF1DAC2\n"); |
503 | source = 1 << WM8995_CP_DYN_SRC_SEL_SHIFT; | 503 | source = 1 << WM8995_CP_DYN_SRC_SEL_SHIFT; |
504 | break; | 504 | break; |
505 | case WM8995_AIF1DAC1L_TO_DAC1L: | 505 | case WM8995_AIF1DAC1L_TO_DAC1L: |
506 | dev_dbg(codec->dev, "Class W source AIF1DAC1\n"); | 506 | dev_dbg(component->dev, "Class W source AIF1DAC1\n"); |
507 | source = 0 << WM8995_CP_DYN_SRC_SEL_SHIFT; | 507 | source = 0 << WM8995_CP_DYN_SRC_SEL_SHIFT; |
508 | break; | 508 | break; |
509 | default: | 509 | default: |
510 | dev_dbg(codec->dev, "DAC mixer setting: %x\n", reg); | 510 | dev_dbg(component->dev, "DAC mixer setting: %x\n", reg); |
511 | enable = 0; | 511 | enable = 0; |
512 | break; | 512 | break; |
513 | } | 513 | } |
514 | 514 | ||
515 | reg_r = snd_soc_read(codec, WM8995_DAC1_RIGHT_MIXER_ROUTING); | 515 | reg_r = snd_soc_component_read32(component, WM8995_DAC1_RIGHT_MIXER_ROUTING); |
516 | if (reg_r != reg) { | 516 | if (reg_r != reg) { |
517 | dev_dbg(codec->dev, "Left and right DAC mixers different\n"); | 517 | dev_dbg(component->dev, "Left and right DAC mixers different\n"); |
518 | enable = 0; | 518 | enable = 0; |
519 | } | 519 | } |
520 | 520 | ||
521 | if (enable) { | 521 | if (enable) { |
522 | dev_dbg(codec->dev, "Class W enabled\n"); | 522 | dev_dbg(component->dev, "Class W enabled\n"); |
523 | snd_soc_update_bits(codec, WM8995_CLASS_W_1, | 523 | snd_soc_component_update_bits(component, WM8995_CLASS_W_1, |
524 | WM8995_CP_DYN_PWR_MASK | | 524 | WM8995_CP_DYN_PWR_MASK | |
525 | WM8995_CP_DYN_SRC_SEL_MASK, | 525 | WM8995_CP_DYN_SRC_SEL_MASK, |
526 | source | WM8995_CP_DYN_PWR); | 526 | source | WM8995_CP_DYN_PWR); |
527 | } else { | 527 | } else { |
528 | dev_dbg(codec->dev, "Class W disabled\n"); | 528 | dev_dbg(component->dev, "Class W disabled\n"); |
529 | snd_soc_update_bits(codec, WM8995_CLASS_W_1, | 529 | snd_soc_component_update_bits(component, WM8995_CLASS_W_1, |
530 | WM8995_CP_DYN_PWR_MASK, 0); | 530 | WM8995_CP_DYN_PWR_MASK, 0); |
531 | } | 531 | } |
532 | } | 532 | } |
@@ -534,11 +534,11 @@ static void wm8995_update_class_w(struct snd_soc_codec *codec) | |||
534 | static int check_clk_sys(struct snd_soc_dapm_widget *source, | 534 | static int check_clk_sys(struct snd_soc_dapm_widget *source, |
535 | struct snd_soc_dapm_widget *sink) | 535 | struct snd_soc_dapm_widget *sink) |
536 | { | 536 | { |
537 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); | 537 | struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); |
538 | unsigned int reg; | 538 | unsigned int reg; |
539 | const char *clk; | 539 | const char *clk; |
540 | 540 | ||
541 | reg = snd_soc_read(codec, WM8995_CLOCKING_1); | 541 | reg = snd_soc_component_read32(component, WM8995_CLOCKING_1); |
542 | /* Check what we're currently using for CLK_SYS */ | 542 | /* Check what we're currently using for CLK_SYS */ |
543 | if (reg & WM8995_SYSCLK_SRC) | 543 | if (reg & WM8995_SYSCLK_SRC) |
544 | clk = "AIF2CLK"; | 544 | clk = "AIF2CLK"; |
@@ -550,37 +550,37 @@ static int check_clk_sys(struct snd_soc_dapm_widget *source, | |||
550 | static int wm8995_put_class_w(struct snd_kcontrol *kcontrol, | 550 | static int wm8995_put_class_w(struct snd_kcontrol *kcontrol, |
551 | struct snd_ctl_elem_value *ucontrol) | 551 | struct snd_ctl_elem_value *ucontrol) |
552 | { | 552 | { |
553 | struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); | 553 | struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); |
554 | int ret; | 554 | int ret; |
555 | 555 | ||
556 | ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); | 556 | ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); |
557 | wm8995_update_class_w(codec); | 557 | wm8995_update_class_w(component); |
558 | return ret; | 558 | return ret; |
559 | } | 559 | } |
560 | 560 | ||
561 | static int hp_supply_event(struct snd_soc_dapm_widget *w, | 561 | static int hp_supply_event(struct snd_soc_dapm_widget *w, |
562 | struct snd_kcontrol *kcontrol, int event) | 562 | struct snd_kcontrol *kcontrol, int event) |
563 | { | 563 | { |
564 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 564 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
565 | 565 | ||
566 | switch (event) { | 566 | switch (event) { |
567 | case SND_SOC_DAPM_PRE_PMU: | 567 | case SND_SOC_DAPM_PRE_PMU: |
568 | /* Enable the headphone amp */ | 568 | /* Enable the headphone amp */ |
569 | snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, | 569 | snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1, |
570 | WM8995_HPOUT1L_ENA_MASK | | 570 | WM8995_HPOUT1L_ENA_MASK | |
571 | WM8995_HPOUT1R_ENA_MASK, | 571 | WM8995_HPOUT1R_ENA_MASK, |
572 | WM8995_HPOUT1L_ENA | | 572 | WM8995_HPOUT1L_ENA | |
573 | WM8995_HPOUT1R_ENA); | 573 | WM8995_HPOUT1R_ENA); |
574 | 574 | ||
575 | /* Enable the second stage */ | 575 | /* Enable the second stage */ |
576 | snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1, | 576 | snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1, |
577 | WM8995_HPOUT1L_DLY_MASK | | 577 | WM8995_HPOUT1L_DLY_MASK | |
578 | WM8995_HPOUT1R_DLY_MASK, | 578 | WM8995_HPOUT1R_DLY_MASK, |
579 | WM8995_HPOUT1L_DLY | | 579 | WM8995_HPOUT1L_DLY | |
580 | WM8995_HPOUT1R_DLY); | 580 | WM8995_HPOUT1R_DLY); |
581 | break; | 581 | break; |
582 | case SND_SOC_DAPM_PRE_PMD: | 582 | case SND_SOC_DAPM_PRE_PMD: |
583 | snd_soc_update_bits(codec, WM8995_CHARGE_PUMP_1, | 583 | snd_soc_component_update_bits(component, WM8995_CHARGE_PUMP_1, |
584 | WM8995_CP_ENA_MASK, 0); | 584 | WM8995_CP_ENA_MASK, 0); |
585 | break; | 585 | break; |
586 | } | 586 | } |
@@ -588,41 +588,41 @@ static int hp_supply_event(struct snd_soc_dapm_widget *w, | |||
588 | return 0; | 588 | return 0; |
589 | } | 589 | } |
590 | 590 | ||
591 | static void dc_servo_cmd(struct snd_soc_codec *codec, | 591 | static void dc_servo_cmd(struct snd_soc_component *component, |
592 | unsigned int reg, unsigned int val, unsigned int mask) | 592 | unsigned int reg, unsigned int val, unsigned int mask) |
593 | { | 593 | { |
594 | int timeout = 10; | 594 | int timeout = 10; |
595 | 595 | ||
596 | dev_dbg(codec->dev, "%s: reg = %#x, val = %#x, mask = %#x\n", | 596 | dev_dbg(component->dev, "%s: reg = %#x, val = %#x, mask = %#x\n", |
597 | __func__, reg, val, mask); | 597 | __func__, reg, val, mask); |
598 | 598 | ||
599 | snd_soc_write(codec, reg, val); | 599 | snd_soc_component_write(component, reg, val); |
600 | while (timeout--) { | 600 | while (timeout--) { |
601 | msleep(10); | 601 | msleep(10); |
602 | val = snd_soc_read(codec, WM8995_DC_SERVO_READBACK_0); | 602 | val = snd_soc_component_read32(component, WM8995_DC_SERVO_READBACK_0); |
603 | if ((val & mask) == mask) | 603 | if ((val & mask) == mask) |
604 | return; | 604 | return; |
605 | } | 605 | } |
606 | 606 | ||
607 | dev_err(codec->dev, "Timed out waiting for DC Servo\n"); | 607 | dev_err(component->dev, "Timed out waiting for DC Servo\n"); |
608 | } | 608 | } |
609 | 609 | ||
610 | static int hp_event(struct snd_soc_dapm_widget *w, | 610 | static int hp_event(struct snd_soc_dapm_widget *w, |
611 | struct snd_kcontrol *kcontrol, int event) | 611 | struct snd_kcontrol *kcontrol, int event) |
612 | { | 612 | { |
613 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 613 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
614 | unsigned int reg; | 614 | unsigned int reg; |
615 | 615 | ||
616 | reg = snd_soc_read(codec, WM8995_ANALOGUE_HP_1); | 616 | reg = snd_soc_component_read32(component, WM8995_ANALOGUE_HP_1); |
617 | 617 | ||
618 | switch (event) { | 618 | switch (event) { |
619 | case SND_SOC_DAPM_POST_PMU: | 619 | case SND_SOC_DAPM_POST_PMU: |
620 | snd_soc_update_bits(codec, WM8995_CHARGE_PUMP_1, | 620 | snd_soc_component_update_bits(component, WM8995_CHARGE_PUMP_1, |
621 | WM8995_CP_ENA_MASK, WM8995_CP_ENA); | 621 | WM8995_CP_ENA_MASK, WM8995_CP_ENA); |
622 | 622 | ||
623 | msleep(5); | 623 | msleep(5); |
624 | 624 | ||
625 | snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, | 625 | snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1, |
626 | WM8995_HPOUT1L_ENA_MASK | | 626 | WM8995_HPOUT1L_ENA_MASK | |
627 | WM8995_HPOUT1R_ENA_MASK, | 627 | WM8995_HPOUT1R_ENA_MASK, |
628 | WM8995_HPOUT1L_ENA | WM8995_HPOUT1R_ENA); | 628 | WM8995_HPOUT1L_ENA | WM8995_HPOUT1R_ENA); |
@@ -630,12 +630,12 @@ static int hp_event(struct snd_soc_dapm_widget *w, | |||
630 | udelay(20); | 630 | udelay(20); |
631 | 631 | ||
632 | reg |= WM8995_HPOUT1L_DLY | WM8995_HPOUT1R_DLY; | 632 | reg |= WM8995_HPOUT1L_DLY | WM8995_HPOUT1R_DLY; |
633 | snd_soc_write(codec, WM8995_ANALOGUE_HP_1, reg); | 633 | snd_soc_component_write(component, WM8995_ANALOGUE_HP_1, reg); |
634 | 634 | ||
635 | snd_soc_write(codec, WM8995_DC_SERVO_1, WM8995_DCS_ENA_CHAN_0 | | 635 | snd_soc_component_write(component, WM8995_DC_SERVO_1, WM8995_DCS_ENA_CHAN_0 | |
636 | WM8995_DCS_ENA_CHAN_1); | 636 | WM8995_DCS_ENA_CHAN_1); |
637 | 637 | ||
638 | dc_servo_cmd(codec, WM8995_DC_SERVO_2, | 638 | dc_servo_cmd(component, WM8995_DC_SERVO_2, |
639 | WM8995_DCS_TRIG_STARTUP_0 | | 639 | WM8995_DCS_TRIG_STARTUP_0 | |
640 | WM8995_DCS_TRIG_STARTUP_1, | 640 | WM8995_DCS_TRIG_STARTUP_1, |
641 | WM8995_DCS_TRIG_DAC_WR_0 | | 641 | WM8995_DCS_TRIG_DAC_WR_0 | |
@@ -643,23 +643,23 @@ static int hp_event(struct snd_soc_dapm_widget *w, | |||
643 | 643 | ||
644 | reg |= WM8995_HPOUT1R_OUTP | WM8995_HPOUT1R_RMV_SHORT | | 644 | reg |= WM8995_HPOUT1R_OUTP | WM8995_HPOUT1R_RMV_SHORT | |
645 | WM8995_HPOUT1L_OUTP | WM8995_HPOUT1L_RMV_SHORT; | 645 | WM8995_HPOUT1L_OUTP | WM8995_HPOUT1L_RMV_SHORT; |
646 | snd_soc_write(codec, WM8995_ANALOGUE_HP_1, reg); | 646 | snd_soc_component_write(component, WM8995_ANALOGUE_HP_1, reg); |
647 | 647 | ||
648 | break; | 648 | break; |
649 | case SND_SOC_DAPM_PRE_PMD: | 649 | case SND_SOC_DAPM_PRE_PMD: |
650 | snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1, | 650 | snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1, |
651 | WM8995_HPOUT1L_OUTP_MASK | | 651 | WM8995_HPOUT1L_OUTP_MASK | |
652 | WM8995_HPOUT1R_OUTP_MASK | | 652 | WM8995_HPOUT1R_OUTP_MASK | |
653 | WM8995_HPOUT1L_RMV_SHORT_MASK | | 653 | WM8995_HPOUT1L_RMV_SHORT_MASK | |
654 | WM8995_HPOUT1R_RMV_SHORT_MASK, 0); | 654 | WM8995_HPOUT1R_RMV_SHORT_MASK, 0); |
655 | 655 | ||
656 | snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1, | 656 | snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1, |
657 | WM8995_HPOUT1L_DLY_MASK | | 657 | WM8995_HPOUT1L_DLY_MASK | |
658 | WM8995_HPOUT1R_DLY_MASK, 0); | 658 | WM8995_HPOUT1R_DLY_MASK, 0); |
659 | 659 | ||
660 | snd_soc_write(codec, WM8995_DC_SERVO_1, 0); | 660 | snd_soc_component_write(component, WM8995_DC_SERVO_1, 0); |
661 | 661 | ||
662 | snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, | 662 | snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1, |
663 | WM8995_HPOUT1L_ENA_MASK | | 663 | WM8995_HPOUT1L_ENA_MASK | |
664 | WM8995_HPOUT1R_ENA_MASK, | 664 | WM8995_HPOUT1R_ENA_MASK, |
665 | 0); | 665 | 0); |
@@ -669,14 +669,14 @@ static int hp_event(struct snd_soc_dapm_widget *w, | |||
669 | return 0; | 669 | return 0; |
670 | } | 670 | } |
671 | 671 | ||
672 | static int configure_aif_clock(struct snd_soc_codec *codec, int aif) | 672 | static int configure_aif_clock(struct snd_soc_component *component, int aif) |
673 | { | 673 | { |
674 | struct wm8995_priv *wm8995; | 674 | struct wm8995_priv *wm8995; |
675 | int rate; | 675 | int rate; |
676 | int reg1 = 0; | 676 | int reg1 = 0; |
677 | int offset; | 677 | int offset; |
678 | 678 | ||
679 | wm8995 = snd_soc_codec_get_drvdata(codec); | 679 | wm8995 = snd_soc_component_get_drvdata(component); |
680 | 680 | ||
681 | if (aif) | 681 | if (aif) |
682 | offset = 4; | 682 | offset = 4; |
@@ -707,29 +707,29 @@ static int configure_aif_clock(struct snd_soc_codec *codec, int aif) | |||
707 | rate /= 2; | 707 | rate /= 2; |
708 | reg1 |= WM8995_AIF1CLK_DIV; | 708 | reg1 |= WM8995_AIF1CLK_DIV; |
709 | 709 | ||
710 | dev_dbg(codec->dev, "Dividing AIF%d clock to %dHz\n", | 710 | dev_dbg(component->dev, "Dividing AIF%d clock to %dHz\n", |
711 | aif + 1, rate); | 711 | aif + 1, rate); |
712 | } | 712 | } |
713 | 713 | ||
714 | wm8995->aifclk[aif] = rate; | 714 | wm8995->aifclk[aif] = rate; |
715 | 715 | ||
716 | snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1 + offset, | 716 | snd_soc_component_update_bits(component, WM8995_AIF1_CLOCKING_1 + offset, |
717 | WM8995_AIF1CLK_SRC_MASK | WM8995_AIF1CLK_DIV_MASK, | 717 | WM8995_AIF1CLK_SRC_MASK | WM8995_AIF1CLK_DIV_MASK, |
718 | reg1); | 718 | reg1); |
719 | return 0; | 719 | return 0; |
720 | } | 720 | } |
721 | 721 | ||
722 | static int configure_clock(struct snd_soc_codec *codec) | 722 | static int configure_clock(struct snd_soc_component *component) |
723 | { | 723 | { |
724 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); | 724 | struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); |
725 | struct wm8995_priv *wm8995; | 725 | struct wm8995_priv *wm8995; |
726 | int change, new; | 726 | int change, new; |
727 | 727 | ||
728 | wm8995 = snd_soc_codec_get_drvdata(codec); | 728 | wm8995 = snd_soc_component_get_drvdata(component); |
729 | 729 | ||
730 | /* Bring up the AIF clocks first */ | 730 | /* Bring up the AIF clocks first */ |
731 | configure_aif_clock(codec, 0); | 731 | configure_aif_clock(component, 0); |
732 | configure_aif_clock(codec, 1); | 732 | configure_aif_clock(component, 1); |
733 | 733 | ||
734 | /* | 734 | /* |
735 | * Then switch CLK_SYS over to the higher of them; a change | 735 | * Then switch CLK_SYS over to the higher of them; a change |
@@ -747,7 +747,7 @@ static int configure_clock(struct snd_soc_codec *codec) | |||
747 | else | 747 | else |
748 | new = 0; | 748 | new = 0; |
749 | 749 | ||
750 | change = snd_soc_update_bits(codec, WM8995_CLOCKING_1, | 750 | change = snd_soc_component_update_bits(component, WM8995_CLOCKING_1, |
751 | WM8995_SYSCLK_SRC_MASK, new); | 751 | WM8995_SYSCLK_SRC_MASK, new); |
752 | if (!change) | 752 | if (!change) |
753 | return 0; | 753 | return 0; |
@@ -760,14 +760,14 @@ static int configure_clock(struct snd_soc_codec *codec) | |||
760 | static int clk_sys_event(struct snd_soc_dapm_widget *w, | 760 | static int clk_sys_event(struct snd_soc_dapm_widget *w, |
761 | struct snd_kcontrol *kcontrol, int event) | 761 | struct snd_kcontrol *kcontrol, int event) |
762 | { | 762 | { |
763 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 763 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
764 | 764 | ||
765 | switch (event) { | 765 | switch (event) { |
766 | case SND_SOC_DAPM_PRE_PMU: | 766 | case SND_SOC_DAPM_PRE_PMU: |
767 | return configure_clock(codec); | 767 | return configure_clock(component); |
768 | 768 | ||
769 | case SND_SOC_DAPM_POST_PMD: | 769 | case SND_SOC_DAPM_POST_PMD: |
770 | configure_clock(codec); | 770 | configure_clock(component); |
771 | break; | 771 | break; |
772 | } | 772 | } |
773 | 773 | ||
@@ -1422,7 +1422,7 @@ static bool wm8995_volatile(struct device *dev, unsigned int reg) | |||
1422 | 1422 | ||
1423 | static int wm8995_aif_mute(struct snd_soc_dai *dai, int mute) | 1423 | static int wm8995_aif_mute(struct snd_soc_dai *dai, int mute) |
1424 | { | 1424 | { |
1425 | struct snd_soc_codec *codec = dai->codec; | 1425 | struct snd_soc_component *component = dai->component; |
1426 | int mute_reg; | 1426 | int mute_reg; |
1427 | 1427 | ||
1428 | switch (dai->id) { | 1428 | switch (dai->id) { |
@@ -1436,18 +1436,18 @@ static int wm8995_aif_mute(struct snd_soc_dai *dai, int mute) | |||
1436 | return -EINVAL; | 1436 | return -EINVAL; |
1437 | } | 1437 | } |
1438 | 1438 | ||
1439 | snd_soc_update_bits(codec, mute_reg, WM8995_AIF1DAC1_MUTE_MASK, | 1439 | snd_soc_component_update_bits(component, mute_reg, WM8995_AIF1DAC1_MUTE_MASK, |
1440 | !!mute << WM8995_AIF1DAC1_MUTE_SHIFT); | 1440 | !!mute << WM8995_AIF1DAC1_MUTE_SHIFT); |
1441 | return 0; | 1441 | return 0; |
1442 | } | 1442 | } |
1443 | 1443 | ||
1444 | static int wm8995_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | 1444 | static int wm8995_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
1445 | { | 1445 | { |
1446 | struct snd_soc_codec *codec; | 1446 | struct snd_soc_component *component; |
1447 | int master; | 1447 | int master; |
1448 | int aif; | 1448 | int aif; |
1449 | 1449 | ||
1450 | codec = dai->codec; | 1450 | component = dai->component; |
1451 | 1451 | ||
1452 | master = 0; | 1452 | master = 0; |
1453 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 1453 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
@@ -1519,11 +1519,11 @@ static int wm8995_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
1519 | return -EINVAL; | 1519 | return -EINVAL; |
1520 | } | 1520 | } |
1521 | 1521 | ||
1522 | snd_soc_update_bits(codec, WM8995_AIF1_CONTROL_1, | 1522 | snd_soc_component_update_bits(component, WM8995_AIF1_CONTROL_1, |
1523 | WM8995_AIF1_BCLK_INV_MASK | | 1523 | WM8995_AIF1_BCLK_INV_MASK | |
1524 | WM8995_AIF1_LRCLK_INV_MASK | | 1524 | WM8995_AIF1_LRCLK_INV_MASK | |
1525 | WM8995_AIF1_FMT_MASK, aif); | 1525 | WM8995_AIF1_FMT_MASK, aif); |
1526 | snd_soc_update_bits(codec, WM8995_AIF1_MASTER_SLAVE, | 1526 | snd_soc_component_update_bits(component, WM8995_AIF1_MASTER_SLAVE, |
1527 | WM8995_AIF1_MSTR_MASK, master); | 1527 | WM8995_AIF1_MSTR_MASK, master); |
1528 | return 0; | 1528 | return 0; |
1529 | } | 1529 | } |
@@ -1546,7 +1546,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream, | |||
1546 | struct snd_pcm_hw_params *params, | 1546 | struct snd_pcm_hw_params *params, |
1547 | struct snd_soc_dai *dai) | 1547 | struct snd_soc_dai *dai) |
1548 | { | 1548 | { |
1549 | struct snd_soc_codec *codec; | 1549 | struct snd_soc_component *component; |
1550 | struct wm8995_priv *wm8995; | 1550 | struct wm8995_priv *wm8995; |
1551 | int aif1_reg; | 1551 | int aif1_reg; |
1552 | int bclk_reg; | 1552 | int bclk_reg; |
@@ -1557,8 +1557,8 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream, | |||
1557 | int lrclk, bclk; | 1557 | int lrclk, bclk; |
1558 | int i, rate_val, best, best_val, cur_val; | 1558 | int i, rate_val, best, best_val, cur_val; |
1559 | 1559 | ||
1560 | codec = dai->codec; | 1560 | component = dai->component; |
1561 | wm8995 = snd_soc_codec_get_drvdata(codec); | 1561 | wm8995 = snd_soc_component_get_drvdata(component); |
1562 | 1562 | ||
1563 | switch (dai->id) { | 1563 | switch (dai->id) { |
1564 | case 0: | 1564 | case 0: |
@@ -1570,7 +1570,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream, | |||
1570 | lrclk_reg = WM8995_AIF1DAC_LRCLK; | 1570 | lrclk_reg = WM8995_AIF1DAC_LRCLK; |
1571 | } else { | 1571 | } else { |
1572 | lrclk_reg = WM8995_AIF1ADC_LRCLK; | 1572 | lrclk_reg = WM8995_AIF1ADC_LRCLK; |
1573 | dev_dbg(codec->dev, "AIF1 using split LRCLK\n"); | 1573 | dev_dbg(component->dev, "AIF1 using split LRCLK\n"); |
1574 | } | 1574 | } |
1575 | break; | 1575 | break; |
1576 | case 1: | 1576 | case 1: |
@@ -1582,7 +1582,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream, | |||
1582 | lrclk_reg = WM8995_AIF2DAC_LRCLK; | 1582 | lrclk_reg = WM8995_AIF2DAC_LRCLK; |
1583 | } else { | 1583 | } else { |
1584 | lrclk_reg = WM8995_AIF2ADC_LRCLK; | 1584 | lrclk_reg = WM8995_AIF2ADC_LRCLK; |
1585 | dev_dbg(codec->dev, "AIF2 using split LRCLK\n"); | 1585 | dev_dbg(component->dev, "AIF2 using split LRCLK\n"); |
1586 | } | 1586 | } |
1587 | break; | 1587 | break; |
1588 | default: | 1588 | default: |
@@ -1668,13 +1668,13 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream, | |||
1668 | dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n", | 1668 | dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n", |
1669 | lrclk, bclk_rate / lrclk); | 1669 | lrclk, bclk_rate / lrclk); |
1670 | 1670 | ||
1671 | snd_soc_update_bits(codec, aif1_reg, | 1671 | snd_soc_component_update_bits(component, aif1_reg, |
1672 | WM8995_AIF1_WL_MASK, aif1); | 1672 | WM8995_AIF1_WL_MASK, aif1); |
1673 | snd_soc_update_bits(codec, bclk_reg, | 1673 | snd_soc_component_update_bits(component, bclk_reg, |
1674 | WM8995_AIF1_BCLK_DIV_MASK, bclk); | 1674 | WM8995_AIF1_BCLK_DIV_MASK, bclk); |
1675 | snd_soc_update_bits(codec, lrclk_reg, | 1675 | snd_soc_component_update_bits(component, lrclk_reg, |
1676 | WM8995_AIF1DAC_RATE_MASK, lrclk); | 1676 | WM8995_AIF1DAC_RATE_MASK, lrclk); |
1677 | snd_soc_update_bits(codec, rate_reg, | 1677 | snd_soc_component_update_bits(component, rate_reg, |
1678 | WM8995_AIF1_SR_MASK | | 1678 | WM8995_AIF1_SR_MASK | |
1679 | WM8995_AIF1CLK_RATE_MASK, rate_val); | 1679 | WM8995_AIF1CLK_RATE_MASK, rate_val); |
1680 | return 0; | 1680 | return 0; |
@@ -1682,7 +1682,7 @@ static int wm8995_hw_params(struct snd_pcm_substream *substream, | |||
1682 | 1682 | ||
1683 | static int wm8995_set_tristate(struct snd_soc_dai *codec_dai, int tristate) | 1683 | static int wm8995_set_tristate(struct snd_soc_dai *codec_dai, int tristate) |
1684 | { | 1684 | { |
1685 | struct snd_soc_codec *codec = codec_dai->codec; | 1685 | struct snd_soc_component *component = codec_dai->component; |
1686 | int reg, val, mask; | 1686 | int reg, val, mask; |
1687 | 1687 | ||
1688 | switch (codec_dai->id) { | 1688 | switch (codec_dai->id) { |
@@ -1707,7 +1707,7 @@ static int wm8995_set_tristate(struct snd_soc_dai *codec_dai, int tristate) | |||
1707 | else | 1707 | else |
1708 | val = 0; | 1708 | val = 0; |
1709 | 1709 | ||
1710 | return snd_soc_update_bits(codec, reg, mask, val); | 1710 | return snd_soc_component_update_bits(component, reg, mask, val); |
1711 | } | 1711 | } |
1712 | 1712 | ||
1713 | /* The size in bits of the FLL divide multiplied by 10 | 1713 | /* The size in bits of the FLL divide multiplied by 10 |
@@ -1797,19 +1797,19 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id, | |||
1797 | int src, unsigned int freq_in, | 1797 | int src, unsigned int freq_in, |
1798 | unsigned int freq_out) | 1798 | unsigned int freq_out) |
1799 | { | 1799 | { |
1800 | struct snd_soc_codec *codec; | 1800 | struct snd_soc_component *component; |
1801 | struct wm8995_priv *wm8995; | 1801 | struct wm8995_priv *wm8995; |
1802 | int reg_offset, ret; | 1802 | int reg_offset, ret; |
1803 | struct fll_div fll; | 1803 | struct fll_div fll; |
1804 | u16 reg, aif1, aif2; | 1804 | u16 reg, aif1, aif2; |
1805 | 1805 | ||
1806 | codec = dai->codec; | 1806 | component = dai->component; |
1807 | wm8995 = snd_soc_codec_get_drvdata(codec); | 1807 | wm8995 = snd_soc_component_get_drvdata(component); |
1808 | 1808 | ||
1809 | aif1 = snd_soc_read(codec, WM8995_AIF1_CLOCKING_1) | 1809 | aif1 = snd_soc_component_read32(component, WM8995_AIF1_CLOCKING_1) |
1810 | & WM8995_AIF1CLK_ENA; | 1810 | & WM8995_AIF1CLK_ENA; |
1811 | 1811 | ||
1812 | aif2 = snd_soc_read(codec, WM8995_AIF2_CLOCKING_1) | 1812 | aif2 = snd_soc_component_read32(component, WM8995_AIF2_CLOCKING_1) |
1813 | & WM8995_AIF2CLK_ENA; | 1813 | & WM8995_AIF2CLK_ENA; |
1814 | 1814 | ||
1815 | switch (id) { | 1815 | switch (id) { |
@@ -1858,35 +1858,35 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id, | |||
1858 | return ret; | 1858 | return ret; |
1859 | 1859 | ||
1860 | /* Gate the AIF clocks while we reclock */ | 1860 | /* Gate the AIF clocks while we reclock */ |
1861 | snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1, | 1861 | snd_soc_component_update_bits(component, WM8995_AIF1_CLOCKING_1, |
1862 | WM8995_AIF1CLK_ENA_MASK, 0); | 1862 | WM8995_AIF1CLK_ENA_MASK, 0); |
1863 | snd_soc_update_bits(codec, WM8995_AIF2_CLOCKING_1, | 1863 | snd_soc_component_update_bits(component, WM8995_AIF2_CLOCKING_1, |
1864 | WM8995_AIF2CLK_ENA_MASK, 0); | 1864 | WM8995_AIF2CLK_ENA_MASK, 0); |
1865 | 1865 | ||
1866 | /* We always need to disable the FLL while reconfiguring */ | 1866 | /* We always need to disable the FLL while reconfiguring */ |
1867 | snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_1 + reg_offset, | 1867 | snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_1 + reg_offset, |
1868 | WM8995_FLL1_ENA_MASK, 0); | 1868 | WM8995_FLL1_ENA_MASK, 0); |
1869 | 1869 | ||
1870 | reg = (fll.outdiv << WM8995_FLL1_OUTDIV_SHIFT) | | 1870 | reg = (fll.outdiv << WM8995_FLL1_OUTDIV_SHIFT) | |
1871 | (fll.fll_fratio << WM8995_FLL1_FRATIO_SHIFT); | 1871 | (fll.fll_fratio << WM8995_FLL1_FRATIO_SHIFT); |
1872 | snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_2 + reg_offset, | 1872 | snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_2 + reg_offset, |
1873 | WM8995_FLL1_OUTDIV_MASK | | 1873 | WM8995_FLL1_OUTDIV_MASK | |
1874 | WM8995_FLL1_FRATIO_MASK, reg); | 1874 | WM8995_FLL1_FRATIO_MASK, reg); |
1875 | 1875 | ||
1876 | snd_soc_write(codec, WM8995_FLL1_CONTROL_3 + reg_offset, fll.k); | 1876 | snd_soc_component_write(component, WM8995_FLL1_CONTROL_3 + reg_offset, fll.k); |
1877 | 1877 | ||
1878 | snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_4 + reg_offset, | 1878 | snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_4 + reg_offset, |
1879 | WM8995_FLL1_N_MASK, | 1879 | WM8995_FLL1_N_MASK, |
1880 | fll.n << WM8995_FLL1_N_SHIFT); | 1880 | fll.n << WM8995_FLL1_N_SHIFT); |
1881 | 1881 | ||
1882 | snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_5 + reg_offset, | 1882 | snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_5 + reg_offset, |
1883 | WM8995_FLL1_REFCLK_DIV_MASK | | 1883 | WM8995_FLL1_REFCLK_DIV_MASK | |
1884 | WM8995_FLL1_REFCLK_SRC_MASK, | 1884 | WM8995_FLL1_REFCLK_SRC_MASK, |
1885 | (fll.clk_ref_div << WM8995_FLL1_REFCLK_DIV_SHIFT) | | 1885 | (fll.clk_ref_div << WM8995_FLL1_REFCLK_DIV_SHIFT) | |
1886 | (src - 1)); | 1886 | (src - 1)); |
1887 | 1887 | ||
1888 | if (freq_out) | 1888 | if (freq_out) |
1889 | snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_1 + reg_offset, | 1889 | snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_1 + reg_offset, |
1890 | WM8995_FLL1_ENA_MASK, WM8995_FLL1_ENA); | 1890 | WM8995_FLL1_ENA_MASK, WM8995_FLL1_ENA); |
1891 | 1891 | ||
1892 | wm8995->fll[id].in = freq_in; | 1892 | wm8995->fll[id].in = freq_in; |
@@ -1894,12 +1894,12 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id, | |||
1894 | wm8995->fll[id].src = src; | 1894 | wm8995->fll[id].src = src; |
1895 | 1895 | ||
1896 | /* Enable any gated AIF clocks */ | 1896 | /* Enable any gated AIF clocks */ |
1897 | snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1, | 1897 | snd_soc_component_update_bits(component, WM8995_AIF1_CLOCKING_1, |
1898 | WM8995_AIF1CLK_ENA_MASK, aif1); | 1898 | WM8995_AIF1CLK_ENA_MASK, aif1); |
1899 | snd_soc_update_bits(codec, WM8995_AIF2_CLOCKING_1, | 1899 | snd_soc_component_update_bits(component, WM8995_AIF2_CLOCKING_1, |
1900 | WM8995_AIF2CLK_ENA_MASK, aif2); | 1900 | WM8995_AIF2CLK_ENA_MASK, aif2); |
1901 | 1901 | ||
1902 | configure_clock(codec); | 1902 | configure_clock(component); |
1903 | 1903 | ||
1904 | return 0; | 1904 | return 0; |
1905 | } | 1905 | } |
@@ -1907,11 +1907,11 @@ static int wm8995_set_fll(struct snd_soc_dai *dai, int id, | |||
1907 | static int wm8995_set_dai_sysclk(struct snd_soc_dai *dai, | 1907 | static int wm8995_set_dai_sysclk(struct snd_soc_dai *dai, |
1908 | int clk_id, unsigned int freq, int dir) | 1908 | int clk_id, unsigned int freq, int dir) |
1909 | { | 1909 | { |
1910 | struct snd_soc_codec *codec; | 1910 | struct snd_soc_component *component; |
1911 | struct wm8995_priv *wm8995; | 1911 | struct wm8995_priv *wm8995; |
1912 | 1912 | ||
1913 | codec = dai->codec; | 1913 | component = dai->component; |
1914 | wm8995 = snd_soc_codec_get_drvdata(codec); | 1914 | wm8995 = snd_soc_component_get_drvdata(component); |
1915 | 1915 | ||
1916 | switch (dai->id) { | 1916 | switch (dai->id) { |
1917 | case 0: | 1917 | case 0: |
@@ -1949,24 +1949,24 @@ static int wm8995_set_dai_sysclk(struct snd_soc_dai *dai, | |||
1949 | return -EINVAL; | 1949 | return -EINVAL; |
1950 | } | 1950 | } |
1951 | 1951 | ||
1952 | configure_clock(codec); | 1952 | configure_clock(component); |
1953 | 1953 | ||
1954 | return 0; | 1954 | return 0; |
1955 | } | 1955 | } |
1956 | 1956 | ||
1957 | static int wm8995_set_bias_level(struct snd_soc_codec *codec, | 1957 | static int wm8995_set_bias_level(struct snd_soc_component *component, |
1958 | enum snd_soc_bias_level level) | 1958 | enum snd_soc_bias_level level) |
1959 | { | 1959 | { |
1960 | struct wm8995_priv *wm8995; | 1960 | struct wm8995_priv *wm8995; |
1961 | int ret; | 1961 | int ret; |
1962 | 1962 | ||
1963 | wm8995 = snd_soc_codec_get_drvdata(codec); | 1963 | wm8995 = snd_soc_component_get_drvdata(component); |
1964 | switch (level) { | 1964 | switch (level) { |
1965 | case SND_SOC_BIAS_ON: | 1965 | case SND_SOC_BIAS_ON: |
1966 | case SND_SOC_BIAS_PREPARE: | 1966 | case SND_SOC_BIAS_PREPARE: |
1967 | break; | 1967 | break; |
1968 | case SND_SOC_BIAS_STANDBY: | 1968 | case SND_SOC_BIAS_STANDBY: |
1969 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { | 1969 | if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { |
1970 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies), | 1970 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies), |
1971 | wm8995->supplies); | 1971 | wm8995->supplies); |
1972 | if (ret) | 1972 | if (ret) |
@@ -1974,17 +1974,17 @@ static int wm8995_set_bias_level(struct snd_soc_codec *codec, | |||
1974 | 1974 | ||
1975 | ret = regcache_sync(wm8995->regmap); | 1975 | ret = regcache_sync(wm8995->regmap); |
1976 | if (ret) { | 1976 | if (ret) { |
1977 | dev_err(codec->dev, | 1977 | dev_err(component->dev, |
1978 | "Failed to sync cache: %d\n", ret); | 1978 | "Failed to sync cache: %d\n", ret); |
1979 | return ret; | 1979 | return ret; |
1980 | } | 1980 | } |
1981 | 1981 | ||
1982 | snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, | 1982 | snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1, |
1983 | WM8995_BG_ENA_MASK, WM8995_BG_ENA); | 1983 | WM8995_BG_ENA_MASK, WM8995_BG_ENA); |
1984 | } | 1984 | } |
1985 | break; | 1985 | break; |
1986 | case SND_SOC_BIAS_OFF: | 1986 | case SND_SOC_BIAS_OFF: |
1987 | snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, | 1987 | snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1, |
1988 | WM8995_BG_ENA_MASK, 0); | 1988 | WM8995_BG_ENA_MASK, 0); |
1989 | regulator_bulk_disable(ARRAY_SIZE(wm8995->supplies), | 1989 | regulator_bulk_disable(ARRAY_SIZE(wm8995->supplies), |
1990 | wm8995->supplies); | 1990 | wm8995->supplies); |
@@ -1994,37 +1994,36 @@ static int wm8995_set_bias_level(struct snd_soc_codec *codec, | |||
1994 | return 0; | 1994 | return 0; |
1995 | } | 1995 | } |
1996 | 1996 | ||
1997 | static int wm8995_remove(struct snd_soc_codec *codec) | 1997 | static void wm8995_remove(struct snd_soc_component *component) |
1998 | { | 1998 | { |
1999 | struct wm8995_priv *wm8995; | 1999 | struct wm8995_priv *wm8995; |
2000 | int i; | 2000 | int i; |
2001 | 2001 | ||
2002 | wm8995 = snd_soc_codec_get_drvdata(codec); | 2002 | wm8995 = snd_soc_component_get_drvdata(component); |
2003 | 2003 | ||
2004 | for (i = 0; i < ARRAY_SIZE(wm8995->supplies); ++i) | 2004 | for (i = 0; i < ARRAY_SIZE(wm8995->supplies); ++i) |
2005 | regulator_unregister_notifier(wm8995->supplies[i].consumer, | 2005 | regulator_unregister_notifier(wm8995->supplies[i].consumer, |
2006 | &wm8995->disable_nb[i]); | 2006 | &wm8995->disable_nb[i]); |
2007 | 2007 | ||
2008 | regulator_bulk_free(ARRAY_SIZE(wm8995->supplies), wm8995->supplies); | 2008 | regulator_bulk_free(ARRAY_SIZE(wm8995->supplies), wm8995->supplies); |
2009 | return 0; | ||
2010 | } | 2009 | } |
2011 | 2010 | ||
2012 | static int wm8995_probe(struct snd_soc_codec *codec) | 2011 | static int wm8995_probe(struct snd_soc_component *component) |
2013 | { | 2012 | { |
2014 | struct wm8995_priv *wm8995; | 2013 | struct wm8995_priv *wm8995; |
2015 | int i; | 2014 | int i; |
2016 | int ret; | 2015 | int ret; |
2017 | 2016 | ||
2018 | wm8995 = snd_soc_codec_get_drvdata(codec); | 2017 | wm8995 = snd_soc_component_get_drvdata(component); |
2019 | wm8995->codec = codec; | 2018 | wm8995->component = component; |
2020 | 2019 | ||
2021 | for (i = 0; i < ARRAY_SIZE(wm8995->supplies); i++) | 2020 | for (i = 0; i < ARRAY_SIZE(wm8995->supplies); i++) |
2022 | wm8995->supplies[i].supply = wm8995_supply_names[i]; | 2021 | wm8995->supplies[i].supply = wm8995_supply_names[i]; |
2023 | 2022 | ||
2024 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8995->supplies), | 2023 | ret = regulator_bulk_get(component->dev, ARRAY_SIZE(wm8995->supplies), |
2025 | wm8995->supplies); | 2024 | wm8995->supplies); |
2026 | if (ret) { | 2025 | if (ret) { |
2027 | dev_err(codec->dev, "Failed to request supplies: %d\n", ret); | 2026 | dev_err(component->dev, "Failed to request supplies: %d\n", ret); |
2028 | return ret; | 2027 | return ret; |
2029 | } | 2028 | } |
2030 | 2029 | ||
@@ -2042,7 +2041,7 @@ static int wm8995_probe(struct snd_soc_codec *codec) | |||
2042 | ret = regulator_register_notifier(wm8995->supplies[i].consumer, | 2041 | ret = regulator_register_notifier(wm8995->supplies[i].consumer, |
2043 | &wm8995->disable_nb[i]); | 2042 | &wm8995->disable_nb[i]); |
2044 | if (ret) { | 2043 | if (ret) { |
2045 | dev_err(codec->dev, | 2044 | dev_err(component->dev, |
2046 | "Failed to register regulator notifier: %d\n", | 2045 | "Failed to register regulator notifier: %d\n", |
2047 | ret); | 2046 | ret); |
2048 | } | 2047 | } |
@@ -2051,49 +2050,49 @@ static int wm8995_probe(struct snd_soc_codec *codec) | |||
2051 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies), | 2050 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies), |
2052 | wm8995->supplies); | 2051 | wm8995->supplies); |
2053 | if (ret) { | 2052 | if (ret) { |
2054 | dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); | 2053 | dev_err(component->dev, "Failed to enable supplies: %d\n", ret); |
2055 | goto err_reg_get; | 2054 | goto err_reg_get; |
2056 | } | 2055 | } |
2057 | 2056 | ||
2058 | ret = snd_soc_read(codec, WM8995_SOFTWARE_RESET); | 2057 | ret = snd_soc_component_read32(component, WM8995_SOFTWARE_RESET); |
2059 | if (ret < 0) { | 2058 | if (ret < 0) { |
2060 | dev_err(codec->dev, "Failed to read device ID: %d\n", ret); | 2059 | dev_err(component->dev, "Failed to read device ID: %d\n", ret); |
2061 | goto err_reg_enable; | 2060 | goto err_reg_enable; |
2062 | } | 2061 | } |
2063 | 2062 | ||
2064 | if (ret != 0x8995) { | 2063 | if (ret != 0x8995) { |
2065 | dev_err(codec->dev, "Invalid device ID: %#x\n", ret); | 2064 | dev_err(component->dev, "Invalid device ID: %#x\n", ret); |
2066 | ret = -EINVAL; | 2065 | ret = -EINVAL; |
2067 | goto err_reg_enable; | 2066 | goto err_reg_enable; |
2068 | } | 2067 | } |
2069 | 2068 | ||
2070 | ret = snd_soc_write(codec, WM8995_SOFTWARE_RESET, 0); | 2069 | ret = snd_soc_component_write(component, WM8995_SOFTWARE_RESET, 0); |
2071 | if (ret < 0) { | 2070 | if (ret < 0) { |
2072 | dev_err(codec->dev, "Failed to issue reset: %d\n", ret); | 2071 | dev_err(component->dev, "Failed to issue reset: %d\n", ret); |
2073 | goto err_reg_enable; | 2072 | goto err_reg_enable; |
2074 | } | 2073 | } |
2075 | 2074 | ||
2076 | /* Latch volume updates (right only; we always do left then right). */ | 2075 | /* Latch volume updates (right only; we always do left then right). */ |
2077 | snd_soc_update_bits(codec, WM8995_AIF1_DAC1_RIGHT_VOLUME, | 2076 | snd_soc_component_update_bits(component, WM8995_AIF1_DAC1_RIGHT_VOLUME, |
2078 | WM8995_AIF1DAC1_VU_MASK, WM8995_AIF1DAC1_VU); | 2077 | WM8995_AIF1DAC1_VU_MASK, WM8995_AIF1DAC1_VU); |
2079 | snd_soc_update_bits(codec, WM8995_AIF1_DAC2_RIGHT_VOLUME, | 2078 | snd_soc_component_update_bits(component, WM8995_AIF1_DAC2_RIGHT_VOLUME, |
2080 | WM8995_AIF1DAC2_VU_MASK, WM8995_AIF1DAC2_VU); | 2079 | WM8995_AIF1DAC2_VU_MASK, WM8995_AIF1DAC2_VU); |
2081 | snd_soc_update_bits(codec, WM8995_AIF2_DAC_RIGHT_VOLUME, | 2080 | snd_soc_component_update_bits(component, WM8995_AIF2_DAC_RIGHT_VOLUME, |
2082 | WM8995_AIF2DAC_VU_MASK, WM8995_AIF2DAC_VU); | 2081 | WM8995_AIF2DAC_VU_MASK, WM8995_AIF2DAC_VU); |
2083 | snd_soc_update_bits(codec, WM8995_AIF1_ADC1_RIGHT_VOLUME, | 2082 | snd_soc_component_update_bits(component, WM8995_AIF1_ADC1_RIGHT_VOLUME, |
2084 | WM8995_AIF1ADC1_VU_MASK, WM8995_AIF1ADC1_VU); | 2083 | WM8995_AIF1ADC1_VU_MASK, WM8995_AIF1ADC1_VU); |
2085 | snd_soc_update_bits(codec, WM8995_AIF1_ADC2_RIGHT_VOLUME, | 2084 | snd_soc_component_update_bits(component, WM8995_AIF1_ADC2_RIGHT_VOLUME, |
2086 | WM8995_AIF1ADC2_VU_MASK, WM8995_AIF1ADC2_VU); | 2085 | WM8995_AIF1ADC2_VU_MASK, WM8995_AIF1ADC2_VU); |
2087 | snd_soc_update_bits(codec, WM8995_AIF2_ADC_RIGHT_VOLUME, | 2086 | snd_soc_component_update_bits(component, WM8995_AIF2_ADC_RIGHT_VOLUME, |
2088 | WM8995_AIF2ADC_VU_MASK, WM8995_AIF1ADC2_VU); | 2087 | WM8995_AIF2ADC_VU_MASK, WM8995_AIF1ADC2_VU); |
2089 | snd_soc_update_bits(codec, WM8995_DAC1_RIGHT_VOLUME, | 2088 | snd_soc_component_update_bits(component, WM8995_DAC1_RIGHT_VOLUME, |
2090 | WM8995_DAC1_VU_MASK, WM8995_DAC1_VU); | 2089 | WM8995_DAC1_VU_MASK, WM8995_DAC1_VU); |
2091 | snd_soc_update_bits(codec, WM8995_DAC2_RIGHT_VOLUME, | 2090 | snd_soc_component_update_bits(component, WM8995_DAC2_RIGHT_VOLUME, |
2092 | WM8995_DAC2_VU_MASK, WM8995_DAC2_VU); | 2091 | WM8995_DAC2_VU_MASK, WM8995_DAC2_VU); |
2093 | snd_soc_update_bits(codec, WM8995_RIGHT_LINE_INPUT_1_VOLUME, | 2092 | snd_soc_component_update_bits(component, WM8995_RIGHT_LINE_INPUT_1_VOLUME, |
2094 | WM8995_IN1_VU_MASK, WM8995_IN1_VU); | 2093 | WM8995_IN1_VU_MASK, WM8995_IN1_VU); |
2095 | 2094 | ||
2096 | wm8995_update_class_w(codec); | 2095 | wm8995_update_class_w(component); |
2097 | 2096 | ||
2098 | return 0; | 2097 | return 0; |
2099 | 2098 | ||
@@ -2186,20 +2185,19 @@ static struct snd_soc_dai_driver wm8995_dai[] = { | |||
2186 | } | 2185 | } |
2187 | }; | 2186 | }; |
2188 | 2187 | ||
2189 | static const struct snd_soc_codec_driver soc_codec_dev_wm8995 = { | 2188 | static const struct snd_soc_component_driver soc_component_dev_wm8995 = { |
2190 | .probe = wm8995_probe, | 2189 | .probe = wm8995_probe, |
2191 | .remove = wm8995_remove, | 2190 | .remove = wm8995_remove, |
2192 | .set_bias_level = wm8995_set_bias_level, | 2191 | .set_bias_level = wm8995_set_bias_level, |
2193 | .idle_bias_off = true, | 2192 | .controls = wm8995_snd_controls, |
2194 | 2193 | .num_controls = ARRAY_SIZE(wm8995_snd_controls), | |
2195 | .component_driver = { | 2194 | .dapm_widgets = wm8995_dapm_widgets, |
2196 | .controls = wm8995_snd_controls, | 2195 | .num_dapm_widgets = ARRAY_SIZE(wm8995_dapm_widgets), |
2197 | .num_controls = ARRAY_SIZE(wm8995_snd_controls), | 2196 | .dapm_routes = wm8995_intercon, |
2198 | .dapm_widgets = wm8995_dapm_widgets, | 2197 | .num_dapm_routes = ARRAY_SIZE(wm8995_intercon), |
2199 | .num_dapm_widgets = ARRAY_SIZE(wm8995_dapm_widgets), | 2198 | .use_pmdown_time = 1, |
2200 | .dapm_routes = wm8995_intercon, | 2199 | .endianness = 1, |
2201 | .num_dapm_routes = ARRAY_SIZE(wm8995_intercon), | 2200 | .non_legacy_dai_naming = 1, |
2202 | }, | ||
2203 | }; | 2201 | }; |
2204 | 2202 | ||
2205 | static const struct regmap_config wm8995_regmap = { | 2203 | static const struct regmap_config wm8995_regmap = { |
@@ -2233,24 +2231,17 @@ static int wm8995_spi_probe(struct spi_device *spi) | |||
2233 | return ret; | 2231 | return ret; |
2234 | } | 2232 | } |
2235 | 2233 | ||
2236 | ret = snd_soc_register_codec(&spi->dev, | 2234 | ret = devm_snd_soc_register_component(&spi->dev, |
2237 | &soc_codec_dev_wm8995, wm8995_dai, | 2235 | &soc_component_dev_wm8995, wm8995_dai, |
2238 | ARRAY_SIZE(wm8995_dai)); | 2236 | ARRAY_SIZE(wm8995_dai)); |
2239 | return ret; | 2237 | return ret; |
2240 | } | 2238 | } |
2241 | 2239 | ||
2242 | static int wm8995_spi_remove(struct spi_device *spi) | ||
2243 | { | ||
2244 | snd_soc_unregister_codec(&spi->dev); | ||
2245 | return 0; | ||
2246 | } | ||
2247 | |||
2248 | static struct spi_driver wm8995_spi_driver = { | 2240 | static struct spi_driver wm8995_spi_driver = { |
2249 | .driver = { | 2241 | .driver = { |
2250 | .name = "wm8995", | 2242 | .name = "wm8995", |
2251 | }, | 2243 | }, |
2252 | .probe = wm8995_spi_probe, | 2244 | .probe = wm8995_spi_probe, |
2253 | .remove = wm8995_spi_remove | ||
2254 | }; | 2245 | }; |
2255 | #endif | 2246 | #endif |
2256 | 2247 | ||
@@ -2274,8 +2265,8 @@ static int wm8995_i2c_probe(struct i2c_client *i2c, | |||
2274 | return ret; | 2265 | return ret; |
2275 | } | 2266 | } |
2276 | 2267 | ||
2277 | ret = snd_soc_register_codec(&i2c->dev, | 2268 | ret = devm_snd_soc_register_component(&i2c->dev, |
2278 | &soc_codec_dev_wm8995, wm8995_dai, | 2269 | &soc_component_dev_wm8995, wm8995_dai, |
2279 | ARRAY_SIZE(wm8995_dai)); | 2270 | ARRAY_SIZE(wm8995_dai)); |
2280 | if (ret < 0) | 2271 | if (ret < 0) |
2281 | dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret); | 2272 | dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret); |
@@ -2283,12 +2274,6 @@ static int wm8995_i2c_probe(struct i2c_client *i2c, | |||
2283 | return ret; | 2274 | return ret; |
2284 | } | 2275 | } |
2285 | 2276 | ||
2286 | static int wm8995_i2c_remove(struct i2c_client *client) | ||
2287 | { | ||
2288 | snd_soc_unregister_codec(&client->dev); | ||
2289 | return 0; | ||
2290 | } | ||
2291 | |||
2292 | static const struct i2c_device_id wm8995_i2c_id[] = { | 2277 | static const struct i2c_device_id wm8995_i2c_id[] = { |
2293 | {"wm8995", 0}, | 2278 | {"wm8995", 0}, |
2294 | {} | 2279 | {} |
@@ -2301,7 +2286,6 @@ static struct i2c_driver wm8995_i2c_driver = { | |||
2301 | .name = "wm8995", | 2286 | .name = "wm8995", |
2302 | }, | 2287 | }, |
2303 | .probe = wm8995_i2c_probe, | 2288 | .probe = wm8995_i2c_probe, |
2304 | .remove = wm8995_i2c_remove, | ||
2305 | .id_table = wm8995_i2c_id | 2289 | .id_table = wm8995_i2c_id |
2306 | }; | 2290 | }; |
2307 | #endif | 2291 | #endif |