ASoC: fsl_ssi: Set xFEN0 and xFEN1 together

It'd be safer to enable both FIFOs for TX or RX at the same time.

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Tested-by: Caleb Crome <caleb@crome.org>
Tested-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Reviewed-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: Mark Brown <broonie@kernel.org>

1 files changed, 6 insertions, 6 deletions

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 156f5132feba..00dfdc77b567 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -591,6 +591,11 @@ static void fsl_ssi_setup_regvals(struct fsl_ssi *ssi)
         if (fsl_ssi_is_ac97(ssi))
                 vals[RX].scr = vals[TX].scr = 0;
 
+        if (ssi->use_dual_fifo) {
+                vals[RX].srcr |= SSI_SRCR_RFEN1;
+                vals[TX].stcr |= SSI_STCR_TFEN1;
+        }
+
         if (ssi->use_dma) {
                 vals[RX].sier |= SSI_SIER_RDMAE;
                 vals[TX].sier |= SSI_SIER_TDMAE;
@@ -991,14 +996,9 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
                      SSI_SFCSR_TFWM0(wm) | SSI_SFCSR_RFWM0(wm) |
                      SSI_SFCSR_TFWM1(wm) | SSI_SFCSR_RFWM1(wm));
 
-        if (ssi->use_dual_fifo) {
-                regmap_update_bits(regs, REG_SSI_SRCR,
-                                   SSI_SRCR_RFEN1, SSI_SRCR_RFEN1);
-                regmap_update_bits(regs, REG_SSI_STCR,
-                                   SSI_STCR_TFEN1, SSI_STCR_TFEN1);
+        if (ssi->use_dual_fifo)
                 regmap_update_bits(regs, REG_SSI_SCR,
                                    SSI_SCR_TCH_EN, SSI_SCR_TCH_EN);
-        }
 
         if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_AC97)
                 fsl_ssi_setup_ac97(ssi);