summaryrefslogtreecommitdiffstats
path: root/sound/pci
diff options
context:
space:
mode:
authorJaroslav Kysela <perex@perex.cz>2019-03-13 12:09:23 -0400
committerTakashi Iwai <tiwai@suse.de>2019-03-13 16:25:44 -0400
commitb0d8bc50b9f221e3af76afe0473f7c171cebbb40 (patch)
tree801df6d0477b9da11819a335a90b031ac6850439 /sound/pci
parent167897f4b32c2bc18b3b6183029a33fb420a114e (diff)
ALSA: hda: hdmi - add Icelake support
This is just a port of the ASoC Icelake HDMI codec code to the legacy HDA driver with some cleanups. ASoC commit 019033c854a20e10f691f6cc0e897df8817d9521: "ASoC: Intel: hdac_hdmi: add Icelake support" Signed-off-by: Jaroslav Kysela <perex@perex.cz> Cc: Bard liao <bard.liao@intel.com> Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/hda/patch_hdmi.c67
1 files changed, 51 insertions, 16 deletions
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 73d7042ff884..8b3ac690efa3 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -57,10 +57,11 @@ MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
57#define is_geminilake(codec) (((codec)->core.vendor_id == 0x8086280d) || \ 57#define is_geminilake(codec) (((codec)->core.vendor_id == 0x8086280d) || \
58 ((codec)->core.vendor_id == 0x80862800)) 58 ((codec)->core.vendor_id == 0x80862800))
59#define is_cannonlake(codec) ((codec)->core.vendor_id == 0x8086280c) 59#define is_cannonlake(codec) ((codec)->core.vendor_id == 0x8086280c)
60#define is_icelake(codec) ((codec)->core.vendor_id == 0x8086280f)
60#define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \ 61#define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
61 || is_skylake(codec) || is_broxton(codec) \ 62 || is_skylake(codec) || is_broxton(codec) \
62 || is_kabylake(codec)) || is_geminilake(codec) \ 63 || is_kabylake(codec) || is_geminilake(codec) \
63 || is_cannonlake(codec) 64 || is_cannonlake(codec) || is_icelake(codec))
64#define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882) 65#define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
65#define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883) 66#define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
66#define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec)) 67#define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
@@ -181,6 +182,8 @@ struct hdmi_spec {
181 182
182 struct hdac_chmap chmap; 183 struct hdac_chmap chmap;
183 hda_nid_t vendor_nid; 184 hda_nid_t vendor_nid;
185 const int *port_map;
186 int port_num;
184}; 187};
185 188
186#ifdef CONFIG_SND_HDA_COMPONENT 189#ifdef CONFIG_SND_HDA_COMPONENT
@@ -2418,12 +2421,11 @@ static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2418 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids); 2421 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2419} 2422}
2420 2423
2421#define INTEL_VENDOR_NID 0x08 2424#define INTEL_GET_VENDOR_VERB 0xf81
2422#define INTEL_GLK_VENDOR_NID 0x0B 2425#define INTEL_GET_VENDOR_VERB 0xf81
2423#define INTEL_GET_VENDOR_VERB 0xf81 2426#define INTEL_SET_VENDOR_VERB 0x781
2424#define INTEL_SET_VENDOR_VERB 0x781 2427#define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2425#define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */ 2428#define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2426#define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2427 2429
2428static void intel_haswell_enable_all_pins(struct hda_codec *codec, 2430static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2429 bool update_tree) 2431 bool update_tree)
@@ -2503,11 +2505,29 @@ static int intel_base_nid(struct hda_codec *codec)
2503 2505
2504static int intel_pin2port(void *audio_ptr, int pin_nid) 2506static int intel_pin2port(void *audio_ptr, int pin_nid)
2505{ 2507{
2506 int base_nid = intel_base_nid(audio_ptr); 2508 struct hda_codec *codec = audio_ptr;
2509 struct hdmi_spec *spec = codec->spec;
2510 int base_nid, i;
2507 2511
2508 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3)) 2512 if (!spec->port_num) {
2509 return -1; 2513 base_nid = intel_base_nid(codec);
2510 return pin_nid - base_nid + 1; /* intel port is 1-based */ 2514 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2515 return -1;
2516 return pin_nid - base_nid + 1; /* intel port is 1-based */
2517 }
2518
2519 /*
2520 * looking for the pin number in the mapping table and return
2521 * the index which indicate the port number
2522 */
2523 for (i = 0; i < spec->port_num; i++) {
2524 if (pin_nid == spec->port_map[i])
2525 return i + 1;
2526 }
2527
2528 /* return -1 if pin number exceeds our expectation */
2529 codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2530 return -1;
2511} 2531}
2512 2532
2513static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe) 2533static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
@@ -2608,7 +2628,8 @@ static int parse_intel_hdmi(struct hda_codec *codec)
2608} 2628}
2609 2629
2610/* Intel Haswell and onwards; audio component with eld notifier */ 2630/* Intel Haswell and onwards; audio component with eld notifier */
2611static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid) 2631static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2632 const int *port_map, int port_num)
2612{ 2633{
2613 struct hdmi_spec *spec; 2634 struct hdmi_spec *spec;
2614 int err; 2635 int err;
@@ -2620,6 +2641,8 @@ static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid)
2620 codec->dp_mst = true; 2641 codec->dp_mst = true;
2621 spec->dyn_pcm_assign = true; 2642 spec->dyn_pcm_assign = true;
2622 spec->vendor_nid = vendor_nid; 2643 spec->vendor_nid = vendor_nid;
2644 spec->port_map = port_map;
2645 spec->port_num = port_num;
2623 2646
2624 intel_haswell_enable_all_pins(codec, true); 2647 intel_haswell_enable_all_pins(codec, true);
2625 intel_haswell_fixup_enable_dp12(codec); 2648 intel_haswell_fixup_enable_dp12(codec);
@@ -2638,12 +2661,23 @@ static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid)
2638 2661
2639static int patch_i915_hsw_hdmi(struct hda_codec *codec) 2662static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2640{ 2663{
2641 return intel_hsw_common_init(codec, INTEL_VENDOR_NID); 2664 return intel_hsw_common_init(codec, 0x08, NULL, 0);
2642} 2665}
2643 2666
2644static int patch_i915_glk_hdmi(struct hda_codec *codec) 2667static int patch_i915_glk_hdmi(struct hda_codec *codec)
2645{ 2668{
2646 return intel_hsw_common_init(codec, INTEL_GLK_VENDOR_NID); 2669 return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2670}
2671
2672static int patch_i915_icl_hdmi(struct hda_codec *codec)
2673{
2674 /*
2675 * pin to port mapping table where the value indicate the pin number and
2676 * the index indicate the port number with 1 base.
2677 */
2678 static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb};
2679
2680 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2647} 2681}
2648 2682
2649/* Intel Baytrail and Braswell; with eld notifier */ 2683/* Intel Baytrail and Braswell; with eld notifier */
@@ -3886,6 +3920,7 @@ HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
3886HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi), 3920HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
3887HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi), 3921HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi),
3888HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi), 3922HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi),
3923HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI", patch_i915_glk_hdmi),
3889HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi), 3924HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi),
3890HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi), 3925HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi),
3891HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi), 3926HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi),
@@ -3899,7 +3934,7 @@ HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi),
3899HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi), 3934HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi),
3900HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi), 3935HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi),
3901HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi), 3936HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi),
3902HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI", patch_i915_glk_hdmi), 3937HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
3903HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi), 3938HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
3904HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi), 3939HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
3905HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi), 3940HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),