Merge tag 'ux500-no-idh' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/cleanup

From Linus Walleij:
Removal of the <mach/id.h> include from ux500
- First an ACKed MFD patch deleting the only consumer
  of these cpu_is* functions outside of mach-ux500
- Introduce a new local cpu_is_u8580() in this patch
  set to avoid clashing with other patch sets.
- Finally de-globalize <mach/id.h>.

* tag 'ux500-no-idh' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: de-globalize <mach/id.h>
  ARM: ux500: Introduce cpu_is_u8580()
  mfd: prcmu: delete pin control helpers

Signed-off-by: Olof Johansson <olof@lixom.net>

2 files changed, 0 insertions, 87 deletions

diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h
index 6ee4247df11e..a65deddede2f 100644
--- a/include/linux/mfd/db8500-prcmu.h
+++ b/include/linux/mfd/db8500-prcmu.h
@@ -16,12 +16,6 @@
 /*
  * Registers
  */
-#define DB8500_PRCM_GPIOCR 0x138
-#define DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0     BIT(0)
-#define DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD      BIT(9)
-#define DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1     BIT(11)
-#define DB8500_PRCM_GPIOCR_SPI2_SELECT          BIT(23)
-
 #define DB8500_PRCM_LINE_VALUE 0x170
 #define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0      BIT(3)
 
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index c202d6c4d879..155280642583 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -218,8 +218,6 @@ enum ddr_pwrst {
 
 #if defined(CONFIG_UX500_SOC_DB8500)
 
-#include <mach/id.h>
-
 static inline void __init prcmu_early_init(void)
 {
         return db8500_prcmu_early_init();
@@ -626,85 +624,6 @@ static inline void prcmu_clear(unsigned int reg, u32 bits)
         prcmu_write_masked(reg, bits, 0);
 }
 
-#if defined(CONFIG_UX500_SOC_DB8500)
-
-/**
- * prcmu_enable_spi2 - Enables pin muxing for SPI2 on OtherAlternateC1.
- */
-static inline void prcmu_enable_spi2(void)
-{
-        if (cpu_is_u8500())
-                prcmu_set(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
-}
-
-/**
- * prcmu_disable_spi2 - Disables pin muxing for SPI2 on OtherAlternateC1.
- */
-static inline void prcmu_disable_spi2(void)
-{
-        if (cpu_is_u8500())
-                prcmu_clear(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
-}
-
-/**
- * prcmu_enable_stm_mod_uart - Enables pin muxing for STMMOD
- * and UARTMOD on OtherAlternateC3.
- */
-static inline void prcmu_enable_stm_mod_uart(void)
-{
-        if (cpu_is_u8500()) {
-                prcmu_set(DB8500_PRCM_GPIOCR,
-                        (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
-                         DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
-        }
-}
-
-/**
- * prcmu_disable_stm_mod_uart - Disables pin muxing for STMMOD
- * and UARTMOD on OtherAlternateC3.
- */
-static inline void prcmu_disable_stm_mod_uart(void)
-{
-        if (cpu_is_u8500()) {
-                prcmu_clear(DB8500_PRCM_GPIOCR,
-                        (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
-                         DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
-        }
-}
-
-/**
- * prcmu_enable_stm_ape - Enables pin muxing for STM APE on OtherAlternateC1.
- */
-static inline void prcmu_enable_stm_ape(void)
-{
-        if (cpu_is_u8500()) {
-                prcmu_set(DB8500_PRCM_GPIOCR,
-                        DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
-        }
-}
-
-/**
- * prcmu_disable_stm_ape - Disables pin muxing for STM APE on OtherAlternateC1.
- */
-static inline void prcmu_disable_stm_ape(void)
-{
-        if (cpu_is_u8500()) {
-                prcmu_clear(DB8500_PRCM_GPIOCR,
-                        DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
-        }
-}
-
-#else
-
-static inline void prcmu_enable_spi2(void) {}
-static inline void prcmu_disable_spi2(void) {}
-static inline void prcmu_enable_stm_mod_uart(void) {}
-static inline void prcmu_disable_stm_mod_uart(void) {}
-static inline void prcmu_enable_stm_ape(void) {}
-static inline void prcmu_disable_stm_ape(void) {}
-
-#endif
-
 /* PRCMU QoS APE OPP class */
 #define PRCMU_QOS_APE_OPP 1
 #define PRCMU_QOS_DDR_OPP 2